BlazingCore vision system REV.B | Release Date: JUNE, 2010
C3038 CAMERA MODULE
• • • •
Features • • • •
Wide dynamic range, anti-blooming, zero smearing • Electronic exposure/gain/white balance control Image enhancement - brightness, contrast, gamma, saturation, sharpness, window, etc. Internal/external synchronization Frame exposure/line exposure option 3.3-Volt operation, low power dissipation - < 20 mA active power - < 10 μA in power-save mode Gamma correction (0.45/0.55/1.00) I2C programmable (400 kb/s): Colour saturation, brightness, contrast, white balance, exposure time, gain
•
101,376 pixels, 1/4” lens, CIF/QCIF format Progressive scan read out Data format - YCrCb 4:2:2, GRB 4:2:2, RGB Raw Data 8/16 bit video data: ITU-601, ITU-656, ZV port
• • •
Module Specifications Imager Array Size Pixel size Scanning Effective image area Electronic Exposure Gamma Correction S/N Ratio Min Illumination Operation Voltage Operation Current
OV6630, CMOS colour image sensor 356 X 292 pixels 9 X 8.2 μm Progressive 3.1mm x 2.5mm 500:1 0.45/0.55/1.0 >48dB 3lux @F1.2 3.3 VDC <20mA Active ; 10 μA Standby
Module pinout
BlazingCore vision system Rev.B | JUNE 2010 Release
BlazingCore vision system CAMERA MODULE PIN DESCRIPTION PIN REP.
PIN DESCRIPTION
Y0-Y7 PWDN RST SDA FODD CL HREF AGND VSYN PCLK EXCLK VCC UV0-UV7 GND VTO
Digital output Y Bus. Power down mode Reset I2C Serial data Odd Field flag I2C Serial clock input Horizontal window reference output Analogue Ground Vertical Sync output Pixel clock output External clock input (need to remove crystal) Power Supply 3.3VDC Digital output UV bus Common ground Video Analogue Output (75立 monochrome)
BlazingCore vision system Rev.B | JUNE 2010 Release
BlazingCore vision system Interfacing a BCore100 (reV.B) to the camera module
CAMERA MODULE
FRONT
BACK
TOP BOTTOM
CAMERA MODULE BACK
BOTTOM
GND
UV6
UV4
UV2
UV0 AGND EXCLK AGND AGND SCL
JST1 JST2
BUTTON1
3.3V GND MCLR GND VCC
LED1
JP1 JP3
JP4
JP2 BUTTON2
JST5 JST4 JST3 LED2 JP5
JST6
Reset Button
PORT3 SCL SDA PCLK VSYNC HREF VCC AGND
PORT2
ADC
CAMERA MODULE PINS
59 58 57 56 55 54
SDA PWDN
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 16 15 14 13 12 11 10 9 3.3V GND
BlazingCore vision system Rev.B | JUNE 2010 Release
Y7
Y5
Y3
Y1
Y6
Y4
Y2
Y0
PORT5
UV1
PORT4
UV3
PORT1
UV5
PORT7
UV7
PORT6
VTO
53 52 51 50 49 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 3.3V GND MCLR GND VCC
VCC
VCC PCLK VSYN HREF FODD RST
TOP
CAMERA MODULE PINS Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 VCC AGND
CAMERA MODULE PINOUT
BlazingCore vision system Interfacing a BCore100 (reV.B) to the OLED Board (STACKABLE) The BCore Board/s should stack directly onto the back of the OLED board (so that the OLED faces outwards) with the pins nicely lined up. Connections are illustrated in the figure below. Note: The current configuration used for the BlazingCore Vision System requires that the Camera is connected by wire, and the OLED Board is then stacked to the BCore100 Board using standard gold pin headers and sockets. *For more information on the OLED Board, please refer to our 2.83â&#x20AC;? OLED Display Datasheet. http://www.aiscube.com/main/BlazingCore/Download/AMOLED_Datasheet.pdf
BlazingCore vision system Rev.B | JUNE 2010 Release
BlazingCore vision system BCore100 (reV.b) to OLED Board pin connection
SD Card Bus Line
JP5
JST6
JST5 JST4 JST3
JP1 JP3
JP4
JP2 BUTTON2
59 58 57 56 55 54
LED2 JP5
53 52 51 50 49 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 3.3V GND MCLR GND VCC
3.3V GND MCLR GND VCC
JST1 JST2
BUTTON1
+3.3V GND N.C GND V+
BCore100 Pins
LED1
CSB RW_WRB RS E-RDB RESETB Y+ X+ YXACCEL_X ACCEL_Y ACCEL_Z LDR
BCore100 Pins
Reset Button
OLED BOARD PINS
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 16 15 14 13 12 11 10 9 3.3V GND
BCore100
BlazingCore vision system Rev.B | JUNE 2010 Release
OLED BOARD PINS D17 D16 D15 D14 D13 D12 D11 D10 D01 D02 D03 D04 D05 D06 D07 D08
Bcore board/s, camera & oled Pin comparison Pins 1
BCore100 (REV.B) GIO
2
GIO
3
GIO
JST1
OLED
CAMERA
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
JST2 4
GIO
5
GIO
6
GIO
7
GIO
8
GIO
PORT0 JST3
JST4 9
GIO
-
Y0
10
GIO
-
Y1
11
GIO
-
Y2
12
GIO
-
Y3
8bit Data Bus Line
PORT1 13
GIO
-
Y4
14
GIO
-
Y5
15
GIO
-
Y6
16
GIO
-
Y7
17
GIO
ADC
-
HREF
18
GIO
ADC
-
VSYNC
19
GIO
ADC
-
PCLK
20
GIO
ADC
-
SDA
21
GIO
ADC
-
SCL
22
GIO
ADC
-
-
23
GIO
ADC
-
-
24
GIO
ADC
-
-
25
GIO
ADC
LDR
-
26
GIO
ADC
27
GIO
ADC
Y
28
GIO
ADC
X
-
X-
-
PORT2
z
Accelerometer
-
PORT3 29
GIO
ADC
30
GIO
ADC
Y-
31
GIO
ADC
X+
32
GIO
ADC
Touch Screen
-
Y+
-
33
GIO
D8
-
34
GIO
D7
-
35
GIO
D6
-
36
GIO
D5
-
PORT4 37
GIO
D4
-
38
GIO
D3
-
39
GIO
D2
40
GIO
41
(SPI1) SDO1
D1
GIO
D10
16bit Data Bus Line
-
42
GIO
(SPI1) SS1
D11
-
43
GIO
(SPI1) SCK1
D12
-
D13
-
44
GIO
45
GIO
D14
-
46
GIO
D15
-
D16
-
47
GIO
PORT5
(SPIx) SS1A
BlazingCore vision system Rev.B | JUNE 2010 Release
BlazingCore vision system 48
GIO
(SPIx)SCK1A
D17
-
49
49
GIO
RESETB
-
50
GIO
E-RDB
-
51
GIO
RS
-
52
GIO
RW_WRB
-
53
GIO
CSB
-
54
GIO
-
-
55
GIO
-
-
56
GIO
-
-
PORT6
PORT7 57
GIO
-
-
58
GIO
-
-
59
GIO
-
-
60
LED1
-
-
61
BUTTON1
-
-
62
GIO
-
-
63
GIO
-
-
64
GIO
-
-
65
GIO
-
-
66
LED2
-
-
67
BUTTON2
-
-
BlazingCore vision system Rev.B | JUNE 2010 Release
BlazingCore vision system Programming example/s The Camera Module must be initialised before any frame grabbing can be done. Using the camera library built onboard the BCore OS, users are given access to the OV6630 Chip Registers for settings to be made. In the code examples that follow, 3 registers are accessed in OV6630 to configure settings for the initialising stage; Clock Rate Control, Common Control A, and Common Control B.
Table Description of OV6630 I²C Register Set * *For more information please refer to OV6630 Datasheet: URL Sub-Address (HEX) 11
Register CLKRC
Default (HEX) 00
Read/ Write RW
12
COMA
24
RW
13
COMB
01
RW
Description Clock Rate Control CLKRC[7:6] – Sync output polarity selection “00” – HSYNC=Neg, CHSYNC=Neg, VSYNC=Pos “01” – HSYNC=Neg, CHSYNC=Neg, VSYNC=Neg “10” – HSYNC=Pos, CHSYNC=Neg, VSYNC=Pos “11” – HSYNC=Pos, CHSYNC=Pos, VSYNC=Pos CLKRC[5:0] – Clock pre-scaler CLK = (MAIN_CLOCK / ((CLKRC[5:0] + 1) × 2)) / n Where n=1 if register [3E], COMO<7> is set to “1” and n=2 otherwise. Common Control A COMA[7] – SRST, “1” initiates soft reset. All registers are set to default values and chip is reset to known state and resumes normal operation. This bit is automatically cleared after reset. COMA[6] – MIRR, “1” selects mirror image COMA[5] – AGCEN, “1” enables AGC, COMA[4] – Digital output format, “1” selects 8-bit: Y U Y V Y U Y V COMA[3] – Select video data output: “1” - select RGB, “0” - select YCrCb COMA[2] – Auto white balance “1” - Enable AWB, “0” - Disable AWB COMA[1] – Color bar test pattern: “1” - Enable color bar test pattern COMA[0] – Reserved Common Control B COMB[7:6] – Reserved COMB[5] - Select data format. “1” - select 8-bit format, Y/CrCb and RGB is multiplexed to 8-bit Y bus, UV bus is tri-stated, “0” - select 16-bit format COMB[4] – “1” - enable digital output in ITU-656 format COMB[3] – CHSYNC output. “1” - horizontal sync, “0” - composite sync COMB[2] – “1” – Tri-state Y and UV busses. “0” - enable both busses COMB[1] – “1” - Initiate single frame transfer. COMB[0] – “1” - Enable auto adjust mode.
Writereg Write to Register. CAM.WRITEREG(Register Address, Value)
Code: 01. 02. 03. 04. 05. 06. 07. 08. 09.
PUBLIC SUB MAIN() 'Init Camera Module CAM.WRITEREG(18, 128) ‘Common Control A 0x12 DELAY(200) CAM.WRITEREG(18, 64+32+16+8+4) DELAY(200) CAM.WRITEREG(17, 6) 'SPEED - DONT CHANGE 0x11 CAM.WRITEREG(19, 32+1) 'Common Control B 0x13 END SUB
BlazingCore vision system Rev.B | JUNE 2010 Release
BlazingCore vision system Rev.B | JUNE 2010 Release
BlazingCore vision system grabframe Grabs a single frame from the camera module and writes it directly to the OLED’s GRAM for display. CAM.GRABFRAME()
Code: 01. 02. 03. 04. 05. 06. 07. 08. 09. 10. 11. 12.
PUBLIC SUB MAIN() 'Init Camera Module CAM.WRITEREG(18, 128) ‘Common Control A 0x12 DELAY(200) CAM.WRITEREG(18, 64+32+16+8+4) DELAY(200) CAM.WRITEREG(17, 6) 'SPEED - DONT CHANGE 0x11 CAM.WRITEREG(19, 32+1) 'Common Control B 0x13 DO CAM.GRABFRAME() LOOP END SUB
Note/s Note/s : The BlazingCore Vision System is meant to be used together with the OLED display to make use of its high speed GRAM memory, thus eliminating the use of another external memory to store the frame(~140k). Data manipulation is done by reading the pixel data of a specific location from the GRAM into a variable stored in program memory. Of course, the OLED has to be initialised as well.
A full length code demonstrating frame captures from the camera and displaying them on the OLED is shown below. Frame-grabbing and displaying to screen is currently done at 10 to 12 frames a second. Code: 01. 02. 03. 04. 05. 06. 07. 08. 09. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24.
PUBLIC SUB MAIN() 'Init OLED OLED_INIT() 'Init Camera Module CAM.WRITEREG(18, 128) ‘Common Control A 0x12 DELAY(200) CAM.WRITEREG(18, 64+32+16+8+4) DELAY(200) CAM.WRITEREG(17, 6) 'SPEED - DONT CHANGE 0x11 CAM.WRITEREG(19, 32+1) 'Common Control B 0x13 DO CAM.GRABFRAME() LOOP END SUB '============================================== PUBLIC SUB OLED_INIT() OLED.INIT(0) OLED.SETCOLOUR.FOREGROUND(31) OLED.PRINT "TEST" END SUB '==============================================
BlazingCore vision system Rev.B | JUNE 2010 Release
Notes Latest documentation All of our documentations are constantly updated to provide accurate and/or new information that we feel would help you with developing with our products. The latest documentation may be obtained from our website: www.aiscube.com How you can help We appreciate any help to improve our documentations by emailing to us or posting a thread in our forum, reporting any mistakes/typos or errata that you might spot while reading our documentation. We’d get it clarified/corrected the next time we update our documentation. Email: TechSupport@aiscube.com Forum: http://forum.aiscube.com/index.php Disclaimer All information in this documentation is provided ‘as-is’ without any warranty of any kind. The products produced by AIS Cube are meant for rapid prototyping and experimental usage; they are not intended nor designed for implementation in environments that constitute high risk activities. AIS Cube shall assume no responsibility or liability for any indirect, specific, incidental or consequential damages arising out of the use of this documentation or product.
Copyright 2009 - 2010 AIS Cube. All rights reserved. All product and corporate names appearing in this documentation may or may not be registered trademarks or copyrights of their respective companies, and are only used for identification or explanation for the owner’s benefit, with no intent to infringe. The BlazingCore(BCore) and BCore IDE are trademarks of AIS Cube in Singapore and/or other countries. All images depicting the Blazingcore or any part of it is copyrighted. All other trademarks or registered trademarks are the property of their respective owners.
BlazingCore vision system Rev.B | JUNE 2010 Release