Minimizing And Exploiting Leakage In Vlsi Design DOWNLOAD HERE
Introduction.- Minimizing Leakage in Modern Day DSM Processes.- Existing Leakage Minimizing Approaches.- Computing Leakage Current Distributions.- Finding a Minimal Leakage Vector in the Presence of Random PVT Variations Using Signal Possibilities.- The HL Approach-A Low-Leakage ASIC Design Methodology.- Simultaneous Input Vector Control and Circuit Modification.- Optimum Reverse Body Biasing for Leakage Minimization.- Exploiting Leakage Through Sub-threshold Circuit Design.Adaptive Body Biasing to Compensate for PVT Variations.- Optimum VDD for Minimum Energy.Reclaiming the Sub-threshold Speed Penalty Through Micropipelining.- Design of a Sub-threshold BFSK Transmitter IC.- Design of the Chip.- Implementation of the Chip.- Experimental Results.- Summary and Future Work.- Conclusion. EAN/ISBN : 9781441909503 Publisher(s): Springer, Berlin, Springer US Discussed keywords: VLSI Format: ePub/PDF Author(s): Jayakumar, Nikhil - Paul, Suganth - Garg, Rajesh
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