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Chapter 04 Processor Technology and Architecture 1. The ALU component of the CPU moves data and instructions between main memory and registers. a. True b. False
2. One action that occurs during the fetch cycle is incrementing a pointer to the location of the next instruction. a. True b. False
3. The CPU alternates constantly between fetch and execution cycles. a. True b. False
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4. The operand of a CPU instruction cannot contain the location of a data item. a. True b. False
5. Data inputs are accessed from storage or extracted directly from the operands and stored in one or more registers. a. True b. False
6. The control unit cannot execute instructions without assistance from the ALU. a. True b. False
7. MOVE tests the bit values in the source location and moves these values to the destination location. a. True b. False
8. With bit strings, NOT treats each bit in the bit string as a separate Boolean value. a. True b. False
9. Binary addition works with complex data types, such as floating-point and double-precision numbers. a. True b. False
10. Shifting an 8-bit twos complement value to the right by seven positions is a simple way to extract and test the sign bit. a. True b. False
11. Arithmetic SHIFT instructions are more complex when applied to twos complement values because the rightmost bit is a sign bit. Cengage Learning Testing, Powered by Cognero
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a. True b. False
12. The BRANCH command has one operand containing the memory address of the next instruction. a. True b. False
13. Complex instructions are a tradeoff between processor complexity and program simplicity. a. True b. False
14. RISC is a philosophy of processor design that deliberately includes complex instructions. a. True b. False
15. Compared with RISC processors, CISC processors have some advantages for computationally intensive applications. a. True b. False
16. A benchmark program performs specific tasks that can be counted or measured. a. True b. False
17. Pipelining is a method of organizing CPU circuitry so that multiple instructions can be in different stages of execution at the same time. a. True b. False
18. A CPU is a complex system of interconnected electrical switches. a. True Cengage Learning Testing, Powered by Cognero
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b. False
19. A perfect conductor can be described as one having maximum resistance. a. True b. False
20. Electricity travels through a trace at approximately 70% of the speed of light. a. True b. False
21. The earliest computers were constructed with ordinary copper wire and vacuum tube switches and were unreliable because of the heat the vacuum tubes generated. a. True b. False
22. Transistors and the tracks that interconnect them are the fundamental building blocks of all CPUs. a. True b. False
23. Integrated circuits reduced manufacturing cost per circuit because many chips could be manufactured in a single sheet, or wafer. a. True b. False
24. The PC revolution wouldn’t have been possible without standardized microprocessors. a. True b. False
25. According to Moore’s Law, the doubling of transistor density is achieved with a 50% increase in unit cost. a. True Cengage Learning Testing, Powered by Cognero
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b. False
26. Current fabrication technology is capable of squeezing more than a billion transistors onto a wafer of silicon approximately one square centimeter. a. True b. False
27. A microprocessor that fails to perform reliably at a higher clock rate might still be usable and rated for sale at a lower clock rate. a. True b. False
28. Low voltage circuits are less susceptible to damage from voltage surges and static electricity. a. True b. False
29. Early Xeon processors filled an important niche in the small server market but weren’t powerful enough to perform processing duties in many large-scale servers. a. True b. False
30. Practical optical processors will probably appear first as full-fledged computer processors. a. True b. False
31. Traditional bus interfaces are too slow and power hungry to provide sufficient data transfer capacity between many processors or between processors and primary storage. a. True b. False
32. The ____ section of the CPU performs all computation and comparison operations. Cengage Learning Testing, Powered by Cognero
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a. register b. ALU c. shifter d. control unit
33. During the ____ cycle of the CPU, data inputs are prepared for transformation into data outputs. a. execution b. store c. fetch d. wait
34. During the ____ cycle of the CPU, the transformation takes place and data output is stored. a. execution b. fetch c. store d. wait
35. A(n) ____ is the lowest-level command that software can direct a processor to perform. a. cycle b. process c. operand d. instruction
36. The first group of bits in an instruction represents its unique binary number, commonly called the ____. a. data word b. op code c. operand d. operand
37. Subsequent groups of bits after the first group in an instruction hold its input values, called ____. a. operands b. op codes c. operators d. words Cengage Learning Testing, Powered by Cognero
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38. A(n) ____ directs the CPU to route electrical signals representing data inputs through predefined processing circuits that implement the appropriate function. a. operation b. process c. instruction d. cycle
39. A ____ instruction copies data bits to storage locations and can copy data between any combination of registers and primary storage locations. a. JUMP b. LOAD c. STORE d. MOVE
40. A ____ operation is a data transfer from main memory into a register. a. store b. load c. jump d. move
41. A(n) ____ instruction generates the result true if both of its data inputs are true. a. AND b. inclusive OR c. exclusive OR d. NOT
42. A(n) ____ instruction generates the value true if either or both data inputs are true. a. exclusive OR b. AND c. inclusive OR d. NOT Cengage Learning Testing, Powered by Cognero
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43. A(n)____ instruction generates the value true if either (but not both) data input is true. a. AND b. exclusive OR c. inclusive OR d. NOT
44. The ____ can extract a single bit from a bit string. a. logic SHIFT b. ROTATE c. ADD d. NOT
45. A ____ instruction causes the processor to depart from sequential instruction order. a. MOVE b. COMPARE c. BRANCH d. HALT
46. A(n) ____ instruction suspends the normal flow of instruction execution in the current program. a. COMPARE b. ADD c. JUMP d. HALT
47. ____ instructions represent combinations of primitive processing operations. a. Standard b. Complex c. High-order d. System
48. ____ is a philosophy of processor design that deliberately includes complex instructions. a. CISC Cengage Learning Testing, Powered by Cognero
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b. RISC c. OR d. XOR
49. The ____ is a digital circuit that generates timing pulses, or signals, and transmits the pulses to other devices in the computer. a. data clock b. memory clock c. variance clock d. system clock
50. The frequency at which the system clock generates timing pulses is the system’s ____. a. clock cycle b. clock rate c. clock rate d. clock rate
51. In most CPUs, the ____ is the time required to fetch and execute the simplest instruction in the instruction set. a. cycle time b. block time c. hold time d. rest time
52. When manipulating single-precision floating-point numbers, CPU performance is measured in ____. a. watts b. MHz c. MFLOPS d. MIPS
53. Each clock cycle the CPU spends waiting for a slower device is called a ____. a. suspend state b. block state c. hold state d. wait state Cengage Learning Testing, Powered by Cognero
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54. A ____ performs specific tasks that can be counted or measured. a. benchmark program b. metric program c. compiler d. system program
55. ____ are used only by the currently executing program. a. Reserved registers b. Kernel registers c. Instruction registers d. General-purpose registers
56. ____ hold frequently used data items such as loop counters and array indexes. a. Reserved registers b. Kernel registers c. Instruction registers d. General-purpose registers
57. When the control unit fetches an instruction from memory, it stores it in the ____. a. load register b. instruction register c. first general-purpose register d. control register
58. The register that holds bit values (flags) that describe comparison operation results, control conditional BRANCH execution, or indicate actual or potential error conditions ____. a. load register b. instruction register c. program status word d. control register
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59. A ____ is a unit of data containing a fixed number of bytes or bits and can be loosely defined as the amount of data a CPU processes at one time. a. block b. unit c. word d. pixel
60. The term ____ describes instructions executed after the guess but before the final result is known with certainty. a. speculative execution b. consecutive execution c. parallel execution d. symmetric execution
61. ____ describes any CPU architecture in which duplicate CPUs or processor stages can execute in parallel. a. Uniprocessing b. Scaled processing c. Hyperprocessing d. Multiprocessing
62. ____ is the flow of electrons from one place or device to another. a. Electrical voltage b. Electrical current c. Electrical resistance d. Electrical conduction
63. Substances that electrons can flow through are called ____. a. resistors b. semiconductors c. conductors d. insulators
64. The loss of electrical power that occurs as electrons pass through a conductor is called ____. a. resistance b. voltage Cengage Learning Testing, Powered by Cognero
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c. amperage d. wattage
65. ____ has been the primary basis for CPU speed and clock rate improvement since the first electrical computer. a. Consolidation b. Cooling c. Power d. Miniaturization
66. Silicon and germanium are basic elements with resistance characteristics that can be controlled or enhanced with chemicals called ____. a. resistors b. Dopants c. Reactants d. reagents
67. A(n) ____ is an electrical switch with three electrical connections. a. transistor b. resistor c. insulator d. conductor
68. Several transistors and their interconnections on a single chip form a(n) ____. a. optimized circuit b. combination circuit c. integrated circuit d. reduced circuit
69. ____ is based on the observation that the rate of increase in transistor density on microchips had increased steadily, roughly doubling every 18 to 24 months. a. Lamb’s Law b. Newton’s Law Cengage Learning Testing, Powered by Cognero
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c. Rock’s Law d. Moore’s Law
70. ____ states that the cost of fabrication facilities for the latest chip generation doubles every four years. a. Rock’s Law b. Moore’s Law c. Nelson’s Law d. Lamb’s Law
71. Quantum computing uses quantum states to simultaneously encode two values per bit, called a ____. a. bi-bit b. neobit c. qubit d. sim-bit
72. ____________________ are storage locations that hold inputs and outputs for the ALU.
73. The ____________________ of the CPU keeps track of the next program instruction location by incrementing a pointer after each fetch.
74. A(n) ____________________ is a command to the CPU to perform a primitive processing function on specific data inputs.
75. The collection of instructions that a CPU can process is called the CPU’s ____________________.
76. A(n) ____________________ operation is a data transfer from a register into primary storage. Cengage Learning Testing, Powered by Cognero
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77. A(n) ____________________ instruction transforms the Boolean value true (1) into false (0) and the value false into true.
78. A(n) ____________________ instruction accepts two numeric inputs and produces their arithmetic sum.
79. A(n) ____________________ SHIFT instruction performs multiplication or division.
80. In a(n) ____________________ instruction, the processor always departs from the normal execution sequence.
81. CPU and computer system clock rates are expressed in cycles per second, also called ____________________.
82. A(n) ____________________ is a measure of CPU or computer system performance when carrying out one or more specific tasks.
83. The instruction pointer (IP) can also be called the “____________________.�
84. The word size of recent processor generations such as the Intel Core2 and IBM POWER 8 is ____________________ bits.
85. ____________________ is a method of organizing CPU circuitry so that multiple instructions can be in different stages of execution at the same time.
86. Electronic ____________________ control electrical current flow in a circuit and are implemented as transistors.
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87. A(n) ____________________ is a circuit that can perform a processing function on a single binary electrical signal, or bit.
88. Conductive molecules are typically arranged in straight lines, generically called wires or ____________________.
89. The capability of an element or a substance to enable electron flow is called ____________________.
90. The ____________________ of most materials increases as their temperature increases.
91. A(n) ____________________ is an object specifically designed to absorb heat and rapidly dissipate it via air or water movement.
92. The conductivity of ____________________ varies in response to the electrical inputs applied.
93. ____________________ are made of semiconductor material that has been treated, or doped, with chemical impurities to enhance the semiconducting effects.
94. A(n) ____________________ consists of billions of electrical devices on a single chip.
95. A(n) ____________________ is a microchip containing all the circuits and connections that implement a CPU.
96. In an electrical computer, ____________________ is performed by forcing electricity to flow through millions of electrical switches and wires.
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97. ____________________ transistors are a bridge between electrical and optical computer components.
98. Discuss the chain of events that occurs when the CPU executes a program.
99. Identify four activities the control unit performs during the CPU fetch cycle.
100. List two examples of sequence control operations that alter the flow of instruction execution.
101. Why is clock rate a poor or incomplete measure of processor performance?
102. What are the 1-bit and 2-bit processing functions performed by gates?
103. Discuss the issues with heat with respect to chips. ============================================================================================================= =
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