Iphone 5se full schematic diagram

GPS_SP1_RF

UPPER_LBMB_ANT_RF

C5136_RF

SP3_RF

R5135_RF

C5106_RF

C5107_RF

R5104_RF

U_ANTPAC_RF

R5105_RF L5107_RF

L5103_RF

C5104_RF

C5103_RF

C5102_RF

L5135_RF

*

C5101_RF

L5101_RF

C5105_RF

*FL5146_RF

U_GPSLNA_RF L5111_RF

*

FD0514

FD0501

C5129_RF

PP0701

J3200

TP5303_RF

C3002

FD0502

PP3105_RF R3202

C3124

PP3120_RF

PP3185_RF C3123

PP3123_RF

PP3173_RF R5210_RF L5123_RF

PP3155_RF

C3001

C3000

C3120

C0543

FL3153 PP3101_RF FL3154

DZ3153

C3121

DZ3154

XW4302

R3101 DZ3152 FL3150 DZ3150 TP20

C4306

J3100

C4309

L3100

R0809FL3110C3110

R5307_RF R5306_RF

D4701

FL4207

C4204

C4207

C4206

C4220

C4221

C4230

C4222

C4208

C4211

C4212

FL4230

C4213

U0900

FL4213

FL4212

FL4211

*

C0900

C3554

*

C4325

C4318

C4311

L3102

R4303

FL4241

J4700

R4701

C4313 C4715 C4714

FL4712

DZ4712

C4721 DZ4713

R0904

C0511

C4004

R0920

R0808

R0960

C0512

C0510

R1002

R0804

R0805

C2203

C1301

C1310

C1320

R2261 R1202

R1204

R1200

R4020

R0803

R0801

R0721 R0907

C3612

R1203

R0802

C3396

C1314

C2042

C1300

C2081

C1313

C2031

5

0

2

C2014

X

200

W

2 W X

XW1100

1

0

8 0

XW2

U0901

R0950

C0650 C0651

R0651 R0650

C1322

C1241

R0407 R0408 C2112

R0903

*

C2023

C2022

XW2070

C2018

XW2040

C2012

PP1104 PP1105

3

C2013

0

W XW3704 3

C1223

X

7

L2011

L2003

L2000

PP3190_RF PP08

U3700

C2019

*

C2070

C

C2085

XW2030

C2017

L2001

R1201

R0640

R0701

C1244

R0720

R0400

R0403

R0406

R0402

R0404

R0409

6

0

0

R0410

C2132

2

C2015

XW0740

R0930

L2070

C2016

C1105

C2004

R0700

C2024

C1104

C1103

R0401

C1312 PP1003

TP1100

R0909

C1120

R0951

C0744

C1330

C1123

C0604

C0741

* C1136

* C1139

C1243

C0612

C0602

R2201

C2131 R2205C2205

R2270

*

C1200

* * R0945

Y0600

*

C3742

PP1004 * C1130

R0910 R0941R0940

* C0610

R0902

C1154

C0603

C2200

C0601

C2201

* C0611

C2051

XW0650

PP0902

C1323

* C1141

* C1126

L2002

* *

C3740

0 1

FL0610

2 2

0

2

C1122

W X

C2125

2

C2121

C2088

* C1220

* C1222

*

C2123

XW2230

C2026 * C1135

* C1128

C2005

C1125

2

C2122

W

C0742

C2114 PP0610

C2260

X

C2127

C2090 C0620

C2050

R2260

4

C0743

C2030

C2100

2

C2089 C0731 C2091

C2093

C0750 PP0903

* C1127

C0752

* C1203

* C1153

*

C3709

C2094

* C1132

C2080

R0922

2

C3730

* C1129

* C1134

U0600

W

C2092

C3729

* C1221

* C1138

C2040

X

C2007

C2043

PP1010

0

* C1133

C2101

* C1155

C2041

X W

C1228

C0711

0

C1121

C0513 C3373

C0712

0 5

* C1131

* C1201

PP0906

C0710

W 2

*

* C1137

PP1022 C2202

C2270

PP1006

C2240

X

*

PP1100

* C1140

R0900 PP3102_RF

R2240

2 1

* C1246

* C1245

* C1109

C2103

L2020

C3130

BS0501

PP0901 PP0905 PP0900 R0905 R0901 PP0904

C4716 PP1102

0 0

PP1101

* C1112

* C1225

PP1103 PP1023 PP3191_RF

XW1120

C2025

C2111

C0814

C1156

* C1317

U2000

L2021

C3129

C4205

FL4205

FL4220

C0709

R1205 R0411

* C1106

* C1226

PP1020

C1250

L2050

C3128

TP5301_RF

XW3600

C1100 FL1280

TP1120

C3650

* C1115

C2104

R3102 R0806

C4201 R5313_RF

C3663 C3654 C1302

C0801

C1101

C1280

* C1107

C0522 C0521 C0520

R0405

R3729 R3515 C3504 R3550

C3506

* PP0908

C1227

* C1224

C0600

Y2200

C1249

C1247

R2250

R1020

R1021

C2032

C1551

C2044

C2095

C3505

C1150

*

*

C1240

* C1108

* * C1316

C3653

* C1114

PP1021 L2030

C3112

C2107 C4203

0

R0600

C2102

C0815

* C1110

* C1116

* C1113

L2060

FL4222 FL4221R4220

FL4200

C3111

1

C2250

C3640

C0751

C2062

C4200

C3113

1

L2080

C3664

C1151

* C1202

* C1117

C2109

C4202 C2108

C3125

1

C1157

C4241 C3143

FL3111

W

C1321

C3144

R3103 C3210 PP4302

*

R3650

C3670 * C1111

L4201

X

C2130

C0802

*

C2060

L4202

J4200

C4712 R0906

C3601

C3600

U3500

U4000

C4003

L4000

FL4711 * DZ4711

C0523

*

C4007

C1242 C0740

C2061 *

L2041

PP1002

C1248

C4713 FL4713

C3662

C3651

C3661

PP0909

PP09010

D4020

*

* L2040

C4022

D4021*

C4006

L4200

SH0501

C4005 C3394

XW3620

BS0502

C4023

U4020

R4307

C4317

C4320

C4312

DZ4301

L4301

C4315

L4020

L4021

C3385

C4002

*

XW4701

C4711

C4722

*

C3384

PP4303

Q4701

C3146

XW3660

PP3174_RF C2087 PP3129_RF

U3300

C3660

* DZ4710

C4703

* C3665

R3503

C3602

C4020

C3610

R3502

C4321

C4322

C4702

C3552

* C4302

C4324

*C4314

C3387 PP1009

C4021

L5303_RF

C4319

U5302_RF

*

L3300

*

C2086

FL4702

C3611

C5321_RF

*

C4000

C3386

C3308C5303_RF

C2099

C3010

R5309_RF C5302_RF C5324_RF R5302_RF R5301_RF

C4327

R4304

U4300

R4710

C3011

*

*

U0902

C4305 R4301

C4301

C5310_RF

XW4301

U3020

C4303

*

R3020

C5322_RF

R5304_RF

L5301_RF

C4701

U3010

C3012

*

C5304_RF C5330_RF R5305_RF R5310_RF C5317_RF

U5301_RF

C4710

*

C5323_RF

C3105

C4723 FL4701

C4323

C3145 XW3630

C3104

U3200

*

C4724 PP4304

C3013

C3127

C3100 C3101

PP4301

TP23

C4700

R4302

PP1008 R3022 PP1007

PP5303_RF

C4720 FL4700

*

C5309_RF PP5302_RF

FL3100 C3200 FL3104

C4326 FL4720

*

L5302_RF

C4304

*

C5308_RF

FL3156 DZ3156 PP5304_RF

C4316 C4308

R4720 U4301

PP0907

C3020 R3021

*

C3021 C3022

C3126

*

L5201_RF

R5316_RF

R5303_RF

FL3155 DZ3155

*

T5301_RF

DZ3151

TP22

*

* C5201_RF

*

C5311_RF

TP21

R0952

FL3101 FL3146 FL3102 FL3126 FL3151 FL3152 R0807FL3125R3143

Q3140

C5319_RF C5313_RF

C5318_RF C5314_RF

R3203

W X C5316_RF C5312_RF

2

0

3

C3233

C3203

C3208

C5315_RF

R5208_RF

C5205_RF

PP3186_RF PP3124_RF PP3152_RF PP3119_RF

L5122_RF

C5204_RFC3206 C3205

X

PP3128_RF

C3209 C3207 C5203_RF

PP3153_RF PP3154_RF

C3122

C4310

PP3121_RF R4305 PP3127_RF PP3158_RF PP3163_RF PP3162_RF

2 L3205

C3231

C3230FL3232

PP3122_RF

UP_COAX_RF

C3204

C3299

C3232

C3202

C3201

C3220 FL3231

U4302

C3221 WFL3220 3 C3234 2 0 3 FL3201 R3204

C3106

FL3230

FL3200

C3211

R4306

C4307

C5109_RF

R3140

L5108_RF

L3204

PP4305 J4300

*

R5137_RF

L5102_RF * L5121_RF

L3203

*

C0542

L3202

PP0700

*

R5101_RF

L5120_RF

R5214_RF

L3201

C5221_RF C5222_RF

U_SWUANT_RF

*

C0541

FLCELWIF_RF

C5213_RF

C0540 PP1005

C5211_RF

PP0501

U3000

R5102_RF

FLWIFDIP_RF

L5106_RF

L3200

C5202_RF PP3157_RF

*

U5201_RF

R5201_RF R5206_RF

C2220

R5202_RF R5205_RF

C5220_RF PP4306

*

XW5100_RF

C5138_RF

FL5201_RF

C5139_RF PP3193_RF

UPPER_HB_ANT_RF

C5212_RF

R0501

PP3192_RF

FD0515

*

* PP3195_RF

1

5

C5110_RF L

*

0

PP3194_RF

*

*

F

R

_

9

*

R0500

R2210 C5130_RF

L5216_RF

R2220

C5215_RF

R5136_RFC2210

SP0502

L5208_RF

C1548

C1523

C1521

No share Dick itesla.solutions

C0705

C1550

C1500

C1502

Q4500 *

R2200 * VR3101_RF

R4500 C4500

C1510

C1509

FD0510

L2012 C2010

C1503

C1543

C3760

C3700

C3763

C2009 C2106

C1542

C0706

C1522

C0708

C0707

C1541

R3735 C3702

R1501

C1506

R3101_RF

C4504

R1560 C1554 L0601 U4500

C1524 L0602

C1525

PP1520 R1520R0730C0730

C2000

C0704C0703C0702 C0701

TP16 PP1505 PP1504

*

C2305 C2300

PP07

PP1501 PP1500

C2330

* *

J3101_RF

J3100_RF

L2300

C2303 *

C2310

R1500

C2304

* DZ3102_RF C3102_RF

C2331

F R 0

2

_

*

1 3 W X

SH0500

6

5

TP10

TP13

C3210_RF

PP0621

PP0620

C3211_RF

C3422_RF C3417_RF

C3427_RF C3501_RF

C3408_RF C3203_RF C3438_RF C3424_RF

C4641 FL4611C4611 C3423_RF

C4640 FL4610C4610 R4640

C3401_RF

DZ4603

C3418_RF C3436_RF

XW3901_RF

XW3900_RF

R3309_RF

L4301_RF

FT_B40_RF

C4003_RF

C4002_RF

XW4001_RF C4001_RF

*

XW4002_RF

L4003_RF

C4006_RF

L4527_RF

*

XW4004_RF

C4007_RF

U_QPOET_RF

C4506_RF

L4002_RF L4004_RF C4010_RF

L4520_RF

L4523_RF

L4526_RF

FL_B39LP_RF L4821_RF

C4501_RF

L4819_RF C4703_RF L4705_RF

C4201_RF XW4200_RF C4503_RF U_VLB_SW_RF C4224_RF

L4713_RF C4817_RF L4704_RF

C4311_RF L4313_RF L4602_RF L4820_RF

* L4604_RF

L4001_RF

C4701_RF

C3806_RF

L4312_RF

L4601_RF

L4211_RF

L4322_RF

C4313_RF

C4314_RF

C4818_RF L4822_RF

* L4603_RF

C4418_RF

C3815_RF L4421_RF

XW4700_RF

L4706_RF

L4512_RF

C2400 FL2400 *

T_ AN W_ LO

RF

FD0512

C4522_RF

R4700_RF R3702_RF

C4533_RF

J2400

FD0516

L4827_RF L4823_RF C4832_RF C4720_RF

L4407_RF FRX34B39_RF

C4520_RF L4516_RFL4528_RF

XW4300_RF

C4321_RF

L4817_RF

L4829_RF C4826_RF

C3826_RF

C4602_RF

L4806_RF C4803_RF L4905_RF C4901_RF

C4303_RF

C5001_RF

L4808_RF

C4301_RF

L4809_RF

L5002_RF

L5003_RF

C3828_RF

C3829_RF

L4807_RF

C4207_RF

XW3801_RF

XW3802_RF

C3830_RF C3823_RF

L4315_RF

*

L4826_RF C4831_RF

C4407_RF

FD0504

L4825_RF C4820_RF

U_WTR_RF

R4607_RF

* L4223_RF

C4231_RF

C4827_RF L4814_RF

C3825_RF

XW2400

U_DSM_RF

U_ASM_RF_RF L4316_RF

C4317_RF

L5129_RF C5128_RF

C4305_RF

L4813_RF C4809_RF

C3824_RF TP05

L4522_RF

L4515_RF

*

C4528_RF

L4507_RF

C4521_RF

FT_41BC_RF

L4517_RF

C3801_RF

C3807_RF

C2413 TP03

C4304_RF

C3833_RF C3809_RF

*

FTB40A41A_RF

* U_HBPAD_RF

L4217_RF

L4506_RF

C4213_RF

L4524_RF

L4216_RF C4211_RF

U_HBS_RF

R4531_RF C4500_RF

FR38X40B_RF L4708_RF C4532_RF

L4525_RF R4509_RF L4710_RF

L4709_RF

*

*

*

FR40A41A_RF

C4710_RF

C3817_RF

C4005_RF

TP02

L4402_RF

C4101

U_LB_SW_RF L4830_RF L4816_RF C4816_RF R4815_RF

C4502_RF

C4103

R2301

C4320_RF FL_GPSRF_RF

C4808_RF L4810_RF

C4505_RF R4001_RF C4008_RF

Q2301

C4104 TP00

C4423_RF

R4116

*

FL_B17LP_RF C3811_RF XW3803_RF

C3803_RF

FL4100

C3808_RF

L4409_RF

R4111

C4102 R2302

TP19

C4117

L3802_RF L3801_RF

L4904_RF

C4100

FL4143

C2412

C3917_RF

L4902_RF

C4413_RF

L4408_RF

FD40B41A_RF

C4116

XW3500

*

L4903_RF L4901_RF

C3902_RF

C4111

FL4110 C2116

C3813_RF

C2115

C3432_RF

L4405_RF L4406_RF

C4106

XW3902_RF

C3910_RF C3913_RF C3916_RF C3904_RF R3901_RF

C3421_RF C3411_RF

C3429_RF

C4110

*

C3911_RF

U_WFR_RF

R3103_RF R3102_RF

C3420_RF

DZ4101

C4634C4635

C4042

*

C3303_RF

C4115

FL4105C4105

C2113

L4403_RF

C4600

C2410C2411

C3905_RF

*

L4804_RF C4425_RF L4404_RF C4804_RF

C4601 C4620

FL4112C4112

FL4107C4107

L4401_RF

C3403_RF C3412_RF C3409_RF C3406_RF C3433_RF

C4624

C3915_RF C3912_RF

C4118_RF

U_MBPAD_RF

J4600

R2230

C2230

C3901_RF

L4102_RF

C4112_RF C4113_RF

L4801_RF

C4104_RF

C4107_RF

U_2GPA_RF

SL0501

L4805_RF

L4802_RF C4805_RF L4101_RF

C3601_RF

*

L4712_RF

*

C4108_RF

R4600 FL4114

C4606_RF

*

C4507_RF

C4103_RF

L4320_RF C4318_RF L4306_RF L4321_RF C3821_RF C3816_RFC3818_RF C4221_RF L4221_RF C4219_RF C4408_RF

U_VLBPAD_RF

C4109_RF

C4697DZ4604

R3506_RFC3415_RF C3428_RF

FL4620

*

*

C4230_RF L4224_RF C4300_RFC4208_RF C4227_RF L4222_RF

C3903_RF

*

U_LBPAD_RF

C3214_RF FL4608

C4699DZ4610 DZ4602C4696

*

R4100_RF

C3414_RF

FL4624

C4698DZ4600 *

*

C3604_RF

C4223_RF

FL4601

DZ4601

C3603_RF

C3215_RF C3402_RF XW3101_RF

FL4612C4612

U_BB_RF

U_EEP_RF

LOW_COAX_RF

C4309_RF

PP3171_RF PP3170_RF

R3104_RF C3419_RF

C3405_RF

C4642 FL4641

C4206_RF

FL4603

F R

C4651 C4653

FL4642

FL4604

0 4 _

C4650

FL4605

1

TP01

FL4600

R3507_RF

X W 3

L4040

C3437_RF

XW3301_RF

3 C4 04 R3508_RF C3224_RF

C3413_RF C3410_RF

Y3301_RF

C3206_RF R3306_RF

*

R3311_RF C3205_RF R3305_RF

C3425_RF C4654

R3312_RF

C4652

FL4602

R3301_RF C3201_RF R3307_RF

FD0505

R3502_RF

C3430_RF U3501_RF C3213_RF C3434_RF R3501_RF R3505_RF C3212_RF C3602_RF

TP11

R3601_RF

C3404_RF

TP12

C3407_RF

TP08

TP24

C3426_RF

TP09

TP15

C3416_RF

TP18

C3223_RF

*

C2306

Q2300

5

C3202_RF

C3228_RF

*

U4040

C1531

C1508

C1530

C3101_RF C1526

C3237_RF

C4041

4

C3239_RF

* L3203_RF C3218_RF

C3231_RF C3238_RF

U_PMICRF_RF

C

C3435_RF

*

C3220_RF

C3240_RF

C3209_RF

5

1

R

R3308_RF C3301_RF

C3229_RF

* L3201_RF

U_BUFFER_RF

*

* L3202_RF

C3219_RF

PP3172_RF

PP3112_RF

*

C3217_RF C3226_RFC3227_RF

PP3199_RF PP3196_RF PP3197_RF PP3198_RF

PP3111_RF

PP3104_RF

0

3

*

* L3204_RF

C3270_RF

C3204_RF

C4040

C1528

*

C3222_RF C1527

PP3131_RF

*

C3208_RF

C3216_RF

C3221_RF

C3230_RF

C3232_RF

PP3132_RF

*

C1504

FD0503 PP3140_RF PP3139_RF

PP3138_RF

*

C1507

* C1505

TP14

FD0511

C2302C2301C2414 R2300 R2303R2320

C2321 C2320

U2300

C2311

TP17

TP07

C2322C2307R2311R2310

U1500

TP06

PP1503 PP1502

PP3115_RF PP3116_RF

C4502 C4501 R4510 C4510

C4503

C1560

C2011

C2003

PP4500

C1561 R1561

C2002

*

C1520

C1540

C2110

C1501

C3745

C2126

*

L3700

C2071

XW3103_RF

* C3746 PP1521 R1521

L2010

C2001 C1546

C2124

*

C2120

C3741

*

*

C2008

8

7

6

5

4

3

2

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

1

REV

ECN

CK APPD

DESCRIPTION OF REVISION

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

DATE

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

4

0004752417

ENGINEERING RELEASED

2015-08-24

N69 MLB - EVT D

D

LAST_MODIFICATION=Wed Aug 19 11:42:47 2015 PAGE

C

B

A

SCH BRD MCO BOM BOM BOM BOM BOM BOM

<CSA>

CONTENTS

SYNC

DATE

PAGE

<CSA>

CONTENTS

SYNC

1

1

TABLE OF CONTENTS

31

2

3

SYSTEM:BOM TABLES

32

3

4

SYSTEM:N69 SPECIFIC [4]

33

49

BASEBAND:RADIO SYMBOL

4

5

SYSTEM:MECHANICAL

34

50

page1

5

6

SOC:JTAG,USB,XTAL

35

51

CELL:ALIASES

6

7

SOC:PCIE

36

AP INTERFACE & DEBUG CONNECTORS

7

8

SOC:CAMERA & DISPLAY

37

BASEBAND PMU (1 0F 2)

8

9

SOC:SERIAL & GPIO

38

BASEBAND PMU (2 OF 2)

9

10

SOC:OWL

39

BASEBAND (1 OF 2)

10

11

SOC:POWER (1/3)

40

BASEBAND (1 OF 2)

11

12

SOC:POWER (2/3)

41

MOBILE DATA MODEM (2 OF 2)

12

13

SOC:POWER (3/3)

42

RF TRANSCEIVER (1 0F 3)

13

15

NAND

43

RF TRANSCEIVER (2 OF 3)

14

20

SYSTEM POWER:PMU (1/3)

44

RF TRANSCEIVER (3 OF 3)

15

21

SYSTEM POWER:PMU (2/3)

45

QFE DCDC

16

22

SYSTEM POWER:PMU (3/3)

46

2G PA

17

23

SYSTEM POWER:CHARGER

47

VERY LOW BAND PAD

18

24

SYSTEM POWER:BATTERY CONN

48

LOW BAND PAD

19

30

SENSORS:MOTION SENSORS

49

MID BAND PAD

20

31

CAMERA:FOREHEAD FLEX B2B

50

HIGH BAND PAD

21

32

CAMERA:REAR CAMERA B2B

51

ANTENNA SWITCH

22

33

CAMERA:STROBE DRIVER

52

HIGH BAND SWITCH

23

35

AUDIO:CALTRA CODEC (1/2)

53

RX DIVERSITY

24

36

AUDIO:CALTRA CODEC (2/2)

54

RX DIVERSITY (2)

25

37

AUDIO:SPEAKER DRIVER

55

GPS

26

40

DISPLAY:POWER

56

ANTENNA FEEDS

27

41

MESA POWER AND IO FILTERS

57

WIFI/BT: MODULE AND FRONT END

28

42

DISPLAY FLEX

58

STOCKHOLM

29

43

D403 (TOUCH B2B, DRIVER ICS)

59

OMIT_TABLE_RF

30

45

I/O:TRISTAR 2

60

Radio Subdesign Ports

051-00648 820-00282 056-01352 639-00931 639-01012 639-01231 639-01232 639-01271 639-01272

No share Dick itesla.solutions

46

DATE

I/O:DOCK FLEX B2B I/O:BUTTON FLEX B2B

C

B

(N69 BETTER) (N69H BETTER) (N69 BEST) (N69H BEST) (N69 ULTRA) (N69H ULTRA)

TABLE OF CONTENTS

A

DRAWING TITLE

SCH,MLB,N69 DRAWING NUMBER

Apple Inc.

051-00648

REVISION

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

4.0.0

1 OF 49 1 OF 60

SIZE

D

8

7

6

5

4

TABLE_5_HEAD

QTY

DESCRIPTION

1

SCH,MLB,N69

2

1

ALTERNATE BOM OPTIONS

SCHEMATIC & PCB BOM CALLOUTS PART#

3

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION

CRITICAL

?

TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_5_ITEM

051-00648

SCH

TABLE_ALT_ITEM

138S00032

138S0831

ALTERNATE

C0610

TY,2.2UF,0201

138S00049

138S0831

ALTERNATE

C0610

KYOCERA,2.2UF,0201

TABLE_5_ITEM

820-00282

1

PCBF,MLB,N69

PCB

CRITICAL

?

NOT ALL REFERENCE DESIGNATORS LISTED. USED 91 TIMES IN DESIGN.

TABLE_ALT_ITEM

USED 91 TIMES IN DESIGN.

TABLE_5_ITEM

825-6838

1

EEEE CODE FOR 639-00931 16GB

EEEE_GH6K

CRITICAL

EEEE_16G

825-6838

1

EEEE CODE FOR 639-01012 16GB

EEEE_GJYD

CRITICAL

EEEE_16GH

TABLE_ALT_ITEM

155S0660

155S0513

ALTERNATE

FL3100

USED 5 TIMES IN DESIGN.

MURATA,FERR,22-OHM

TABLE_5_ITEM

D

TABLE_ALT_ITEM

138S00005

138S00003

ALTERNATE

C1500

USED 61 TIMES IN DESIGN.

TY,15UF,0402

D

TABLE_5_ITEM

825-6838

1

EEEE_GN7J

EEEE CODE FOR 639-01231 32GB

CRITICAL

EEEE_32G

TABLE_ALT_ITEM

138S00048

138S00003

ALTERNATE

C1500

KYOCERA,15UF,0402

118S0764

118S0717

ALTERNATE

R2250

PANASONIC,3.92K-OHM,0201

USED 61 TIMES IN DESIGN.

TABLE_5_ITEM

825-6838

1

EEEE CODE FOR 639-01232 32GB

EEEE_GN7H

CRITICAL

EEEE_32GH

TABLE_ALT_ITEM

USED 1 TIME IN DESIGN.

TABLE_5_ITEM

825-6838

1

EEEE CODE FOR 639-01271 64GB

CRITICAL

EEEE_GP3V

EEEE_64G

TABLE_ALT_ITEM

138S00006

138S0835

ALTERNATE

C1106

TY,4.3UF,0402

USED 20 TIMES IN DESIGN.

TABLE_5_ITEM

825-6838

1

EEEE CODE FOR 639-01272 64GB

EEEE_GP3W

CRITICAL

EEEE_64GH

TABLE_ALT_ITEM

152S2052

152S1929

ALTERNATE

L2060

CYNTEC,1UH,1608

USED 1 TIME IN DESIGN. TABLE_ALT_ITEM

155S0773

S3E NAND BOM OPTIONS

155S0453

ALTERNATE

FL3101

TY,FERR,120-OHM,01005

377S0168

377S0140

ALTERNATE

DZ3150

TDK,VARISTOR,6.8V,100PF,01005

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

1

U1500

NAND,1YNM,16GX8,S3E,64G,T,SLGA70

CRITICAL

155S00067

BOM OPTION

155S0581

ALTERNATE

FL4200

TDK,FERR,240-OHM,0201

1

U1500

NAND,1YNM,32GX8,S3E,64G,T,SLGA70

CRITICAL

NAND_16G

155S00012

155S00009

ALTERNATE

L3100

MURATA,CHOKE,65-OHM,0605

1

U1500

NAND,1YNM,64GX8,S3E,TLC,128G,H,ULGA70

CRITICAL

USED 10 TIMES IN DESIGN. TABLE_ALT_ITEM

NAND_32G

138S0706

138S0739

ALTERNATE

C5302_RF

USED 4 TIMES IN DESIGN.

MURATA,CAP,CER,1UF,20%,10V,X5R,0201

TABLE_5_ITEM

335S00076

USED 5 TIMES IN DESIGN. TABLE_ALT_ITEM

TABLE_5_ITEM

335S00072

USED 9 TIMES IN DESIGN. TABLE_ALT_ITEM

TABLE_5_ITEM

335S00054

USED 35 TIMES IN DESIGN. TABLE_ALT_ITEM

TABLE_ALT_ITEM

NAND_64G

138S0739

138S0945

ALTERNATE

C5302_RF

USED 4 TIMES IN DESIGN.

KYOCERA,CAP,CER,1UF,20%,10V,X5R,0201 TABLE_ALT_ITEM

155S00095

TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR PART NUMBER

BOM OPTION

REF DES

155S00068

ALTERNATE

FL1280

USED 1 TIME IN DESIGN.

FERR BD,100 OHM,25%,100MA,2 OHM,01005

COMMENTS:

TABLE_ALT_ITEM

138S0652

138S0648

ALTERNATE

C3650

TY,4.7UF,0402

USED 9 TIMES IN DESIGN.

TABLE_ALT_ITEM TABLE_ALT_ITEM

335S00071

335S00054

NAND_16G

U1500

HYNIX 16G SLGA70

132S0400

132S0436

ALTERNATE

C1280

USED 1 TIME IN DESIGN.

CAP,CER,X5R,0.22UF,20%,6.3V,01005

TABLE_ALT_ITEM TABLE_ALT_ITEM

335S00085

335S00072

NAND_32G

U1500

TOSHIBA 16G SLGA70

155S0960

155S0941

ALTERNATE

FL3151

USED 8 TIMES IN DESIGN.

FERR BD,70 OHM,25%,300MA,0.4 DCR,01005 TABLE_ALT_ITEM

138S00024

138S0986

ALTERNATE

C5201_RF

USED 1 TIME IN DESIGN.

CAP,CER,3-TERM,7.5UF,20%,4V,0402 TABLE_ALT_ITEM

335S00066 376S00106

QTY

DESCRIPTION

U0900

USED 1 TIME IN DESIGN.

IC,EEPROM,16KX8,1.8V,I2C,WLCSP4

376S00047

ALTERNATE

Q2300

DIODES INC. ACT DIODE

USED 1 TIME IN DESIGN. TABLE_ALT_ITEM

343S0688

TABLE_5_HEAD

PART#

ALTERNATE

TABLE_ALT_ITEM

CARBON BOM OPTIONS C

335S0946

REFERENCE DESIGNATOR(S)

BOM OPTION

343S0638

ALTERNATE

U4301

C

USED 1 TIME IN DESIGN.

CUMULUS 2ND FLOW TABLE_ALT_ITEM

138S00022

TABLE_5_ITEM

338S00017

1

U3010

IC,CARBON,MPU-6700-12,LGA16

INVENSENSE_CARBON

138S0867

ALTERNATE

C1100

TY,10UF,0402

USED 51 TIMES IN DESIGN. TABLE_ALT_ITEM

138S00020

TABLE_5_ITEM

338S1163

1

U3020

IC,ACCEL,3-AXIS,DIG,BMA282,LGA14

INVENSENSE_CARBON

138S0867

ALTERNATE

C1100

MURATA,10UF,0402

USED 51 TIMES IN DESIGN.

TABLE_5_ITEM

132S0316

1

CAP,CER,X5R,0.1UF,20%,6.3V,01005

C3020

INVENSENSE_CARBON

138S0692

1

CAP,CER,X5R,1UF,20%,6.3V,0201

C3021

INVENSENSE_CARBON

132S0316

1

CAP,CER,X5R,0.1UF,20%,6.3V,01005

C3022

INVENSENSE_CARBON

117S0202

1

RES,MF,20OHM,5%,1/32W,01005

R3020

INVENSENSE_CARBON

117S0202

1

RES,MF,20OHM,5%,1/32W,01005

R3021

INVENSENSE_CARBON

117S0202

1

RES,MF,20OHM,5%,1/32W,01005

R3022

INVENSENSE_CARBON

TABLE_5_ITEM

No share Dick itesla.solutions

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

PMU/SOC BOM OPTIONS

TABLE_5_ITEM

TABLE_5_ITEM TABLE_5_HEAD

338S00087

1

U3010

IC,CARBON,MPU-6800-00,LGA16

INVENSENSE_CARBON_1_1

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

BOM OPTION TABLE_5_ITEM

339S00121

1

POP,MALTA+2GB 25NM DDR,A1,M,DEV

U0600

MALTA

118S00009

1

RES,MF,3.01KOHM,1%,1/32W,01005

R0730

MALTA

131S0307

1

CAP,CER,NPO/COG,100PF,5%,16V,01005

C0730

NOSTUFF

118S00025

1

RES,MF,330OHM,1%,1/32W,01005

R0651

MALTA

132S0316

1

CAP,CER,X5R,0.1UF,20%,6.3V,01005

C0731

NOSTUFF

338S00170

1

IC,PMU,ANTIGUA,D2255A1,OTP-BG

U2000

MALTA

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

COMPASS PART NUMBER

TABLE_5_ITEM

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

BOM OPTION TABLE_5_ITEM

B

338S00084

1

U3000

IC,COMPASS,MAGNESIUM,601A-19,FLGA14

COMMON

B

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

BOM OPTION TABLE_5_ITEM

SHIELD PART NUMBERS

339S00096

1

POP,MAUI+2GB 25NM DDR,C0,H,DEV

U0600

MAUI

118S0631

1

RES,MF,100OHM,1%,1/32W,01005

R0730

MAUI

131S0307

1

CAP,CER,NPO/COG,100PF,5%,16V,01005

C0730

MAUI

117S0161

1

RES,MF,0OHM,1/32W,01005

R0651

MAUI

132S0316

1

CAP,CER,X5R,0.1UF,20%,6.3V,01005

C0731

MAUI

338S00171

1

IC,PMU,ANTIGUA,D2255A1,OTP-YG

U2000

MAUI

TABLE_5_ITEM

TABLE_5_HEAD TABLE_5_ITEM

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

BOM OPTION TABLE_5_ITEM

TABLE_5_ITEM

806-03629

1

SHIELD,EMI,UPPER FRONT,N69

SH0500

COMMON

806-03630

1

SHIELD,EMI,LOWER FRONT,N69

SH0501

COMMON

806-03556

1

SHIELD,EMI,BACK,N69

SH0503

COMMON

TABLE_5_ITEM TABLE_5_ITEM

TABLE_5_ITEM TABLE_5_ITEM

POWER INDUCTOR ALTERNATES

SOC ALTERNATES TABLE_ALT_HEAD TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR PART NUMBER

BOM OPTION

REF DES

COMMENTS:

PART NUMBER

ALTERNATE FOR PART NUMBER

BOM OPTION

REF DES

COMMENTS:

ALTERNATE

U0600

MALTA DEV, H DRAM

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_ITEM TABLE_ALT_ITEM

152S00117

152S00074

?

L2000

TAIYO 2016 1.0UH

152S00121

152S00081

?

L2001

TAIYO 2012 0.47UH

339S00122

339S00121

339S00123

339S00121

TABLE_ALT_ITEM

TABLE_ALT_ITEM

152S00120

152S00077

?

L2070

TAIYO 2016 1.0UH 0.65MM

152S00118

152S00075

?

L3700

TAIYO 2016 1.2UH

152S00123

152S1936

?

L4020

TAIYO 3225 15UH

TABLE_ALT_ITEM TABLE_ALT_HEAD

PART NUMBER TABLE_ALT_ITEM

ALTERNATE FOR PART NUMBER

TABLE_ALT_ITEM

A

339S00097

339S00096

ALTERNATE

U0600

MAUI DEV, M DRAM

339S00098

339S00096

ALTERNATE

U0600

MAUI DEV, S DRAM

TABLE_ALT_ITEM

SYNC_MASTER=N/A PAGE TITLE

SYNC_DATE=N/A

SYSTEM:BOM TABLES DRAWING NUMBER

Apple Inc.

051-00648

REVISION

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

4.0.0

3 OF 49 2 OF 60

SIZE

D

A

8

7

6

5

4

3

TESTPOINTS

2

N69 I2C DEVICE MAP I2C BUS

POWER TP-P6

A

POWER GROUND

TP-P55

ROOM=TEST

30

17

TP01

PP5V0_USB

TP-P6

A

16

18

17

TP-P55

TP-P6

TP03 TP-P6

VBATT

27

26

TP-P55

27

TP05

TP24

TP-P55

TP-P55

A

26

A

TP 24 FOR USB FIXTURE SI

ROOM=TEST

LCM

ROOM=TEST

C

28

TP06 TP-P55

A

PP_LCM_BL_CAT2_CONN

20

14

13

12

9 8 7 6 5 3 29

PP1V8

PP_LCM_BL_ANODE_CONN

TP07

A

P4MM-NSM SM 1

FORCE DFU PROCEDURE:

28

TP23

LCD_TO_AP_PIFA_CONN

30

No share Dick itesla.solutions

1. FROM OFF MODE SHORT TP07 TO PP07 2. PLUG IN E75 CABLE TO FORCE DFU

TP-P55

90_TRISTAR_DP1_CONN_N

PP

TP08

8

90_TRISTAR_DP2_CONN_P

30

TRISTAR USB

8

90_TRISTAR_DP2_CONN_N

8

PP_TRISTAR_ACC1

PP_TRISTAR_ACC2

OUT

BOARD_REV1

8

OUT

BOARD_REV0

0X29

0X52

OWL

UNUSED

N/A

N/A

N/A

8

OUT

TP-P55

R0402 R0403

R0404

BOARD_ID4

01005

8

TRISTAR ACCESSORY ID ACCESSORY POWER

OUT

R0405

BOARD_ID3

01005

NOSTUFF 8

BI

R0406

BOARD_ID2

01005

A

8

OUT

R0407

BOARD_ID1

01005

ROOM=TEST

NOSTUFF

8

TP15 TP-P55

R0401

NOSTUFF

A

A

R0400

NOSTUFF

TP14

TRISTAR_CON_DETECT_L

0101001X

REAR CAM

TBD

TBD

TBD

LED DRIVER

1100011X

0X63

0XC6

FRONT CAM

0110110X

0X36

0X6C

N/A

N/A

0x51

0xA2

UNUSED

N/A

C

SEP EEPROM

1010001X

ROOM=SOC

1 MF

5%

ROOM=SOC

1 MF

5%

ROOM=SOC

1 MF

5%

ROOM=SOC

1 MF

5%

2 1.00K 1/32W

PP1V8

3 5 6 7 8 9 12 29

13

14

20

21

28

2 1.00K 1/32W 2 1.00K 1/32W

B

2 1.00K 1/32W

BOARD_REV[3:0] FLOAT=LOW, PULLUP=HIGH

ROOM=TEST

30

ALS

01005

A

TP13 TP-P55

31

I2C2

01005

TRISTAR DEBUG UART

ROOM=TEST

30

0X34

01005

TP12 TP-P55

31

0X1A

NOSTUFF

A

ROOM=TEST

30

BOARD_REV2

TP11 TP-P55

31

0011010X

NOSTUFF

A

ROOM=TEST

30

OUT

TP10 TP-P55

31

TRISTAR

01005

A

ROOM=TEST

31

OUT

BOARD_REV3

TP09 TP-P55

B

0X80

BOOTSTRAPPING:BOARD REV BOARD ID BOOT CONFIG

P4MM-NSM SM 1

TP-P55

30

0X40

ROOM=TEST

PP

ROOM=TEST

31

1000000X

SEP I2C

A

E75 31

SPEAKER AMP

A

ROOM=TEST

90_TRISTAR_DP1_CONN_P

0XEA

TOUCH I2C

PP08

DFU_STATUS

0X75

A

ROOM=TEST

8

1110101X

ROOM=TEST

PP07

21

TIGRIS

D

TP22 TP-P55

ROOM=TEST

28

0XC4

ISP I2C1

ROOM=TEST

DFU TP-P55

0X62

A

TP21

SOC & BB RESET 28

FORCE_DFU

1100010X

TP20

PP_LCM_BL_CAT1_CONN

TP-P55

ROOM=TEST

8

BACKLIGHT

ISP I2C0

ROOM=TEST

RESET PMU_TO_SYSTEM_COLD_RESET_L

0X4E

A

TP-P55

9 5

0X27

TP19

PP11V3_MESA

TP-P55

28

16

0100111X

ROOM=TEST

ROOM=TEST

ROOM=TEST

CHESTNUT

8-BIT HEX

A

TP18

MESA_TO_BOOST_EN

A

A

0XE8

MOJAVE

A

ROOM=TEST

0X74

ROOM=TEST

TP02

PP_BATT_VCC

1110100X

I2C1

7-BIT HEX

TP17

PMU_AMUX_BY

ROOM=TEST

33

ANTIGUA PMU

A

ROOM=TEST

VBUS

BINARY

TP16

PMU_AMUX_AY

16

DEVICE

I2C0

AMUX

TP00

D 31

1

OUT

R0408

BOARD_ID0

01005

ROOM=SOC

1 MF

5%

ROOM=SOC

1 MF

5%

ROOM=SOC

1 MF

5%

ROOM=SOC

1 MF

5%

ROOM=SOC

1 MF

5%

2 1.00K 1/32W

1111 1110 1101 1100 XXXX XXXX

SELECTED -->

2 1.00K 1/32W 2 1.00K 1/32W

BOARD_ID[4:0] FLOAT=LOW, PULLUP=HIGH SELECTED -->

00010 00011

FLOAT=LOW, PULLUP=HIGH 000 001 010 011 100 101 110 111

SELECTED -->

A

ROOM=TEST

NOSTUFF

8

OUT

BOOT_CONFIG2

01005

A 8

8

OUT

OUT

R0409

BOOT_CONFIG1

R0410 01005

BOOT_CONFIG0

R0411 01005

ROOM=SOC

1 MF

5%

ROOM=SOC

1 MF

5%

ROOM=SOC

1 MF

5%

N69 MLB N69 DEV

BOOT_CONFIG[2:0]

2 1.00K 1/32W 2 1.00K 1/32W

PROTO0 MLB PROTO1 PROTO2 EVT CARRIER DVT

SPI0 SPI0 TEST MODE NVME0 x2 MODE NVME0 x2 TEST MODE NVME0 x1 MODE NVME0 x1 TEST MODE SLOW SPI0 TEST MODE FAST SPI0 TEST MODE

2 1.00K 1/32W 2 1.00K 1/32W

SYNC_MASTER=N/A PAGE TITLE

SYNC_DATE=N/A

SYSTEM:N69 SPECIFIC [4] DRAWING NUMBER

2 1.00K 1/32W

Apple Inc.

051-00648

REVISION

R

RESISTOR

STUFF = HIGH '1'

RESISTOR NOSTUFF = LOW

'0'

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

4.0.0

4 OF 49 3 OF 60

SIZE

D

A

8

7

6

5

AND AC COUPLING CAPS FOR COMPASS RETURN CURRENTS

FID

EAST_STANDOFF_AC_GND_SCREW

1

100PF

C0511

1

56PF

5%

2 CERM 01005

2

BS0501

NP0-C0G 01005

WEST_STANDOFF_AC_GND_SCREW

1

100PF

C0521

1

56PF

5%

1

3.3PF

5%

16V 2 NP0-C0G 01005

C0522

56PF

2 16V CERM 01005

2

ROOM=ASSEMBLY

FD0503 FID

0P5SM1P0SQ-NSP 1

ROOM=ASSEMBLY

SH0501

FD0505

SM

FID

0P5SM1P0SQ-NSP 1

SHLD-EMI-LOWER-FRONT-N69 OMIT_TABLE

1

ROOM=ASSEMBLY

FD0510

BS0502

FID

STDOFF-2.7OD1.4ID-1.04H-SM-1

5%

+/-0.1PF

2 16V NP0-C0G 01005

C0523

FID

0P5SM1P0SQ-NSP 1

LOWER FRONT SHIELD

16V

TOP-SIDE, WEST

C0520

FD0502

SH0500

SHLD-EMI-UPPER-FRONT-N69 OMIT_TABLE

1

1

ROOM=ASSEMBLY SM

STDOFF-2.7OD1.4ID-1.04H-SM-1

D

0P5SM1P0SQ-NSP 1

UPPER FRONT SHIELD

1

5%

16V

2 NP0-C0G 01005

C0513 56PF

+/-0.1PF

16V

2 NP0-C0G 01005

1

3.3PF

5%

16V

C0512

1

FIDUCIALS

1

C0510

2

FD0501

TOP-SIDE, EAST

1

3

SHIELDS

BOARD STANDOFFS

D

4

0P5SQ-SMP3SQ-NSP 1

ROOM=ASSEMBLY

PLATED SHIELD SLOT

16V

NP0-C0G 01005

FD0511

SL0501 TH-NSP

FID

1

0P5SQ-SMP3SQ-NSP 1

SL-1.20X0.40-1.50X0.70-NSP

ROOM=ASSEMBLY

FD0512 FID

C

C

0P5SQ-SMP3SQ-NSP 1

ROOM=ASSEMBLY

FD0514

TOP-SIDE, GROUND SPRING

FID

0P5SQ-SMP3SQ-NSP 1

SP0502

No share Dick itesla.solutions

SPRING-SUPER-COWLING-GROUND-X145

ROOM=ASSEMBLY

1

CLIP-SM

FD0515 FID

0P5SQ-SMP3SQ-NSP 1

ROOM=ASSEMBLY

FD0504 FID

0P5SM1P0SQ-NSP 1

ROOM=ASSEMBLY

NORTH WIFI UNDERFILL BLOCKING

FD0516 FID

CKPLUS_WAIVE=TERMSHORTED

R0500 01005

R0501 01005

1

MF

2

0%

1

MF

0%

0.00

1/32W 2

CKPLUS_WAIVE=TERMSHORTED

0P5SQ-SMP3SQ-NSP 1

ROOM=ASSEMBLY

0.00

1/32W

B

B

COMPASS AC GROUNDING CAPS COMPASS_AC_GND_SCREW

1

C0540 0.01UF 10% 25V

1

C0541 100PF 2%

50V

2 X5R-CERM 2 C0G 0201 0201 ROOM=ASSEMBLY ROOM=ASSEMBLY

1

C0542 56PF 2%

1

PP0501

P4MM-NSM 1

SM PP

C0543 3.3PF

+/-0.1PF 25V 2 NP0-C0G-CERM 2 C0G-CERM 0201 0201 ROOM=ASSEMBLY ROOM=ASSEMBLY 50V

A

SYNC_MASTER=N/A PAGE TITLE

SYNC_DATE=N/A

SYSTEM:MECHANICAL DRAWING NUMBER

Apple Inc.

051-00648

REVISION

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

4.0.0

5 OF 49 4 OF 60

SIZE

D

A

8

7

6

5

4

3

2

1

SOC - USB, JTAG, XTAL D

D

VDD12_PLL_LPDP:1.14-1.26V @2mA MAX VDD12_PLL_SOC: 1.14-1.26V @12mA MAX VDD12_PLL_CPU: 1.14-1.26V @2mA MAX VDD18_USB: 1.71-1.89V @20mA MAX VDD18_XTAL:1.62-1.98V @2mA MAX

R0600 15

7 6

PP1V2

1

0.00

2

0% 1/32W MF 01005

PP1V2_PLL

PP1V8

C0600 0.1UF

ROOM=SOC

20% 2 6.3V X5R-CERM 01005 ROOM=SOC

C0601

C0602

0.1UF

C0603

0.01UF

ROOM=SOC

PP1V8_XTAL

1 1

C0611

1

SM

PP

VDD33_USB

AL34

C0620

2 ROOM=SOC

15

VDD33_USB:3.14-3.46V @5mA MAX

0.1UF

20% 6.3V 2 X5R-CERM 01005

VDD18_XTAL

AN20

AL21 VDD18_USB

AF13

W19

T19

U20

F22

C15

1

VDD12_PLL_CPU

PP0620 P2MM-NSM

VDD12_PLL_SOC

C

VDD12_PLL_LPDP

ROOM=PMU

VDD12_UH2_HSIC1

AP21 VDD12_UH1_HSIC0

20% 6.3V X5R 0201

29

0201

C0610

PP3V3_USB

2

28

ROOM=SOC

ROOM=SOC

0.22UF

21

20% 2 6.3V X5R-CERM 0201

20% 2 6.3V X5R-CERM 01005

C0604

20

2.2UF

0.1UF

1

14

FL0610

ROOM=SOC

ROOM=SOC

13

1KOHM-25%-0.2A

20% 2 6.3V X5R-CERM 01005

10% 6.3V 2 X5R 01005

ROOM=SOC

C0612 0.1UF

0.01UF

10% 2 6.3V X5R 01005

20% 2 6.3V X5R-CERM 01005

1

3 6 7 8 9 12

ROOM=SOC

C

OMIT_TABLE

CRITICAL

ROOM=SOC

U0600 MAUI-2GB-25NM-DDR-H

33

BI

33

BI

AN22

50_AP_BI_BB_HSIC0_DATA 50_AP_BI_BB_HSIC0_STB

No share Dick itesla.solutions NC AN21

PP0621 P2MM-NSM SM

PP

NC

1

UH2_HSIC1_DATA

D15

UH2_HSIC1_STB

AC32

30 30

16

30

26

9 3

16

9

IN

SWD_DOCK_BI_AP_SWDIO SWD_DOCK_TO_AP_SWCLK

IN

PMU_TO_SYSTEM_COLD_RESET_L

IN

PMU_TO_OWL_ACTIVE_READY

BI

ROOM=SOC

PP0610

16

P3MM-NSM SM 1

OUT

NC AB31 NC AA32 NC

ANALOGMUX_OUT

AP_TO_PMU_AMUX_OUT

AP24

16

OUT

L0602

15NH-250MA

SYM 1 OF 14 ROOM=SOC

1

AT20

USB_D_N

AT19

90_USB_AP_DATA_AP_P 90_USB_AP_DATA_AP_N

L0601

15NH-250MA 1

JTAG_TCK

AC31

COLD_RESET*

USB_VBUS USB_ID

USB_REXT

CFSB

AP19

USB_VBUS_DETECT

IN

13

OUT

AN23

AP_TO_NAND_RESET_L

AF6

TESTMODE

AL22

FUSE1_FSRC

AG25

FUSE2_FSRC

30

AR19

NC

AP18

USB_REXT

R0640 200

1% 1/32W MF 2 01005

S3E_RESET*

HOLD_RESET

BI

17

TST_CLKOUT

H32

30

ROOM=TRISTAR

PP

B

BI

2 0201

JTAG_TDI

90_USB_AP_DATA_P 90_USB_AP_DATA_N

ROOM=TRISTAR

JTAG_TDO

AA31

2 0201

USB_D_P

JTAG_TRST*

JTAG_TMS

AR23

FCMSP SC58980X0B-A040

JTAG_SEL

AB32

H33

AP_TO_PMU_TEST_CLKOUT

UH1_HSIC0_STB

C16

Y32

ROOM=SOC

UH1_HSIC0_DATA

B

ROOM=SOC

WDOG

Y33

XI0 AK35 XO0 AL35

AP_TO_PMU_WDOG_RESET 45_XTAL_AP_24M_IN 45_XTAL_AP_24M_OUT

OUT

16

R0650

CRITICAL

511K 1% 1/32W MF 01005

ROOM=SOC

ROOM=SOC

R0651 1

0.00 0% 1/32W MF 01005

ROOM=SOC

OMIT_TABLE

2

Y0600

1.60X1.20MM-SM

24.000MHZ-30PPM-9.5PF-60OHM 1 3 45_SOC_24M_O 1

C0650

2

4

12PF

C0651 12PF

5% 2 16V CERM 01005

5% 16V 2 CERM 01005

XW0650

SHORT-10L-0.1MM-SM 1 2

ROOM=SOC

ROOM=SOC

45_AP_XTAL_GND

ROOM=SOC

A

SYNC_MASTER=N/A PAGE TITLE

SYNC_DATE=N/A

SOC:JTAG,USB,XTAL DRAWING NUMBER

Apple Inc.

051-00648

REVISION

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

4.0.0

6 OF 49 5 OF 60

SIZE

D

A

8

7

6

5

4

3

2

1

SOC - PCIE INTERFACES VDD12_PCIE_REFBUF:1.08-1.26V @50mA MAX VDD12_PCIE_TXPLL: 1.08-1.32V @10mA MAX VDD12_PCIE: 1.14-1.26V @115mA MAX

PP_FIXED

ROOM=SOC

ROOM=SOC

OMIT_TABLE

13 13

IN IN

C0701

90_PCIE_NAND_TO_AP_RXD0_P 90_PCIE_NAND_TO_AP_RXD0_N

ROOM=SOC

C0702

C

PCIE LINK 0

ROOM=SOC

13

OUT

13

OUT

C0703

90_PCIE_AP_TO_NAND_TXD0_P 90_PCIE_AP_TO_NAND_TXD0_N

ROOM=SOC

C0704 ROOM=SOC

13

IN

13

IN

C0705

90_PCIE_NAND_TO_AP_RXD1_P 90_PCIE_NAND_TO_AP_RXD1_N

ROOM=SOC

C0706 ROOM=SOC

13

OUT

13

OUT

C0707

90_PCIE_AP_TO_NAND_TXD1_P 90_PCIE_AP_TO_NAND_TXD1_N

ROOM=SOC

C0708 ROOM=SOC

PCIE LINK 1

33 33

IN IN

C0709

90_PCIE_WLAN_TO_AP_RXD_P 90_PCIE_WLAN_TO_AP_RXD_N

ROOM=SOC

C0710 ROOM=SOC

33 33

OUT OUT

C0711

90_PCIE_AP_TO_WLAN_TXD_P 90_PCIE_AP_TO_WLAN_TXD_N

ROOM=SOC

C0712 ROOM=SOC

PCIE_EXT_C 1 20% 6.3V

1 20% 6.3V

1 20% 6.3V

1 20% 6.3V

2

0.1UF

X5R-CERM 01005

2

0.1UF

AP29

0.1UF

X5R-CERM 01005

2

0.1UF

ROOM=SOC

1

90_PCIE_NAND_TO_AP_RXD0_C_P 90_PCIE_NAND_TO_AP_RXD0_C_N

PCIE_RX0_P

AN30

PCIE_RX0_N

CRITICAL

U0600

PCIE_REF_CLK0_P PCIE_REF_CLK0_N

MAUI-2GB-25NM-DDR-H

90_PCIE_AP_TO_NAND_TXD0_C_P 90_PCIE_AP_TO_NAND_TXD0_C_N

FCMSP

PCIE_REF_CLK1_P

SC58980X0B-A040

PCIE_REF_CLK1_N

SYM 2 OF 14

AT32

PCIE_TX0_P

AR32

PCIE_TX0_N

X5R-CERM 01005

1 20% 6.3V

1 20% 6.3V

1 20% 6.3V

1 20% 6.3V

1 20% 6.3V

1 20% 6.3V

1 20% 6.3V

2

0.1UF

X5R-CERM 01005

2

0.1UF

2

0.1UF

2

0.1UF

1

1.0UF

C0750 2.2UF

20% 2 6.3V X5R 0201-1

2

ROOM=SOC

20% 6.3V X5R-CERM 0201

ROOM=SOC

ROOM=SOC

90_PCIE_NAND_TO_AP_RXD1_C_P 90_PCIE_NAND_TO_AP_RXD1_C_N

AM28

PCIE_RX1_P

AN28

PCIE_RX1_N

No share Dick itesla.solutions

90_PCIE_AP_TO_NAND_TXD1_C_P 90_PCIE_AP_TO_NAND_TXD1_C_N

AT31

PCIE_TX1_P

AR31

PCIE_TX1_N

AN35 AP35

90_PCIE_AP_TO_NAND_REFCLK_P 90_PCIE_AP_TO_NAND_REFCLK_N

OUT

13

OUT

13

AN34 AP34

90_PCIE_AP_TO_WLAN_REFCLK_P 90_PCIE_AP_TO_WLAN_REFCLK_N

OUT

33

OUT

33

P2MM-NSM SM 1 PP

PCIE_REF_CLK2_N PCIE_REF_CLK3_P

AM31

PCIE_REF_CLK2_P

PP0700

P2MM-NSM SM 1 PP

AM32 NC AN32

PP0701

NC

PP1V8

NC AN31 NC

R0720

R0721

5% 1/32W MF 01005

5% 1/32W MF 01005

100K

ROOM=SOC

X5R-CERM 01005

X5R-CERM 01005

C0751

OMIT_TABLE AM30

PCIE_REF_CLK3_N 20% 6.3V

1

D

14

PCIE_EXT_C

X5R-CERM 01005

2

20% 2 6.3V X5R-CERM 01005

AJ27

ROOM=SOC

20% 2 6.3V X5R-CERM 01005

VDD12_PCIE

ROOM=SOC

0.1UF

AK27

ROOM=SOC

20% 2 6.3V X5R-CERM 01005

C0752 0.1UF

AJ24

20% 6.3V 2 X5R-CERM 01005

1

C0731 AL29

0.1UF

1

7 11

VDD085_PCIE

0.1UF

C0743

AJ29

1

AL23

20% 2 6.3V X5R-CERM 01005

C0744

AJ25

ROOM=SOC

1

0.1UF

AH28

20% 2 6.3V X5R 0201-1

C0742

AJ26

ROOM=SOC

1.0UF

1

VDD12_PCIE_REFBUF

2

20% 6.3V X5R-CERM 0201

C0741

AL26

2.2UF

1

VDD12_PCIE_TXPLL

C0740

AL27

1

AL24

7 5

VDD085_PCIE:0.802-TBDV @TBDmA MAX

PP1V2_PCIE_TXPLL

2

AK25

15

1

PP1V2

AK28

D

XW0740

SHORT-10L-0.1MM-SM

PCIE_CLKREQ0*

AT11

PCIE_CLKREQ1*

AP12

PCIE_CLKREQ2*

AR12

PCIE_CLKREQ3*

AT12

3 5 7 8 9 12

13

14

20

21

28

29

C

100K

ROOM=SOC

PCIE_NAND_TO_AP_CLKREQ_L PCIE_WLAN_TO_AP_CLKREQ_L

BI

13

BI

33

NC NC

X5R-CERM 01005

2

0.1UF

X5R-CERM 01005

2

0.1UF

90_PCIE_WLAN_TO_AP_RXD_C_P 90_PCIE_WLAN_TO_AP_RXD_C_N

AM27

PCIE_PERST0* AR10 PCIE_PERST1* AT10

PCIE_RX2_P

PCIE_PERST2* AP11NC PCIE_PERST3* AR11NC

AN27

PCIE_RX2_N

AT28

PCIE_TX2_P

PCIE_EXT_REF_CLK_P

AR28

PCIE_TX2_N

PCIE_EXT_REF_CLK_N

X5R-CERM 01005

2

0.1UF

X5R-CERM 01005

2

0.1UF

90_PCIE_AP_TO_WLAN_TXD_C_P 90_PCIE_AP_TO_WLAN_TXD_C_N

PCIE_AP_TO_NAND_RESET_L PCIE_AP_TO_WLAN_RESET_L

AR33 AT33

R0700

R0701

5% 1/32W MF 01005

5% 1/32W MF 01005

100K

X5R-CERM 01005

ROOM=SOC

B

AM26

NC AN26 NC

PCIE_RX3_P

PCIE_RX_TX_BYPASS_CLK_P

PCIE_RX3_N

PCIE_RX_TX_BYPASS_CLK_N

AT26

PCIE_TX3_P

NC AR26 NC

AM25

13

OUT

33

100K

ROOM=SOC

B

AT29 AR29

PCIE_TX3_N

PCIE_RX4_P

NC AN25 NC

PCIE_RX4_N

AR24

PCIE_TX4_P

PCIE_RCAL_P

PCIE_TX4_N

PCIE_RCAL_N

NC AT24 NC

OUT

AT30 AR30

R0730

1

1% 1/32W MF 01005

2

3.01K

ROOM=SOC

45_PCIE_RCAL_N

OMIT_TABLE

A

C0730 100PF 5% 16V NP0-C0G 01005

ROOM=SOC

OMIT_TABLE

SYNC_MASTER=N/A

SYNC_DATE=N/A

PAGE TITLE

SOC:PCIE DRAWING NUMBER

Apple Inc.

051-00648

REVISION

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

4.0.0

7 OF 49 6 OF 60

SIZE

D

A

8

7

6

5

4

3

2

1

SOC - CAMERA & DISPLAY INTERFACES D

D

1.62-1.98V @23mA MAX

C0802

20% 2 6.3V X5R-CERM 01005

E14

ROOM=SOC

ROOM=SOC

1

13

14

20

21

28

C0815 0.1UF

20% 2 6.3V X5R-CERM 01005

NOTE:VDD12_LPDP SHOULD BE POWERED EVEN WHEN LPDP IS NOT USED

VDD18_MIPI

ROOM=SOC

15

PP1V8

3 5 6 7 8 9 12 29

OMIT_TABLE

SC58980X0B-A040

C

21

IN

21

IN

21

IN

21

IN

21 21

21 21

IN IN

IN IN

21

IN

21

IN

90_MIPI_RCAM_TO_AP_DATA0_CONN_P 90_MIPI_RCAM_TO_AP_DATA0_CONN_N

A8

MIPI0C_DATA0_N

90_MIPI_RCAM_TO_AP_DATA1_CONN_P 90_MIPI_RCAM_TO_AP_DATA1_CONN_N

A9

MIPI0C_DATA1_P

B9

MIPI0C_DATA1_N

90_MIPI_RCAM_TO_AP_DATA2_CONN_P 90_MIPI_RCAM_TO_AP_DATA2_CONN_N 90_MIPI_RCAM_TO_AP_DATA3_CONN_P 90_MIPI_RCAM_TO_AP_DATA3_CONN_N 90_MIPI_RCAM_TO_AP_CLK_CONN_P 90_MIPI_RCAM_TO_AP_CLK_CONN_N 45_RCAM_REXT

28

OUT

28

OUT

28

OUT

28

OUT

90_MIPI_AP_TO_LCM_DATA0_P 90_MIPI_AP_TO_LCM_DATA0_N 90_MIPI_AP_TO_LCM_DATA1_P 90_MIPI_AP_TO_LCM_DATA1_N NC NC NC NC

B 28 28

OUT OUT

90_MIPI_AP_TO_LCM_CLK_P 90_MIPI_AP_TO_LCM_CLK_N 45_LCM_REXT

R0801 4.02K 1% 1/32W MF 01005

ROOM=SOC

A13 B13

MIPI0C_DATA0_P

SYM 3 OF 14 ROOM=SOC

CRITICAL

MIPI0C_DATA2_P

B14

MIPI0C_DATA3_P

A14

MIPI0C_DATA3_N

A12

MIPI0C_CLK_P

B12

MIPI0C_CLK_N

D12

MIPI0C_REXT

A3

MIPID_DATA0_P

B3

MIPID_DATA0_N

B4

MIPID_DATA1_P

A4

MIPID_DATA1_N

B6

MIPID_DATA2_P

A6

MIPID_DATA2_N

A7

MIPID_DATA3_P

B7

MIPID_DATA3_N

A5

MIPID_CLK_P

B5

MIPID_CLK_N

D9

MIPID_REXT

R0806

R0807

5% 1/32W MF 01005

5% 1/32W MF 01005

5% 1/32W MF 01005

5% 1/32W MF 01005

ROOM=SOC

1.00K

1.00K

ROOM=SOC

20

21

28

1.00K

ROOM=SOC

ROOM=SOC

ISP_I2C0_SCL G31 ISP_I2C0_SDA G32

I2C_ISP_TO_RCAM_SCL I2C_ISP_BI_RCAM_SDA

OUT

ISP_I2C1_SCL F35 ISP_I2C1_SDA G34

I2C_ISP_TO_FCAM_SCL I2C_ISP_BI_FCAM_SDA

OUT

No share Dick itesla.solutions

MIPI0C_DATA2_N

R0805

1.00K

FCMSP

B8

R0804

14

SENSOR0_CLK

D33

SENSOR0_RST

D32

SENSOR1_CLK

F33

SENSOR1_RST

E34

SENSOR0_ISTRB

D34

SENSOR0_XSHUTDOWN SENSOR1_ISTRB SENSOR1_XSHUTDOWN

F32 C35 C34

MIPICSI_MUXSEL

G35

MIPI1C_REXT

D14

MIPI1C_DATA0_P B17 MIPI1C_DATA0_N A17

BI

BI

21 21

22

45_AP_TO_FCAM_CLK_R AP_TO_FCAM_SHUTDOWN_L

33.2

OUT

21

1% MF

R0809

01005

22

U0600 MAUI-2GB-25NM-DDR-H

20

OUT

1% MF

01005

OUT

1/32W

45_AP_TO_FCAM_CLK

OUT

21

ROOM=SOC

FCMSP

LPDP_AUX_N

SC58980X0B-A040

NC B33 NC

A33

LPDP_TX0_P

A32

NC B32 NC

LPDP_TX1_P

NC B31 NC

A31

LPDP_TX2_P

A30

LPDP_TX3_P

NC B30 NC OUT

33

OUT

26

NC

NC

AP_TO_MUON_BL_STROBE_EN

LPDP_AUX_P

20

NC

AP_TO_STOCKHOLM_DWLD_REQUEST

NC B29 NC

A29

20

ROOM=SOC

33.2

20

45_AP_TO_RCAM_CLK

1/32W

NC NC

NC

NC

45_FCAM_REXT 90_MIPI_FCAM_TO_AP_DATA0_P 90_MIPI_FCAM_TO_AP_DATA0_N

IN

20

IN

20

C

OMIT_TABLE

R0808 45_AP_TO_RCAM_CLK_R AP_TO_RCAM_SHUTDOWN_L

PP1V2

VDD12_LPDP

U0600 MAUI-2GB-25NM-DDR-H

13

6 5

E23

E11

20% 2 6.3V X5R-CERM 01005

E7

0.1UF

3 5 6 7 8 9 12 29

F24

1

0.1UF

VDD085_MIPI

ROOM=SOC

C0801 D8

20% 2 6.3V X5R-CERM 01005

1

D10

0.1UF

D13

C0814

E8

1

PP1V8

E27

PP_FIXED

E13

6

E10

11

E25

0.756-0.893V @11mA MAX

14

SYM 4 OF 14 ROOM=SOC

LPDP_TX0_N

CRITICAL

LPDP_TX1_N

LPDP_TX2_N

LPDP_TX3_N

D24

LPDP_CAL_DRV_OUT

D25

LPDP_CAL_VSS_EXT

AL4

EDP_HPD

H35

DP_WAKEUP

B

MIPI1C_DATA1_P B19 NC MIPI1C_DATA1_N A19 NC MIPI1C_CLK_P A18 MIPI1C_CLK_N B18

90_MIPI_FCAM_TO_AP_CLK_P 90_MIPI_FCAM_TO_AP_CLK_N

IN

20

IN

20

R0803

R0802

4.02K

4.02K

1% 1/32W MF 01005

1% 1/32W MF 01005

ROOM=SOC

ROOM=SOC

A

SYNC_MASTER=N/A PAGE TITLE

SYNC_DATE=N/A

SOC:CAMERA & DISPLAY DRAWING NUMBER

Apple Inc.

051-00648

REVISION

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

4.0.0

8 OF 49 7 OF 60

SIZE

D

A

8

7

6

5

4

3

2

1

SOC - GPIO & SERIAL INTERFACES PP1V8

R0900

R0901

2.2K

D

2.2K

5% 1/32W MF 01005 2 ROOM=SOC

5% 1/32W MF 01005

ROOM=SOC

R0902

R0903

2.2K

R0904

2.2K

5% 1/32W MF 01005

ROOM=SOC

14

20

21

28

D

1.33K

1% 1/32W MF 01005

ROOM=SOC

13

R0905

1.33K

5% 1/32W MF 01005

3 5 6 7 8 9 12 29

1% 1/32W MF 01005

ROOM=SOC

ROOM=SOC

R0920 24

32

16

IN

32

16

IN

25

25 33

OUT

22

OUT

29

OUT

28

OUT

16

IN

3

C

3 33 33

29

28

33

IN IN

33

OUT

33

IN

3

IN

3

IN

3

OUT IN

3

IN

16

IN

33

OUT

13

OUT

29

IN

3

IN

3

IN

3

IN

3

16

OUT

IN

33

OUT

33

IN

8

IN

33

OUT

21

OUT

OMIT_TABLE GPIO_0

D2

GPIO_1

D1

GPIO_2

F1

GPIO_3

E2

GPIO_4

F3

GPIO_5

F2

GPIO_6

H3

GPIO_7

G3

GPIO_8

25

45_I2S_AP_TO_CODEC_MCLK

OUT

45_I2S_AP_TO_SPEAKERAMP_MCLK

NC

SYM 5 OF 14 ROOM=SOC

CRITICAL

TMR32_PWM0

AE1

TMR32_PWM1

AF2

TMR32_PWM2

AF3

UART0_RXD

AE3

UART0_TXD

AE4

UART1_CTS*

K31

UART1_RTS*

K32

UART1_RXD

L33

UART1_TXD

L32

AP_TO_VIBE_TRIG

OUT

N1

GPIO_18

UART2_RTS*

AR20

AH2

GPIO_19

UART2_RXD

AP23

AH3

GPIO_20

UART2_TXD

AP22

AH4

GPIO_21

AJ1

GPIO_22

UART3_CTS*

N4

AJ2

GPIO_23

UART3_RTS*

P3

AJ3

GPIO_24

UART3_RXD

R3

AJ4

GPIO_25

UART3_TXD

R2

AK1

GPIO_26

AP3

GPIO_27

UART4_CTS*

J33

AN4

GPIO_28

UART4_RTS*

J34

GPIO_29

UART4_RXD

J35

AP5

GPIO_30

UART4_TXD

K33

AR2

GPIO_31 UART5_RTXD

32

NC

AT23

GPIO_34

9

OUT IN OUT

33

UART2_CTS*

AP6

9

24

NC

GPIO_17

GPIO_33

24

OUT

SC58980X0B-A040

L3

AR4

9

R0922

UART_AP_DEBUG_RXD UART_AP_DEBUG_TXD

T32

UART_BT_TO_AP_CTS_L UART_AP_TO_BT_RTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_TXD

IN

30

OUT

30

IN

33

OUT

33

IN

33

OUT

33

1

33.2

OUT

33

OUT

33

IN

33

OUT

2

1% 1/32W MF 01005 ROOM=SOC

25

24

OUT

25

24

OUT

25

24

IN

25

24

OUT

20

IN

33

UART_STOCKHOLM_TO_AP_CTS_L UART_AP_TO_STOCKHOLM_RTS_L UART_STOCKHOLM_TO_AP_RXD UART_AP_TO_STOCKHOLM_TXD

IN

33

OUT

33

IN

33

OUT

33

No share Dick UART_WLAN_TO_AP_CTS_L itesla.solutions UART_AP_TO_WLAN_RTS_L UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_TXD

IN

33

OUT

33

IN

33

OUT

33

IN

33

OUT

33

IN

33

OUT

33

SWI_AP_BI_TIGRIS

BI

IN

33

30

UART_BB_TO_AP_CTS_L UART_AP_TO_BB_RTS_L UART_BB_TO_AP_RXD UART_AP_TO_BB_TXD

OUT

33

IN

24

OUT

24

OUT

24

IN

24

OUT

3 3

IN

3

IN

8

IN

AT4

8

GPIO_36

OUT

24

8

OUT

UART6_RXD

AP7

GPIO_38

UART6_TXD

AE2

AT5

GPIO_39

AP8

GPIO_40

UART7_RXD

J31

AP9

GPIO_41

UART7_TXD

AP10

GPIO_42

IN

30

OUT

30

24

ROOM=SOC

R0960

NC J32 NC

29

OUT

SPI_AP_TO_TOUCH_SCLK

1 01005

0.00 0%

2 1/32W

MF

ROOM=SOC

B

R0930 27

OUT

TRISTAR_TO_AP_INT 45_I2S_AP_TO_CODEC_MSP_BCLK I2S_AP_TO_CODEC_MSP_LRCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUT

BOARD_ID2 BOARD_ID1 BOARD_ID0

I2S0_DIN I2S0_DOUT

M4

I2S1_MCK

M3

I2S1_BCLK

P1

I2S1_LRCK

N3

I2S1_DIN

L4

I2S1_DOUT

OMIT_TABLE

U0600 FCMSP

SC58980X0B-A040 SYM 6 OF 14

MAUI-2GB-25NM-DDR-H ROOM=SOC

CRITICAL

I2C0_SCL E31 I2C0_SDA D35

I2C0_AP_SCL I2C0_AP_SDA

OUT

I2C1_SCL AH1 I2C1_SDA AG4

I2C1_AP_SCL I2C1_AP_SDA

OUT

I2C2_SCL L31 I2C2_SDA M32

I2C2_AP_SCL I2C2_AP_SDA

OUT

PP1V8

R0906 2.2K

I2S2_MCK

V33

I2S2_BCLK

U33

I2S2_LRCK

T33

I2S2_DIN

V34

I2S2_DOUT

AM3

I2S3_MCK

AM4

I2S3_BCLK

AN2

I2S3_LRCK

AP1

I2S3_DIN

SEP_SPI0_SCLK

R32

I2S4_MCK

R31

I2S4_BCLK

V32

I2S4_LRCK

P31

I2S4_DIN

P32

I2S4_DOUT

5% 1/32W MF 01005

W3

NC SEP_SPI0_MISO AA4 NC SEP_SPI0_MOSI U2 NC

I2S3_DOUT

AD4

SPI0_MISO

AC3

SPI0_MOSI

AB2

SPI0_SCLK

AD3

SPI0_SSIN

P33

SPI1_MISO

V35

SPI1_MOSI

N32

SPI1_SCLK

M31

SPI1_SSIN

SPI_TOUCH_TO_AP_MISO SPI_AP_TO_TOUCH_MOSI SPI_AP_TO_TOUCH_SCLK_R SPI_AP_TO_TOUCH_CS_L

E33

SPI2_MISO

E35

SPI2_MOSI

F34

SPI2_SCLK

F31

SPI2_SSIN

SPI_MESA_TO_AP_MISO SPI_AP_TO_MESA_MOSI SPI_AP_TO_MESA_SCLK_R MESA_TO_AP_INT

AA2

SPI3_MISO

Y2

SPI3_MOSI

AA3

SPI3_SCLK

AC4

SPI3_SSIN

NC

24

GPIO_37

I2S0_LRCK

N35

AN1

9 17

GPIO_35

UART_ACCESSORY_TO_AP_RXD UART_AP_TO_ACCESSORY_TXD

I2S0_BCLK

N34

U32

ALS_TO_AP_INT_L 45_I2S_AP_TO_BB_BCLK I2S_AP_TO_BB_LRCLK I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT

IN

AT3

AF1

I2S0_MCK

ROOM=SOC

SPI_AP_TO_MESA_SCLK

1 01005

0.00 0%

2 1/32W

29

8

29

8

IN OUT

29

OUT

27

IN

27

MF

OUT

27

OUT

IN

SPI_CODEC_TO_AP_MISO SPI_AP_TO_CODEC_MOSI SPI_AP_TO_CODEC_SCLK SPI_AP_TO_CODEC_CS_L

14

15

16

17

V3

SEP_I2C_SDA

Y4

SEP_GPIO0

Y3

SEP_GPIO1

AB4

NOSTUFF

R0910

10K

9 8 7 6 5 3 29

SOCHOT0

PMU_TO_AP_SOCHOT0_R_L

AM1

1 0% MF

392K

1

C0900 1.0UF

ROOM=SOC

27

IN

BUTTON_MENU_KEY_L

2

VCC

20% 2 6.3V X5R 0201-1

A

CRITICAL

U0900

ROOM=SOC

M34128-FCS6_P/T SCL

WLCSP

SDA

VSS

B1

20

21

28

0.00 01005

2 PMU_TO_AP_SOCHOT0_L 1/32W

AM2

CPU_ACTIVE_STATUS

H31

CLK32K_OUT

H34

45_AP_TO_TOUCH_CLK32K_RESET_L

AM24

AP_TO_NAND_SYS_CLK_R

24

26

30

16

OUT

16

NC

OUT

B

29

R0945 0.00

AP_TO_NAND_SYS_CLK

2

13

OUT

SPI PROBE POINTS

33

24

26

30

33

BUTTON_MENU_KEY_BUFF_L

26

16

8

I2C0_AP_SCL

26

16

8

I2C0_AP_SDA

ROOM=SOC

PP0908

P2MM-NSM SM 1 SPI_CODEC_TO_AP_MISO 8 29 PP

ROOM=SOC

ROOM=SOC

PP0907

PP0909

P2MM-NSM SM 1 SPI_AP_TO_TOUCH_MOSI PP

P2MM-NSM SM 1 SPI_AP_TO_CODEC_MOSI 8 29 PP

1

PP

PP09010

PP0900 PP0901

P2MM-NSM SM 1 SPI_AP_TO_CODEC_SCLK PP

SM

OUT

8 24

ROOM=SOC

P3MM-NSM SM 1 PP

8 24

8 24

P3MM-NSM

9 16

ROOM=SOC ROOM=SOC

NC A2

I2C_SEP_BI_EEPROM_SDA I2C_SEP_TO_EEPROM_SCL

IN

30

25

17

8

I2C1_AP_SCL

30

25

17

8

I2C1_AP_SDA

8

BI

PP1V8_ALWAYS

8

8 12

15

B2

BUTTON_HOLD_KEY_L

1

PP

PP0902 PP0903

SYNC_MASTER=N/A PAGE TITLE

SYNC_DATE=N/A

SOC:SERIAL & GPIO

SM

P3MM-NSM

DRAWING NUMBER

U0902 2

74LVC1G34GX SOT1226 4

Apple Inc.

ROOM=SOC

BUTTON_HOLD_KEY_BUFF_L

OUT

9 16

20

8

I2C2_AP_SCL

20

8

I2C2_AP_SDA

NC

IN

PP

ROOM=SOC

392K

1% 1/32W MF 2 01005

P3MM-NSM SM 1

17

R0952

32

P3MM-NSM SM 1 PP

1

PP

SM

PP0904 PP0905

3

P3MM-NSM

1

ROOM=SOC

NC

051-00648

REVISION

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

IN

ROOM=SOC

74LVC1G34GX

SOT1226 4

14

0% 1/32W MF 01005

U0901

1% 1/32W MF 01005

13

AP_TO_PMU_SOCHOT1_L

SOCHOT1

NAND_SYS_CLK

R0950

PP1V8

3 5 6 7 8 9 12 29

5% 1/32W MF 2 01005 ROOM=SOC

ROOM=SOC

5

12

17

17

NC

13

16

15

ROOM=SOC

3

14

15

8

R0940

I2C PROBE POINTS 14

8

10K

5% 1/32W MF 01005 2 ROOM=SOC

PP0906

8 12

8 20

R0909

10K

5% 1/32W MF 01005 2 ROOM=SOC

1

20

8 12

P2MM-NSM SM 1 SPI_TOUCH_TO_AP_MISO PP

5

21

A1

28

BI

ROOM=SOC

PP1V8_SDRAM

8 20

28

OUT

PP1V8

BUTTON_RINGER_A

128kbit APN:335S0946

30

ROOM=SOC

PP1V8_ALWAYS

ROOM=SOC 8

25

30

NC NC

5% 1/32W MF 01005

16

21

8 17

25

C

100K

32

20

I2C_SEP_TO_EEPROM_SCL I2C_SEP_BI_EEPROM_SDA

SEP_I2C_SCL

R0951

ANTI-ROLLBACK EEPROM

14

BI

8 17

26

5% 1/32W MF 01005

BUTTON PULL-UP RESISTORS AND BUFFERS 8 12

13

BI

8 16

26

2.2K

1

PP1V8_SDRAM

3 5 6 7 8 9 12 29

BI

8 16

R0907

R0941

24

AR6

45_I2S_AP_TO_SPEAKERAMP_MCLK_R 45_I2S_AP_TO_CODEC_ASP_BCLK I2S_AP_TO_CODEC_ASP_LRCLK I2S_CODEC_TO_AP_ASP_DIN I2S_AP_TO_CODEC_ASP_DOUT

OUT

16

NC

45_I2S_AP_TO_BT_BCLK I2S_AP_TO_BT_LRCLK I2S_BT_TO_AP_DIN I2S_AP_TO_BT_DOUT

OUT

33

P34 R34

M33

FCMSP

GPIO_16

GPIO_32

24

24

K3

AR3

45_I2S_AP_TO_CODEC_MCLK_R 45_I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_AP_OWL_TO_CODEC_XSP_LRCLK I2S_CODEC_TO_AP_OWL_XSP_DIN I2S_AP_TO_CODEC_XSP_DOUT

2

MAUI-2GB-25NM-DDR-H

J4 GPIO_14 L2 GPIO_15

AP4

33.2 1% 1/32W MF 01005

U0600

GPIO_11 J3 GPIO_12 K2 GPIO_13

NC

1

ROOM=SOC

K1

BOOT_CONFIG0 AP_TO_BB_WAKE_MODEM LCM_TO_AP_HIFA_BSYNC BB_TO_AP_HSIC_DEVICE_RDY BB_TO_AP_GPS_TIME_MARK AP_TO_BB_HSIC_HOST_RDY BB_TO_AP_RESET_DETECT_L BOOT_CONFIG1 FORCE_DFU DFU_STATUS BOOT_CONFIG2 BOARD_ID4 CODEC_TO_AP_PMU_INT_L AP_TO_BB_RADIO_ON_L AP_TO_NAND_FW_STRAP TOUCH_TO_AP_INT_L BOARD_REV3 BOARD_REV2 BOARD_REV1 BOARD_REV0 AP_TO_BB_COREDUMP BB_TO_AP_IPC_GPIO BUTTON_RINGER_A AP_TO_BB_MESA_ON CAM_EXT_LDO_EN

IN

IN

3

32

IN

C1

J1 GPIO_9 H4 GPIO_10

AP_TO_STOCKHOLM_DEV_WAKE BOARD_ID3

OUT

9

33

24

OUT OUT

NC

AP_TO_SPEAKERAMP_RESET_L AP_TO_BT_WAKE AP_TO_BB_RESET_L PCIE_AP_TO_WLAN_DEV_WAKE AP_TO_LED_DRIVER_EN AP_TO_TOUCH_RESET_L AP_TO_LCM_RESET_L PMU_TO_AP_IRQ_L

OUT

33

33

BUTTON_VOL_UP_L BUTTON_VOL_DOWN_L SPEAKERAMP_TO_AP_INT_L

IN

33

NC NC

OUT

7

6

5

4

3

2

.

1

4.0.0

9 OF 49 8 OF 60

SIZE

D

A

8

7

6

5

4

3

2

SOC - OWL

1

POWER STATE CONTROL PROBE POINTS ROOM=SOC

16

9

OWL_TO_PMU_ACTIVE_REQUEST

P3MM-NSM SM 1

PMU_TO_OWL_ACTIVE_READY

P3MM-NSM SM 1

PP

PP1020

ROOM=SOC

D

30

26

16

9 5

PP

D

PP1021

ROOM=SOC

16

9

OWL_TO_PMU_SLEEP1_REQUEST

P3MM-NSM SM 1

PMU_TO_OWL_SLEEP1_READY

P3MM-NSM SM 1

PP

PP1022

ROOM=SOC

16

11

9

PP

PP1023

OMIT_TABLE

U0600 MAUI-2GB-25NM-DDR-H FCMSP

SC58980X0B-A040 16

C

16

11

9 9

19

IN 9

IN

19

IN

19

IN

9 19

33

29

28

8

OUT IN

IN 9

19

19

9

OUT

19

IN

9

IN

19

9

19

9

OUT OUT

33

IN

33

OUT

33

OUT

33

OUT

AD30 AB33

SPI_OWL_TO_COMPASS_CS_L COMPASS_TO_OWL_INT ACCEL_TO_OWL_INT2_R ACCEL_GYRO_TO_OWL_INT1 SPI_OWL_TO_ACCEL_GYRO_CS_L ACCEL_GYRO_TO_OWL_INT2

OUT

19

19

OWL_TO_PMU_SLEEP1_REQUEST PMU_TO_OWL_SLEEP1_READY

OUT

No share Dick LCM_TO_AP_HIFA_BSYNC OWL_TO_PMU_SHDN_BI_TIGRIS_SWI itesla.solutions

OWL_FUNC_0

AH32

OWL_FUNC_1

AG32

OWL_FUNC_2

AG31

OWL_FUNC_3

AF33

NC

AF34

OWL_FUNC_7

AF31

OWL_FUNC_8

AH31 AH33

SPI_IMU_TO_OWL_MISO SPI_OWL_TO_IMU_MOSI SPI_OWL_TO_IMU_SCLK

OWL_TO_WLAN_CONTEXT_B OWL_TO_WLAN_CONTEXT_A

CFSB_AOP

ROOM=SOC

CRITICAL

OWL_FUNC_5 OWL_FUNC_6

AF32

SYM 7 OF 14

OWL_FUNC_4

AE34

SPI_OWL_TO_DISCRETE_ACCEL_CS_L ACCEL_TO_OWL_INT1_R

UART_BB_TO_OWL_RXD UART_OWL_TO_BB_TXD

OWL_DDR_RESET*

AF35

AG30

NC

OWL_DDR_REQ

OWL_FUNC_9

AWAKE_REQ

AA33

AWAKE_RESET*

AD32

PMGR_MISO

AL2

PMGR_MOSI

AL1

PMGR_SCLK0

AK4

PMGR_SSCLK1

AL3

OWL_SWD_TCK_OUT

AE33

SWD_AP_PERIPHERAL_SWCLK

OWL_SWD_TMS0

AD35

OWL_SWD_TMS1

AC33

NC

SWD_TMS2

U31

OWL_I2CM_SDA

SWD_TMS3

T31

AK31

OWL_SPI_MISO

HOLD_KEY*

U3

AK32

OWL_SPI_MOSI

AL33

SKEY*

W4

OWL_SPI_SCLK OWL_UART0_RXD

AK33

OWL_UART0_TXD

AH30

OWL_UART1_RXD

AJ31

OWL_UART1_TXD

MENU_KEY*

V4

3 5 16

1 OUT IN

DWI_PMU_TO_PMGR_MISO 45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI 45_DWI_PMGR_TO_PMU_SCLK 45_DWI_PMGR_TO_BACKLIGHT_SCLK PMU_TO_OWL_CLK32K

RT_CLK32768

IN

OWL_TO_PMU_ACTIVE_REQUEST PMU_TO_OWL_ACTIVE_READY

AD31

OWL_I2CM_SCL

AJ32

PMU_TO_SYSTEM_COLD_RESET_L

W33

9 16 5 9 16

IN

16

OUT

16

OUT

26

IN

16

OUT

13

26

30

1

SM

P2MM-NSM

SM

PP1002

PP

OUT

SWD_AP_BI_BB_SWDIO SWD_AP_BI_NAND_SWDIO

BI

1

PP1003

PP

SM PP

C

P2MM-NSM 16

PP1V8

26

PP1004

3 5 6 7 8 12

13

14

20

21

28

29

R1002

P2MM-NSM

1.00K 5% 1/32W MF 01005

33

ROOM=SOC 33

BI

13

NC

BUTTON_HOLD_KEY_BUFF_L

IN

8 16

BUTTON_MENU_KEY_BUFF_L

IN

8 16

NC

AJ34

OWL_UART2_RXD NC AJ33 OWL_UART2_TXD NC 24

B

24

24

PP1005

A

SM

P2MM-NSM

PP

PP1006

SM

P2MM-NSM

PP

PP1007

SM

SPI_OWL_TO_IMU_MOSI

9 19

1

SPI_IMU_TO_OWL_MISO

9 19

8

OUT IN

8

OUT

45_I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_CODEC_TO_AP_OWL_XSP_DIN I2S_AP_OWL_TO_CODEC_XSP_LRCLK

NC

AD34

OWL_I2S_BCLK

AA34

OWL_I2S_DIN

AE32

OWL_I2S_MCK

AE31

OWL_I2S_LRCK

B

OWL SYSTEM SHUTDOWN OPTION NOSTUFF

P2MM-NSM

PP

PP1008

SM

P2MM-NSM

PP

PP1009

SM

P2MM-NSM

PP

PP1010

SM

P2MM-NSM

1

8

PP

1

1

SPI_OWL_TO_IMU_SCLK SPI_OWL_TO_DISCRETE_ACCEL_CS_L

R1020 10

9 19

SWI_AP_BI_TIGRIS

1 2 1/32W MF 5% 01005 ROOM=SOC

9 19

9

OWL_TO_PMU_SHDN_BI_TIGRIS_SWI

BI

8 17

NOSTUFF

R1021

1

1

SPI_OWL_TO_ACCEL_GYRO_CS_L SPI_OWL_TO_COMPASS_CS_L

10

OWL_TO_PMU_SHDN

1 2 1/32W 01005 MF 5% ROOM=SOC

9 19

SYNC_MASTER=N/A OUT

16

SYNC_DATE=N/A

PAGE TITLE

SOC:OWL DRAWING NUMBER

9 19

Apple Inc.

051-00648

REVISION

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

4.0.0

10 OF 49 9 OF 60

SIZE

D

A

8

7

6

5

4

3

PP_GPU

0.8V @10.5A MAX 1

C1100 10UF

D

20% 2 6.3V CERM-X5R 0402-9 ROOM=SOC

C1101

1

1

10UF

C1103

1

2.2UF

20% 2 6.3V CERM-X5R 0402-9

2

ROOM=SOC

C1104

C1105

1

2.2UF

20% 6.3V X5R-CERM 0201

2

ROOM=SOC

2.2UF

20% 6.3V X5R-CERM 0201

20% 6.3V X5R-CERM 0201

2

ROOM=SOC

OUT

14

16

ROOM=SOC

ROOM=SOC

TP1120 0.50MM SM

PP

1

PP_GPU

10

14

ROOM=SOC

C1106 4.3UF 20% 4V CERM 0402

1

ROOM=SOC

C1107

3

1

20% 4V CERM 0402

C1112

3

20% 4V CERM 0402

1

C1113

20% 4V CERM 0402

3

1

2 4

3

1

C1114

3

1

20% 4V CERM 0402

2 4

3

20% 4V CERM 0402

1

C1115 1UF

20% 4V CERM 0402 1

3

2 4

4.3UF

3

1

2 4

ROOM=SOC

1UF

20% 4V CERM 0402

20% 4V CERM 0402

C1111

4.3UF

3

20% 4V CERM 0402

3

C1117

0.47UF

0.47UF

1

2 4

3

1

20% 6.3V CERM 0402

2 4

3

2 4

C 14

10

PP_CPU

0.625V @TBDA MAX 0.9V @10.5A MAX 1.0V @12.5A MAX

1

C1120 10UF

20% 2 6.3V CERM-X5R 0402-9 ROOM=SOC

1

C1121

1

10UF

C1122

1

2.2UF

20% 2 6.3V CERM-X5R 0402-9

2

ROOM=SOC

C1123 2.2UF

20% 6.3V X5R-CERM 0201

2

ROOM=SOC

2.2UF

20% 6.3V X5R-CERM 0201

20% 6.3V X5R-CERM 0201

2

ROOM=SOC

ROOM=SOC

TP1100 0.50MM SM

PP

1

PP_CPU

10

14

ROOM=SOC

C1126 4.3UF 1

20% 4V CERM 0402

3

ROOM=SOC

C1127

ROOM=SOC

C1128

4.3UF 1

2 4

20% 4V CERM 0402

ROOM=SOC

C1129

4.3UF 3

1

2 4

20% 4V CERM 0402

ROOM=SOC

4.3UF

3

1

2 4

20% 4V CERM 0402

ROOM=SOC

C1130

C1131

4.3UF 3

1

2 4

20% 4V CERM 0402

4.3UF

3

1

20% 4V CERM 0402

2 4

MAUI-2GB-25NM-DDR-H

T12

AB6

FCMSP

M6

AB10

SC58980X0B-A040

U9 V12

SYM 8 OF 14

W9

ROOM=SOC

CRITICAL

M12

AD8

M18

AD10

N15

AD12

N21

AE7

N9

AE9

F10

AE11

H14

AE13

H16

AF8

H20

AF10

H22

AF12

H6

AH6

H8

AH8

J11

AH10

J13

AH12

J17

VDD_CPU

AJ5

J19

AJ7

J23

AJ9

J7

AJ11

K10

AJ13

K14

AK6

K16

AK10

K20

AL7

K22

AL9

K6

AL11

K8

AM6

L11

AM8

L13

AM10

L15

AN7

L17

AN11

L19

No share Dick itesla.solutions

C1125

1

AA11

AD6

C1116 20% 6.3V CERM 0402

U0600

W13

AC13

ROOM=SOC

G15

AA9

AB12

2 4

ROOM=SOC

OMIT_TABLE

AA7

ROOM=SOC

C1110

2 4

ROOM=SOC

1UF

ROOM=SOC

4.3UF

2 4

ROOM=SOC

1UF

C1109

4.3UF

2 4

ROOM=SOC

ROOM=SOC

C1108

4.3UF

2 4

1

ROOM=SOC

AL13

VDD_GPU

Y8 3

2 4

L21 M24

Y10

L7

Y12

L9

AM12

F8 M8 N11 N13 N17

ROOM=SOC

B

C1132 4.3UF 1

20% 4V CERM 0402

3

ROOM=SOC

C1133

ROOM=SOC

C1134

4.3UF 1

2 4

20% 4V CERM 0402

ROOM=SOC

C1135

1UF 3

1

2 4

20% 4V CERM 0402

ROOM=SOC

1UF

20% 4V CERM 0402 1

3

2 4

ROOM=SOC

C1136

3

2 4

1

20% 4V CERM 0402

N19

C1137

1UF

P10

1UF

G11

20% 4V CERM 0402 1

3

2 4

P12 P14

3

P16 P20

2 4

R15 R19 G13 R9 ROOM=SOC

ROOM=SOC

ROOM=SOC

T10

ROOM=SOC

C1138

C1139

C1140

C1141

0.47UF

0.47UF

0.47UF

0.47UF

1

20% 6.3V CERM 0402

3

1

20% 6.3V CERM 0402

3

1

20% 6.3V CERM 0402

3

1

20% 6.3V CERM 0402

T14 T16 U11 V14

3

V16 G7

2 4

2 4

2 4

2 4

R23 G9 H10 T24

XW1100

14

OUT

45_BUCK0_PP_CPU_FB

SHORT-10L-0.1MM-SM 1

P22 W17

2

ROOM=SOC

N23 G17

A

G21

PP1100 P2MM-NSM

PP1101 P2MM-NSM

SM PP

SM PP

MAUI-2GB-25NM-DDR-H

AB14

FCMSP

AB16

SC58980X0B-A040

Y14 Y16

AP_CPU_SENSE_P

Y6 VDD_CPU_SENSE

VDD_GPU_SENSE

G20

AP_CPU_SENSE_N

Y7 VSS_CPU_SENSE

VSS_GPU_SENSE

H19

10UF

20% 6.3V 2 CERM-X5R 0402-9 ROOM=SOC

1

0.825V @4.7A MAX 0.725V @TBDA MAX

C1151

14

10UF

20% 2 6.3V CERM-X5R 0402-9

XW1120

SHORT-10L-0.1MM-SM 1 2 45_BUCK2_PP_SOC_FB

ROOM=SOC

Y22

SYM 9 OF 14

Y26

CRITICAL

VDD_SOC

G29

ROOM=SOC

AB26

AA27

AC17

C1153

F17

4.3UF

AC19

F20

AC23

L29

AD16

N29

AD20

V28

1

20% 4V CERM 0402

2 4

AD22

ROOM=SOC

C1154

ROOM=SOC

C1155

1UF 3

1

20% 4V CERM 0402

2 4

ROOM=SOC

C1156

1UF 3

1

20% 4V CERM 0402

1UF 3

2 4

3 2

C1157 0.47UF

20% 4V CERM 0402

1

D

ROOM=SOC

1

20% 6.3V CERM 0402

3

2 4

4

AD24 AD26 AE5

L22

AE15

L24

AE17

L26

AE19

L28

AE23

M1

AF14

M5

AF16

M7

AF20

M9

AF22

M11

AF24

M13

AF26

M17

AG17

M21

AG19

M23

AG23

M25

AH16

M27

AH20

M29

AH22

N6

AH26

N10

AJ15

N12

AJ17

N14

AJ19

N16

AJ23

N18

AK14 J29

C

M35

AH24

G19 VDD_SOC

N22

G23

N24

AK22

N26

F6

N28

F14

N30

AL15

N33

AM5

P9

G25

P11

G27

P13

H24

P15

H26

P17

H28 VSS

J27

P19 P21

K24

P23

K26

P25

K28

P27

L27

P29

L23

P35

M26

B

R4

M28

R6

AL19

R8

N7

R10

N27

R12

P24

R14

P26

M19

P28

R18

R17

R20

R27

R22

R29

R24

T22

R26

T26

R28

T7

R30

T28

T1

U17

T2

V8

R33

V20

T9

V22

T11

V24

T13

V26

T15

W7

T17

W11

P7

Y28

T23

AJ20

VDD_SOC_SENSE

AK21

VSS_SOC_SENSE

T25 T27 T30 T35 U6

SYNC_MASTER=N/A PAGE TITLE

SYNC_DATE=N/A

SOC:POWER (1/3)

U10

DRAWING NUMBER

U12

Apple Inc.

1

051-00648

REVISION

R

ROOM=SOC

PP1102

SM

P2MM-NSM

PP

PP1103

SM

P2MM-NSM

1

AP_GPU_SENSE_N

AP_SOC_SENSE_N

ROOM=SOC

PP

1

1

SM PP

ROOM=SOC

AP_GPU_SENSE_P

AP_SOC_SENSE_P

ROOM=SOC

1

SM PP

ROOM=SOC

PP1104 P2MM-NSM

PP1105

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT

P2MM-NSM

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

14

OUT

ROOM=SOC

Y24

ROOM=SOC

AB24

C1150

Y20

T18 T20

1

ROOM=SOC

AA23

AB22

SHORT-10L-0.1MM-SM 1 2 45_BUCK1_PP_GPU_FB

W23

U0600

AB20

XW1110

1

OMIT_TABLE

AA17 AA19

10

1 PP_SOC

SOC - CPU, GPU & SOC RAILS 14

2

4

3

2

1

4.0.0

11 OF 49 10 OF 60

SIZE

D

A

8

7

6

5

4

3

2

1

SOC - POWER SUPPLIES DDR IMPEDANCE CONTROL 1.06 - 1.17V @635mA MAX INTERNALLY SUPPLIES VDDQ

D 14

11

14

1

C1240

20% 2 6.3V CERM-X5R 0402-9

1

C1241

1

2.2UF

20% 6.3V X5R-CERM 0201

2

ROOM=SOC

ROOM=SOC

C1242

C1243

1

2.2UF

2

1

2.2UF

20% 6.3V X5R-CERM 0201

20% 6.3V X5R-CERM 0201

2

ROOM=SOC

2

ROOM=SOC

C1246

4.3UF

1UF

1

3

1

2 4

1

20% 6.3V X5R-CERM 0201

2

20% 4V CERM 0402

1

C1248 2.2UF

ROOM=SOC

C1245 20% 4V CERM 0402

C1244 2.2UF

ROOM=SOC

ROOM=SOC

20% 6.3V X5R-CERM 0201

ROOM=SOC

C1247 1.0UF

20% 6.3V 2 X5R 0201-1

ROOM=SOC

1

C1249 1.0UF

20% 6.3V 2 X5R 0201-1

ROOM=SOC

3

2 4

2

OMIT_TABLE

A20

DDR0_RREF

C21 AP17

A22

U0600

DDR1_RREF

B11

MAUI-2GB-25NM-DDR-H

DDR2_RREF

V31

B15

FCMSP

DDR3_RREF

P5

B23

SC58980X0B-A040

B25

SYM 11 OF 14

D16

VDDIO11_DDR0

D20

ROOM=SOC

DDR0_ZQ

B21

DDR3_ZQ

P2

CRITICAL DDR0_RET*

C18

E15

DDR1_RET*

AP15

E17

DDR2_RET*

Y31

E19

DDR3_RET*

U4

D22

F19 VDDIO11_PLL_DDR

AR18

14

7 6

OMIT_TABLE AA15

1

C1200 10UF

ROOM=SOC

C1201 4.3UF

20% 2 6.3V CERM-X5R 0402-9 ROOM=SOC

1

20% 4V CERM 0402

ROOM=SOC

C1202 1UF

3

20% 4V CERM 0402 1

ROOM=SOC

C1203 0.47UF

3

1

20% 6.3V CERM 0402

U0600

MAUI-2GB-25NM-DDR-H

AC7

AA25

FCMSP SC58980X0B-A040

AC9

AC21 3

AC25

2 4

2

4

C1220 0.47UF 20% 6.3V CERM 0402

No share Dick itesla.solutions AG9

ROOM=SOC

CRITICAL

AD18

1

2

AE25

3

4

2

1% 1/32W MF 01005

AT13

240

2

ROOM=SOC

R1203

1

240

1% 1/32W MF 01005

2

ROOM=SOC

1% 1/32W MF 01005

ROOM=SOC

R1204

1

R1205

240 2

240

1% 1/32W MF 01005

1% 1/32W MF 01005

2

ROOM=SOC

ROOM=SOC

45_DDR0_ZQ 45_DDR3_ZQ PMU_TO_OWL_SLEEP1_READY

IN

9 16

FL1280

100OHM-25%-0.12A

45_PP1V1_DDR_PLL

1

PP1V1

2

11

14

01005

1

ROOM=SOC

C1280 0.22UF

2

AR8

20% 6.3V X5R 01005-1

ROOM=SOC

C

AT16 14

ROOM=SOC

C1221

ROOM=SOC

C1222

1UF

20% 4V CERM 0402 1

1

AM14

VDDIO11_DDR1

2.2UF

4.3UF 3

1

20% 4V CERM 0402

AM18

C1223

2

20% 6.3V X5R-CERM 0201

D19

AR15

AN17 VDDIO11_RET_DDR

W31

PP1V1_SDRAM

12

14

15

1.06 - 1.17V

T4

AN15

ROOM=SOC

3

AM20 AN13

2 4

2 4

H18

AF18

R21

AG15

U15

AG21

J15

AH25

J21

AH14

J9

AH18

C1224

K12

0.47UF

AJ21

K18 VDD_GPU_SRAM

0.8V @0.5A MAX

PP_GPU_SRAM

M14

G10

M16

V18

M20

AL17

P18

J25

R11

L25

R13

1

20% 6.3V CERM 0402

3

ROOM=SOC

C1225

ROOM=SOC

C1226

1UF

20% 4V CERM 0402 1

R25

V10

R7

M22

2

3

1

20% 4V CERM 0402

4

2 4

2 4

V29

DDR1_SYS_ALIVE

AP16

Y29

DDR2_SYS_ALIVE

W32

Y35

DDR3_SYS_ALIVE

T3

SYSTEM_ALIVE

IN

13

16

17

2.2UF

2

3

C1227 20% 6.3V X5R-CERM 0201

ROOM=SOC

AG34 M34

VDDIO11_DDR2

R35 T29 T34 U30

AA1 ROOM=SOC

V6

4.3UF 1

W2 H2 M2

3 2

B

AC2

C1228 20% 4V CERM 0402

W25

C19

AC30

U25 W21

DDR0_SYS_ALIVE

AA30

AN6 W15

1

4.3UF

U13

VDD_FIXED

14

AB29

AB35 ROOM=SOC

M10

F12

N25

240

1

R1202

45_DDR0_RREF 45_DDR1_RREF 45_DDR2_RREF 45_DDR3_RREF

P8

AR21

H12

AK16

W26

1

AK12

AE21

B

AG11

ROOM=SOC

R1201

AM16 ROOM=SOC

AG7

SYM 10 OF 14

AD14 2 4

AA13 VDD_CPU_SRAM

AC15

PP_CPU_SRAM

AC11

AA21 AB18

1

AK18

AN19

0.8V @TBDA MAX 0.9V @TBDA MAX 1.0V @1.0A MAX

1% 1/32W MF 01005

1.1V @7mA MAX

E21

PP_FIXED

R1200 240

10UF

C

D

PP1V1

PP1V1 1

0.802-TBDV @1.1A MAX

11

U5

VDDIO11_DDR3

P6

4

Y18

T6

F21

U1

F26

N5

AB28

R5

AC27

W5

G18 AK20 F16 R16 T8 V7 U19 W27 U27 AF4 AF27 U21

A

SYNC_MASTER=N/A PAGE TITLE

0.756-TBDV @44mA MAX 15

PP0V8_OWL

SOC:POWER (2/3)

AH29 1

C1250 1.0UF

AD29

SYNC_DATE=N/A

DRAWING NUMBER

VDD_LOW

Apple Inc.

AF29

20% 2 6.3V X5R 0201-1

051-00648

REVISION

R

ROOM=SOC

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

4.0.0

12 OF 49 11 OF 60

SIZE

D

A

8

7

OMIT_TABLE

A1

U0600

A2 A11

MAUI-2GB-25NM-DDR-H

A16

FCMSP

A21

SC58980X0B-A040 SYM 13 OF 14

A24

D

C

OMIT_TABLE

AF23

AN12

AF25

AN14

AF30

AN18

MAUI-2GB-25NM-DDR-H

AG1

AN29

FCMSP

AG2

AN33

SC58980X0B-A040

4

3

E16 E18 E22

SYM 14 OF 14

AP2

AG8

AP14

A34

AG10

AP20

E32

A35

AG14

AP25

F4

AA6

AG16

AP26

F5

AA8

AG18

AP27

F7

AA10

AG20

AP30

F9

AA12

AG22

AP31

F11

AA14

AG24

AP32

F13

AA16

U7

AP33

F15

AA18

AG29

AR1

F18

AA20

AG33

AR5

D18

AA22

AG35

AR9

F23

AA24

AH5

AR14

E30

1

AA26

AH7

AR16

F25

N8

AH9

AR25

F27

AA28

AH11

AR34

F28

20% 2 6.3V CERM-X5R 0402-9

AA35

AH13

AR35

F29

AR17

AB1

AH15

AT1

G4

AR22

C17

AH17

AT2

G5

AR7

AB3

AH19

AT6

G6

AB5

AH21

AT8

G8

AB7

AH23

AT9

G12

AB9

AH27

AT14

G14

AB11

AJ6

AT17

G16

AB13

AJ8

AT18

E6

N2

AB15

AJ10

AT21

G22

R1

AB17

AJ12

AT25

G24

U34

AB19

AJ14

AT34

G26

V2

AB21

AJ16

AT35

G28

AB23

AJ18

B1

G33

AB25

W8

B2

H1

AB27

AJ22

B16

H7

AB30

AG12

B20

H9

AC1

AK24

B22

AC6

AJ28

B24

AC8

AK2

B27

AC10

AK3

B34

AC12

AK5

A27

E24

ROOM=SOC

E26

CRITICAL

E29

1.70-1.95V @100mA(TBD) 33

30

26

24

17

16

15

14

8

MAX

PP1V8_SDRAM

A10

C1300

1

2.2UF

2

20% 6.3V X5R-CERM 0201

C1301

1

2.2UF

2

ROOM=SOC

C1302 2.2UF

20% 6.3V X5R-CERM 0201

2

ROOM=SOC

20% 6.3V X5R-CERM 0201

ROOM=SOC

14

PP1V1_SDRAM

11

MAUI-2GB-25NM-DDR-H

AH35

FCMSP VDD1

U16 U18 U22

SC58980X0B-A040

U24

SYM 12 OF 14

AT7

U26

ROOM=SOC

G1

U28

CRITICAL

L35

1.06-1.17V @1.3A(TBD) MAX 15

AD1 AT22

U14

U0600

A26 1

D

OMIT_TABLE

U35 V1

A15

V5

A23

C1310

1

10UF

C1312

1

2.2UF

2

ROOM=SOC

20% 6.3V X5R-CERM 0201

C1313

1

2.2UF

2

ROOM=SOC

AB34

20% 6.3V X5R-CERM 0201

AH34

2.2UF

20% 6.3V X5R-CERM 0201

2

ROOM=SOC

ROOM=SOC

C1314 ROOM=SOC

ROOM=SOC

C1316

C1317

1UF

1UF

1

20% 4V CERM 0402

3

20% 4V CERM 0402

1

2 4

21

20

14

13

12

9 8 7 6 5 3 29

No share Dick itesla.solutions

C1320

1

2

ROOM=SOC

H15

C1321

1

2.2UF

20% 6.3V 2 CERM-X5R 0402-9

H13

V11

AR13

AT15

V13 V15 V17 V19 VDD2

V21

B10

V23 V25

3

2 4

V27

L34

W30 W1 W6

20% 6.3V X5R-CERM 0201

ROOM=SOC

C1322

1

2.2UF

2

20% 6.3V X5R-CERM 0201

C1323 2.2UF

2

ROOM=SOC

20% 6.3V X5R-CERM 0201

W12

ROOM=SOC

W14

F30

W16

H30

W18

K30

W20

M30

W22

VDDIO18_GRP1

N31

VSS

P30

W24 W28

H5

W29

K5

B35

E28

AN9

Y1

AK7

C2

H21

AA5

Y9

AC16

AK9

C3

H23

AC5

AC18

AK11

C4

H25

AC20

AK13

C5

H27

AC22

AK15

C6

H29

AC24

B28

C7

J2

AC26

AK17

C8

J5

M15

C9

J6

VSS

VSS

VSS

AC28

AP28

C10

J30

AC34

AK26

C11

J8

AC35

AK30

C12

J10

AD5

AK34

C13

J12

AD7

AK29

C14

J14

AD9

AL6

C20

J16

AD11

AL8

C22

J18

AD15

AL10

C23

J20

VDDIO18_GRP10:1.62-1.98V @8mA VDDIO18_LPOSC:1.62-1.98V @1mA 19

14

MAX MAX

PP1V8_IMU_OWL

28

21

20

14

13

12

15

8

9 8 7 6 5 3 29

PP1V8_ALWAYS

MAX

Y13 Y15

VDD18_FMON :1.62-1.98V @1mA MAX VDD18_UVD :1.62-1.98V @5mA MAX VDD18_AMUX :1.62-1.98V @1mA MAX VDD18_TSADC:1.645-1.89V @2mA MAX

1

C1330 2.2UF

2

20% 6.3V X5R-CERM 0201

ROOM=SOC

Y17

VDDIO18_GRP4 VDDIO18_GRP10

Y5 VDDIO18_GRP11

PP1V8

Y11

VDDIO18_GRP3

AE28

1.62-1.98V @1mA

W34

AL5

AG28 17

VDDIO18_GRP2

AG5 AM23

C

W10

W35

10UF

H11

V9

G2

PP1V8 1

U29

AD2

B26

1.62-1.98V @41mA MAX 28

AA29

H17

VSS

1

E20

AP13

CRITICAL

2

SOC - POWER SUPPLIES

E12

U0600

AG6

T5

A

5

AG3

ROOM=SOC

A25

AC14

B

6

(OWL) (AON)

Y19 Y21 Y23 Y25

AG26

VDD18_LPOSC

AM22

Y27

VDD18_FMON

AD13

Y34

VDD18_UVD

AN24

AC29

VDD18_AMUX

AD28

AG13

AE27

AK8

B

AG27

AB8 VDD18_TSADC

AJ30

AD17

AL12

C24

J22

N20

AD19

AF28

C25

J24

U23

AD21

AL14

C26

J26

AK23

AD23

AM29

C27

J28

D31

AD25

AL16

C28

K7

G30

AD27

AR27

C29

K9

L30

AD33

AL18

C30

K11

P4

AE6

Y30

C31

K13

U8

AE8

AL20

C32

K15

V30

AE10

AL25

C33

K17

A28

AE12

AL28

D3

K19

AL32

AE14

AL30

D4

K21

T21

AE16

AL31

D5

K23

AE18

AM7

D6

K25

AE20

AM9

D11

K27

AE22

AM11

D17

K29

AE24

AM13

D21

K34

AE26

AM15

D23

K35

AE29

AM17

D26

L1

AE30

AM19

D27

L5

AE35

AM21

D28

L6

AF5

AM33

D29

K4

AF7

AM34

D30

L8

AF9

AM35

E1

L10

AF11

AN3

E3

L12

AF15

AN5

E4

L14

SYNC_MASTER=N/A

AF17

AN16

E5

L16

PAGE TITLE

AF19

AN8

D7

L18

AF21

AN10

E9

L20

AJ35 AK19 AT27

SYNC_DATE=N/A

SOC:POWER (3/3) DRAWING NUMBER

Apple Inc.

051-00648

REVISION

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

4.0.0

13 OF 49 12 OF 60

SIZE

D

A

8

7

6

5

4

3

2

1

S3E NAND R1530 28

21

20

14

13

12

9 8 7 6 5 3 29

PP1V8

1

24.9

PP1V8_NAND_AVDD

2

1% 1/32W MF 01005

D

1

C1530

1

20% 6.3V X5R-CERM 0201

2

ROOM=NAND

2 13

1

C1520

1

15UF

2

20% 6.3V X5R 0402-1

1

20% 6.3V X5R 0402-1

20% 6.3V 2 CERM-X5R 0402-9

15UF

2

ROOM=NAND

C1522

C1521

1

10UF

2

0.1UF

20% 6.3V X5R-CERM 01005

ROOM=NAND

C1524

1

0.1UF

ROOM=NAND

ROOM=NAND

NAND_AGND

ROOM=NAND

C1525

1

100PF

20% 6.3V X5R-CERM 01005

2

ROOM=NAND

D

C1531

2.2UF

C1526

1

5% 16V NP0-C0G 01005

2

C1523

100PF

5% 16V NP0-C0G 01005

2

ROOM=NAND

15UF

20% 6.3V X5R 0402-1

ROOM=NAND

ROOM=NAND

PP3V0_NAND 1 1

C1527

1

2.2UF

2

2

ROOM=NAND

1

15UF

C1528 2.2UF

20% 6.3V X5R-CERM 0201

C1500

2

20% 6.3V X5R-CERM 0201

20% 6.3V X5R 0402-1

2

C1504

1

PP0V9_NAND

C1548 15UF

C

2

20% 6.3V X5R 0402-1

C1540

1

15UF

2

ROOM=NAND

20% 6.3V X5R 0402-1

1

C1541

2

C1542 10UF

15UF

ROOM=NAND

20% 6.3V 2 CERM-X5R 0402-9

20% 6.3V X5R 0402-1

ROOM=NAND

ROOM=NAND

1

20% 6.3V 2 CERM-X5R 0402-9

1

ROOM=NAND

C1509

2

ROOM=NAND

1

C1561

2

1

10% 6.3V X5R 01005

ROOM=NAND

1% 1/32W MF 01005

ROOM=NAND

2

R1561 1% 1/32W MF 01005

IN

R1501

IN OUT

PCIE_NAND_TO_AP_CLKREQ_L

G9

IN

13

6

6

3.01K

B

1% 1/20W MF 201

ROOM=NAND

13 13

6 6

AP_TO_NAND_SYS_CLK

H8

6

NOSTUFF

2

2

ROOM=NAND

20% 6.3V X5R 0402-1

ROOM=NAND

IN IN

13

6

IN

13

6

IN

6

OUT

6

OUT

6

OUT

6

OUT

C1506

1

20% 6.3V X5R 0402-1

20% 6.3V X5R 0402-1

2

2

C1507

1

C1508

1

5% 16V NP0-C0G 01005

2

C1505 15UF

ROOM=NAND

20% 6.3V X5R 0402-1

ROOM=NAND

2

100PF

5% 16V NP0-C0G 01005

2

ROOM=NAND

5% 16V NP0-C0G 01005

ROOM=NAND

OG10

ROOM=NAND

100PF

VCC

OG0 VCC

OD10 VCC

OD0 VCC

OA10 VCC

OA0 VCC

R5 VDDIO

OF10 VDDIO

OF0 VDDIO

OB10

OB0

A5

R7 VDD

R3 VDD

J9 VDD

J1 VDD

100PF

C

C1510

THGBX5G7D2KLFXG WLGA

D2

90_PCIE_AP_TO_NAND_REFCLK_P 90_PCIE_AP_TO_NAND_REFCLK_N

13

ROOM=NAND

1

2

15UF

U1500

NAND_VREF 8

F2

A7

A3

E5

C3

K6

K4

J7

J5

M4

ROOM=NAND

VDDIO

R1560

10K

0.01UF

2

ROOM=NAND

10K

0.01UF

10% 6.3V X5R 01005

ROOM=NAND

VDDIO

C1560

NOSTUFF

VDDIO

1

1

No share Dick itesla.solutions 10% 2 6.3V X5R-CERM 01005

VDD

ROOM=NAND

1000PF

VDD

PP1V8

2

20% 6.3V X5R-CERM 01005

VDD

9 8 7 6 5 3 29

20% 6.3V X5R-CERM 01005

C1554 VREF

12

0.1UF

AVDD1

13

2

C1551

5% 16V NP0-C0G 01005

ROOM=NAND

PCI_VDD2

14

0.1UF

1

PCI_VDD1

20

C1550

1

PCI_AVDD_H

21

20% 6.3V X5R 0402-1

1

1

100PF

PCI_AVDD_CLK2

28

20% 6.3V X5R 0402-1

C1503

10UF

PCI_AVDD_CLK1

C1546 15UF

2

20% 6.3V X5R 0402-1

15UF

ROOM=NAND

C1543

2 1

1

ROOM=NAND

2

1

C1502 15UF

ROOM=NAND

15UF

1

1

15UF

ROOM=NAND

1

15

C1501

15

H6

CLK_IN PCIE_REFCLK_P

BOMOPTION=OMIT_TABLE

PCIE_REFCLK_M

ROOM=NAND

PCIE_CLKREQ*

45_PCIE_NAND_RESREF

M6

90_PCIE_AP_TO_NAND_TXD0_P 90_PCIE_AP_TO_NAND_TXD0_N

M8

PCIE_RX0_P

K8

PCIE_RX0_M

90_PCIE_AP_TO_NAND_TXD1_P 90_PCIE_AP_TO_NAND_TXD1_N

N5

PCIE_RX1_P

N3

PCIE_RX1_M

90_PCIE_NAND_TO_AP_RXD0_P 90_PCIE_NAND_TO_AP_RXD0_N

P8

PCIE_TX0_P

G3

EXT_D1

J3

EXT_D2

H2

EXT_D3

E3

EXT_D4

CRITICAL

PCI_RESREF

EXT_D0

EXT_D5 EXT_D6

PMU_TO_NAND_LOW_BATT_BOOT_L AP_TO_NAND_FW_STRAP

NC NC E7 NC F6 NC C7 NC

IN

16

IN

8

ROOM=NAND

P3MM-NSM SM 1

B8

SYSTEM_ALIVE

IN

11

EXT_NCE

G1

PCIE_AP_TO_NAND_RESET_L

IN

6

EXT_NRE

F4

SWD_AP_BI_NAND_SWDIO_R

EXT_NWE

C5

SWD_AP_NAND_SWCLK_R

EXT_RNB

G5

M2

PCIE_TX1_P

EXT_CLE

H4

K2

PCIE_TX1_M

EXT_ALE

D4

PP1520

PP

EXT_D7

PCIE_TX0_M

N7

90_PCIE_NAND_TO_AP_RXD1_P 90_PCIE_NAND_TO_AP_RXD1_N

VER-1

16

17

R1520 0.00

1 0% MF

1/32W

01005

BI

9

ROOM=NAND

B

R1521 1 0% MF

NC

SWD_AP_BI_NAND_SWDIO

2

0.00

SWD_AP_PERIPHERAL_SWCLK

2 1/32W

01005

IN

9 33

ROOM=NAND

NC

1

PP

PP1521

SM

2

VSS

VSS OE0

OC10

VSS

VSS

VSS P6

P4

VSS P2

VSS L7

VSS

VSS L5

OC0

0.5% 1/32W MF 01005

B2

34.8

L3

R1500

VSS

ZQ

G7

D6

VSS

TRST*

OE10

1

D8

ROOM=NAND

VSS

45_NAND_ZQ

RESET*

B6

NC

P3MM-NSM

F8

VSS

AP_TO_NAND_RESET_L

B4

IN

VSSA

5

NAND_AGND

13

ROOM=NAND

PCIE RECEIVE-SIDE PROBE POINTS ROOM=NAND

13 13

6

90_PCIE_AP_TO_NAND_REFCLK_P

6

90_PCIE_AP_TO_NAND_REFCLK_N

P3MM-NSM SM 1 PP

1

PP

PP1500 PP1501

SM

P3MM-NSM

ROOM=NAND

A

ROOM=NAND

13

6

90_PCIE_AP_TO_NAND_TXD0_P

13

6

90_PCIE_AP_TO_NAND_TXD0_N

SYNC_MASTER=N/A

P3MM-NSM SM 1 PP

1

PP

SYNC_DATE=N/A

PAGE TITLE

PP1502 PP1503

NAND DRAWING NUMBER

SM

P3MM-NSM

Apple Inc.

ROOM=NAND

13

6

90_PCIE_AP_TO_NAND_TXD1_P

6

90_PCIE_AP_TO_NAND_TXD1_N

P3MM-NSM SM 1 PP

1

PP

REVISION

R

ROOM=NAND

13

051-00648

PP1504 PP1505

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

SM

P3MM-NSM

II NOT TO REPRODUCE OR COPY IT

ROOM=NAND

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

5

4

3

2

1

4.0.0

15 OF 49 13 OF 60

SIZE

D

A

8

7

6

5

4

3

2

1

ANTIGUA PMU - Buck Supplies CRITICAL

D

OMIT_TABLE

U2000

33

26

25

24

22

21

17

15

PP_VCC_MAIN

IN

ANTIGUA-D2255A080 V3 VDD_MAIN_SNS R6

1

C2085

1

10UF

10UF

20% VOLTAGE=6.3V 2 CERM-X5R 0402-9 ROOM=PMU

C2087

C2088

1

10UF

20% VOLTAGE=6.3V CERM-X5R 0402-9 ROOM=PMU

10UF

20% 2 VOLTAGE=6.3V CERM-X5R 0402-9 ROOM=PMU

L13 L5

VDD_MAIN

R8 L4

B4 1

C2089

1

2.2UF

20% VOLTAGE=6.3V X5R-CERM 0201

2

C2090

1

2.2UF

2

ROOM=PMU

C2091

C2092

1

2.2UF

20% VOLTAGE=6.3V X5R-CERM 0201

2

ROOM=PMU

20% VOLTAGE=6.3V X5R-CERM 0201

2.2UF

20% VOLTAGE=6.3V X5R-CERM 0201

2

ROOM=PMU

C8

BUCK0_LX1

C16 1

2.2UF

20% VOLTAGE=6.3V X5R-CERM 0201

2

C2094

1

20% VOLTAGE=6.3V X5R-CERM 0201

2

ROOM=PMU

C2095

20% VOLTAGE=6.3V 2 CERM-X5R 0402-9

ROOM=PMU

B12 C12

ROOM=SOC

C

J19

5% VOLTAGE=16V NP0-C0G 01005

2

ROOM=PMU

T19

BUCK0_LX2

VDD_BUCK0_23

BUCK0_LX2

Y12

N19

J2

E2

BUCK0_LX3

BUCK0_FB

VDD_BUCK1_23

E18 E19

VDD_BUCK2

PP1V8

VOLTAGE=1.8V

BUCK1_LX0

C7

CRITICAL BUCK0_LX3

VOLTAGE=1.8V

U16

VOLTAGE=1.8V

U15

VOLTAGE=1.1V

BUCK1_LX1

VDD_BUCK4

1.1A MAX

21

F8

45_BUCK0_PP_CPU_FB

BUCK1_LX0

45_BUCK5_FB

1

C2060

1

15UF

20% VOLTAGE=6.3V X5R 0402-1

1.1A MAX

11

C2061

1

M13

20% VOLTAGE=6.3V X5R 0402-1

2

100PF

15UF

2

ROOM=PMU

5% VOLTAGE=16V NP0-C0G 01005 ROOM=PMU

21

IN

B17

C2070

1

15UF

2

20% VOLTAGE=6.3V X5R 0402-1

15UF

2

ROOM=PMU

20% VOLTAGE=6.3V X5R 0402-1

BUCK1_LX2

VOLTAGE=1.0V 0.80V/0.90V/1.0V

1.1A MAX

BUCK8

PP_GPU_SRAM 1

C2080

1

15UF

2

20% VOLTAGE=6.3V X5R 0402-1

ROOM=PMU

C2081 15UF

2

20% VOLTAGE=6.3V X5R 0402-1

ROOM=PMU

ROOM=PMU

1

BUCK1_LX1

1

BUCK7_LX0

2

2

C2013

1

15UF

20% VOLTAGE=6.3V X5R 0402-1

2

C2017

1

ROOM=PMU

C2014

1

15UF

20% VOLTAGE=6.3V X5R 0402-1

2

C2018

1

20% VOLTAGE=6.3V X5R 0402-1

2

ROOM=PMU

20% VOLTAGE=6.3V X5R 0402-1

C2015

1

20% VOLTAGE=6.3V X5R 0402-1

2

15UF

2

ROOM=PMU

C2016

C

15UF

ROOM=PMU

20% VOLTAGE=6.3V X5R 0402-1

ROOM=PMU

ROOM=PMU

C15

CRITICAL BUCK1_LX2

2

1

1

B13

15UF

PIQA20161T-SM

2

ROOM=PMU

C13

CRITICAL

20% VOLTAGE=6.3V X5R 0402-1

15UF

2

ROOM=PMU

C2019 15UF

ROOM=PMU

20% VOLTAGE=6.3V X5R 0402-1

2X 15UF BULK CAPS REMOVED FOR N69

ROOM=PMU

A11 VDD_BUCK7

BUCK1_LX3

VDD_BUCK8

BUCK1_FB

NC NC C11 NC B11

F12

4TH PHASE INDUCTOR REMOVED FOR N69 45_BUCK1_PP_GPU_FB

IN

L2020

10

16

1.0UH-20%-3.6A-0.060OHM H17 BUCK3_SW1

BUCK2_LX0

BUCK2_LX0

1

H18

PP_SOC

2 ROOM=PMU

H19

CRITICAL

1

L2021

BUCK3_SW3

K17 BUCK2_LX1

BUCK4_SW1 BUCK2_FB

BUCK2_LX1

1

K18

2

2

20% VOLTAGE=6.3V X5R 0402-1

C2023

1

15UF

2

ROOM=PMU

PIQA20121T-SM

20% VOLTAGE=6.3V X5R 0402-1

C2024

1

15UF

2

ROOM=PMU

20% VOLTAGE=6.3V X5R 0402-1

C2025

1

20% VOLTAGE=6.3V X5R 0402-1

2

15UF

2

ROOM=PMU

C2026 15UF

ROOM=PMU

20% VOLTAGE=6.3V X5R 0402-1

B

ROOM=PMU

ROOM=PMU

K19 J14

1

15UF

0.47UH-20%-3.8A-0.048OHM

BUCK3_SW2

C2022

10

VOLTAGE=0.825V 0.725V/0.825V

PIQA20161T-SM

CRITICAL 45_BUCK2_PP_SOC_FB

IN

10

1.0UH-20%-3.6A-0.060OHM R18 BUCK5_LX0

BUCK3_LX0

R19

BUCK3_LX0 CRITICAL

1

BUCK3_FB

V19

XW2030

SHORT-10L-0.1MM-SM 1 2

45_BUCK3_FB

8 12

15

16

17

24

26

30

33

VOLTAGE=1.8V

PIQA20161T-SM

ROOM=PMU

BUCK5_FB

PP1V8_SDRAM

2

1

C2030

1

15UF

2

20% VOLTAGE=6.3V X5R 0402-1

C2031

1

20% VOLTAGE=6.3V X5R 0402-1

2

15UF

2

ROOM=PMU

C2032 100PF

ROOM=PMU

5% VOLTAGE=16V NP0-C0G 01005 ROOM=PMU

V17 VBUCK3_SW

H1 BUCK6_LX0

Y17 Z17

L2040

V11 F1 F2

ROOM=PMU

BUCK4_LX0

BUCK7_LX0

BUCK4_LX0

1

Y11

2

45_BUCK7_FB

C1

ROOM=PMU

Z11

V13

L2080

BUCK4_LX1

BUCK8_LX0

1

F17

PIXB2016FE-SM

F18

CRITICAL

F19

ROOM=PMU

BUCK4_FB

CRITICAL

45_BUCK8_FB

C19

BUCK4_LX1 CRITICAL

Z13 T9

BUCK8_LX0

1

1

2 PIQA20121T-SM

C2040

1

15UF

2

20% VOLTAGE=6.3V X5R 0402-1

ROOM=PMU

C2041

1

15UF

2

20% VOLTAGE=6.3V X5R 0402-1

ROOM=PMU

ROOM=PMU

C2042

1

15UF

2

20% VOLTAGE=6.3V X5R 0402-1

ROOM=PMU

C2043

1

20% VOLTAGE=6.3V X5R 0402-1

2

15UF

15

2

ROOM=PMU

C2044 100PF

5% VOLTAGE=16V NP0-C0G 01005 ROOM=PMU

SYNC_MASTER=N/A PAGE TITLE

XW2040

45_BUCK4_FB

12

SHORT-10L-0.1MM-SM 1 2

SYNC_DATE=N/A

SYSTEM POWER:PMU (1/3) DRAWING NUMBER

ROOM=PMU

Apple Inc.

V15

XW2080

2

Y13

11

VOLTAGE=1.1V

0.47UH-20%-3.8A-0.048OHM BUCK7_FB

PP1V1_SDRAM

2 PIQA20161T-SM

L2041

ROOM=PMU

SHORT-10L-0.1MM-SM 1

1

15UF

PIQA20121T-SM

XW2070

SHORT-10L-0.1MM-SM 1

C2012

10

VOLTAGE=0.9V 0.70V/0.80V/0.9V

1.0UH-20%-3.6A-0.060OHM

1

2

ROOM=PMU

20% VOLTAGE=6.3V X5R 0402-1

VDD_BUCK6

1.0UH-20%-2.25A-0.15OHM 11

2

PP_GPU

ROOM=PMU

J5 BUCK6_FB

PIXB2016FE-SM

ROOM=PMU

ROOM=PMU

2

15UF

2

CRITICAL

B15

L2070

C2071

ROOM=PMU

20% VOLTAGE=6.3V X5R 0402-1

PIQA20161T-SM

C17

A13

VDD_BUCK5

1.0UH-20%-2.25A-0.15OHM 2

1

2

20% VOLTAGE=6.3V X5R 0402-1

C2011

15UF

10

U17

H2

CRITICAL 45_BUCK6_FB CRITICAL

PP_CPU_SRAM VOLTAGE=1.0V 0.80V/0.90V/1.0V

BUCK6_LX0

1 ROOM=PMU

C2062

20% VOLTAGE=6.3V X5R 0402-1

L2012

L2060 0603

VOLTAGE=1.2V

1

ROOM=PMU

2

ROOM=PMU

BUCK7

2

IN

L2010

ROOM=PMU

PP1V2_CAMERA

2

A

SHORT-10L-0.1MM-SM 1

ROOM=PMU

ROOM=PMU

2

15UF

CRITICAL

1.0UH-20%-3.6A-0.060OHM

1UH-20%-1.2A-0.320OHM

400mA MAX

BUCK6

ROOM=PMU

2

20% VOLTAGE=6.3V X5R 0402-1

15UF

1

VBUCK4_SW BUCK8_FB

Y15

051-00648

REVISION

R

Z15

ROOM=PMU

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:

PAGE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

SHEET

IV ALL RIGHTS RESERVED

8

7

6

BUCK4

2

15UF

C2010

ROOM=PMU

C9

A15

M17 M19

XW2050

20% VOLTAGE=6.3V X5R 0402-1

ROOM=PMU

L2030

M18

ROOM=PMU

15UF

1

ROOM=PMU

4.7A MAX

2

20% VOLTAGE=6.3V X5R 0402-1

BUCK5_LX0

1 PIQA20161T-SM

C2051

C2009

ROOM=PMU

20% VOLTAGE=6.3V X5R 0402-1

BUCK3

1

2

1.5A MAX

BUCK5

2

15UF

2

15UF

1

L2011

L2050

C2050

1

20% VOLTAGE=6.3V X5R 0402-1

PIQA20121T-SM

1.0UH-20%-3.6A-0.060OHM

1

20% VOLTAGE=6.3V X5R 0402-1

ROOM=PMU

0.47UH-20%-3.8A-0.048OHM

V16 Z16

CRITICAL

VOLTAGE=0.85V

C2008

ROOM=PMU

20% VOLTAGE=6.3V X5R 0402-1

C2005

BUCK2

PP1V1

PP_FIXED

1

2

1

15UF

4.7A MAX

PP1V8_TOUCH PP1V8_IMU_OWL

Y16

7 6

2

B9

VDD_BUCK3

Z18

11

2

ROOM=PMU

U18 Y18

11

15UF

PIQA20161T-SM

A17

V18

B

C2007

ROOM=PMU

20% VOLTAGE=6.3V X5R 0402-1

C2004

1.0UH-20%-3.6A-0.060OHM

E17

12

1

1

B7

A9 VDD_BUCK1_01

E1

19

1

2

1

15UF

0.47UH-20%-3.8A-0.048OHM

J1

29

2

L2003

V12

N18

9 8 7 6 5 3

C2006

ROOM=PMU

20% VOLTAGE=6.3V X5R 0402-1

C2003

L2002

No share Dick itesla.solutions

12

2

1

15UF

CRITICAL

N17

13

20% VOLTAGE=6.3V X5R 0402-1

C2002

ROOM=PMU

C5

T18

Z12

20

1

15UF

BUCK1

100PF

21

2

C2001

10.5A MAX

C2099

1

28

2

PIQA20121T-SM

A7

J17 J18

29

1

10

VOLTAGE=1.03V 0.625V/0.9V/1.03V

A12

10UF

2.2UF

C2000 15UF

1.0UH-20%-3.6A-0.060OHM

BUCK INPUT

C2093

1

B5

VDD_BUCK0_01

A16

1

BUCK0_LX1

A5

ROOM=PMU

B16

1

CRITICAL

0.47UH-20%-3.8A-0.048OHM

A8 B8

ROOM=PMU

C3

L2001

A4 C4

PP_CPU

2 PIQA20161T-SM

BUCK0

ROOM=PMU

1

BUCK0_LX0

1

B3

12.5A MAX

20% 2 VOLTAGE=6.3V 2 CERM-X5R 0402-9

C2086

BUCK0_LX0

A3

SYM 2 OF 5 ROOM=PMU

F10

1.0UH-20%-3.6A-0.060OHM

CSP

BAT/USB

15

VCC_MAIN_SNS

D

L2000

5

4

3

2

1

4.0.0

20 OF 49 14 OF 60

SIZE

D

A

8

7

6

5

4

3

2 ANTIGUA LDO SPECS

ANTIGUA PMU - LDOs 33

D

26

25

24

22

21

17

1

C2120

1

10UF

10UF

20% 2 6.3V CERM-X5R 0402-9

XW2105

C2121

1

ROOM=PMU

C2122 10UF

20% 2 6.3V CERM-X5R 0402-9

20% 2 6.3V CERM-X5R 0402-9

ROOM=PMU

ROOM=PMU

SHORT-10L-0.1MM-SM OUT

VCC_MAIN_SNS

1

2

ROOM=PMU

1

C2123

1

10UF

1

10UF

20% 2 6.3V CERM-X5R 0402-9

20% 2 6.3V CERM-X5R 0402-9

ROOM=PMU

C2126

1

10UF

C2125 10UF

20% 2 6.3V CERM-X5R 0402-9

ROOM=PMU

1

C2124

ROOM=PMU

C2127

CRITICAL

10UF

20% 2 6.3V CERM-X5R 0402-9

20% 2 6.3V CERM-X5R 0402-9 ROOM=PMU

U2000 CSP M3

14

12

11

PP1V1_SDRAM

C2130 2.2UF

20% 6.3V X5R-CERM 0201

C

C2131

2

ROOM=PMU

U2

VDD_LDO5

L2 VDD_LDO6 Y6 VDD_LDO7

2

Y4 VDD_LDO8 Y3 VDD_LDO9

ROOM=PMU

R3

26

24

17

16

14

12

8

VDD_LDO10 VDD_LDO11

LDO

Z9

30

Y5 VDD_LDO13 Y7 VDD_LDO14

PP1V8_SDRAM

N2

C2132

1

20% 6.3V X5R-CERM 0201

2

P12 VPP_OTP

CSP

D12

B

A

50mA

LDO4 (D)

0.7-1.2V

+/-2.5%

50MA

LDO5 (F)

2.5-3.3V

+/-2.5%

1000mA

LDO6 (C1)

1.2-3.6V

+/-2.5%

150mA

LDO7 (C)

2.5-3.3V

+/-25MV

200MA

LDO8 (C)

2.5-3.3V

+/-25mV

200MA

LDO9 (C)

2.5-3.3V

+/-25mV

250mA

LDO10 (G)

0.7-1.2V

+/-2.5%

1335mA

LDO11 (C)

2.5-3.3V

+/-25mV

250mA

LDO12 (E)

1.8V

+/-5%

10mA

LDO13 (C)

2.5-3.3V

+/-25mV

250mA

LDO14 (H)

0.8-1.5V

+/-2.5%

250mA

LDO15 (B)

1.2-2.0V

+/-2.5%

50mA

VOLTAGE=3.0V

N1

VOLTAGE=0.8V

T1

D

VOLTAGE=3.0V VOLTAGE=3.3V

PP3V3_ACC

VOLTAGE=2.5V

PP3V0_PROX_ALS PP3V1_VIBE PP2V5_RCAM_AF

VOLTAGE=0.9V

PP0V9_NAND PP3V0_PROX_IRLED PP1V8_ALWAYS PP3V1_MESA PP1V2 PP1V9_MESA

13

LDO1 LDO2 LDO3 LDO4 LDO5

30

LDO6

5 24

25

26

30

31

33

11

VLDO6

K1

VBYPASS

K2

VLDO7

Z6

VOLTAGE=3.0V

VLDO8

Z4

VOLTAGE=3.1V

VLDO9

Z3

VLDO9_FB

Y2

RCAM_AF_FB

1

XW2100

2

ROOM=PMU

SHORT-10L-0.1MM-SM

21

LDO7 LDO8 LDO9

13

LDO10

20 32

Z8

VLDO11

R2

VOLTAGE=3.0V

VLDO12

K6

VOLTAGE=1.8V

VLDO13

Z5

VOLTAGE=3.1V

VLDO14

Z7

VOLTAGE=1.2V

VLDO15

P2

VOLTAGE=1.9V

VPUMP

U19

LDO11 LDO12 LDO13 LDO14 LDO15

20 8 12

17

27 5 6 7 27

45_PMU_VPUMP

C2100

1

20% 6.3V X5R-CERM 01005

C2101

1

2.2UF

47NF

ROOM=PMU

2

C2103

1

2.2UF

20% 6.3V X5R-CERM 0201

2

ROOM=PMU

C2107

1

2.2UF

20% 6.3V X5R-CERM 0201

2

ROOM=PMU

C2109

1

2.2UF

20% 6.3V X5R-CERM 0201

2

ROOM=PMU

C2111

1

2.2UF

20% 6.3V X5R-CERM 0201

2

ROOM=PMU

C2113

1

2.2UF

20% 6.3V X5R-CERM 0201

2

ROOM=PMU