N71位置图 TOP
TP3_RF n o_refdes+9
n o_refdes+3
L 5402_RF
U5411_RF
C5404_RF
C5403_RF
C5314_RF
FD0501 TP5304_RF TP5303_RF
TP23 TP22
PP08
n o_refdes+4
PP07
FD0511
TP20
TP07
TP06
TP21
C3203
FL3201
JWLA T_RF
FL3200
C4115 C4111
C4122
C4106
P P5298_RF P P5292_RF P P5293_RF P P5301_RF P P5299_RF P P5300_RF P P5289_RF
C4123
C4105
FL4702 C4702
C4200
R3141 FL3150
C3121 FL3126 C3129
FL4230
C3143
L3100
C4224
FL4210 FL3102
FL4254
FL3151 FL3152
C5122_RF
Q3140
FL4120
R0950
C4124
C4209 C4204 C4207 FL4200
C4102
C3123
C3124
FL3202
C4251
C4127 C4118
C4700 FL4701 C4701 FL4700
J4200 FL3156
P P5297_RF P P5295_RF P P5296_RF
C4120
C4128 R4115 C4107
FL4207 C4203 C4206 C4208 C4205
R4220 R4222
FL4241
C4117 C4116
FL4212
C3232
FL4209
FL4211
C3122
C4112
C4125 C4126
DZ3151
C4110 C4101 C4100
FL4134
R4116 R4111
XW3630
DZ3152
FL4131 FL4130 C4130 R4131 R3203 C4132 J4100
U4240
C3206
C4134 C4133
R4117
FL4105
C3140 C3146 DZ3155
BS0503
PP4100
C4131
FL4112
FL4107
C3144
R3140
C3125
C3205
C4103
U4100
J3100
C3113
C3220
C4104
FL4100
C3126 C3120 DZ3156 C3145 DZ3150
L 5112_RF
C3211
R3144
C3200
C3130
FL4251 C3128
R3143 C3127 FL4252
L3102 L3101
C4241 FL4250
C4250 C4232 FL4232
C4223 C4253
C3103 C3102
FL4253 C4252 C4230
TP5101_RF
C4210
C4240
C4220 FL4220
C5111_RF
C4231 FL4231
TP5100_RF L 5122_RF C5112_RF
C4254 C4255
R4240
FL4255
TP5102_RF
C3221
L4200
R4130 FL4110
L4202
C3202 C3201 C3233
FL3231 FL4213
C4215
L4201
C3234 C3230 C3299
FL4208 FL4205 C4201 FL3232
FL4221 C4221 C4222
C3231
C4202
BOT
TP17
C4213 C4211 FL3230 C4212
J3200 TP16
FD0510
FL3220
DZ4713
C4722 C4721 C4724 C4723
BS0505
C5312_RF U3200
n o_refdes+7
C3210 C5313_RF
P P3001_RF P P3002_RF
R4710
DZ4711
DZ4712
FL4720 C4712 J4700
n o_refdes+5
XW3620
FD0503
DZ4710
C4720
C5316_RF
C5315_RF
C5401_RF C5405_RF R2220 C2220
FL4712 n o_refdes+10
C5319_RF
C5408_RF C5402_RF
L 5401_RF
C5407_RF
C0553
C5409_RF
L 5400_RF
C0552
BS0508
L 5403_RF
TPUA T_RF
C0 C0 55 55 0 1
C5132_RF
R5132_RF
C5318_RF
BS0507
R4125
BS0506
C3204
820-5507-A
P P5202_RF C4121 P P5203_RF
C3111
DZ3153 C3110 C3100 C3104 DZ3154 C3112
CL0502
R4902_RF
R4901_RF
02 05
U5101_RF
BS
C4041
XW
0 22 1
C3117_RF C3112_RF C3103_RF C3106_RF C3114_RF C3109_RF
C3124_RF C3122_RF C3111_RF C3121_RF C3102_RF C3119_RF
C3107_RF C3212_RF C3214_RF C3204_RF
U_BB_RF
C3218_RF C3210_RF
C1542 C1520
C1527
C3211_RF C3202_RF
C1521
C1523 C1534
L 3903_RF
C4410_RF
C2051
C2050 L2050
C4201_RF
L 4404_RF
L 4222_RF L 4221_RF L 4223_RF
FLDIP_RF
C2300
C2310
C2322
R2310 R2311 C2410
C3744 C3743
Q2300
C4624
C4622 C4640 C4621
FL4614 C4614 C4620
L 4106_RF C4109_RF
C4502_RF
C2331 C2330
C4510_RF C4506_RF
C3730 R3702 R3701 R2320 C3705 C3709
C3735 C3795
C4652
C2400
C4804_RF
C3732 U2300
X W3616_RF
L 4224_RF C2302 C2301
L2300 C4703_RF C4701_RF
L 4410_RF L 4408_RF
L 4405_RF
C4705_RF
C3917_RF
L 4403_RF
L 4802_RF
L 4803_RF
C3746 R3729
L 4703_RF
C3916_RF
L 4502_RF C3813_RF C3805_RF C4656
C3904_RF
C4308_RF
R3013_RF
C4605_RF C4000_RF L 4604_RF
C3801_RF
C3101_RF
C3814_RF C2321
R2301
C3616_RF
C3808_RF FLFB R_RF
R2302
C3806_RF C3812_RF C4615 C4613 FL4613
L 4305_RF C4306_RF
C3863
R3401_RF
C3802 C3803_RF
C3223_RF
L 4220_RF
L 4407_RF
C4500
C4108_RF C3810_RF
R3407_RF
C3605_RF
C3607_RF
C1531
R3413_RF DZ30 1_RF
C3621_RF
C3606_RF
C3627_RF
U_WTR_RF
L 4202_RF
C3704 XW3702
C3737
C4642 FL4615
C5006_RF
C3640_RF
C3907_RF
C3908_RF L 3909_RF
L 4908_RF C4906_RF L 5001_RF
C3617_RF C3624_RF
C3002_RF
L 3908_RF C3912_RF
L 4101_RF R4101_RF
C3401_RF
FLGPS_RF TP08
J_LA T_RF
C3608_RF
C3811
J4600
C3626_RF
C3118_RF C4101_RF C3220_RF R3509_RF C4114_RF
C4106_RF R3801_RF C3809_RF R3802_RF
U_PMU_RF
L 4804_RF
FL4620
R3503_RF
C4501
C3125_RF
R3504_RF
C4502
R3406_RF
C4105_RF
L4522 C4301_RF
C3215_RF
C3503_RF
C3501_RF C3630_RF
L4521 L 4303_RF
Y _XO_RF
L 4504_RF
FL3803
C4205_RF
FL3804
C1517
R3603_RF
C3740
C3805 R3801 XW3801 R3802 XW3802 C3804
R3402_RF J2400
R4640
C3832
C3840
C1504 C3701
R0903 R0902
R3501_RF R0702 R2200 R1560 R1561 C1560 C1561
FL4600
FL4612
C4406_RF
C3835
C3803
C4503_RF
C3846
C4602_RF X W4500_RF C4601_RF
C3842
L 4205_RF C4206_RF
C3837
C4207_RF L 4214_RF
C4309_RF
C1507
R4301_RF
C4607
C4604_RF L 4603_RF
C1503
C4107_RF
C4697 DZ4604 C4696 DZ4610 C4698 DZ4601 DZ4600 C4699 C4610 FL4610 C4641
L 4301_RF
C4603_RF
L 3901_RF C3903_RF C3901_RF
C1500 R3404_RF
C3404_RF
C3301_RF
R3703_RF C3708_RF
TP09
TP00
DZ4602
C1505
C1543 TP10
n o_refdes+6
FL4611
C4611 DZ4603 C4606
C1548 C1541 R3403_RF
U_QP T_RF
C3022
U1500
R2230
C3706_RF
C3203_RF
C1540 L 4501_RF
X W3702_RF
R3302_RF R3301_RF
R3303_RF
C3021
C1522 L 4210_RF
X W3701_RF
C3205_RF C3208_RF
C4623 C4612
R1002
L 4218_RF C4211_RF
L 3602_RF
X W3619_RF
C3229_RF
L3800
C0715 C0716
X W3613_RF
FL0610 R0922
L 4207_RF
C2031
L2030 40 22 2 30 XWW2 X
XW XW
C3010
C3113_RF
X W3614_RF
CL0501
X W3615_RF
C1122
C0650 L2060
C4208_RF
C2030
C2042
C2040 L2041
L2040 40 20 XW 00 XW2105 22
R3550 R3515 C3506 C3505
C3650
C1223
C1203
L 4216_RF
C2032 R0809
C2043
U3300
L3300
00 21
XW1100 C3663 C3662
C2132
C1156
C1115 C0603 C0600 R0600 C2008 C1201
C0612
C0620
C2088 R2260
C1124
R2205
C1320 C2005
C2085
C0651
C0610
C1136
C3123_RF C3104_RF
C2125
L3700
C2333
R2300
C2332
FL4642 FL4641
C3702 FL4631 C3763 FL4630 C4634 C4636 C4630 FL4632 FL4633 C4632
C1322
R0802 R0801 R0803
C3308
C3373
C3396
C4023
D4020 L4020
L4021
C3007C3006
UQPL_RF
C5007_RF L 5410_RF
R5402_RF
R5401_RF
L 4904_RF
L 4905_RF
L 4903_RF
L4040
FL3111 R4020
01 05 BS
FL3155
R0805
C1227 C2203
U2000
C1150
C0718 C0717
C1317
C1250
DZ30 2_RF
C3116_RF
C3701_RF C4403_RF
C4303_RF
TP05
FD0515 TP11
FL4624
C4654
C2412 C2411
R2400
C4651
C4655
R3735
C2303
FL4621
R4623
C2087
C1532
U3010
C3110_RF
C4203_RF
L 4302_RF
C2305
C2304
ULBPA_RF
UHBP A_RF
C4408_RF
L 4705_RF
C2320 C2323
TP15
TP02
FL4606
C1123
R1521
R3411_RF
R3409_RF C3403_RF C4202_RF
X W3801_RF
L 4307_RF
L 4701_RF
U3700
XW 37 R3703 01
FL4605
R4600C4600
FL4603 FL4601
FL4607 FL4604 C4633 C4637 C4631 C4635 C3700 C3760
C4650
L 4706_RF
C4704_RF
C4802_RF
C4801_RF
C4803_RF
L 4203_RF
L 4805_RF
C2307
C4653
L 3902_RF C3913_RF C3915_RF
UMBP A_RF
C3801
C4702_RF
UHAS M_RF
L 4212_RF
L 4213_RF L 4204_RF
C4805_RF C4807_RF
C2311
L 3904_RF
L 4104_RF R4104_RF
R0722
R3408_RF P P3053_RF
C2306
C3729
TP03
BS0500
C4407_RF C4806_RF
C3745
L 4601_RF
R4622
FD0505
C3402_RF
L 4406_RF C4405_RF C4409_RF L 4401_RF
UDIV A_RF
ULAS M_RF
C4209_RF
L 4215_RF L 4206_RF
L 4209_RF
C3741 C3742
X W3802_RF
P P3056_RF
J5002_RF
C3804_RF
L 4801_RF
L 3922_RF
C3902_RF C3914_RF
XW2400
J5001_RF
L 4602_RF
R4202_RF
C4214_RF
C4213_RF
L 4211_RF
L 4605_RF
L 4219_RF C4212_RF
C4508_RF
C4505_RF
C4507_RF
C3811_RF
L 3701_RF
R3410_RF
C1515
C3802_RF
L 4201_RF
C3807_RF
C4307_RF L 4306_RF C3905_RF
C3705_RF L 3704_RF P P3090_RF
SH0502
FD0514
Q4500
C3815_RF
C4104_RF C4110_RF C4112_RF
R3803
PP4500 R4500
R4201_RF
C3922_RF C3910_RF L 3912_RF C3911_RF L 3910_RF C3909_RF
U4500
L 4105_RF
C3860
L 4103_RF
C4302_RF
P P3075_RF
C3707_RF
C4504
C4503
C3115_RF
L 3911_RF
C3105_RF
R4105_RF
C3906_RF
L 3919_RF
L 3907_RF
C3108_RF
C3226_RF
C3919_RF C3920_RF
R3810 R3811
R3502_RF
R3505_RF
C3918_RF
C3810
C3120_RF
C3227_RF C3225_RF
XW3810
C3809 C3407_RF
C3614_RF
L 3703_RF
C1528 C3829
XW3811
X W3618_RF C3704_RF
L 3702_RF X W3603_RF
C1516
R3829
C3800
C3631_RF
C3619_RF
R3304_RF
R3508_RF
C4501_RF R4501_RF
L 3705_RF
C2230
FL4602
R1530
C1547
C1546
C3632_RF
C3213_RF
L 3906_RF
C1506
R3835
R3506_RF C3502_RF
P P3033_RF
C3603_RF
C3921_RF
L 4503_RF
P P3017_RF
C3830
P P3018_RF
L 3905_RF
U2GPA_RF
C1530
C3618_RF
C3633_RF
C3635_RF
C3636_RF
U3301_RF
C1551
C1554
R1500
C3629_RF
C3625_RF
C3615_RF
Q2301
C3634_RF
C3406_RF UEPRM_RF
R4106_RF
C3405_RF R3004_RF
C3622_RF
P P3032_RF
C3012
X W3602_RF
L 3604_RF
C3702_RF
C4305_RF L 4304_RF
L 3603_RF
X W3610_RF
C3609_RF
C1510
C1508
SH0504
U3800
L 3601_RF
P P3036_RF X W3607_RF R3305_RF R3306_RF
P P3037_RF P P3034_RF
X W3803_RF
C2019
C2094
R1520
P P3054_RF
R3414_RF
X W3609_RF
C2093
C1526
X W3612_RF
C5101_RF
X W3501_RF
C3207_RF C3206_RF
R3412_RF C3302_RF C3219_RF
X W3606_RF
C1501
R3032
C3031
C1533
C1524
C1511
n o_refdes+8
X W3611_RF
C3895 P P3073_RF C3216_RF
C3013 C3209_RF
C3032
C2124
C1529
R3030
X W3601_RF
U3030
R3031
C3612_RF
C1153
C2090
C0611
C3603
UBUFR_RF
C3848
C3610_RF
R3020
P P3052_RF
L 3605_RF
C2126
C1512
R1501 C1513 C1550
P P3051_RF
n o_refdes+1
X W3608_RF
C1240
C2015 C0705
P P3085_RF P P3074_RF P P3013_RF SH0501
PP1521
C1525
P P3081_RF
P P3080_RF P P3020_RF P P3016_RF
C3613_RF
C1133
L4000 C4000
C2080 C0731
C0602 C0601
U4000
C2060
P P3084_RF
C1242
X W3604_RF X W3605_RF
R0804 R5213_RF
C5284_RF
C5283_RF
R5316_RF
U3500 C1105
C2018
C4005 C4004
C1314 C0702 C0701 C0706
C1135 C1302
C1141
C1312
C2061
C1157 C1134
C0704 C0703
C3651
C1138
C1140
C0707 C0708
C1300
C5322_RF
R5301_RF
C1220
C1137 C2102
C2106
R0700
C2103
P P3012_RF P P3076_RF
X W3617_RF C3611_RF
C5317_RF
Q 5301_RF C3612 C1244
C3554 C3552
U5301_RF
C2089
R0406
C1139
C1126
P P3009_RF
C1502
C5330_RF
C2108
C2091
R0404
C3611 C3665 C3670 R5315_RF C3610
C5308_RF C5310_RF R5303_RF C2099
R0945 R0410 R0411
PP1501
C1121
P P5100_RF
C3620_RF
R2240
C3504
C1130
PP1500
P P3008_RF
PP1520
C2120
C2240
C2111
L 5202_RF
L 5205_RF C2024 X W2_RF X W1_RF C5320_RF R5310_RF L 5301_RF C5304_RF
FL3104
X W3_RF
C5215_RF C2097
XW2070 PP1503 J3001_RF
C1125
R0921
PP1502 P P3011_RF
P P3010_RF C1222
Y0600
L2001
C1202
R0930 C2112
C1132 C1128
PP1504
VIETMOBILE.VN
C1246
C1113 C1120
C1221
C2110
R2261
R1021
L2002
R5202_RF
C5205_RF
R5200_RF
T5301_RF
C3105 C3101
R0907 R0721 R0904
L 5204_RF C5203_RF
F5202_RF C4002
FL3153 FL3154
P P3014_RF PP1505
R1205
R1203 PP1100
C3020 C1514
U3020
XW2050
R5205_RF
R0905
C4008
XW2030
C4902_RF
C5209_RF
C3387
PP0601
PP0903 PP0902
C1104
PP1101
C1129
C2071
C2070
C1245
R4510 C4510 R0720
C2260
R1020
C4020
C5212_RF F5201_RF
C3005 C3004
C5208_RF
R0900
U3000
C3003 C3001
PP0600
C2123
R3507_RF
C2007
P P3091_RF
n o_refdes+2
P P3077_RF
V R301_RF
L2012 R0951 C0730 R0730 PP0610
R0403
R0402 R0401 R0400
C2017
C3000
C3002
L2011 R1201 R0409 R0640
PP1023
C1316
C1114
C2016
R4720
XW2080 R0405
C2001
C2006
R0407 R0940 R0941 R0910 R0408
R3503 R3502
C0815 C0801
XW0650
XW0740 R0909
C1323
C1111
C2010
C1313
C4713 C4710
L2000
C3601
C1116 C1100
C1224
C1106
C1127
C2009
C4022
C1301
C0541 C0542
C3551
C3654
C1225 C1101
C1226
C1108
C1131
C2101
C1321
C0741
C0750
C0743
C0751
C2062
C2105
TP1120
TP1100
L2070
C2121
C1107
C1117
C1154
C2131
C3025
C2044
C0543 C0540
C3550
PP1002
PP1104
C2127
C0814 R0952
C2130
C1155
C2201
C2104
C2270
R2270
R2250
R0650 R0651
C2250 C0752
C1248
C1243
C2002
C2114
L2003
0
C1109 C2096
C2011
C2098
C2003
R2201
C0740
C2023
C3661
C0802
36 0
C1110
C1112
C2095 PP1105
XW
C3664
C3640
C3653
C2012
C0742C2200
R0960
R1204
R1200
XW1110
C4026 C3600 C3602 C3660
FL1280 C1280
R1202 C3023 C3024
U4020
C3394
D4021
C2210 R2210
L 5100_RF
J5003_RF
C4025
C4040
C4024
C3652
C2205
R0920
C2013
C2000
R4021
XW3660
C2092 C2202 C1330
C2026
XW2220
C3106
C5200_RF
PP1102 C2100 C1103
Y2200
C2025
XW1120
U0600
R4040
C2081
C1200
C1151
C2020
C2004
FL3100
R3650
R0901
C2086
PP0906
L2013
U4040
C4043
C5302_RF R5314_RF R5302_RF
C4003
C1247
L2080
C2021
C0712 C0711
TP5301_RF
C5323_RF
U5302_RF
C1310
L2020
C2122
P P5285_RF
C0900
U0900
FL3146
C4006
C2113
C5321_RF
C1241 C2014
C3386
R4041
R5305_RF
PP1021
PP0900
P P5288_RF
C4042
L 5303_RF
C4007
C4021
L2021
SH0503 C2109
C5201_RF C2500_RF
L 5302_RF
C4001
P P3019_RF
PP0901
R0906
P P5302_RF
L 5201_RF
C5324_RF C5303_RF
C5309_RF C5311_RF R5304_RF
P P3006_RF
FL4711
C4711
TP18
R0911
J5004_RF
C0709 C0710
L 5206_RF
P P5287_RF P P5286_RF
C2022
J5100_RF
FD0513
P P5201_RF P P5200_RF TP19
L2010
PP0904
FL3110
P P3063_RF
J_UA T_RF
C3008
C4903_RF
C4905_RF C4904_RF C2107
C5210_RF
P P5291_RF
PP0905 R0701
P P3062_RF
P P3064_RF P P3066_RF SH0500
FL4713
C4901_RF L 4907_RF
U5200_RF
P P5290_RF
C3010_RF
L 5407_RF
P P5303_RF
U_VOX_RF
P P5305_RF R3142
P P3067_RF P P3065_RF
R5204_RF C5207_RF
L 5408_RF
C5211_RF
R5206_RF
F5203_RF
C2041
FD0504 P P5294_RF
R3014_RF R0806 R0808 R0807
FD0512
C2115
FL3125
FD0502
TP01
TP13
TP12
TP14
8
7
6
5
4
3
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
2 REV
1 ECN
CK APPD
DESCRIPTION OF REVISION
DATE A
0004536627
PRODUCTION RELEASED
2015-07-21
N71 MLB - PVT OK2FAB D
D
LAST_MODIFICATION=Tue Jul 21 11:39:02 2015 PAGE
<CSA>
1 2 3 4 5 6 7 8 9
C
B
1 3 4 6 7 8 9 10 11 12 13 15 20 21 22 23 24 30 31 32 33 35 36 37 38 40 41 42 45 46
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
CONTENTS
SYNC
DATE
PAGE 31 32 33 34 35 36 37 38
TABLE OF CONTENTS SYSTEM:BOM TABLES SYSTEM:N71 SPECIFIC SYSTEM:MECHANICAL SOC:JTAG,USB,XTAL SOC:PCIE SOC:CAMERA & DISPLAY SOC:SERIAL & GPIO SOC:OWL SOC:POWER (1/3) SOC:POWER (2/3) SOC:POWER (3/3) NAND
39 40 41 42
SYSTEM POWER:PMU (1/3) SYSTEM POWER:PMU (2/3) SYSTEM POWER:PMU (3/3) SYSTEM POWER:CHARGER SYSTEM POWER:BATTERY CONN SENSORS:MOTION SENSORS CAMERA:FOREHEAD FLEX B2B CAMERA:REAR CAMERA B2B CAMERA:STROBE DRIVER AUDIO:CALTRA CODEC (1/2)
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
<CSA> CONTENTS 47 I/O:DOCK FLEX B2B 49 I/O:BUTTON FLEX B2B BASEBAND:RADIO SYMBOL page1 ELNA & UAT ANT FEED FE: ANT CONNECTORS AND UAT TUNER WLAN LAT 2.4GHZ BAW BPF DEBUG CONN & TEST POINTS CELLULAR BASEBAND: POWER1 CELLULAR BASEBAND: POWER2 CELLULAR BASEBAND: CONTROL AND INTERFACES CELLULAR BASEBAND: GPIOS CELLULAR PMU: CONTROL AND CLOCKS CELLULAR PMU: SWITCHERS AND LDOS CELLULAR PMU: ET MODULATOR CELLULAR TRANSCEIVER: POWER CELLULAR TRANSCEIVER: PRX PORTS CELLULAR TRANSCEIVER: DRX/GPS PORTS CELLULAR TRANSCEIVER: TX PORTS CELLULAR FRONT END: LB PAD CELLULAR FRONT END: MB PAD CELLULAR FRONT END: HB PAD CELLULAR FRONT END: 2G PA CELLULAR FRONT END: LB ASM CELLULAR FRONT END: MB-HB ASM CELLULAR FRONT END: DIVERSITY SIM WIFI/BT: WIFI/BT MODULE STOCKHOLM
SYNC
DATE
C
VIETMOBILE.VN
AUDIO:CALTRA CODEC (2/2) AUDIO:SPEAKER DRIVER AUDIO:ARC DRIVER DISPLAY:POWER TOUCH:ORB & MESA B2B DISPLAY:KEPLER B2B I/O:TRISTAR 2
B
TABLE
BOM BOM BOM BOM BOM BOM BOM BOM BOM BOM
SCH 051-1902 BRD 820-5507 MCO 056-01060 A
8
7
6
639-00263 639-00265 639-00266 639-01056 639-01057 639-01058 639-01098 639-01100 639-01099 939-01627 5
(BETTER,DB30) (ULTRA,DB30) (SUPREME,DB30) (BETTER,B30) (ULTRA,B30) (SUPREME,B30) (BETTER,DB30C) (ULTRA,DB30C) (SUPREME,DB30C) (BETTER,DARWIN) 4
TABLE OF CONTENTS
A
DRAWING TITLE
SCHEM,SINGLE,BRD,N71 DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
3
2
A.0.0 BRANCH
PAGE
1 OF 49 SHEET
1 OF 59
1
SIZE
D
8
7
6
SCHEMATIC & PCB BOM CALLOUTS
5
4
ALTERNATE BOM OPTIONS
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
CRITICAL
?
1
SOC/PMU SUB BOMS
TABLE_5_HEAD
PART#
2
3
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
TABLE_5_HEAD
COMMENTS:
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
D
051-1902
1
SCH,SINGLE_BRD,N71
SCH
TABLE_5_ITEM
TABLE_ALT_ITEM
138S00032
138S0831
ALTERNATE
C0610
TY,2.2UF,0201
TABLE_5_ITEM
820-5507
1
PCBF,SINGLE_BRD,N71
PCB
CRITICAL
?
NOT ALL REFERENCE DESIGNATORS LISTED. USED ~116 TIMES IN DESIGN.
685-00069
138S0831
ALTERNATE
C0610
USED ~116 TIMES IN DESIGN.
KYOCERA,2.2UF,0201
SUBBOM_SOC
SUBBOM,SINGLE,BRD,MAUI,N71
338S00120
1
IC,PMU,ANTIGUA,A0,D2255A1,OTP-AL,WLCSP380
U2000
MAUI
118S0631
1
RES,MF,100 OHM,1%,1/32W,01005
R0730
MAUI
131S0307
1
CAP,CER,NP0/C0G,100PF,5%,16V,01005
C0730
MAUI
339S00112
1
PROD FUSED, H DRAM
U0600
MAUI
117S0161
1
RES,MF,0 OHM,1/32W,01005
R0651
MAUI
TABLE_5_ITEM
825-6838
1
EEEE CODE FOR 639-00263
EEEE_G2KM
CRITICAL
TABLE_5_ITEM
EEEE_16G_DB30
TABLE_ALT_ITEM
155S0660
155S0513
ALTERNATE
FL3100
USED ~7 TIMES IN DESIGN.
MURATA,FERR,22-OHM
TABLE_5_ITEM
825-6838
1
EEEE CODE FOR 639-00265
EEEE_G2KN
CRITICAL
EEEE_64G_DB30
825-6838
1
EEEE CODE FOR 639-00266
EEEE_G2KL
CRITICAL
EEEE_128G_DB30
TABLE_5_ITEM
TABLE_ALT_ITEM
138S00005
138S00003
ALTERNATE
C2000
USED ~63 TIMES IN DESIGN.
TY,15UF,0402
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
138S00048
138S00003
ALTERNATE
C2000
USED ~63 TIMES IN DESIGN.
KYOCERA,15UF,0402
TABLE_5_ITEM
825-6838
1
EEEE CODE FOR 639-01056
EEEE_GKF9
CRITICAL
EEEE_16G_B30
825-6838
1
EEEE CODE FOR 639-01057
EEEE_GKFC
CRITICAL
EEEE_64G_B30
D
COMMON TABLE_5_ITEM
TABLE_ALT_ITEM
138S00049
1
TABLE_5_ITEM
TABLE_ALT_ITEM
138S0702
138S0657
ALTERNATE
C2111
USED ~3 TIMES IN DESIGN.
MURATA,4.3UF,0610
TABLE_5_ITEM
TABLE_ALT_ITEM
118S0764
ALTERNATE
118S0717
R2250
PANASONIC,3.92K-OHM,0201
TABLE_5_ITEM
1
825-6838
EEEE_GKF8
EEEE CODE FOR 639-01058
CRITICAL
TABLE_5_HEAD
EEEE_128G_B30
PART#
TABLE_ALT_ITEM
138S00006
138S0835
ALTERNATE
C1106
USED ~19 TIMES IN DESIGN.
TY,4.3UF,0402
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
825-6838
1
EEEE CODE FOR 639-01098
EEEE_GLHL
CRITICAL
EEEE_16G_DB30C
825-6838
1
EEEE CODE FOR 639-01100
EEEE_GLHR
CRITICAL
EEEE_64G_DB30C
TABLE_5_ITEM
TABLE_ALT_ITEM
152S2052
152S1929
ALTERNATE
L2060
338S00122
1
IC,PMU,ANTIGUA,D2255A1,OTP-ZL,WLCSP380
U2000
MALTA
118S00009
1
RES,MF,3.01KOHM,1%,1/32W,01005
R0730
MALTA
131S0307
1
CAP,CER,NP0/C0G,100PF,5%,16V,01005
C0730
NOSTUFF
339S00124
1
M DEV FUSED, M DRAM
U0600
MALTA
118S00025
1
RES,MF,330 OHM,1%,1/32W,01005
R0651
MALTA
CYNTEC,1UH,1608
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
155S0773
155S0453
ALTERNATE
FL3110
USED ~61 TIMES IN DESIGN.
TY,FERR,120-OHM,01005
TABLE_5_ITEM
825-6838
1
EEEE CODE FOR 639-01099
EEEE_GLHM
CRITICAL
EEEE_128G_DB30C
825-6838
1
EEEE CODE FOR 939-01627
EEEE_GR09
CRITICAL
EEEE_16G_DARWIN
TABLE_5_ITEM
TABLE_ALT_ITEM
377S0140
377S0168
ALTERNATE
DZ3150
USED ~9 TIMES IN DESIGN.
TDK,VARISTOR,6.8V,100PF,01005
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
155S00067
155S0581
ALTERNATE
FL4200
USED ~8 TIMES IN DESIGN.
TDK,FERR,240-OHM,0201
TABLE_5_ITEM
TABLE_ALT_ITEM
155S00012
155S00009
ALTERNATE
L3100
USED ~11 TIMES IN DESIGN.
MURATA,CHOKE,65-OHM,0605 TABLE_ALT_ITEM
138S0706
S3E NAND BOM OPTIONS
138S0739
ALTERNATE
C3302_RF
MURATA,CAP,CER,1UF,20%,10V,X5R,0201 TABLE_ALT_ITEM
138S0945
138S0739
ALTERNATE
C3302_RF
KYOCERA,CAP,CER,1UF,20%,10V,X5R,0201
155S00095
155S00068
ALTERNATE
FL1280
FERR BD,100 OHM,25%,100MA,2 OHM,01005
138S0648
138S0652
ALTERNATE
C3650
TY,4.7UF,0402
USED ~17 TIMES IN DESIGN. USED ~17 TIMES IN DESIGN.
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
685-00070
685-00069
ALTERNATE
SUBBOM_SOC
SUBBOM,SINGLE,BRD,MALTA,N71
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
335S00039
1
U1500
NAND,1YNM,16GX8,S3E,64G,T,SLGA70
CRITICAL
NAND_16G
TABLE_ALT_ITEM
USED ~12 TIMES IN DESIGN.
TABLE_5_ITEM
335S00075
C
1
U1500
NAND,1YNM,64GX8,S3E,MLB,64G,H,SLGA70
CRITICAL
NAND_64G
TABLE_ALT_ITEM
132S0400
132S0436
ALTERNATE
C1280
USED ~2 TIMES IN DESIGN.
CAP,CER,X5R,0.22UF,20%,6.3v,01005
C
TABLE_5_ITEM
335S00079
1
U1500
NAND,1YNM,128GX8,S3E,TLC,128G,H,SLGA70
CRITICAL
NAND_128G
SOC ALTERNATES
TABLE_ALT_ITEM
155S0960
155S0941
ALTERNATE
FL3151
FEER BD,70 OHM,25%,300MA,0.4 DCR,01005
138S00024
138S0986
ALTERNATE
C1107
CAP,CER,3-TERM,7.5UF,20%,4V,0402
335S00066
335S0946
ALTERNATE
U0900
IC,EEPROM,16KX8,1.8V,I2C,WLCSP4
USED ~9 TIMES IN DESIGN. TABLE_ALT_ITEM
TABLE_ALT_HEAD
USED ~7 TIMES IN DESIGN.
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
339S00113
339S00112
MAUI
U0600
PROD FUSED, M DRAM
339S00114
339S00112
MAUI
U0600
PROD FUSED, S DRAM
339S00125
339S00124
MALTA
U0600
M PROD FUSED, H DRAM, ATK
339S00126
339S00124
MALTA
U0600
M PROD FUSED, S DRAM, ATK
339S00127
339S00124
MALTA
U0600
M PROD FUSED, M DRAM, SCK
339S00128
339S00124
MALTA
U0600
M PROD FUSED, H DRAM, SCK
339S00129
339S00124
MALTA
U0600
M PROD FUSED, S DRAM, SCK
TABLE_ALT_HEAD TABLE_ALT_ITEM
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_ITEM
TABLE_ALT_ITEM TABLE_ALT_ITEM
155S0653
335S00074
335S00039
NAND_16G
U1500
HYNIX 16G SLGA70 C DIE
335S00078
335S00075
NAND_64G
U1500
HYNIX 64G SLGA70
335S00064
335S00075
NAND_64G
U1500
SANDISK 64G SLGA70 1Z
335S00065
335S00079
NAND_128G
U1500
SANDISK 128G SLGA70
155S0511
ALTERNATE
FL4600
USED ~4 TIMES IN DESIGN.
FERR BD,33 OHM,25%,750MA,0.09DCR,0201
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
POWER INDUCTOR ALTERNATES
VIETMOBILE.VN
TABLE_ALT_ITEM
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
152S00120
152S00077
ALTERNATE
L2070
TAIYO 2016 1.0UH 0.65MM
152S00118
152S00075
ALTERNATE
L3700
TAIYO 2016 1.2UH
TABLE_ALT_ITEM
TABLE_ALT_ITEM
CARBON/ACCEL BOM OPTIONS
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
338S1163
1
IC,ACCEL,3-AXIS,DIG,BMA282,LGA14
U3030
NOSTUFF
117S0202
1
RES,MF,20 OHM,5%,1/32W,01005
R3030
NOSTUFF
ACTIVE DIODE ALTERNATE
TABLE_5_ITEM
INDUCTOR SUB BOMS
TABLE_ALT_HEAD TABLE_5_ITEM
117S0202
1
RES,MF,20 OHM,5%,1/32W,01005
R3031
NOSTUFF
117S0202
1
RES,MF,20 OHM,5%,1/32W,01005
R3032
NOSTUFF
138S0831
1
CAP,CER,X5R,2.2UF,20%,6.3V,0201
C3031
NOSTUFF
132S0316
1
CAP,CER,X5R,0.1UF,20%,6.3V,01005
C3032
NOSTUFF
338S00017
1
IC,CARBON,MPU-6700-12,LGA16
U3010
INVENSENSE_CARBON
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
376S00047
ALTERNATE
REF DES
COMMENTS:
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM TABLE_ALT_ITEM
376S00106
Q2300
TABLE_5_ITEM
DIODES INC. ACT DIODE
685-00081
1
SUBBOM,SINGLE,BRD,CYNTEC,N71
SUBBOM_IND
COMMON
152S00074
6
IND,PWR,SHLD,1.0UH,3.6A,0.060 OHM,2016
L2000,L2002,L2010,L2012,L2020,L2030
CYNTEC
152S00074
5
IND,PWR,SHLD,1.0UH,3.6A,0.060 OHM,2016
L2040,L2050,L2300,L3300,L4021
CYNTEC
152S00081
6
IND,PWR,SHLD,0.47UH,3.8A,0.048 OHM,2012
L2001,L2003,L2011,L2013,L2021,L2041
CYNTEC
TABLE_5_ITEM TABLE_5_ITEM
TABLE_5_ITEM TABLE_5_ITEM
B
SHIELD PART NUMBERS
TABLE_5_ITEM
B
TABLE_5_ITEM
TABLE_5_ITEM TABLE_5_HEAD
338S1163
1
IC,ACCEL,3-AXIS,DIG,BMA282,LGA14
U3030
INVENSENSE_CARBON
117S0202
1
RES,MF,20 OHM,5%,1/32W,01005
R3030
INVENSENSE_CARBON
117S0202
1
RES,MF,20 OHM,5%,1/32W,01005
R3031
INVENSENSE_CARBON
117S0202
1
RES,MF,20 OHM,5%,1/32W,01005
R3032
INVENSENSE_CARBON
138S0831
1
CAP,CER,X5R,2.2UF,20%,6.3V,0201
C3031
INVENSENSE_CARBON
132S0316
1
CAP,CER,X5R,0.1UF,20%,6.3V,01005
C3032
INVENSENSE_CARBON
338S00087
1
IC,CARBON 1.1,MPU-6800-00,LGA16
U3010
INVENSENSE_STANDALONE_CARBON
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM TABLE_5_ITEM
806-02895
1
SHIELD,EMI,UPPER FRONT,WTOP,N71
SH0500
COMMON
806-04588
1
SHIELD,EMI,LOWER FRONT,CLOSED,NOMU,N71
SH0501
COMMON
806-03994
1
SHIELD,EMI,SA,OPEN,N71
SH0502
COMMON
806-02897
1
SHIELD,EMI,UPPER BACK,WTOP,N71
SH0503
COMMON
806-02898
1
SHIELD,EMI,LOWER BACK,WTOP,N71
SH0504
COMMON
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM TABLE_5_ITEM
TABLE_5_ITEM
152S00117
6
IND,PWR,SHLD,1.0UH,3.6A,0.060 OHM,2016
L2000,L2002,L2010,L2012,L2020,L2030
TAIYO
152S00117
5
IND,PWR,SHLD,1.0UH,3.6A,0.060 OHM,2016
L2040,L2050,L2300,L3300,L4021
TAIYO
152S00121
6
IND,PWR,SHLD,0.47UH,3.8A,0.048 OHM,2012
L2001,L2003,L2011,L2013,L2021,L2041
TAIYO
TABLE_5_ITEM TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM TABLE_5_ITEM
TABLE_5_ITEM TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
685-00080
685-00081
ALTERNATE
SUBBOM_IND
SUBBOM,SINGLE,BRD,TAIYO,N71
TABLE_ALT_ITEM
A
A PAGE TITLE
SYSTEM:BOM TABLES DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
A.0.0 BRANCH
PAGE
3 OF 49 SHEET
2 OF 59
1
SIZE
D
8
7
6
5
4
TESTPOINTS
I2C BUS
DEVICE
BINARY
7-BIT HEX
8-BIT HEX
I2C0
ANTIGUA PMU
1110100X
0X74
0XE8
CHESTNUT
0100111X
0X27
0X4E
MUON
1100010X
0X62
0XC4
TIGRIS
1110101X
0X75
0XEA
ARC DRIVER
1000001X
0X41
0X82
SPEAKER AMP
1000000X
0X40
0X80
TRISTAR
0011010X
0X1A
0X34
ALS
0101001X
0X29
0X52
DISP EEPROM
1010001X
0X51
0XA2
N/A
N/A
AMUX
TP00 1 VOLTAGE=0V
A
TP-P6
POWER GROUND
TP16 1
PMU_AMUX_AY
16
A
ROOM=TEST
I2C1
TP01 1 A
PP5V0_USB
TP-P6
VBUS
16
TP17 1
PMU_AMUX_BY
A
TP-P55
ROOM=TEST
18 17
ROOM=TEST
MOJAVE
TP02 1
PP_BATT_VCC
D
TP-P55
ROOM=TEST
31 30 17
1
N71 I2C DEVICE MAP
POWER D
2
3
A
TP-P6
ROOM=TEST
TP03 1
VBATT
28 27
TP18 1
MESA_TO_BOOST_EN
I2C2
A
A
TP-P55 ROOM=TEST
TP-P6
ROOM=TEST 28 27
TP19 1
PP16V5_MESA
A
TP-P55
OWL
TP05 1
ROOM=TEST
TP-P55
LCM
A
ROOM=TEST
29
UNUSED
ISP I2C0
TP20 1
PP_LCM_BL_CAT1_CONN
N/A
REAR CAM
TBD
TBD
TBD
LED DRIVER
1100011X
0X63
0XC6
FRONT CAM
0010000X
0X10
0X20
MESON
1000000X
0x40
0x80
MAMBA
1100000X
0x60
0xC0
DOPPLER
1011000X
0x58
0xB0
SEP EEPROM
1010001X
0x51
0xA2
A
TP-P55 ROOM=TEST
RESET C
33 16 9 5
PMU_TO_SYSTEM_COLD_RESET_L
29
TP06 1
A
PP_LCM_BL_CAT2_CONN
A
TP-P55
TP-P55 29
TP22 1
PP_LCM_BL_ANODE_CONN
ROOM=TEST
TP07 1
A
TP-P55 ROOM=TEST
PP07 P4MM-NSM 21 20 17 14 13 12 9 8 7 6 5 3 33 29
1
PP1V8
1. FROM OFF MODE SHORT TP07 TO PP07 2. PLUG IN E75 CABLE TO FORCE DFU
DFU_STATUS
BOOTSTRAPPING:BOARD REV BOARD ID BOOT CONFIG
ROOM=TEST
ROOM=TEST
P4MM-NSM SM 1 PP
E75 31 30
A
VIETMOBILE.VN
SM PP
ROOM=TEST
TRISTAR_DP1_CONN_P
TP23 1 TP-P80
PP08
33 8
SEP I2C
SUPER SCREW
FORCE DFU PROCEDURE:
TP08 1
8
OUT
BOARD_REV3
TP-P55
31 30
TRISTAR_DP1_CONN_N
TRISTAR USB
8
TRISTAR_DP2_CONN_P
A 8
A
8
TP-P55
31 30
TRISTAR_DP2_CONN_N
OUT
TP10 1 ROOM=TEST
OUT
BOARD_REV0
5%
R0403 1ROOM=SOC 2 01005 MF
8
OUT
BOARD_ID4
5%
1.00K
B BOARD_REV[3:0]
1.00K
FLOAT=LOW, PULLUP=HIGH 1111 PROTO1 1110 PROTO2 1101 EVT 1100 EVT DOE 3 (MAMBA LDO) 1011 CARRIER 1010 CARRIER 2 (I2C0 SCL) 1001 DVT
1/32W
A
BOARD_ID3
TP13 1
A
8
OUT
TRISTAR ACCESSORY ID ACCESSORY POWER OUT
5%
NOSTUFF
5%
A
8
OUT
5%
ROOM=TEST
BOARD_ID0 8
OUT
NOSTUFF
5%
ROOM=SOC
R0408 1
01005 MF
TP15 1
BOARD_ID[4:0]
FLOAT=LOW, 00100 N71 00101 N71 00110 N66
5%
1.00K
BOOT_CONFIG[2:0]
1.00K
FLOAT=LOW, PULLUP=HIGH 000 SPI0
1/32W 2 1.00K 1/32W
001 010 011 100 101 110 111
SELECTED -->
A
TP-P55 ROOM=TEST
NOSTUFF
8
OUT
A 8
BOOT_CONFIG2
R0409 1ROOM=SOC 2 01005 MF
BOOT_CONFIG1 OUT
5%
ROOM=SOC
R0410 1
01005 MF
5%
NOSTUFF
8
OUT
BOOT_CONFIG0
5%
SPI0 TEST MODE NVME0 x2 MODE NVME0 x2 TEST MODE NVME0 x1 MODE NVME0 x1 TEST MODE SLOW SPI0 TEST MODE FAST SPI0 TEST MODE
1.00K
1/32W 2 1.00K 1/32W
R0411 1ROOM=SOC 2 01005 MF
PULLUP=HIGH MLB DEV MLB
1/32W
R0407 1ROOM=SOC 2 01005 MF
TP-P55
1.00K SELECTED -->
R0406 1ROOM=SOC 2 01005 MF
BOARD_ID1
SELECTED -->
1/32W
NOSTUFF
TP14 1
1.00K
1/32W
R0405 1ROOM=SOC 2 01005 MF
BOARD_ID2 8
R0404 1ROOM=SOC 2 01005 MF
ROOM=TEST
TRISTAR_CON_DETECT_L
1.00K
1/32W
NOSTUFF
TP-P55
31 30
3 5 6 7 8 9 12 13 14 17 20 21 29 33
1/32W
R0402 1ROOM=SOC 2 01005 MF
TP12 1
ROOM=TEST
PP_TRISTAR_ACC2
BOARD_REV1
A
TP-P55
31 30
5%
PP1V8
TP11 1
ROOM=TEST
PP_TRISTAR_ACC1
R0401 1ROOM=SOC 2 01005 MF
TRISTAR DEBUG UART
TP-P55
31 30
5%
1.00K
1/32W
NOSTUFF
ROOM=TEST
31 30
BOARD_REV2
TP09 1 TP-P55
B
OUT
R0400 1ROOM=SOC 2 01005 MF NOSTUFF
A
ROOM=TEST
C
A
TP-P55
DFU FORCE_DFU
TOUCH I2C
ROOM=TEST
SOC & BB RESET
ROOM=TEST
33 8
ISP I2C1
TP21 1
A PAGE TITLE
SYSTEM:N71 SPECIFIC DRAWING NUMBER
1.00K
Apple Inc.
1/32W
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: RESISTOR STUFF = HIGH '1' RESISTOR NOSTUFF = LOW '0'
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
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4 OF 49 SHEET
3 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
PENINSULA STANDOFFS BS0506
BS0507
STDOFF-2.2OD0.25H-0.50-1.70 ROOM=ASSEMBLY
TOP-SIDE
STDOFF-2.6OD0.5H-0.5-1.7-TH
ROOM=ASSEMBLY
860-8396 1
1
860-7846
50_AP_UAT_FEED
50_AP_WIFI_5G_CONN_ANT
1
D
NORTH_AC_GND_SCREW 806-02971
BOTTOM-SIDE
33
FIDUCIALS
STOCKHOLM FEED
33
BS0505
4
FD0501
STDOFF-2.56OD1.4ID.99H-SM
FID
ROOM=ASSEMBLY
BS0508 2.7X1.94X0.25
ROOM=ASSEMBLY
860-00109
RING-TH1
FD0502
1
ROOM=ASSEMBLY
SHIM WASHER
33
D
0P5SM1P0SQ-NSP 1
FID
AP_TO_STOCKHOLM_ANT
0P5SM1P0SQ-NSP 1 ROOM=ASSEMBLY
1
FD0503
BS0503
FID
STDOFF-2.6OD0.81H-TH 860-00096
0P5SM1P0SQ-NSP 1
ROOM=ASSEMBLY
ROOM=ASSEMBLY
FD0505 FID
0P5SM1P0SQ-NSP 1 ROOM=ASSEMBLY
FD0510 FID
0P5SQ-SMP3SQ-NSP 1
BS0501
1
STDOFF-2.85OD1.4ID-0.84H
1
ROOM=ASSEMBLY
BS0502
FD0511
STDOFF-2.85OD1.4ID-0.84H
ROOM=ASSEMBLY
860-00111
860-00111
FID
ROOM=ASSEMBLY
0P5SQ-SMP3SQ-NSP 1 ROOM=ASSEMBLY
PLATED SLOTTED THRU-HOLE
C
FD0512 FID
CL0502 TH-NSP
SOUTH DC CURRENT BLOCKING CAPS
1
1
C0540
1
220PF
C0541
1
100PF
10% 2 10V X7R-CERM 01005
56PF
ROOM=ASSEMBLY
ROOM=ASSEMBLY
FID
0P5SQ-SMP3SQ-NSP 1
OMIT_TABLE
UPPER SHIELD
C0543
ROOM=ASSEMBLY
1
SH0503
OMIT_TABLE
+/-0.1PF 2 16V NP0-C0G 01005
FD0514
UPPER SHIELD
4 32
4.7PF
5% 2 16V NP0-C0G 01005
5% 2 16V NP0-C0G 01005
ROOM=ASSEMBLY
C0542
1
ROOM=ASSEMBLY
SL-1.20X0.40-1.50X0.70-NSP
SOUTH_AC_GND_SCREW
FD0515 FID
SM 1
0P5SQ-SMP3SQ-NSP 1
VIETMOBILE.VN SH0500
ROOM=ASSEMBLY
SHLD-EMI-UPPER-BACK-N61
SM
ROOM=ASSEMBLY
ROOM=ASSEMBLY
FD0504
SHLD-EMI-UPPER-FRONT-N61
FID
ROOM=ASSEMBLY
NORTH DC CURRENT BLOCKING CAPS NORTH_AC_GND_SCREW 1
C0550 220PF
10% 2 10V X7R-CERM 01005 ROOM=ASSEMBLY
1
C0551 100PF
5% 2 16V NP0-C0G 01005 ROOM=ASSEMBLY
1
C0552 220PF
10% 2 10V X7R-CERM 01005 ROOM=ASSEMBLY
1
4
C
0P5SQ-SMP3SQ-NSP 1
C0553
0P5SM1P0SQ-NSP 1 ROOM=ASSEMBLY
FD0513
CLIP-RETENTION-COAX-DOUBLE
100PF
5% 2 16V NP0-C0G 01005
DUAL RF COAX CLIP
ROOM=ASSEMBLY
1
CL0501 SM
FID
32 4
SOUTH_AC_GND_SCREW
0P5SQ-SMP3SQ-NSP 1 ROOM=ASSEMBLY
ROOM=ASSEMBLY
806-01802
B
LOWER SHIELD
B
LOWER SHIELD
OMIT_TABLE
OMIT_TABLE
1
1
SH0501
SH0504
SM
SM
SHLD-EMI-LOWER-FRONT-N61
SHLD-EMI-LOWER-BACK-N61
ROOM=ASSEMBLY
ROOM=ASSEMBLY
SA SHIELD OMIT_TABLE
A
A
1
SH0502
PAGE TITLE
SM
SYSTEM:MECHANICAL
SHLD-EMI-SA-N71
DRAWING NUMBER
ROOM=ASSEMBLY
Apple Inc.
SOUTH TUBE STANDOFF
NOTICE OF PROPRIETARY PROPERTY:
BS0500
TODO:UPDATE REF DES
8
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
1
ROOM=ASSEMBLY
7
REVISION
R
STDOFF-2.70OD1.84ID-0.88H-TH 860-7862
051-1902
6
5
4
3
2
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5 OF 49 SHEET
4 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
MAUI - USB, JTAG, XTAL D
D
VDD12_PLL_LPDP:1.14-1.26V @2mA MAX VDD12_PLL_SOC: 1.14-1.26V @12mA MAX VDD12_PLL_CPU: 1.14-1.26V @2mA MAX VDD18_USB: 1.71-1.89V @20mA MAX VDD18_XTAL:1.62-1.98V @2mA MAX
R0600 15 7 6
PP1V2
1
0.00 2
PP1V2_PLL
PP1V8
VOLTAGE=1.2V
0% 1/32W MF 01005
1
C0600 0.1UF
ROOM=SOC
20% 2 6.3V X5R-CERM 01005 ROOM=SOC
1
C0601 0.1UF
20% 2 6.3V X5R-CERM 01005
1
C0602 0.01UF
10% 2 6.3V X5R 01005
ROOM=SOC
ROOM=SOC
1
C0603
1
C0612
FL0610
1KOHM-25%-0.2A
0.1UF
0.01UF
20% 2 6.3V X5R-CERM 01005
10% 2 6.3V X5R 01005
1
PP1V8_XTAL 1
C0611
1
C0610 ROOM=SOC
ROOM=SOC
PP3V3_USB VDD18_XTAL AL34
VDD33_USB AN20
VDD18_USB AL21
VDD12_PLL_LPDP F22 U20 T19 VDD12_PLL_SOC W19 VDD12_PLL_CPU AF13
VDD12_UH1_HSIC0 AP21 VDD12_UH2_HSIC1 C15
C
1
ROOM=SOC
20% 2 6.3V X5R-CERM 0201
20% 2 6.3V X5R-CERM 01005
CKPLUS_WAIVE=PWRTERM2GND
0201
2.2UF
0.1UF
NOTE:LPDP RECEIVES UNFILTERED 1.2V AS IT IS UNUSED
2
VOLTAGE=1.8V
ROOM=SOC
ROOM=SOC
3 6 7 8 9 12 13 14 17 20 21 29 33
C0620
15
VDD33_USB:3.14-3.46V @5mA MAX
0.1UF
20% 6.3V 2 X5R-CERM 01005 ROOM=SOC
C
OMIT_TABLE
CRITICAL
U0600 MAUI-2GB-25NM-DDR-H AN22 NC AN21
NC
UH1_HSIC0_DATA UH1_HSIC0_STB
C16 NC D15
UH2_HSIC1_DATA UH2_HSIC1_STB
Y32
IN
SWD_DOCK_BI_AP_SWDIO SWD_DOCK_TO_AP_SWCLK
IN
PMU_TO_SYSTEM_COLD_RESET_L
BI 30
33 16 9 3
30 27 16 9
IN
ROOM=SOC 16
P3MM-NSM SM 1
PP0610
OUT
ANALOGMUX_OUT AP24
AP_TO_PMU_AMUX_OUT
OUT
16
P3MM-NSM SM 1
ROOM=SOC
PP0600
VIETMOBILE.VN NC
30
FCMSP SC58980B0B-A040 SYM 1 OF 14
AC32 NC AB31 NC AA32 NCAB32 AA31 AC31 H33
PMU_TO_OWL_ACTIVE_READY AP_TO_PMU_TEST_CLKOUT
AR23
PP ROOM=SOC
USB_D_P AT20 USB_D_N AT19
JTAG_SEL
USB_AP_DATA_P USB_AP_DATA_N
BI
30
BI
30
P3MM-NSM SM 1
JTAG_TRST* JTAG_TDO JTAG_TDI JTAG_TMS JTAG_TCK
PP ROOM=SOC
USB_VBUS AP19
USB_VBUS_DETECT
IN
PP0601
17
USB_ID AR19NC
COLD_RESET* USB_REXT
CFSB
AP18
USB_REXT 1
R0640
TST_CLKOUT
200
1% 1/32W MF 2 01005
PP
B
13
OUT
AN23
AP_TO_NAND_RESET_L
S3E_RESET*
B
ROOM=SOC
H32
HOLD_RESET
AF6
TESTMODE
AL22 AG25
WDOG Y33
XI0 AK35 XO0 AL35
FUSE1_FSRC FUSE2_FSRC
AP_TO_PMU_WDOG_RESET XTAL_AP_24M_IN XTAL_AP_24M_OUT
OUT
16
1
R0650
CRITICAL
511K
1% 1/32W MF 2 01005
ROOM=SOC
ROOM=SOC
Y0600
OMIT_TABLE
1.60X1.20MM-SM
R0651 1
24.000MHZ-30PPM-9.5PF-60OHM 1 3 SOC_24M_O
0.00 2 0% 1/32W MF 01005
ROOM=SOC
1
C0650
2
4 1
12PF
C0651 12PF
5% 2 16V CERM 01005
2
ROOM=SOC
AP_XTAL_GND
5% 16V CERM 01005
XW0650
SHORT-10L-0.1MM-SM 1 2
ROOM=SOC
VOLTAGE=0.0V
A
ROOM=SOC
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SOC:JTAG,USB,XTAL DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
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PAGE
6 OF 49
SHEET
5 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
MAUI - PCIE INTERFACES VDD12_PCIE_REFBUF:1.08-1.26V @50mA MAX VDD12_PCIE_TXPLL: 1.08-1.32V @10mA MAX VDD12_PCIE: 1.14-1.26V @115mA MAX
XW0740 SHORT-10L-0.1MM-SM PP1V2
20% 2 6.3V X5R 0201-1
ROOM=SOC
ROOM=SOC
1
0.1UF
C0743
1
0.1UF
20% 2 6.3V X5R-CERM 01005
0.1UF
20% 2 6.3V X5R-CERM 01005
ROOM=SOC
ROOM=SOC
1
C0731 0.1UF
20% 2 6.3V X5R-CERM 01005 ROOM=SOC
PCIE_EXT_C
C0701 13
IN
13
IN
PCIE_NAND_TO_AP_RXD0_P PCIE_NAND_TO_AP_RXD0_N
ROOM=SOC
20% 6.3V
C0702 ROOM=SOC
1 20% 6.3V
C0703
C
PCIE LINK 0
13 13
OUT OUT
PCIE_AP_TO_NAND_TXD0_P PCIE_AP_TO_NAND_TXD0_N
ROOM=SOC
1 20% 6.3V
C0704 ROOM=SOC
1 20% 6.3V
C0705 13
IN
13
IN
PCIE_NAND_TO_AP_RXD1_P PCIE_NAND_TO_AP_RXD1_N
ROOM=SOC
1 20% 6.3V
C0706 ROOM=SOC
1 20% 6.3V
C0707 13
OUT
13
OUT
PCIE_AP_TO_NAND_TXD1_P PCIE_AP_TO_NAND_TXD1_N
ROOM=SOC
1 20% 6.3V
C0708 ROOM=SOC
1 20% 6.3V
PCIE LINK 1
C0709 33
IN
33
IN
PCIE_WLAN_TO_AP_RXD_P PCIE_WLAN_TO_AP_RXD_N
ROOM=SOC
1 20% 6.3V
C0711 33
OUT
33
OUT
PCIE_AP_TO_WLAN_TXD_P PCIE_AP_TO_WLAN_TXD_N
ROOM=SOC
1 20% 6.3V
C0712 ROOM=SOC
1 20% 6.3V
C0715 PCIE LINK 2
B
1 20% 6.3V
C0710 ROOM=SOC
33 33
IN IN
PCIE_BB_TO_AP_RXD_P PCIE_BB_TO_AP_RXD_N
ROOM=SOC
C0717 33
OUT
33
OUT
PCIE_AP_TO_BB_TXD_P PCIE_AP_TO_BB_TXD_N
ROOM=SOC
C0718 ROOM=SOC
1
20% 6.3V
C0716 ROOM=SOC
1
1
20% 6.3V
1 20% 6.3V
1 20% 6.3V
2
2
AP29
PCIE_EXT_C
0.1UF
X5R-CERM 01005
0.1UF
PCIE_NAND_TO_AP_RXD0_C_P PCIE_NAND_TO_AP_RXD0_C_N
AM30 AN30
PCIE_RX0_P PCIE_RX0_N
2
0.1UF
PCIE_AP_TO_NAND_TXD0_C_P PCIE_AP_TO_NAND_TXD0_C_N
AT32 AR32
PCIE_TX0_P PCIE_TX0_N
X5R-CERM 01005
2
0.1UF
PCIE_NAND_TO_AP_RXD1_C_P PCIE_NAND_TO_AP_RXD1_C_N
AM28 AN28
1.0UF
C0750 2.2UF
20% 2 6.3V X5R 0201-1
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
ROOM=SOC
U0600
ROOM=SOC
AN35 AP35
PCIE_AP_TO_NAND_REFCLK_P PCIE_AP_TO_NAND_REFCLK_N
OUT
13
OUT
13
PCIE_REF_CLK1_P AN34 PCIE_REF_CLK1_N AP34
PCIE_AP_TO_WLAN_REFCLK_P PCIE_AP_TO_WLAN_REFCLK_N
OUT
33
OUT
33
PCIE_REF_CLK2_P AM32 PCIE_REF_CLK2_N AN32
PCIE_AP_TO_BB_REFCLK_P PCIE_AP_TO_BB_REFCLK_N
OUT
33
OUT
33
PCIE_REF_CLK0_P PCIE_REF_CLK0_N
PP1V8 1
R0720 100K
5% 1/32W MF 2 01005
PCIE_RX1_P PCIE_RX1_N
ROOM=SOC
PCIE_CLKREQ0* PCIE_CLKREQ1* PCIE_CLKREQ2*
0.1UF
X5R-CERM 01005
2
1
PCIE_REF_CLK3_P AM31NC PCIE_REF_CLK3_N AN31NC
X5R-CERM 01005
2
ROOM=SOC
C0751
0.1UF
X5R-CERM 01005
2
CRITICAL
FCMSP SC58980B0B-A040 SYM 2 OF 14
0.1UF
X5R-CERM 01005
20% 2 6.3V X5R-CERM 01005
1
OMIT_TABLE
MAUI-2GB-25NM-DDR-H
X5R-CERM 01005
2
C0752
PCIE_AP_TO_NAND_TXD1_C_P PCIE_AP_TO_NAND_TXD1_C_N
AT31 AR31
PCIE_WLAN_TO_AP_RXD_C_P PCIE_WLAN_TO_AP_RXD_C_N
AM27 AN27
PCIE_TX1_P PCIE_TX1_N
D
7 11 14
VDD085_PCIE
1.0UF
C0742
AH28 AJ25 AL23 AJ29 AL29 AJ24 AK27 AJ27
20% 2 6.3V X5R-CERM 0201
C0741
VDD12_PCIE_REFBUF AJ26
2.2UF
1
VDD12_PCIE_TXPLL AL26
C0740
1
PP_FIXED
VOLTAGE=1.2V
ROOM=SOC
1
VDD085_PCIE:0.802-TBDV @TBDmA MAX PP1V2_XW
VDD12_PCIE
15 7 5
2
AK28 AK25 AL24 AL27
D
1
XW TO ISOLATE C0442,3 FROM C0740,1.
PCIE_CLKREQ3*
1
R0721 100K
5% 1/32W MF 2 01005
ROOM=SOC
AT11 AP12 AR12 AT12
3 5 7 8 9 12 13 14 17 20 21 29 33
C
R0722 100K
5% 1/32W MF 2 01005
ROOM=SOC
PCIE_NAND_TO_AP_CLKREQ_L PCIE_WLAN_TO_AP_CLKREQ_L PCIE_BB_BI_AP_CLKREQ_L
BI
13
BI
33
BI
33
NC
NOTE:CLKREQ_L PULL-UP FOR BB IN RADIO_MLB_MIMO SECTION
VIETMOBILE.VN
0.1UF
1
NOSTUFF
X5R-CERM 01005
2
0.1UF
X5R-CERM 01005
2
0.1UF
PCIE_PERST0* AR10 PCIE_PERST1* AT10 PCIE_PERST2* AP11 PCIE_PERST3* AR11
PCIE_RX2_P PCIE_RX2_N
2
0.1UF
2
PCIE_AP_TO_WLAN_TXD_C_P PCIE_AP_TO_WLAN_TXD_C_N
AT28 AR28
0.1UF
1 PCIE_TX2_P PCIE_TX2_N
R0700
PCIE_EXT_REF_CLK_P AR33 PCIE_EXT_REF_CLK_N AT33
100K
5% 1/32W MF 2 01005
X5R-CERM 01005
2
0.1UF
X5R-CERM 01005
2
0.1UF
OUT
13
OUT
33
OUT
33
NC
X5R-CERM 01005
X5R-CERM 01005
PCIE_AP_TO_NAND_RESET_L PCIE_AP_TO_WLAN_RESET_L PCIE_AP_TO_BB_RESET_L
ROOM=SOC
PCIE_BB_TO_AP_RXD_C_P PCIE_BB_TO_AP_RXD_C_N
AM26 AN26
PCIE_RX3_P PCIE_RX3_N
AT26 AR26
PCIE_TX3_P PCIE_TX3_N
1
R0701 100K
5% 1/32W MF 2 01005
ROOM=SOC
1
R0702 100K
5% 1/32W MF 2 01005
ROOM=SOC
B
PCIE_RX_TX_BYPASS_CLK_P AT29 PCIE_RX_TX_BYPASS_CLK_N AR29
X5R-CERM 01005
2
0.1UF
X5R-CERM 01005
2
PCIE_AP_TO_BB_TXD_C_P PCIE_AP_TO_BB_TXD_C_N
0.1UF
X5R-CERM 01005
AM25 PCIE_RX4_P NC AN25 PCIE_RX4_N NC
PCIE_RCAL_P OMIT_TABLE 1
AR24 PCIE_TX4_P NC AT24 PCIE_TX4_N NC
R0730
PCIE_RCAL_P AT30 PCIE_RCAL_N AR30
100
1% 1/32W MF 2 01005
ROOM=SOC
PCIE_RCAL_N
A
OMIT_TABLE 1
C0730 100PF
5% 2 16V NP0-C0G 01005
ROOM=SOC
SYNC_DATE=N/A
SYNC_MASTER=N/A PAGE TITLE
SOC:PCIE DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
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PAGE
7 OF 49 SHEET
6 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
MAUI - CAMERA & DISPLAY INTERFACES D
D
0.756-0.893V @11mA MAX
1.62-1.98V @23mA MAX
PP_FIXED
PP1V8
20% 2 6.3V X5R-CERM 01005
1
C0801
1
0.1UF
IN
21
IN
21
IN
21
IN
21
IN
21
IN
21
IN
21
IN
21
IN
21
IN
MIPI_RCAM_TO_AP_DATA0_CONN_P MIPI_RCAM_TO_AP_DATA0_CONN_N
B8 A8
OUT
29
OUT
29
OUT
29
OUT
MIPI_RCAM_TO_AP_DATA1_CONN_P MIPI_RCAM_TO_AP_DATA1_CONN_N
A9 B9
MIPI0C_DATA1_P MIPI0C_DATA1_N
MIPI_RCAM_TO_AP_DATA2_CONN_P MIPI_RCAM_TO_AP_DATA2_CONN_N
A13 B13
MIPI0C_DATA2_P MIPI0C_DATA2_N
MIPI_RCAM_TO_AP_DATA3_CONN_P MIPI_RCAM_TO_AP_DATA3_CONN_N
B14 A14
MIPI_RCAM_TO_AP_CLK_CONN_P MIPI_RCAM_TO_AP_CLK_CONN_N MIPI_AP_TO_LCM_DATA0_P MIPI_AP_TO_LCM_DATA0_N
VDD18_MIPI
PP1V8 1
R0804
MIPI_AP_TO_LCM_DATA1_P MIPI_AP_TO_LCM_DATA1_N
1.00K
B 29
OUT
MIPI_AP_TO_LCM_CLK_P MIPI_AP_TO_LCM_CLK_N LCM_REXT
1
R0801 4.02K
1% 1/32W MF 01005 2
ROOM=SOC
CRITICAL
5% 1/32W MF 2 01005
ROOM=SOC
1
R0805 1.00K
5% 1/32W MF 2 01005
ROOM=SOC
1
1
R0806
R0807
1.00K
1.00K
5% 1/32W MF 2 01005
5% 1/32W MF 2 01005
ROOM=SOC
ROOM=SOC
ISP_I2C0_SCL G31 ISP_I2C0_SDA G32
I2C_ISP_TO_RCAM_SCL I2C_ISP_BI_RCAM_SDA
ISP_I2C1_SCL F35 ISP_I2C1_SDA G34
I2C_ISP_TO_FCAM_SCL I2C_ISP_BI_FCAM_SDA
D12
MIPI0C_REXT
B6 A6 A7 B7
OUT BI
OUT BI
21 22 21 22
AP_TO_RCAM_CLK_R AP_TO_RCAM_SHUTDOWN_L
SENSOR1_CLK F33 SENSOR1_RST E34
AP_TO_FCAM_CLK_R AP_TO_FCAM_SHUTDOWN_L
1 1% MF 21
33.2 2 01005
1/32W
AP_TO_RCAM_CLK
OUT
SENSOR0_ISTRB D34 F32 SENSOR0_XSHUTDOWN
MIPID_DATA0_P MIPID_DATA0_N
SENSOR1_ISTRB C35 SENSOR1_XSHUTDOWN C34
MIPID_DATA1_P MIPID_DATA1_N
MAUI-2GB-25NM-DDR-H
20
MIPI1C_REXT D14
MIPID_DATA3_P MIPID_DATA3_N MIPID_CLK_P MIPID_CLK_N
D9
MIPID_REXT
R0809
1 1% MF
A33 LPDP_TX0_P NC B33 LPDP_TX0_N NC
21
OUT
20
ROOM=SOC
33.2 2 01005
AP_TO_FCAM_CLK
1/32W
OUT
20
ROOM=SOC
NC
AP_TO_STOCKHOLM_DWLD_REQUEST
OUT
33
OUT
27
NC
AP_TO_MUON_BL_STROBE_EN
MIPI_FCAM_TO_AP_DATA0_P MIPI_FCAM_TO_AP_DATA0_N
IN
20
IN
20
MIPI1C_DATA1_P B19 MIPI1C_DATA1_N A19
MIPI_FCAM_TO_AP_DATA1_P MIPI_FCAM_TO_AP_DATA1_N
IN
20
IN
20
MIPI_FCAM_TO_AP_CLK_P MIPI_FCAM_TO_AP_CLK_N
IN
20
IN
20
A18 MIPI1C_CLK_P B18 MIPI1C_CLK_N
ROOM=SOC
A31 LPDP_TX2_P NC B31 LPDP_TX2_N NC A30 LPDP_TX3_P NC B30 LPDP_TX3_N NC
NC NC
NC
FCAM_REXT
CRITICAL
A32 LPDP_TX1_P NC B32 LPDP_TX1_N NC
NC
MIPI1C_DATA0_P B17 MIPI1C_DATA0_N A17
FCMSP SC58980B0B-A040 SYM 4 OF 14
A29 LPDP_AUX_P NC B29 LPDP_AUX_N NC
20
MIPICSI_MUXSEL G35 NC
MIPID_DATA2_P MIPID_DATA2_N
A5 B5
OUT
C
U0600
R0808 SENSOR0_CLK D33 SENSOR0_RST D32
PP1V2
3 5 6 7 8 9 12 13 14 17 20 21 29 33
VIETMOBILE.VN
MIPI0C_CLK_P MIPI0C_CLK_N
B4 A4
NC NC OUT
FCMSP SC58980B0B-A040 SYM 3 OF 14
MIPI0C_DATA3_P MIPI0C_DATA3_N
A12 B12
A3 B3
NC NC
29
ROOM=SOC
ROOM=SOC
RCAM_REXT 29
MIPI0C_DATA0_P MIPI0C_DATA0_N
NOTE:VDD12_LPDP SHOULD BE POWERED EVEN WHEN LPDP IS NOT USED
15 6 5
MAUI-2GB-25NM-DDR-H
21
20% 2 6.3V X5R-CERM 01005
ROOM=SOC
VDD085_MIPI
ROOM=SOC
C0815 0.1UF
20% 2 6.3V X5R-CERM 01005
U0600
C
1
0.1UF
20% 2 6.3V X5R-CERM 01005
ROOM=SOC
C0802
VDD12_LPDP
0.1UF
3 5 6 7 8 9 12 13 14 17 20 21 29 33
E23 E25 E27 F24
C0814
D10 E7 D8 E11 E14
1
E10 E13 E8 D13
14 11 6
D24
LPDP_CAL_DRV_OUT
D25
LPDP_CAL_VSS_EXT
AL4
EDP_HPD
H35
DP_WAKEUP
B
1
R0803
1
R0802
4.02K
4.02K
1% 1/32W MF 2 01005
1% 1/32W MF 01005 2
ROOM=SOC
ROOM=SOC
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SOC:CAMERA & DISPLAY DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
A.0.0 BRANCH
PAGE
8 OF 49 SHEET
7 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
MAUI - GPIO & SERIAL INTERFACES PP1V8
3 5 6 7 8 9 12 13 14 17 20 21 29 33
R09001 R09011 R09021 R09031 R09041 R09051 2.2K
1.00K
D
5% 1/32W MF 01005 2
1% 1/32W MF 01005 2
ROOM=SOC
ROOM=SOC
2.2K
2.2K
5% 1/32W MF 01005 2
1.33K
5% 1/32W MF 01005 2
ROOM=SOC
ROOM=SOC
D
1.33K
1% 1/32W MF 01005 2
1% 1/32W MF 01005 2
ROOM=SOC
ROOM=SOC
R0920
31
OUT
31
OUT
33 32 16
IN
33 32 16
IN
25
IN
25
OUT
25
OUT
33
OUT
33
OUT
22
OUT
28
OUT
29
OUT
16
IN
33
OUT
33
OUT
3
C
OUT
33
3 26
IN
IN OUT
33 29 9
IN
26
IN
33
OUT
26
OUT
33
IN
3
IN
33 3
IN
33 3
OUT
3
IN
3 24 16
IN IN
33
OUT
13
OUT
29
IN
3
IN
3
IN
3
IN
3
IN
33
OUT
33
IN
33 32 16 8
IN
33
OUT
28
OUT
AP_TO_HP_HS3_CTRL AP_TO_HP_HS4_CTRL BUTTON_VOL_UP_L BUTTON_VOL_DOWN_L SPEAKERAMP_TO_AP_INT_L AP_TO_SPEAKERAMP_STAYIN_ALIVE AP_TO_SPEAKERAMP_RESET_L AP_TO_BT_WAKE AP_TO_BB_RESET_L PCIE_AP_TO_WLAN_DEV_WAKE AP_TO_LED_DRIVER_EN AP_TO_TOUCH_RESET_L AP_TO_LCM_RESET_L PMU_TO_AP_IRQ_L AP_TO_BB_PCIE_DEV_WAKE AP_TO_STOCKHOLM_DEV_WAKE BOARD_ID3 NC_AP_TO_STOCKHOLM_SIM_SEL BOOT_CONFIG0 AP_TO_ARC_RESET_L LCM_TO_OWL_BSYNC ARC_TO_AP_INT_L (AP TO BB) BB_TO_AP_GPS_TIME_MARK AP_TO_ARC_STAYIN_ALIVE BB_TO_AP_RESET_DETECT_L BOOT_CONFIG1 FORCE_DFU DFU_STATUS BOOT_CONFIG2 BOARD_ID4 CODEC_TO_AP_PMU_INT_L AP_TO_BB_RADIO_ON_L AP_TO_NAND_FW_STRAP TOUCH_TO_AP_INT_L BOARD_REV3 BOARD_REV2 BOARD_REV1 BOARD_REV0 AP_TO_BB_COREDUMP BB_IPC_GPIO BUTTON_RINGER_A AP_TO_BB_MESA_UP_L MAMBA_EXT_LDO_EN
C1 D2 D1 F1 E2 F3 F2 H3 G3 J1 H4 K1 J3 K2 J4 L2 K3 L3 N1 AH2 AH3 AH4 AJ1 AJ2 AJ3 AJ4 AK1 AP3 AN4 AP4 AP5 AR2 AR3 AR4 AP6 AT3 AT4 AR6 AP7 AT5 AP8 AP9 AP10
GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9 GPIO_10 GPIO_11 GPIO_12
24
OUT
26
OUT
25
OUT
I2S_AP_TO_CODEC_MCLK I2S_AP_TO_ARC_MCLK I2S_AP_TO_SPEAKERAMP_MCLK
1
1% 1/32W MF 01005
U0600
ROOM=SOC
MAUI-2GB-25NM-DDR-H FCMSP SC58980B0B-A040 SYM 5 OF 14
CRITICAL ROOM=SOC
UART0_RXD AE3 UART0_TXD AE4
GPIO_15 GPIO_16 GPIO_17 GPIO_18 GPIO_19 GPIO_20 GPIO_21 GPIO_22 GPIO_23 GPIO_24 GPIO_25 GPIO_26 GPIO_27 GPIO_28 GPIO_29 GPIO_30 GPIO_31 GPIO_32 GPIO_33 GPIO_34 GPIO_35 GPIO_36 GPIO_37 GPIO_38 GPIO_39 GPIO_40 GPIO_41 GPIO_42
1% 1/32W MF 01005
OUT
24 9
IN OUT
OUT
33
OUT
33
IN OUT
33
R0922
UART_AP_DEBUG_RXD UART_AP_DEBUG_TXD UART_BT_TO_AP_CTS_L UART_AP_TO_BT_RTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_TXD
K31 K32 L33 L32
UART2_CTS* UART2_RTS* UART2_RXD UART2_TXD
AT23 NC AR20 CAM_EXT_LDO_EN AP23 NC AP22
UART4_CTS* UART4_RTS* UART4_RXD UART4_TXD
24 9
33
ROOM=SOC
UART1_CTS* UART1_RTS* UART1_RXD UART1_TXD
UART3_CTS* UART3_RTS* UART3_RXD UART3_TXD
OUT
33.2 2
1
TMR32_PWM0 AE1 NC TMR32_PWM1 AF2 NC TMR32_PWM2 AF3 NC
24 9
24
R0921
OMIT_TABLE
GPIO_13 GPIO_14
33.2 2
IN
30 33
OUT
30 33
IN
33
OUT
33
IN
33
OUT
33
OUT
33.2 2
1
1% 1/32W MF 01005 ROOM=SOC
26 25 24
OUT
26 25 24
OUT
26 25 24
IN OUT
26 25 24
21
20
IN
33
OUT
33
OUT
33
IN
33
OUT
I2S_AP_TO_CODEC_MCLK_R I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_AP_OWL_TO_CODEC_XSP_LRCLK I2S_CODEC_TO_AP_OWL_XSP_DIN I2S_AP_TO_CODEC_XSP_DOUT
P34 R34 N34 N35 M33
I2S_AP_TO_ARC_MCLK_R I2S_AP_TO_BT_BCLK I2S_AP_TO_BT_LRCLK I2S_BT_TO_AP_DIN I2S_AP_TO_BT_DOUT
M4 M3 P1 N3 L4
I2S_AP_TO_SPEAKERAMP_MCLK_R I2S_AP_TO_CODEC_ASP_BCLK I2S_AP_TO_CODEC_ASP_LRCLK I2S_CODEC_TO_AP_ASP_DIN I2S_AP_TO_CODEC_ASP_DOUT
U32 V33 U33 T33 V34
ALS_TO_AP_INT_L I2S_AP_TO_BB_BCLK I2S_AP_TO_BB_LRCLK I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT
AM3 AM4 AN2 AP1 AN1
I2S0_MCK I2S0_BCLK I2S0_LRCK I2S0_DIN I2S0_DOUT
U0600 FCMSP SC58980B0B-A040
SYM 6 OF 14
MAUI-2GB-25NM-DDR-H I2S1_MCK I2S1_BCLK
CRITICAL ROOM=SOC
N4 P3 R3 R2 J33 J34 J35 K33
UART_STOCKHOLM_TO_AP_CTS_L UART_AP_TO_STOCKHOLM_RTS_L UART_STOCKHOLM_TO_AP_RXD UART_AP_TO_STOCKHOLM_TXD UART_WLAN_TO_AP_CTS_L UART_AP_TO_WLAN_RTS_L UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_TXD
IN
33
OUT
33
IN
33
OUT
33
IN
33
OUT
33
IN
33
OUT
33
IN
24
OUT
24
OUT
24
IN
24
OUT
TRISTAR_TO_AP_INT I2S_AP_TO_CODEC_MSP_BCLK I2S_AP_TO_CODEC_MSP_LRCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUT
R32 R31 V32 P31 P32
I2C0_AP_SCL I2C0_AP_SDA
I2C1_SCL AH1 I2C1_SDA AG4
I2C1_AP_SCL I2C1_AP_SDA
OUT
I2C2_SCL L31 I2C2_SDA M32
I2C2_AP_SCL I2C2_AP_SDA
OUT
I2S1_LRCK I2S1_DIN I2S1_DOUT
PP1V8
SEP_SPI0_SCLK W3 NC SEP_SPI0_MISO AA4 NC U2 SEP_SPI0_MOSI NC
SWI_AP_BI_TIGRIS
BI
IN
3
IN
3
IN
9 17
NC
24
24
OUT
P2MM-NSM
24
OUT
SM
24
OUT
SPI_AP_TO_CODEC_CS_L
29
IN
29
OUT
29
OUT
28
IN
28
OUT
28
IN
PP0906
UART_ACCESSORY_TO_AP_RXD UART_AP_TO_ACCESSORY_TXD
IN
30
OUT
30
PP
1
ROOM=SOC
R0960
UART7_RXD J31 UART7_TXD J32 NC
29
OUT
SPI_AP_TO_TOUCH_SCLK
1 01005
0.00 2 0%
1/32W MF
ROOM=SOC
B
R0930 28
OUT
SPI_AP_TO_MESA_SCLK
IN
SPI_CODEC_TO_AP_MISO SPI_AP_TO_CODEC_MOSI SPI_AP_TO_CODEC_SCLK
ROOM=SOC
UART6_RXD AF1 UART6_TXD AE2
BOARD_ID2 BOARD_ID1 BOARD_ID0
1 01005
0.00 2 0%
1/32W MF
SPI_TOUCH_TO_AP_MISO SPI_AP_TO_TOUCH_MOSI SPI_AP_TO_TOUCH_SCLK_R SPI_AP_TO_TOUCH_CS_L SPI_MESA_TO_AP_MISO SPI_AP_TO_MESA_MOSI SPI_AP_TO_MESA_SCLK_R MESA_TO_AP_INT
AD4 AC3 AB2 AD3
R09071
5% 1/32W MF 01005 2
5% 1/32W MF 01005 2
ROOM=SOC
R0911
1.00K
5% 1/32W MF 2 01005
PROX_SELECT
ROOM=SOC
SEP_I2C_SCL V3 SEP_I2C_SDA Y4
I2S3_MCK I2S3_BCLK I2S3_LRCK I2S3_DIN I2S3_DOUT
PP1V8
1
A1
R0950
C0900
VCC
20% 2 6.3V X5R 0201-1
A
191K
CRITICAL ROOM=SOC
1.0UF
33 28 16 9
U0900
ROOM=SOC
M34128-FCS6_P/T SCL
WLCSP
SDA
VSS
B1
A2
33 32 16 8
I2C_SEP_BI_EEPROM_SDA I2C_SEP_TO_EEPROM_SCL
IN
BUTTON_MENU_KEY_L BUTTON_RINGER_A
1% 1/32W MF 2 01005
ROOM=SOC
NC
E33 E35 F34 F31
SPI2_MISO SPI2_MOSI SPI2_SCLK SPI2_SSIN
AA2 Y2 AA3 AC4
SPI3_MISO SPI3_MOSI SPI3_SCLK SPI3_SSIN
NOSTUFF
R09411
R09101
5% 1/32W MF 01005 2
5% 1/32W MF 01005 2
10K
BI
8
8 12 15 17
3 5 6 7 8 9 12 13 14 17 20 21 29 33
1
R0909
10K
ROOM=SOC
10K
5% 1/32W MF 2 01005
ROOM=SOC
ROOM=SOC
ROOM=SOC
R0940
SOCHOT0 AM1
0.00 2
PMU_TO_AP_SOCHOT0_R_L
1 0% MF
01005
CPU_ACTIVE_STATUS H31
PMU_TO_AP_SOCHOT0_L
IN
16
OUT
16
1/32W
AP_TO_PMU_SOCHOT1_L
SOCHOT1 AM2
NC
CLK32K_OUT H34
AP_TO_TOUCH_CLK32K_RESET_L
NAND_SYS_CLK AM24
AP_TO_NAND_SYS_CLK_R
OUT
B
29
R0945 0.00 2
AP_TO_NAND_SYS_CLK
OUT
13
0% 1/32W MF 01005 ROOM=SOC
I2C PROBE POINTS 12 14 15 16 24 27 30 31 33
1
R0951
33 27 16 8 33 27 16 8
I2C0_AP_SCL I2C0_AP_SDA
100K
PP
1
PP SM
ROOM=SOC
8 12 15 17
33 30 26 25 17 8
I2C1_AP_SCL I2C1_AP_SDA
P3MM-NSM SM 1 PP
1
8
PP0902 PP0903
5% 1/32W MF 2 01005
SOC:SERIAL & GPIO DRAWING NUMBER
Apple Inc.
ROOM=SOC
ROOM=SOC
29 20 8
I2C2_AP_SCL I2C2_AP_SDA
P3MM-NSM SM 1 PP
1
PP SM
PP0904 PP0905
P3MM-NSM ROOM=SOC
5
PAGE TITLE
ROOM=SOC
29 20 8
6
SYNC_DATE=N/A
SYNC_MASTER=N/A
P3MM-NSM
220K
B2
PP SM
R0952
BUTTON_HOLD_KEY_L
PP0900 PP0901
ROOM=SOC
ROOM=SOC
PP1V8_ALWAYS
P3MM-NSM SM 1
P3MM-NSM
5% 1/32W MF 2 01005
1
7
8
PP1V8_ALWAYS
SPI0_MISO SPI0_MOSI SPI0_SCLK SPI0_SSIN SPI1_MISO SPI1_MOSI SPI1_SCLK SPI1_SSIN
OUT
PP1V8
33 30 26 25 17 8
8
BI
33 32 16 9
8
8 20 29
ROOM=SOC
DEFAULT_RESISTOR_191000OHM_2_1 1
8 20 29
BI
C
I2S4_MCK I2S4_BCLK I2S4_LRCK I2S4_DIN I2S4_DOUT
P33 V35 N32 M31
BUTTON PULL-UP RESISTORS PP1V8_SDRAM
21 20 17 14 13 12 9 8 7 6 5 3 33 29
8 17 25 26 30 33
SEP_GPIO0 Y3 SEP_GPIO1 AB4 NC
PIN J31 (UART7_RXD) SHOULD BE BRIEFLY SWITCHED TO PD TO CHECK STATE. STUFF R0911 FOR ANALOG PROX. NOSTUFF R0911 FOR DOPPLER PROX.
128kbit APN:335S0946
8 17 25 26 30 33
BI
3 5 6 7 8 9 12 13 14 17 20 21 29 33
I2C_SEP_TO_EEPROM_SCL I2C_SEP_BI_EEPROM_SDA
3 5 6 7 8 9 12 13 14 17 20 21 29 33
ANTI-ROLLBACK EEPROM
8 16 27 33
ROOM=SOC
ANALOG_PROX 1
BI
2.2K
1
PP1V8
8 16 27 33
OUT
I2S2_DOUT
VIETMOBILE.VN
UART5_RTXD T32
3
R09061 2.2K
I2S2_MCK I2S2_BCLK I2S2_LRCK I2S2_DIN
NC
30 16
I2C0_SCL E31 I2C0_SDA D35
4
3
051-1902 REVISION
R
A.0.0
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
.
BRANCH
PAGE
9 OF 49 SHEET
8 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
MAUI - OWL
1
POWER STATE CONTROL PROBE POINTS ROOM=SOC 30 27 16 9 5
PMU_TO_OWL_ACTIVE_READY
P3MM-NSM SM 1
PMU_TO_OWL_SLEEP1_READY
P3MM-NSM SM 1
PP1021
PP
ROOM=SOC
D
16 11 9
PP
D
PP1023
U0600 MAUI-2GB-25NM-DDR-H
16
C
16 11 9
OUT IN
19
OUT
19
IN
19
OUT
19
IN
19
OUT
19
IN
19 33 29 8
OWL_TO_PMU_SLEEP1_REQUEST PMU_TO_OWL_SLEEP1_READY
AD30 AB33
SPI_OWL_TO_COMPASS_CS_L COMPASS_TO_OWL_INT
AF35 AH32 AG32 AG31 AG30 AF33 AE34 AF34 AF31 AF32
OWL_FUNC_0 OWL_FUNC_1 OWL_FUNC_2 OWL_FUNC_3
AH31 AH33
OWL_I2CM_SCL OWL_I2CM_SDA
AK31 AK32 AL33
OWL_SPI_MISO OWL_SPI_MOSI OWL_SPI_SCLK
DISCRETE_ACCEL_TO_OWL_INT2
OUT IN 9
FCMSP SC58980B0B-A040 SYM 7 OF 14
ACCEL_GYRO_TO_OWL_INT1 SPI_OWL_TO_ACCEL_GYRO_CS_L ACCEL_GYRO_TO_OWL_INT2 SPI_OWL_TO_PHOSPHOROUS_CS_L LCM_TO_OWL_BSYNC OWL_TO_PMU_SHDN_BI_TIGRIS_SWI PHOSPHORUS_TO_OWL_IRQ
OWL_DDR_REQ OWL_DDR_RESET*
OWL_FUNC_4 OWL_FUNC_5 OWL_FUNC_6 OWL_FUNC_7 OWL_FUNC_8 OWL_FUNC_9
PMU_TO_SYSTEM_COLD_RESET_L
CFSB_AOP W33
OMIT_TABLE
AWAKE_REQ AA33 AWAKE_RESET* AD32
CRITICAL
IN
PMGR_MISO AL2 PMGR_MOSI AL1 PMGR_SCLK0 AK4 PMGR_SSCLK1 AL3
OWL_TO_PMU_ACTIVE_REQUEST PMU_TO_OWL_ACTIVE_READY DWI_PMU_TO_PMGR_MISO DWI_PMGR_TO_PMU_BACKLIGHT_MOSI DWI_PMGR_TO_PMU_SCLK DWI_PMGR_TO_BACKLIGHT_SCLK
RT_CLK32768
AD31
PMU_TO_OWL_CLK32K
AE33 AD35 NC AC33 U31 T31
SWD_AP_PERIPHERAL_SWCLK
ROOM=SOC
OWL_SWD_TCK_OUT OWL_SWD_TMS0 OWL_SWD_TMS1 SWD_TMS2 SWD_TMS3
OUT IN
3 5 16 33
C
16 5 9 16 27 30
1
IN
16
OUT
16
OUT
27
IN
16
SM PP
OUT
OUT
PP1002 P2MM-NSM PP1V8
16 27
1
R1002 1.00K
5% 1/32W MF 2 01005
13 33
VIETMOBILE.VN
19
B
IN
19
IN
19
OUT
19
IN
19
OUT
19
OUT
33
IN
33
OUT
33
OUT
33
OUT
29
IN
29
OUT
24 8
OUT
24 8
24 8
SPI_OWL_TO_DISCRETE_ACCEL_CS_L DISCRETE_ACCEL_TO_OWL_INT1
SPI_IMU_TO_OWL_MISO SPI_OWL_TO_IMU_MOSI SPI_OWL_TO_IMU_SCLK
AJ32 AK33
OWL_UART0_RXD OWL_UART0_TXD
OWL_TO_WLAN_CONTEXT_B OWL_TO_WLAN_CONTEXT_A
AH30 AJ31
OWL_UART1_RXD OWL_UART1_TXD
TOUCH_TO_OWL_ACCEL_DATA_REQUEST UART_OWL_TO_TOUCH_TXD
AJ34 AJ33
OWL_UART2_RXD OWL_UART2_TXD
IN
I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_CODEC_TO_AP_OWL_XSP_DIN
OUT
I2S_AP_OWL_TO_CODEC_XSP_LRCLK
AD34 AA34 AE32 NC AE31
33
BI
BI
13
BUTTON_HOLD_KEY_L
W4
NC
IN
8 16 32 33
IN
8 16 28 33
BUTTON_MENU_KEY_L
MENU_KEY* V4
UART_BB_TO_OWL_RXD UART_OWL_TO_BB_TXD
ROOM=SOC
NC
HOLD_KEY* U3 SKEY*
SWD_AP_BI_BB_SWDIO SWD_AP_BI_NAND_SWDIO
3 5 6 7 8 12 13 14 17 20 21 29 33
NOSTUFF
OWL_I2S_BCLK OWL_I2S_DIN OWL_I2S_MCK OWL_I2S_LRCK
B
OWL SYSTEM SHUTDOWN OPTION NOSTUFF
R1020 10
SWI_AP_BI_TIGRIS
1 2 1/32W MF 5% 01005 ROOM=SOC 9
OWL_TO_PMU_SHDN_BI_TIGRIS_SWI
A
BI
8 17
NOSTUFF
R1021
SYNC_MASTER=N/A
10
OWL_TO_PMU_SHDN
1 2 1/32W MF 5% 01005 ROOM=SOC
OUT
16
SYNC_DATE=N/A
PAGE TITLE
SOC:OWL DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
A.0.0 BRANCH
PAGE
10 OF 49 SHEET
9 OF 59
1
SIZE
D
A
8
7
6
5
4
1
PP_GPU 0.8V @10.5A MAX 1
C1100
1
10UF
D
C1101
1
10UF
20% 2 6.3V CERM-X5R 0402-9
1
2.2UF
20% 2 6.3V CERM-X5R 0402-9
ROOM=SOC
C1103
SHORT-10L-0.1MM-SM 1 2 BUCK1_PP_GPU_FB
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
XW1110
C1105
1
2.2UF
20% 6.3V 2 X5R-CERM 0201
ROOM=SOC
C1104
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
OUT
14
ROOM=SOC
ROOM=SOC
TP1120 0.50MM SM PP
1
PP_GPU
10 14
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1106
C1107
C1108
C1109
C1110
C1111
4.3UF
7.5UF
4.3UF
7.5UF
4.3UF
7.5UF
20% 4V CERM 0402
1
3
20% 4V CERM 0402
1
3
2 4
2
20% 4V CERM 0402
1
20% 4V CERM 0402
3
1
2 4
4
3 2
20% 4V CERM 0402
1
3
1
3
2 4
4
2
4
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1112
C1113
C1114
C1115
C1116
C1117
1UF
1UF
1UF
1UF
0.47UF
0.47UF
20% 6.3V CERM 1 0402 3
1
1
20% 4V CERM 0402
3
1
2 4
20% 4V CERM 0402
3
1
2 4
20% 4V CERM 0402
20% 4V CERM 0402 1 3
3
2 4
2 4
AA7 AA9 AA11 AB6 AB10 AB12 AC13 AD6 AD8 AD10 AD12 AE7 AE9 AE11 AE13 AF8 AF10 AF12 AH6 AH8 AH10 AH12 AJ5 AJ7 AJ9 AJ11 AJ13 AK6 AK10 AL7 AL9 AL11 AM6 AM8 AM10 AN7 AN11 AL13 Y8 Y10 Y12 AM12
20% 4V CERM 0402
2 4
20% 6.3V CERM 0402
3
2 4
C 14 10
PP_CPU 0.625V @TBDA MAX 0.9V @10.5A MAX 1.0V @12.5A MAX
C1120
1
10UF
20% 2 6.3V CERM-X5R ROOM=SOC
1
C1121
1
10UF
C1122
1
2.2UF
20% 2 6.3V CERM-X5R 0402-9
1
2.2UF
ROOM=SOC
C1124
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
PP_CPU
20% 2 6.3V X5R-CERM 0201 ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1126
C1127
C1128
C1129
C1130
C1131
7.5UF
7.5UF
4.3UF
7.5UF
4.3UF
4.3UF
1
3 2
20% 4V CERM 0402
1
4
3 2
1
20% 4V CERM 0402
20% 4V CERM 0402
3
1
2 4
4
3 2
1
4
20% 4V CERM 0402
3
1
20% 4V CERM 0402
2 4
2 4
3
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1132
C1133
C1134
C1135
C1136
C1137
4.3UF
7.5UF
1UF
1UF
1UF
1UF
1
20% 4V CERM 0402
3
20% 4V CERM 0402
1
2 4
3 2
ROOM=SOC
1
20% 4V CERM 0402
20% 4V CERM 0402 1 3
3
2 4
4
ROOM=SOC
2 4
ROOM=SOC
C1139
C1140
C1141
0.47UF
0.47UF
0.47UF
1
2 4
3
1
2 4
3
1
6.3V CERM 20% 0402
CRITICAL ROOM=SOC
OMIT_TABLE
VDD_CPU
VDD_GPU
N17 N19 P10 G11 P12 P14 P16 P20 R15
3
2 4
R19 G13 R9 T10 T14 T16 U11 V14
ROOM=SOC
C1138
6.3V CERM 20% 0402
FCMSP SC58980B0B-A040 SYM 8 OF 14
20% 4V CERM 0402 1 3
2 4
0.47UF 6.3V CERM 20% 0402
1
20% 4V CERM 0402
U0600 MAUI-2GB-25NM-DDR-H
3
1
2 4
6.3V CERM 20% 0402
3
V16 G7 R23 G9 H10 T24 P22 W17
2 4
XW1100
14
OUT
G15 W13 T12 M6 U9 V12 W9 M12 M18 N15 N21 N9 F10 H14 H16 H20 H22 H6 H8 J11 J13 J17 J19 J23 J7 K10 K14 K16 K20 K22 K6 K8 L11 L13 L15 L17 L19 L21 M24 L7 L9 F8 M8 N11 N13
SHORT-10L-0.1MM-SM 2 1
BUCK0_PP_CPU_FB
ROOM=SOC
N23 G17 G21 T18 T20
A P2MM-NSM 1 SM
PP1100
U0600 MAUI-2GB-25NM-DDR-H FCMSP SC58980B0B-A040 SYM 9 OF 14
CRITICAL
VDD_SOC
ROOM=SOC
OMIT_TABLE
W23 Y14 Y16 Y20 Y22 Y24 Y26 G29 AA27 F17 F20 L29 N29 V28
P2MM-NSM SM 1
AP_CPU_SENSE_P
VDD_SOC
VSS
AJ20
VDD_SOC_SENSE
AK21
VSS_SOC_SENSE
AP_CPU_SENSE_N
VDD_GPU_SENSE G20
Y6 VDD_CPU_SENSE
20% 2 6.3V CERM-X5R 0402-9
L22 L24 L26 L28 M1 M5 M7 M9 M11 M13 M17 M21 M23 M25 M27 M29 M35 N6 N10 N12 N14 N16 N18 G19 N22 N24 N26 N28 N30 N33 P9 P11 P13 P15 P17 P19 P21 P23 P25 P27 P29 P35 R4 R6 R8 R10 R12 R14 M19 R18 R20 R22 R24 R26 R28 R30 T1 T2 R33 T9 T11 T13 T15 T17 P7 T23 T25 T27 T30 T35 U6 U10 U12
1
C1151 10UF
20% 2 6.3V CERM-X5R 0402-9
ROOM=SOC
XW1120
SHORT-10L-0.1MM-SM 1 2 BUCK2_PP_SOC_FB
ROOM=SOC
OUT
14
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1153
C1154
C1155
C1156
C1157
4.3UF
1UF
1UF
0.47UF
0.47UF
1
20% 4V CERM 0402
3
1
20% 4V CERM 0402
2 4
3
1
20% 4V CERM 0402
3
2 4
1
6.3V CERM 20% 0402
3
2 4
1
6.3V CERM 20% 0402
D
3
2 4
C
B
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SOC:POWER (1/3) DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
PP
P2MM-NSM 1 SM
PP1102
PP
AP_GPU_SENSE_N
AP_SOC_SENSE_N
NOTE:AP_GPU_SENSE_P PROBE LOCATION @ R2205.2
16
IN
P2MM-NSM SM 1 PP
NOTICE OF PROPRIETARY PROPERTY:
PP1104
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
ROOM=SOC
ROOM=SOC
AP_GPU_SENSE_P
AP_SOC_SENSE_P
P2MM-NSM SM 1 PP
PP1105
ROOM=SOC
7
10UF
VSS_GPU_SENSE H19
Y7 VSS_CPU_SENSE
ROOM=SOC
8
C1150
2 4
PP
ROOM=SOC
PP1101
AA17 AA19 AA23 AB14 AB16 AB20 AB22 AB24 AB26 AC17 AC19 AC23 AD16 AD20 AD22 AD24 AD26 AE5 AE15 AE17 AE19 AE23 AF14 AF16 AF20 AF22 AF24 AF26 AG17 AG19 AG23 AH16 AH20 AH22 AH24 AH26 AJ15 AJ17 AJ19 AJ23 AK14 J29 G23 AK22 F6 F14 AL15 AM5 G25 G27 H24 H26 H28 J27 K24 K26 K28 L27 L23 M26 M28 AL19 N7 N27 P24 P26 P28 R17 R27 R29 T22 T26 T7 T28 U17 V8 V20 V22 V24 V26 W7 W11 Y28
14
0.825V @4.7A MAX 0.725V @TBDA MAX
VIETMOBILE.VN
ROOM=SOC
10 14
20% 4V CERM 0402
B
C1125
1
2.2UF
20% 2 6.3V X5R-CERM 0201
20% 6.3V 2 X5R-CERM 0201
ROOM=SOC
C1123
0402-9
TP1100 0.50MM SM PP
1
1 PP_SOC
MAUI - CPU, GPU & SOC RAILS 14 10
2
3
6
5
4
3
2
A.0.0 BRANCH
PAGE
11 OF 49 SHEET
10 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
MAUI - POWER SUPPLIES DDR IMPEDANCE CONTROL 1.06 - 1.17V @635mA MAX INTERNALLY SUPPLIES VDDQ
D 14 11
14 11
D
PP1V1 1
R1200 1R1201 1R1202
PP1V1
240
1
C1240 10UF
20% 2 6.3V CERM-X5R 0402-9
1
C1241 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=SOC
ROOM=SOC
1
C1242
C1243
1
2.2UF
2.2UF
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1245
C1246
C1247
4.3UF
1UF
0.47UF
3
1
20% 4V CERM 0402
3
10UF
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1201
C1202
C1203
4.3UF
1UF
0.47UF
20% 2 6.3V CERM-X5R 0402-9 ROOM=SOC
3
2 4
0.8V @TBDA MAX 0.9V @TBDA MAX 1.0V @1.0A MAX
PP_FIXED
C1200
1
20% 6.3V CERM 0402
2 4
0.802-TBDV @1.1A MAX
1
ROOM=SOC
ROOM=SOC
2 4
14 7 6
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
20% 4V CERM 0402
1
20% 4V CERM 0402
3
2 4
20% 4V CERM 0402 1 3 2 4
1
20% 6.3V CERM 0402
2
3
4
B
AA15 AA21 AA25 AB18 AC15 AC21 AC25 AD14 AD18 AE21 AE25 AF18 AG15 AG21 AH25 AH14 AH18 AJ21 AK16 F12 G10 V18 AL17 J25 L25 N25 R25 R7 AN6 U25 W15 W21 W25 Y18 F21 F26 AB28 AC27 G18 AK20 F16 R16 T8 V7 U19 W27 U27 AF4 AF27 U21
U0600 MAUI-2GB-25NM-DDR-H FCMSP SC58980B0B-A040 VDD_CPU_SRAM SYM 10 OF 14
CRITICAL ROOM=SOC
AC11 AC7 AC9 AA13 AG11 AG7 AG9 AK12
PP_CPU_SRAM ROOM=SOC
ROOM=SOC
ROOM=SOC
C1220
C1221
C1222
0.47UF
1UF
4.3UF
20% 6.3V CERM 0402
1
OMIT_TABLE
2
3
20% 4V CERM 0402 1 3
1
2 4
4
20% 4V CERM 0402
1
14
C1223 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=SOC
3
1% 1/32W MF 2 01005
C1248 2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
1
C
1
2.2UF
20% 2 6.3V X5R-CERM 0201
20% 2 6.3V X5R-CERM 0201
C1244
1
ROOM=SOC
A20 A22 B11 B15 B23 B25 D16 D20 D22 E15 E17 E19 E21
AN19 AR18 AR21 AR8 AT13 AT16 AM14 AM16 AM18 AM20 AR15 AN13 AN15
U0600 MAUI-2GB-25NM-DDR-H FCMSP SC58980B0B-A040 SYM 11 OF 14 VDDIO11_DDR0
DDR0_RREF DDR1_RREF DDR2_RREF DDR3_RREF
DDR0_ZQ B21 DDR3_ZQ P2
ROOM=SOC
VDD_GPU_SRAM
VDD_FIXED
PP_GPU_SRAM
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1224
C1225
C1226
4.3UF
1UF
4.3UF
1
2 4
3
20% 4V CERM 0402 1 3 2 4
1% 1/32W MF 2 01005
240
ROOM=SOC
1
R1204 240
1% 1/32W MF 2 01005
1% 1/32W MF 2 01005
ROOM=SOC
R1203 ROOM=SOC
1% 1/32W MF 2 01005 ROOM=SOC
1
R1205 240
1% 1/32W MF 2 01005 ROOM=SOC
DDR0_RREF DDR1_RREF DDR2_RREF DDR3_RREF DDR0_ZQ DDR3_ZQ
OMIT_TABLE
DDR0_RET* DDR1_RET* DDR2_RET* DDR3_RET*
C18 AP15 Y31 U4
PMU_TO_OWL_SLEEP1_READY
VDDIO11_PLL_DDR
9 16
FL1280
100OHM-25%-0.12A
1.1V @7mA MAX F19 AK18 W26 P8
IN
PP1V1_DDR_PLL
1
2
VOLTAGE=1.1V 1
PP1V1
11 14
01005 ROOM=SOC
C1280 0.22UF
20% 2 6.3V X5R 01005-1
ROOM=SOC
C
VDDIO11_DDR1
VDDIO11_RET_DDR
D19 AN17 W31 T4
PP1V1_SDRAM
12 14 15
1.06 - 1.17V
2 4
0.8V @0.5A MAX
20% 4V CERM 0402
240
CRITICAL
VIETMOBILE.VN H12 H18 R21 U15 J15 J21 J9 K12 K18 M10 M14 M16 M20 P18 R11 R13 U13 V10 M22
C21 AP17 V31 P5
240
1
1
20% 4V CERM 0402
2 4
3
1
C1227 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=SOC
14
AB29 V29 Y29 Y35 AB35 AG34 M34 R35 T29 T34 AA30 U30 AC30
AA1 AC2 V6 W2 H2 M2 U5 P6 T6 U1 N5 R5 W5
DDR0_SYS_ALIVE DDR1_SYS_ALIVE DDR2_SYS_ALIVE DDR3_SYS_ALIVE
C19 AP16 W32 T3
SYSTEM_ALIVE
IN
13 16 17
VDDIO11_DDR2
B VDDIO11_DDR3
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
0.756-TBDV @44mA MAX 15
PP0V8_OWL 1
C1250 1.0UF
AH29 AD29 AF29
SOC:POWER (2/3) DRAWING NUMBER
VDD_LOW
Apple Inc.
20% 2 6.3V X5R 0201-1
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
A.0.0 BRANCH
ROOM=SOC
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
PAGE
12 OF 49 SHEET
11 OF 59
1
SIZE
D
A
8
D
C
B
A
A1 A2 A11 A16 A21 A24 A25 A27 A34 A35 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA24 AA26 N8 AA28 AA35 AB1 C17 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB25 AB27 AB30 AC1 AC6 AC8 AC10 AC12 AC14 AC16 AC18 AC20 AC22 AC24 AC26 T5 AC28 AC34 AC35 AD5 AD7 AD9 AD11 AD15 AD17 AD19 AD21 AD23 AD25 AD27 AD33 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE22 AE24 AE26 AE29 AE30 AE35 AF5 AF7 AF9 AF11 AF15 AF17 AF19 AF21
7
U0600 MAUI-2GB-25NM-DDR-H FCMSP SC58980B0B-A040 SYM 13 OF 14
CRITICAL ROOM=SOC
OMIT_TABLE
VSS
VSS
AF23 AF25 AF30 AG1 AG2 AG3 AG6 AG8 AG10 AG14 AG16 AG18 AG20 AG22 AG24 U7 AG29 AG33 AG35 AH5 AH7 AH9 AH11 AH13 AH15 AH17 AH19 AH21 AH23 AH27 AJ6 AJ8 AJ10 AJ12 AJ14 AJ16 AJ18 W8 AJ22 AG12 AK24 AJ28 AK2 AK3 AK5 AK7 AK9 AK11 AK13 AK15 B28 AK17 M15 AP28 AK26 AK30 AK34 AK29 AL6 AL8 AL10 AL12 AF28 AL14 AM29 AL16 AR27 AL18 Y30 AL20 AL25 AL28 AL30 AL31 AM7 AM9 AM11 AM13 AM15 AM17 AM19 AM21 AM33 AM34 AM35 AN3 AN5 AN16 AN8 AN10
6
AN12 AN14 AN18 AN29 AN33 AP2 AP13 AP14 AP20 AP25 AP26 AP27 AP30 AP31 AP32 AP33 AR1 AR5 AR9 AR14 AR16 AR25 AR34 AR35 AT1 AT2 AT6 AT8 AT9 AT14 AT17 AT18 AT21 AT25 AT34 AT35 B1 B2 B16 B20 B22 B24 B27 B34 B35 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C20 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 D3 D4 D5 D6 D11 D17 D21 D23 D26 D27 D28 D29 D30 E1 E3 E4 E5 D7 E9
5
U0600 MAUI-2GB-25NM-DDR-H FCMSP SC58980B0B-A040 SYM 14 OF 14
CRITICAL ROOM=SOC
OMIT_TABLE
VSS
E12 E16 E18 E20 E22 E24 E26 E29 E32 F4 F5 F7 F9 F11 F13 F15 F18 D18 F23 E30 F25 F27 F28 F29 G4 G5 G6 G8 G12 G14 G16 E6 G22 G24 G26 G28 G33 H1 H7 H9 H11 H13 H15 H17 E28 H21 H23 H25 H27 H29 J2 J5 J6 J30 J8 J10 J12 J14 J16 J18 J20 J22 J24 J26 J28 K7 K9 K11 K13 K15 K17 K19 K21 K23 K25 K27 K29 K34 K35 L1 L5 L6 K4 L8 L10 L12 L14 L16 L18 L20
4
2
3
MAUI - POWER SUPPLIES 1.70-1.95V @100mA(TBD) 33 31 30 27 24 16 15 14 8
D
MAX
PP1V8_SDRAM 1
C1300 2.2UF
20% 2 6.3V X5R-CERM 0201
1
C1301
1
2.2UF
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
C1302
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
ROOM=SOC
1.06-1.17V @1.3A(TBD) MAX 15 14 11
PP1V1_SDRAM
C1310
1
1
10UF
C1312 2.2UF
20% 2 6.3V CERM-X5R 0402-9
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
1
1
2.2UF
C1314 2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
C1311 (2.2UF) MOVED TO PP1V1 TO HELP WITH DDR PI (SAME AS N66).
C1313
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1316
C1317
1UF
1UF
1
20% 4V CERM 0402
3
2 4
20% 4V CERM 0402
1
3
2 4
1.62-1.98V @41mA MAX 21 20 17 14 13 12 9 8 7 6 5 3 33 29
PP1V8 1
C1320 10UF
20% 2 6.3V CERM-X5R 0402-9
1
C1321 2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
1
C1322 2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
1
C1323 2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=SOC
ROOM=SOC
A10 A26 AD1 AH35 AT22 AT7 G1 L35 A15 A23 AB34 AD2 AH34 AR13 AR17 AR22 AR7 AT15 B10 B26 G2 L34 N2 R1 U34 V2 W35
U0600 MAUI-2GB-25NM-DDR-H VDD1
FCMSP SC58980B0B-A040 SYM 12 OF 14
CRITICAL ROOM=SOC
OMIT_TABLE
VDD2
F30 H30 K30 M30 VDDIO18_GRP1 N31 P30 H5 VDDIO18_GRP2 K5 AN9 AA5 VDDIO18_GRP3 AC5 AG5 AL5 AM23 VDDIO18_GRP4 AE28 VDDIO18_GRP10 AG28 Y5 VDDIO18_GRP11
VIETMOBILE.VN VSS
1
VDDIO18_GRP10:1.62-1.98V @8mA VDDIO18_LPOSC:1.62-1.98V @1mA
19 14
17 15 8
21 20 17 14 13 12 9 8 7 6 5 3 33 29
MAX MAX
PP1V8_IMU_OWL PP1V8_ALWAYS
1.62-1.98V @1mA
MAX
PP1V8 VDD18_FMON :1.62-1.98V @1mA MAX VDD18_UVD :1.62-1.98V @5mA MAX VDD18_AMUX :1.62-1.98V @1mA MAX VDD18_TSADC:1.645-1.89V @2mA MAX
1
C1330 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=SOC
AG26 VDD18_LPOSC AM22 VDD18_FMON AD13 VDD18_UVD AN24 VDD18_AMUX AG13 AK8 AB8 VDD18_TSADC N20 U23 AK23
VSS
(OWL) (AON)
U14 U16 U18 U22 U24 U26 U28 U35 V1 V5 AA29 U29 V9 V11 V13 V15 V17 V19 V21 V23 V25 V27 W30 W1 W6 W10 W12 W14 W16 W18 W20 W22 W24 W28 W29 W34 Y1 Y9 Y11 Y13 Y15 Y17 Y19 Y21 Y23 Y25 Y27 Y34 AC29 AD28 AE27 AG27 AJ30 AJ35 AK19 AT27 D31 G30 L30 P4 U8 V30 A28 AL32 T21
C
B
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SOC:POWER (3/3) DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
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PAGE
13 OF 49 SHEET
12 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
S3E NAND R1530 21 20 17 14 13 12 9 8 7 6 5 3 33 29
PP1V8
1
24.9 2
PP1V8_NAND_AVDD VOLTAGE=1.8V
1% 1/32W MF 01005
D
C1534
1
20% 6.3V 2 CERM-X5R 0402-9 ROOM=NAND
C1520
1
15UF
C1521
1
C1522
1
C1524
1
ROOM=NAND
C1525
1
20% 6.3V 2 CERM-X5R 0402-9
5% 2 16V NP0-C0G 01005
ROOM=NAND
C1523
10UF
100PF
20% 2 6.3V X5R-CERM 01005
ROOM=NAND
ROOM=NAND
ROOM=NAND
0.1UF
20% 6.3V 2 CERM-X5R 0402-9
20% 2 6.3V X5R 0402-1
ROOM=NAND
20% 2 6.3V X5R-CERM 01005
VOLTAGE=0V
10UF
15UF
20% 2 6.3V X5R 0402-1
NAND_AGND
D
C1531 0.1UF
20% 2 6.3V X5R-CERM 0201 13
10UF
1
2.2UF
ROOM=NAND
1
C1530
1
ROOM=NAND
ROOM=NAND
PP3V0_NAND
C1500
1
1
C1532 1.0UF
20% 2 6.3V X5R 0201-1
1
C1526
1
1.0UF
0.1UF
20% 2 6.3V X5R 0201-1
20% 2 6.3V X5R-CERM 01005
ROOM=NAND
C1527
ROOM=NAND
1
C1528 220PF
10% 2 10V X7R-CERM 01005
ROOM=NAND
1
C1529
15UF
C1533
1
33PF
8.2PF
5% +/-0.5PF 16V 2 16V 2 NP0-C0G-CERM NP0-C0G-CERM 01005 01005
ROOM=NAND
ROOM=NAND
ROOM=NAND
20% 2 6.3V X5R 0402-1
EXTRA CAPS ADDED FOR UF BLOCKING AND DESENSE MITIGATION.
C1504 1.0UF
20% 2 6.3V X5R 0201-1
PP0V9_NAND
20% 2 6.3V X5R 0402-1
1
C1548
1
10UF
1
15UF
20% 6.3V 2 CERM-X5R 0402-9
C
C1540
15UF
20% 2 6.3V X5R 0402-1
ROOM=NAND
C1541
20% 2 6.3V X5R 0402-1
ROOM=NAND
ROOM=NAND
C1542
10UF
20% 6.3V 2 CERM-X5R 0402-9
1
C1543
1
10UF
1.0UF
20% 6.3V 2 CERM-X5R 0402-9
ROOM=NAND
C1546
20% 2 6.3V X5R 0201-1
ROOM=NAND
1
1
20% 2 6.3V X5R 0201-1
1
C1517 1.0UF
ROOM=NAND
20% 2 6.3V X5R 0201-1
0.01UF
10% 2 6.3V X5R 01005
R1560 10K
1% 1/32W MF 2 01005
ROOM=NAND
NOSTUFF 1
C1561 0.01UF
10% 2 6.3V X5R 01005
ROOM=NAND
1
R1561 10K
1% 1/32W MF 2 01005
8
IN
13 6
IN
13 6
IN
6
ROOM=NAND
1
R1501 3.01K
1% 1/20W MF 2 201
ROOM=NAND
B
OUT
13 6
IN
13 6
IN
13 6
IN
13 6
IN
6
OUT
6
OUT
6
OUT
6
OUT
15UF
C1506
1
1.0UF
ROOM=NAND
C1510
1
220PF
20% 2 6.3V X5R 0201-1
C1511 0.1UF
10% 2 10V X7R-CERM 01005
ROOM=NAND
EXTRA CAPS ADDED FOR UF BLOCKING AND DESENSE MITIGATION.
20% 2 6.3V X5R 0402-1
ROOM=NAND
20% 2 6.3V X5R-CERM 01005
ROOM=NAND
ROOM=NAND
1
C1512
8.2PF
1
+/-0.5PF 2 16V NP0-C0G-CERM 01005
ROOM=NAND
ROOM=NAND
C1516 100PF
5% 2 16V NP0-C0G 01005
1
C1514 56PF
2% 2 50V NP0-C0G 0201
ROOM=NAND
1
C1515 1UF
20% 2 6.3V X5R 0201
ROOM=NAND
ROOM=NAND
C1507 100PF
5% 2 16V NP0-C0G 01005
1
C1508 100PF
5% 2 16V NP0-C0G 01005
C
ROOM=NAND
NAND_VREF AP_TO_NAND_SYS_CLK
D2
PCIE_AP_TO_NAND_REFCLK_P PCIE_AP_TO_NAND_REFCLK_N
H8 H6
CLK_IN PINUSE=BI PCIE_REFCLK_P PINUSE=BI PCIE_REFCLK_M
PCIE_NAND_TO_AP_CLKREQ_L
G9
PCIE_CLKREQ*
PCIE_NAND_RESREF
M6
PCIE_AP_TO_NAND_TXD0_P PCIE_AP_TO_NAND_TXD0_N
M8 K8
PCI_RESREF PINUSE=BI PCIE_RX0_P PINUSE=BI PCIE_RX0_M
PCIE_AP_TO_NAND_TXD1_P PCIE_AP_TO_NAND_TXD1_N
N5 N3
PCIE_NAND_TO_AP_RXD0_P PCIE_NAND_TO_AP_RXD0_N
P8 N7
PCIE_NAND_TO_AP_RXD1_P PCIE_NAND_TO_AP_RXD1_N
M2 K2
C1505 10UF
20% 6.3V 2 CERM-X5R 0402-9 ROOM=NAND
OA0 OA10 OD0 OD10 OG0 OG10
ROOM=NAND
1
U1500 VLGA
VER-1
BOMOPTION=OMIT_TABLE ROOM=NAND CRITICAL
PINUSE=BI PCIE_RX1_P PINUSE=BI PCIE_RX1_M PINUSE=BI PCIE_TX0_P PINUSE=BI PCIE_TX0_M PINUSE=BI PCIE_TX1_P PINUSE=BI PCIE_TX1_M
EXT_D0 EXT_D1 EXT_D2 EXT_D3 EXT_D4 EXT_D5 EXT_D6 EXT_D7
G3 J3 H2 E3 E7 F6 C7 B8
EXT_NCE
G1
EXT_NRE
F4
EXT_NWE
C5
EXT_RNB
G5
EXT_CLE
H4
EXT_ALE
D4
PMU_TO_NAND_LOW_BATT_BOOT_L AP_TO_NAND_FW_STRAP
NC NC NC NC NC
IN
16
IN
8
ROOM=NAND
P3MM-NSM SM 1
PP1520 R1520 PP
SYSTEM_ALIVE
IN
11 16 17
PCIE_AP_TO_NAND_RESET_L
IN
6
SWD_AP_BI_NAND_SWDIO_R SWD_AP_NAND_SWCLK_R
0.00
1 2 SWD_AP_BI_NAND_SWDIO 0% MF 01005 1/32W ROOM=NAND
NAND_ZQ
0.00
SWD_AP_PERIPHERAL_SWCLK 1 2 0% MF 01005 1/32W
NC
9 33
IN
ROOM=NAND
NC
1
PP
PP1521
P3MM-NSM
F8
RESET*
D8
TRST*
D6
ZQ
1
ROOM=NAND
B2
R1500 34.8
0.5% 1/32W MF 2 01005
B
R1521
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
NC
9
BI
B4 B6 OE10 G7 L3 L5 L7 P2 P4 P6 OC0 OC10 OE0
AP_TO_NAND_RESET_L
VSSA
IN
C1513
5% 2 16V NP0-C0G-CERM 01005
SM
5
1
33PF
VCC VCC VCC VCC VCC VCC
A5 OB0 OB10 OF0 OF10 R5
A3 A7 F2 J1 J9 R3 R7 VDD VDD VDD VDD VDD VDD VDD
E5
C3
K4 K6
1
VIETMOBILE.VN
1
ROOM=NAND
VREF
C1560
ROOM=NAND
VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO
1
ROOM=NAND
10% 2 6.3V X5R-CERM 01005
AVDD1
ROOM=NAND
NOSTUFF
1000PF
PCI_VDD1 PCI_VDD2
PP1V8
20% 2 6.3V X5R-CERM 01005
J7
20% 2 6.3V X5R-CERM 01005
C1554 PCI_AVDD_H
21 20 17 14 13 12 9 8 7 6 5 3 33 29
0.1UF
1
M4 J5
0.1UF
C1551
20% 2 6.3V X5R 0402-1
C1503
1
DEFAULT_CAPACITOR_56.000000pF_2_1
PCI_AVDD_CLK1 PCI_AVDD_CLK2
1
15UF
1.0UF
ROOM=NAND
C1550
C1502
C1547
ROOM=NAND
1
1
ROOM=NAND
ROOM=NAND
1
C1501 15UF
ROOM=NAND
1
15
1
15
NAND_AGND
13
ROOM=NAND
PCIE RECEIVE-SIDE PROBE POINTS ROOM=NAND 13 6 13 6
PCIE_AP_TO_NAND_REFCLK_P PCIE_AP_TO_NAND_REFCLK_N
P3MM-NSM SM 1 PP
1
PP SM
PP1500 PP1501
P3MM-NSM ROOM=NAND
A
ROOM=NAND 13 6 13 6
PCIE_AP_TO_NAND_TXD0_P PCIE_AP_TO_NAND_TXD0_N
SYNC_MASTER=N/A
P3MM-NSM SM 1 PP
1
PP SM
PAGE TITLE
PP1502 PP1503
NAND DRAWING NUMBER
P3MM-NSM
Apple Inc.
ROOM=NAND
13 6
PCIE_AP_TO_NAND_TXD1_P PCIE_AP_TO_NAND_TXD1_N
P3MM-NSM SM 1 PP
1
PP SM
NOTICE OF PROPRIETARY PROPERTY:
PP1504 PP1505
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
P3MM-NSM ROOM=NAND
8
051-1902 REVISION
R
ROOM=NAND 13 6
SYNC_DATE=N/A
7
6
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2
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PAGE
15 OF 49 SHEET
13 OF 59
1
SIZE
D
A
8
7
6
5
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3
1
ANTIGUA PMU - Buck Supplies CRITICAL
D
OMIT_TABLE
U2000
D2255A080UXUVAI2
PP_VCC_MAIN 1
C2085
1
10UF
C2086 10UF
10UF
10UF
20% 2 6.3V CERM-X5R 0402-9
ROOM=PMU
C2088
20% 2 6.3V CERM-X5R 0402-9
ROOM=PMU
ROOM=PMU
C2089
1
2.2UF
C2090 2.2UF
20% 2 6.3V X5R-CERM 0201
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
C2091
1
1
2.2UF
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
C2092
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
A8 B8 C8
1
C2093
1
2.2UF
C2094 2.2UF
20% 2 6.3V X5R-CERM 0201
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
C2095
1
1
2.2UF
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
C2096
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
A12 B12 C12
C
1
2.2UF
C2099 100PF
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
A5 B5 C5
5% 2 16V NP0-C0G 01005
ROOM=PMU
ROOM=PMU
T18 T19 V12 Y12 Z12 N17 N18 N19
BUCK0_LX1
1
2
1
C2002
29 28 20 19 12
B 11
PP1V8
PP1V8_TOUCH PP1V8_IMU_OWL
VOLTAGE=1.8V
VOLTAGE=1.8V
PP1V1 VOLTAGE=1.1V
BUCK0_LX2
A7 B7 C7
BUCK0_LX2
1
1
2
BUCK0_LX3
A9 B9 C9
BUCK0_FB F8
C2006
1
15UF
OMIT_TABLE ROOM=PMU
C2007
1
15UF
20% 2 6.3V X5R 0402-1
CRITICAL
PIQA20161T-SM
1.1A MAX
BUCK5
C2050 15UF
20% 2 6.3V X5R 0402-1
1
OMIT_TABLE
C2051
XW2050 SHORT-10L-0.1MM-SM
15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
2
1
ROOM=PMU
BUCK5_FB
BUCK0_PP_CPU_FB
IN
L2010
400mA MAX
BUCK6
PP1V2_CAMERA
0603
VOLTAGE=1.2V 1
C2060 15UF
20% 2 6.3V X5R 0402-1
1
1.1A MAX
BUCK7
1
C2070
20% 2 6.3V X5R 0402-1
1.1A MAX
ROOM=PMU
21
IN
1
C2071 15UF
20% 2 6.3V X5R 0402-1
BUCK1_LX0
A17 B17 C17
BUCK1_LX0
2
10
PP_GPU
1
CRITICAL
PIQA20161T-SM
OMIT_TABLE
1
ROOM=PMU
BUCK1_LX1
VDD_BUCK4
A15 B15 C15
BUCK1_LX1
C2012 15UF
20% 2 6.3V X5R 0402-1
0.47UH-20%-3.8A-0.048OHM 1
2
1
C2013 15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
CRITICAL
PIQA20121T-SM
1
C2014 15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
ROOM=PMU
15UF
20% 2 6.3V X5R 0402-1
1
C2081 15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
ROOM=PMU
ROOM=PMU
15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
ROOM=PMU
VDD_BUCK5
A13 B13 C13
BUCK1_LX2
1
1
2
15UF
20% 2 6.3V X5R 0402-1
CRITICAL
PIQA20161T-SM
C2017
1
C2018 15UF
20% 2 6.3V X5R 0402-1
1
C2019 15UF
20% 2 6.3V X5R 0402-1
BUCK1_LX2
VDD_BUCK7
OMIT_TABLE ROOM=PMU
ROOM=PMU
L2013
ROOM=PMU
1
C2020 15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
1
C2021 15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
ROOM=PMU
1
C2011 15UF
20% 2 6.3V X5R 0402-1 ROOM=PMU
0.47UH-20%-3.8A-0.048OHM
BUCK1_LX3
VDD_BUCK8
A11 B11 C11
BUCK1_FB F12
BUCK1_LX3
2
1
CRITICAL
PIQA20121T-SM
OMIT_TABLE ROOM=PMU
BUCK1_PP_GPU_FB
IN
L2020
10
1.0UH-20%-3.6A-0.060OHM BUCK3_SW1
BUCK2_LX0
H17 H18 H19
BUCK2_LX0
1
PP_SOC
2 PIQA20161T-SM
CRITICAL OMIT_TABLE ROOM=PMU
1
L2021
U16 BUCK3_SW2 U15 BUCK3_SW3
15UF
0.47UH-20%-3.8A-0.048OHM BUCK2_LX1
BUCK4_SW1
K17 K18 K19
BUCK2_FB J14
BUCK2_LX1
2
20% 2 6.3V X5R 0402-1
1
1
C2023 15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
CRITICAL
PIQA20121T-SM
C2022
1
C2024 15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
1
C2025 15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
1
10
VOLTAGE=0.825V 0.725V/0.825V
C2026 15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
B
ROOM=PMU
OMIT_TABLE ROOM=PMU
BUCK2_PP_SOC_FB
IN
10
L2030
1.0UH-20%-3.6A-0.060OHM M17 M18 M19
BUCK5_LX0
BUCK3_LX0
R18 R19
BUCK3_LX0
1
PP1V8_SDRAM
2 PIQA20161T-SM
CRITICAL OMIT_TABLE
XW2030 ROOM=PMU SHORT-10L-0.1MM-SM
M13 BUCK5_FB
BUCK3_FB
V19
BUCK3_FB
1
2
H1 H2
VBUCK3_SW BUCK6_LX0
1
C2030 15UF
20% 2 6.3V X5R 0402-1
U17 V17 Y17 Z17
8 12 15 16 24 27 30 31 33
VOLTAGE=1.8V 1
C2031 15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
1
C2032 100PF
5% 2 16V NP0-C0G 01005
ROOM=PMU
ROOM=PMU
F1 F2
BUCK4_LX0
BUCK7_LX0
V11 Y11 Z11
BUCK4_LX0
1
PP1V1_SDRAM
2 PIQA20161T-SM
CRITICAL OMIT_TABLE ROOM=PMU
L2041
0.47UH-20%-3.8A-0.048OHM
BUCK7_FB
C1 BUCK7_FB
L2080
BUCK4_LX1
ROOM=PMU
CRITICAL
F17 F18 F19
BUCK4_FB T9 BUCK8_LX0
BUCK4_LX1
1
2 PIQA20121T-SM
CRITICAL
1
C2040 15UF
20% 2 6.3V X5R 0402-1 ROOM=PMU
1
C2041 15UF
20% 2 6.3V X5R 0402-1 ROOM=PMU
1
C2042 15UF
20% 2 6.3V X5R 0402-1 ROOM=PMU
1
C2043 15UF
20% 2 6.3V X5R 0402-1 ROOM=PMU
1
C2044 100PF
5% 2 16V NP0-C0G 01005
ROOM=PMU
SYNC_MASTER=N/A
OMIT_TABLE
XW2040 SHORT-10L-0.1MM-SM BUCK4_FB
1
ROOM=PMU
SYNC_DATE=N/A
PAGE TITLE
SYSTEM POWER:PMU (1/3)
2
DRAWING NUMBER
ROOM=PMU
XW2080
BUCK8_FB
V13 Y13 Z13
11 12 15
VOLTAGE=1.1V
VBUCK4_SW
C19 BUCK8_FB
Apple Inc.
V15 Y15 Z15
7
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
A.0.0 BRANCH
ROOM=PMU
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
C
L2012
ROOM=PMU
SHORT-10L-0.1MM-SM 2 1
20% 2 6.3V X5R 0402-1
C2016
OMIT_TABLE
1.0UH-20%-3.6A-0.060OHM
XW2070 SHORT-10L-0.1MM-SM
PIXB2016FE-SM
C2080
15UF
1
L2040
1.0UH-20%-2.25A-0.15OHM 2 1 BUCK8_LX0 1
C2015
1.0UH-20%-3.6A-0.060OHM
ROOM=PMU
1
1
10
VOLTAGE=0.9V 0.70V/0.80V/0.9V
ROOM=PMU
L2070
2
ROOM=PMU
J5 BUCK6_FB
1.0UH-20%-2.25A-0.15OHM 2 1 BUCK7_LX0
PP_GPU_SRAM VOLTAGE=1.0V 0.80V/0.90V/1.0V
5% 16V NP0-C0G 01005
CRITICAL BUCK6_FB CRITICAL
PIXB2016FE-SM
ROOM=PMU
BUCK8
2
ROOM=PMU
15UF
A
ROOM=PMU
C2062 100PF
PP_CPU_SRAM VOLTAGE=1.0V 0.80V/0.90V/1.0V
11
1
15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
11
C2061
ROOM=PMU
1.0UH-20%-3.6A-0.060OHM
L2060
21 20
20% 2 6.3V X5R 0402-1
ROOM=PMU
ROOM=PMU
1UH-20%-1.2A-0.320OHM 2 1 BUCK6_LX0
15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
C2010
OMIT_TABLE
ROOM=PMU
ROOM=PMU
1
15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
C2009
BUCK4
1
1
15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
C2008
4.7A MAX
VOLTAGE=0.85V
ROOM=PMU
BUCK3
PP_FIXED
ROOM=PMU
1.5A MAX
11 7 6
20% 2 6.3V X5R 0402-1
0.47UH-20%-3.8A-0.048OHM 2 1 BUCK0_LX3 CRITICAL PIQA20121T-SM
L2050
1.0UH-20%-3.6A-0.060OHM 2 1 BUCK5_LX0 PIQA20161T-SM CRITICAL
15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
C2005
OMIT_TABLE
L2011
E1 E2
V16 Y16 Z16
1
ROOM=PMU
VDD_BUCK3
VDD_BUCK6
U18 V18 Y18 Z18
C2004 15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
VIETMOBILE.VN 29 21 20 17 13 12 9 8 7 6 5 3 33
1
15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
C2003
L2002
VDD_BUCK1_01
J1 J2
E17 E18 E19
1
15UF
20% 2 6.3V X5R 0402-1
ROOM=PMU
CRITICAL
PIQA20121T-SM
C2001 15UF
20% 2 6.3V X5R 0402-1
L2003
VDD_BUCK2
1
15UF
1.0UH-20%-3.6A-0.060OHM
VDD_BUCK0_23
VDD_BUCK1_23
C2000
BUCK1
20% 2 6.3V X5R-CERM 0201
C2098
1
1
ROOM=PMU
BUCK2
2.2UF
OMIT_TABLE
10
VOLTAGE=1.03V 0.625V/0.9V/1.03V
4.7A MAX
C2097
CRITICAL
10.5A MAX
1
PP_CPU
1 PIQA20161T-SM
VDD_BUCK0_01
ROOM=PMU
J17 J18 J19
2
0.47UH-20%-3.8A-0.048OHM
ROOM=PMU
A16 B16 C16
BUCK0_LX0
L2001
BUCK0_LX1 A4 B4 C4
1
BUCK0_LX0
ROOM=PMU
A3 B3 C3
BUCK0
ROOM=PMU
1
SYM 2 OF 5
12.5A MAX
20% 2 6.3V CERM-X5R 0402-9
20% 2 6.3V CERM-X5R 0402-9
C2087
1
1.0UH-20%-3.6A-0.060OHM
CSP
BAT/USB
33 28 27 26 25 24 22 21 17 15
IN
V3 VDD_MAIN_SNS R6 F10 L13 L5 VDD_MAIN R8 L4
BUCK INPUT
15
VCC_MAIN_SNS
D
L2000
6
5
4
3
2
PAGE
20 OF 49 SHEET
14 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
ANTIGUA LDO SPECS
ANTIGUA PMU - LDOs 33 28 27 26 25 24 22 21 17 14
PP_VCC_MAIN
D
1
C2120
1
10UF
ROOM=PMU
20% 2 6.3V CERM-X5R 0402-9
ROOM=PMU
ROOM=PMU
SHORT-10L-0.1MM-SM 2 1 VCC_MAIN_SNS ROOM=PMU PLACE_NEAR=U2000.U1:2mm
1
C2123
1
10UF
10UF
20% 2 6.3V CERM-X5R 0402-9
20% 2 6.3V CERM-X5R 0402-9
ROOM=PMU
1
ROOM=PMU
C2126
1
10UF
C2125
20% 2 6.3V CERM-X5R 0402-9 ROOM=PMU
C2127
CRITICAL
U2000
C2130 2.2UF
20% 6.3V X5R-CERM 2 0201
C
ROOM=PMU
C2131
M3 V2 M2 U1 U2 L2 Y6 Y4 Y3 Y9 Z9 R3 Y5 Y7 N2 K3
1
2.2UF
20% 6.3V X5R-CERM 2 0201 ROOM=PMU
PP1V8_SDRAM
C2132
1
2.2UF
VDD_LDO1_3 VDD_LDO2 VDD_LDO4
VDD_LDO6 VDD_LDO7 VDD_LDO8 VDD_LDO9
A
VLDO5
VDD_LDO11 VDD_LDO13 VDD_LDO14 VDD_LDO15 VDD_BYPASS
VLDO6 VBYPASS VLDO7 VLDO8 VLDO9 VLDO9_FB VLDO10
P12 VPP_OTP
M1 V1 L1 N1 T1 T2 K1 K2 Z6 Z4 Z3 Y2 Y8 Z8 R2 K6 Z5 Z7 P2
CAM_AVDD_FB PLACE_NEAR=U2000.Y2:2mm
1
ROOM=PMU
VLDO11 VLDO12 VLDO13 VLDO14 VLDO15
CRITICAL OMIT_TABLE
NC
LDO2 (B)
1.2-2.0V
+/-2.5%
50mA
LDO3 (A)
2.5-3.3V
+/-1.4%
50mA
LDO4 (D)
0.7-1.2V
+/-2.5%
100mA
LDO5 (F)
2.5-3.3V
+/-2.5%
1000mA
LDO6 (C1)
1.2-3.6V
+/-2.5%
150mA
LDO7 (C)
2.5-3.3V
+/-25mV
250mA
LDO8 (C)
2.5-3.3V
+/-25mV
250mA
LDO9 (C)
2.5-3.3V
+/-25mV
250mA
LDO10 (G)
0.7-1.2V
+/-5.5%
1335mA
LDO11 (C)
2.5-3.3V
+/-25mV
250mA
LDO12 (E)
1.8V
+/-5%
10mA
LDO13 (C)
2.5-3.3V
+/-25mV
250mA
LDO14 (H)
0.8-1.5V
+/-2.5%
250mA
LDO15 (B)
1.2-2.0V
+/-2.5%
50mA
19 27 30 31 33
VOLTAGE=0.8V VOLTAGE=3.0V
PP3V3_USB PP1V8_VA PP3V0_TRISTAR PP0V8_OWL PP3V0_NAND
13
LDO1 LDO2 LDO3 LDO4 LDO5
VOLTAGE=3.3V
PP3V3_ACC
30
LDO6
VOLTAGE=3.0V VOLTAGE=2.775V VOLTAGE=2.85V
PP3V0_PROX_ALS PMU_LDO8 PP2V85_CAM_AVDD_PMU
VOLTAGE=0.9V
PP0V9_NAND
VOLTAGE=3.0V VOLTAGE=1.8V VOLTAGE=3.0V VOLTAGE=1.2V VOLTAGE=1.8V
PP3V0_PROX_IRLED PP1V8_ALWAYS PP3V0_MESA PP1V2 PP1V8_MESA
5 24 25 26
11
SHORT-10L-0.1MM-SM
C
LDO7 LDO8 LDO9
20
20
LDO10
13
LDO11 LDO12 LDO13 LDO14 LDO15
20 8 12 17 28 5 6 7 28
C2100 47NF
20% 2 6.3V X5R-CERM 01005
ROOM=PMU
1
C2101
1
2.2UF
C2103
1
2.2UF
20% 2 6.3V X5R-CERM 0201
1
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
C2105
1
4.3UF
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
C2107
1
2.2UF
20% 2 4V X5R-CERM 0610
ROOM=PMU
C2109
1
4.3UF
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
C2111
1
2.2UF
20% 2 4V X5R-CERM 0610
ROOM=PMU
C2113
4.3UF
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
C2115
20% 2 4V X5R-CERM 0610
ROOM=PMU
ROOM=PMU
U2000 D2255A080UXUVAI2 A1 A10 A14 A18 A19 A2 A6 B1 B10 B14 B18 B19 B2 B6 C10 C14 C18 C2 C6 D1 D19 E14 G1 G17 G18 G19 G2 H7 J6 K12 K7 L17 L18 L19 L6 L7
CSP SYM 4 OF 5 ROOM=PMU
CRITICAL OMIT_TABLE
VSS
1
L9 M8 M9 N10 N12 N13 N9 P10 P11 P18 P19 P5 R10 R11 R12 R9 T16 T3 T6 T8 U3 U9 V10 V14 V8 V9 Y1 Y10 Y14 Y19 Z1 Z10 Z14 Z19 Z2
C2102
NOSTUFF 1
2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=PMU
PMU_VSS_RTC
C2104 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=PMU
1
C2106 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=PMU
1
C2108
1
2.2UF
C2110 2.2UF
20% 2 6.3V X5R-CERM 0201
20% 2 6.3V X5R-CERM 0201
ROOM=PMU
ROOM=PMU
1
C2112 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=PMU
1
C2114 2.2UF
20% 2 6.3V X5R-CERM 0201
B
ROOM=PMU
16
NOTE: T3 IS XTAL REF GND
SYNC_DATE=N/A
SYNC_MASTER=N/A PAGE TITLE
SYSTEM POWER:PMU (2/3) DRAWING NUMBER
Apple Inc.
7
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
D
PMU_VPUMP
VPUMP:10nF min. @ 4.6V
J15 J16 J3 J4 K15 K16 L15 L16 M14 M15 M16 N14 N15 N16 P13 P14 P15 P16 P17 R13 R14 R15 R16 R17 T10 T11 T12 T13 T14 T15 T17 U10 U11 U12 U13 U14 U4 U5 U6 V4 V5 V6
50mA
XW2100
2
1
ROOM=PMU
+/-1.4%
VOLTAGE=3.3V VOLTAGE=1.8V
VPUMP U19
D2255A080UXUVAI2
NC
VLDO1 VLDO2 VLDO3 VLDO4
VDD_LDO10
U2000 CSP SYM 5 OF 5
2.5-3.3V
ROOM=PMU
VDD_LDO5
ROOM=PMU
B
CSP SYM 1 OF 5
VIETMOBILE.VN
20% 6.3V 2 X5R-CERM 0201
D10 D11 D12 D13 D14 D15 D16 D17 D18 D2 D5 D6 D7 D8 D9 D3 E10 E11 E12 E13 D4 E15 E16 E3 E4 E5 E7 E8 E9 F14 F15 F16 F3 F4 G14 G15 G16 G3 G4 H15 H16 H3 H4
OMIT_TABLE
D2255A080UXUVAI2
ROOM=PMU
PP1V1_SDRAM 1
LDO1 (A)
10UF
20% 2 6.3V CERM-X5R 0402-9
ROOM=PMU
33 31 30 27 24 16 14 12 8
1
10UF
20% 2 6.3V CERM-X5R 0402-9
14 12 11
C2124
ACCURACY
10UF
LDO
OUT
20% 2 6.3V CERM-X5R 0402-9
C2122
LDO INPUT
14
10UF
20% 2 6.3V CERM-X5R 0402-9
XW2105
C2121
1
MAX.CURRENT
ADJ.RANGE
LDO#
6
5
4
3
2
A.0.0 BRANCH
PAGE
21 OF 49 SHEET
15 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
CONTROL PIN NOTES:
ANTIGUA PMU - GPIOs, NTCs
NOTE NOTE NOTE NOTE
(1):INPUT PULL-DOWN 100-300k (2):INPUT PULL-DOWN 1M (3):INPUT PULL-UP OR DOWN 100k-300k (4):OUTPUT OPEN-DRAIN, REQUIRES PULL-UP
D
D CRITICAL 33 31 30 27 24 15 14 12 8
U2000
PP1V8_SDRAM
OMIT_TABLE
D2255A080UXUVAI2
ROOM=PMU
ROOM=PMU
5
IN
30
IN
8
IN
AP_TO_PMU_WDOG_RESET TRISTAR_TO_PMU_HOST_RESET AP_TO_PMU_SOCHOT1_L
PMU_TO_SYSTEM_COLD_RESET_L 1
C2260
9
IN
9
IN
OWL_TO_PMU_SHDN
1000PF
10% 2 6.3V X5R-CERM 01005
11 9
ROOM=PMU
IN
30 27 9 5
OUT
9
OUT
33 16
OUT
PMU_TO_OWL_CLK32K PMU_TO_WLAN_CLK32K
T4 SLEEP_32K R4 OUT_32K H6 SYS_ALIVE
8
C
33 27 16 8
OUT IN
33 27 8
BI
9
IN
27 9
IN 9
5
OUT
IN
PMU_TO_AP_IRQ_L I2C0_AP_SCL I2C0_AP_SDA
33 32
10KOHM-1%
29
2
FOREHEAD_NTC_RETURN
01005 ROOM=PMU
REAR CAMERA NTC 1
B
C2220 1
R2220
100PF
5% 16V 2 NP0-C0G 01005 ROOM=PMU
10KOHM-1%
DWI_PMGR_TO_PMU_SCLK DWI_PMGR_TO_PMU_BACKLIGHT_MOSI DWI_PMU_TO_PMGR_MISO
2
AP_TO_PMU_AMUX_OUT
33
NC
IN
33
IN
33 16
IN
33
IN
5
IN
33
IN OUT
BB_TO_PMU_AMUX_SMPS1 BB_TO_PMU_AMUX_SMPS3
FOREHEAD_NTC REAR_CAMERA_NTC RADIO_PA_NTC AP_NTC PMU_TCAL
SHORT-10L-0.1MM-SM 2 ROOM=PMU 1
XW2210
SHORT-10L-0.1MM-SM 2 ROOM=PMU 1
XW2220
RADIO PA NTC
C2230 1
SHORT-10L-0.1MM-SM 2 ROOM=PMU 1
XW2230
R2230
100PF
5% 16V 2 NP0-C0G 01005 ROOM=PMU
10KOHM-1% 2
PA_NTC_RETURN
01005 ROOM=PMU
NC NC
PMU_TO_WLAN_CLK32K BB_TO_PMU_AMUX_LDO11_SIM1 AP_TO_PMU_TEST_CLKOUT BB_TO_PMU_AMUX_SMPS4 PMU_AMUX_BY
RCAM_NTC_RETURN
1
PMU_VREF 1
R2270 200K
0.22UF
20% 2 6.3V X5R 0201
1% 1/20W MF 2 201
ROOM=PMU
(1)
(4)
PMU_TO_AP_SOCHOT0_L
PRE_UVLO M5
L8 IRQ*
(4)
VDROOP G5
0.00 2 1/32W 1 MF 0% ROOM=PMU 01005
PMU_VDROOP_OUT PMU_VDROOP_DET_IN 1
C2205
R2205 2 1/32W
1 MF 1%
150
AP_GPU_SENSE_P
01005
M6 M7 N4 N5 N6
10
IN
NOTE:VDROOP_DET R/C Low-pass Fc=1.06MHz
ROOM=PMU
1000PF
NO_XNET_CONNECTION=1
C
10% 2 10V X5R 01005
ROOM=PMU
(1) (1)
AMUX_A0 AMUX_A1 AMUX_A2 AMUX_A3 AMUX_A4 AMUX_A5 AMUX_A6 AMUX_A7 AMUX_AY AMUX_B0 AMUX_B1 AMUX_B2 AMUX_B3 AMUX_B4 AMUX_B5 AMUX_B6 AMUX_B7 AMUX_BY TDEV1 TDEV2 TDEV3 TDEV4 TCAL
PMU_XTAL1 PMU_XTAL2
P1 XTAL1 R1 XTAL2
PMU_VDD_RTC
P6 VDD_RTC
1
SHORT-10L-0.1MM-SM 2 ROOM=PMU 1
N11 M12 L11 M10 L14 L12 M11 L10 K14
8
OUT
R2201
VDROOP_DET H5 (2)
F13 G13 J12 H13 H14 K10 K11 K13 J13
1
C2270 ROOM=PMU
L3 TMPR_DET
U7 SCLK U8 MOSI V7 MISO
BUTTON_RINGER_A IN BUTTON_VOL_UP_L 8 IN BUTTON_VOL_DOWN_L 8 IN LCM_TO_CHESTNUT_PWR_EN 27 IN TRISTAR_TO_PMU_USB_BRICK_ID 30 16 27 16 CHESTNUT_TO_PMU_ADCMUX PMU_AMUX_AY 3 OUT
3
01005 ROOM=PMU
VREF M4
(1)
NTC
5% 16V 2 NP0-C0G 01005 ROOM=PMU
(4)
XTAL
100PF
(3)
PMU_IREF
IN 1
16 27
C2203 1000PF
BRICK_ID T5 ADC_IN R5
10%
TRISTAR_TO_PMU_USB_BRICK_ID CHESTNUT_TO_PMU_ADCMUX
IN
2 6.3V X5R-CERM
16 30
01005
ROOM=CHESTNUT
VIETMOBILE.VN 33 32
R2210
(3)
IREF K5
R7 SCL T7 SDA
33 32 16 8
C2210 1
(1)
N3 N7 P3 P4
NC
1
SLEEP1_REQ SLEEP1_RDY ACTIVE_REQ ACTIVE_RDY
OWL_TO_PMU_SLEEP1_REQUEST PMU_TO_OWL_SLEEP1_READY OWL_TO_PMU_ACTIVE_REQUEST PMU_TO_OWL_ACTIVE_READY
SYSTEM_ALIVE
FOREHEAD NTC
(3)ROOM=PMU
ADC
OUT
9
OUT
RESET_IN1 RESET_IN2 RESET_IN3 RESET* SHDN
BUTTON1 BUTTON2 BUTTON3 BUTTON4
BUTTONS
17 13 11
P7 P8 P9 K4 N8
GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21
GPIO
OUT
5% 1/32W MF 2 01005
AMUX
33 9 5 3
100K
REFS
5% 1/32W MF 2 01005
COMPARATOR
100K
CSP SYM 3 OF 5
R2261
RESETS
R2260
1
PMGR
1
G6 F6 E6 F5
BUTTON_MENU_KEY_L BUTTON_HOLD_KEY_L BUTTON_RINGER_A
PLACE_NEAR=U2000.R5:6mm
BUTTON1 + BUTTON2 ASSERTED FOR >TBD SECONDS CAUSES TWO-FINGER RESET
IN
8 9 28 33
IN
8 9 32 33
IN
8 16 32 33
NC
F7 TIGRIS_TO_PMU_INT_L G7 BB_TO_PMU_PCIE_HOST_WAKE_L J7 PMU_TO_BB_PMIC_RESET_R_L G8 TRISTAR_TO_AP_INT H8 STOCKHOLM_TO_PMU_HOST_WAKE J8 PMU_TO_NAND_LOW_BATT_BOOT_L K8 WLAN_TO_PMU_HOST_WAKE F9 CODEC_TO_PMU_MIKEY_INT_L G9 PMU_TO_BT_REG_ON H9 BT_TO_PMU_HOST_WAKE J9 PMU_TO_WLAN_REG_ON G10 NC H10 PMU_TO_CODEC_DIGLDO_PULLDN J10 CODEC_TO_AP_PMU_INT_L F11 PMU_TO_BB_USB_VBUS_DETECT G11 PMU_TO_STOCKHOLM_EN H11 NC K9 NC J11 PMU_TO_LCM_PANICB G12 NC H12 I2C0_AP_SCL
IN
17
IN
33
IN
8 30
IN
33
OUT
13
IN
33
IN
24
OUT
33
IN
33
OUT
33
OUT IN
1
1.00K2
PMU_TO_BB_PMIC_RESET_L
OUT
33
5% 1/32W MF 01005 ROOM=PMU
B
24 8 24
OUT
33
OUT
33
OUT
29
IN
R2200
8 16 27 33
C2202 0.22UF
XW2240
20% 2 6.3V X5R 0201
ROOM=PMU
AP NTC
CRITICAL
Y2200
32.768KHZ-20PPM-12.5PF
1
C2240 1
A
R2240
100PF
5% 16V 2 NP0-C0G 01005 ROOM=PMU
1
10KOHM-1% 2
1
C2250 100PF
AP_NTC_RETURN
5% 2 16V NP0-C0G 01005 ROOM=PMU
01005 ROOM=PMU
R2250
C2200 1
0.1% 1/20W MF 2 0201 ROOM=PMU
5% 16V 2 CERM 01005
1
2
1.60X1.00-SM
1
ROOM=PMU
18PF
3.92K
ROOM=PMU
C2201 18PF
15
5% 2 16V CERM 01005
PMU_VSS_RTC
ROOM=PMU
VOLTAGE=0.0V
XW2200
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SHORT-10L-0.1MM-SM 1 2
SYSTEM POWER:PMU (3/3)
ROOM=PMU
DRAWING NUMBER
Apple Inc. NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
7
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
8
051-1902
6
5
4
3
2
A.0.0 BRANCH
PAGE
22 OF 49 SHEET
16 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
D
D
TIGRIS CHARGER APN:343S00033 PP_VCC_MAIN VOLTAGE=4.3V 1
1
C2330 10UF
20% 2 6.3V CERM-X5R 0402-9 ROOM=CHARGER
C
1
C2331 10UF
20% 2 6.3V CERM-X5R 0402-9
1
C2333 2.2UF
C2332
20% 2 6.3V X5R-CERM 0201
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=CHARGER
14 15 21 22 24 25 26 27 28 33
ROOM=CHARGER
ROOM=CHARGER
C
TIGRIS_LDO
10% 2 16V X5R-CERM 0402-1
C2321 4.2UF
100PF
10% 2 16V X5R-CERM 0402-1
ROOM=CHARGER
C2322
1
100PF
5% 2 35V NP0-C0G 01005
ROOM=CHARGER
C2323
5% 2 35V NP0-C0G 01005
ROOM=CHARGER
ROOM=CHARGER
1
C2310 4.2UF
15 12 8
A5 B5 D5 C5 E5
PP5V0_USB 10% 2 16V X5R-CERM 0402-1
PP1V8_ALWAYS
ROOM=CHARGER
1
R2310 100K
5% 1/32W MF 2 01005
1
C2311 100PF
5% 2 35V NP0-C0G 01005
ROOM=CHARGER 33 30 26 25 8
BI
33 30 26 25 8
IN
16 13 11
ROOM=CHARGER
R2311 16
OUT
TIGRIS_TO_PMU_INT_L
1
100
2
1% 1/32W MF 01005
30
IN
USB_VBUS_DETECT
1
SN2400AB0
BOOT G5
VBUS VBUS VBUS VBUS VBUS
WCSP
ROOM=CHARGER
CRITICAL
SYSTEM_ALIVE
E3
SYS_ALIVE
TRISTAR_TO_TIGRIS_VBUS_OFF
F4
VBUS_OVP_OFF
TIGRIS_TO_PMU_INT_R_L
G2
INT
TIGRIS_VBUS_DETECT
F1
VBUS_DET
SDA SCL
F3 TEST
30.1K2
BUCK_SW BUCK_SW BUCK_SW BUCK_SW
A4 B4 D4 C4
BAT BAT BAT BAT
A1 B1 D1 C1
BAT_SNS E1 ACT_DIODE E2 HDQ_HOST G1 HDQ_GAUGE F2
1
2
1
ROOM=CHARGER
2
D
PIQA20161T-SM
10% 16V X5R 0201
ROOM=CHARGER
ROOM=CHARGER
C2301 1
C2302 1
5% 16V NP0-C0G 2 01005
5% 16V NP0-C0G 2 01005
100PF
TIGRIS_BUCK_LX
100PF
ROOM=CHARGER
ROOM=CHARGER
PP_BATT_VCC VBATT_SENSE
IN
1
TIGRIS_ACTIVE_DIODE
C2306 100PF
SWI_AP_BI_TIGRIS_FET TIGRIS_TO_BATTERY_SWI
NOSTUFF BI
R23001
18
3
1% 1/32W MF 01005
D
PP1V8
21 20 17 14 13 12 9 8 7 6 5 3 33 29
3 18
18
100K
ROOM=CHARGER
BGA
G
1.0UH-20%-3.6A-0.060OHM
0.047UF
TIGRIS_BOOT
Q2300 CSD68827W
A1
L2300
A3 B3 D3 C3
OUT
OMIT_TABLE
C2300
CRITICAL S
ROOM=CHARGER
CRITICAL LDO G4
I2C1_AP_SDA I2C1_AP_SCL
R2320 5
20% 2 6.3V X5R-CERM 0201
ROOM=CHARGER
U2300
PMID
G3 E4
ROOM=CHARGER
B
2.2UF
5% 2 16V NP0-C0G 01005
VIETMOBILE.VN F5
31 30 3
C2305
C1 C2 C3
4.2UF
1
A2 VDD_MAIN B2 VDD_MAIN D2 VDD_MAIN C2 VDD_MAIN
C2320
1
1
100PF
PGND PGND PGND PGND
1
C2307
A2 A3 B1 B2 B3
1
TIGRIS_PMID
2
NOSTUFF
CRITICAL
S
ROOM=CHARGER
C2303 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=CHARGER
1
C2304 2.2UF
20% 2 6.3V X5R-CERM 0201
B
ROOM=CHARGER
5% 1/32W MF 01005 2 ROOM=CHARGER
1
R2301
Q2301
G
5% 2 16V NP0-C0G 01005
1
DMN2990UFA DFN0806 ROOM=CHARGER
0.00
0% 1/32W MF 2 01005
ROOM=CHARGER
1
PP1V8
3 5 6 7 8 9 12 13 14 17 20 21 29 33
DEFAULT_RESISTOR_40200OHM_2_1 1
R2302 40.2K
1% 1/32W MF 2 01005 ROOM=CHARGER
SWI_AP_BI_TIGRIS
A
BI
8 9
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SYSTEM POWER:CHARGER DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
A.0.0 BRANCH
PAGE
23 OF 49 SHEET
17 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
D
D
C
C
BATTERY CONNECTOR THIS ONE ON MLB
--->
516S00104 (RCPT) 516S00105 (PLUG)
PP_BATT_VCC VOLTAGE=4.3V
CRITICAL
1
ROOM=BATTERY_B2B
56PF
J2400 F-ST-SM
11
R2400
BI
TIGRIS_TO_BATTERY_SWI
1
C2411 100PF
1
C2412 220PF
VIETMOBILE.VN 5% 2 16V NP0-C0G 01005
RCPT-BATT-2BLADES
17
C2410
1
100
TIGRIS_BATTERY_SWI_CONN
2
5% 1/32W MF 01005
ROOM=BATTERY_B2B
1
7
8
1
5
3
2
4
6
ROOM=BATTERY_B2B
5% 2 16V NP0-C0G 01005
3 17
10% 2 10V X7R-CERM 01005
ROOM=BATTERY_B2B
ROOM=BATTERY_B2B
XW2400
SHORT-10L-0.25MM-SM 1 2
C2400
VBATT_SENSE
OUT
17
ROOM=BATTERY_B2B
56PF
9
5% 2 16V NP0-C0G 01005
10
PLACE_NEAR=J2400.1:3mm
12
ROOM=BATTERY_B2B
B
B
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SYSTEM POWER:BATTERY CONN DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
A.0.0 BRANCH
PAGE
24 OF 49 SHEET
18 OF 59
1
SIZE
D
A
8
7
6
5
4
CARBON - ACCEL & GYRO
D
2
3
1
MAGNESIUM - COMPASS
D
ALPS (APN:338S00084)
INVENSENSE (APN: 338S00017, 338S00087)
PP1V8_IMU_OWL
12 14 19
NOSTUFF
PP1V8_IMU_OWL
1 12 14 19
100PF
C4 1
C3010
20% 2 6.3V X5R-CERM 01005
1
16
0.1UF
VDD
VDDIO
1
C3012
MPU-6700-12-COMBO
33 31 30 27 15
SPI_OWL_TO_ACCEL_GYRO_CS_L
5 8 14
GYRO_CHARGE_PUMP ACCEL_GYRO_TO_OWL_INT2
1 IN
9 19
IN
9 19
OUT
9 19
NC
B1 B3 D1 D2
C3008 0.1UF
20% 2 6.3V X5R-CERM 01005
ACCEL_GYRO_TO_OWL_INT1
OUT
RSV RSV RSV
20% 2 6.3V X5R-CERM 0201
ROOM=MAGNESIUM
ROOM=MAGNESIUM
SPI_IMU_TO_OWL_MISO
OUT
9 19
SDA/SDI A4
SPI_OWL_TO_IMU_MOSI
IN
9 19
SCL/SCK A3
SPI_OWL_TO_IMU_SCLK
IN
9 19
SPI_OWL_TO_COMPASS_CS_L
IN
9
CSB A2
19 14 12
D4
PP1V8_IMU_OWL
TRG/SE C3
RST* 1.09M INT PU
114K INT PD
NC
9
COMPASS_TO_OWL_INT
OUT
9
ROOM=MAGNESIUM
CRITICAL
*NOTE: B1, D1, D2 connections are for AKM backup only.
NOSTUFF
1
VSS
NOSTUFF
C3003
1
56PF 5%
C1
10 GND2
2.2UF
20% 2 6.3V X5R-CERM 01005
114K INT PU
CRITICAL 9 GND1
C3000
DRDY A1
ROOM=CARBON
C
1
0.1UF
SDO B4
RSV
OMIT_TABLE
ROOM=CARBON
LGA
15 GND6
OUT
10% 6.3V 2 X6S 0201
13 GND5
9
DRDY/INT1 6
INT/INT2
12 GND4
0.1UF
7
SPI_OWL_TO_IMU_SCLK SPI_OWL_TO_IMU_MOSI SPI_IMU_TO_OWL_MISO
2 3 4
SCL/SPC SDA/SDI SA0/SDO
C2 VPP
ROOM=MAGNESIUM
11 GND3
C3013
1
NOSTUFF
CS FSYNC/GND REGOUT/GND_CAP
NC PP3V0_TRISTAR
LGA IN
C3001
HSCDTD601A-19
ROOM=CARBON
U3010 9
1
ROOM=MAGNESIUM
U3000
20% 2 6.3V X5R-CERM 0201
ROOM=CARBON
5% 2 16V NP0-C0G 01005
VDD
2.2UF
C3002
NOSTUFF
C3004
1
56PF
ROOM=MAGNESIUM
C3005 56PF
5% 2 16V NP0-C0G 01005
2 16V NP0-C0G 01005
NOSTUFF
1
C3006 56PF
5% 2 16V NP0-C0G 01005
ROOM=MAGNESIUM
NOSTUFF
1
100PF
5% 2 16V NP0-C0G 01005
ROOM=MAGNESIUM
C3007
5% 2 16V NP0-C0G 01005
ROOM=MAGNESIUM
C
ROOM=MAGNESIUM
VIETMOBILE.VN
DISCRETE ACCEL
PHOSPHOROUS
BOSCH (APN: 338S1163)
BOSCH (APN:338S00044)
PP1V8_IMU_OWL
B
1
C3031 2.2UF
20% 2 6.3V X5R-CERM 0201
PP1V8_IMU_OWL
C3032 0.1UF
1
20% 2 6.3V X5R-CERM 01005 OMIT_TABLE
DISCRETE_ACCEL_TO_OWL_INT1
1
20.0 2 5% 1/32W MF 01005
13
6 INT1 5 INT2
PS
GND
OMIT_TABLE
ROOM=PHOSPHORUS
CRITICAL
ROOM=PHOSPHORUS
R3032 1
20.0 2
SPI_IMU_TO_OWL_MISO 9
19 9
IN
19 9
IN IN
9 19
BMP282BC
SPI_OWL_TO_IMU_MOSI SPI_OWL_TO_IMU_SCLK SPI_OWL_TO_PHOSPHOROUS_CS_L
3 SDI 4 SCK 2 CS*
LGA
SPI_IMU_TO_OWL_MISO
SDO 5
OUT
9 19
NOSTUFF 70K INT PU
GND
1
C3022 56PF
5% 1/32W MF 01005
1 7
SPI_OWL_TO_IMU_SCLK 9 19 SPI_OWL_TO_IMU_MOSI 9 19 SPI_IMU_TO_OWL_MISO_R
NOSTUFF
1
OMIT_TABLE
C3023 56PF
5% 2 16V NP0-C0G 01005
GNDIO
ROOM=PHOSPHORUS
9 11 12 14
6
8
SCX 1 SDX 2 OMIT_TABLE SDO 3
CRITICAL DISCRETE_ACCEL_TO_OWL_INT1_R DISCRETE_ACCEL_TO_OWL_INT2_R
20% 2 6.3V X5R 0201-1
NOSTUFF
1
NOSTUFF
C3024 56PF
1
C3025
ROOM=PHOSPHORUS
ROOM=PHOSPHORUS
56PF
5% 2 16V NP0-C0G 01005
5% 2 16V NP0-C0G 01005
5% 2 16V 01005
ROOM=PHOSPHORUS
NOSTUFF
R3020 PHOSPHORUS_TO_OWL_IRQ_R
1 01005
10
9
1.0UF
U3020
LGA
R3030
B
VDD VDDIO
BMA282 4 CS*
12 14 19
C3021
ROOM=PHOSPHORUS
U3030 SPI_OWL_TO_DISCRETE_ACCEL_CS_L
1
20% 2 6.3V X5R-CERM 01005 VDD VDDIO
9
C3020 0.1UF
8
OMIT_TABLE
1
7
19 14 12
0.00 2 0%
PHOSPHORUS_TO_OWL_IRQ
9
1/32W MF
ROOM=PHOSPHORUS
R3031 9
DISCRETE_ACCEL_TO_OWL_INT2
1
R3020 SHOULD BE STUFFED FOR ST PHOSPHORUS ONLY. FOR BOSCH PHOSPHORUS, PINS 1 AND 7 ARE SHORTED INTERNALLY, SO NO NEED FOR 0-OHM TO GROUND OPTION ON PIN 7.
20.0 2 5% 1/32W MF 01005
A
OMIT_TABLE
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SENSORS:MOTION SENSORS DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
A.0.0 BRANCH
PAGE
30 OF 49 SHEET
19 OF 59
1
SIZE
D
A
8
7
6
5
FOREHEAD FLEX (FCAM)
4
THIS ONE ON MLB
C3120
1
100PF
C3122
1
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=CG_B2B
C3123
1
2.2UF
20% 2 6.3V X5R-CERM 01005
ROOM=CG_B2B
CAMERA POWER
C3121
1
0.1UF
5% 2 16V NP0-C0G 01005
C3124
20% 2 6.3V X5R-CERM 0201
ROOM=CG_B2B
ROOM=CG_B2B
20
20
FL3100
29 21 17 14 13 12 9 8 7 6 5 3 33
1
2
PP1V8_FCAM_CONN VOLTAGE=1.8V
0201 ROOM=CG_B2B
1
C3101
1
0.1UF
20% 2 6.3V X5R-CERM 01005
20
FL3125
FERR-22-OHM-1A-0.055OHM 20
15
2
PP3V0_PROX_ALS
1
ROOM=CG_B2B
VOLTAGE=3.0V
5% 16V NP0-C0G 01005
20 20 7
100PF
ROOM=CG_B2B
5% 16V NP0-C0G 01005
2
ROOM=CG_B2B
20 20 7
FL3102
FL3126
FERR-22-OHM-1A-0.055OHM 21 14
PP1V2_CAMERA
2
PP1V2_FCAM_VCORE_CONN VOLTAGE=1.2V
0201 ROOM=CG_B2B
1
C3103
1
20% 2 6.3V X5R-CERM 01005
1 20
C3130
C3102 100PF
0.1UF
2
C3129
1
2.2UF
5% 16V NP0-C0G 01005
2.2UF
20% 6.3V X5R-CERM 2 0201
ROOM=CG_B2B
ROOM=CG_B2B
AP_TO_FCAM_CLK_CONN I2C_ISP_TO_FCAM_SCL AP_TO_FCAM_SHUTDOWN_CONN_L I2C_ISP_BI_FCAM_SDA
ROOM=CG_B2B 20
1
CODEC_TO_RCVR_CONN_N CODEC_TO_RCVR_CONN_P PP1V8_FCAM_CONN PP2V85_FCAM_AVDD_CONN
20
C3125
1
01005
100PF
2
PP3V0_PROX_CONN
120-OHM-210MA
C3100
ROOM=CG_B2B
1
C3128
ROOM=CG_B2B
PP3V0_ALS_CONN VOLTAGE=3.0V
120-OHM-210MA 1
01005
1
ROOM=CG_B2B
2.2UF
20% 6.3V X5R-CERM 2 0201
29 20
2
C3127
1
0.1UF
ROOM=CG_B2B
20
20 20
C3126
20
100PF
20% 2 6.3V X5R-CERM 01005
20% 6.3V X5R-CERM 2 0201
5% 2 16V NP0-C0G 01005
ROOM=CG_B2B
20
PP3V0_PROX_CONN TOUCH_TO_PROX_RX_EN_FCAM_CONN I2C2_AP_BI_ALS_SDA_CONN ALS_TO_AP_INT_CONN_L PGND_IRLED_K FRONTMIC3_TO_CODEC_AIN4_CONN_N
ROOM=CG_B2B
FL3104
15
C3106
1
PP2V85_FCAM_AVDD_CONN
C3105
1
20% 6.3V X5R-CERM 2 0201
20% 2 6.3V X5R-CERM 01005
2
ROOM=CG_B2B
ROOM=CG_B2B
38
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
39
40
CODEC_TO_HAC_CONN_P CODEC_TO_HAC_CONN_N PP1V2_FCAM_VCORE_CONN
20
24
PP_CODEC_TO_FRONTMIC3_BIAS
1
2
ROOM=CG_B2B
IN
I2C_TOUCH_TO_MAMBA_PROX_SCL
0.00 2
1
PGND_IRLED_K
C3140
AP_TO_FCAM_CLK_CONN
C3110 100PF
5% 16V NP0-C0G 01005
2
ROOM=CG_B2B
IN
AP_TO_FCAM_SHUTDOWN_L
1
2
120-OHM-210MA
AP_TO_FCAM_SHUTDOWN_CONN_L
C3111
1
01005
100PF
5% 16V NP0-C0G 01005
ROOM=CG_B2B
2
56PF
23
5% 16V 2 NP0-C0G 01005
IN
TOUCH_TO_PROX_TX_EN_BUFF
IN
CODEC_TO_HAC_N
2
D 1
CRITICAL ANALOG_PROX
20
DFN1006H4-3
1.00M
1
2
23
IN
CODEC_TO_HAC_P
14 28 29
29 20
C 20
DZ3151
FL3152
2
CODEC_TO_HAC_CONN_P
1 01005
20
NO_XNET_CONNECTION=1
ROOM=CG_B2B
1
DZ3152
12V-33PF 01005-1
2 ROOM=CG_B2B
FL3153
70-OHM-25%-0.28A
ROOM=CG_B2B
R3141
C3112
DZ3150
70-OHM-25%-0.28A
20
PP1V8_TOUCH
20
2 ROOM=CG_B2B
DMN3730UFB4
SYM_VER_1 ROOM=CG_B2B
R3140
I2C_ISP_TO_FCAM_SCL
23
IN
CODEC_TO_RCVR_N
1
2
CODEC_TO_RCVR_CONN_N
01005
ROOM=CG_B2B
1
DZ3153
12V-33PF 01005-1
NOTE:INTERRUPT FOR DOPPLER PROX
2 ROOM=CG_B2B
TOUCH_TO_PROX_RX_EN_FCAM_CONN
IN
20
NO_XNET_CONNECTION=1
56PF
B
5% 2 16V NP0-C0G 01005
DOPPLER_PROX 29 28
20 7
BI
BI
I2C_TOUCH_BI_MAMBA_PROX_SDA
1
70-OHM-25%-0.28A
0.00 2
23
C3113 29
OUT
PROX_TO_TOUCH_RX_LCM_CONN
1
ROOM=CG_B2B
PROX_TO_TOUCH_RX_FCAM_CONN 1
MIPI_FCAM_TO_AP_DATA0_P
4
SYM_VER-2
1
3
2
20
29 8
BI
I2C2_AP_SDA
OUT
MIPI_FCAM_TO_AP_DATA0_CONN_N
MIPI_FCAM_TO_AP_DATA1_CONN_P
20
29 8
IN
I2C2_AP_SCL
2
MIPI_FCAM_TO_AP_DATA1_CONN_N
OUT
TAM0605 SYM_VER-2
7
OUT
MIPI_FCAM_TO_AP_CLK_N
FRONTMIC3_TO_CODEC_AIN4_P
2
1
FRONTMIC3_TO_CODEC_AIN4_CONN_P
1
MIPI_FCAM_TO_AP_CLK_CONN_P
20
8
OUT
2
ALS_TO_AP_INT_L
1
DZ3156
2
ROOM=CG_B2B
6.8V-100PF 01005
2
MIPI_FCAM_TO_AP_CLK_CONN_N
20
C3145
SYNC_MASTER=N/A
01005 ROOM=CG_B2B
20
PAGE TITLE
CAMERA:FOREHEAD FLEX B2B
ALS_TO_AP_INT_CONN_L
Apple Inc.
20
1
C3146
NOTICE OF PROPRIETARY PROPERTY:
100PF
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
ROOM=CG_B2B
6
5
051-1902 REVISION
R
5% 2 16V NP0-C0G 01005
7
SYNC_DATE=N/A
DRAWING NUMBER
1
20
NO_XNET_CONNECTION=1
ROOM=CG_B2B
ROOM=CG_B2B
FL3146
ROOM=CG_B2B
8
OUT
01005
5% 2 16V NP0-C0G 01005
120-OHM-210MA 3
23
56PF
CRITICAL
DZ3155
FL3156
20
C3144
I2C2_AP_TO_ALS_SCL_CONN
L3102 65-OHM-0.1A-0.7-2GHZ 4
NO_XNET_CONNECTION=1
1
120-OHM-210MA
MAKE_BASE=TRUE
20
20
2 ROOM=CG_B2B
5% 2 16V NP0-C0G 01005
ROOM=CG_B2B
MIPI_FCAM_TO_AP_CLK_P
FRONTMIC3_TO_CODEC_AIN4_CONN_N 6.8V-100PF 01005
56PF
20
1
7
2 ROOM=CG_B2B
I2C2_AP_BI_ALS_SDA_CONN
L3101
MIPI_FCAM_TO_AP_DATA1_N
1
ROOM=CG_B2B
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
3
FRONTMIC3_TO_CODEC_AIN4_N
01005
MAKE_BASE=TRUE
CRITICAL
MIPI_FCAM_TO_AP_DATA1_P
OUT
NOSTUFF
ROOM=CG_B2B
OUT
23
5% 2 16V NP0-C0G 01005
1
MIPI_FCAM_TO_AP_DATA0_N
C3143
120-OHM-210MA
ROOM=CG_B2B
MIPI_FCAM_TO_AP_DATA0_CONN_P
DZ3154
FL3155
20
56PF
CRITICAL
7
1
2 ROOM=CG_B2B
0.00 2
ROOM=CG_B2B
TAM0605
20
12V-33PF 01005-1
L3100 65-OHM-0.1A-0.7-2GHZ
7
CODEC_TO_RCVR_CONN_P NO_XNET_CONNECTION=1
ROOM=CG_B2B
0% 1/32W MF 01005
CAMERA MIPI
OUT
2 01005
R3143
5% 2 16V NP0-C0G 01005
7
1
ANALOG_PROX
56PF
OUT
CODEC_TO_RCVR_P
ROOM=CG_B2B
1
7
IN
0% 1/32W MF 01005
I2C_ISP_BI_FCAM_SDA
B
FL3154
R3144
ROOM=CG_B2B
A
20
12V-33PF 01005-1
VIETMOBILE.VN S
5% 1/32W MF 2 01005
1
Q3140
G
1
5% 1/32W MF 2 01005 1
15 20
NO_XNET_CONNECTION=1
ROOM=CG_B2B
100K
IN
20
CODEC_TO_HAC_CONN_N
1 01005
3
20
ROOM=CG_B2B
20 7
20
FL3151
ROOM=CG_B2B
FL3111 7
20
70-OHM-25%-0.28A
NOSTUFF 29
20
1
ROOM=CG_B2B
01005
20
2 ROOM=CG_B2B
FL3110
ROOM=CG_B2B
20
6.8V-100PF 01005
ROOM=CG_B2B
1
20
PP_CODEC_TO_FRONTMIC3_BIAS_CONN 1
ROOM=CG_B2B
0% 1/32W MF 01005
120-OHM-210MA
20
VOLTAGE=2.86V
01005
CAMERA I/O IN
20
120-OHM-210MA
PROX & ALS INTERFACE
5% 16V NP0-C0G 01005
29 28
2
D
20
PROX_TO_TOUCH_RX_FCAM_CONN PP3V0_ALS_CONN I2C2_AP_TO_ALS_SCL_CONN PP3V0_PROX_IRLED PP_CODEC_TO_FRONTMIC3_BIAS_CONN FRONTMIC3_TO_CODEC_AIN4_CONN_P
R3142
1
20
FL3150
C3104
C
AP_TO_FCAM_CLK
20
MIPI_FCAM_TO_AP_DATA0_CONN_N MIPI_FCAM_TO_AP_DATA0_CONN_P MIPI_FCAM_TO_AP_CLK_CONN_P MIPI_FCAM_TO_AP_CLK_CONN_N MIPI_FCAM_TO_AP_DATA1_CONN_P MIPI_FCAM_TO_AP_DATA1_CONN_N
DOPPLER_PROX
7
20
CRITICAL
100PF
0.1UF
2.2UF
F-ST-SM
ROOM=CG_B2B
VOLTAGE=2.85V 1
AA20L-S036VA1
42
FERR-22-OHM-1A-0.055OHM 1 2 PP2V85_CAM_AVDD_PMU 0201 ROOM=CG_B2B
J3100 37
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=CG_B2B
516S00048 (RCPT) 516S00049 (PLUG)
41
20
PP1V8
--->
PP3V0_PROX_IRLED 1
1
FOREHEAD CONNECTOR
PROX & ALS POWER 20 15
D
2
3
4
3
2
A.0.0 BRANCH
PAGE
31 OF 49 SHEET
20 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
REAR CAMERA FLEX
1
RCAM CONNECTOR THIS ONE ON MLB
--->
516S00043 (RCPT) 516S00042 (PLUG)
CRITICAL ROOM=RCAM_B2B
J3200
D
D
AA26-S034VA1 F-ST-SM 36
21
21
CAMERA POWER
21 22 21 7
BI
22 21 7
IN 21 21
NOTE: OUTPUT IMPDEANCE MUST BE >0.01-OHM IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC.
FL3202
PP_VCC_MAIN
1
LP5907SNX-2.85 X2SON 4 VIN VOUT 1
PP_VCC_MAIN_LDO
2
VOLTAGE=4.3V
01005
PP2V85_RCAM_AVDD_LDO
2
20% 2 6.3V X5R-CERM 0201
C3200
1
2.2UF
GND EPAD
2.2UF
PP2V85_RCAM_AVDD_CONN
2
VOLTAGE=2.85V
01005
C3211
3 EN
1
ROOM=RCAM_B2B
1
C3201
AP_TO_RCAM_CLK_CONN AP_TO_RCAM_SHUTDOWN_CONN_L RCAM_TO_LED_DRIVER_STROBE_EN_CONN
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
38
37
21
MIPI_RCAM_TO_AP_DATA3_CONN_N MIPI_RCAM_TO_AP_DATA3_CONN_P
OUT
7
OUT
7
MIPI_RCAM_TO_AP_DATA1_CONN_N MIPI_RCAM_TO_AP_DATA1_CONN_P
OUT
7
OUT
7
MIPI_RCAM_TO_AP_CLK_CONN_N MIPI_RCAM_TO_AP_CLK_CONN_P
OUT
7
OUT
7
MIPI_RCAM_TO_AP_DATA0_CONN_N MIPI_RCAM_TO_AP_DATA0_CONN_P
OUT
7
OUT
7
MIPI_RCAM_TO_AP_DATA2_CONN_N MIPI_RCAM_TO_AP_DATA2_CONN_P
OUT
7
OUT
7
ROOM=RCAM_B2B
21
C3202 100PF
C
5% 2 16V NP0-C0G 01005
20% 2 6.3V X5R-CERM 01005
20% 6.3V X5R-CERM 2 0201
ROOM=RCAM_B2B
1
0.1UF
2.2UF
20% 6.3V X5R-CERM 2 0201
5
C
1
VOLTAGE=2.85V
C3210
PP2V85_RCAM_AVDD_CONN I2C_ISP_BI_RCAM_SDA I2C_ISP_TO_RCAM_SCL
PP1V2_RCAM_DIGITAL_CONN
2
10-OHM-1.1A
ROOM=RCAM_B2B
1
PP1V8_RCAM_CONN
FL3200
U3200
70-OHM-25%-0.28A 33 28 22 17 15 14 27 26 25 24
21
PP1V2_RCAM_DIGITAL_CONN
35
ROOM=RCAM_B2B
ROOM=RCAM_B2B
ROOM=RCAM_B2B
8
CAM_EXT_LDO_EN
DIGITAL I/O
VIETMOBILE.VN FL3230
120-OHM-210MA
7
IN
1
AP_TO_RCAM_CLK
AP_TO_RCAM_CLK_CONN
2
01005
FL3201
C3230
FERR-22-OHM-1A-0.055OHM 20 14
PP1V2_CAMERA
1
100PF
2
PP1V2_RCAM_DIGITAL_CONN VOLTAGE=1.2V
0201 1
ROOM=RCAM_B2B
C3203 2.2UF
R32031
20% 2 6.3V X5R-CERM 0201
0.00
0% 1/32W MF 01005 2
ROOM=RCAM_B2B
1
C3204
1
1
2.2UF
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=RCAM_B2B
C3206
20% 2 6.3V X5R-CERM 0201
ROOM=RCAM_B2B
ROOM=RCAM_B2B
1
5% 16V NP0-C0G 01005
21
2
NOSTUFF
C3299
1
100PF
5% 16V NP0-C0G 01005
2
ROOM=RCAM_B2B
C3205 100PF
21
ROOM=RCAM_B2B
FL3231
5% 2 16V NP0-C0G 01005
120-OHM-210MA 7
ROOM=RCAM_B2B
IN
AP_TO_RCAM_SHUTDOWN_L
1
AP_TO_RCAM_SHUTDOWN_CONN_L
2
21
01005 ROOM=RCAM_B2B
ROOM=RCAM_B2B
C3231
1
100PF
14
5% 2 16V NP0-C0G 01005
BUCK6_FB
ROOM=RCAM_B2B
B
B
FL3232
120-OHM-210MA
FL3220
FERR-22-OHM-1A-0.055OHM 29 20 17 14 13 12 9 8 7 6 5 3 33
PP1V8
1
22
2
PP1V8_RCAM_CONN VOLTAGE=1.8V
0201 ROOM=RCAM_B2B
1
C3220 1.0UF
20% 2 6.3V X5R 0201-1
ROOM=RCAM_B2B
1
OUT
RCAM_TO_LED_DRIVER_STROBE_EN
1
RCAM_TO_LED_DRIVER_STROBE_EN_CONN
2
21
01005 21
ROOM=RCAM_B2B
1
C3232 100PF
C3221
5% 2 16V NP0-C0G 01005
100PF
5% 2 16V NP0-C0G 01005
ROOM=RCAM_B2B
ROOM=RCAM_B2B
22 21 7
BI
I2C_ISP_BI_RCAM_SDA
BI
1
C3233 56PF
5% 2 16V NP0-C0G 01005 ROOM=RCAM_B2B
22 21 7
IN
I2C_ISP_TO_RCAM_SCL
OUT
1
C3234 56PF
5% 2 16V NP0-C0G 01005 ROOM=RCAM_B2B
A
SYNC_DATE=N/A
SYNC_MASTER=N/A PAGE TITLE
CAMERA:REAR CAMERA B2B DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
A.0.0 BRANCH
PAGE
32 OF 49 SHEET
21 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
D
D
DUAL LED STROBE DRIVER C
C
APN:353S3899 PP_LED_BOOST_OUT VOLTAGE=5.0V 33 28 27 26 25 24 21 17 15 14
U3300
PP_VCC_MAIN
C3386 1
C3387 1
20% 6.3V 2 CERM-X5R 0402-9
20% 6.3V 2 CERM-X5R 0402-9
10UF
ROOM=STROBE
CRITICAL
L3300
D1 IN
1.0UH-20%-3.6A-0.060OHM 1 2 PP_LED_DRIVER_SW
ROOM=STROBE
20% 2 6.3V CERM-X5R 0402-9
WLCSP ROOM=STROBE
CRITICAL OUT
A2 B2
C3394 10UF
LM3564A1TMX
OMIT_TABLE
10UF
1
A3 B3 C3
1
C3396 10UF
20% 2 6.3V CERM-X5R 0402-9
ROOM=STROBE
ROOM=STROBE
VIETMOBILE.VN PIQA20161T-SM
VOLTAGE=5.0V
SW
ROOM=STROBE
IN
21
IN
IN
21 7
BI
21 7
IN
BB_TO_LED_DRIVER_GSM_BURST_IND I2C_ISP_BI_RCAM_SDA I2C_ISP_TO_RCAM_SCL
NC
D3 E3 C2 E4 E2 D2
ENABLE INT 200K PD STROBE INT 200K PD TORCH INT 200K PD TX SDA SCL GND A1 B1
33 27
AP_TO_LED_DRIVER_EN RCAM_TO_LED_DRIVER_STROBE_EN
C4 D4
PP_LED_DRIVER_WARM_LED
LED2
VOLTAGE=5.0V
VOLTAGE=5.0V
1
C3308 100PF
TEMP E1
5% 2 16V NP0-C0G 01005
AGND
ROOM=STROBE
C1
8
A4 B4
PP_LED_DRIVER_COOL_LED
LED1
INT 200K PD
1
32
32
C3373 100PF
5% 2 16V NP0-C0G 01005
ROOM=STROBE
LED_MODULE_NTC
OUT
32
B
B
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
CAMERA:STROBE DRIVER DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
A.0.0 BRANCH
PAGE
33 OF 49 SHEET
22 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
CALTRA AUDIO CODEC (ANALOG INPUTS & OUTPUTS) D
D
U3500 VOICE MIC
31 31
LOWERMIC1_TO_CODEC_AIN1_P LOWERMIC1_TO_CODEC_AIN1_N
L2 L1
WLCSP-1 SYM 1 OF 3
AIN1+ AIN1-
CS42L71 ROOM=CODEC CRITICAL
LOWER MIC
31 31
LOWERMIC4_TO_CODEC_AIN2_P LOWERMIC4_TO_CODEC_AIN2_N
K3 L3
ANC REF MIC
32
ANC ERROR MIC
20 20
REARMIC2_TO_CODEC_AIN3_P REARMIC2_TO_CODEC_AIN3_N
FRONTMIC3_TO_CODEC_AIN4_P FRONTMIC3_TO_CODEC_AIN4_N
K2 K1
J3 J4
CODEC_TO_RCVR_P CODEC_TO_RCVR_N
AOUT2+ L8 AOUT2- M8
CODEC_TO_HAC_P CODEC_TO_HAC_N CODEC_TO_HPHONE_L CODEC_TO_HPHONE_R
HPOUTA K10 HPOUTB K11
AIN2+ AIN2-
C 32
AOUT1+ L9 AOUT1- M9
31
CODEC_TO_HPHONE_HS3_REF CODEC_TO_HPHONE_HS4_REF
CODEC_HSIN_P CODEC_HSIN_N
CODEC_HSIN_R_P
1 2 20% 01005 6.3V X5R-CERM
1
1
ROOM=CODEC
C3504 220PF
NOSTUFF
C3550 56PF
NO_XNET_CONNECTION=1
10% 2 10V X7R-CERM 01005
C3506
1.33K2 1% 1/32W MF 01005
ROOM=CODEC
0.1UF
R3550
1
CODEC_HSIN_R_N
ROOM=CODEC
HPHONE_TO_CODEC_DETECT
AIN5+ AIN5-
1.33K2
31
NOSTUFF 1
5% 16V NP0-C0G 2 01005 ROOM=CODEC
C3551
1
56PF
5% 16V NP0-C0G 2 01005 ROOM=CODEC
1% 1/32W MF 01005
ROOM=CODEC
NO_XNET_CONNECTION=1
31
ROOM=CODEC
C3552 100PF 1
1
A4
DMIC1_CLK NC B4 DMIC1_DATA NC C4
DMIC2_CLK NC C3 DMIC2_DATA NC
DP J12 DN H12
2
5% 16V NP0-C0G 01005
R3502
G2
AIN7+ NC G3 AIN7NC
B
20.0 2 5% 1/32W MF 01005
MIKEYBUS_CALTRA_DATA_P MIKEYBUS_CALTRA_DATA_N
MIKEYBUS_DATA_P MIKEYBUS_DATA_N
ROOM=CODEC
30 30
R3503
MBUS_REF G10
1
20.0 2 5% 1/32W MF 01005
A3
DMIC3_CLK NC B3 DMIC3_DATA NC
NC NC
31
R3515
0.1UF
HSIN+ D1 HSIN- E1
C
ROOM=CODEC
F2 AIN6+ NC F3 AIN6NC
A2 B2
31
CODEC_TO_HPHONE_HS4
VIETMOBILE.VN
B
31
HS4 M4
HPDETECT J9
NC NC
20
31
1 2 01005 20% 6.3V X5R-CERM
F1 G1
20
CODEC_TO_HPHONE_HS3
C3505
AIN4+ AIN4-
20
HS3 M5
HS3_REF L10 HS4_REF M10
AIN3+ AIN3-
20
C3554 100PF
ROOM=CODEC
1
DMIC4_CLK DMIC4_DATA
2
5% 16V NP0-C0G 01005
A9
PDM_CLK NC B9 PDM_DATA NC
ROOM=CODEC
A
A
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
AUDIO:CALTRA CODEC (1/2) DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
A.0.0 BRANCH
PAGE
35 OF 49 SHEET
23 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
CALTRA AUDIO CODEC (POWER & I/O) 26 25 15
PP1V8_VA 1
D
C3640
D
2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=CODEC PLACE_NEAR=U3500.J2:2mm
CODEC_AGND 33 28 27 26 25 22 21 17 15 14
1
C3600
1
10UF
33 31 30 27 24 16 15 14 12 8
24
PP_VCC_MAIN
C3601 0.1UF
1
C3602 0.1UF
20% 2 6.3V CERM-X5R 0402-9
20% 2 6.3V X5R-CERM 01005
20% 2 6.3V X5R-CERM 01005
ROOM=CODEC
ROOM=CODEC
ROOM=CODEC
1
C3603 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=CODEC
PP1V8_SDRAM
33 31 30 27 24 16 15 14 12 8
1
C3610
1
10UF
C3611 0.1UF
1
PP1V8_SDRAM 1
R3650
C3612
1.00K
0.1UF
20% 2 6.3V CERM-X5R 0402-9
20% 2 6.3V X5R-CERM 01005
20% 2 6.3V X5R-CERM 01005
ROOM=CODEC
ROOM=CODEC
ROOM=CODEC
5% 1/32W MF 2 01005
PP1V2_VD_FILT
ROOM=CODEC
VOLTAGE=1.2V
CODEC_RESET_L
C3650
C
4.7UF
31
LOWERMIC1_BIAS_FILT_RET
1
2
M6 K7
MIC1_BIAS MIC1_BIAS_FILT
31
2
PP_CODEC_TO_LOWERMIC4_BIAS LOWERMIC4_BIAS_FILT_IN
2
REARMIC2_BIAS_FILT_RET
ROOM=CODEC PLACE_NEAR=J4700.1:2mm
VOLTAGE=2.86V
32
2
C3653
XW3630
SHORT-10L-0.1MM-SM 1
2
FRONTMIC3_BIAS_FILT_RET
ROOM=CODEC PLACE_NEAR=J3100.40:2mm
4.7UF 1
2
VP_MBUS H10
20% 2 6.3V X5R-CERM 0201
ROOM=CODEC CRITICAL
VOLTAGE=2.86V
20
INT*
8
MOSI MISO
8
I2S_AP_TO_CODEC_MCLK
C12
MCLK
ROOM=CODEC
CALTRA_FLYC
FLYC L12
26 25 8
I2S_AP_TO_CODEC_ASP_BCLK I2S_AP_TO_CODEC_ASP_LRCLK I2S_AP_TO_CODEC_ASP_DOUT I2S_CODEC_TO_AP_ASP_DIN
C6 C5 B5 B6
VIETMOBILE.VN K6 L5
PP_CODEC_TO_FRONTMIC3_BIAS FRONTMIC3_BIAS_FILT_IN
J6 K5
C3661 2.2UF
MIC3_BIAS MIC3_BIAS_FILT
9 8
20% 2 6.3V X5R-CERM 0201
8
9 8
8
CALTRA_VCP_FILTP
+VCP_FILT J10
MIC4_BIAS MIC4_BIAS_FILT
9 8
ROOM=CODEC
CALTRA_FLYN
FLYN M12
ROOM=CODEC
K9
WLCSP-1 SYM 3 OF 3
JTAG_TMS JTAG_TCK JTAG_TDI JTAG_TDO
CS42L71 ROOM=CODEC CRITICAL
2.2UF
1
PP_CODEC_TO_REARMIC2_BIAS REARMIC2_BIAS_FILT_IN
20% 6.3V X5R-CERM1 402
CODEC_TO_AP_PMU_INT_L
B8 A8
26 25 8
C3652 1
MIC2_BIAS MIC2_BIAS_FILT
WAKE*
SPI_AP_TO_CODEC_MOSI SPI_CODEC_TO_AP_MISO
26 25 8
ROOM=CODEC
1
L6 J7
K8
CS* CCLK
8
C3660
CODEC_TO_PMU_MIKEY_INT_L
C9 C8
26 25 8
20% 6.3V X5R-CERM1 402
4.7UF
VA J1
WLCSP-1 SYM 2 OF 3
VOLTAGE=2.86V
RESET*
SPI_AP_TO_CODEC_CS_L SPI_AP_TO_CODEC_SCLK
8
1
4.7UF
XW3620 SHORT-10L-0.1MM-SM
CALTRA_FLYP
CS42L71
C3651 1
16 8
FLYP K12
U3500
ROOM=CODEC
LOWERMIC4_BIAS_FILT_RET
16
8
PP_CODEC_TO_LOWERMIC1_BIAS LOWERMIC1_BIAS_FILT_IN
31
H3
U3500
VOLTAGE=2.86V
20% 6.3V X5R-CERM1 402
31
VPROG_CP H11
ROOM=CODEC
VP M7
20% 2 6.3V X5R 0201-1
VL A5
VCP J11
1.0UF
VD_FILT C1 VD_FILT E12
C3670 VD D12 VD G12
1
8 8
1
20% 6.3V X5R-CERM1 402
C3662
8
4.7UF
ROOM=CODEC
XW3660 SM GNDCP
CALTRA_GNDCP
L11
1
20% 2 6.3V X5R-CERM1 402
16
I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_AP_OWL_TO_CODEC_XSP_LRCLK I2S_AP_TO_CODEC_XSP_DOUT I2S_CODEC_TO_AP_OWL_XSP_DIN
B11 C11 A11 A10
ASP_SCLK ASP_LRCK/FSYNC ASP_SDIN ASP_SDOUT XSP_SCLK XSP_LRCK/FSYNC XSP_SDIN/DAC2B_MUTE XSP_SDOUT
I2S_AP_TO_CODEC_MSP_BCLK I2S_AP_TO_CODEC_MSP_LRCLK I2S_AP_TO_CODEC_MSP_DOUT I2S_CODEC_TO_AP_MSP_DIN
B7 C7 D8 A7
MSP_SCLK MSP_LRCK/FSYNC MSP_SDIN MSP_SDOUT
PMU_TO_CODEC_DIGLDO_PULLDN
H5 J5
DIGLDO_PULLDN DIGLDO_PDN
ROOM=CODEC
2 ROOM=CODEC
B
1
C3663 4.7UF
20% 2 6.3V X5R-CERM1 402 ROOM=CODEC
CALTRA_VCP_FILTN
-VCP_FILT M11 LP_FILT+ F12
CALTRA_LP_FILTP 1
C3665 0.1UF
20% 2 6.3V X5R-CERM 01005
CALTRA_HS_BIAS_FILT 1
M3 M2
ROOM=CODEC
HS_BIAS_FILT HS_BIAS_FILT_REF
D3 D4 D2 C2
NC NC NC NC
TSTO TSTO TSTO TSTO TSTO TSTO TSTO TSTO
D11 B10 D5 D6 E5 E6 E7 K4
TSTI TSTI TSTI TSTI TSTI TSTI TSTI TSTI TSTI
C10 D10 D7 D9 E8 E9 G11 H4 M1
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
A1 A12 B12 E2 E3 E4 E10 F4 F5 F6 F7 F8 F9 F10 G4 G5 G6 G7 G8 G9 H6 H7 H8 H9
NC NC NC NC NC NC NC NC
C
B
CALTRA_FILTP
FILT+ H1
GND J8
C3654 4.7UF
20% 2 6.3V X5R-CERM1 402
1
C3664 10UF
20% 2 6.3V CERM-X5R 0402-9 J2 GNDA
ROOM=CODEC
L7 GNDP
A6 B1 E11 F11
GNDD GNDD GNDD GNDD
CALTRA_HS_BIAS_FILT_IN
L4 GNDHS
ROOM=CODEC
FILT- H2
A
A
SYNC_MASTER=N71_SINGLE_BRD
SYNC_DATE=05/29/2014
PAGE TITLE
AUDIO:CALTRA CODEC (2/2) XW3600
DRAWING NUMBER
SHORT-10L-0.1MM-SM 1 2
24
Apple Inc.
CODEC_AGND VOLTAGE=0
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
7
6
5
REVISION
R
ROOM=CODEC
8
051-1902
4
3
2
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PAGE
36 OF 49 SHEET
24 OF 59
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SIZE
D
8
7
6
5
4
2
3
1
D
D
SPEAKER AMPLIFIER APN: 338S1285
33 28 27 26 24 22 21 17 15 14
PP_VCC_MAIN
PP1V8_VA
C3795 1
C3732 1
C3735 1
20% 6.3V CERM-X5R 2 0402-9
20% 6.3V CERM-X5R 2 0402-9
20% 6.3V CERM-X5R 2 0402-9
10UF
10UF
ROOM=SPKR_AMP
C3737
10UF
ROOM=SPKR_AMP
ROOM=SPKR_AMP
1
1
C3709 0.1UF
2.2UF
20% 2 6.3V X5R-CERM 01005
20% 6.3V X5R-CERM 2 0201 ROOM=SPKR_AMP
ROOM=SPKR_AMP
1
15 24 26
C3730 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=SPKR_AMP
PP_SPKR_VBOOST VOLTAGE=8.0V 20% 2 10V X5R-CERM 0402-8
C
ROOM=SPKR_AMP
C3742
1
10UF
C3743 10UF
20% 2 10V X5R-CERM 0402-8
20% 2 10V X5R-CERM 0402-8
ROOM=SPKR_AMP
ROOM=SPKR_AMP
1
C3744 10UF
20% 2 10V X5R-CERM 0402-8 ROOM=SPKR_AMP
1
C3745 0.1UF
10% 2 16V X5R-CERM 0201 ROOM=SPKR_AMP
1
C3746 100PF
5% 2 16V NP0-C0G 01005
F5
10UF
1
A4 A5
C3741
A1 B1 C1 D1
1
ROOM=SPKR_AMP
VBST
1
CRITICAL PP_SPEAKERAMP_SW
2
VOLTAGE=8.0V
PIQA20161T-SM
A2 B2
CS35L21-XWZR SW
ROOM=SPKR_AMP
I2C1_AP_SDA
D5
IN
I2C1_AP_SCL
D6
OUT
SPEAKERAMP_TO_AP_INT_L
BI
33 30 26 17 8
8
IN
R3729
8
IN
100K
5% 1/32W MF 2 01005
ROOM=SPKR_AMP
ROOM=SPKR_AMP
CRITICAL
SDA SCL
VSENSE- E3 VSENSE+ E2
AP_TO_SPEAKERAMP_STAYIN_ALIVE
ISENSE- F1 ISENSE+ E1
INT*
RESET*
OUT+ D2 OUT- C2
D7 ALIVE C7 ADO
IREF+ B7
1M INT PD
8
IN
ROOM=SPKR_AMP 26 24 8
26 24 8
26 24 8
26 24 8
SPEAKER_TO_SPEAKERAMP_VSENSE_N SPEAKER_TO_SPEAKERAMP_VSENSE_P
IN
31
IN
31
VIETMOBILE.VN A7 A6
AP_TO_SPEAKERAMP_RESET_L 1
SPEAKERAMP_FILT SPEAKERAMP_LDO_FILT
20% 2 6.3V CER-X5R 0402
ROOM=SPKR_AMP
33 30 26 17 8
8
FILT+ F2 LDO_FILT C5
WLCSP VER1
C3740 4.7UF
20% 2 6.3V X5R-CERM 0201
U3700
1.2UH-20%-3.0A-0.080OHM 1
C3729
1
2.2UF
L3700
C
VA
VP
I2S_AP_TO_SPEAKERAMP_MCLK
E7
IN
I2S_AP_TO_CODEC_ASP_BCLK
F6
IN
I2S_AP_TO_CODEC_ASP_LRCLK I2S_AP_TO_CODEC_ASP_DOUT
F7
IN
E5
OUT
I2S_CODEC_TO_AP_ASP_DIN
SPEAKERAMP_OUT_POS
C3701
C3704
SPEAKERAMP_IREF
1
R3735
SCLK
44.2K
1M INT PD
1% 1/32W MF 2 01005
LRCK/FSYNC 1M INT PD
SDIN
0.1UF
1
1
220PF
MCLK
1M INT PD
E6
SPEAKERAMP_ISENSE_N SPEAKERAMP_ISENSE_P
5% 10V 2 C0G-CERM 01005
ROOM=SPKR_AMP
20% 6.3V X5R-CERM 01005
R37021 39.2
1% 1/32W MF 01005 2
ROOM=SPKR_AMP
1M INT PD
R3701 39.2
2
XW3701 SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
B5 B6 C6 E4 F3 F4
ROOM=SPKR_AMP PLACE_NEAR=R3703.1:2mm
ROOM=SPKR_AMP
1% 1/32W MF 2 01005 ROOM=SPKR_AMP
XW3702
GNDA
5% 2 10V C0G-CERM 01005
SPEAKERAMP_ISENSE_R_N 2
1M INT PD
A3 B3 B4 C3 C4 D3 D4
1
SPEAKERAMP_ISENSE_R_P
SDOUT
C3705 220PF
ROOM=SPKR_AMP
ROOM=SPKR_AMP
GNDP
1
2
1
1
R3703
B
1
ROOM=SPKR_AMP PLACE_NEAR=R3703.2:2mm
0.1002
SPEAKERAMP_TO_SPEAKER_OUT_POS
B 31
1% 1/4W MF 0402 ROOM=SPKR_AMP
SPEAKERAMP_TO_SPEAKER_OUT_NEG
C3760 1
1
10% 10V X7R-CERM 2 01005
10% 2 10V X7R-CERM 01005
220PF
ROOM=SPKR_AMP
A
C3763 220PF
ROOM=SPKR_AMP
C3700
1
1000PF
10% 10V 2 X5R 01005
1
31
C3702 1000PF
10% 2 10V X5R 01005
ROOM=SPKR_AMP
ROOM=SPKR_AMP
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
AUDIO:SPEAKER DRIVER DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
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25 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
D
D
ARC DRIVER APN: 338S1285
33 28 27 25 24 22 21 17 15 14
PP_VCC_MAIN
PP1V8_VA
C3895 1
C3832 1
C3835 1
20% 6.3V 2 CERM-X5R 0402-9
20% 6.3V 2 CERM-X5R 0402-9
20% 6.3V 2 CERM-X5R 0402-9
10UF
10UF
10UF
ROOM=ARC
C3837
C3809 0.1UF
2.2UF
20% 2 6.3V X5R-CERM 01005
20% 6.3V 2 X5R-CERM 0201
ROOM=ARC
ROOM=ARC
1
1
ROOM=ARC
ROOM=ARC
1
15 24 25 26
C3830 2.2UF
20% 2 6.3V X5R-CERM 0201 ROOM=ARC
R3811 0.00 2
1
PP_ARC_VBOOST
C
C3848 22UF
20% 2 10V X5R-CERM 0603-1
ROOM=ARC
ROOM=ARC
1
C3842 0.1UF
10% 2 16V X5R-CERM 0201
1
C3846 100PF
ROOM=ARC
ROOM=ARC
VBST
VP
R3810
VA 1
CRITICAL
U3800
1.2UH-20%-3.0A-0.080OHM A2 B2
PP_ARC_SW
2
VOLTAGE=8.0V
PIQA20161T-SM
CS35L21-XWZR WLCSP VER1
SW
ROOM=ARC
33 30 25 17 8
8
BI
D5
I2C1_AP_SDA
IN
I2C1_AP_SCL
OUT
ARC_TO_AP_INT_L
R3829
8
IN
100K
5% 1/32W MF 2 01005
1
C3840 4.7UF
20% 2 6.3V X5R-CERM1 402
ROOM=ARC
26 25 24 15
CRITICAL
SDA
VSENSE- E3 VSENSE+ E2
A7
SCL
INT*
RESET*
AP_TO_ARC_STAYIN_ALIVE
D7 ALIVE
PP1V8_VA
C7 ADO
ISENSE- F1 ISENSE+ E1 OUT+ D2 OUT- C2
IREF+ B7
1M INT PD
8
ROOM=ARC 25 24 8
25 24 8
25 24 8
25 24 8
IN IN IN IN OUT
I2S_AP_TO_ARC_MCLK
E7
NOSTUFF
ROOM=ARC
1
E6
I2S_AP_TO_CODEC_ASP_LRCLK
F6
ARC_DRIVER_OUT_POS
10% 2 10V X7R-CERM 01005
I2S_CODEC_TO_AP_ASP_DIN
1
5% 10V C0G-CERM 2 01005
MCLK
1
R3835
ROOM=ARC
SDIN
ROOM=ARC
ROOM=ARC
ROOM=ARC
C3811 220PF
10% 2 10V X7R-CERM 01005
ROOM=ARC
ROOM=ARC
1
R3801 39.2
ROOM=ARC
1% 1/32W MF 2 01005
NOTE:FERRITES SHORTED OUT BY XW-LINKS BETWEEN PADS CUT LINK BEFORE POPULATING FERRITES
2
ROOM=ARC 1 PLACE_NEAR=R3803.1:2mm
ROOM=ARC
XW3810
SHORT-10L-0.1MM-SM 1 2
XW3801 SHORT-10L-0.1MM-SM
XW3802
GNDA
5% 2 10V C0G-CERM 01005
ARC_ISENSE_R_N
SHORT-10L-0.1MM-SM
A3 B3 B4 C3 C4 D3 D4
1
ROOM=ARC
C3805
ROOM=ARC
2
1M INT PD
B
31
220PF
ARC_ISENSE_R_P
SDOUT GNDP
1
2
20% 6.3V X5R-CERM 01005
1% 1/32W MF 01005 2
1% 1/32W MF 2 01005
LRCK/FSYNC
R38021 39.2
44.2K
1M INT PD
E5
IN
NOSTUFF
0.1UF
1
220PF
ARC_IREF
SCLK
C3801
NOSTUFF
C3804
1M INT PD
F7
SOLENOID_TO_ARC_DRIVER_VSENSE_P
ARC_ISENSE_N ARC_ISENSE_P
1M INT PD
I2S_AP_TO_CODEC_ASP_DOUT
NOSTUFF
C3810 220PF
SOLENOID_TO_ARC_DRIVER_VSENSE_R_N SOLENOID_TO_ARC_DRIVER_VSENSE_R_P
1M INT PD
I2S_AP_TO_CODEC_ASP_BCLK
0.00 2
C
0% 1/32W MF 01005
VIETMOBILE.VN D6
A6
AP_TO_ARC_RESET_L 1
ARC_DRIVER_FILT ARC_DRIVER_LDO_FILT
B5 B6 C6 E4 F3 F4
IN
FILT+ F2 LDO_FILT C5
20% 2 6.3V X5R-CERM 0201
1
ROOM=ARC
33 30 25 17 8
8
C3829 2.2UF
L3800
1
31
ROOM=ARC
5% 2 16V NP0-C0G 01005
F5
20% 2 10V X5R-CERM 0402-8
1
A4 A5
10UF
A1 B1 C1 D1
C3803
IN
0% 1/32W MF 01005
VOLTAGE=8.0V 1
SOLENOID_TO_ARC_DRIVER_VSENSE_N
ROOM=ARC PLACE_NEAR=R3803.2:2mm
ROOM=ARC
R3803 1
B
FL3803
1
120OHM-25%-1.8A-0.06DCR
0.1002
ARC_DRIVER_OUT_FILT_POS
1 0402
1% 1/4W MF 0402
ARC_DRIVER_TO_SOLENOID_OUT_POS
2
31
NOSTUFF
ROOM=ARC
FL3804
ROOM=ARC
120OHM-25%-1.8A-0.06DCR
ARC_DRIVER_OUT_FILT_NEG
1 0402
C3860 1 1000PF
10% 10V 2 X5R 01005
ROOM=ARC
1
ARC_DRIVER_TO_SOLENOID_OUT_NEG
2
31
NOSTUFF
ROOM=ARC
C3863
XW3811
1000PF
SHORT-10L-0.1MM-SM 1 2
10% 2 10V X5R 01005
ROOM=ARC
C3800 1
1
1000PF
C3802 1000PF
10% 10V 2 X5R 01005
2 10% 10V X5R 01005
ROOM=ARC
ROOM=ARC
A
A PAGE TITLE
AUDIO:ARC DRIVER DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
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D
8
7
6
5
4
2
3
1
DISPLAY & TOUCH - POWER SUPPLIES CHESTNUT DISPLAY PMU D
D
APN:338S1172 PP_VCC_MAIN
28 27 26 25 24 22 21 17 15 14 33
C4000 1
1
10UF
CRITICAL
20% 6.3V CERM-X5R 2 0402-9
L4000
1.0UH-20%-2.25A-0.15OHM
VOLTAGE=6.0V
TPS65730A0PYFF
ROOM=CHESTNUT
PIXB2016FE-SM
PP_CHESTNUT_CP
U4000 BGA
ROOM=CHESTNUT
D1 VIN 2
PP_CHESTNUT_SW
B2 SW
ROOM=CHESTNUT
1
CF1 C4 CF2 E4
10UF
CRITICAL
30 16 9 5
16
D3 SCL
BI
I2C0_AP_SDA
D2 SDA
IN
LCM_TO_CHESTNUT_PWR_EN
IN
PMU_TO_OWL_ACTIVE_READY
OUT
CHESTNUT_TO_PMU_ADCMUX
PP6V0_LCM_BOOST VOLTAGE=6.0V
VNEG E3
PN5V7_LCM_MESON_AVDDN
29
VOLTAGE=-5.7V
C3 LCM_EN
VNEG(SUB) E2
200K INT PD
C2 RESET*
HVLDO1 A4
PP5V7_MESON_AVDDH
E1 ADCMUX
29
VOLTAGE=5.7V
NO INT PULL
B1 PGND1 D4 PGND2
29 16
IN
I2C0_AP_SCL
C1 AGND
33 27 16 8
ROOM=CHESTNUT
VOLTAGE=-6.0V
LCMBST B3 CPUMP B4
NO INT PULL 33 27 16 8
20% 2 10V X5R-CERM 0402-8
PN_CHESTNUT_CN
VOLTAGE=6.3V
A2 SYNC
C4002
HVLDO2 A3
PP5V7_LCM_AVDDH
29
VOLTAGE=5.7V
HVLDO3 A1
PP5V1_TOUCH_VDDH
29
VOLTAGE=5.1V
1
C4003
1
1UF
C4004 10UF
20% 2 16V CER-X5R 0201
20% 2 10V X5R-CERM 0402-8
ROOM=CHESTNUT
1
C4005
1
10UF
10UF
20% 2 10V X5R-CERM 0402-8
ROOM=CHESTNUT
C4006
20% 2 10V X5R-CERM 0402-8
ROOM=CHESTNUT
1
C4007 10UF
20% 2 10V X5R-CERM 0402-8
ROOM=CHESTNUT
ROOM=CHESTNUT
1
C4008 10UF
20% 2 10V X5R-CERM 0402-8
1
10UF
20% 2 10V X5R-CERM 0402-8
ROOM=CHESTNUT
C
C4001 ROOM=CHESTNUT
C
C4001 ADDED FOR ONZ FAILURES CAUSED BY AVVDN
LED BACKLIGHT DRIVER
MOJAVE MESA BOOST
APN:353S00407
VIETMOBILE.VN
OMIT_TABLE
CRITICAL
CRITICAL
PP_VCC_MAIN
C4021 1
20% 6.3V CERM-X5R 2 0402-9
20% 6.3V CERM-X5R 2 0402-9
10UF
ROOM=BACKLIGHT
A
L4040
K
28 27 26 25 24 22 21 17 15 14 33
ROOM=BACKLIGHT
10UF
CRITICAL
CRITICAL
L4020
ROOM=BACKLIGHT
1
2
A
PP_LCM_BL_ANODE
K
VOLTAGE=25V
PITA32251T-SM
VOLTAGE=35V SOD-923-1
ROOM=BACKLIGHT
ROOM=BACKLIGHT
1
C4022 100PF
5% 2 35V NP0-C0G 01005
B
1
2
0403
ROOM=BACKLIGHT
1
MOJAVE_EN_M
20% 6.3V 2 CERM-X5R 0402-9
29
PP18V0_MESA_SW
VOLTAGE=18.0V
ROOM=MOJAVE
10UF
NSR0530P2T5G
PP_BL_SW1
PP_VCC_MAIN
C4040 1
D4020
15UH-20%-0.72A-0.9OHM
LM3638A0
1.0UH-20%-0.4A-0.636OHM
NSR05F30NXT5G
ROOM=BACKLIGHT
U4040
CRITICAL
VOLTAGE=25V
PIQA20161T-SM
C4020 1
D4021 DSN2
ROOM=MOJAVE
PP17V0_MOJAVE_LDOIN VOLTAGE=17.0V
C4023 10UF
20% 2 35V X5R-CERM 0603
NOSTUFF
R4040
ROOM=BACKLIGHT 33 31 30 19 15
IN
PP3V0_TRISTAR
1
PP16V5_MESA
BGA B1 SW
VOLTAGE=16.5V
ROOM=MOJAVE
A2 VIN
100PF
5% 2 35V NP0-C0G 01005
VOUT C3
B2 EN_M A3 EN_S C2 LDOIN
ROOM=MOJAVE
1
3 28
C4043 2.2UF
20% 2 35V X5R-CERM 0402 ROOM=MOJAVE
PMID C1
1
C4041 2.2UF
0.00 2
B
20% 2 35V X5R-CERM 0402
0% 1/32W MF 01005
ROOM=BACKLIGHT
C4042
1
CRITICAL
B3 AGND
1.0UH-20%-3.6A-0.060OHM 1 2 PP_BL_SW2
A1 PGND
L4021
28 27 26 25 24 22 21 17 15 14 33
APN:353S00671
ROOM=MOJAVE
ROOM=MOJAVE
U4020 LM3539A0YFFR DSBGA
D4 IN
16 9
IN
9
IN
PP1V8_SDRAM
D3 VIO/HWEN
DWI_PMGR_TO_PMU_BACKLIGHT_MOSI DWI_PMGR_TO_BACKLIGHT_SCLK 200K
1% 1/32W MF 01005 2
IN
MESA_TO_BOOST_EN
0.00 2 0% 1/32W MF 01005
SW2_1 A3 SW2_2 A4 LED1 C1 LED2 B1
1
ROOM=MOJAVE
PP_LCM_BL_CAT1 PP_LCM_BL_CAT2
29 29
D1 TRIG
ROOM=BACKLIGHT
D2 INHIBIT
B3 B4
BI
CRITICAL
B2 SDA A2 SCL
R40201
33 27 16 8
C2 SDI C3 SCK
28 3
SW1 C4
GND GND
33 31 30 24 16 15 14 12 8
R4041
OUT A1
I2C0_AP_SDA NOSTUFF
C4026 1 12PF
5% 16V CERM 2 01005
ROOM=BACKLIGHT
A
R4021 33 27 16 8
IN
I2C0_AP_SCL
C4024 12PF
1
1
5% 16V CERM 2 01005
ROOM=BACKLIGHT
1.00K2
SYNC_MASTER=N/A
I2C0_AP_SCL_MUON
1% 1/32W MF 01005 ROOM=BACKLIGHT
SYNC_DATE=N/A
PAGE TITLE 1
DISPLAY:POWER
C4025 150PF
DRAWING NUMBER
10% 2 10V X7R 01005-1
Apple Inc.
ROOM=BACKLIGHT
33 22
IN IN
8
AP_TO_MUON_BL_STROBE_EN BB_TO_LED_DRIVER_GSM_BURST_IND
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
7
REVISION
R
NOTICE OF PROPRIETARY PROPERTY: 7
051-1902
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SIZE
D
A
8
7
6
5
4
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3
1
MAMBA & MESA CONNECTOR
MAMBA & MESA (M&M) FLEX
THIS ONE ON MLB
--->
516S00056 (RCPT) 516S00057 (PLUG)
CRITICAL ROOM=MAMBA_MESA
J4100
D
BB35CRA223A
D
F-ST-SM 27
MESA POWER 1
PP3V0_MESA
15
2
PP3V0_MESA_CONN VOLTAGE=3.0V
01005 1
C4104
1
2.2UF
C4103
1
2.2UF
20% 2 6.3V X5R-CERM 0201
1
ROOM=MAMBA_MESA
1
ROOM=MAMBA_MESA
28 28
28
C4100 100PF
20% 2 6.3V X5R-CERM 01005
20% 2 6.3V X5R-CERM 0201
ROOM=MAMBA_MESA
C4101 0.1UF
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=MAMBA_MESA
C4102
SPI_AP_TO_MESA_MOSI_CONN SPI_MESA_TO_AP_MISO_CONN BUTTON_MENU_KEY_CONN_L
28
70-OHM-25%-0.28A
ROOM=MAMBA_MESA
28
MESA_TO_BOOST_EN_CONN SPI_AP_TO_MESA_SCLK_CONN MESA_TO_AP_INT_CONN PP16V5_MESA_CONN
28
PP1V8_MESA_CONN
28
5% 2 16V NP0-C0G 01005
28 28
ROOM=MAMBA_MESA
24
1
2
3
4
5
6
MAMBA_TO_LCM_MDRIVE_MAMBA_CONN LCM_TO_MAMBA_MSYNC_MAMBA_CONN AP_TO_TOUCH_RESET_CONN_L
7
8
TP_MAMBA_HINT_L
9
10
I2C_TOUCH_BI_MAMBA_PROX_SDA I2C_TOUCH_TO_MAMBA_PROX_SCL PP1V8_TOUCH_TO_MAMBA_CONN
PP3V0_MESA_CONN
28
FL4100
23
11
12
13
14
15
16
17
18
19
20
21
22
25
FL4105
1
PP1V8_MESA
PP1V8_MESA_CONN VOLTAGE=1.8V
01005
C4106
ROOM=MAMBA_MESA
1
2.2UF
IN
PP4100
ROOM=MAMBA_MESA
20 28 29
28
28
NOTE:PIN8 (MAMBA HARDWARE INTERRUPT) NOT ROUTED TO CUMULUS BROUGHT TO PROBE POINT FOR ORB HW DEBUG
C4105
5% 2 16V NP0-C0G 01005
ROOM=MAMBA_MESA
NOTE: OUTPUT IMPDEANCE MUST BE >0.01-OHM IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC.
ROOM=MAMBA_MESA
FL4107
2
PP16V5_MESA_CONN VOLTAGE=16.5V
01005 ROOM=MAMBA_MESA
1
28
33 27 26 25 24 22 21 17 15 14
70-OHM-25%-0.28A
LP5907SNX-2.75 X2SON 4 VIN VOUT 1
PP_VCC_MAIN
VOLTAGE=2.75V
C4107
C4127
100PF
1
5% 2 35V NP0-C0G 01005
C4128
1
ROOM=MAMBA_MESA
C4124 2.2UF
20% 2 6.3V X5R-CERM 0201
C
PP2V75_MAMBA_CONN
28
VOLTAGE=2.75V 1
C4123
1
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=MAMBA_MESA
ROOM=MAMBA_MESA
2 01005
2.2UF
GND EPAD
20% 6.3V 2 X5R-CERM 0201
ROOM=MAMBA_MESA
1
3 EN
2.2UF
1
PP2V75_MAMBA_lDO
ROOM=MAMBA_MESA
2
1
PP16V5_MESA
FL4120
U4100
70-OHM-25%-0.28A 27 3
BI
100PF
20% 2 6.3V X5R-CERM 0201
C
PP
20 28 29
MAMBA POWER
28
5
1
P3MM-NSM SM 1
28 29
26
28
2
28
PP2V75_MAMBA_CONN
70-OHM-25%-0.28A 15
28
1
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=MAMBA_MESA
C4122
1
2.2UF
20% 2 6.3V X5R-CERM 0201
ROOM=MAMBA_MESA
C4121
100PF
20% 2 6.3V X5R-CERM 0201
ROOM=MAMBA_MESA
C4120
5% 2 16V NP0-C0G 01005
ROOM=MAMBA_MESA
ROOM=MAMBA_MESA
R4125
MESA DIGITAL I/O
0.00 2
VIETMOBILE.VN 8
PP1V8_TOUCH
29 28 20 14
MAMBA_EXT_LDO_EN
1
0% 1/32W MF 01005
ROOM=MAMBA_MESA
FL4110
120-OHM-210MA 8
IN
SPI_AP_TO_MESA_MOSI
1
SPI_AP_TO_MESA_MOSI_CONN
2 01005
ROOM=MAMBA_MESA
1
C4110
28
29
OUT
MAMBA_TO_LCM_MDRIVE_LCM_CONN
R4111 SPI_AP_TO_MESA_SCLK
1
B
SPI_AP_TO_MESA_SCLK_CONN 1
FL4112
OUT
SPI_MESA_TO_AP_MISO
1
C4111 29
IN
ROOM=MAMBA_MESA
B
LCM_TO_MAMBA_MSYNC_LCM_CONN
1 ROOM=MAMBA_MESA
C4112
29 28 20 14
MESA_TO_AP_INT_CONN
2
1% 1/32W MF 01005
1
NOSTUFF
NOSTUFF
R41301
R41311
1% 1/32W MF 01005 2
1% 1/32W MF 01005 2
28
ROOM=MAMBA_MESA 29 28 20
C4115
ROOM=MAMBA_MESA
2.0K
ROOM=MAMBA_MESA
I2C_TOUCH_TO_MAMBA_PROX_SCL
IN
CKPLUS_WAIVE=I2C_PULLUP
100PF
ROOM=MAMBA_MESA
1
5% 2 16V NP0-C0G 01005
5% 2 16V NP0-C0G 01005
R4116 27 3
OUT
MESA_TO_BOOST_EN
1
ROOM=MAMBA_MESA
MESA_TO_BOOST_EN_CONN
2
1% 1/32W MF 01005
1
28 29 28 20
C4116
I2C_TOUCH_BI_MAMBA_PROX_SDA
BI
1
100PF
5% 2 16V NP0-C0G 01005
ROOM=MAMBA_MESA
A BUTTON_MENU_KEY_L
C4118 1 0.01UF
1
100
CKPLUS_WAIVE=I2C_PULLUP
5% 2 16V NP0-C0G 01005
SYNC_MASTER=N/A
ROOM=MAMBA_MESA
R4117 OUT
C4133 56PF
DEFAULT_RESISTOR_100.000000OHM_2_1 ROOM=MAMBA_MESA
33 16 9 8
C4132 56PF
ROOM=MAMBA_MESA
681
C4131
5% 2 16V NP0-C0G 01005
PP1V8_TOUCH
2.0K
R4115 681
1
BUTTON_MENU_KEY_CONN_L
2
5% 1/32W MF 01005
FL4134
ROOM=MAMBA_MESA
IN
AP_TO_TOUCH_RESET_L
1
C4117
ROOM=MAMBA_MESA
100PF
1
C4134
Apple Inc. NOTICE OF PROPRIETARY PROPERTY:
ROOM=MAMBA_MESA
NOTE:TOUCH I2C PULL-UPS TO PP1V8_TOUCH INSIDE KEPLER ADDING R4130, R4131 AS OPTION FOR TWEAKING VALUES.
6
5
4
051-1902 REVISION
R
5% 2 16V NP0-C0G 01005
ROOM=MAMBA_MESA
7
DRAWING NUMBER
28 29
100PF
5% 2 16V NP0-C0G 01005
ROOM=MAMBA_MESA
TOUCH:ORB & MESA B2B AP_TO_TOUCH_RESET_CONN_L
2 01005
SYNC_DATE=N/A
PAGE TITLE
120-OHM-210MA
28
8
1
10% 6.3V 2 X5R 01005
8
28
56PF
ROOM=MAMBA_MESA
1
LCM_TO_MAMBA_MSYNC_MAMBA_CONN
2
28
5% 2 16V NP0-C0G 01005
MESA_TO_AP_INT
28
FL4131
56PF
OUT
ROOM=MAMBA_MESA
01005
01005
8
ROOM=MAMBA_MESA
MAMBA_TO_LCM_MDRIVE_MAMBA_CONN
2
01005
1
5% 2 16V NP0-C0G 01005
120-OHM-210MA
SPI_MESA_TO_AP_MISO_CONN
ROOM=MAMBA_MESA
100PF
20% 2 6.3V X5R-CERM 0201
ROOM=MAMBA_MESA
ROOM=MAMBA_MESA
2
C4125
5% 16V 2 NP0-C0G 01005
28
5% 2 16V NP0-C0G 01005
120-OHM-210MA
1
2.2UF
56PF
56PF
ROOM=MAMBA_MESA
8
1
C4130 1
0% 1/32W MF 01005
C4126
120-OHM-210MA
ROOM=MAMBA_MESA
IN
1
28
FL4130
5% 2 16V NP0-C0G 01005
8
VOLTAGE=1.8V
MAMBA DIGITAL I/O
56PF
0.00 2
PP1V8_TOUCH_TO_MAMBA_CONN
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
A.0.0 BRANCH
PAGE
41 OF 49 SHEET
28 OF 59
1
SIZE
D
A
8
7
6
5
4
27
C4200 2.2UF
C4201 2.2UF
20% 6.3V X5R-CERM 2 0201
20% 6.3V X5R-CERM 2 0201
ROOM=KEPLER_B2B
ROOM=KEPLER_B2B
D
C4202
1
1
PP5V7_LCM_AVDDH_CONN VOLTAGE=5.7V
ROOM=KEPLER_B2B
2.2UF
1
C4203
1
20% 2 6.3V X5R-CERM 0201
ROOM=KEPLER_B2B
C4204
1
ROOM=KEPLER_B2B
2
ROOM=KEPLER_B2B
PP1V8_LCM_CONN 1
C4205
1
20% 2 6.3V X5R-CERM 0201
2
ROOM=KEPLER_B2B
FL4207
C4206
VOLTAGE=1.8V
29 29
VOLTAGE=-5.7V
28 29
29 29
120-OHM-210MA 27 16
2
LCM_TO_CHESTNUT_PWR_EN
OUT
1
LCM_TO_CHESTNUT_PWR_EN_CONN
01005
ROOM=KEPLER_B2B
1
ROOM=KEPLER_B2B
PP5V7_MESON_AVDDH_CONN
1 0201
VOLTAGE=5.7V
C4208
1
ROOM=KEPLER_B2B
8
PP1V8_TOUCH_CONN
C4209
ROOM=KEPLER_B2B
20% 6.3V X5R-CERM 2 0201
16
C4210
1
100PF
5% 16V NP0-C0G 01005
240OHM-350MA
PP_LCM_BL_ANODE_CONN
2
VOLTAGE=25V 1
ROOM=KEPLER_B2B
PMU_TO_LCM_PANICB
IN
1 MF 5%
10
PMU_TO_LCM_PANICB_CONN
2 1/32W 01005 1
33 9 8 3 29
2
LCM_TO_OWL_BSYNC
OUT
1
C4211
PP_LCM_BL_CAT1_CONN
2
VOLTAGE=25V 1
1
2
UART_OWL_TO_TOUCH_TXD
IN
1 01005
3 29
1
ROOM=KEPLER_B2B
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
47
48
2
SPI_AP_TO_TOUCH_CS_L
1
VOLTAGE=25V 1
1
SYM_VER-2
2
TOUCH_TO_OWL_ACCEL_DATA_REQUEST
OUT
2
8
IN
1
2
SPI_AP_TO_TOUCH_SCLK
2
1
29 28 20 14
MIPI_AP_TO_LCM_CLK_CONN_P
1
R4240
29
MIPI_AP_TO_LCM_CLK_CONN_N
5% 1/32W MF 01005 2
29
C4240
1
29
29
29
SPI_AP_TO_TOUCH_MOSI_CONN
29
ROOM=KEPLER_B2B
5% 16V 2 NP0-C0G 01005
SPI_AP_TO_TOUCH_MOSI
2
1 1
C4252
B
ROOM=KEPLER_B2B
FL4253
120-OHM-210MA 8
OUT
SPI_TOUCH_TO_AP_MISO
2
1 01005 ROOM=KEPLER_B2B
SPI_TOUCH_TO_AP_MISO_CONN 1
29
C4253 56PF
ROOM=KEPLER_B2B
29
FL4254
120-OHM-210MA 8
OUT
TOUCH_TO_AP_INT_L
2
1 01005 ROOM=KEPLER_B2B
TOUCH_TO_AP_INT_L_CONN 1
29
C4254 100PF
5% 2 16V NP0-C0G 01005
ROOM=KEPLER_B2B
FL4255
MIPI_AP_TO_LCM_DATA0_CONN_P MIPI_AP_TO_LCM_DATA0_CONN_N
2
1 ROOM=KEPLER_B2B
0.22UF
AP_TO_TOUCH_CLK32K_RESET_CONN_L 1
C4255
5% 2 16V NP0-C0G 01005
U4240 74AUP1G04GX
2
VER
SOT1226 4 3
29
ROOM=KEPLER_B2B
TOUCH_TO_PROX_TX_EN_BUFF
OUT
20
SYNC_MASTER=N/A
ROOM=KEPLER_B2B
SYNC_DATE=N/A
PAGE TITLE
CRITICAL
DISPLAY:KEPLER B2B
NC 29
DRAWING NUMBER
Apple Inc.
FL4241 20
MIPI_AP_TO_LCM_DATA1_CONN_P MIPI_AP_TO_LCM_DATA1_CONN_N
OUT
TOUCH_TO_PROX_RX_EN_FCAM_CONN
1
2
120-OHM-210MA
29
TOUCH_TO_PROX_RX_EN_LCM_CONN 1
5
REVISION
A.0.0
29
NOTICE OF PROPRIETARY PROPERTY:
C4241
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
100PF
4
051-1902
R
5% 2 16V NP0-C0G 01005
29
6
29
100PF
20% 6.3V 2 X5R 01005-1
TOUCH_TO_PROX_TX_EN_CONN_L
AP_TO_TOUCH_CLK32K_RESET_L
01005
NC
29
IN
ROOM=KEPLER_B2B
7
29
SPI_AP_TO_TOUCH_SCLK_CONN
29
1
ROOM=KEPLER_B2B
ROOM=KEPLER_B2B
8
20 28
5% 2 16V NP0-C0G 01005
8
ROOM=KEPLER_B2B
2
OUT 29
56PF
PP1V8_TOUCH
01005
3
8 20 29
120-OHM-210MA
L4202
MIPI_AP_TO_LCM_DATA1_N
29
56PF
PROX TO TOUCH INTERFACE
CRITICAL MIPI_AP_TO_LCM_DATA1_P
28
C4250
ROOM=KEPLER_B2B
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
IN
SPI_AP_TO_TOUCH_CS_CONN_L
ROOM=KEPLER_B2B
1 3
29 29
01005
C4251 1
C4232
3
1
29
FL4251
ROOM=KEPLER_B2B
5% 2 16V NP0-C0G 01005
C4213
L4201 65-OHM-0.1A-0.7-2GHZ SYM_VER-2
29
120-OHM-210MA
01005
56PF
CRITICAL
4
29
FL4252
TOUCH_TO_OWL_ACCEL_DATA_REQUEST_CONN
ROOM=KEPLER_B2B
3 29
ROOM=KEPLER_B2B
TAM0605
20 28
5% 2 16V NP0-C0G 01005
1
100K
3
BI
ROOM=KEPLER_B2B
C4231
5
TAM0605
8 20 29
5% 2 16V NP0-C0G 01005
ROOM=KEPLER_B2B
4
29 29
56PF
120-OHM-210MA
L4200 65-OHM-0.1A-0.7-2GHZ
IN
23
FL4232
CRITICAL
7
22
ROOM=KEPLER_B2B
01005
DISPLAY MIPI
IN
21
20
120-OHM-210MA
5% 2 16V NP0-C0G 01005
5% 2 35V NP0-C0G 01005
7
20
IN
29
ROOM=KEPLER_B2B
56PF
100PF
MIPI_AP_TO_LCM_DATA0_N
19
C4230
UART_OWL_TO_TOUCH_TXD_CONN
C4212
PP_LCM_BL_CAT2_CONN
2 ROOM=KEPLER_B2B
IN
18
FL4231
9
0201
7
17
ROOM=KEPLER_B2B
FL4213
MIPI_AP_TO_LCM_DATA0_P
IN
29
5% 2 16V NP0-C0G 01005
240OHM-350MA
IN
IN
56PF
ROOM=KEPLER_B2B
7
8
8
LCM_TO_OWL_BSYNC_CONN
ROOM=KEPLER_B2B
5% 2 35V NP0-C0G 01005
A
16
ROOM=KEPLER_B2B
100PF
MIPI_AP_TO_LCM_CLK_N
15
01005
01005
9
0201
IN
14
120-OHM-210MA
ROOM=KEPLER_B2B
7
29
OWL TO TOUCH INTERFACE
FL4212
IN
13
ROOM=KEPLER_B2B
240OHM-350MA
7
12
C4222
29
ROOM=KEPLER_B2B
MIPI_AP_TO_LCM_CLK_P
11
29
FL4250
5% 2 35V NP0-C0G 01005
1
10
120-OHM-210MA
100PF
PP_LCM_BL_CAT2
9
AP TO TOUCH INTERFACE
ROOM=KEPLER_B2B
120-OHM-210MA
0201
27
8
D
C
FL4230
FL4211
1
7
28
C4221
VIETMOBILE.VN
VOLTAGE=5.1V
ROOM=KEPLER_B2B
PP_LCM_BL_CAT1
6
IN
29
5% 2 16V NP0-C0G 01005
ROOM=KEPLER_B2B
PP5V1_TOUCH_VDDH_CONN
1
2
27
5
MAMBA_TO_LCM_MDRIVE_LCM_CONN NC_KEPLER_MESON_TEST_MUX2_CONN NC_KEPLER_MESON_TEST_MUX0_CONN SPI_AP_TO_TOUCH_SCLK_CONN TOUCH_TO_PROX_RX_EN_LCM_CONN PROX_TO_TOUCH_RX_LCM_CONN SPI_AP_TO_TOUCH_CS_CONN_L TOUCH_TO_OWL_ACCEL_DATA_REQUEST_CONN I2C2_AP_SDA I2C_TOUCH_BI_MAMBA_PROX_SDA SPI_TOUCH_TO_AP_MISO_CONN SPI_AP_TO_TOUCH_MOSI_CONN LCM_TO_OWL_BSYNC_CONN LCM_TO_CHESTNUT_PWR_EN_CONN PP5V1_TOUCH_VDDH_CONN AP_TO_TOUCH_RESET_CONN_L TOUCH_TO_PROX_TX_EN_CONN_L I2C2_AP_SCL I2C_TOUCH_TO_MAMBA_PROX_SCL UART_OWL_TO_TOUCH_TXD_CONN TOUCH_TO_AP_INT_L_CONN AP_TO_TOUCH_CLK32K_RESET_CONN_L
5% 2 16V NP0-C0G 01005
ROOM=KEPLER_B2B
B
4
100PF
0201
1
3
R4222
240OHM-350MA
PP_LCM_BL_ANODE
1
ROOM=KEPLER_B2B
29
VOLTAGE=1.8V
FL4210
27
29
2
100PF
ROOM=KEPLER_B2B
ROOM=KEPLER_B2B
BACKLIGHT
29
AP_TO_LCM_RESET_CONN_L
1% 1/32W MF 01005 2
5% 16V NP0-C0G 01005
2
2
1 ROOM=KEPLER_B2B
100PF
2.2UF
PP5V1_TOUCH_VDDH
29
1
ROOM=KEPLER_B2B
01005
R42201
FL4209
27
2
AP_TO_LCM_RESET_L
IN
240OHM-350MA 1
29
NC_KEPLER_PHOTON_PIFA_CONN LCM_TO_MAMBA_MSYNC_LCM_CONN PMU_TO_LCM_PANICB_CONN AP_TO_LCM_RESET_CONN_L PP5V7_MESON_AVDDH_CONN PP1V8_LCM_CONN PN5V7_LCM_MESON_AVDDN_CONN PP5V7_LCM_AVDDH_CONN PP1V8_TOUCH_CONN
120-OHM-210MA
100K
0201
MIPI_AP_TO_LCM_DATA0_CONN_N MIPI_AP_TO_LCM_DATA0_CONN_P
46
FL4221
5% 16V NP0-C0G 01005
1
MIPI_AP_TO_LCM_DATA1_CONN_N MIPI_AP_TO_LCM_DATA1_CONN_P
ROOM=KEPLER_B2B
ROOM=KEPLER_B2B
C4215
C4220
29
100PF
2
1
29
5% 2 16V NP0-C0G 01005
240OHM-350MA
2
29
100PF
FL4208
PP1V8_TOUCH
OUT
FL4220
5% 16V NP0-C0G 01005
2
29 28 20 14
29
ROOM=KEPLER_B2B
100PF
C
29
ROOM=KEPLER_B2B
C4207
1
ROOM=KEPLER_B2B
MIPI_AP_TO_LCM_CLK_CONN_N MIPI_AP_TO_LCM_CLK_CONN_P
C4224
5% 16V NP0-C0G 01005
PN5V7_LCM_MESON_AVDDN_CONN
01005
29
DISPLAY CONTROL SIGNALS
1
2
8 20 29
5% 2 16V NP0-C0G 01005
70-OHM-25%-0.28A
PP5V7_MESON_AVDDH
29
56PF
29
100PF
2.2UF
27
29 3
NOSTUFF
1
2
29 3
PP_LCM_BL_CAT1_CONN PP_LCM_BL_ANODE_CONN PP_LCM_BL_CAT2_CONN
ROOM=KEPLER_B2B
1
0201
PN5V7_LCM_MESON_AVDDN
29 3
I2C2_AP_SCL
ROOM=KEPLER_B2B
27
C4223
5% 2 16V NP0-C0G 01005
FL4205
PP1V8
45
56PF
5% 16V NP0-C0G 01005
2
F-ST-SM 8 20 29
NOSTUFF
240OHM-350MA 33 21 20 9 8 7 6 5 3 17 14 13 12
J4200
I2C2_AP_SDA
29
100PF
2.2UF
20% 6.3V X5R-CERM 2 0201
516S00038 (RCPT) 516S00037 (PLUG)
BM28P0.6-44DS-0.35V
1 0201
--->
CRITICAL
DISPLAY EEPROM I2C
FL4200
2 1
THIS ONE ON MLB
240OHM-350MA
PP5V7_LCM_AVDDH
1
DISPLAY CONNECTOR
DISPLAY & TOUCH FLEX DISPLAY POWER
2
3
3
2
BRANCH
PAGE
42 OF 49 SHEET
29 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
D
D
TRISTAR 2 (A3) APN:343S0695 PP3V0_TRISTAR
PP3V3_ACC
PP5V0_USB
3 17 31
15
3
33 31 27 19 15
1.0UF
C4501 0.1UF
20% 2 6.3V X5R 0201-1
20% 2 6.3V X5R-CERM 01005
ROOM=TRISTAR
33 31 27 24 16 15 14 12 8
D
PP1V8_SDRAM 1
ROOM=TRISTAR
Q4500
C4502 0.01UF
REVERSE_GATE
10% 2 6.3V X5R 01005
ROOM=TRISTAR
PLACE_NEAR=U2000.T5:8mm
R4510
16
OUT
6.34K2 1
TRISTAR_TO_PMU_USB_BRICK_ID 1
0.01UF
10% 2 6.3V X5R 01005
23
33 33
BI
L4521
BI BI BI
USB_AP_DATA_P
1
MIKEYBUS_DATA_P MIKEYBUS_DATA_N
C3 C4
USB_BB_DATA_P USB_BB_DATA_N
A1 B1
C2
TRISTAR_USB_BRICK_ID_R
15NH-250MA BI
2
0201
USB_AP_TRISTAR_DATA_P USB_AP_TRISTAR_DATA_N
A3 B3
UART_AP_TO_ACCESSORY_TXD UART_ACCESSORY_TO_AP_RXD
E2 E1
UART_AP_DEBUG_TXD UART_AP_DEBUG_RXD
F2 F1
ROOM=TRISTAR
L4522
15NH-250MA 5
BI
USB_AP_DATA_N
S
1
C
R4500
ROOM=TRISTAR
10K
CRITICAL
5% 1/32W MF 2 01005
ROOM=TRISTAR
DIG_DP
WLCSP
P_IN F6 ACC1 C5 ACC2 E5
PP_TRISTAR_PIN PP_TRISTAR_ACC1 PP_TRISTAR_ACC2
VOLTAGE=5.0V VOLTAGE=4.3V VOLTAGE=4.3V
VIETMOBILE.VN 23
PLACE_NEAR=U2000.T5:8mm
5
CRITICAL
CBTL1610A3UK
ROOM=PMU
ROOM=PMU
0402
U4500
1% 1/32W MF 01005
C4510
CSD68822F4
G
ROOM=TRISTAR
VDD_1V8 F3
C
1
2
1
ACC_PWR D5
C4500
VDD_3V0 F4
1
1
8
IN
8
OUT
2 33 8
IN
33 8
OUT
0201
ROOM=TRISTAR
NC OUT
5
BI
A5 B5
SWD_DOCK_TO_AP_SWCLK SWD_DOCK_BI_AP_SWDIO
USB1_DP USB1_DN
BRICK_ID USB0_DP USB0_DN
DP1 A2 DN1 B2
TRISTAR_DP1_CONN_P TRISTAR_DP1_CONN_N
DP2 A4 DN2 B4
TRISTAR_DP2_CONN_P TRISTAR_DP2_CONN_N
CON_DET_L E3
UART0_TX UART0_RX
POW_GATE_EN* D6
UART1_TX UART1_RX
SWITCH_EN E4 HOST_RESET B6
UART2_TX UART2_RX
SDA SCL INT BYPASS
JTAG_CLK JTAG_DIO
D3 D4 C6 E6
TRISTAR_CON_DETECT_L
TRISTAR_TO_TIGRIS_VBUS_OFF PMU_TO_OWL_ACTIVE_READY TRISTAR_TO_PMU_HOST_RESET
I2C1_AP_SDA I2C1_AP_SCL TRISTAR_TO_AP_INT TRISTAR_BYPASS
DVSS DVSS DVSS
B
5
D2 D1
DIG_DN
3 31
1
3 31
C4503 1UF
BI
3 31
BI
3 31
BI
3 31
BI
3 31
IN
OUT IN
OUT IN BI OUT
20% 2 16V CER-X5R 0201 ROOM=TRISTAR
3 31
17 30
5 9 16 27 16
8 17 25 26 33 8 17 25 26 33 8 16
B 1
C4504 1.0UF
F5 C1 A6
20% 2 6.3V X5R 0201-1
ROOM=TRISTAR
ROOM=TRISTAR 30 17
A
TRISTAR_TO_TIGRIS_VBUS_OFF
P3MM-NSM SM 1
PP4500
PP
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
I/O:TRISTAR 2 DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
A.0.0 BRANCH
PAGE
45 OF 49 SHEET
30 OF 59
1
SIZE
D
A
8
7
6
5
ANTENNA
THIS ONE ON MLB
33 30 27 19 15
PP3V0_TRISTAR
2
1
5% 1/32W MF 01005
2
FL4621
120-OHM-210MA
FL4600
BI
33 30 27 24 16 15 14 12 8
FERR-33-OHM-0.8A-0.09-OHM 1 2 CODEC_TO_HPHONE_HS3 CODEC_TO_HPHONE_HS3_CONN 0201
DZ4600
1
ROOM=DOCK_B2B
6.8V-100PF 01005 ROOM=DOCK_B2B
2
NO_XNET_CONNECTION=1
1
1
DZ4601
6.8V-100PF 01005
ROOM=DOCK_B2B 2 NO_XNET_CONNECTION=1
23
OUT
0201
1
01005
IN
RFFE5_BB_TO_ANT_SCLK
31
1 0% MF 01005 1/32W ROOM=DOCK_B2B
220PF
10% 2 10V X7R-CERM 01005
1
33
BI
RFFE5_BB_TO_ANT_DATA
0.00
1 2 0% MF 01005 1/32W ROOM=DOCK_B2B
31
RFFE5_BB_TO_ANT_DATA_CONN 1
C4623
1
33
IN
BB_LAT_GPIO1
1
BB_LAT_GPIO1_CONN
2
1
LOWER MIC1/4
31
1
ROOM=DOCK_B2B
8
1
C4697 220PF
10% 2 10V X7R-CERM 01005
BI
31
AP_TO_HP_HS3_CTRL
1
2
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
43
44
31 26 31 31 31 31 31
CODEC_TO_HPHONE_HS3_CONN LOWERMIC1_TO_CODEC_AIN1_CONN_P PP_TRISTAR_ACC1_CONN
31 31 31
TRISTAR_DP1_CONN_P TRISTAR_DP1_CONN_N TRISTAR_DP2_CONN_N TRISTAR_DP2_CONN_P PP_TRISTAR_ACC2_CONN PP_CODEC_TO_LOWERMIC4_BIAS_CONN LOWERMIC4_TO_CODEC_AIN2_CONN_P
BI
3 30
BI
3 30
BI
3 30
BI
3 30
31 31 31
DZ4610
1
C4696 220PF
10% 2 10V X7R-CERM 01005
C
01005
PP5V0_USB VOLTAGE=5.0V
NOSTUFF
C4650 1
C4651 1
C4652 1
10% 25V 2 X5R 0201
10% 25V 2 X5R 0201
10% 25V 2 X5R 0201
0.1UF
AP_TO_HP_HS3_CTRL_CONN
31
0.1UF
ROOM=DOCK_B2B
ROOM=DOCK_B2B
0.1UF
ROOM=DOCK_B2B
C4654
DEFAULT_CAPACITOR_220.000000pF_2_1 1
100PF
5% 35V NP0-C0G 2 01005
ROOM=DOCK_B2B
C4653
2
56PF
5% 25V NP0-C0G-CERM 2 01005 ROOM=DOCK_B2B
VIETMOBILE.VN 5% 2 16V NP0-C0G 01005
IN
AP_TO_HP_HS4_CTRL
1
2
AP_TO_HP_HS4_CTRL_CONN
01005
31
1
30 3
C4607
OUT
TRISTAR_CON_DETECT_L
5% 2 16V NP0-C0G 01005
01005
FL4630
30 3
31
25
OUT
SPEAKER_TO_SPEAKERAMP_VSENSE_P
2
1 01005
C4610
31
25
OUT
SPEAKER_TO_SPEAKERAMP_VSENSE_N
2 01005
C4612
ROOM=DOCK_B2B
31
26
VOLTAGE=2.86V
OUT
SOLENOID_TO_ARC_DRIVER_VSENSE_P
2
31
1
26
OUT
SOLENOID_TO_ARC_DRIVER_VSENSE_N
2
31
C4642
1
100PF
5% 16V NP0-C0G 01005
ROOM=DOCK_B2B
31 26
SOLENOID_TO_ARC_DRIVER_VSENSE_CONN_P 1
ARC_DRIVER_TO_SOLENOID_OUT_POS 100PF
C4632
ROOM=DOCK_B2B 31 26
ARC_DRIVER_TO_SOLENOID_OUT_NEG
C4637
1
SOLENOID_TO_ARC_DRIVER_VSENSE_CONN_N
1
5% 2 16V NP0-C0G 01005
5% 16V NP0-C0G 01005
2
ROOM=DOCK_B2B
ROOM=DOCK_B2B
C4636
1
31
100PF
01005
C4613
VOLTAGE=4.3V
2
C4631 ROOM=DOCK_B2B
FL4633
LOWERMIC4_TO_CODEC_AIN2_CONN_P
PP_TRISTAR_ACC2_CONN
2
31
5% 2 16V NP0-C0G 01005
56PF
FL4614
1
120-OHM-210MA 1
ROOM=DOCK_B2B
PP_TRISTAR_ACC2
B
ROOM=DOCK_B2B
5% 2 16V NP0-C0G 01005
5% 2 16V NP0-C0G 01005
1
5% 16V NP0-C0G 01005
10-OHM-1.1A
SPEAKER_TO_SPEAKERAMP_VSENSE_CONN_N
ROOM=DOCK_B2B
ROOM=DOCK_B2B
100PF
2
30 3
31
C4641
1
100PF
01005
120-OHM-210MA
VOLTAGE=4.3V
FL4642
120-OHM-210MA
100PF
01005
PP_TRISTAR_ACC1_CONN
2
ROOM=DOCK_B2B
1
FL4632
ROOM=DOCK_B2B
1
FL4613
1
01005
ROOM=DOCK_B2B
PP_CODEC_TO_LOWERMIC1_BIAS_CONN
5% 2 16V NP0-C0G 01005 ROOM=DOCK_B2B
C4630 ROOM=DOCK_B2B
1
C4640
10-OHM-1.1A
100PF
FL4631
C4611
120-OHM-210MA 01005
PP_TRISTAR_ACC1
31
27PF
ROOM=DOCK_B2B
120-OHM-210MA 1
1
ROOM=DOCK_B2B
31
5% 2 16V NP0-C0G 01005
5% 2 16V NP0-C0G 01005
1
SPEAKER_TO_SPEAKERAMP_VSENSE_CONN_P
ROOM=DOCK_B2B
LOWERMIC1_TO_CODEC_AIN1_CONN_N
TRISTAR_CON_DETECT_CONN_L
01005
1
56PF
FL4612
1/32W 2 1 5% MF 1.00K 01005
FL4641
ROOM=DOCK_B2B
ROOM=DOCK_B2B
ROOM=DOCK_B2B
ROOM=DOCK_B2B
5% 2 16V NP0-C0G 01005
1
5% 35V NP0-C0G 2 01005
R4640
31
100PF
120-OHM-210MA 2
10% 25V X7R-CERM 2 0201 ROOM=DOCK_B2B
1
100PF
120-OHM-210MA
56PF
FL4611
C4656
TRISTAR
ROOM=DOCK_B2B
FL4607
LOWERMIC1_TO_CODEC_AIN1_CONN_P 1
1
220PF
120-OHM-210MA
1 ROOM=DOCK_B2B
C4655
100PF
SPEAKER/ARC
01005
1
C4606
1
ROOM=DOCK_B2B
120-OHM-210MA
OUT
30 17 3
ROOM=DOCK_B2B
FL4610
2
4
25 31
C4624
ROOM=DOCK_B2B
2
3
D
SPEAKERAMP_TO_SPEAKER_OUT_NEG SPEAKER_TO_SPEAKERAMP_VSENSE_CONN_N ARC_DRIVER_TO_SOLENOID_OUT_NEG SOLENOID_TO_ARC_DRIVER_VSENSE_CONN_N CODEC_TO_HPHONE_L_CONN CODEC_TO_HPHONE_R_CONN CODEC_TO_HPHONE_HS4_CONN
31
5% 2 16V NP0-C0G 01005
CODEC_TO_HPHONE_R_CONN
ROOM=DOCK_B2B 2 NO_XNET_CONNECTION=1
B
2
01005
8
6.8V-100PF 01005
LOWERMIC1_TO_CODEC_AIN1_P
1
46
ROOM=DOCK_B2B
ROOM=DOCK_B2B
LOWERMIC4_TO_CODEC_AIN2_P
OUT 31
56PF
CODEC_TO_HPHONE_L_CONN
DZ4604
FERR-33-OHM-0.8A-0.09-OHM 1 2 CODEC_TO_HPHONE_R 0201
23
24
FL4624
FL4605
PP_CODEC_TO_LOWERMIC1_BIAS
31
42
ROOM=DOCK_B2B
ROOM=DOCK_B2B
24
31 31
120-OHM-210MA
ROOM=DOCK_B2B 2 NO_XNET_CONNECTION=1
LOWERMIC1_TO_CODEC_AIN1_N
31
5% 2 16V NP0-C0G 01005
DZ4603
6.8V-100PF 01005
OUT
31
56PF
DZ4602
FERR-33-OHM-0.8A-0.09-OHM 1 2 CODEC_TO_HPHONE_L ROOM=DOCK_B2B
23
31
FL4606
0201
OUT
OUT
R4623
FL4604
23
24
31
ROOM=DOCK_B2B 2 NO_XNET_CONNECTION=1
IN
C4622 ROOM=DOCK_B2B
6.8V-100PF 01005
23
31 31
5% 2 16V NP0-C0G 01005
C4698
600-OHM-25%-0.28A-0.75OHM 1 2 CODEC_TO_HPHONE_HS3_REF_CONN CODEC_TO_HPHONE_HS3_REF 0201
IN
1
31
SPEAKERAMP_TO_SPEAKER_OUT_POS SPEAKER_TO_SPEAKERAMP_VSENSE_CONN_P ARC_DRIVER_TO_SOLENOID_OUT_POS SOLENOID_TO_ARC_DRIVER_VSENSE_CONN_P AP_TO_HP_HS4_CTRL_CONN HPHONE_TO_CODEC_DETECT_CONN CODEC_TO_HPHONE_HS4_REF_CONN AP_TO_HP_HS3_CTRL_CONN CODEC_TO_HPHONE_HS3_REF_CONN LOWERMIC1_TO_CODEC_AIN1_CONN_N PP_CODEC_TO_LOWERMIC1_BIAS_CONN LOWERMIC1_BIAS_FILT_RET RFFE5_BB_TO_ANT_DATA_CONN PP1V8_LAT_CONN TRISTAR_CON_DETECT_CONN_L RFFE5_BB_TO_ANT_SCLK_CONN BB_LAT_GPIO1_CONN PP3V0_LAT_CONN LOWERMIC4_BIAS_FILT_RET LOWERMIC4_TO_CODEC_AIN2_CONN_N
41
120-OHM-210MA
ROOM=DOCK_B2B
23
RFFE5_BB_TO_ANT_SCLK_CONN 56PF
31
FL4603
OUT
31 31
0.00 2
ROOM=DOCK_B2B 2 NO_XNET_CONNECTION=1
23
31 31
R4622
6.8V-100PF 01005
C
31
ROOM=DOCK_B2B
10% 2 10V X7R-CERM 01005
1
31 26
C4621
1
220PF
600-OHM-25%-0.28A-0.75OHM 1 2 CODEC_TO_HPHONE_HS4_REF_CONN CODEC_TO_HPHONE_HS4_REF ROOM=DOCK_B2B
VOLTAGE=1.8V
5% 2 16V NP0-C0G 01005
ROOM=DOCK_B2B
FL4602
VOLTAGE=1.8V
31
31
100PF
33
0201
PP1V8_LAT_CONN
1
C4699
FERR-33-OHM-0.8A-0.09-OHM 1 2 CODEC_TO_HPHONE_HS4 CODEC_TO_HPHONE_HS4_CONN ROOM=DOCK_B2B
2
31
FL4601
BI
PP1V8_SDRAM
31 25
ROOM=DOCK_B2B
ROOM=DOCK_B2B
23
45
ROOM=DOCK_B2B
5% 2 16V NP0-C0G 01005 ROOM=DOCK_B2B
23
F-ST-SM
5% 16V NP0-C0G 01005
56PF
ROOM=DOCK_B2B
D
J4600 24-5859-040-XXX-829
100PF
31
C4600
1
31
VOLTAGE=3.0V
C4620
1
ROOM=DOCK_B2B
HPHONE_TO_CODEC_DETECT_CONN
516S00033 (RCPT) 516S00034 (PLUG)
ROOM=DOCK_B2B
PP3V0_LAT_CONN
01005
3.3K 2
1
CRITICAL
1
R4600 HPHONE_TO_CODEC_DETECT
--->
FL4620
120-OHM-210MA
AUDIO JACK OUT
2
3
DOCK FLEX CONNECTOR
DOCK FLEX CONNECTOR 23
4
1
100PF
31
C4633
5% 16V NP0-C0G 01005
2
100PF
ROOM=DOCK_B2B
5% 2 16V NP0-C0G 01005
ROOM=DOCK_B2B
ROOM=DOCK_B2B
120-OHM-210MA
A
23
OUT
LOWERMIC4_TO_CODEC_AIN2_N
2
LOWERMIC4_TO_CODEC_AIN2_CONN_N
1
31 31 25
01005
1
ROOM=DOCK_B2B
SPEAKERAMP_TO_SPEAKER_OUT_POS
SYNC_MASTER=N/A
C4614
PAGE TITLE
1
56PF
5% 2 16V NP0-C0G 01005
FL4615
24
PP_CODEC_TO_LOWERMIC4_BIAS
2
1 01005 ROOM=DOCK_B2B
I/O:DOCK FLEX B2B
C4634 220PF
10% 2 10V X7R-CERM 01005
ROOM=DOCK_B2B
120-OHM-210MA
DRAWING NUMBER
Apple Inc.
ROOM=DOCK_B2B
PP_CODEC_TO_LOWERMIC4_BIAS_CONN 1
C4615
31
31 25
SPEAKERAMP_TO_SPEAKER_OUT_NEG
VOLTAGE=2.86V
NOTICE OF PROPRIETARY PROPERTY: 1
100PF
C4635
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
220PF
10% 2 10V X7R-CERM 01005
ROOM=DOCK_B2B
ROOM=DOCK_B2B
7
6
051-1902 REVISION
R
5% 2 16V NP0-C0G 01005
8
SYNC_DATE=N/A
5
4
3
2
A.0.0 BRANCH
PAGE
46 OF 49 SHEET
31 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
BUTTON FLEX BUTTON FLEX CONNECTOR THIS ONE ON MLB
--->
516S00058 (RCPT) 516S00059 (PLUG)
FL4700
D
D
120-OHM-210MA 24
2
PP_CODEC_TO_REARMIC2_BIAS
1
PP_CODEC_TO_REARMIC2_BIAS_CONN
32
ROOM=BUTTON_B2B
VOLTAGE=2.86V
01005
CRITICAL
C4700
1
ROOM=BUTTON_B2B
J4700
100PF
5% 2 16V NP0-C0G 01005
505066-1210 F-ST-SM 13
ROOM=BUTTON_B2B
MIC2 ANC REF MIC
FL4701
32
120-OHM-210MA 23
OUT
2
REARMIC2_TO_CODEC_AIN3_P
32
1
REARMIC2_TO_CODEC_AIN3_CONN_P
32
32
01005
32
ROOM=BUTTON_B2B
1
C4701
32
56PF
32
5% 2 16V NP0-C0G 01005 ROOM=BUTTON_B2B
32 22
BUTTON_VOL_DOWN_CONN_L BUTTON_VOL_UP_CONN_L BUTTON_RINGER_A_CONN PP_CODEC_TO_REARMIC2_BIAS_CONN REARMIC2_TO_CODEC_AIN3_CONN_P REARMIC2_TO_CODEC_AIN3_CONN_N
14
1
2
3
4
5
6
7
8
9
10
11
12
15
16
LED_MODULE_NTC_CONN BUTTON_HOLD_KEY_CONN_L
32 32
PP_LED_DRIVER_COOL_LED
22 32
PP_LED_DRIVER_WARM_LED
FL4702
120-OHM-210MA 23
OUT
2
REARMIC2_TO_CODEC_AIN3_N
1
REARMIC2_TO_CODEC_AIN3_CONN_N
32
01005 1
ROOM=BUTTON_B2B
C4702 56PF
5% 2 16V NP0-C0G 01005 ROOM=BUTTON_B2B
C
C
PP_LED_DRIVER_WARM_LED
VIETMOBILE.VN
22 32
C4724
1
C4723 1
27PF
100PF
5% 2 16V NP0-C0G 01005
5% 16V 2 NP0-C0G 01005
ROOM=BUTTON_B2B
ROOM=BUTTON_B2B
R4710 33 16 9 8
OUT
BUTTON_HOLD_KEY_L
1
C4710
PP_LED_DRIVER_COOL_LED
0.00 2
BUTTON_HOLD_KEY_CONN_L
0% 1/32W MF 01005
1
27PF
5% 6.3V 2 NP0-C0G 0201
STROBE: WARM LED COOL LED MODULE NTC
32
1
DZ4710
ROOM=BUTTON_B2B
5.5V-6.2PF
C4721 1
1
100PF
C4722 27PF
5% 16V NP0-C0G 2 01005
0201
ROOM=BUTTON_B2B
22 32
5% 2 16V NP0-C0G 01005
ROOM=BUTTON_B2B
ROOM=BUTTON_B2B
ROOM=BUTTON_B2B
2
SOUTH_AC_GND_SCREW
B
B
4 32
FL4720
120-OHM-210MA 22
OUT
FL4711 33 16 8
OUT
BUTTON_RINGER_A
R47201
2
BUTTON_RINGER_A_CONN
51.1K
1% 1/32W MF 01005 2
32
01005
C4711 1
2
LED_MODULE_NTC_CONN
32
01005
120-OHM-210MA 1
1
LED_MODULE_NTC
1
ROOM=BUTTON_B2B
ROOM=BUTTON_B2B
27PF
ROOM=BUTTON_B2B
1
C4720 100PF
5% 2 16V NP0-C0G 01005
ROOM=BUTTON_B2B
DZ4711
5% 6.3V NP0-C0G 2 0201
5.5V-6.2PF 0201
ROOM=BUTTON_B2B
ROOM=BUTTON_B2B
2
BUTTONS: HOLD RINGER VOL UP/DOWN
SOUTH_AC_GND_SCREW
4 32
FL4712
120-OHM-210MA 33 16 8
OUT
1
BUTTON_VOL_DOWN_L
2 01005
C4712 1
ROOM=BUTTON_B2B
BUTTON_VOL_DOWN_CONN_L
32
DZ4712
1
100PF
12V-33PF 01005-1
5% 16V 2 NP0-C0G 01005
2
ROOM=BUTTON_B2B
SOUTH_AC_GND_SCREW
ROOM=BUTTON_B2B
4 32
FL4713
A
120-OHM-210MA 33 16 8
OUT
1
BUTTON_VOL_UP_L
01005
C4713 1
SYNC_MASTER=N/A
2 ROOM=BUTTON_B2B
BUTTON_VOL_UP_CONN_L 1
ROOM=BUTTON_B2B
PAGE TITLE
32
I/O:BUTTON FLEX B2B
DZ4713
12V-33PF 01005-1
100PF
5% 16V NP0-C0G 2 01005
SYNC_DATE=N/A
2
DRAWING NUMBER
ROOM=BUTTON_B2B
SOUTH_AC_GND_SCREW
Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
7
6
REVISION
R
4 32
NOTICE OF PROPRIETARY PROPERTY:
8
051-1902
5
4
3
2
A.0.0 BRANCH
PAGE
47 OF 49 SHEET
32 OF 59
1
SIZE
D
A
8
7
6
5
4
2
3
1
BASEBAND, WLAN, BT & STOCKHOLM I456
RADIO_MLB_MIMO
D
D
SHARED POWER 28 27 26 25 24 22 21 17 15 14 31 30 27 19 15 31 30 27 24 16 15 14 12 8
PP_VCC_MAIN PP3V0_TRISTAR PP1V8_SDRAM
PP_VCC_MAIN PP3V0_TRISTAR PP1V8_SDRAM
SUBDESIGN_SUFFIX=RF
BASEBAND 6
IN
6
IN
6
OUT
6
OUT
6
IN
6
IN
6 6 16
C
OUT IN
8
IN
8
IN
8
IN
8
OUT
8
IN
16
IN
8
IN
8
OUT
27 22
OUT IN
8
IN
8
IN
8 29 9 8 9 9
30 30 16
13 9 9
B
BI
8
8
MIS-NAMED NET. GPS_TIME_MARK ACTUALLY GOES FROM AP TO BB.
IN
PCIE_AP_TO_BB_TXD_P PCIE_AP_TO_BB_TXD_N PCIE_BB_TO_AP_RXD_P PCIE_BB_TO_AP_RXD_N PCIE_AP_TO_BB_REFCLK_P PCIE_AP_TO_BB_REFCLK_N
PCIE0_AP_TO_BB_TX_P PCIE0_AP_TO_BB_TX_N PCIE0_BB_TO_AP_TX_P PCIE0_BB_TO_AP_TX_N PCIE0_AP_TO_BB_REFCLK_P PCIE0_AP_TO_BB_REFCLK_N
PCIE_AP_TO_BB_RESET_L PCIE_BB_BI_AP_CLKREQ_L BB_TO_PMU_PCIE_HOST_WAKE_L AP_TO_BB_PCIE_DEV_WAKE
PCIE0_AP_TO_BB_PERST_L PCIE0_AP_TO_BB_CLKREQ_L PCIE0_BB_TO_PMU_HOST_WAKE_L PCIE0_AP_TO_BB_DEV_WAKE
I2S_AP_TO_BB_LRCLK I2S_AP_TO_BB_BCLK I2S_AP_TO_BB_DOUT I2S_BB_TO_AP_DIN
I2S_AP_TO_BB_WS I2S_AP_TO_BB_CLK I2S_AP_TO_BB_TX I2S_BB_TO_AP_TX
AP_TO_BB_RADIO_ON_L PMU_TO_BB_PMIC_RESET_L AP_TO_BB_RESET_L BB_TO_AP_RESET_DETECT_L BB_TO_LED_DRIVER_GSM_BURST_IND AP_TO_BB_MESA_UP_L BB_TO_AP_GPS_TIME_MARK AP_TO_BB_COREDUMP BB_IPC_GPIO LCM_TO_OWL_BSYNC UART_OWL_TO_BB_TXD UART_BB_TO_OWL_RXD
AP_TO_BBPMU_RADIO_ON_L PMU_TO_BBPMU_RESET_L AP_TO_BB_RST_L BB_TO_AP_RESET_DET_L BB_TO_AP_GSM_TXBURST_IND
IN IN
OUT
BI BI
IN
IN
BI
OUT
31
BI
31
OUT
16
OUT
16
OUT
16
OUT
16
OUT
4
OUT
4
OUT
4
OUT
A
IN IN OUT
OUT
27 16 8
BI
27 16 8
BI
30 26 25 17 8
BI
30 26 25 17 8
BI
32 16 9 8
OUT
28 16 9 8
OUT
32 16 8
OUT
32 16 8
OUT
32 16 8
IN
6
IN
6
PCIE_WLAN_TO_AP_TX_P PCIE_WLAN_TO_AP_TX_N
PCIE_WLAN_TO_AP_RXD_P PCIE_WLAN_TO_AP_RXD_N
OUT
6
OUT
6
IN
6
IN
6
IN
6
IN
8
PCIE_AP_TO_WLAN_REFCLK_P PCIE_AP_TO_WLAN_REFCLK_N PCIE_AP_TO_WLAN_PERST_L
PCIE_AP_TO_WLAN_DEV_WAKE PCIE_WLAN_TO_AP_CLKREQ_L
PCIE_AP_TO_WLAN_REFCLK_P PCIE_AP_TO_WLAN_REFCLK_N PCIE_AP_TO_WLAN_RESET_L PCIE_AP_TO_WLAN_DEV_WAKE PCIE_WLAN_TO_AP_CLKREQ_L
UART4_AP_TO_WLAN_TX UART4_AP_TO_WLAN_RTS_L UART4_WLAN_TO_AP_TX UART4_WLAN_TO_AP_RTS_L
UART_AP_TO_WLAN_TXD UART_AP_TO_WLAN_RTS_L UART_WLAN_TO_AP_RXD UART_WLAN_TO_AP_CTS_L
PMU_TO_WLAN_32K_CLK PMU_TO_WLAN_REG_ON WLAN_TO_PMU_HOST_WAKE
PMU_TO_WLAN_CLK32K PMU_TO_WLAN_REG_ON WLAN_TO_PMU_HOST_WAKE
OWL_TO_WLAN_CONTEXT_A OWL_TO_WLAN_CONTEXT_B
OWL_TO_WLAN_CONTEXT_A OWL_TO_WLAN_CONTEXT_B
BI
USB_BB_DATA_P USB_BB_DATA_N PMU_TO_BB_USB_VBUS_DETECT SWD_AP_PERIPHERAL_SWCLK SWD_AP_BI_BB_SWDIO RFFE5_BB_TO_ANT_SCLK RFFE5_BB_TO_ANT_DATA BB_LAT_GPIO1 BB_TO_PMU_AMUX_LDO11_SIM1 BB_TO_PMU_AMUX_SMPS1 BB_TO_PMU_AMUX_SMPS3 BB_TO_PMU_AMUX_SMPS4
50_AP_UAT_FEED 50_AP_WIFI_5G_CONN_ANT AP_TO_STOCKHOLM_ANT
OUT
30 8
IN
30 8
OUT
PP1V8 DFU_STATUS FORCE_DFU NC_PMU_AMUX_AY NC_PMU_AMUX_BY PMU_TO_SYSTEM_COLD_RESET_L I2C0_AP_SCL I2C0_AP_SDA I2C1_AP_SCL I2C1_AP_SDA BUTTON_HOLD_KEY_L BUTTON_MENU_KEY_L BUTTON_RINGER_A BUTTON_VOL_DOWN_L BUTTON_VOL_UP_L NC_PMU_GPIO20 NC_PMU_GPIO21 UART_AP_DEBUG_TXD UART_AP_DEBUG_RXD NC_AP_RESERVED2
6
IN
8
IN
8
OUT
8
OUT
8
IN
16
IN
16
OUT
16
C
IN
9
IN
9
TOUCH_TO_BBPMU_FORCE_PWM
UART0_OWL_TO_BB_TX UART0_BB_TO_OWL_TX
BLUETOOTH
USB_BB_P USB_BB_N USB_BB_VBUS_DETECT
SWD_CLK_BB_JTAG_TCK SWD_IO_BB_JTAG_TMS
75_RFFE5_SCLK_BB 75_RFFE5_SDATA_BB RFFE_BUFFER_LAT_GPIO1
BB_TO_PMU_AMUX_LDO11_SIM1 BB_TO_PMU_AMUX_SMPS1 BB_TO_PMU_AMUX_SMPS3 BB_TO_PMU_AMUX_SMPS4
50_UPPER_ANT_FEED 50_WIFI_5G_CONN_ANT
I2S_AP_TO_BT_LRCK I2S_AP_TO_BT_BCLK I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DOUT
I2S_AP_TO_BT_LRCLK I2S_AP_TO_BT_BCLK I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DIN
UART1_AP_TO_BT_TX UART1_AP_TO_BT_RTS_L UART1_BT_TO_AP_TX UART1_BT_TO_AP_RTS_L
UART_AP_TO_BT_TXD UART_AP_TO_BT_RTS_L UART_BT_TO_AP_RXD UART_BT_TO_AP_CTS_L
PMU_TO_BT_REG_ON BT_TO_PMU_HOST_WAKE AP_TO_BT_WAKE
PMU_TO_BT_REG_ON BT_TO_PMU_HOST_WAKE AP_TO_BT_WAKE
PP1V8 DFU_STATUS
IN
8
IN
8
IN
8
OUT
8
IN
8
IN
8
OUT
8
OUT
8
IN
16
OUT
16
IN
8
IN
8
IN
8
OUT
8
OUT
8
B
STOCKHOLM UART3_AP_TO_STOCKHOLM_TXD UART3_AP_TO_STOCKHOLM_RTS_L UART3_STOCKHOLM_TO_AP_TXD UART3_STOCKHOLM_TO_AP_RTS_L
UART_AP_TO_STOCKHOLM_TXD UART_AP_TO_STOCKHOLM_RTS_L UART_STOCKHOLM_TO_AP_RXD UART_STOCKHOLM_TO_AP_CTS_L
PMU_TO_STOCKHOLM_EN STOCKHOLM_TO_PMU_HOST_WAKE AP_TO_STOCKHOLM_DEV_WAKE AP_TO_STOCKHOLM_FW_DWLD_REQ
PMU_TO_STOCKHOLM_EN STOCKHOLM_TO_PMU_HOST_WAKE AP_TO_STOCKHOLM_DEV_WAKE AP_TO_STOCKHOLM_DWLD_REQUEST
STOCKHOLM_ANT
AP DEBUG
16 9 5 3
PCIE_AP_TO_WLAN_TXD_P PCIE_AP_TO_WLAN_TXD_N
AP_TO_BB_MESA_ON_L
BB_TO_AP_GPS_TIME_MARK AP_TO_BB_COREDUMP_TRIG AP_TO_BB_IPC_GPIO
ANT
8 3
PCIE_AP_TO_WLAN_TX_P PCIE_AP_TO_WLAN_TX_N
VIETMOBILE.VN IN
31
21 20 17 14 13 12 9 8 7 6 5 3 29 8 3
WLAN
IN
16
OUT
16
IN
8
IN
7
FORCE_DFU PMU_AMUX_AY PMU_AMUX_BY PMU_TO_SYSTEM_COLD_RESET_L I2C0_AP_SCL I2C0_AP_SDA I2C1_AP_SCL I2C1_AP_SDA BUTTON_HOLD_KEY_L BUTTON_MENU_KEY_L BUTTON_RINGER_A BUTTON_VOL_DOWN_L
A
BUTTON_VOL_UP_L PMU_GPIO20
PAGE TITLE
BASEBAND:RADIO SYMBOL
PMU_GPIO21
DRAWING NUMBER AP_RESERVED0
Apple Inc.
AP_RESERVED1 AP_RESERVED2
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
7
6
5
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
8
051-1902
4
3
2
A.0.0 BRANCH
PAGE
49 OF 49 SHEET
33 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
D
1
REV
ECN
CK APPD
DESCRIPTION OF REVISION
DATE A
N71 RADIO_MLB_MIMO - PVT JULY 07, 2015 QTY
DESCRIPTION
PRODUCTION RELEASED
2015-07-21
D
ROW/RF2 HB PAD MATCHING BOM OPTIONS PART#
0004536627
LB PAD TABLE_5_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
PDF PAGE 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 TABLE_TABLEOFCONTENTS_HEAD
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
C
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
B
TABLE_TABLEOFCONTENTS_ITEM
CSA PAGE 2 3 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51
CONTENTS ELNA & UAT ANT FEED FE: ANT CONNECTORS AND UAT TUNER DEBUG CONN & TEST POINTS CELLULAR BASEBAND: POWER1 CELLULAR BASEBAND: POWER2 CELLULAR BASEBAND: CONTROL AND INTERFACES CELLULAR BASEBAND: GPIOS CELLULAR PMU: CONTROL AND CLOCKS CELLULAR PMU: SWITCHERS AND LDOS CELLULAR PMU: ET MODULATOR CELLULAR TRANSCEIVER: POWER CELLULAR TRANSCEIVER: PRX PORTS CELLULAR TRANSCEIVER: DRX/GPS PORTS CELLULAR TRANSCEIVER: TX PORTS CELLULAR FRONT END: LB PAD CELLULAR FRONT END: MB PAD CELLULAR FRONT END: HB PAD CELLULAR FRONT END: 2G PA CELLULAR FRONT END: LB ASM CELLULAR FRONT END: MB-HB ASM CELLULAR FRONT END: DIVERSITY SIM WIFI/BT: WIFI/BT MODULE STOCKHOLM
152S1907
1
3.3NH, INDUCTOR
L4105_RF
ROW
152S1990
1
3.0NH, INDUCTOR
L4105_RF
RF2
131S0377
1
1.2PF, CAPACITOR
C4108_RF
RF2
152S2007
1
8.2NH, INDUCTOR
L4401_RF
ROW
131S0426
1
22PF, CAPACITOR
C4405_RF
ROW
152S2001
1
2.4NH, INDUCTOR
C4405_RF
RF2
131S0631
1
0.3PF, CAPACITOR
L4406_RF
RF2
TABLE_5_ITEM
353S00461
1
IC,PWR AMP,LB_PAD,SKWS
ULBPA_RF
ROW
353S00461
1
IC,PWR AMP,LB_PAD,SKWS
ULBPA_RF
RF2
353S00461
1
IC,PWR AMP,LB_PAD,SKWS
ULBPA_RF
RFC
353S00541
1
IC,PWR AMP,LB_PAD,PT
ULBPA_RF
DARWIN
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
MB PAD TABLE_5_HEAD
TABLE_5_ITEM
152S2044
1
2.2NH, INDUCTOR
C4406_RF
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
ROW TABLE_5_ITEM
TABLE_5_ITEM
152S2021
1
1.5NH, INDUCTOR
C4406_RF
353S4495
1
IC,PWR AMP,MB_PAD
UMBPA_RF
ROW
353S4495
1
IC,PWR AMP,MB_PAD
UMBPA_RF
RF2
353S4495
1
IC,PWR AMP,MB_PAD
UMBPA_RF
RFC
353S00477
1
IC,PWR AMP,MB_PAD, PT
UMBPA_RF
DARWIN
RF2 TABLE_5_ITEM
TABLE_5_ITEM
131S0631
1
0.3PF, CAPACITOR
L4407_RF
ROW TABLE_5_ITEM
TABLE_5_ITEM
152S2056
1
5.6NH, INDUCTOR
L4403_RF
ROW TABLE_5_ITEM
TABLE_5_ITEM
131S0429
1
8.2PF, CAPACITOR
C4407_RF
ROW
152S2036
1
2.5NH, INDUCTOR
C4407_RF
RF2
131S0631
1
0.3PF, CAPACITOR
L4408_RF
RF2
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
152S00143
1
15NH, INDUCTOR
L4404_RF
ROW
C
RFC HB PAD MATCHING BOM OPTIONS
TABLE_5_ITEM
131S0823
1
33PF, CAPACITOR
C4408_RF
ROW
152S2051
1
1.3NH, INDUCTOR
C4408_RF
RF2
152S2042
1
1.8NH, INDUCTOR
C4409_RF
RF2
117S0108
1
51 OHM, RESISTOR
L4410_RF
ROW
131S0363
1
0.6PF, CAPACITOR
L4410_RF
RF2
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
TABLE_5_ITEM
152S1907
1
3.3NH, INDUCTOR
L4105_RF
RFC
152S2007
1
8.2NH, INDUCTOR
L4401_RF
RFC
131S0426
1
22PF, CAPACITOR
C4405_RF
RFC
152S2044
1
2.2NH, INDUCTOR
C4406_RF
RFC
131S0631
1
0.3PF, CAPACITOR
L4407_RF
RFC
152S2056
1
5.6NH, INDUCTOR
L4403_RF
RFC
131S0429
1
8.2PF, CAPACITOR
C4407_RF
RFC
152S00143
1
15NH, INDUCTOR
L4404_RF
RFC
131S0823
1
33PF, CAPACITOR
C4408_RF
RFC
117S0108
1
51 OHM, RESISTOR
L4410_RF
RFC
152S00052
1
3.4NH, INDUCTOR
L3910_RF
RFC
152S2039
1
3.8NH, INDUCTOR
L3911_RF
RFC
131S0279
1
1.3PF, CAPACITOR
L3919_RF
RFC
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
VIETMOBILE.VN
TABLE_5_ITEM
TABLE_5_ITEM
152S00052
1
3.4NH, INDUCTOR
L3910_RF
ROW
152S00026
1
3.5NH, INDUCTOR
L3910_RF
RF2
152S2039
1
3.8NH, INDUCTOR
L3911_RF
ROW
117S0201
1
0 OHM, RESISTOR
L3911_RF
RF2
131S0279
1
1.3PF, CAPACITOR
L3919_RF
ROW
152S2045
1
3.0NH, INDUCTOR
L3919_RF
RF2
152S00052
1
3.4NH, INDUCTOR
L3912_RF
RF2
131S0599
1
1.5PF, CAPACITOR
C3922_RF
RF2
131S0630
1
27PF, CAPACITOR
C3911_RF
RF2
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
DARWIN HB PAD MATCHING BOM OPTIONS
B
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION TABLE_5_ITEM
152S1907
1
3.3NH, INDUCTOR
L4105_RF
DARWIN
152S2007
1
8.2NH, INDUCTOR
L4401_RF
DARWIN
131S0426
1
22PF, CAPACITOR
C4405_RF
DARWIN
152S2044
1
2.2NH, INDUCTOR
C4406_RF
DARWIN
131S0631
1
0.3PF, CAPACITOR
L4407_RF
DARWIN
152S2056
1
5.6NH, INDUCTOR
L4403_RF
DARWIN
131S0429
1
8.2PF, CAPACITOR
C4407_RF
DARWIN
152S00143
1
15NH, INDUCTOR
L4404_RF
DARWIN
131S0823
1
33PF, CAPACITOR
C4408_RF
DARWIN
117S0108
1
51 OHM, RESISTOR
L4410_RF
DARWIN
152S00052
1
3.4NH, INDUCTOR
L3910_RF
DARWIN
152S2039
1
3.8NH, INDUCTOR
L3911_RF
DARWIN
131S0279
1
1.3PF, CAPACITOR
L3919_RF
DARWIN
TABLE_TABLEOFCONTENTS_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
LAT DIPLEXER1
VINYL
TABLE_5_ITEM
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION TABLE_5_ITEM
TABLE_5_ITEM
155S0971
1
LAT CELL DIPLEXER1,TDK
FLDIP_RF
ROW
TABLE_5_ITEM
337S00176
1
IC, VINYL
U5101_RF
ROW TABLE_5_ITEM
TABLE_5_ITEM
155S0971
1
FLDIP_RF
LAT CELL DIPLEXER1,TDK
RF2
TABLE_5_ITEM
337S00176
1
U5101_RF
IC, VINYL
RF2 TABLE_5_ITEM
TABLE_5_ITEM
155S0971
1
LAT CELL DIPLEXER1,TDK
FLDIP_RF
RFC TABLE_5_ITEM
TABLE_5_ITEM
1
155S0971
FLDIP_RF
LAT CELL DIPLEXER1,TDK
VINYL RESISTOR
DARWIN
TABLE_5_ITEM
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
TABLE_5_ITEM
HB PAD
117S0161
QTY
0 OHM, RESISTOR
R3402_RF
RFC
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_HEAD
PART#
1
DESCRIPTION
REFERENCE DESIGNATOR(S)
117S0161
1
0 OHM, RESISTOR
R3402_RF
DARWIN
TABLE_5_ITEM
BOM OPTION TABLE_5_ITEM
353S00376
1
IC,PWR AMP,HB_PAD,TQS
UHBPA_RF
ROW
353S4494
1
IC,PWR AMP,HB_PAD,AVAGO
UHBPA_RF
RF2
TABLE_5_ITEM
HW_REV1_ID RESISTOR
TABLE_5_ITEM
A
353S00376
1
IC,PWR AMP,HB_PAD,TQS
UHBPA_RF
RFC
353S00478
1
IC,PWR AMP,HB_PAD,PT
UHBPA_RF
DARWIN
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
1
R3503_RF
51.1 KOHM, RESISTOR
A
?
TABLE_5_ITEM
118S0646
DARWIN
DRAWING TITLE
SCHEM,SINGLE,BRD,N71 DRAWING NUMBER
19.2MHZ XTAL ALTERNATE TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
Apple Inc.
SIM ESD DIODE ALTERNATE
051-1902 REVISION
A.0.0
R TABLE_ALT_HEAD
TABLE_ALT_ITEM
197S0565
197S0593
ALTERNATE
Y_XO_RF
XTAL, 19.2MHZ
197S0598
197S0593
ALTERNATE
Y_XO_RF
XTAL, 19.2MHZ
PART NUMBER
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
377S00042
377S0163
ALTERNATE
VR301_RF
ON SEMI ESD DIODE
TABLE_ALT_ITEM
NOTICE OF PROPRIETARY PROPERTY: TABLE_ALT_ITEM
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
1 OF 51 SHEET
34 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
N71-SPECIFIC RADIO PAGE 2
DIVERSITY LNA R4901_RF 9 5 3
IN
75_RFFE5_SCLK_BB
0
1
5% 1/20W
D
9 5 3
IN
75_RFFE5_SCLK_BB_UAT
2
MF 201
R4902_RF
RADIO_DRX_GPS_LNA
75_RFFE5_SDATA_BB
1
5% 1/20W
L4903_RF 120NH-5%-40MA 23 22 21 20 19 18 17 12 11 9
IN
PP_1V8_LDO15
1
0
D
75_RFFE5_SDATA_BB_UAT
2
MF 201
RADIO_DRX_GPS_LNA PP_1V8_LDO15_FILT VOLTAGE=1.8V
2
0201 RADIO_DRX_GPS_LNA
L4904_RF 120NH-5%-40MA 23 22 21 11
IN
PP_2V8_LDO14
1
PP_2V8_LDO14_FILT VOLTAGE=2.8V
2
0201 RADIO_DRX_GPS_LNA
L4905_RF 120NH-5%-40MA PP_2V7_LDO12_FILT
2
0201 RADIO_DRX_GPS_LNA
C4902_RF
1
0.1UF
100PF
5% 2 16V NP0-C0G 01005 RADIO_DRX_GPS_LNA
C4903_RF 0.1UF
20% 2 6.3V X5R-CERM 01005
RADIO_DRX_GPS_LNA
20% 2 6.3V X5R-CERM 01005
RADIO_DRX_GPS_LNA
R5204_RF
RADIO_DRX_GPS_LNA 3
1
RADIO_DRX_GPS_LNA 1
C
WIFI ANT FEED
2 01005
C5207_RF
C5208_RF
SCLK
1
VDD_GPS
50_QUADPL_GPS_OUT
C4904_RF 0.1UF
20% 2 6.3V X5R-CERM 01005
1.0NH+/-0.1NH-0.580A 2
1
10
1
11
C4905_RF
SDATA
1
VOLTAGE=2.7V
9
1
VIO
PP_2V7_LDO12
12
IN
VDD_DRX
11
C
0.2PF
12NH-3%-0.140A 01005
RADIO_DRX_GPS_LNA
+/-0.1PF 2 16V NP0-C0G 01005
U_VOX_RF LMRX5BJB-G98
NO STUFF
27
50_GPS_LNA_IN
2
LGA RADIO_DRX_GPS_LNA
GPS_IN
GPS_OUT 2
50_DRX_GPS_LNA_OUT
OUT
15
TO 5GHZ WIFI ANTENNA FEED
C4901_RF
1.3NH+/-0.1NH-1.1A 2
1
50_MB-HB_DRX_LNA_MATCH_IN
23 DRX_ANT
50_MB-HB_UAT_DRX_GPS_LNA_IN
2
DRX_OUT 14 50_MB-HB_UAT_COAX_UPPER
BI
TP_WIFI_5G
3
VIETMOBILE.VN
0201
RADIO_DRX_GPS_LNA
TP5102_RF P2MM-NSM
01005
1 4 5 6 7 8 13 15 16 17 18 19 20 21 22 24 25 26 28
RADIO_DRX_GPS_LNA
SM2 PP
1
1
2
C5132_RF 0.2PF
TP5101_RF P2MM-NSM SM PP
R5132_RF
50_WIFI_5G_CONN_ANT
TP_WIFI_5G_GND
29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
7.5NH+/-3%-0.2A
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
L4907_RF
THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD
1
1
0.00 2
50_WIFI_5G_CONN_MCH
1% 1/20W MF RADIO_UP_ANT 0201
+/-0.05PF 2 25V COG-CERM 0201
1
NOSTUFF
5GHZ UAT CONNECTOR J_5G_UAT
J5100_RF
B
B
MM8830-2600B
R5206_RF
UAT ANT FEED
5.15-5.92GHZ-1DB
0.8NH+/-0.1NH-0.630A 25
50_A_0_MATCH_MOD
2 50_A_0_BPF_MOD
1
F-RT-SM
F5203_RF LFB185G53CGRD898 1 3
50_A_0_ANT
1
2 C
2
01005
R
1
0.3PF
+/-0.05PF 2 16V C0G-CERM 01005
J_UAT_RF UQPL_RF
MM8830-2600B
ACFM-W212-AP1 2 2 25
50_LB_UAT_COAX_UPPER 50_MB-HB_DRX_LNA_MATCH_IN 50_QUADPL_GPS_OUT 50_G_0_MATCH_MOD
5 1 14 10
L5112_RF
C5007_RF
LOW_BAND_CELL MID_BAND_CELL GNSS WI_FI GND
50_UAT_TEST
2
1
2 C
+/-0.1PF 25V C0G 0201
EPAD
2 3 4 6 7 9 11 12 13 15 16 17 18
1
C5122_RF
2.7NH-570MA
5.0PF
ANT 8 50_UAT_NPLEXER_IN
1
50_UPPER_ANT_MCH
R
1
2
12PF
50_UPPER_ANT
1
03015
2
2
5% 25V CERM 0201
GND
1
0.5PF
50_UPPER_ANT_FEED
1
+/-0.1PF 2 16V NP0-C0G 01005
SM PP
ANT
1
24NH-3%-0.16A-0.95OHM
C5111_RF
03015
1.0PF
L5410_RF
+/-0.05PF 2 16V C0G-CERM 01005
0.2PF
TPUAT_RF P2MM-NSM
L5122_RF
1
L5100_RF
GND
C5212_RF
NO STUFF
3
BI
1
F-RT-SM
LGA
19
3
C5211_RF
3
UAT COAX CONNECTOR
+/-0.05PF 2 25V C0G-CERM 0201
11NH-3%-0.28OHM-310MA 03015
2
50_UPPER_ANT_FEED
IN
2
50_WIFI_5G_CONN_ANT
IN
2
50_UAT_MATCH 2
A
1
C5112_RF
A
18PF
2% 2 25V C0H-CERM 0201
TP_UAT_GND
PAGE TITLE
ELNA & UAT ANT FEED
TP5100_RF
DRAWING NUMBER
P2MM-NSM SM 1
Apple Inc.
PP
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
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2 OF 51 SHEET
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7
6
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1
N71-SPECIFIC RADIO PAGE 3 ANTENNA FEEDS AND CONNECTORS D 50_LB_ASM_ANT2_COAX_LOW
F-ST-SM
F-ST-SM
1
1
UAT TUNER 50_LB_UAT_COAX_UPPER
BI
D
2
2 3
BI
J5003_RF MM6829-2700B
3 2
21
J5001_RF MM6829-2700B
L5408_RF
LOWER SIDE
TWO COAX CABLES
120NH-5%-40MA
UPPER SIDE
PAC2_VDD_3V0_FILTER 50_MB-HB_ASM_ANT2_COAX_LOW
J5004_RF MM6829-2700B
F-ST-SM
F-ST-SM
1
1
5
0201 1
1
C5405_RF 33PF
50_MB-HB_UAT_COAX_UPPER
BI
10%
5% 2 16V NP0-C0G-CERM 01005
2
C5403_RF 0.01UF
2 25V X5R-CERM
0201
6
3 2
BI
PP3V0_TRISTAR
2
2 3
22
J5002_RF MM6829-2700B
1
VDD
FLDIP_RF LFD21829MMV1D889
BI
OMIT
50_MB-HB_ASM_ANT1_LAT
4 P1
50_LB_ASM_ANT1_LAT
6 P2
P3 2
50_LAT_DIPLEXER_ANT
1
SCLK_FILT SDAT_FILT
0% 1/32W MF 01005
F-ST-SM1
50_LAT_TEST
0.00 2
1
1
0201-1
C5401_RF
1 10 9 8
33PF
5% 2 16V NP0-C0G-CERM 01005
GND 1 3 5
5 SCLK 4 SDAT
WLCSP
VIO 3
VIO_FILT
RFFE_VIO_S2R
2
5
0201
RF1 RF2 RF3 RF4
1
C5408_RF 0.01UF
10% 2 25V X5R-CERM 0201
L5001_RF 0.4PF
1
1
C
C5404_RF 33PF
5% 2 16V NP0-C0G-CERM 01005
RFGND GNDA 2
+/-0.05PF 25V C0G 201
11
21
2.2NH+/-0.1NH-0.6A
75_RFFE5_SCLK_BB
7
BI
9 5 2
MM5829-2700
L5407_RF
120NH-5%-40MA
RF1347
4 3 2
22
R5401_RF
J_LAT_RF
C5006_RF
LLP
C
U5411_RF
LAT COAX CONNECTOR
VIETMOBILE.VN R5402_RF
9 5 2
75_RFFE5_SDATA_BB
1
0.00 2 0% 1/32W MF 01005
1
C5402_RF 33PF
L5403_RF
5% 2 16V NP0-C0G-CERM 01005
C5407_RF
6.8NH-+/-0.2NH-440MA
L_2AB
1
18PF
UAT_MID
2
03015 1
1
2
UAT
TP3_RF 1
2% 25V C0H-CERM 0201
C5409_RF 0.5PF
A
TP-P80
+/-0.05PF 2 25V COG-CERM 0201
B
B
L5402_RF
33NH-3%-140MA
L_1B
1
2 03015
L5401_RF
33NH-3%-140MA
L_1A
1
2 03015
SIM CARD CONNECTOR
1 11 7 5 3
PP_UIM1_LDO11
1
L5400_RF
SIM CARD ESD PROTECTION R3004_RF
15.00K
1% 1/32W MF 2 01005
1
12NH-310MA 03015
C3002_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
2
VR301_RF
ESDAVLC5-4BU4 SM
9 5 3
IN
SIM1_CLK
J3001_RF
3 CLK
IO 7
SIM1_TRAY_DET
OUT
SIM1_IO BI
3 5 9
SIM-W-EJECTOR-THICK-N71 IN
SIM1_RST
2 RESET
SWP 6
F-RT-SM
BI
SIM1_IO
1
9 5 3
SIM1_RST
2
4
3
4FF_SIM_SWP
3 5 24 26
SIM1_CLK
A
3 5 9
PAGE TITLE
3 5 24 26
FE: ANT CONNECTORS AND UAT TUNER
5
9 5 3
4FF_SIM_SWP
9 5 3 3 5 9
1 VCC
DRAWING NUMBER
GND 5 10 11 12 13 14 15
A
SIM_DETECT 8
GND
9 SIM_DETECT_GND
11 7 5 3
Apple Inc.
PP_UIM1_LDO11
DZ302_RF
2 NOSTUFF
8
7
6
5
REVISION
R
A.0.0
5.5V-6.2PF
1 DZ301_RF
12V-33PF 01005-1
051-1902
9 5 3
SIM1_TRAY_DET
1
NOTICE OF PROPRIETARY PROPERTY:
2
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
0201
4
3
2
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3 OF 51 SHEET
36 OF 59
1
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D
8
7
6
5
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2
1
N71-SPECIFIC RADIO PAGE 4 D
D
WLAN LAT 2.4GHZ BAW BPF F5201_RF WLAN-BT-LTE
L5205_RF
885118 LGA
0.4NH+/-0.1NH-320MA 25
50_G_1_MATCH_MOD
1
50_G_1_BAW_TX_RX
2 01005
1 INPUT
C5203_RF OUTPUT 4
50_G_1_BAW_ANT
GND 1
2 3 5
1
3.6PF 1
2
50_G_1_DPLX 25
+/-0.1PF 16V NP0-C0G 01005
1
NO STUFF
L5202_RF
12NH-3%-0.140A 01005
L5204_RF
L5206_RF
6.8NH-3%-0.210A
4.0NH-+/-0.1NH-0.27A
01005
01005
2
2
2
C
C
VIETMOBILE.VN B
B
A
A PAGE TITLE
WLAN LAT 2.4GHZ BAW BPF DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
8
7
6
5
4
3
2
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PAGE
4 OF 51 SHEET
37 OF 59
1
SIZE
D
8
7
6
5
4
AP TO BB/WLAN/BT/SH CONNECTIONS BASEBAND
D 26 25 20 18 17 12 11 10 10 5 10 9
9 5 9 5 9 5 9 9 10
9 5
8 5
OUT
25
OUT
25
BT_TO_PMU_HOST_WAKE
25
AP_TO_BT_WAKE
IN
AP_TO_BB_IPC_GPIO TOUCH_TO_BBPMU_FORCE_PWM
IN
PCIE0_BB_TO_AP_TX_P PCIE0_BB_TO_AP_TX_N
9 5 9 5 9 5
8 10
UART1_AP_TO_BT_RTS_L
25
UART1_BT_TO_AP_RTS_L
25
I2S_AP_TO_BT_LRCK
25
I2S_BT_TO_AP_DOUT
25
I2S_AP_TO_BT_DOUT
OUT
9 5 3 2 3
11 11 11
B
5 5 5 5 5 5 5 5 5
AP_RESERVED0 AP_RESERVED1 AP_RESERVED2
IN
25
UART4_WLAN_TO_AP_TX
OUT
UART4_WLAN_TO_AP_RTS_L
1
PP
PCIE0_AP_TO_BB_DEV_WAKE
5 9
OMIT
PCIE_WLAN_TO_AP_CLKREQ_L
25
5 8
SM
5 8
RADIO_DEBUG
PP3084_RF P2MM-NSM SM
PCIE0_AP_TO_BB_TX_P
1
OMIT
5 8
RADIO_DEBUG
PCIE_AP_TO_WLAN_DEV_WAKE
25
IN
PCIE_AP_TO_WLAN_REFCLK_N
IN
PCIE_WLAN_TO_AP_TX_P PCIE_WLAN_TO_AP_TX_N
25
IN
OUT 25
OWL_TO_WLAN_CONTEXT_A
25
OWL_TO_WLAN_CONTEXT_B
MAKE_BASE=TRUE
OMIT
RADIO_DEBUG
PP3012_RF P2MM-NSM SM PP
8 10
1
AP_TO_BB_MESA_ON_L
OMIT
RADIO_DEBUG
P2MM-NSM SM 1 BB_TO_AP_GSM_TXBURST_IND PP RADIO_DEBUG OMIT
BASEBAND P2MM-NSM SM 1
P2MM-NSM SM 1
SM PP
1 BB_TO_AP_GPS_TIME_MARK
OMIT BB_DEBUG_ERROR
P2MM-NSM SM 1
BB_JTAG_SRST_L
RADIO_DEBUG
9
50_MDM_PCIE_CLK
SM
PP
1 UART0_BB_TO_OWL_TX
OMIT
50_BBPMU_TO_STOCKHOLM_19P2M_CLK
SWD_IO_BB_JTAG_TMS
SM
PP
OMIT
PP
RADIO_DEBUG
5 8
P2MM-NSM SM 1
RADIO_DEBUG
OMIT
STOCKHOLM_TO_BBPMU_CLK_REQ
SM PP
UART0_OWL_TO_BB_TX
5 9
RADIO_DEBUG
1
75_RFFE5_SCLK_BB_BUFFER
OMIT
RADIO_DEBUG
9
RADIO_DEBUG
PP3052_RF
P2MM-NSM SM 1 75_RFFE5_SDATA_BB_BUFFER PP
10 26
PP
9 12
PP3051_RF P2MM-NSM
RADIO_DEBUG
1
75_RFFE4_SDATA_BB
1
OMIT
5 9
PP3020_RF P2MM-NSM
10 26
PP3006_RF
OMIT
9
OMIT
PP3053_RF P2MM-NSM SM PP
1
75_RFFE2_SDATA_BB
9 17 18 19 20 21 22
IN
OMIT IN
OUT OUT
RADIO_DEBUG
PP3054_RF
DEBUG CONNECTOR
OUT
P2MM-NSM SM 1
75_RFFE3_SDATA_BB
9 23
PP
OMIT
NOSTUFF
OUT
STOCKHOLM 5
IN OUT
26
IN
26
IN
26
IN
26
IN
26 5
IO
26 5
IO
26 5
IO
26 5
24 9 5
PP1V8_SDRAM
AXE550124
PMU_TO_BBPMU_RESET_L
F-ST-SM 51
1
OUT IN IN IN
ESD CAPS
C5101_RF 1 C3503_RF 100PF 100PF
5% 2 16V NP0-C0G 01005
5% 2 16V NP0-C0G 01005
IN OUT IN
25 9
OUT
5 5
OUT
5
OUT
5
OUT
5
OUT
24 9 5
OUT
24 9
IO
25 9
ANT
9 24
IN IN
26
STOCKHOLM_ANT
IN
IN
UART_WLAN_TO_BB_COEX_TX I2C0_AP_SDA I2C0_AP_SCL BUTTON_VOL_DOWN_L BUTTON_VOL_UP_L BUTTON_RINGER_A SIM2_RESET SIM2_DATA UART_BB_TO_WLAN_COEX_TX SIM2_DETECT SIM2_DATA_R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
52
54
B
PP3062_RF
53
P2MM-NSM SM 1
SIM2_RESET
IN
AP_TO_STOCKHOLM_SIM_SEL STOCKHOLM_TO_PMU_HOST_WAKE AP_TO_STOCKHOLM_FW_DWLD_REQ PMU_TO_STOCKHOLM_EN AP_TO_STOCKHOLM_DEV_WAKE UART3_AP_TO_STOCKHOLM_TXD UART3_STOCKHOLM_TO_AP_TXD UART3_AP_TO_STOCKHOLM_RTS_L UART3_STOCKHOLM_TO_AP_RTS_L
IO
IO
STOCKHOLM
J3000_RF 10 5
7
SM
PP3016_RF P2MM-NSM
8 10
PP
PP3091_RF
9 16
PP3077_RF P2MM-NSM PP
P2MM-NSM SM 1
75_RFFE1_SDATA_BB
OMIT
PP3019_RF
8
C
PP3056_RF P2MM-NSM PP
OMIT
OUT
RFFE
5 9
SM 1
OMIT
RADIO_DEBUG
P2MM-NSM SM 1
5 9
PP3014_RF P2MM-NSM
PP3017_RF
PP
RADIO_DEBUG
OMIT
5 9
RADIO_DEBUG
PP
STOCKHOLM_DWPM_DBG
26
STOCKHOLM_DWPS_DBG
26
OMIT
PP3063_RF P2MM-NSM SM 1 PP
OMIT SIM1_CLK SIM1_RST SIM1_IO PP_UIM1_LDO11 SIM1_TRAY_DET 4FF_SIM_SWP I2C1_AP_SDA I2C1_AP_SCL BUTTON_HOLD_KEY_L BUTTON_MENU_KEY_L PP1V8 FORCE_DFU SIM2_CLK PP_UIM2_LDO13
3 9
PP3064_RF
3 9
P2MM-NSM SM 1 UART3_AP_TO_STOCKHOLM_TXD PP
3 9 3 7 11
5 26
OMIT
3 9
PP3065_RF
3 24 26
P2MM-NSM SM 1 UART3_STOCKHOLM_TO_AP_TXD PP
5 5
5 26
OMIT
5
PP3066_RF
5
P2MM-NSM SM 1 UART3_AP_TO_STOCKHOLM_RTS_L PP
5 5
5 26
OMIT
9 24
PP3067_RF
7 11 24
P2MM-NSM SM 1 UART3_STOCKHOLM_TO_AP_RTS_L
5 26
PP
OMIT
A PAGE TITLE
DEBUG CONN & TEST POINTS DRAWING NUMBER
25
Apple Inc.
26
051-1902 REVISION
R
A.0.0
3
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
2 3 5 9
RADIO_DEBUG
5 9
OUT
OUT
IN
5 8
IN
PCIE_AP_TO_WLAN_REFCLK_P
25
OUT
I2S_BB_TO_AP_TX
1
PP3018_RF
PP3090_RF
IN
PCIE_AP_TO_WLAN_TX_N
25
OMIT
OMIT
PP
PCIE_AP_TO_WLAN_TX_P
25
OUT
IN
IN
5 9
RADIO_DEBUG
VIETMOBILE.VN
OUT
IN
OMIT
POWER PP1V8_SDRAM VOLTAGE=1.8V
PP
RADIO_DEBUG
PP
PCIE0_AP_TO_BB_TX_N
1
OMIT IN
P2MM-NSM SM 1 75_RFFE5_SCLK_BB PP
PP3013_RF
1 PCIE0_AP_TO_BB_REFCLK_N
OMIT
PP
PCIE_AP_TO_WLAN_PERST_L
25
RADIO_DEBUG
PP3002_RF
I2S_AP_TO_BB_TX
1
SM
8 10
RADIO_DEBUG
OUT
OUT
OMIT
2 3 5 9
PP3011_RF P2MM-NSM
P2MM-NSM SM 1 SPMI_DATA PP
A 5
PP
PP3081_RF P2MM-NSM
SM
IN
PP_1V8_S2R_VDDIO_WLAN_BT VOLTAGE=1.8V PP_STOCKHOLM_1V8_S2R VOLTAGE=1.8V RFFE_VIO_S2R VOLTAGE=1.8V
SM
8 10
SPMI_CLK
PP
1 PCIE0_AP_TO_BB_REFCLK_P
OMIT
PP IN
5 9
PP3010_RF P2MM-NSM
RADIO_DEBUG
SM
OUT
UART4_AP_TO_WLAN_RTS_L
P2MM-NSM SM 1 75_RFFE5_SDATA_BB PP
RADIO_DEBUG
OMIT
P2MM-NSM SM 1
PP3085_RF P2MM-NSM
IN
PP1V8 FORCE_DFU DFU_STATUS PMU_AMUX_AY PMU_AMUX_BY PMU_TO_SYSTEM_COLD_RESET_L I2C0_AP_SDA I2C0_AP_SCL I2C1_AP_SDA I2C1_AP_SCL BUTTON_HOLD_KEY_L BUTTON_MENU_KEY_L BUTTON_VOL_DOWN_L BUTTON_VOL_UP_L BUTTON_RINGER_A PMU_GPIO20 PMU_GPIO21
5
OUT
IN
25
AP DEBUG 5
OMIT
OMIT
PP3080_RF P2MM-NSM
IN
IN
BB_TO_PMU_AMUX_SMPS1 BB_TO_PMU_AMUX_SMPS3 BB_TO_PMU_AMUX_SMPS4 BB_TO_PMU_AMUX_LDO11_SIM1
11
OMIT
IN
RFFE_BUFFER_LAT_GPIO1 75_RFFE5_SDATA_BB 75_RFFE5_SCLK_BB PP3V0_TRISTAR
9 5 3 2
OUT
UART4_AP_TO_WLAN_TX
25 9
PP
IN
PP3001_RF
I2S_AP_TO_BB_CLK
1
PP
8 10
PP3036_RF
IN
25
25
8 5
5 9
RADIO_DEBUG
SM
OMIT P2MM-NSM SM 1 XO_OUT_D0_EN PP
ANT TUNER
5 9
PP3009_RF P2MM-NSM
PP3034_RF
PP3076_RF P2MM-NSM SM
I2S_AP_TO_BT_BCLK
25
IN
SWD_CLK_BB_JTAG_TCK SWD_IO_BB_JTAG_TMS
8
OMIT
P2MM-NSM SM 1 50_SLEEP_CLK_32K PP
5 9
I2S_AP_TO_BB_WS
1
PP
OMIT
IN OUT
SM
8 10
OMIT
RADIO_DEBUG
PP
IN
USB_BB_P USB_BB_N USB_BB_VBUS_DETECT
8
25
25
OUT
I2S_AP_TO_BB_WS I2S_AP_TO_BB_CLK I2S_AP_TO_BB_TX I2S_BB_TO_AP_TX
9 5
PCIE0_BB_TO_PMU_HOST_WAKE_L
OMIT
OUT
PCIE0_AP_TO_BB_PERST_L PCIE0_AP_TO_BB_CLKREQ_L PCIE0_BB_TO_PMU_HOST_WAKE_L PCIE0_AP_TO_BB_DEV_WAKE
9 5
25
UART1_BT_TO_AP_TX
PP3008_RF P2MM-NSM
PP3037_RF
IN
IN
9 5
25
UART1_AP_TO_BT_TX
IN
PCIE0_AP_TO_BB_TX_N
1
P2MM-NSM SM 1 PCIE0_AP_TO_BB_CLKREQ_L PP
OUT
8 5
9 5
IN
5 9
PP3075_RF
IN
IN
9 5
OUT
PP
IN
PCIE0_AP_TO_BB_TX_P
8
P2MM-NSM SM 1 PMIC_RESOUT_L PP
PP3033_RF
PP3074_RF P2MM-NSM SM
D
PP3032_RF
OMIT
OUT
IN
8 5
8
IN
OUT
AP_TO_BB_COREDUMP_TRIG
P2MM-NSM SM 1 PCIE0_AP_TO_BB_PERST_L PP
IN
PMU_TO_BT_REG_ON WLAN_TO_PMU_HOST_WAKE
25
IN
SINGLE_NODENET
IN
PMU_TO_WLAN_REG_ON
25
IN
PCIE0_AP_TO_BB_REFCLK_P PCIE0_AP_TO_BB_REFCLK_N
8 5
PMU
PCIE
PMU_TO_WLAN_32K_CLK
25
IN
UART0_BB_TO_OWL_TX UART0_OWL_TO_BB_TX
9 5
C
AP_TO_BBPMU_RADIO_ON_L PMU_TO_BBPMU_RESET_L AP_TO_BB_RST_L BB_TO_AP_RESET_DET_L BB_TO_AP_GSM_TXBURST_IND AP_TO_BB_MESA_ON_L BB_TO_AP_GPS_TIME_MARK
WLAN/BT IO
1
MLB PROBE POINTS PP3073_RF
PP_VCC_MAIN
2
3
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
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30 OF 51 SHEET
38 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
BASEBAND: POWER 1 A1 A3 A14 A22 A24 B3 B14 B22 C3 E15 E17 E18 E24 F1 F8 F17 F18 G8 G9 G12 G13 G16 G17 G24 H1 H7 H8 H11 H12 H15 H16 H19 J5 J6 J7 J10 J11 J14 J15 J18 J19 J24 K6 K9 K10 K13 K14 K17 K18 L1 L8 L9 L12 A9 A13 C11 A5 A7 A11 A20 B18 C21 A16 A18 C14 F13 F14
U_BB_RF MDM9635M
D
BGA SYM 6 OF 8 11 6
PP_0V9_LDO3
C 11 7 6
PP_1V0_SMPS3
E16 F5 F6 F7 F15 F16 G15 K19 L18 L19 M17 M18 N16 N17 P15 P16 R6 R14 R15 R18 T6 T13 T14 T17 T18
VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE
F10 F11 F19 G10 G11 G18 G19 H9 H10 M9 M13 N8 N9 N12 N13 P19 R19 R20
VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM
PWR1 RADIO_BB
VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM
G6 G14 H5 H6 H13 H14 H17 H18 J8 J9 J12 J13 J16 J17 K7 K8 K11 K12 K15 K16 L6 L7 L10 L11 L14 L15 M6 M10 M14 P7 P8 P11 P12 R7 R10 R11 T10 G7
PP_0V9_SMPS1
6 11
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
U_BB_RF MDM9635M BGA SYM 8 OF 8 GND RADIO_BB
VIETMOBILE.VN B
11 6
(MSM CORE)
PP_0V9_LDO3 1
1
C3101_RF C3104_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB 11 6
20% 2 4V X5R-CERM 0201
C3107_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3110_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3113_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3116_RF 2.2UF
C3120_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3123_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
RADIO_BB
1
C3125_RF 15UF
20% 2 6.3V X5R 0402-1
RADIO_BB
(MSM MODEM)
PP_0V9_SMPS1 1
C3102_RF 1 C3105_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB 11 7 6
2.2UF
1
2.2UF
20% 2 4V X5R-CERM 0201
1
C3108_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3111_RF
1
2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
C3114_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3117_RF 2.2UF
1
2.2UF
20% 2 4V X5R-CERM 0201
20% 2 4V X5R-CERM 0201
RADIO_BB
RADIO_BB
C3119_RF
1
C3122_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
L13 L16 L17 L24 M7 M8 M11 M12 M15 M16 M19 N6 N7 N10 N11 N14 N15 N18 N23 N24 P6 P9 P10 P13 P14 P17 P18 R1 R8 R9 R12 R13 R16 R17 R24 T7 T8 T9 T11 T12 T15 T16 T19 U11 U15 U19 U24 W1 W9 W11 W24 Y6 Y10 Y14 Y15 AA1 AA6 AA8 AA12 AA14 AA18 AA24 N19 F9 E8
D
C
B
RADIO_BB
(MODEM SUB MEMORY)
PP_1V0_SMPS3 1
C3103_RF 1 C3106_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3109_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3112_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3115_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
1
C3118_RF 2.2UF
1
C3121_RF 2.2UF
20% 2 4V X5R-CERM 0201
20% 2 4V X5R-CERM 0201
RADIO_BB
RADIO_BB
1
C3124_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_BB
A
A PAGE TITLE
CELLULAR BASEBAND: POWER1 DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
A.0.0 BRANCH
PAGE
31 OF 51 SHEET
39 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
BASEBAND: POWER 2 U_BB_RF MDM9635M
D 11 7
PP_1V2_LDO2
1
C3204_RF
1
2.2UF
2.2UF
20% 2 6.3V X5R-CERM 0201
C3210_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
1
C3214_RF 2.2UF
C3218_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
1
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
RADIO_PMIC
VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1
26 11 9 8 7
PP_1V8_LDO6
G1
VDD_P2
26 11 9 8 7
PP_1V8_LDO6
C22 D3 J1 J20 M1 M20 T1 T24 AA5 AA15 AA23
VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3 VDD_P3
1
C3202_RF 2.2UF
1
1
C3205_RF
20% 2 4V X5R-CERM 0201
20% 2 4V X5R-CERM 0201
RADIO_PMIC
C3208_RF 2.2UF
2.2UF
20% 2 4V X5R-CERM 0201
C
1
C3207_RF
F23 F24 K23 K24 P23 P24 W2 V23 V24 V1
RADIO_PMIC
RADIO_PMIC
1
C3211_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_PMIC
11 5 3
PP_UIM1_LDO11
AA19
VDD_P4
24 11 5
PP_UIM2_LDO13
AA17
VDD_P5
PP_1V2_LDO2
U23
VDD_P6
PP_1V0_SMPS3
U13
VDD_USB_CORE
PP_1V8_LDO8 PP_3V075_LDO10
Y12 W15
11 7
11 7 6
11 11
W7 U7 11
1
C3209_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_PMIC
1
C3206_RF 2.2UF
20% 2 4V X5R-CERM 0201
RADIO_PMIC
1
C3203_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
1
C3212_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
C1 D24 Y24 AA2
PP_1V8_LDO6
7 8 9 11 26
VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P2
B1 E23 W23 Y1
PP_1V2_LDO2
7 11
VDDPX_BIAS_UIM2
10
D
VREF_SDC G2 VREF_UIM U18 VDD_A3 C10 VDD_A3 E19 VDD_A2 VDD_A1 VDD_A2 VDD_A1 VDD_A2 VDD_A1
PP_1V0_SMPS3
B11 B9 B7 B5 B13 E12
PP_1V7_LDO5 PP_1V5_LDO1 1
C3220_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
VDD_A2 B20 VDD_A2 B16
1
C3226_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
1
C3225_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
RADIO_PMIC
1
C3219_RF 0.1UF
20% 2 6.3V X5R-CERM 01005
RADIO_PMIC
1
C3223_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
1
11 11
C3229_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
RADIO_PMIC
PLACE CLOSE TO B1
VDD_A1 F12
6 7 11
C
VDD_ALWAYS_ON U16 NC VDD_PLL N20 VDD_PLL E9
PP_1V8_LDO7
7 10 11
VDD_QFPROM_PRG H20
PP_1V8_LDO7
7 10 11
VDD_USB_1P8 VDD_USB_3P3
1
C3227_RF 2.2UF
VDD_USB_SS_0P9 VDD_USB_SS_1P8
20% 2 6.3V X5R-CERM 0201
VIETMOBILE.VN W8 U9
PP_0V95_LDO4
BGA SYM 7 OF 8 PWR2 RADIO_BB VDD_DDR_CORE_1P8 VDD_DDR_CORE_1P8 VDD_DDR_CORE_1P8 VDD_DDR_CORE_1P8
RADIO_PMIC
1
C3213_RF 2.2UF
1
C3215_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
20% 2 4V X5R-CERM 0201
RADIO_PMIC
RADIO_PMIC
1
RADIO_PMIC
VDD_PCIE_0P9 VDD_PCIE_1P8
C3216_RF 2.2UF
20% 2 6.3V X5R-CERM 0201
RADIO_PMIC
B
B
A
A PAGE TITLE
CELLULAR BASEBAND: POWER2 DRAWING NUMBER
Apple Inc.
051-1902 REVISION
A.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
32 OF 51 SHEET
40 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
BASEBAND: CONTROL AND INTERFACES U_BB_RF
D
MDM9635M
10 5
IN
10 5
OUT
10
IN
5
IN
10 5
IN
50_SLEEP_CLK_32K XO_OUT_D0_EN 50_MDM_19P2M_CLK
W20 U20 E3
SLEEP_CLK CXO_EN CXO
BB_JTAG_SRST_L PMIC_RESOUT_L
K3 G22
SRST* RESIN*
NC NC 8
SWD_CLK_BB_JTAG_TCK_BUFFER IN 5
NC
SWD_IO_BB_JTAG_TMS
NC NC
26 11 9 7
PP_1V8_LDO6
L3 L5
MODE_0 MODE_1
J2 K5 J3 K1 K2
TCK TRST* TMS TDI TDO
D
U_BB_RF
BGA SYM 1 OF 8
MDM9635M BGA SYM 4 OF 8
CONTROL RADIO_BB
HSIC_STROBE U22 HSIC_DATA T23 HSIC_CAL V22
NC NC BB_HSIC_CAL 11
RESOUT* H22 NC PS_HOLD PS_HOLD AA16 SDC1_CLK SDC1_CMD SDC1_DATA_0 SDC1_DATA_1 SDC1_DATA_2 SDC1_DATA_3
H2 F2 G5 F3 G3 H3
PMIC_SPMI_CLK Y21 PMIC_SPMI_DATA Y20
OUT
R3303_RF 240
1% 1/32W MF 2 01005 RADIO_BB
NC NC NC NC NC NC
PLACE CLOSE TO V22 SPMI_CLK SPMI_DATA
BI
5 10
BI
5 10
1
1% 1/32W MF 2 01005 RADIO_BB
1% 1/32W MF 2 01005 RADIO_BB
PLACE CLOSE TO E1
PLACE CLOSE TO T3
R3305_RF 240
1
10
1
R3306_RF 240
BDM_CAL EBI1_CAL MDM_VREF_LPDDR2
1
C3302_RF 1UF
20% 2 10V X5R 0201 RADIO_BB
E1 T3 M24 V2 T20 P20
BDM_ZQ EBI1_CAL VREF_DQ_BDM EBI1_VREF EBI1_VREF EBI1_VREF
MEMORY RADIO_BB
NOSTUFF AT PVT
SOT1226 SWD_CLK_BB_JTAG_TCK_BUFFER 4 NOSTUFF
2
8
C
NC
1
C
5 5
SWD_CLK_BB_JTAG_TCK
74AUP1G34GX
NC
U3301_RF
U_BB_RF MDM9635M BGA SYM 2 OF 8
14
14
IN
50_PRX_CA2_I
IN
50_PRX_CA2_Q
A10 B10 NC C8 C9
BBRX_IP_CH0 BBRX_IM_CH0 BBRX_QP_CH0 BBRX_QM_CH0
E7 E6 B8 A8
BBRX_IP_CH1 BBRX_IM_CH1 BBRX_QP_CH1 BBRX_QM_CH1
NC 15
IN
50_DRX_CA2_I
NC 15
B
IN
50_DRX_CA2_Q
NC 15
IN
50_DRX_CA1_I
NC 15
IN
50_DRX_CA1_Q
NC 14
IN
50_PRX_CA1_I
NC 14
IN
50_PRX_CA1_Q
NC 10
IN
VREF_DAC_BIAS
1
C7 C6 A6 B6 A4 B4 C4 C5 C20 C15
ANALOG_RF RADIO_BB
BBRX_IP_FB BBRX_IM_FB BBRX_QP_FB BBRX_QM_FB GNSS_BB_IP GNSS_BB_IM GNSS_BB_QP GNSS_BB_QM
VIETMOBILE.VN B12 A12 NC C13 C12
50_TX_FB_RX_I
E10 E11 NC E13 E14 C19 C18 A19 B19
BBRX_IP_CH3 BBRX_IM_CH3 BBRX_QP_CH3 BBRX_QM_CH3
TX_DAC1_IP TX_DAC1_IM TX_DAC1_QP TX_DAC1_QM
C16 NC C17 NC A15 NC B15
ET_DAC0_P ET_DAC0_M ET_DAC1_P ET_DAC1_M
A21 B21 A17 NC B17
DNC DNC DNC DNC DNC DNC
M22 NC N22 NC AA20 NC AA21 NC Y8 NC W13
10% 2 16V X5R-CERM 01005 RADIO_BB
50_TX_FB_RX_Q
IN
16
50_GPS_RX_I
IN
15
U_BB_RF MDM9635M
BGA SYM 5 OF 8
50_GPS_RX_Q
IN
10 5
TX_I_P TX_I_N TX_Q_P TX_Q_N
IN
50_MDM_PCIE_CLK BB_USB_TRXTUNE
W12 U12
PCIE_USB_SYSCLK USB_HS_REXT
USB_BB_P USB_BB_N
U14 W14
USB_HS_DP USB_HS_DM
USB_PCIE RADIO_BB
PCIE_EP_REFCLK_P U10 PCIE_EP_REFCLK_N W10
OUT
16
OUT
16
OUT
16
OUT
16
5
BI
5
BI
1
R3304_RF 200
1% 1/32W MF 2 01005 RADIO_BB
PLACE CLOSE TO U12
NC OUT
12
OUT
12
5
IN
5
PCIE0_BB_TO_AP_TX_P PCIE0_BB_TO_AP_TX_N
OUT
5
OUT
5
Y7 USB_SS_TX_P NC AA7 USB_SS_TX_M NC
PCIE_RX_P AA13 PCIE_RX_M Y13
PCIE0_AP_TO_BB_TX_P PCIE0_AP_TO_BB_TX_N
IN
5
IN
5
Y9 USB_SS_RX_P NC AA9 USB_SS_RX_M NC
PCIE_REXT AA10
U8
SS_CAL_RES
B
PCIE_CAL_RES 1
R3302_RF 1.43K
USB_SS_REXT
1% 1/32W MF 2 01005 RADIO_BB
R3301_RF 1.43K
PLACE CLOSE TO AA10
1% 1/32W MF 2 01005 RADIO_BB
NC
IN
PCIE_TX_P AA11 PCIE_TX_M Y11
1
ET_DAC_P ET_DAC_N
PCIE0_AP_TO_BB_REFCLK_P PCIE0_AP_TO_BB_REFCLK_N
15
NC
TX_DAC0_IP TX_DAC0_IM TX_DAC0_QP TX_DAC0_QM
C3301_RF 2200PF
16
NC
BBRX_IP_CH2 BBRX_IM_CH2 BBRX_QP_CH2 BBRX_QM_CH2
TX_DAC0_VREF TX_DAC1_VREF
IN
PLACE CLOSE TO U8
NC
A
A PAGE TITLE
CELLULAR BASEBAND: CONTROL AND INTERFACES DRAWING NUMBER
Apple Inc.
051-1902 REVISION
A.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
33 OF 51 SHEET
41 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
BASEBAND: GPIOS U_BB_RF MDM9635M BI 9 5 24 5
OUT
24 5
OUT
D 5
OUT
5
IN
5
IN
5
IN 5
5
UART0_BB_TO_OWL_TX UART0_OWL_TO_BB_TX
I2S_AP_TO_BB_WS I2S_AP_TO_BB_TX I2S_BB_TO_AP_TX I2S_AP_TO_BB_CLK
OUT IN
BB_EEPROM_I2C_SDA BB_EEPROM_I2C_SCL
9 9
26 11 9 8 7
C
PP_1V8_LDO6 1
R3412_RF 10K
1% 1/32W MF 01005 2 RADIO_BB NOSTUFF
1
R3411_RF 10K
1% 1/32W MF 01005 2 RADIO_BB NOSTUFF
FAST_BOOT_SELECT0
9
FAST_BOOT_SELECT0 FAST_BOOT_SELECT1
9
FAST_BOOT_SELECT1
9
9 5
STUFF R3411 FOR PCIE BOOT (UNFUSED BB) STUFF R3412 FOR USB BOOT (UNFUSED BB)
BB_TO_AP_GSM_TXBURST_IND
OUT
Y17 Y16 W16 W17 L22 NC L23 NC L20 NC M23 NC W6 Y5 W5 NC AA4 NC AA22 Y23 W21 Y22 P22 NC R23 NC R22 NC T22 NC H24 NC H23 NC J23 J22 K22 NC Y4 NC P5 NC P3 NC P2 NC P1 NC N5 NC N3 NC N2 N1 NC M5 M3 NC M2 L2 NC D2 NC C2
NC
OPTION SEL2 SEL1 SEL0 GPIO 35 34 32 PCIE 0 0 1 HSUSB 0 1 0 HSIC 0 1 1
BGA SYM 3 OF 8
GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14 GPIO_15 GPIO_16 GPIO_17 GPIO_18 GPIO_19 GPIO_20 GPIO_21 GPIO_22 GPIO_23 GPIO_24 GPIO_25 GPIO_26 GPIO_27 GPIO_28 GPIO_29 GPIO_30 GPIO_31 GPIO_32 GPIO_33 GPIO_34 GPIO_35 GPIO_36 GPIO_37 GPIO_38 GPIO_39
GPIO RADIO_BB
GPIO_40 GPIO_41 GPIO_42 GPIO_43 GPIO_44 GPIO_45 GPIO_46 GPIO_47 GPIO_48 GPIO_49 GPIO_50 GPIO_51 GPIO_52 GPIO_53 GPIO_54 GPIO_55 GPIO_56 GPIO_57 GPIO_58 GPIO_59 GPIO_60 GPIO_61 GPIO_62 GPIO_63 GPIO_64 GPIO_65 GPIO_66 GPIO_67 GPIO_68 GPIO_69 GPIO_70 GPIO_71 GPIO_72 GPIO_73 GPIO_74 GPIO_75 GPIO_76 GPIO_77 GPIO_78 GPIO_79
D1 F22 G20 G23 C23 C24 D22 D23 E22 F20 E2 W4 R5 R2 W3 T5 A2 B2 U3 R3 T2 Y2 AA3 U2 K20 U6 U5 Y3 U1 U17 V3 W22 E20 A23 B23 B24 Y19 W19 Y18 W18
BB_TO_AP_GPS_TIME_MARK 50_GSM_TX_PHASE
OUT
5
OUT
15
NC NC 75_RFFE3_SDATA_BB 75_RFFE3_SCLK_BB 75_RFFE4_SDATA_BB 75_RFFE4_SCLK_BB 75_RFFE5_SDATA_BB_BUFFER 75_RFFE5_SCLK_BB_BUFFER
BI
5 23
BI
5 12
BI
5 9
D
9
9
OUT
5 9
OUT
5 25
IN
5 25
NC NC UART_BB_TO_WLAN_COEX_TX UART_WLAN_TO_BB_COEX_TX PCIE0_AP_TO_BB_DEV_WAKE BB_TO_AP_RESET_DET_L AP_TO_BB_COREDUMP_TRIG BB_DEBUG_ERROR
IN
5
OUT
5
IN
5
OUT
5
BUFFER ON RFFE5 SCLK/SDATA_A IS OUTPUT
NC AP_TO_BB_IPC_GPIO
5
BI
UBUFR_RF
NC PCIE0_BB_TO_PMU_HOST_WAKE_L
OUT
5
RF1361
NC NC
WLCSP PCIE0_AP_TO_BB_CLKREQ_L PCIE0_AP_TO_BB_PERST_L AP_TO_BB_MESA_ON_L
5 9
BI IN
5
IN
5
9 5
NC NC
9 5
SIM1_REMOVAL_ALARM
NC NC
OUT
75_RFFE5_SCLK_BB_BUFFER
1
10
C3407_RF 51PF 5%
BI
5 17 18 19 20 21 22
BI
5 16
2 SCLK
75_RFFE5_SDATA_BB_BUFFER
2 16V NP0-C0G
RF_SOC2BB_I2S_MCLK 75_RFFE2_SDATA_BB 75_RFFE2_SCLK_BB 75_RFFE1_SDATA_BB 75_RFFE1_SCLK_BB SIM1_IO SIM1_TRAY_DET SIM1_RST SIM1_CLK
GPO1 1 GPO2 8
4 VIO
23 22 21 20 19 18 17 12 11 2 PP_1V8_LDO15
01005 RADIO_BB
1
SCLK_A 5
3 SDATA
C3405_RF 51PF 5%
2 16V NP0-C0G
1
R3402_RF 0.00
1% 1/32W MF 01005 2 RADIO_BB
9 5 3
R3403_RF 10K
RADIO_BB OMIT
SIM1_TRAY_DET
1
1
1% 1/32W MF 2 01005 RADIO_BB
0201 RADIO_BB
1
R3406_RF 100K
9
1% 1/32W MF 01005 RADIO_BB 2
BB_EEPROM_I2C_SCL
B1 SCL
WLCSP RADIO_BB
SDA B2
BI
3 5
IN
3 5 9
OUT
3 5
OUT
3 5
RFFE CLOCK FILTERS 9
R3407_RF 0.00 2 1
75_RFFE1_SCLK_BB
75_RFFE1_SCLK_FILT
0% 1/32W MF 01005 RADIO_BB
1
75_RFFE2_SCLK_FILT 1
9
1
B OUT
23
OUT
12
C3403_RF 10PF 5%
16V 2 CERM
01005 NOSTUFF RADIO_BB
R3410_RF 0.00 2 1
75_RFFE4_SCLK_BB
C3402_RF 10PF
75_RFFE3_SCLK_FILT
0% 1/32W MF 01005 RADIO_BB
9
17 18 19 20 21 22
5% 2 16V CERM 01005 NOSTUFF RADIO_BB
R3409_RF 0.00 2 1
75_RFFE3_SCLK_BB
OUT
C3401_RF 10PF 01005 NOSTUFF RADIO_BB
7 8 9 11 26
9
16
5%
R3408_RF 0.00 2 1
75_RFFE2_SCLK_BB
OUT
2 16V CERM
75_RFFE4_SCLK_FILT
0% 1/32W MF 01005 RADIO_BB
1
C3404_RF 10PF 5%
2 16V CERM
VSS
01005 NOSTUFF RADIO_BB
A2 9 5
2 3 5
PLACE C3405_RF CLOSE TO BUFFER PLACE C3407_RF CLOSE TO MDM
1% 1/32W MF 2 01005 RADIO_BB
BB_EEPROM_I2C_SDA
C 75_RFFE5_SDATA_BB
RADIO_BB
UEPRM_RF CAT24C08C4A
PP_1V8_LDO6
0.00 2
9
VCC 26 11 9 8 7
1
9
C3406_RF 1 R3404_RF 1UF 20% 10K 10V
2 X5R
2 3 5
0% 1/32W MF 01005
0% 1/32W MF 01005 RADIO_BB PP_1V8_LDO6
0% 1/32W MF 2 01005
75_RFFE5_SCLK_BB
R3413_RF
BB EEPROM
1
R3401_RF 10K
0.00 2
RADIO_BB
SIM2_DETECT
A1
B
1
0% 1/32W MF 01005
75_SDATA_A
9 9 5
75_SCLK_A
01005 RADIO_BB
VIETMOBILE.VN
PP_1V8_LDO6
5
R3414_RF
NC
SDATA_A 6
NOSTUFF R3402 WHEN VINYL PRESENT STUFF R3402 WHEN VINYL NOT PRESENT 26 11 9 8 7
RFFE_BUFFER_LAT_GPIO1
GND
SIM2_DATA SIM2_DETECT SIM2_RESET SIM2_CLK
7
24 5
PCIE0_AP_TO_BB_CLKREQ_L
RFFE USAGE TABLE A
RFFE1 RFFE2 RFFE3 RFFE4 RFFE5
PCIE PULL-UPS TO BB RAIL
WTR LB/MB/HB PAD, 2G PA, LB/MB/HB ASM DIV ASM CELLULAR BASEBAND: GPIOS QPOET 051-1902 Apple Inc. DIV LNA, ANT TUNERS A.0.0 PAGE TITLE
DRAWING NUMBER
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
A
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
34 OF 51 SHEET
42 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
PMU: CONTROL AND CLOCKS RESET AND CONTROL: PMU
D
D 5
HW_REV2_ID
1.80V 0.12V
C
0.10V 0.30V 0.50V 0.70V 0.90V 1.10V 1.20V 1.31V 1.43V 1.55V 1.67V 1.80V
R3505 51.1K 51.1K 51.1K 51.1K 51.1K 51.1K 100K 105K 51.1K 51.1K 51.1K -
R3501_RF 1.00K 2 1
AP_TO_BB_RST_L
1% MF 1/32W 01005 RADIO_PMIC
R3502 R3503 CONFIG 698K MLB 698K 51.1K SELF GEN
R3504 887K 255K 124K 82.5K 51.1K 31.6K 50K 39K 13.3K 8.25K 3.92K 10K
HW_REV_ID
IN
8
IN
R3507_RF 20.0K 2 1
PS_HOLD
5% MF 1/32W 01005 RADIO_PMIC
REVISION DEV1 DEV2 DEV3 DEV4/PROTOMLB1 PROTOMLB2 DEV5/PROTO1 PROTO2 EVT EVT_ALT CARRIER BUILD DVT PVT
U_PMU_RF PMD9635 5
AP_TO_BBPMU_RADIO_ON_L
IN
5
PMU_TO_BBPMU_RESET_L PMIC_RESOUT_L PS_HOLD_PMIC SPMI_CLK SPMI_DATA
IN
8 5
OUT
8 5
BI
8 5
BI
58 75 43 63 82 25 31
CBL_PWR* PON_1 RESIN* PON_RST* PS_HOLD SPMI_CLK SPMI_DATA
WLNSP SYM 1 OF 5 CONTROL RADIO_PMIC
U_PMU_RF PMD9635 OPT_1 OPT_2 GND BAT_ID_THERM
52 42 98 53
NC NC
WLNSP SYM 5 OF 5 GND GND GND GND GND
36 46 57 62
GND 67
MPPS AND GPIOS: PMU
C PP_1V8_LDO7
1 1
R3502_RF 698K
1% 1/32W MF 2 01005 RADIO_PMIC
R3504_RF 10K
7 10 11
REV_ID PVT
U_PMU_RF PMD9635
1% 1/32W MF 2 01005
RADIO_PMIC
NC HW_REV1_ID VDDPX_BIAS_UIM2 HW_REV2_ID VREF_DAC_BIAS
13 51 61 9 4 20 83 88
MPP_01 MPP_02 MPP_03 MPP_04 MPP_05 MPP_06 PA_THERM1 PA_THERM2
WLNSP SYM 3 OF 5 GPIO_MPP RADIO_PMIC
GPIO_01 GPIO_02 GPIO_03 GPIO_04 GPIO_05 GPIO_06
26 15 21 37 32 38
NC STOCKHOLM_TO_BBPMU_CLK_REQ
VIETMOBILE.VN 7
OUT
8
1
R3503_RF 51.1K
1% 1/32W MF 2 01005 RADIO_PMIC OMIT
OUT
NC NC NC
1
R3505_RF 51.1K
1% 1/32W MF 2 01005
IN
5 26
IN
5
IN
9
IN
5
NC
USB_BB_VBUS_DETECT SIM1_REMOVAL_ALARM TOUCH_TO_BBPMU_FORCE_PWM
1
NOSTUFF
R3508_RF 100K
1% 1/32W MF 2 01005
RADIO_PMIC NOSTUFF
RADIO_PMIC
B
B 11 10 7
IN
PP_1V8_LDO7
XTAL AND CLOCK: PMU 1 1
C3501_RF 0.1UF 20%
2 6.3V X5R-CERM
01005 RADIO_PMIC
R3506_RF 100K
1% 1/32W MF 2 01005
Y_XO_RF 19.2MHZ-10PPM-7PF-80OHM 10 10
1
XTAL_19P2M_OUT XO_THERM
C3502_RF 1000PF
2.0X1.6-SM 1 3
4
XTAL_19P2M_IN
10
U_PMU_RF PMD9635
2
RADIO_PMIC 8 5
10% 2 10V X5R 01005 RADIO_PMIC
XO_OUT_D0_EN
IN 10
2
10
XW3501_RF
10
SHORT-10L-0.1MM-SM OMIT
1 PLACE
AT U2_RF.41
56
BB_CLK_EN
XO_THERM XO_ADC_GND
76 41
XO_THERM GND_XOADC
XTAL_19P2M_IN XTAL_19P2M_OUT
55 65 71
XTAL_19M_IN XTAL_19M_OUT GND_XO_CLK
WLNSP SYM 2 OF 5 CLOCK RADIO_PMIC
LN_BB_CLK 45 BB_CLK 35 RF_CLK1 66 RF_CLK2 77 SLEEP_CLK 72
R3509_RF 0.00 1
50_MDM_19P2M_CLK_PMU 50_WTR_19P2M_CLK 50_BBPMU_TO_STOCKHOLM_19P2M_CLK
OUT
16
OUT
5 26
50_SLEEP_CLK_32K
OUT
5 8
2
50_MDM_PCIE_CLK 50_MDM_19P2M_CLK
OUT
5 8
OUT
8
0% 1/32W MF 01005 RADIO_PMIC
GND_XO_CLK: VIA DOWN TO GND PLANE
A
A PAGE TITLE
CELLULAR PMU: CONTROL AND CLOCKS DRAWING NUMBER
Apple Inc.
051-1902 REVISION
A.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
35 OF 51 SHEET
43 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
PMU: SWITCHERS AND LDOS SWITCHERS BULK CAPS 26 20 17 11 5 12 18 25
I296 PP_VCC_MAIN
IN
VBATT_S1
11
VBATT_S1
11
XW3601_RF
1
D
SHORT-10L-0.25MM-SM
C3640_RF C3616_RF 1
15UF
1
15UF
RADIO_PMIC
D
OMIT
20% 2 6.3V X5R 0402-1
20% 2 6.3V X5R 0402-1
2
XW3602_RF
SHORT-10L-0.25MM-SM 1
11 S1_GND
RADIO_PMIC
2
OMIT
L3601_RF
XW3603_RF
1UH-20%-0.054OHM-3.4A
SHORT-10L-0.25MM-SM 1 26 20 17 11 5 12 18 25
I295 VBATT_S2
1
IN
2
PP_VSW_S2 VOLTAGE=1.225V
XW3605_RF 1
2
VBATT_S3
11
VBATT_S3 1
C3634_RF 4.7UF
1
5 16 6 17 28 33
VBATT_S1
11
C3618_RF 15UF
20% 2 6.3V CER-X5R 0402
20% 2 6.3V X5R 0402-1
RADIO_PMIC
XW3606_RF
SYM 4 OF 5 POWER
VDD_S1 VDD_S1 GND_S1 GND_S1 GND_S1 GND_S1
1
2
11
92 103 102
VBATT_S2
OMIT
XW3607_RF
C
11
S2_GND
2
11
VBATT_S3
OMIT
11
S3_GND
XW3608_RF
26 25 20 18 17 12 11 5
11
SHORT-10L-0.25MM-SM 1 2 S3_GND
I275 IN
11
VBATT_S4
11
11
XW3609_RF
1
VBATT_S5
SHORT-10L-0.25MM-SM
C3619_RF
1
15UF
20% 2 6.3V X5R 0402-1
11
XW3610_RF
SHORT-10L-0.25MM-SM 11
1
S4_GND
S5_GND
2 11
IN
PP_1V225_SMPS2
7 6 11
IN
PP_1V0_SMPS3
IN
PP_1V85_SMPS4
OMIT
RADIO_PMIC 26 25 20 18 17 12 11 5
VBATT_S4
OMIT VBATT_S4
PP_VCC_MAIN
11
2 13 11
OMIT
I274 IN
PP_VCC_MAIN
VBATT_S5
11
VBATT_S5
11
XW3611_RF
1
C3620_RF 15UF
20% 2 6.3V X5R 0402-1
RADIO_PMIC
SHORT-10L-0.25MM-SM 1
11 26 20 17 11 5 12 18 25
IN
PP_1V0_SMPS5
IN
PP_VCC_MAIN
XW3612_RF
8
SHORT-10L-0.25MM-SM 1
OUT
2
VDD_S2 VDD_S2 GND_S2
PP_VSW_S3 VOLTAGE=1.0V
1
70 49 54
VDD_S3 GND_S3 GND_S3
VREG_S3 69 VSW_S3 59 VSW_S3 64
8 1 7
VDD_S4 GND_S4 GND_S4
VREG_S4 12 VSW_S4 2
94 93
VDD_S5 GND_S5
VREG_S5 87 VSW_S5 99
86
VDD_L1_2_16
44
VDD_L3_4
14
VDD_L5_6_15
23
VDD_L7_8
89
VDD_L9
90 47
VIN_VPH1 VIN_VPH2
MDM_VREF_LPDDR2
78
VREF_DDR
AVDD_BYP
74 79
AVDD_BYP REF_BYP
68
GND_REF
24
VDD_XO_RF
REF_BYP
B
1
C3621_RF 1UF
20% 2 10V X5R 0201 RADIO_PMIC
1
C3622_RF 0.1UF
20% 2 6.3V X5R-CERM 01005
RADIO_PMIC
REF_BYP_GND
1
1
RADIO_PMIC
2
PP_VSW_S4
0603 S3_GND
1 0806
1
RADIO_PMIC
PP_VSW_S5 VOLTAGE=1.0V
PP_1V0_SMPS3 VOLTAGE=1.0V
OUT
6 7 11
HIGH VOLTAGE LDOS TCXO SHUTDOWN: ON
653MA
PP_1V85_SMPS4 VOLTAGE=1.85V
OUT
11 13
1
11
0806
1
VREG_XO_GND
VREG_RF_CLK
11
1UF
VREG_RF_CLK_GND
1
C3632_RF
1
15UF
11
XW3615_RF
1
1
SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN: SHUTDOWN:
ON ON ON OFF ON ON OFF ON OFF ON ON OFF ON OFF OFF
PP_1V5_LDO1 PP_1V2_LDO2 PP_0V9_LDO3 PP_0V95_LDO4 PP_1V7_LDO5 PP_1V8_LDO6 PP_1V8_LDO7 PP_1V8_LDO8 PP_1V0_LDO9 PP_3V075_LDO10 PP_UIM1_LDO11 PP_2V7_LDO12 PP_UIM2_LDO13 PP_2V8_LDO14 PP_1V8_LDO15
OUT
7
OUT
7
OUT
6
OUT
7
OUT
7
OUT
7 8 9 26
OUT
7 10
OUT
7
OUT
13
OUT
7
OUT
3 5 7 11
OUT
2
OUT
5 7 24
OUT
2 21 22 23
OUT
2 9 12 17 18 19 20 21 22 23
4.7UF
20% 2 6.3V X5R 0402-1
C3624_RF 1UF
20% 2 6.3V CER-X5R 0402
RADIO_PMIC
1
RADIO_PMIC NOSTUFF
20% 2 10V X5R 0201 RADIO_PMIC NOSTUFF 1
C3635_RF 1
C3603_RF 1UF
C3627_RF 10UF
20% 2 6.3V CERM-X5R 0402-9
20% 2 10V X5R 0201 RADIO_PMIC
RADIO_PMIC
1
1
C3605_RF 1UF
20% 2 10V X5R 0201 RADIO_PMIC
1
C3606_RF 1UF
C3608_RF 1UF
20% 2 10V X5R 0201 RADIO_PMIC
20% 2 10V X5R 0201 RADIO_PMIC
C3625_RF 10UF
1
20% 2 6.3V CERM-X5R 0402-9 11
C3626_RF
1
4.7UF
20% 2 6.3V CER-X5R 0402
RADIO_PMIC
SHORT-10L-0.1MM-SM OMIT
1
20% 2 10V X5R 0201 RADIO_PMIC
4.7UF
20% 2 6.3V X5R 0402-1
20% 2 6.3V CER-X5R 0402
RADIO_PMIC
PLACE XW CLOSE TO PMU VIA XW DOWN TO THE GND PLANE
C3607_RF 1UF
C3633_RF1 C3636_RF 15UF
RF_CLK_GND
1
C3629_RF 1UF
20% 2 10V X5R 0201 RADIO_PMIC
RADIO_PMIC
XW3614_RF
TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO TCXO
B
20% 2 10V X5R 0201 RADIO_PMIC
2
XO_GND
11
11
MDM LOW VOLTAGE ANALOG MDM EBI1, DDR CORE MDM CORE MDM PCIE MDM HIGH VOLTAGE ANALOG MDM 1.8V I/O, DDR, SHARED 1.8V VOLTAGE RAIL MDM PLL MDM LOW VOLTAGE USB WTR MDM HIGH VOLTAGE USB UIM1 GPS LNA UIM2 FRONT END SUPPLY RFFE VIO
VOLTAGE=1.5V VOLTAGE=1.2V VOLTAGE=0.9V VOLTAGE=0.95V VOLTAGE=1.7V VOLTAGE=1.8V VOLTAGE=1.8V VOLTAGE=1.8V VOLTAGE=1.0V VOLTAGE=3.075V VOLTAGE=1.8V VOLTAGE=2.7V VOLTAGE=1.8V VOLTAGE=2.8V VOLTAGE=1.8V
VREG_XO 11 VREG_XO_GND 11 VREG_RF_CLK 11 VREG_RF_CLK_GND
2
SHORT-10L-0.1MM-SM OMIT
OUT
C3613_RF 43UF 0603 S5_GND
1 C3631_RF
11
PP_1V0_SMPS5 VOLTAGE=1.0V
20%
1
11
700MA
LDO9->WTR TCXO SHUTDOWN: OFF
2
2 4V X5R
34 40 60 50
VREG_XO
C
C3612_RF 43UF
20% 2 4V X5R 0603 S4_GND
RADIO_PMIC
VREG_XO GND_XO VREG_RF GND_RF_CLK
20% 2 10V X5R 0201 RADIO_PMIC
1
2234MA
11
2
L3605_RF
VREG_L1 VREG_L2 VREG_L3 VREG_L4_16 VREG_L5 VREG_L6 VREG_L7 VREG_L8 VREG_L9 VREG_L10 VREG_L11 VREG_L12 VREG_L13 VREG_L14 VREG_L15
1UF
SHORT-10L-0.1MM-SM OMIT
MDM MEMORY, MDM USB TCXO SHUTDOWN: ON
2 4V X5R
2.2UH-20%-0.14OHM-1.6A
80 81 39 48 19 3 18 29 100 84 95 85 96 101 30
1 C3630_RF
XW3613_RF
11
C3611_RF 43UF
2.2UH-20%-0.14OHM-1.6A
R3603_RF 0.00
0% 1/32W MF 2 01005
OUT
11
2 0806
VOLTAGE=1.85V
VDD_OTP
OMIT
0603 S2_GND
1.0UH-20%-2.7A-0.056OHM
L3604_RF
73
VDD_OTP
PP_1V225_SMPS2 VOLTAGE=1.225V
C3610_RF 43UF
VIETMOBILE.VN
2
587MA
20%
VREG_S2 91 VSW_S2 97
OMIT 11 S5_GND
0603 NOSTUFF LOW VOLTAGE LDOS TCXO SHUTDOWN: ON
2 4V X5R
L3603_RF
10 11 22 27
VREG_S1 VSW_S1 VSW_S1 VSW_S1
SHORT-10L-0.25MM-SM 1
C3614_RF 43UF
20%
SHORT-10L-0.25MM-SM
RADIO_PMIC
1
RADIO_PMIC
6 11
20%
2 0806
WLNSP
11
1
OUT
2 4V X5R
0603 S1_GND
11
PMD9635
OMIT
PP_VCC_MAIN
1
U_PMU_RF
SHORT-10L-0.25MM-SM S2_GND
C3609_RF 43UF
2 4V X5R
2.2UH-20%-0.14OHM-1.6A
OMIT
I279 25 20 12 11 5 18 17 26
1
L3602_RF
XW3604_RF
20% 2 6.3V X5R 0402-1
RADIO_PMIC
RADIO_PMIC
20%
SHORT-10L-0.25MM-SM
15UF
RADIO_PMIC
2520
VOLTAGE=0.9V PP_0V9_SMPS1
3400MA
MDM MODEM TCXO SHUTDOWN: ON
2
11
C3615_RF 1 C3617_RF 15UF 20%
2 6.3V X5R 0402-1
1
11
VBATT_S2
1
PP_VSW_S1 VOLTAGE=0.9V
OMIT
PP_VCC_MAIN
IN
2
RADIO_PMIC NOSTUFF
XW3616_RF OMIT SHORT-10L-0.25MM-SM
A
11 6
PP_0V9_SMPS1
1
BB_TO_PMU_AMUX_SMPS1
2
OUT
PAGE TITLE
XW3617_RF OMIT SHORT-10L-0.25MM-SM 11 7 6
PP_1V0_SMPS3
1
2
A
5
BB_TO_PMU_AMUX_SMPS3
CELLULAR PMU: SWITCHERS AND LDOS OUT
5
DRAWING NUMBER
XW3618_RF
OMIT SHORT-10L-0.25MM-SM 13 11
PP_1V85_SMPS4
1
2
BB_TO_PMU_AMUX_SMPS4
Apple Inc. OUT
5
PP_UIM1_LDO11
1
2
BB_TO_PMU_AMUX_LDO11_SIM1
NOTICE OF PROPRIETARY PROPERTY: OUT
7
6
5
4
3
A.0.0 BRANCH
5
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
REVISION
R
XW3619_RF OMIT SHORT-10L-0.25MM-SM 11 7 5 3
051-1902
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
PAGE
36 OF 51 SHEET
44 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
PMU: ET MODULATOR D
D
L3704_RF FERR-22-OHM-1A-0.055OHM 1
PP_QPOET_VDD_CLASS_AB_AMP VOLTAGE=4.0V
STAR ROUTING
C 26 25 20 18 17 11 5
IN
1
C3701_RF 10UF
CAN BE DELETED IF NEARBY BULK CAPACITANCE IS AVAIALBLE TO BE SHARED
0201 RADIO_QPOET
12
C
C3705_RF 22UF
20% 2 10V X5R-CERM 0603-1 RADIO_QPOET
PP_VCC_MAIN 1
PP_QPOET_VDD_BOOST_OUT VOLTAGE=4.0V
2
GROUND CLOSE TO U4_RF.3
20% 2 6.3V CERM-X5R 0402-9
U_QPT_RF QFE1100
L3702_RF FERR-22-OHM-1A-0.055OHM
RADIO_QPOET
1
2
0201 RADIO_QPOET
1
19 18 17 12
PP_QPOET_BYP_BATT PP_QPOET_VCC_PA
10UF
20% 2 6.3V CERM-X5R 0402-9
8 8
RADIO_QPOET
9 5
VOLTAGE=0.0V
9
2
IN IN
BI
IN
ET_DAC_P ET_DAC_N
VDD_BUCK
27
GND_BUCK
VDD_1P8 17
7 2
AMP_INP AMP_INM
VSW_BUCK 23
75_RFFE4_SCLK_FILT
21
NC
13 20
L3701_RF
2.2UH-20%-0.3A-0.38OHM 2
L3703_RF
1.5UH-20%-2.2A-0.11OHM
PP_QPOET_VSW
1
VOLTAGE=4.0V
AMP_OUT 4
SDATA
PP_VBATT_PA_BOOST VOLTAGE=4.3V
VSW_BOOST
19
USID_LSB
22
GND
24
GND_BOOST
C3706_RFRADIO_QPOET 10UF
20% 2 6.3V CERM-X5R 0402-9
RADIO_QPOET
2
LQE2M-SM
PP_QPOET_VCC_PA VOLTAGE=4.3V
OUT
C_GSM 6
NC
PA_VBAT 18
NC
1
C3707_RF 4.7UF
12 17 18 19
C3708_RF 470PF 10%
20% 2 6.3V X5R-CERM1 402 RADIO_QPOET
2 10V X5R
01005 RADIO_QPOET QPOET_CLASS_AB_AMP_SNUBBER
PLACE RC SNUBBER CLOSE TO U_QPOET_RF.4
VOUT_BOOST 25
1
R3703_RF 2.2
GND 1
RADIO_QPOET
2 9 11 17 18 19 20 21 22 23
PP_QPOET_APT_CAP_SWITCH_IN VOLTAGE=4.0V
C_SW_BUCK 8 C_SW_BUCK 9
MPP1
IN
RADIO_QPOET
C_BUCK 11 C_BUCK 12
SCLK
PP_1V8_LDO15
2 01005
1
1
AT U_QPOET_RF.27
0603
1
VDD_BATT 15 VDD_BATT 16 VDD_AMP 5
26
SHORT-10L-0.25MM-SM OMIT
B
RADIO_QPOET
28
75_RFFE4_SDATA_BB
XW3701_RF
1
BYP_BATT BYP_LOAD
PP_1V8_QPOET_VDD VOLTAGE=1.8V
VIETMOBILE.VN OUT
PP_QPOET_BUCK_GND
C3702_RF
1 PLACE
14 10
VOLTAGE=4.3V VOLTAGE=4.3V
BGA
L3705_RF
120-OHM-210MA
B
5% 1/32W MF 2 01005 RADIO_QPOET
GND_AMP 3 PP_QPOET_VDD_BOOST_OUT
12
GROUND RESISTOR CLOSE TO U_QPOET_RF.3 1
C3704_RF 10UF
20% 2 10V X5R-CERM 0402-8
RADIO_QPOET
VOLTAGE=0.0V PP_QPOET_BOOST_GND
ROUTE CAP GROUND BACK TO U_QPOET_RF.24
2
XW3702_RF
SHORT-10L-0.25MM-SM OMIT
1
PLACE AT U_POET_RF.24
A
A PAGE TITLE
CELLULAR PMU: ET MODULATOR DRAWING NUMBER
Apple Inc.
051-1902 REVISION
A.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
37 OF 51 SHEET
45 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
TRANSCEIVER: POWER D
D STAR ROUTING
11
PP_1V0_LDO9
IN 1
C3815_RF
4.7UF
20% 2 6.3V CER-X5R 0402
RADIO_TRANSCEIVER
1
C3801_RF
4.7UF
20% 2 6.3V CER-X5R 0402
R3801_RF 0 2 1 5% 1/20W MF 0201 RADIO_TRANSCEIVER
1
C3802_RF 0.1UF
10% 2 6.3V CERM-X5R 0201
RADIO_TRANSCEIVER
RADIO_TRANSCEIVER
R3802_RF 0 2 1 5% 1/20W MF 0201 RADIO_TRANSCEIVER
1
C3803_RF
OMIT
1
10% 2 6.3V CERM-X5R 0201
OMIT
PP_VDD_RF1_RX1 VOLTAGE=1.0V 1
C3805_RF 0.1UF
10% 2 6.3V CERM-X5R 0201
RADIO_TRANSCEIVER
XW3803_RF SHORT-10L-0.1MM-SM 1 2
OMIT
PP_VDD_RF1_RX2 VOLTAGE=1.0V 1
C3806_RF 0.1UF
10% 2 6.3V CERM-X5R 0201
RADIO_TRANSCEIVER
WLPSP
0201 RADIO_TRANSCEIVER NOSTUFF
25MA 1
C3811_RF 27PF
88 67
VDD_RF2_LDO_BYPASS
SYM 4 OF 5 PWR VDD_RF1_TVCO RADIO_TRANSCEIVER VDD_RF1_TSIG
1
45
VDD_RF1_DIG
64
VDD_RF1_RX1
VDD_RF2_LDO
23
49
VDD_RF1_RX2
VDD_RF2
30
C3807_RF 1UF
20% 2 10V X5R 0201 RADIO_TRANSCEIVER
5%
2 25V C0G
0201 RADIO_TRANSCEIVER NOSTUFF
RADIO_TRANSCEIVER
XW3802_RF
U_WTR_RF WTR3925
5%
PP_VDD_RF1_DIG VOLTAGE=1.0V
C3804_RF
WLPSP
C3810_RF 27PF
2 25V C0G
0.1UF
SHORT-10L-0.1MM-SM 1 2
C3809_RF 27PF
175MA
RADIO_TRANSCEIVER
1
U_WTR_RF WTR3925
5% 2 25V C0G 0201 RADIO_TRANSCEIVER NOSTUFF
0.1UF
XW3801_RF SHORT-10L-0.1MM-SM 1 2
1
PP_VDD_RF1_TX VOLTAGE=1.0V
10% 2 6.3V CERM-X5R 0201
C
35MA
PP_VDD_RF1_TX_VCO VOLTAGE=1.0V
345MA
PP_1V85_SMPS4
40MA
IN
3
GND
58 56 42 72
GND GND GND GND
28 84 21 91 20 90 19 89 102
GND GND GND GND GND GND GND GND GND
55
GND
SYM 5 OF 5 GND RADIO_TRANSCEIVER
11
VIETMOBILE.VN 1
1
1
C3808_RF 0.47UF
4700PF
10% 2 6.3V X5R 01005
20% 2 4V CERM-X5R-1 201 RADIO_TRANSCEIVER
C3812_RF 27PF 5%
2 25V C0G
C3814_RF
RADIO_TRANSCEIVER
GND
94
GND GND GND GND GND GND GND
87 81 17 52 37 36 61
GND GND
53 54
GND GND GND GND GND GND GND GND GND
57 82 83 26 27 71 63 41 48
GND GND GND
38 25 31
C
0201 RADIO_TRANSCEIVER NOSTUFF
70MA
1
C3813_RF 27PF 5%
2 25V C0G
0201 RADIO_TRANSCEIVER NOSTUFF
B
B
A
A PAGE TITLE
CELLULAR TRANSCEIVER: POWER DRAWING NUMBER
Apple Inc.
051-1902 REVISION
A.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
38 OF 51 SHEET
46 OF 59
1
SIZE
D
8
7
6
5
4
TRANSCEIVER: PRX PORTS L3901_RF
17
IN
50_PRX_LB1_B8_GSM900_PAD
50_PRX_LB1_B8_GSM900_MATCH 0201
1
L3922_RF
RADIO_TRANSCEIVER
50_PRX_LB1_B8_GSM900
2% 16V CERM 01005 RADIO_TRANSCEIVER
3.0PF 1
2
1
DC BLOCKING CAP VALUES CANNOT BE MORE THAN 33PF
C3901_RF 27PF
15NH+/-3%-0.25A-0.7OHM
2
3
2
+/-0.1PF 16V NP0-C0G 01005
L3902_RF 15NH+/-3%-0.25A-0.7OHM
D 17
IN
50_PRX_LB2_B12_B17_B13_B28_PAD
RADIO_TRANSCEIVER NOSTUFF
2 50_PRX_LB2_B12_B17_B13_B28_MATCH
1
0201 RADIO_TRANSCEIVER
1
D 50_PRX_LB2_B12_B17_B13_B28
2
+/-0.1PF 16V NP0-C0G 01005
L3903_RF
50_PRX_LB3_B20_B26_B27_GSM850_PAD
2
2% 16V CERM 01005 RADIO_TRANSCEIVER
2.0PF
15NH+/-3%-0.25A-0.7OHM IN
1
C3913_RF 1
17
C3902_RF 27PF
RADIO_TRANSCEIVER NOSTUFF
C3903_RF 27PF
50_PRX_LB3_B20_B26_B27_GSM850_MATCH
2 0201
1
50_PRX_LB3_B20_B26_B27_GSM850
2% 16V CERM 01005 RADIO_TRANSCEIVER
C3914_RF
RADIO_TRANSCEIVER
2
22NH-3%-0.12A-3.2OHM 01005
RADIO_TRANSCEIVER NOSTUFF
L3904_RF 22NH-3%-0.25A 17
IN
50_PRX_LB4_B29_PAD
C3904_RF 27PF
2 50_PRX_LB4_B29_MATCH
1
0201 RADIO_TRANSCEIVER
1
C3915_RF
50_PRX_LB4_B29
2% 16V CERM 01005 RADIO_TRANSCEIVER
2.0PF 1
2
2
+/-0.1PF 16V NP0-C0G 01005
L3905_RF RADIO_TRANSCEIVER 4.7NH-3%-0.270A
C3905_RF 27PF
C
18
IN
50_PRX_MB1_B4CA_PAD
1
2
50_PRX_MB1_B4CA_MATCH
1
C3916_RF 2.2PF 1
RADIO_TRANSCEIVER
4.3NH+/-3%-0.5A 50_PRX_MB2_B1_B4_PAD
1
2
+/-0.1PF 16V NP0-C0G 01005-1
L3906_RF
IN
50_PRX_MB1_B4CA
2
01005 RADIO_TRANSCEIVER
2% 16V CERM 01005 RADIO_TRANSCEIVER
18
U_WTR_RF WTR3925
C3906_RF 27PF
50_PRX_MB2_B1_B4_MATCH
2
1
C3917_RF
RADIO_TRANSCEIVER
1
2
+/-0.1PF 16V NP0-C0G 01005
1
50_PRX_MB3_B3_GSM1800_MATCH
2
C3918_RF 2.2PF 1
50_PRX_MB5_B25_GSM1900_PAD
B
1
C3919_RF
2.2PF 1
0201
50_PRX_HB1_B7_PAD
1
2
L3911_RF
50_PRX_HB3_B38_B40_B41_PAD
RADIO_TRANSCEIVER OMIT
1
OUT
8
2
+/-0.1PF 16V NP0-C0G 01005
PRX_HB1 PRX_HB2 PRX_HB3 PRX_HB4
1
L3919_RF
50_PRX_MB5_B25_GSM1900
B
2
50_PRX_MLB6_B34_B39_B2CA
2
50_PRX_HB1_B7
2
50_PRX_HB3_B38_B40_B41
2% 16V CERM 01005 RADIO_TRANSCEIVER
1.3PF 2
A PAGE TITLE
CELLULAR TRANSCEIVER: PRX PORTS C3911_RF 27PF 1
0201
2
DRAWING NUMBER
Apple Inc.
50_PRX_HB4_B30
1.3PF 2
NOTICE OF PROPRIETARY PROPERTY:
+/-0.1PF 16V NP0-C0G 01005
RADIO_TRANSCEIVER OMIT
8
7
6
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
5
051-1902 REVISION
A.0.0
R
2% 16V CERM 01005 RADIO_TRANSCEIVER OMIT
C3922_RF 1
50_PRX_MLB6_B34_B39_B2CA IS ASSIGNED TO MB4
C3910_RF 27PF
RADIO_TRANSCEIVER
+/-0.1PF 25V C0G-CERM 201 L3912_RF RADIO_TRANSCEIVER 4.2NH-+/-0.1NH-0.5A-0.17OHM OMIT 1 2 50_PRX_HB4_B30_MATCH RADIO_TRANSCEIVER OMIT
73 65 85 79
2% 16V CERM 01005 RADIO_TRANSCEIVER
1.5PF
1
50_PRX_HB4_B30_PAD
50_PRX_CA2_Q
C3909_RF 27PF
RADIO_TRANSCEIVER
2 50_PRX_HB3_B38_B40_B41_MATCH
1 0201
IN
PRX_CA2_QP 33
2% 16V CERM 01005 RADIO_TRANSCEIVER
C3921_RF
3.8NH+/-0.1NH-0.5A
2
1
2
1
19
8
C3908_RF 27PF
50_PRX_HB1_B7_MATCH
RADIO_TRANSCEIVER OMIT
A
OUT
0201
+/-0.1PF 16V NP0-C0G 01005
0201
IN
50_PRX_CA2_I
RADIO_TRANSCEIVER
2.0PF
L3910_RF
50_PRX_MB3_B3_GSM1800
2
1
C3920_RF
3.4NH-+/-0.1NH-0.5A-0.17OHM
19
PRX_CA2_IP 39
2
1
IN
8
L3908_RF
RADIO_TRANSCEIVER
RADIO_TRANSCEIVER
19
OUT
C
5.1NH-3%-0.4A
2 50_PRX_MLB6_B34_B39_B2CA_MATCH
1
NC
0201
+/-0.1PF 16V NP0-C0G 01005-1
L3909_RF 50_PRX_MLB6_B34_B39_B2CA_PAD
50_PRX_CA1_Q
RADIO_TRANSCEIVER
50_PRX_MB5_B25_GSM1900_MATCH
2
4.3NH+/-3%-0.5A IN
8
2
RADIO_TRANSCEIVER
2% 16V CERM 01005 RADIO_TRANSCEIVER
18
1
+/-0.1PF 16V NP0-C0G 01005-1
C3912_RF 27PF IN
PRX_MB1 PRX_MB2 PRX_MB3 PRX_MB4 PRX_MB5 PRX_MLB6
OUT
6.2NH-3%-0.4A
2% 16V CERM 01005 RADIO_TRANSCEIVER
18
99 92 106 98 105 97
50_PRX_CA1_I
L3907_RF
RADIO_TRANSCEIVER
C3907_RF 27PF
IN
NC
2% 16V CERM 01005 RADIO_TRANSCEIVER
1.9PF
50_PRX_MB3_B3_GSM1800_PAD
50_PRX_MB2_B1_B4
WLPSP SYM 1 OF 5 PRX_LB1 PRX_CA1_IP 69 PRX PRX_LB2 RADIO_TRANSCEIVER PRX_CA1_QP 77 PRX_LB3 PRX_LB4
VIETMOBILE.VN 0201
18
2
104 96 103 95
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
39 OF 51 SHEET
47 OF 59
1
SIZE
D
8
7
6
5
4
3
2
1
TRANSCEIVER: DRX/GPS PORTS D
D
U_WTR_RF WTR3925
DRX MODULE PORTS ARE DC BLOCKED
WLPSP
C
23
IN
23
IN
23
IN
23
IN
23
IN
23
IN
23
IN
23
IN
23
IN
23
IN
23
IN
23
IN
DRX_CA1_IP
78
50_DRX_CA1_I
OUT
8
DRX_CA1_QP RADIO_TRANSCEIVER
70
50_DRX_CA1_Q
OUT
8
DRX_MB1 DRX_MB2 DRX_MB3 DRX_MB4 DRX_MB5 DRX_MLB6
DRX_CA2_IP
34
50_DRX_CA2_I
OUT
8
DRX_CA2_QP
40
50_DRX_CA2_Q
OUT
8
DRX_HB1 DRX_HB2 DRX_HB3 DRX_HB4
GNSS_BB_IP
18
50_GPS_RX_I
OUT
8
GNSS_BB_QP
32
50_GPS_RX_Q
OUT
8
50_DRX_LB1_B27_B29 50_DRX_LB2_B26_B13_B17_B12 50_DRX_LB3_B28 50_DRX_LB4_B8_B20
5 12 4 11
DRX_LB1 DRX_LB2 DRX_LB3 DRX_LB4
50_DRX_MB1_B1
15 22 7 14 6 13 43 50 29 35
NC
50_DRX_MB3_B4 50_DRX_MB4_B34_B39 50_DRX_MB5_B25 50_DRX_MLB6_B3
50_DRX_HB2_B7_B41C 50_DRX_HB3_B40_B41A 50_DRX_HB4_B30_B38_B41B
NC
SYM 2 OF 5 DRX_GPS
C
VIETMOBILE.VN 15
IN
NC
50_GPS_RX
2 10
GNSS_L2_IN GNSS_L1_IN
GPDATA
24
50_GSM_TX_PHASE
1
IN
9
C4000_RF 22PF
5% 2 16V CERM 01005
PLACE CAP CLOSE TO MDM GPIO14 IMPROVES RXBN BY 4DB
GPS FILTER
B
B
PLACE NEAR U_WTR FLGPS_RF GPS-COMPASS-GNSS
B8846 IN
50_DRX_GPS_LNA_OUT
2 3 5
GND GND GND
2
LGA RADIO_GPS 1 INPUT_UNBAL OUTPUT_UNBAL 4
L4908_RF 10NH-3%-0.170A 50_GPS_FILTER_OUT 1
1
2
50_GPS_RX
OUT
15
01005
C4906_RF 1.6PF +/-0.1PF
2 16V NP0-C0G
01005
A
A PAGE TITLE
CELLULAR TRANSCEIVER: DRX/GPS PORTS DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
A.0.0 BRANCH
PAGE
40 OF 51 SHEET
48 OF 59
1
SIZE
D
8
7
6
5
4
TRANSCEIVER: TX PORTS
2
3
1
C4110_RF 27PF 16
50_TX_LB3_B12_B17_B13_B28
1
50_TX_VLB_PA_IN_MATCH
2
OUT
17
2% 16V CERM 01005 RADIO_TRANSCEIVER
D
D U_WTR_RF WTR3925
C4112_RF 27PF
WLPSP IN
8
IN
8
IN
8
IN
8
OUT
8
OUT
9
IN
9 5
IN
76 75 68 60
TX_I_P TX_I_N TX_Q_P TX_Q_N
9 1
50_TX_FB_RX_I 50_TX_FB_RX_Q
47 62
75_RFFE1_SCLK_FILT 75_RFFE1_SDATA_BB
SYM 3 OF 5 TX_BB_IP TX TX_BB_IM RADIO_TRANSCEIVER TX_BB_QP TX_BB_QM TX_FB_IP TX_FB_QP RFFE_CLK RFFE_DATA
IN
50_WTR_19P2M_CLK
1
2 50_WTR_19P2M_WTR_IN
5% 16V NP0-C0G 01005 RADIO_TRANSCEIVER
TX_HMB1 TX_HMB2 TX_HMB3 TX_HMB4 TX_HMLB1 TX_HMLB2
C4101_RF 100PF 10
TX_LB1 TX_LB2 TX_LB3 TX_LB4
1
C4114_RF 1.0PF
+/-0.1PF 2 16V NP0-C0G 01005 NOSTUFF
46
XO_IN
TX_FBRX_P TX_FBRX_M
66 59 51 44 101 100 93 86 80 74 8 16
50_TX_LB1_LB_GSM
50_TX_LB4_B27_B26_B20_B8
1
50_TX_MB1_B1_B25_B34_B39 50_TX_HMB2_B38_B40_B41 50_TX_HMB3_B3_B4 50_TX_HMB4_B30_B7
16
TX_FB_RX_IN_N
OUT
20
OUT
18
OUT
19
OUT
18
16 16 16
RADIO_TRANSCEIVER 16
NC
TX_FB_RX_IN_P
17
16
FLFBR_RF DPX202690DT-0029B1SJ
50_TX_HMLB2_MB_GSM
OUT
2% 16V CERM 01005 RADIO_TRANSCEIVER
16
NC
50_TX_LB3_B12_B17_B13_B28 50_TX_LB4_B27_B26_B20_B8
50_TX_LB_PA_IN_MATCH
2
C4104_RF 27PF
0805
16
3 COM
HI
6 50_MB-HB_COUPLER_DIPLEXER_IN
4 COM
LO
1 50_LB_COUPLER_DIPLEXER_IN
16
IN
22
IN
21
50_TX_LB1_LB_GSM
1
2% 16V CERM 01005 RADIO_TRANSCEIVER
GND
PIN TX_HMB1 CANNOT BE ALLOCATED TO A HB DUE TO VCO PROXIMITY ON CHIP
50_TX_LB1_LB_GSM_MATCH
2
1
L4101_RF 10NH-3%-140MA
5 2
8
16
R4101_RF 0.00 2 50_TX_LB1_LB_GSM_PA_IN 1 0% 1/32W MF 01005 RADIO_TRANSCEIVER
01005 NOSTUFF RADIO_TRANSCEIVER 2
C4105_RF 27PF
C
16
50_TX_MB1_B1_B25_B34_B39
1
50_TX_MB1_B1_B25_B34_B39_PA_IN
2
C
2% 16V CERM 01005 RADIO_TRANSCEIVER
L4103_RF
VIETMOBILE.VN 1.2NH+/-0.1NH-0.550A
16
50_TX_HMB2_B38_B40_B41
1
50_TX_HMB2_B38_B40_B41_PA_IN
2
01005
RADIO_TRANSCEIVER
1
C4106_RF 1.4PF
+/-0.1PF 2 16V NP0-C0G 01005
RADIO_TRANSCEIVER
C4107_RF 27PF 16
50_TX_HMB3_B3_B4
50_TX_HMB3_B3_B4_MATCH
2
2% 16V CERM 01005 RADIO_TRANSCEIVER
B12/13 TX INTERSTAGE FILTER REMOVED
B
1
1
L4104_RF 10NH-3%-140MA
R4104_RF 0.00 2 50_TX_HMB3_B3_B4_PA_IN 1 0% 1/32W MF 01005 RADIO_TRANSCEIVER
B
01005 NOSTUFF RADIO_TRANSCEIVER 2
L4105_RF
3.3NH+/-0.1NH-290MA 16
50_TX_HMB4_B30_B7
50_TX_HMB4_B30_B7_MATCH 01005
RADIO_TRANSCEIVER OMIT 1
C4108_RF
R4105_RF 0.00 2 50_TX_HMB4_B30_B7_PA_IN 1
OUT
19
OUT
20
0% 1/32W MF 01005 RADIO_TRANSCEIVER
1.2PF
+/-0.1PF 2 16V NP0-C0G 01005-1
RADIO_TRANSCEIVER OMIT
C4109_RF 27PF 16
50_TX_HMLB2_MB_GSM
1
2
50_TX_HMLB2_MB_GSM_MATCH
2% 16V CERM 01005 RADIO_TRANSCEIVER
1
L4106_RF 10NH-3%-140MA
R4106_RF 0.00 2 50_TX_HMLB2_MB_GSM_PA_IN 1 0% 1/32W MF 01005 RADIO_TRANSCEIVER
01005 RADIO_TRANSCEIVER NOSTUFF
A
A
2 PAGE TITLE
CELLULAR TRANSCEIVER: TX PORTS DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
A.0.0 BRANCH
PAGE
41 OF 51 SHEET
49 OF 59
1
SIZE
D
8
7
6
5
4
2
3
LOW BAND PA+DUPLEXERS
1
C4205_RF
5.6NH+/-3%-0.4A 50_PAD_ANT_B12
1
50_LB_ASM_IN_B12
2
BI
21
0201
RADIO_LB_PAD 1
L4203_RF
1
1.5PF
120-OHM-210MA
D
22 21 20 19 18 9
IN
75_RFFE2_SCLK_FILT
1
L4222_RF
BI
75_RFFE2_SDATA_BB
1
120-OHM-210MA 23 22 21 20 19 18 12 11 9 2
IN
1
RADIO_LB_PAD
IN
2
PP_VCC_MAIN
BI
21
BI
21
BI
21
1
RADIO_LB_PAD
RADIO_LB_PAD 1
PP_1V8LBPAD_VIO VOLTAGE=1.8V
2
1
50_LB_ASM_IN_B28B_B29
2 0201
L4204_RF
L4213_RF
0.3PF
39NH-5%-120MA
+/-0.05PF 2 25V C0G-CERM 0201
0201
RADIO_LB_PAD NOSTUFF
RADIO_LB_PAD
L4223_RF
IN
1
75_RFFE2_SDATA_LBPAD
2
120-OHM-210MA 26 25 20 18 12 11 5
D
4.2NH-+/-0.1NH-0.5A-0.17OHM 50_PAD_ANT_B28B_B29
RADIO_LB_PAD
PP_QPOET_VCC_PA
RADIO_LB_PAD NOSTUFF
75_RFFE2_SCLK_LBPAD
C4206_RF
01005 19 18 12
RADIO_LB_PAD
2
01005
L4224_RF
PP_1V8_LDO15
+/-0.1PF 2 25V C0G-CERM 0201
01005
120-OHM-210MA 22 21 20 19 18 9 5
2.7PF
+/-0.05PF 2 25V C0G-CERM 0201
L4221_RF
L4212_RF
2
19
C4207_RF
PP_VBATT_PA_LB_HB
4.1NH+/-0.1NH-0.5A-0.17OHM
VOLTAGE=4.3V
01005
1
RADIO_LB_PAD 1
1
C4201_RF 0.1UF 20%
1
C4202_RF 47PF 5%
6.3V 2 X5R-CERM
50_PAD_ANT_B28A
5% 2 16V CERM 01005 RADIO_LB_PAD
C4203_RF 47PF 5%
1
50_LB_ASM_IN_B28A
2 0201
1
RADIO_LB_PAD 1
2 16V CERM
2 16V CERM
01005 RADIO_LB_PAD
C4214_RF 47PF
01005 01005 RADIO_LB_PAD RADIO_LB_PAD
L4205_RF
L4214_RF
0.7PF
39NH-5%-120MA
+/-0.05PF 2 25V C0G-CERM 0201
0201
RADIO_LB_PAD NOSTUFF
RADIO_LB_PAD
2
C4208_RF RADIO_LB_PAD
2
SCLK 9
0201 NOSTUFF RADIO_LB_PAD
1
SDATA 8
L4201_RF 10NH-3%-250MA
50_LB_ASM_IN_B13
2
1
NC VIO 10
C
1 0201
1% 1/20W MF 0201 RADIO_LB_PAD
VCC2 40
1
50_PAD_ANT_B13
50_TX_VLB_PA_IN
VCC1 41
50_TX_VLB_PA_IN_MATCH
VBATT 7
IN
3.0NH+/-0.1NH-0.6A
NC 6
16
R4201_RF 0.00 2 1
L4206_RF
C
L4215_RF
0.5PF
27NH-3%-0.140A-2.3OHM
+/-0.05PF 2 25V COG-CERM 0201
0201
RADIO_LB_PAD NOSTUFF
RADIO_LB_PAD 2
ULBPA_RF 16
IN
R4202_RF 0.00 2 50_TX_LB_PA_IN 1
50_TX_LB_PA_IN_MATCH 1
L4202_RF 10NH-3%-250MA
1% 1/20W MF 0201 RADIO_LB_PAD
0201 RADIO_LB_PAD NOSTUFF 2
2 4
C4209_RF
SKY77812
RFIN VLB RFIN LB
ANT B12/B17 ANT B28B/B29 ANT B28A ANT B13 ANT B27
LGA RADIO_LB_PAD OMIT
14
OUT
14
OUT
14
OUT
1
50_LB_ASM_IN_B27
2
BI
21
0201
RADIO_LB_PAD
VIETMOBILE.VN 35 36 37 38
RX RX RX RX
1
L4207_RF
L4216_RF 0.9PF
0.5PF
ANT B26 29 ANT B20 31 ANT B8 33
B8 LB VLB B29
+/-0.05PF 2 25V C0G-CERM 0201
+/-0.05PF 2 25V COG-CERM 0201
RADIO_LB_PAD NOSTUFF
RADIO_LB_PAD
EPAD
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57
3 5 11 12 13 14 15 17 19 21 22 24 26 28 30 32 34 39 42 1 27
B
OUT
50_PAD_ANT_B27
1
GND
14
3.0NH+/-0.1NH-0.6A
16 18 20 23 25
50_PRX_LB1_B8_GSM900_PAD 50_PRX_LB3_B20_B26_B27_GSM850_PAD 50_PRX_LB2_B12_B17_B13_B28_PAD
B
C4211_RF
50_PRX_LB4_B29_PAD
4.2NH-+/-0.1NH-0.5A-0.17OHM 50_PAD_ANT_B26
1
50_LB_ASM_IN_B26
2
BI
21
BI
21
BI
21
0201
RADIO_LB_PAD 1
1
L4209_RF 1.0PF
L4218_RF 0.5PF
+/-0.05PF 2 25V C0G-CERM 0201
+/-0.05PF 2 25V COG-CERM 0201
RADIO_LB_PAD
RADIO_LB_PAD NOSTUFF
C4212_RF 2.2NH+/-0.1NH-0.6A 50_PAD_ANT_B20
1
50_LB_ASM_IN_B20
2 0201-1
RADIO_LB_PAD 1
L4210_RF
1
0.5PF
L4219_RF 0.5PF
+/-0.05PF 2 16V C0G-CERM 01005
+/-0.05PF 2 25V COG-CERM 0201
RADIO_LB_PAD NOSTUFF
RADIO_LB_PAD NOSTUFF
C4213_RF 1.5NH+/-0.1NH-1.0A 50_PAD_ANT_B8
1
50_LB_ASM_IN_B8
2 0201
1
RADIO_LB_PAD
A 1
L4220_RF 10NH-3%-250MA
L4211_RF 2.0PF
0201 RADIO_LB_PAD NOSTUFF
+/-0.1PF 2 25V C0G-CERM 0201
A PAGE TITLE
CELLULAR FRONT END: LB PAD DRAWING NUMBER
2
RADIO_LB_PAD NOSTUFF
Apple Inc.
051-1902 REVISION
A.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
42 OF 51 SHEET
50 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
MID BAND PA+DUPLEXERS D
D 22 21 20 19 17 9
IN
22 21 20 19 17 9 5
BI
75_RFFE2_SCLK_FILT 75_RFFE2_SDATA_BB
L4307_RF
120-OHM-210MA 23 22 21 20 19 17 12 11 9 2
IN
PP_1V8_LDO15
1
PP_1V8_LDO15_MB_PAD VOLTAGE=1.8V
2 01005
19 17 12
IN
26 25 20 17 12 11 5
IN
RADIO_MB_PAD
PP_QPOET_VCC_PA PP_VCC_MAIN
1
1
C4301_RF 0.1UF
20% 2 6.3V X5R-CERM 01005 RADIO_MB_PAD
1
C4302_RF 100PF
5% 2 16V NP0-C0G 01005 RADIO_MB_PAD
1
1
C4303_RF 0.1UF
C4309_RF 47PF
20% 2 6.3V X5R-CERM 01005 RADIO_MB_PAD
5% 2 16V CERM 01005
1
1% 1/32W MF 01005 2 RADIO_MB_PAD PP_VCC1_MB_PA VOLTAGE=4.0V
C4308_RF 12PF 5%
2 16V CERM
RADIO_MB_PAD
R4301_RF 3.00
01005 RADIO_MB_PAD
C4305_RF
1.9NH-+/-0.1NH-0.6A-0.12OHM 50_PAD_ANT_B1_B3_B4
1
C
2
50_MB-HB_ASM_IN_B1_B3_B4
BI
22
BI
22
BI
22
C
0201
10
1
L4301_RF
1
0.3PF
SCLK
SDATA 9
VIO 11
VCC2 39
VCC1 40
VBATT 8
RADIO_MB_PAD
0.5PF
+/-0.05PF 2 25V C0G-CERM 0201
+/-0.05PF 2 25V COG-CERM 0201
RADIO_MB_PAD
RADIO_MB_PAD NOSTUFF
UMBPA_RF 16 16
IN IN
14
OUT
14
OUT
14
OUT
14
OUT
14
OUT
3 RFIN_B3/B4 5 RFIN_B1/B25/B34/B39
50_TX_HMB3_B3_B4_PA_IN 50_TX_MB1_B1_B25_B34_B39_PA_IN 50_PRX_MLB6_B34_B39_B2CA_PAD 50_PRX_MB5_B25_GSM1900_PAD 50_PRX_MB1_B4CA_PAD 50_PRX_MB3_B3_GSM1800_PAD 50_PRX_MB2_B1_B4_PAD
C4306_RF
ANT_B1/B3/B4 35
AFEM-8030-AP1 LGA RADIO_MB_PAD OMIT
3.0NH+/-0.1NH-0.6A
VIETMOBILE.VN 17 RX_B34/B39/B2CA 19 RX_B25 21 RX_B4CA
ANT_B25/B4CA 25 ANT_B34/B39 15
50_PAD_ANT_B25_B4CA
1
1
2 0201
50_MB-HB_ASM_IN_B25_B4CA 1
RADIO_MB_PAD
L4302_RF
L4305_RF 10NH-3%-0.14A-2.1OHM
0.8PF
27 RX_B3 31 RX_B1/B4
+/-0.05PF 2 16V C0G-CERM 01005
01005 RADIO_MB_PAD NOSTUFF
RADIO_MB_PAD
GND
L4304_RF
EPAD
2
C4307_RF
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55
1 2 4 6 7 12 13 14 16 18 20 22 23 24 26 28 29 30 32 33 34 36 37 38
2.2NH+/-0.1NH-0.6A
50_PAD_ANT_B34_B39
1
2
50_MB-HB_ASM_IN_B34_B39
0201-1
RADIO_MB_PAD 1
L4303_RF 0.2PF
+/-0.05PF 2 25V COG-CERM 0201
B
RADIO_MB_PAD
1
L4306_RF 0.7PF
B
+/-0.05PF 2 16V NP0-C0G 01005
RADIO_MB_PAD NOSTUFF
A
A PAGE TITLE
CELLULAR FRONT END: MB PAD DRAWING NUMBER
Apple Inc.
051-1902 REVISION
A.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
43 OF 51 SHEET
51 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
HIGH BAND PA+DUPLEXERS D
D 22 21 20 18 17 9
IN
22 21 20 18 17 9 5
BI
23 22 21 20 18 17 12 11 9 2
IN
18 17 12
IN
17
IN
75_RFFE2_SCLK_FILT 75_RFFE2_SDATA_BB
PP_1V8_LDO15 PP_QPOET_VCC_PA
C4405_RF
PP_VBATT_PA_LB_HB
22PF
50_PAD_ANT_B40A_B41A
HB PAD VBATT DECOUPLING CAPS ARE SHARED WITH LB PAD AT C4201_RF AND C4202_RF.
1
C4403_RF 0.1UF
20% 2 6.3V X5R-CERM 01005 RADIO_HB_PAD
1
1
1
C4410_RF
5% 6.3V NP0-C0G 0201
5.0PF
+/-0.1PF 2 16V NP0-C0G 01005
50_MB-HB_ASM_IN_B40A_B41A
2
RADIO_HB_PAD OMIT
L4401_RF 8.2NH-3%-0.3A
1
22
BI
22
L4406_RF 0.5PF
0.05PF 2 25V NP0-C0G 0201
0201 RADIO_HB_PAD OMIT
RADIO_HB_PAD
BI
RADIO_HB_PAD OMIT
2
C4406_RF 2.2NH+/-0.1NH-0.6A 50_PAD_ANT_B40B_B41C
1
2
50_MB-HB_ASM_IN_B40B_B41C
0201-1
RADIO_HB_PAD OMIT
IN
16
IN
14
OUT
14
OUT
14
OUT
50_PRX_HB3_B38_B40_B41_PAD 50_PRX_HB1_B7_PAD 50_PRX_HB4_B30_PAD
32 30
28 9 40
RFIN_B7/B30 RFIN_B38/B40/B41
SCLK 24
VIO 23
35 VCC2
VCC1
SDATA 25
50_TX_HMB4_B30_B7_PA_IN 50_TX_HMB2_B38_B40_B41_PA_IN
RADIO_HB_PAD OMIT
ANT_B40A/B41A ANT_B40B/B41C ANT_B38/B41B ANT_B7 ANT_B30
LGA RADIO_HB_PAD OMIT
20 14 11 6 3
C4407_RF 8.2PF
50_PAD_ANT_B38_B41B 1
VIETMOBILE.VN L4403_RF
5.6NH+/-3%-0.4A
EPAD
1 2 4 5 7 8 10 12 13 15 16 17 18 19 21 22 27 29 31 33 36 37 38 39
GND
C
+/-0.05PF 2 25V C0G-CERM 0201
UHBPA_RF HB-PAD
RX_B38/B40/B41 RX_B7 RX_B30
L4407_RF 0.3PF
1
50_MB-HB_ASM_IN_B38_B41B
2
RADIO_HB_PAD OMIT
1
L4404_RF 8.2NH-3%-0.3A
BI
22
L4408_RF 0.2PF
RADIO_HB_PAD OMIT
2
1
22
+/-0.05PF 2 25V COG-CERM 0201
RADIO_HB_PAD OMIT
50_PAD_ANT_B7
BI
+/-0.1PF 25V CER 0201
0201
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55
16
VBATT
26
C
34
1
C4408_RF 33PF
1
50_MB-HB_ASM_IN_B7
2
2% 25V NPO-COG 0201
RADIO_HB_PAD OMIT
0201 RADIO_HB_PAD OMIT 2
B
B
C4409_RF 33PF
50_PAD_ANT_B30
1
2% 25V NPO-COG 0201
1
L4405_RF
50_MB-HB_ASM_IN_B30
2
RADIO_HB_PAD OMIT
10NH-3%-0.3A 0201
RADIO_HB_PAD NOSTUFF 2
BI
22
1
L4410_RF 51
5% 1/20W MF 2 201
RADIO_HB_PAD OMIT
A
A PAGE TITLE
CELLULAR FRONT END: HB PAD DRAWING NUMBER
Apple Inc.
051-1902 REVISION
A.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
44 OF 51 SHEET
52 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
2G PA D
D
XW4500_RF SM
26 25 20 18 17 12 11 5
IN
IN
PP_VCC_MAIN
1
R4501_RF 0 2 1
PP_VCC_MAIN
5% 1/20W MF C4501_RF 0201 56PF RADIO_2G_PA 5% 2 25V NP0-C0G-CERM 01005 RADIO_2G_PA
PP_VCC_MAIN_2G_PA
PP_VBATT_PA_FILT 1
1
C4503_RF 1UF
20% 2 10V X5R 0201 RADIO_2G_PA
C4506_RF 0.1UF
20% 2 6.3V X5R-CERM 01005 RADIO_2G_PA
1
C4505_RF 15UF
20% 2 6.3V X5R 0402-1
RADIO_2G_PA
1
C4510_RF 1UF 20%
C4507_RF 27PF
2 10V X5R
0201 RADIO_2G_PA
VBATT
VCC
1
U2GPA_RF
16
IN
50_TX_HMLB2_MB_GSM_PA_IN
16
C
7 LBRFIN
23 22 21 19 18 17 12 11 9 2
PP_1V8_LDO15 75_RFFE2_SDATA_BB 75_RFFE2_SCLK_FILT
IN BI
12 HBRFIN HBRFOUT RADIO_2G_PA 11 VIO 9 SDATA 10 SCLK GND EPAD
6
2 4 5
22 21 19 18 17 9
5
IN
1
1
RADIO_2G_PA
50_PA_2G_MB
1
C4502_RF 0.1UF 20%
2 6.3V X5R-CERM
1
L4503_RF 10NH-3%-0.170A
1
01005 RADIO_2G_PA NOSTUFF
2
C4508_RF 27PF
L4502_RF
2
5% 6.3V NP0-C0G 0201 RADIO_2G_PA
21
OUT
+/-0.05PF 2 25V COG-CERM 0201
LBRFOUT
13
50_TX_LB1_LB_GSM_PA_IN
LGA
L4501_RF
50_LB_ASM_IN_2G_TX
2
5% 6.3V NP0-C0G 0201 RADIO_2G_PA
0.5PF
SKY77357 IN
1
50_PA_2G_LB 8
1
2
3
26 25 20 18 17 12 11 5
1 1
C
50_MB-HB_ASM_IN_2G_TX
OUT
22
L4504_RF
VIETMOBILE.VN 0.7PF
01005 RADIO_2G_PA
+/-0.05PF 2 25V C0G-CERM 0201
0.7PF
+/-0.05PF 2 25V C0G-CERM 0201
RADIO_2G_PA NOSTUFF
RADIO_2G_PA NOSTUFF
B
B
A
A PAGE TITLE
CELLULAR FRONT END: 2G PA DRAWING NUMBER
Apple Inc.
051-1902 REVISION
A.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
45 OF 51 SHEET
53 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
LOW BAND ANTENNA SWITCH MODULE D
D
22 20 19 18 17 9
IN
22 20 19 18 17 9 5
IN
75_RFFE2_SCLK_FILT
75_RFFE2_SDATA_BB
L4605_RF
120-OHM-210MA 23 22 20 19 18 17 12 11 9 2
PP_1V8_LDO15
IN
1
PP_1V8_LBASM_VIO VOLTAGE=1.8V
2 01005
RADIO_LB_ASM
PP_2V8_LDO14 IN
20% 2 6.3V X5R-CERM 01005
C
5% 2 16V NP0-C0G 01005 RADIO_LB_ASM
1
50_LB_COUPLER_DIPLEXER_IN
C4603_RF
20
IN
17
BI
17
BI
17
BI
C
RADIO_LB_ASM
VCC
1 2 3 4
TRX1 TRX2 TRX3 TRX4
C4604_RF
3.9NH+/-0.1NH-0.5A 50_LB_ASM_ANT1
1
BI
17
BI
17
BI
23
OUT
17
BI BI
ULASM_RF
1
6 7 14 15 16 17
L4601_RF
3
BI
3
L4603_RF 10NH-3%-250MA
1.0PF
ANT1 9
LGA RADIO_LB_ASM
TRX6 TRX7 TRX8 TRX9 TRX10 TRX11
BI
1
RADIO_LB_ASM
CPL_OUT 19
50_LB_ASM_ANT1_LAT
2 0201
RF5150
50_LB_ASM_IN_B27 50_LB_ASM_IN_B13 50_LB_ASM_IN_B12 50_LB_ASM_LB_DRX_OUT 50_LB_ASM_IN_B28B_B29 50_LB_ASM_IN_B8
16
20% 2 6.3V X5R-CERM 01005
VIETMOBILE.VN
17
17
50_LB_ASM_IN_2G_TX 50_LB_ASM_IN_B20 50_LB_ASM_IN_B26 50_LB_ASM_IN_B28A
OUT
0.1UF
21
RADIO_LB_ASM
C4602_RF 100PF
SCLK 23
0.1UF
1
22
C4601_RF
SDATA
1
VIO 24
23 22 11 2
+/-0.05PF 2 25V C0G-CERM 0201
RADIO_LB_ASM
0201 RADIO_LB_ASM NOSTUFF 2
ANT2 12
C4605_RF
3.0NH+/-0.1NH-0.6A
50_LB_ASM_ANT2
GND
EPAD 25 26 27 28
RADIO_LB_ASM
1
L4602_RF 10NH-3%-250MA
L4604_RF 10NH-3%-250MA
0201 RADIO_LB_ASM NOSTUFF
0201 RADIO_LB_ASM NOSTUFF
2
B
50_LB_ASM_ANT2_COAX_LOW
2
0201
1
5 8 10 11 13 18 20
1
2
B
A
A PAGE TITLE
CELLULAR FRONT END: LB ASM DRAWING NUMBER
Apple Inc.
051-1902 REVISION
A.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
46 OF 51 SHEET
54 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
MID-HIGH BAND ANTENNA SWITCH MODULE D
D
21 20 19 18 17 9
IN
21 20 19 18 17 9 5
IN
23 21 20 19 18 17 12 11 9 2
IN
23 21 11 2
IN
75_RFFE2_SCLK_FILT 75_RFFE2_SDATA_BB PP_1V8_LDO15 PP_2V8_LDO14
0.1UF
C4702_RF 100PF
5% 2 16V NP0-C0G 01005 RADIO_MB-HB_ASM
20% 2 6.3V X5R-CERM 01005
50_MB-HB_COUPLER_DIPLEXER_IN
C4703_RF
EVT ASM ASSIGNMENT: B40B/B41C - TRX2 B30 - TDD3
18
50_MB-HB_ASM_IN_B40B_B41C BI BI
19
BI
18
BI
20
IN
18
BI
19
BI
19
BI
19
BI
23
OUT
23
OUT
50_MB-HB_ASM_IN_B25_B4CA 50_MB-HB_ASM_IN_B7 50_MB-HB_ASM_IN_B1_B3_B4 50_MB-HB_ASM_IN_2G_TX 50_MB-HB_ASM_IN_B34_B39 50_MB-HB_ASM_IN_B40A_B41A 50_MB-HB_ASM_IN_B30 50_MB-HB_ASM_IN_B38_B41B
BI
3
BI
3
RADIO_MB-HB_ASM
2 3 4 28 30 5 7 8 9
TRX2 TRX3 TRXB7 TRXB1/B3/B4 MB2GTX
C4704_RF 2.5NH+/-0.1NH-0.6A 50_MB-HB_ASM_ANT1
UHASM_RF
50_MB-HB_ASM_ANT1_LAT
2
CPL_OUT
RADIO_MB-HB_ASM
1
26
L4701_RF 10NH-3%-250MA
TDD1 TDD2 TDD3 TDD4
ANT1
15
ANT2
18
L4703_RF 10NH-3%-250MA
0201 NOSTUFF RADIO_MB-HB_ASM
0201 NOSTUFF RADIO_MB-HB_ASM
2 2
10 HBDIV 12 MBDIV
GND
C4705_RF
EPAD
27PF
31 32 33 34
50_MB-HB_ASM_ANT2
1 6 11 13 14 16 17 19 20 25 27 29
C
0201
1
LMFEESGB-G54 LGA RADIO_MB-HB_ASM
1
VIETMOBILE.VN
50_MB-HB_ASM_HB_DRX_OUT 50_MB-HB_ASM_MB_DRX_OUT
16
20% 2 6.3V X5R-CERM 01005
C 19
OUT
0.1UF
VCC 21
RADIO_MB-HB_ASM
1
SCLK 23
1
SDATA 24
C4701_RF
VIO 22
1
1
L4705_RF 10NH-3%-250MA
1
2
5% 6.3V NP0-C0G 0201 RADIO_MB-HB_ASM
50_MB-HB_ASM_ANT2_COAX_LOW
1
L4706_RF 10NH-3%-250MA
0201 NOSTUFF RADIO_MB-HB_ASM
0201 NOSTUFF RADIO_MB-HB_ASM
2
2
B
B
A
A PAGE TITLE
CELLULAR FRONT END: MB-HB ASM DRAWING NUMBER
Apple Inc.
051-1902 REVISION
A.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
47 OF 51 SHEET
55 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
DIVERSITY MODULE D
D
9
IN
9 5
IN
75_RFFE3_SCLK_FILT 75_RFFE3_SDATA_BB
L4804_RF
120-OHM-210MA 22 21 20 19 18 17 12 11 9 2
PP_1V8_LDO15
IN
1
PP_1V8_DIVASM_VIO VOLTAGE=1.8V
2 01005
22 21 11 2
PP_2V8_LDO14
RADIO_DRX_ASM
IN
1
C4801_RF 0.1UF 20%
C
2 6.3V X5R-CERM
01005 RADIO_DRX_ASM
1
1
C4802_RF 100PF 5%
C4803_RF 0.1UF 20%
2 16V NP0-C0G
01005 RADIO_DRX_ASM
C
6.3V 2 X5R-CERM
01005 RADIO_DRX_ASM
C4804_RF 15PF
15
OUT
15
OUT
15
OUT
15
OUT
15
OUT
15
OUT
15
OUT
15
OUT
15
OUT
15
OUT
15
OUT
15
OUT
27 29 30 32
B27/B29 B12/B13/B17/B26 B28 B8/B20
VIO
SDATA
9
VDD
8
10
50_DRX_LB1_B27_B29 50_DRX_LB2_B26_B13_B17_B12 50_DRX_LB3_B28 50_DRX_LB4_B8_B20
11
1
50_DRX_HB2_B7_B41C 50_DRX_HB4_B30_B38_B41B 50_DRX_HB3_B40_B41A
UDIVA_RF
22
22NH-3%-0.25A
HFQSWAHUA-240
0201
RADIO_DRX_ASM
RADIO_DRX_ASM
B1 B3 B25 B34/B39 B4
2
LBIN 15
50_DRX_ASM_LB_IN
MBIN 18
50_DRX_ASM_MB_IN
HBIN 21
50_DRX_ASM_HB_IN
C4805_RF 10PF
3 B7/B41C 5 B38/B41/B30 6 B41A/B40
1
2
50_MB-HB_ASM_MB_DRX_OUT
5% 25V CER 0201
1
RADIO_DRX_ASM
L4802_RF
1
12NH-3%-0.3A-0.5OHM
2 6.3V X5R-CERM
2 4 7 12 13 14 16 17 19 20 22 23 24 25 26 28 31 33 34
01005 RADIO_DRX_ASM NOSTUFF
2
THRM_PAD
B
C4806_RF
39 40 41 42 43 44 45 46 47
GND
C4807_RF 0.1UF 20%
0201
RADIO_DRX_ASM
B
IN
RADIO_DRX_ASM
VIETMOBILE.VN 1 35 36 37 38
21
L4801_RF
LGA
50_DRX_MB1_B1 50_DRX_MLB6_B3 50_DRX_MB5_B25 50_DRX_MB4_B34_B39 50_DRX_MB3_B4
IN
5% 25V NPO 0201
1
SCLK
50_LB_ASM_LB_DRX_OUT
2
2.5NH+/-0.1NH-0.6A 1
2
50_MB-HB_ASM_HB_DRX_OUT
IN
22
0201
RADIO_DRX_ASM
1
1
L4803_RF 10NH-3%-250MA
L4805_RF 10NH-3%-250MA
0201 NOSTUFF RADIO_DRX_ASM
0201 NOSTUFF RADIO_DRX_ASM
2
2
A
A PAGE TITLE
CELLULAR FRONT END: DIVERSITY DRAWING NUMBER
Apple Inc.
051-1902 REVISION
A.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
BRANCH
PAGE
48 OF 51 SHEET
56 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
SIM D
D PP5100_RF 26 5 3
P2MM-NSM SM 1
4FF_SIM_SWP
PP
OMIT
C
C 11 7 5
PP_UIM2_LDO13
1 1
C3010_RF
R3013_RF 15.00K
2.2UF
20% 2 6.3V X5R-CERM 0201 RADIO_BB
2
1% 1/32W MF 01005 RADIO_BB
A1
VIETMOBILE.VN VCC
U5101_RF
ST33G1M2STL7EAK7
IN
9 5
IN
NC
D1 CLK D2 RST B3 SWP
NC
B2 NC
SIM2_CLK SIM2_RESET
WLCSP OMIT
GPIO0 GPIO1 GPIO2 GPIO3
A2 B1 D3 C1
IO0 C3 GND
NC NC NC NC
5
SIM2_DATA_R
R3014_RF 1
0.00 2
SIM2_DATA
BI
5 9
0% 1/32W MF 01005
A3
9 5
RADIO_BB
B
B
A
A PAGE TITLE
SIM DRAWING NUMBER
Apple Inc.
051-1902 REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8
7
6
5
4
3
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
2
A.0.0 BRANCH
PAGE
49 OF 51 SHEET
57 OF 59
1
SIZE
D
8
7
6
5
4
2
3
1
WIFI/BT R5213_RF 0.00 2
25
PP_WL_VDDIO
1
C5201_RF
1
27PF
C
73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105
B
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
U5200_RF LBEE5UM1EE-775 LGA SYM 2 OF 2
THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD
106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162
C2500_RF
1
4.7UF
10% 2 6.3V X5R 01005
IN
PMU_TO_WLAN_32K_CLK
5
IN
5
OUT
UART4_AP_TO_WLAN_TX UART4_WLAN_TO_AP_TX
14 GPIO_11_FAST_UART_RX 13 GPIO_12_FAST_UART_TX
5
OUT
UART4_WLAN_TO_AP_RTS_L
15 GPIO_7_FAST_RTS_OUT
IN
PMU_TO_WLAN_REG_ON
29 WL_REG_ON
IN
PMU_TO_BT_REG_ON
25
NO STUFF 1
R5200_RF
25 5
10K 5% 1/32W MF 2 01005
25 5
IN
UART4_AP_TO_WLAN_RTS_L
1
2
XW2_RF SM 9 5
IN
UART_BB_TO_WLAN_COEX_TX
1
25
GPIO_2_JTAG_TCK
25
GPIO_3_JTAG_TMS GPIO_6_JTAG_TRST GPIO_4_JTAG_TDI
25
2 25
OUT
UART_WLAN_TO_BB_COEX_TX
17 ANT_SWITCH_CORE1 16 ANT_SWITCH_CORE0
BT_PCM_CLK BT_PCM_SYNC BT_PCM_OUT BT_PCM_IN
23 21 18 19
1
25
2
GPIO_5_JTAG_TDO
GPIO_3_JTAG_TMS GPIO_6_SEC_IN/JTAG_TRST GPIO_4_JTAG_TDI GPIO_5_SEC_OUT/JTAG_TDO
BT_TO_PMU_HOST_WAKE
4
50_G_1_MATCH_MOD
2
50_A_0_MATCH_MOD 50_A_1_MATCH_MOD
25
25
PP
P2MM-NSM OMIT SM 1
PMU_TO_WLAN_32K_CLK
25 5
A
P2MM-NSM OMIT SM 1
25
WLAN_TO_PMU_HOST_WAKE 5
3 BT_GPIO_3 2 BT_GPIO_5
P2MM-NSM OMIT SM 1
25
PCIE_AP_TO_WLAN_REFCLK_P 5
PP
GPIO_6_JTAG_TRST
25 5
PCIE_AP_TO_WLAN_REFCLK_N
GPIO_4_JTAG_TDI
P2MM-NSM OMIT SM 1
25 5
PCIE_AP_TO_WLAN_TX_P
GPIO_5_JTAG_TDO
8
5 25
OUT
5 25
IN
5
IN
5
OUT
5
IN
5
5 25
25 5
BI
5 25
IN
IN
5 25
IN
5 25
OUT
5
OUT
5
IN
5 25
IN
5 25
5 25 5 25
L5201_RF
2
B
0805
PART NUMBER
ALTERNATE FOR PART NUMBER
339S00043
339S00033
BOM OPTION
REF DES
COMMENTS:
1
U5200_RF
ALT WIFI/BT MODULE
C5200_RF 4.7UF
20% 2 6.3V X5R-CERM1 402
R5202_RF
0.7NH+/-0.1NH-0.63A 50_A_1_MATCH_MOD
1
2
50_A_1_DPLX
WIFI LAT COAX CONNECTOR
P2MM-NSM OMIT SM 1 PP
P2MM-NSM OMIT SM 1 PP
P2MM-NSM OMIT SM 1 PP
C5215_RF
1
P2MM-NSM OMIT SM 1
25 5
UART1_AP_TO_BT_TX
P2MM-NSM OMIT SM 1 PP
P2MM-NSM OMIT SM 1 PP
P2MM-NSM OMIT SM 1 PP
P2MM-NSM OMIT SM 1 PP
PCIE_AP_TO_WLAN_TX_N
25 5
PP
F5202_RF DPX205950DT-9163A1SJ
+/-0.05PF 2 16V CERM 01005
NO STUFF
6 4
25 5
UART1_BT_TO_AP_TX
P2MM-NSM OMIT SM 1 PP
50_AG_1_DPLX
1
F-ST-SM1
2 50_AG_1_LAT_COAX
1
01005
LO
1
GND
PP5201_RF
MM5829-2700
0.8NH+/-0.1NH-0.630A COM 2
HI
JWLAT_RF
R5205_RF
0805
PP
1
C5209_RF
C5210_RF 0.2PF
0.2PF
+/-0.1PF 2 16V NP0-C0G 01005
+/-0.05PF 2 16V CERM 01005
NO STUFF
PP5202_RF 25 5
UART1_AP_TO_BT_RTS_L
P2MM-NSM OMIT SM 1
WLAN LAT 2.4GHZ BAW BPF ON CSA 4
PP
50_G_1_DPLX 4
PP5203_RF 25 5
UART1_BT_TO_AP_RTS_L
P2MM-NSM OMIT SM 1
LAST UPDATED: 4/30/2014
PP
PP5302_RF 25 5
PCIE_AP_TO_WLAN_DEV_WAKE
SYNC_MASTER=WIFI
P2MM-NSM OMIT SM 1
WIFI/BT: WIFI/BT MODULE
PP5303_RF 25 5
BT_TO_PMU_HOST_WAKE
SYNC_DATE=01/30/2014
PAGE TITLE
PP
PP5301_RF
P2MM-NSM OMIT SM 1
P2MM-NSM OMIT SM 1
C5205_RF 0.2PF
+/-0.1PF 2 16V NP0-C0G 01005
PP5200_RF
PP
DRAWING NUMBER
P2MM-NSM OMIT SM 1
Apple Inc.
PP
051-1902 REVISION
R
A.0.0
PP5287_RF 25 5
PMU_TO_WLAN_REG_ON
P2MM-NSM OMIT SM 1
NOTICE OF PROPRIETARY PROPERTY:
PP
PP5298_RF 25
IN
2.2UH-20%-0.28A-0.25OHM
TABLE_ALT_ITEM
PP5300_RF
PP5297_RF 25
5 25
TABLE_ALT_HEAD
PP5299_RF
PP5296_RF 25
OWL_TO_WLAN_CONTEXT_A OWL_TO_WLAN_CONTEXT_B SRVTX
1
PP5289_RF
PP
GPIO_3_JTAG_TMS
PCIE_AP_TO_WLAN_TX_P PCIE_AP_TO_WLAN_TX_N PCIE_WLAN_TO_AP_TX_P PCIE_WLAN_TO_AP_TX_N PCIE_AP_TO_WLAN_REFCLK_P PCIE_AP_TO_WLAN_REFCLK_N
VIN_LDO
PP5285_RF
PP5295_RF 25
50 49 47 46 44 43 11 12
VIN_LDO 31
PP
PP
P2MM-NSM OMIT SM 1
PCIE_PME
OUT
OUT
PCIE_PME PCIE_WLAN_TO_AP_CLKREQ_L PCIE_AP_TO_WLAN_PERST_L
SR_VLX 33
PP5288_RF
PP5294_RF 25
5 25
25
PCI_PME 52 PCIE_CLKREQ 53 PERST 54
PCIE_RDP0 PCIE_RDN0 PCIE_TDP0 PCIE_TDN0 PCIE_REFCLKP PCIE_REFCLKN GPIO_14_WL_UART_RX GPIO_15_WL_UART_TX
62 5G_ANT_CORE0 26 5G_ANT_CORE1
NC NC
P2MM-NSM OMIT SM 1
PP
GPIO_2_JTAG_TCK
I2S_AP_TO_BT_BCLK I2S_AP_TO_BT_LRCK I2S_BT_TO_AP_DOUT I2S_AP_TO_BT_DOUT
WLAN_TO_PMU_HOST_WAKE
57 2G_ANT_CORE0 69 2G_ANT_CORE1
0.2PF
PP5293_RF 25
IN
01005
PP5292_RF GPIO_13_WLAN_THROTTLE
60 64 65 59
GPIO_0_WL_HOST_WAKE 38
5 HOST_WAKE_BT
50_G_0_MATCH_MOD
2
UART1_AP_TO_BT_TX UART1_BT_TO_AP_TX UART1_AP_TO_BT_RTS_L UART1_BT_TO_AP_RTS_L
GPIO_13_WLAN_THROTTLE
VIETMOBILE.VN OUT
8 9 7 6
GPIO_13_WLAN_THROTTLE 24
1 3 5
25 5
5
C
XW3_RF
25 5
IN
39 GPIO_1_HSIC_HOST_READY 22 GPIO_2_HSIC_RESUME/JTAG_TCK
SM 9 5
BT_UART_RXD BT_UART_TXD BT_UART_CTS* BT_UART_RTS*
PCIE_AP_TO_WLAN_DEV_WAKE
XW1_RF SM IN
LGA SYM 1 OF 2
37 JTAG_SEL
NC NC
5
AP_TO_BT_WAKE
BT_WAKE 4
28 BT_REG_ON
JTAG_WLAN_SEL
25 5
NC
U5200_RF
25
PP5291_RF OWL_TO_WLAN_CONTEXT_B
BT_GPIO_4 10
LBEE5UM1EE-775
PP5290_RF OWL_TO_WLAN_CONTEXT_A
D
20% 2 6.3V X5R-CERM1 402
PP_WL_VDDIO
1
25 5
4.7UF
20% 2 6.3V X5R-CERM1 402
41 CLK32K_AP
25 5
C5283_RF1 C5284_RF
4 3 2
1 20 25 27 32 34 40 42 45 48 51 55 56 58 61 63 66 67 68 70 71 72
THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD THRM_PAD
5 11 12 17 18 20 26
VOLTAGE=4.3V
0.01UF
5% 2 16V NP0-C0G 01005
D
PP_VCC_MAIN
VOLTAGE=1.8V
35 36
0% 1/32W MF 01005
BATT_VCC BATT_VCC
1
30
PP_1V8_S2R_VDDIO_WLAN_BT
VDDIO_1P8V
5
PP5286_RF 25 5
PMU_TO_BT_REG_ON
P2MM-NSM OMIT SM 1 PP
7
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
PP5305_RF 25 5
PCIE_AP_TO_WLAN_PERST_L
P2MM-NSM OMIT SM 1 PP
6
5
4
3
2
BRANCH
PAGE
50 OF 51 SHEET
58 OF 59
1
SIZE
D
A
7
6
5
STOCKHOLM
1
ALL NETNAMES NEED TO BE CHECKED
U5302_RF WLCSP
A3 VIN
PP_VCC_MAIN
L5303_RF
D
1
C5321_RF 15UF
B1 SW B2 SW
1.8UH-0.7A
1
2 0603 STOCKHOLM_BOOST_SW
VOUT A1 VOUT A2
STOCKHOLM_5V
7 8 9 11
RADIO_STOCKHOLM
1 C5320_RF
26
D 1
B3 EN C1 PGND C2 PGND
20% 2 6.3V X5R 0402-1
PP_1V8_LDO6
2
3
FAN48614BUC50X
26 25 20 18 17 12 11 5
4
C5322_RF 15UF
C3 AGND
8
1
C5323_RF 15UF
20% 2 6.3V X5R 0402-1
20% 2 6.3V X5R 0402-1
0.1UF
20% 2 6.3V X5R-CERM 01005 26
STOCKHOLM_5V
STOCKHOLM_DC_BOOST_EN STOCKHOLM_TVDD
1 C5330_RF
1UF
20% 2 10V X5R 0201
R5310_RF 0% 1/32W MF 01005
STOCKHOLM_DVDD PP_STOCKHOLM_1V8_S2R RADIO_STOCKHOLM
1 C5302_RF
1UF
10 5
OUT
10 5
IN
5
IN
5
OUT
5
IN
5
OUT
26 5
IN
26
TP5301_RF 1 TP5301 A
1
0.00 2
TP-P55
NC NC
SMX_RST* SMX_CLK ESE_IO1 SPIM_MOSI SPIM_MISO SPIM_SCK
NC
XTAL2
NC NC STOCKHOLM_SPIM_MOSI
0% 1/32W MF 01005
NOSTUFF
VSS
B
PP_STOCKHOLM_ESE
R5316_RF
1UF
C5303_RF
ESE_DWPM_DBG ESE_DWPS_DBG RXP RXN TX1 TX2 WKUP_REQ VMID SE2_PWR_REQ SE2_SVDD_IN
0.00 2
STOCKHOLM_SIM_PRES
1
0% 1/32W MF 01005
5% 1/20W MF 201
220PF
2
STOCKHOLM_ANT_MATCH 1
STOCKHOLM_BAL1
0402
1
C5310_RF
NC 4FF_SIM_SWP
STOCKHOLM_DWPM_DBG STOCKHOLM_DWPS_DBG
26
5
L5302_RF
5
160NH-10%-0.48A-0.33OHM
STOCKHOLM_RXP STOCKHOLM_RXN
1
2
22PF
STOCKHOLM_TX1 STOCKHOLM_TX2
AP_TO_STOCKHOLM_DEV_WAKE
IN
C5311_RF
PP_STOCKHOLM_1V8_S2R
SE2_PWR_REQ
1
1
C5315_RF
1000PF
5% 50V C0G 0201
C5316_RF
1000PF
2% 2 25V C0G-NP0 0201
2% 2 25V C0G-NP0 0201
NOSTUFF
1
C5318_RF
560PF
2% 2 25V NPO-C0G 0201
1
C5319_RF
100PF
2% 2 50V C0G 0201
TP5303_RF 1 A
TP-P55
TP5304_RF 1
NOSTUFF
A
TP-P55
C5314_RF 2
5% 50V C0G 0201
2% 2 25V C0G-NP0 0201
5 26
2
22PF
820PF
STOCKHOLM_VMID
NOSTUFF
5 26
1
SE2_SVDD_IN
C5309_RF
S
1000PF
2 RADIO_STOCKHOLM
1
1
1
5 STOCKHOLM_ANT
C5313_RF
STOCKHOLM_BAL0
0402
2
2% 50V C0G 0201
VIETMOBILE.VN STOCKHOLM_SIM_PRES
NC
3 5 24
BI
C
C5312_RF
RADIO_STOCKHOLM
G
Q5301_RF
1
DMP22D4UFA
2% 25V C0G-NP0 0201
DFN0806
20% 2 6.3V X5R-CERM 01005
26
2
L5301_RF
0.1UF
R5315_RF
560
1
160NH-10%-0.48A-0.33OHM
1 C5317_RF
1
20% 2 10V X5R 0201
20% 2 10V CERM-X5R 0201
SVDD ESE_VDD
AVDD
VDD VBAT SIM_PMU_VCC PVDD
STOCKHOLM_TO_BBPMU_CLK_REQ 50_BBPMU_TO_STOCKHOLM_19P2M_CLK UART3_AP_TO_STOCKHOLM_TXD UART3_STOCKHOLM_TO_AP_TXD UART3_AP_TO_STOCKHOLM_RTS_L UART3_STOCKHOLM_TO_AP_RTS_L PMU_TO_STOCKHOLM_EN
SPIM_IRQ SIM_SWIO GPIO0 SPIM_NSS TX_PWR_REQ
TVSS PVSS
IN
NC
DVSS DVSS
26 5
AP_TO_STOCKHOLM_FW_DWLD_REQ
IRQ SVDD_REQ DWL CLK_REQ NFC_CLK_XTAL1 RX TX CTS RTS VEN
AVSS AVSS AVSS
OUT
1 C5304_RF 1
STOCKHOLM_RXP_CAP
2% 25V C0G-NP0 0201
RADIO_STOCKHOLM
VOLTAGE=1.80V
2
2% 2 25V C0G-NP0 0201
PN66VEU3-A101D010 UFLGA
STOCKHOLM_TO_PMU_HOST_WAKE
1
PP_STOCKHOLM_ESE
0% 1/32W MF 01005
R5303_RF
1000PF
820PF
U5301_RF 5
1
0.00 2
C5308_RF
VOLTAGE=1.80V
R5314_RF
0.22UF
VUP TVDD
C
20% 2 10V X5R 0201
STOCKHOLM_AVDD
BAL1 3 UNBAL 4
20% 2 10V X5R 0201
0.00 2
2 BAL0 1 GND
1
0805
1UF
T5301_RF
1 C5324_RF
ATB201206E-20011
RADIO_STOCKHOLM
26 5
RADIO_STOCKHOLM
PP_VCC_MAIN
STOCKHOLM_SVDD
26 25 20 18 17 12 11 5
NOSTUFF
D
2
STOCKHOLM_RXN_CAP
R5304_RF 1
560
B
2
5% 1/20W MF 201
3
26 5
PP_STOCKHOLM_1V8_S2R 1 RADIO_STOCKHOLM
R5301_RF
100K 5% 1/32W MF 2 01005 26 5
IN
26 5
IN
NOSTUFF
PMU_TO_STOCKHOLM_EN AP_TO_STOCKHOLM_FW_DWLD_REQ
1 RADIO_STOCKHOLM
R5302_RF
100K 5% 1/32W MF 2 01005
A
A 26 5
IN
PAGE TITLE
AP_TO_STOCKHOLM_DEV_WAKE
STOCKHOLM
1 RADIO_STOCKHOLM
R5305_RF
DRAWING NUMBER
100K 5% 1/32W MF 2 01005
Apple Inc. R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
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051-1902 A.0.0
SIZE
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REVISION
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