Experimental Evaluation of Capacitors for Power Buffering in Single-Phase Power Converters
Abstract: Single-phase inverters and rectifiers require the use of an energy buffer to absorb twice-line-frequency power ripple. Historically this challenge has been addressed by the use of large electrolytic capacitors. Lifetime constraints and the need for improved system performance have motivated designers to seek other capacitor technologies such as ceramic and metal film which are frequently used in conjunction with active filtering converters to reduce the capacitance required. Active filtering converters cycle the capacitor voltage over a wide voltage range while maintaining a constant DC bus voltage. This large-swing operation demands different capacitor qualities than most other filtering applications, and the data sheet parameters available for commercial capacitors may be ineffective or require special care for calculating characteristics such as efficiency and energy storage capability. This work presents an experimental setup for evaluating capacitor performance under a large voltage swing along with detailed experimental results. Energy storage data for a number of capacitors in the 50 V to 630 V range from several manufacturers are included. The approach and findings of this paper can
serve as an aid to power electronics designers for the selection and evaluation of capacitors in energy buffering applications. Existing system: While a linear fit is a rough estimation of energy storage, it provides an approximate estimate of the volume requirements of existing technology. In addition to following the RMS current ratings which set the thermal limits of the inductor, the peak current rating of the inductor must also be accounted for in order to avoid saturation. Figure 18 plots the inductor peak energy as a function of volume. The linear fit of peak energy storage as a function of volume is found. Proposed system: At least 50 different topologies have been proposed for energy buffering applications. These designs each represent tradeoffs between complexity, size, and performance, with different benefits and drawbacks. The full ripple port topology shown is a relatively simple and robust architecture which allows a large degree of flexibility in the capacitor DC bias and ripple voltage and has been utilized in a number of works. Because of its simplicity and broad design space, the full ripple port converter will be used in this work to illustrate the design of an energy buffering converter using ceramic capacitors. Advantages: Because of its simplicity and broad design space, the full ripple port converter will be used in this work to illustrate the design of an energy buffering converter using ceramic capacitors. Determine maximum twice-line frequency energy storage required for the application as specified by. Model the voltage dependence of the capacitor technology to be used. Disadvantages: At least 50 different topologies have been proposed for energy buffering applications. These designs each represent tradeoffs between complexity, size, and performance, with different benefits and drawbacks.
The full ripple port topology shown is a relatively simple and robust architecture which allows a large degree of flexibility in the capacitor DC bias and ripple voltage and has been utilized in a number of works. Modules: Full Comparison of Devices: It is also insightful to see how trends in energy density develop over a broader range of capacitor technologies. The complete list of capacitors tested along with detailed test data is given in Appendix B. Is a plot of measured capacitor energy density versus rated voltage, for metal film, ceramic, and electrolytic capacitors, as indicated in the legend. It is observed that MLCCs generally achieve the highest energy density under this test scenario. It should be reemphasized that the electrolytic capacitors tested here were current ripple limited; meaning that although they can fundamentally store more energy than what is shown here, not all of that energy can be effectively transferred at twice-line frequency without causing excessive loss (and heating). While the metal film capacitors (metalized polyester and metalized polypropylene) evaluated in this study have relatively low energy density, their low-loss is readily apparent in Fig. 8, which shows the capacitor Q factors versus voltage ratings. It should again be noted that the Q factor here is as defined in, and is derived from measured energy loss and storage capability. Energy Buffering Converter Design: The preceding sections of this manuscript have evaluated the large-signal performance of a range of capacitor technologies and have shown that MLCCs have some of the highest energy density among the non-electrolytic devices. As discussed, this trait comes with the complication that the capacitance of these devices changes with DC bias voltage. In order to utilize the results presented in Section IV in the design of a high power density active energy buffer, it is important that the design of the power converter in which the capacitors will be used be tailored to the capacitor characteristics. It will be shown that the power density of the system can also be improved by rippling the voltage of the buffer capacitors at a voltage lower than the capacitor’s maximum specified voltage. In this design discussion, the focus will be on minimizing overall system volume;
however this strategy can be incorporated into a more comprehensive optimization with specific cost and efficiency goals. Impact of Voltage Ripple Range on Energy Storage Density of the Full Buffer Converter: It is first significant to note the difference between the operating waveforms of a buffer converter built using MLCCs and capacitors with voltage independent dielectrics. shows calculated values of the inverter current, buffer current, and capacitor current for one full cycle for both an ideal capacitor array and the MLCC capacitor array. In this example, both arrays are sized to ripple between equal voltage limits and store equal energy as required by (1) for a complete line cycle. Although the ripple limits of both capacitor banks are equal, the amount of energy stored at each differential voltage is not equal. Power factor correction: Conversion between DC and AC electric power using inverters or power factor correction (PFC) rectifiers requires energy buffering to balance the instantaneous power difference between the two systems. Figure 1 depicts the power imbalance between DC and AC energy transfer and the difference in energy which must be buffered over a full AC cycle. This challenge is often referred to as power pulsation decoupling or twice-line-frequency energy buffering in the literature and is present in all single-phase DC/AC and AC/DC converters. The simplest capacitive energy buffering strategy is the placement of a large capacitor across the DC bus. The energy which must be stored in the DC bus capacitor (Wbuffer) each line cycle is determined by the converter average power (Pave) and the AC frequency (fline), and can be expressed. Multilayer ceramic capacitors: In contrast to electrolytic and film capacitors, multilayer ceramic capacitors (MLCCs) have a dry dielectric and moderate energy density. A significant drawback of MLCCs is that they have historically been comparatively costly and they are limited in size due to the fragile nature of ceramics. Thus, although ceramic capacitors exhibit high energy storage density per unit of volume, the accumulation of sufficient capacitance for passive energy buffering in a single
package has been challenging due to cost and mechanical constraints. Additionally, the capacitance of MLCCs suitable for energy buffering also changes with DC bias voltage, aging, temperature, large signal amplitude, and frequency .The effective energy density of capacitors can also be improved dramatically by decoupling the energy storage and voltage regulation requirements of buffering as is done.