Examples: Version 6.94 In this directory the source files are processed with m4, dpic -g, and TikZ PGF. This is a collection of diagrams the author has had occasion to produce using m4 circuit macros and others, and gpic or dpic. The source-file names are shown for reference. There may be other or better m4 or pic constructs for producing the same drawings in some cases.
+ vs −
R
+ v C L −
i
Figure 1: The quick-start example from the manual [quick.m4].
resistor
resistor(,,Q)
resistor(,,E) ≡ ebox
resistor(,,H)
resistor(,4,QR)
inductor
inductor(,W)
inductor(,L)
inductor(,W,6,M)
ttmotor(,G)
capacitor
capacitor(,C)
capacitor(,C+)
capacitor(,P)
capacitor(,E)
capacitor(,K)
xtal
gap
gap(,,A)
arrowline
ebox(,,,0.5)
memristor
ebox(,0.5,0.3)
inductor(,,,M)
G
tline
Figure 2: Two-terminal elements, showing some variations [CctTable.m4].
diode diode(,S) diode(,V) diode(,v) diode(,B) diode(,CR)
diode(,K) diode(,L) diode(,D)
diode(,Z,RE)
diode(,LE)
diode(,PR)
diode(,T,E)
Figure 3: Diodes [Diodes.m4].
Head A2 A1 em arrows(ND,45) . . .(I) Tail em arrows(N) Figure 4: Radiation arrows [Emarrows.m4].
1
. . .(ID)
. . .(E)
. . .(ED)
−+
µA
source
source(,,0.4)
source(,I)
source(,P)
consource
source(,i)
source(,U)
consource(,I)
source(,V)
source(,R)
consource(,i)
source(,v)
source(,S)
source(,AC)
source(,T)
source(,X)
source(,L)
source(,F) source(,G)
source(,"$\mu$A")
−+
consource(,V) consource(,v) battery
nullator battery(,3,R)
norator
source(,Q) Figure 5: Sources and source-like elements [Sources.m4].
C
S
A P L N Figure 6: Arrows and marks indicating variability [Variable.m4].
amp
delay
amp(,0.3)
delay(,0.2)
Figure 7: Macros amp, delay, and integrator [AmpTable.m4].
2
integrator
integrator(,0.3)
(,,D)
switch W B
dB
(,,OD)
(,,,B)
(,,C,B)
K (,,WBuD)
dswitch= switch(,,,D) (,,WdBK) (,,WBT)
(,,WdBKL)
(,,C)
(,,WBF)
(,,WdBKC)
(,,WBL)
(,,WdBKF)
(,,WBM)
(,,WBCO)
(,,WBMP)
(,,WBRHH)
(,,WBCY)
(,,WBCZ)
(,,WBCE)
(,,WBRH)
(,,WBRdH)
(,,WBMMR)
(,,WBMM)
(,,WBMR)
(,,WBEL)
(,,WBLE)
(,,WdBKEL)
Figure 8: The switch and dswitch macros [Switches.m4].
fuse(,D)
fuse
fuse(,B)
fuse(,C)
fuse(,S)
fuse(,HB)
(,HC,0.5)(,HC,0.5,0.3) cbreaker cbreaker(,R) . . .(,,D)
fuse(,HC)
Figure 9: Macros fuse and cbreaker [Fuses.m4].
ground ground(,T)
(,,F)
(,,E)
(,,S,90)
(,,L)
(,,P)
Figure 10: Ground symbols [Grounds.m4].
antenna
(,T)
(,,L)
(,T,L)
(,,T)
(,,S)
T
T
T1 T2
T1 T2
T
T1 T2
Figure 11: Antenna symbols [Antennas.m4].
3
(,,D)
(,,P)
(,,F)
T1 T2
T
T
In4 In5 Box In1 Circle Box Circle Box In2 In1 In1 In1 In2 In2 In2 In3 In6 In7 In3 In3 In3 . . .(,,H) speaker bell microphone buzzer Box N In1 L R In2 C In3
Face In1 In2 In3 buzzer(,,C)
earphoneearphone(,,C) Figure 12: Audio elements [Audio.m4].
N In1
V1
E1 E
−
W
Out
+
In2
−
+ −
E2
−
V2
+
+
S opamp(,,,,T) Point (15); opamp(,,,,PR) opamp Point (90); opamp
Figure 13: The opamp [Opamp.m4].
P1 P1
S1
TP
TS
TP
S1
P1
TS
TP
TS
S2 P2 transformer ...(,,8,W,4) ...(down 0.6,,2,,8) S2
P2
S2
P2
P1
S1
S1
P1
TP
TS
TS
TP
P2
S2
S2
P2
S1
...(,,9,AL)
...(,R,8,AW)
Figure 14: The transformer element, drawing direction down [Xform.m4].
C
P
O P
O contact
contact(,R)
P2 C1
P1 V1
O1 V2 relay
C
P1 V1
contact(O,)
contact(C,)
C2 O2 C1 O1 V2
relay(2,,)
relay(2,,R)
Figure 15: The contact and relay macros [Relay.m4].
4
relay(2,O,)
relay(2,C,)
B2
E
B2
E
B2
B1
B1 ujt(up dimen ,,,E) ujt(,,P,)
B2
E
B1 ujt(,R,,)
E
B1 ujt(,R,P,)
Figure 16: UJT examples [ujt.m4].
G
S
D
S D G d fet(,,,)e fet(,,,S)d fet(,,,S)c fet(,,,) j fet(right dimen ,,,E) e fet(,R,,) G S D j fet(,,P,)
c fet(,,P) e fet(,,P,)d fet(,,P,) e fet(,,P,S) d fet(,,P,S) D G uH dG dM dT F uB G E Z D S S D Q B . . .(,,ZSDFdT,) S mosfet(,,dGSDF,) . . .(,,dMEDSQuB,) . . .(,,uMEDSuB) . . .(,,uHSDF,) IRF4905 Figure 17: FETs, showing programmable components and example customizations [fet.m4].
A
T1
T1
G
G
T1
A
A
G G G K T2 T2 ...(,BGE) ...(,BRGE)...(,C)
G
K T2 T2 thyristor ...(,B) ...(,BR) A
T1
A
A
A G
G
G A
G G K G K K K K K ...(,ARE)...(,UA)...(,UAV)...(,UAH)...(,UAN) ...(,UANRE) Figure 18: Thyristor examples [thyristor.m4].
C B
C C
C B
B
C B
C G
G
C B
E E E E E E E bi tr(,R)bi tr(,,P) bi tr(,,,E)igbt igbt(,,LD)Darlington bi tr(up dimen ) Figure 19: Bipolar transistors (drawing direction: up) [Bip.m4].
5
Gb
Gb tgate A
B ptrans
A
B G G
tgate(,L) A
B G tgate(,B)
G G
A B
Gb
B ptrans(,L)
A Gb
Figure 20: The tgate and ptrans elements [Tgate.m4].
N1a
N1b N2a
N2b E1a
E1a W1a
W1a
.. .
n-port W1b
W1
E1
E1b W1b E3b
S1 nterm
nport
··· S1a S4b nport(wid 2.0 ht 1 fill (0.9) "n-port",1,2,3,4) Figure 21: The nport and nterm macros [Nport.m4].
∞
0
gyrator
nullor
gyrator(invis,,0,N) gyrator(invis wid boxht,,0,NV)
Figure 22: Some customizations of nport [NLG.m4].
pitch
winding
diam
core color
Left pins Left pins + cw ccw v1 core wid T2 T2 − T1
winding(R)
T1
φ
T1 T2
T1 T2
T2
i1
i2
g N1
N2
+ v2 −
T1
Right pins Right pins cw ccw
Figure 23: The macro winding(L|R,diam,pitch,turns,core wid,core color) [Windings.m4].
6
iR
47 Ω
1M
33 k
t=0 iL vs
+ −
red 2 4
+
vC − C
i1
i2
9V
100 k
L 220 µ
0.1 µ
8
6
555
7
1
3 470 green
Figure 24: Two simple labeled circuits [ex01.m4][Timer.m4].
Figure 25: A six-pole filter [Sixpole.m4].
SaA SbA ScA Li
Lo v A
ia
SaB
iA Ro
vb
ib
SbB
iB
vB
vc
ic
ScB
iC
vC
va Ri
SaC
Ci
SbC ScC Figure 26: A three-phase switched AC-AC converter [MC.m4].
Ro vi
Ri
vo
i L
−
R
C
+
V
Rg
o
+ v −
h(v)
Figure 27: Precision half-wave rectifier and a tunnel diode circuit (illustrating opamp, diode, resistor, ground, and labels) [ex18.m4][ex19.m4].
7
Vcc RL
R1
R1
Q1
RL Q2
R2
R2
−Vcc Figure 28: Non-planar graph and bistable circuit (illustrating the crossover macro and colored elements) [ex10.m4][bistable.m4].
2C R/2
R
0◦
2C
R/2
R
−
−
+
+
120◦
2C
R/2 Vc
−120◦
R − +
Figure 29: Three-phase oscillator [Three.m4].
R1 vs
+ −
R2 C 2 L1
Figure 30: A skewed circuit used to test the macro gpar (element, element, separation), and a repetitive network created by Pic looping [gpar.m4][ex17.m4].
8
+5V
S+
S−
VDD P1
Vref
Vout
Vin
AB e1 Vc
A
Vc0
e2
B
N1
Vx VBB
N2
Figure 31: A CMOS NAND gate, a test circuit, and an XMOSFET example [ex12.m4].
+ +
−
−
Figure 32: An elementary power supply circuit with colored elements, and a multiple-winding transformer with 3-phase rectifier [pwrsupply.m4].
+5 V
4 kΩ
1.6 kΩ
Q1 X1 X2 X3
130 Ω Q4
Q2
Z = X1 · X2 · X3 Q3
1 kΩ
Figure 33: TTL NAND gate illustrating a transistor with multiple emitters [TTLnand.m4].
9
VB
A B
A+B
A+B
A
A+B
A+B
B
Figure 34: Gate circuit and equivalent embedded I 2 L components illustrating multiple collectors [I2L.m4].
VCC audio R18 R17
R20 Q4
C20
T6
C23
R22
C21 C19 R19
Q6
R26 Q5 R24
R23
R29
R25
R27
C24
R21
C22
C25
R31
V C26
R28
VSS
R30
Figure 35: Transistor radio audio chain (a modest circuit with a few custom elements) [ex11.m4].
+ ECC R2 150
R9 910
R4 100 K
Q13 2N4236 C1 1 µF R14 19 K
i1 + V1 −
− A1 + Nexus SQ-10A R1 20 K
R6 15 K
Q2 2N4236 R5 100 K
Q6 2N4236 C3
Q1 D1 2N3819 D2 OMC-V
Q5 2N3819 R11 20
0.68 µF C2
Q12 2N3819
R12 20
R15 200
0.1 µF
− A2 + Nexus SQ-10A
Q9 2N4236
D4
D5 Q7 1N4729 2N5464
Q3 OMC-V D3 2N5464
C4
D6 1N4728
Q11 2N5464
0.68 µF
R13 91 K
Q4 2N4239
Q14 2N4239
Q8 2N4239
Q10 2N4239
R10 910
R3 150
− ECC
Figure 36: Realization of a controlled source (illustrating stacked element labels) [Csource.m4].
10
i2 + V2 −
Figure 37: Synchronous machine driven by variable-speed drive and rectifier [Drive.m4].
R1
u
+
y
L1
i1 R3
C1
i3 i7
C3 i4
− C2 L2
i2
i5 i6 i8
L3
R2 Figure 38: Labels on non-manhattan elements [ex04.m4].
11
i9
12
R/W
D7 D6 D5 D4 D3 D2 D1 D0
RESET
SYNC
NMI
74LS138
G2b G2a GND
C B A
Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
φ1(in)
φ2(out)
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
IRQ
7 9 10 11 12 13 14 15
39
37
25 24 23 22 20 19 18 17 16 15 14 13 12 11 10 9
4
(0000 - 1FFF)
(2000 - 3FFF)
(4000 - 5FFF)
(6000 - 7FFF)
(8000 - 9FFF)
(A000 - BFFF)
(C000 - DFFF)
(E000 - FFFF)
D7 D6 D5 D4 D3 D2 D1 D0
6116
18 CS 12 GND
17 16 15 14 13 11 10 9
24 VCC 21 R/W
OE
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 20
19 22 23 1 2 3 4 5 6 7 8 D7 D6 D5 D4 D3 D2 D1 D0
5 4 8
3 2 1
Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
OE
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
74LS138
G2b G2a GND
C B A
16 VCC 6 G1
6116
18 CS 12 GND
17 16 15 14 13 11 10 9
24 VCC 21 R/W
7 9 10 11 12 13 14 15
20
19 22 23 1 2 3 4 5 6 7 8 D7 D6 D5 D4 D3 D2 D1 D0
1
6522
VSS
23 25 CS2 φ 24 CS1
34
CB2 CB1 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0
19 18 17 16 15 14 13 12 11 10
39 CA2 40 CA1 9 PA7 8 PA6 7 PA5 6 PA4 5 PA3 4 PA2 3 PA1 2 PA0
RESET
35 RS3(A3) 36 RS2(A2) 37 RS1(A1) 38 RS0(A0)
26 27 28 29 30 31 32 33
20 VCC 21 IRQ 22 R/W
Figure 39: A digital circuit of moderate size, redrawn from M. P. Maclenan and G. M. Burns, “An Approach to Drawing Circuit Diagrams for Text Books,” Tugboat (12)1, March 1991, pp. 66-69 [lcct.m4].
5 4 8
3 2 1
16 VCC 6 G1
6502
1 VSS 21 VSS
34
26 27 28 29 30 31 32 33
40
7
6
8 VCC 38 SO 2 RDY
+
−
−
+ −
+ −
+
+
− −
+ −
+ −
+
Figure 40: Elements at obtuse angles [ex02.m4].
10 1/11
+
+
input
0/00
1/01
1/00
00
0/10
11
output 0/11 +
0/01 01
Figure 41: A rate 1/2 binary convolutional coder and its state diagram [ex16.m4]. uk
b0
yk
P
b1
−a1
bn
−an
Figure 42: Digital filter [ex03.m4].
13
1/10
−K/M 1/K
K/M y1
f (t)
s−1
s−1
y¨2
y2 = x1
y˙ 2 = x2 −B/M
q11
1 r1
a
1
x1
c
a11 p
a21 r2
q
b
r d
a12
1
F2
x2 1
G1
P1
e
F3 2 P2
G2
3
4
G3
P3
P4
a22
Figure 43: Signal-flow graphs [sfg.m4].
AND gate OR gate In1 In2 In3 BUFFER gate
NAND gate Out NOR gate(3) N Out NOT gate
&
≥1
=1
NAND gate(,B) NOR gate(3,NB) BOX gate(PN,N,,,=1)
=
XOR gate
NXOR gate
BOX gate(PP,N,,,=)
Figure 44: Basic logic gates [Logic.m4].
A2 Q7
A1 A0 D E C To other latches Figure 45: General-purpose latch: a small logic circuit [ex08.m4].
14
A2 A1 A0
D0
D1
D2
D3
D4
D5
D6
D7
Figure 46: Decoder logic, constructed using the for macro [Decoder.m4].
CLR D
Q
Q
T
Q
R
Q
J CK
CK
CK
Q
S
Q
K
Q
Q PR
FlipFlop(D)
FlipFlop(T)
FlipFlop(RS) FlipFlop(JK)
1
1
CLR
CLR Q
J
CLR Q
J
CK
1
CK
K
Q
1
Q
PR
Q
J
CK
K
K
Q
PR
FF2 DC
1
PR
FF1 1
FF0 1
1
D02
D01
D00
Figure 47: Some flip-flops [ex21.m4].
PR3
PR4
PR2
PR0
PR1
PRESET ENABLE
SERIAL INPUT
PR
PR Q
S CK R
R
PR Q
S CK
CK Q
CLR
PR Q
S
R
Q CLR
CK Q
CLR
R
CLOCK
Figure 48: A 5-bit shift register drawn using a custom flip-flop [ShiftR.m4].
Q
S CK
Q CLR
CLEAR
15
PR Q
S
R CLR
OUTPUT
a
c
b
a
d
CanLogic(AND,,OR,,abcd,a˜b,c,˜ad)
c
b
d
CanLogic(OR,N,NAND,,ab˜c,a˜bc,ac,˜d)
Figure 49: A way of automatically drawing two-layer logic diagrams [CanLogic.m4].
KD s r(s)
e(s)
u(s)
Kp
y(s) G(s)
− KI /s (a) P ID control
r
u −
d dt x
= Ax + Bu y = Cx Plant
y
K x ˆ
d ˆ dt x
= (A−LC)ˆ x + Bu + Ly
Observer (b) Output feedback with a full-order observer
reference yc ref R
uref
“inverse” ˆ G
disturbance z
ym ref e
W control input
stabilizer δu K
u
plant G
yc ym
− Controller (c) Nonlinear feedforward (for performance) and small-signal feedback (for stability) Figure 50: Control-system block diagrams that do not require m4 [control.m4].
16
spot of light
electron beam electron gun
deflection plates
B(t)
vacuum
r
glass enclosure (tube) phosphor coating
Figure 51: Line diagrams [ex00.m4][ex07.m4]. z N
z0
z1
P β α
x1
X S φ
φ φ x0
θ
y
x
θ y1
Pˆ
y0
Figure 52: Test of project and other lib3D macros, showing the projection of a solid onto the y1 , z1 plane by sighting along the x1 axis. [exp.m4][Globe.m4].
17
z
y
x Figure 53: Plotting a surface using a gray scale [graysurf.m4].
2.36
4.22 (2) PL
AB
A
10.92
27.76
13.28 30.15 41.28
label
X
C dimension dimension dimension dimension dimension
blank width offset
CA
B
DB
T 15 (from (from (from (from (from
A C C D C
D to B,0.3,$AB$,20bp ) to B,,$X$,16bp ) to A,0.3,$CA$,14bp ,,->) to B,-0.3,"$DB$" ljust) to D,,s box($Tˆ{%g}$,15),W)
tic offset
linespec A B tic offset dimension (from A to B,0.5,\sl label,29bp ,0.1) Figure 54: Illustrating the macro dimension (linespec, offset, label, D|H|W|blank width, tic offset,<-|->). A negative second argument implies an offset to the right of the linespec direction. A label starting with " or sprintf is copied literally. If label is an s box(...) then setting argument 4 to H, W, or D tailors the blank width to the s box height, width, or diagonal respectively; i.e., W is equivalent to s wd+textoffset*2 [ex09.m4].
18
¯ CO
u
CO ¯O ¯ C
D
¯ CO y
Figure 55: Use of darrow [ex05.m4].
k z
}|
k
t
{
0
z
}|
n+p+m
t
{
0
0
0 o
`
r
q
F
E
G
Figure 56: Crosshatching by for loops [ex06.m4].
100 50 20
y(t) = 2.5 t3
10 5 y(t) 2
y(t) = 0.05 t2
1 0.5 0.2 0.1 1
2
t
Figure 57: A graph drawn using the pic language [Loglog.m4].
19
5
10
Figure 58: Conestoga Sailing Club (illustrating the filling of arbitrary shapes) [csc.m4].
Figure 59: Redrawn from a detail of the set design for the musical Dracula, used for testing dpic. This diagram consumes much LATEX main memory but can be produced as the raw postscript output of dpic -r since no text formatting is required [rose.m4].
20
Figure 60: Variations on M. Goossens, S. Rahtz, and F. Mittelbach, The LATEX Graphics Companion, Addison-Wesley 1997, pp. 57-58 [diamond.m4].
R 0◦ 330◦
C
30◦
R M
300◦
M
G
270◦
B Y
90◦
240◦
120◦
B 210◦
150◦ 180◦
C Figure 61: An exercise in calculating RGB colours [worm.m4].
21
Y
60◦
G
Figure 62: The Sierpinski triangle: a test of pic macro recursion [Sierpinski.m4].
Figure 63: Modest repetition and partial fill [recycle.m4][yinyang.m4].
22
5 languages 1 intermediate language 5 machines
Figure 64: Simple diagrams that are easily drawn by looping [ex15.m4].
Sirius
Vega
Canopus
Alpha Centauri
Capella
Rigel
Arcturus
Achernar
Procyon
Betelgeux
Beta Centauri
Figure 65: A binary tree [Btree.m4].
23
.N .W
.N
Case 1
Task 1
.E
Task
.S
.E
Task 1.5
T
i<n
.W
While-do Case 2
.N
Task 2 is bigger
Case 3
.W
.E
Task
nâ&#x2030;Ľ5
Task 3
F
.S Repeat-until
.S Case statement
.N F .W Start
First task
F
Test 1
T F
F
T True
.S If-then-else (the True and False tasks are optional)
Task
iâ&#x2030;Ľ5
False
A<B
A<B
T Right
Left
Compound statement Figure 66: A flowchart sampler [Flow.m4].
24
.E
Basket
Ball Star player
Figure 67: Overlaying a figure with line graphics [Incleps.m4].
25