18EI3005 Embedded Linux 3:0:0 3

considerations when using sEOS- Memory requirements - embedding serial communication & scheduling data transmission - Case study: Intruder alarm system.

Module 6: Embedded System Application Development: (7 Hours)

Objectives, different Phases & Modelling of the embedded product Development Life Cycle (EDLC), Case studies on Smart card- Adaptive Cruise control in a Car -Mobile Phone software for key inputs.

References:

1. Rajkamal, ‘Embedded system-Architecute, programming, Design’, TataMcgraw Hill, 2011 2. Peckol, “Embedded System Design”, John wiley & Sons, 2010 3. Shibu,K.V. “Introduction to Embedded Systems”, TataMcgraw Hill, 2009 4. Lyla B Das “Embedded Systems- An Integrated Approach” , pearson 2013 5. Michael J Point, “Embedded C” Pearson Education 2007 6. Steve Oualline, “Practical C Programming” 3rd Edition O’Reilly Media Inc., 2006

18EI3003 PROGRAMMABLE DEVICES FOR INDUSTRIAL AUTOMATION L T P C 3 0 0 3

Course Objectives

1. To expose the students to the fundamentals of sequential system design, Asynchronous circuits, 2. To teach Programmable Device architecture and programming 3. To introduce hardware descriptive languages for industrial automation

Course outcome: At the end of this course, students will demonstrate the ability to

1. Analyze and design Sequential digital circuit. 2. Analyze the Asynchronous Sequential Circuit 3. Analyze the FPGA Architectures for process automation. 4. Develop program for real time applications using VHDL descriptive languages. 5. Develop simple programs using concepts in VERILOG descriptive languages 6. Create FPGA programming for industrial automation.

Module 1: Sequential Circuit Design: (6 Hours)

Analysis of Clocked Synchronous Sequential Networks (CSSN) Modelling of CSSN – State Stable Assignment and Reduction – Design of CSSN – ASM Chart – ASM Realization.

Module 2: Asynchronous Sequential Circuit: (8 Hours)

Analysis of Asynchronous Sequential Circuit (ASC) – Flow Table Reduction – Races in ASC – State Assignment Problem and the Transition Table – Design of ASC – Static and Dynamic Hazards –Essential Hazards – Designing Vending Machine Controller.

Module 3: Architecture & Design using Programmable Devices: (8 Hours)

Programming Techniques - Re-Programmable Devices Architecture- Function blocks, I/O blocks, Interconnects, Realize combinational, Arithmetic, Sequential Circuit with Programmable Logic Devices. PLDs – Xilinx FPGA – Xilinx 2000, Xilinx 3000, Xilinx 4000- Altera Max – ACTimplementation of combinational and sequential circuits with FPGA and PLDs. Process automation –flow, pressure and level control using FPGA Module 4: High Level Descriptive Languages - VHDL programming: (8 Hours) Design flow process – Software tools – Data objects – Data types – Data operators – Entities and Architectures –Component declaration and instantiation. Concurrent signal assignment – conditional signal assignment – selected signal assignment – concurrent and sequential statements – Data flow, Behavioural and Structural Modelling - Test bench –simple programming.

Module 5: VERILOG Programming: (8 Hours)

Verilog: Design methodology – Modules – Ports – Basic concepts – Operators – Nos. specification –Data types – Arrays – Parameters – Gate delays – Operator types – Conditional statements –Multiway branches - Loops - Switch – Modelling elements- simple examples

Module 6: FPGA for Industrial Automation: (7 Hours)

Motor control- Industrial networking with Xilinx devices- machine vision camera solutionsMonitoring processes and equipment- Automated system shut-down - Detecting dangerous situations.

References:

1. Charles H. Roth Jr., “Digital Systems design using VHDL”, Cengage Learning, 2010. 2. Samir Palnitkar, “Verilog HDL”, Pearson Publication”, II Edition. 2003.