pdf by lisl pasco

Instruction Set Architecture ISA

Instruction Set Architecture • Includes the needed information to interact with microprocessor – Instruction set – Accessible registers and their sizes – Info. about what memory location can be used – Interrupts

Compiling and Assembling

Assembly Language Instructions • Instruction Types – Data Transfer Instruction • Move data from one place to another (the common process for move is to copy the data and put it in another location – a misnomer) – – – – –

Load data from memory to register Store data from register to memory Move data from register to register Input data to microprocessor’s register Output data from microprocessor’s register

Assembly Language Instructions • Instruction Types – Data Operation Instructions • Data is modified by the microprocessor – Arithmetic instructions » Add, subtract, multiply, increment, decrement, clear (could be logical as well) » Special class – floating point instructions – Logic instructions » And, Or, Not, Xor – Shift/Rotate instructions » SHL, SHR, ROL, ROR

Assembly Language Instructions • Instruction Types – Program Control Instructions • Jump or branch instruction – Absolute jump – Conditional jump

• Interrupts (not part of the instruction set) – Hardware interrupts – Software interrupts

Data Types • Numeric Data – Unsigned integer ( 0 to 2n – 1) – Signed integer (-2n-1 to 2n-1 -1) – Floating point (with fractional part)

• Boolean data – True, false

• Character data – Ex. ASCII, EBCDIC, UNICODE

Addressing Mode • Manner of microprocessor in accessing the memory – – – – – – – –

Direct mode Indirect mode Register direct Register indirect Immediate mode Implicit mode Relative mode Index mode

Addressing Mode

Instruction Format

Instruction Set Architecture Issues • What should the ISA be able to do? – For general purpose computing • Issues of completeness and orthogonality

– Special purpose or applied specific computing

• Does this processor have to be backward compatible? – More important in general purpose computing

• What types and sizes of data will the processor deal with? • Are interrupts needed? • Are conditional instructions needed?

ISA of RSCPU • Design for instruction only – too limited for implementation • Specification – Can use 64KB (216 address and 8bit data) of memory – Memory mapped I/O – Accessible Registers • Accumulator(AC): receives the results of operation and one of the operand in the operation, 8bit • Reg. R: general purpose register, 8bit • Z flag register

– Inaccessible Registers • AR, PC, DR,TR, IR

– Instruction set

Instruction Set of RSCPU

Instruction Format of RSCPU • 3byte code

– Ex. 25: jmpz1234H

Addr1

Instr code

Addr2

Low order byte

Addr3

High order byte

06H

34H

12H

Using the instruction set •

Write a program to calculate the sum 1+2+3+….+n

•

High level prog representation total = 0; for i = 1 to n do { total = total +i};

•

Steps 1. 2. 3. 4.

total=0, i=0 i=i+1 total=total+I if i!=n then goto 2

Seatwork • Given R=10, PC=20 and index register X=30, show the value of the accumulator for the following instructions. All memory location Q contain the value Q+1 and each instruction uses 2 memory location – – – – – – –

LDC 10 LDAC (10) LDAC R LDAC @R LDAC #10 LDAC $10 LDAC 10(X)

• For R=30, PC=10 and index register X=20, repeat the problem

Seatwork • Write the equivalent codes for RSCPU x = 5; y = 6; product = xy; Show the simulation

• Write the equivalent codes for RSCPU y = 45; y = 5; quotient = x / y; Show the simulation