Internal Use Only website:http://biz.LGservice.com
PLASMA TV SERVICE MANUAL CHASSIS : PD81A
MODEL : 42PG6000
CAUTION BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
42PG6000-ZA
CONTENTS
CONTENTS .............................................................................................. 2 SAFETY PRECAUTIONS ..........................................................................3 SPECIFICATION ........................................................................................4 ADJUSTMENT INSTRUCTION .................................................................6 TROUBLE SHOOTING ............................................................................11 BLOCK DIAGRAM...................................................................................20 EXPLODED VIEW .................................................................................. 30 SVC. SHEET ............................................................................................... PRINTED CIRCUIT DIAGRAM ....................................................................
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Replacement Parts List. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this monitor is blown, replace it with the specified.
Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet. Do not use a line Isolation Transformer during this check. Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
AC Volt-meter
Due to high vacuum and large surface area of picture tube, extreme care should be used in handling the Picture Tube. Do not lift the Picture tube by it's Neck.
Leakage Current Cold Check(Antenna Cold Check) With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1MΩ and 5.2MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
-3-
To Instrument's exposed METALLIC PARTS
0.15uF
Good Earth Ground such as WATER PIPE, CONDUIT etc.
1.5 Kohm/10W
LGE Internal Use Only
SPECIFICATIONS NOTE : Specifications and others are subject to change without notice for improvement. V
Application Range This spec is applied to the 42” PLASMA TV used PD81A Chassis. Chassis
Model Name
PD81A
42PG6000
Market
Brand
Austria,Belgium,Bulgaria,Coratia,Czech,Denmark,Finland,
Remark
LG
France,Germany,Greece,Hungary,Italy,Luxembourg, Netherlands,Norway,Poland,Portugal,Rumania,Russia,Ser bia,Slovenia,Spain,Sweden,Switzerland,UK
V
Specification Each part is tested as below without special appointment. 1) Temperature : 25±5°C (77±9°F), CST : 40±5 2) Relative Humidity: 65±10% 3) Power Voltage: Standard Input voltage (100-240V~, 50/60Hz) * Standard Voltage of each product is marked by models. 4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with SBOM. 5) The receiver must be operated for about 20 minutes prior to the adjustment.
V
Test Method 1) Performance : LGE TV test method followed. 2) Demanded other specification Safety : CB specification EMC : CISPR 13 specification Model
Market
Appliance
42PG6000-ZA
Austria,Belgium,Bulgaria,Coratia,Czech,Denmark,Finlan
Remark
Safety : IEC/EN60065
d,France,Germany,Greece,Hungary,Italy,Luxembourg,
EMI
: EN55013
Netherlands,Norway,Poland,Portugal,Rumania,Russia,
EMS
: EN55020
Serbia,Slovenia,Spain,Sweden,Switzerland,UK
V
General Specification ( 42” XGA ) No
Item
Specification
1
Display Screen Device
42” Wide Color Display Module
2
Aspect Ratio
16:9
3
PDP Module
PDP42G1,
Remark
Plasma Display Panel
RGB Closed(Well) Type Glass Filter(38%) Pixel Format : 1365horiz. By 768 vertical 4
Operating Environment
1)Temp.
: 0~40deg
LGE SPEC.
2)Humidity : 20~80% 5
Storage Environment
3)Temp.
: -20~60deg
4)Humidity : 10~90% 6
Input Voltage
100-240V~, 50/60Hz
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
-4-
Maker : LG
LGE Internal Use Only
V
Module Specification2 No 1
Item Market
Specification
Remark
Austria,Belgium,Bulgaria,Coratia,Czech,Denmark,Finland 25 Country ,France,Germany,Greece,Hungary,Italy,Luxembourg, Netherlands,Norway,Poland,Portugal,Rumania,Russia, Serbia,Slovenia,Spain,Sweden,Switzerland,UK
2
roadcasting system
1) PAL/SECAM BG
EU(PAL Marker)
2) PAL/SECAM DK 3) PAL I / II 4) SECAM L/L’ 5) DVB T 3
Receiving system
Analog : Upper Heterodyne Digital : COFDM
4
Scart Jack(2EA)
PAL, SECAM
Scart1 Jack is Full scart and support RF-OUT(Analoge) Scart2 Jack is Half scart and support MNT-OUT
5
Video Input (1EA)
PAL, SECAM, NTSC
6
S-Video Input (1EA)
PAL, SECAM, NTSC
Analog(D-Sub 15Pin)
7
Component Input (1EA)
Y/Cb/Cr, Y/Pb/Pr
HDMI1/DVI,HDMI2,HDMI3,HDMI4
8
RGB Input
RGB-PC
9
HDMI Input(4EA)
HDMI-PC
L/R Input
HDMI-DTV 10
Audio Input (3EA)
RGB/DVI Audio, Component, AV
11
SPDIF Out(1EA)
SPDIF OUT
12
USB
For SVC, S/W Download, X-Studio
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Side(X-Studio Only PG60 Series)
-5-
LGE Internal Use Only
ADJUSTMENT INSTRUCTION * Using ‘power on’ button off the control R/C, power on TV.
1. Application Object These instructions are applied all of the 42” PLASMA TV, PD81A Chassis.
4. Auto-control adjustment process V V
2. Note (1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. (2) Adjustment must be done in the correct order. (3) The adjustment must be performed in the circumstance of 25±5°C of temperature and 65±10% of relative humidity if there is no specific designation. (4) The input voltage of the receiver must keep 100-240V~, 50/60Hz. (5) The receiver must be operated for about 15 minutes prior to the adjustment.
All adjustment process is executed one time through RS-232C. Command send -> ADC Calibration -> Model name download -> EDID download.
NO
Item
1
Ready
a
d
0
0
Ready
2
ADC
a
d
1
0
ADC start
ADC
a
d
9
9
a
d
9
0
a
e
0
0
3
CMD1 CMD2 Data 0
Remark
Confirmation 4
ADC Mode Out
5
Download
Transmitting adjustment mode In
Mode In
After RGB Full white HEAT-RUN Mode, the receiver must be operated prior to adjustment. O Enter into HEAT-RUN MODE 1) Press the POWER ON KEY on R/C for adjustment. 2) OSD display and screen display PATTERN MODE. - Select “3. Test Pattern” by using D/E(CH+/-) and press ENTER(V) - Select “White” by using (F/GVOL+/-) and press ENTER(V)
instruction, operate adjustment command.
O
6
EDID
a
e
1 0~4,9
All=0 ; HDMI1,2,3,4=1,2,3,4 ; RGB=9
a
e
2 0~4,9
All=0 ; HDMI1,2,3,4=1,2,3,4 ; RGB=9
a
e
5 1~7
Model define index(Data0) are listed at
Download 7
Check EDID Status
8 Define model name 9
* Set is activated HEAT-RUN without signal generator in this mode. * Single color pattern(RED/BLUE/GREEN) of HEAT-RUN mode uses to check PANEL.
Adjustment
next table. a
e
9
9
EDID data existence check in SET
Confirmation 10
Download
assembly a
e
9
0
Mode Out
* Using ‘power on’ button off the control R/C, power on TV. All adjustment process is executed one time through RS-232C. Do not connect extrenal input calbe.
V
Adjsutment process protocol(RS-232C)
CMD1
CMD2
a
e
Data 0 5
Remark 3
42PG6000-ZA
3. S/W auto download using the USB Memory stick * Using ‘power on’ button of the control R/C, power on TV. USB file(EPK) version must be bigger than downloaded version of main B/D.
5. Manual model name download (1) Press ADJ KEY on R/C for model name D/L. (2) Select “0.Model Option” and press ENTER(V). (3) Select model name by using D / E (CH+/-)and press ENTER(V).
(1) Insert the USB memory sick the PCB ASSEMBLY. (2) Using ‘power on’ button of the control R/C, power on TV. (3) S/W download process is executed automatically.
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
-6-
Model Name
Model Option Value
42PG6000-ZA
56000000
LGE Internal Use Only
(2) RGB(128bytes)
6. Manual ADC Adjustment RF Input
AV / Component / RGB input
NO SIGNAL or White noise
NO SIGNAL
V
V
Adjustment is done using internal ADC, so input signal is not necessary. Do not connect external input cable.
6-1. Required Equipment -> Detail EDID Options are below (ⓐ, ⓑ, ⓒ, ⓓ, ⓔ)
(1) Press ADJ KEY on R/C and enter EZ ADJUST. (2) Select “1.EDID D/L” by using D / E (CH+/-) and press ENTER(V). (3) Select “Start” by using F/G(VOL+/-) and press ENTER(V). (4) ADC Adjustment is executed automatically.
ⓐ Product ID Model Name
7. EDID Download
EDID MODEL
Product ID
FUCTION
42PG6000-ZA 42PG6000-ZA 40239(9D2F)
Analog
40240(9D30)
Digital
ⓑ Serial No => Controlled on production line
7-1. Required Equipment
ⓒ Month, Year => Controlled on production line: ex) Monthly: ‘11’ -> ‘0B’ Year: ‘2007’ -> ‘11’
*Do not connect HDMI and RGB cable. (1) Press ADJ KEY on R/C and enter EZ ADJUST. (2) Select “5.EDID D/L” by using D / E (CH+/-) and press ENTER(V). (3) Select “Start” and press ENTER(V). (4) EDID download is executed automatically. (5) Press EXIT key on R/C.
ⓓ Model Name(Hex) Model Name
Model Name(Hex)
42PG6000 00 00 00 FC 00 34 32 50 47 36 30 30 30 0A 20 20 20 20
7-2. EDID DATA (1) HDMI1(256bytes)
ⓔ Checksum => Changeable by total EDID data.
8. PCMCIA CARD Checking Method : You must adjust DTV29 Channel and insert PCMCIA CARD to socket. 1) If PCMCIA CARD works normally, normal signals display on screen. But it works abnormally, “No CA module” words display on screen. * Set up “RF mode” before launching products.
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
-7-
LGE Internal Use Only
* Before adjusting White-balance, the AV ADC should be done. If ADC status were “NG”, Need to ADC adjustment.
Each PCB assembly must be checked by check JIG set. (Because power PCB Assembly damages to PDP Module, especially be careful)
10. Adjustment of White Balance
9. POWER PCB Assy Voltage Adjustments (Va, Vs Voltage adjustments)
10-1. Required Equipment (1) Color Analyzer : CS-100, CA-100+(CH.10), CA210(CH.10)) * Please adjust CA-100+/CA-210 by CS-1000 before measuring. -> You should use Channel 10 which is Matrix compensated.
9-1. Test Equipment : D.M.M. 1EA 9-2.Connection Diagram for Measuring : refer to Fig.1 N
9-3. Adjustment Method (1) Va Adjustment 1) After receiving 100% Full White Pattern, HEAT RUN. 2) Connect + terminal of D.M.M to Va pin of P811, connect - terminal to GND pin of P811. 3) After turning VR901, voltage of D.M.M adjustment as same as Va voltage which on label of panel right/top. (Deviation; ±0.5V)
N
(2) Vs Adjustment 1) Connect + terminal of D.M.M to Vs pin of P811, connect – terminal to GND pin of P811. 2) After turning VR951, voltage of D.M.M adjustment as same as Va voltage which on label of panel right/top. (Deviation; ±0.5V)
N
(Fig.1) Connection diagram of power adjustment for measuring
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
-8-
Color temperature standards according to CSM and Module. CSM
PLASMA
Cool
11000K
Normal
9300K
Warm
6500K
Remark
Change target luminance and range of the Auto adjustment W/B equipment. Target luminance
65
Range
20
White balance adjustment coordinate and color temperature. Cool
CS-1000
CA-100+(CH.10) CA-210(CH.10)
X
0.276
0.276±0.002
0.276±0.002
y
0.283
0.283±0.002
0.283±0.002
uv
0.000
0.000
0.000
Medium
CS-1000
X
0.285
0.285±0.002
0.285±0.002
CA-100+(CH.10) CA-210(CH.10)
y
0.293
0.293±0.002
0.293±0.002
uv
0.000
0.000
0.000
Warm
CS-1000
X
0.313
0.313±0.002
0.313±0.002
y
0.329
0.329±0.002
0.329±0.002
uv
0.003
0.003
0.003
CA-100+(CH.10) CA-210(CH.10)
LGE Internal Use Only
10-2. Connection Picture of the Measuring Instrument(On Automatic control)
11. Adjustment of White Balance
(1) Inside PATTERN is used when W/B is controlled. Connect to auto controller or push control R/C IN-START -> Enter the mode of White-Balance, the pattern will come out.
Full White Pattern
(1) Press ADJ KEY on R/C and enter EZ ADJUST. Select “3. Test Pattern” by using D/E(CH+/-) and press ENTER(V) Select “White” by using F/G(VOL+/-) and press ENTER(V) and heat run over 15minutes. (2) Zero Calibrate CA-100+/CA-210, and when controlling, stick the sensor to the center of PDP module. (3) Press ADJ KEY on R/C and enter EZ ADJUST. Select “2. White Balance” and press G(VOL +). Set test-pattern on and display inside pattern. (5) Control is carried out on three color temperatures, COOL, MEDIUM,WARM. (Control is carried out thress times)
CA-210
Color ANALYZER TYPE : CA-210
RS-232C Communication
(Fig.6) Auto AV(CVBS) Color Balance Test Pattern <Temperature : COOL> - R-Cut / G-Cut / B-Cut is set to 64/ - Control R-Gain and G-Gain. - Each Gain is limited to 192. <Temperature : MEDIUM> - R-Cut / G-Cut / B-Cut is set to 64/ - Control R-Gain and G-Gain. - Each Gain is limited to 192. <Temperature : WARM> - R-Cut / G-Cut / B-Cut is set to 64/ - Control G-Gain and B-Gain. - Each Gain is limited to 192.
10-3. Auto-control interface and directions (1) Adjust in the place where the influx of light like floodlight around is blocked.(illumination is less than 10ux) (2) Measure and adjust after sticking the Color Analyzer(CA100+, CA210) to the side of the module. (3) Aging time - After aging start, keep the power on(no suspension of power supply) and heat-run over 15 minutes. - keep white pattern using inside pattern. A
Auto adjustment Map(RS-232C) RS-232C COMMAND [CMD ID DATA] Cool
Med
R Gain
jg
Ja
js
G Gain
jh
Jb
je
B Gain
ji
Jc
jf
CENTER (DEFAULT)
Min
Warm
MAX
Cool
Med
Warm
00
192
192
192
255
00
192
192
192
255
00
192
192
192
255
R Offset
65
65
62
128
42PG1 G Offset
56
56
53
128
B Offset
71
70
76
128
12. Input the Shipping Option Data 1) Push the IN-START key in a Adjust Remocon. 2) Input the Option Number that was specified in the BOM, into the Shipping area. 3) The work is finished, Push V Key.
13. Set Information (Serial No& Model name) 13-1. Check the serial number & Model Name (1) Push the menu button in DTV mode. (2) Select the SETUP -> Diagnostics -> To set. (3) Check the Serial Number.
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
-9-
LGE Internal Use Only
14. SET factoring condition
15. Flash Memory Download
(1) This adjustment is setting factory shipment mode. (2) Push the IN-STOP key of adjustment remote controller before the factory shipment. No
Item
Condition
1 Input Mode
Antenna
2 Volume Level
10
3 Mute
Off
4 Aspect Ratio
16:9
5 SET ID
1
6 Picture PSM
Vivid
Color Temp. Advanced
8 Time
(1) To installation the ‘LG Term’, extract ‘lgterm.zip’ to a folder. (2) Execute ‘lgterm.exe’.
Remark
(3) Before downloading epk file, change the baud-rate value. 1) Press the ‘IN-START’ button. 2) Select the ‘System’ menu. 3) Enter ‘115200bps’ on the ‘Baudrate’. 4) Exit the menu.
Medium Cinema
Off
Black level Auto 7 Sound
15-1. Configuration Environment
SSM
Standard
AVL
Off
Balance
0
TV Speaker
On
Auto Clock
On
Manual Clock
--
Off Timer / On Timer
Off
15-2. Download epk file using ‘LG Term’ (1) Execute ‘lgterm.exe’ (2) Select a serial port and change a baud-rate value. 1) Select a serial port which is connected through a RS232 cable on ‘Setup’ Menu. * If the selected port is not connected, a warning message will appear. 2) Change the baud-rate from a default value to ‘115200bps’ on ‘Setup’ Menu.
Sleep Timer / Auto Off 9 Option
SIMPLINK
On
Key Lock
Off
ISM Method
Normal
Power Saving
Off
10 Channel Memory
Analog Digital
(3) Press the OK button. (4) Turn on the TV set and press the ‘Enter’ key at the same time. (5) Douglas prompt will appear. (6) Insert ‘swuhz’ and enter. (7) Change the baud-rate to ‘460800bps’ on ‘Setup’ Menu. (8) Press ‘Alt+F’, ‘T’, ‘Z’, ‘S’ in order. (9) Select the epk file.
(10) It will take 4~5 minutes. (11) To apply last epk file, TV set should be restarted. Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 10 -
LGE Internal Use Only
TROUBLE SHOOTING GUIDE 1. Power Board 1-1. The whole flowchart which it follows in voltage output state
Start check
Doesn't the screen whole come out?
Yes
Is it identical with Power Off condition?
No
Is the Interface signal operated?
Yes No
Doesn't the low pressure output come out?
Yes
1. Check the Power Off condition.
Yes
Doesn't the St-by 5V signal come out?
2. Check the Interface signal condition.
Doesn't the 5V Monitor signal come out?
No
Yes
Yes No
Doesn't the VSC signal RL-ON come out?
No
3. Check the St-by 5V signal circuit.
Yes
4. Check the 5V Monitor signal circuit.
5. Check the VSC RL-ON signal. No
Doesn't the high tension output come out?
Yes
Doesn't the VSC signal Vs-ON come out? Yes
Does high tension output voltage Drop occur?
Yes
7. Check the VSC Vs-ON signal
No
Yes
When the Y, Z B/D Module input connector is remove, does Power Board hightension output voltage Drop occur?
Doesn't the VSC low pressure output come out?
Doesn't the Vs, Va voltage output come out?
No
Yes
8. Check the Vs, Va voltage output circuit.
No
When the Y B/D Module input connector is removed, does output voltage drop occur?
6. Check the VSC low pressure output
No
When the Z B/D Module input connector is removed, does output voltage Drop occurs?
No Yes
Manufacture enterprise meaning of a passage
Yes 10. Check the Z B/D Module output circuit
9. Check the Power Board Output high tension circuit
CopyrightŠ2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 11 -
Yes 11. Check the Y B/D Module output circuit
LGE Internal Use Only
1-2. Power Board Structure (1) Pin Layout
(2) Pin Spec AC INLET NO
PDP MODULE
VSC BOARD NO
CN1
P11
P12
1
AC
Vs
Vs
1/2
16V
16V
2
NC
Vs
Vs
3/4
GND
GND
3
AC
P21
NC
NC
5/6
12V
12V
4
GND
GND
7/8
GND
GND
5
GND
GND
9/10
5V
5V
6
Va
Va
11/12
5V
5V
7
Va
Va
13/14
GND
GND
8
GND
GND
15/16
GND
GND
9
M5V
M5V
17/18
5V_MNT
AC_DET
10
M5V
M5V
19/20
RL_ON
VaVs_ON
YH396-10P
YH396-10P
21/22
M5V_ON
GND
Wafer P/N
YH396-03P
Wafer P/N
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 12 -
SMW200-22C
LGE Internal Use Only
2. No Power (1) Symptom 1) Doesnâ&#x20AC;&#x2122;t minute discharge at module. 2) Non does not come in into the front LED.
(2) Check following No A Power cord is plugged with TV set?
Plug in power cord.
Yes
Is the AC-INLET connected with the power board?
No Connect the AC-INLET
Yes
Is the Fuse(F101,F801) on Power Board normal?
No Replace the Fuses.
Yes
Is the Power Board with VSC Board though Cable connected?
No Connect the Cable.
Yes
Measure output voltages(16V,12V,5V) on the power board. If the measured values is not normal, replace power board.
CopyrightŠ2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 13 -
LGE Internal Use Only
3. Protect Mode (1) Symptom 1) After once shining, it does not discharge minutely from module. 2) The Rely falls.(The sound is audible “click”) 3) It is converted with the color where the front LED is red from green.
(2) Check following Is the Power Board normal ?
No
Is output the normality Low/High voltage except Stand-by 5V?
No
Replace Power Board.
Yes Is the each connector normal?
No
After connecting well each connector, the normality it operates?
Yes
Replace the connector.
Yes Is the Y-Board normal?
No
Is the Fuse(FS201) on Y-B/D normal?(In case of open is replace)
Yes
Is the output voltage normal after remove P209 connector of Y-B/D?
Yes
Replace Y-Board.
Yes
Replace Z-Board.
Yes Is the Z-Board normal?
No
Is the Fuse (FS1) on Z-B/D normal? (In case of open is replace)
Yes
Is the output voltage normal after remove P3 connector of ZB/D?
Yes Is the X- Board normal?
No
Is the output voltage normal after remove P242 connector of X-B/D?
Yes
After remove P211 output voltage normality: Replace Right X-B/D After remove P23 output voltage normality: Replace Left X-B/D
Yes Is the Ctrl Board normal?
No
Is the output voltage normal after remove P163 connector of Ctrl-B/D?
Yes
Replace X-Board.
Yes Is the VSC Board normal?
No
Is the output voltage normal after remove P1001 of VSC Board?
Yes
After remove P1001 normal operation: Replace VSC Board
Yes Is the COF of X, Y, Z normal ?
No
After crisis COF of each board, check the normality operates. If in case normality operates, correspondence COF Fail is replace the module.
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 14 -
LGE Internal Use Only
4. No Raster (1) Symptom 1) No OSD and image occur at screen. 2) It maintains the condition where the front LED is green.
(2) Check following Does minute discharge At Module?
No
NO Is the VAVS on?
Is output the normality Low/High voltage except stand-by 5V?
NO
Replace the Power board
YES
Yes
Is the LVDC cable normal?
Check the PDP Module
No
Reconnect the LVDS cable in P501
Yes
Is the IC700(FLI106X0H) Output normal?
No Replace the VSC.
CopyrightŠ2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 15 -
LGE Internal Use Only
5. In case of occurring strange screen into specific mode 5-1. In case the OSD does not displayed (1) Symptom 1) LED is green. 2) The minute discharged continuously becomes Accomplished from module.
(2) Check following
Is the LVDS cable normal ?
No
Yes
Is the LVDS cable connected?
Replace the cable.
No
Re-insert the Cable inserts.
Yes
Is the VSC Board normal?
No
Is the IC100(FLI106X0H) normal?
Yes Replace the VSC B/D
No
Replace IC100(FLI106X0H)
Yes
Is the Ctrl Board of Module normal?
No Replace Ctrl B/D.
CopyrightŠ2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 16 -
LGE Internal Use Only
5-2. In case of does’t display the screen into specific mode (1) Symptom 1) The screen does not become the display from specific input mode (RF, AV, Component, RGB, DVI).
(2) Check following 1) Check the all input mode should become normality display.
(3) In case of becomes unusual display from RF mode Is the Tuner normal?
No
Is the RF cable connected with TV Set?
Yes
Is the Input voltage, IIC Communication and CVBS output normal?
No
No
Yes Replace the Tuner.
Connect the RF cable.
Block A Is the IC100(FLI106X0H) normal?
No
Is the IIC communication waveform between the tuner and IC100 normal?
No
Replace the IC100(FLI106X0H).
(4) In the case of becomes unusual display from side S-video/AV mod Is the Video input of the AV (JK105, JK106) normal?
No Check the input source
Same as Block A
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 17 -
LGE Internal Use Only
(5) In the case of becomes unusual display from Component, RGB mode Is the R,G,B input and H,V Sync of the J104 normal?
No Check the input source
Yes Same as Block A
(6) In the case of becomes unusual display from HDMI mode Is the HDMI(IC201) normal?
No
Is the TMDS waveform between the IC and HDMI jacks normal?
No Replace the IC201.
Yes Same as Block A
(7) In the case of becomes unusual display from SCART mode Is the Video input od A/V normal?
No Check the input source
Yes Same as Block A
CopyrightŠ2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 18 -
LGE Internal Use Only
6. In case of no sound (1) Symptom 1) LED is Green. 2) Screen display but sound is not output.
(2) Check following All input(mode) is no sound?
Yes
Is the speaker On it menu?
No
Only HDMI is No Sound?
No Set on speaker in menu.
YES Yes
Download the EDID data
Is the speaker Cable normal?
No
Check the Speaker Cable.
No
Replace the IC629 (MSP4458)
No
Replace the IC601 (NTP-3000A)
No Yes Only RF is no sound?
Check the Tuner IN/OUTPUT
Yes
Is the IC629 normal? YES
Is the IC601 normal? YES
Replace the VSC Board
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 19 -
LGE Internal Use Only
Tuner (TDFV-G135D1) TU301
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 20 -
RGB
TMDS351PAG IC201
Audio L/R out
Audio L/R out
DTV/MNT OUT
Audio L/R in
I2S Muxed audio
TMDS[0:7]
TMDS[0:7]
RGB, L/R
Y Pb Pr, L/R
CVBS, Y/C, L/R
CVBS
MSP4458
Audio L/R in
Address[0:14]
DATA[0:7]
TS[0:7]
Demux
O
nl
y
FLI10306
R L/
o di Au
MPE
I2C
TX TX
TX/RX
USB I2C
MICOM WT61P8 IC802
RX
EEPROM 24LC512 IC907
TX
AT24C16AN IC801
MAX3232CDR IC101
SPDIF
Digital amp (NTP3000A) IC601
SPDIF_OUT
I2S
Host Data[0:15]
LPF
RS-232C
NOR Flash (32MB) SPANSION IC404
DDR2 SDRAM (64MByte) Qimonda IC701
DDR2 Data[16:31]
Host Address[1:16]
DDR2 SDRAM (64MByte) Qimonda IC701
Module I2C
LVDS TMDS ODD[10 bit]
DDR2 Address[0:12]
DDR2 Data[0:15]
NLASB3157 IC1013
HDMI4
HDMI1, HDMI2, HDMI3
COMP1
Side AV1
SCART2
PCMCIA Card
RGB, CVBS, audio L/R
CVBS, SIF, AM Audio
74LVC542A5 74LCX244MTC Bi-Buffer Buffer IC405 IC406,407,408
SCART1
74LVC541A(PW) Buffer IC402
Tuner V out
TS[0], CLK, SY, VAL
O nl y f Au or D di TV o
Main Block Diagram
WXGA Panel
BLOCK DIAGRAM
NLASB3157 IC502
LGE Internal Use Only
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 21 -
LGE Internal Use Only
LPF
LevelAd j
LevelAd j
TRB UF
SIDEC VBSL ink
SIDESS / W
SIDEL
SIDER
SIDEC
SIDEY / CVBS
MICOM
DTV/ MNTL / R
Sc art2L / R
Sc art2L ink
LevelAd j
LevelAd j
[ GPIOA5]
LPF
LevelAd j
LevelAd j
TRA MP[ 6d B]
MUTE_LINE_DTV TRN et
12V- > 3. 3VL evels hif ter
Rec o rd ingC trl
DTV/ MNT_VOUT
Sc art2I D
Sc art2C VBS
TR Ad j
TR Ad j
MUTE_LINE
TRN et
12V- > 3. 3VL evels hif ter
MICOM [ GPIOA4]
TVO UTL / R
Sc art1L / R
Sc art1L ink
TUNER_VOUT
Sc art1F B
Sc art1I D
Sc art1C VBS
Sc art1R , G, B
TRB UF
TRB UF
LPF
[ 15] VIDEO
MSP4458
NLASB3157 Vid eoS / W
Level g enerato r 0V,6 V, 11V
TU_MAIN
FLI10306
VXO_DE
[ SV3P]
[ SCART_FB]
Muxed Aud io
DTV/ MNTs witc hC trl
Sc art2I D
REC8C trl2
REC8C trl1
[ VXO_D1]
[ VXO_D11]
[ AUD_IN_L4]
[ AUD_IN_R4]
[ B4P]
[ SV2P]
[ AUD_OUT1_L,R]
VXO_VS
[ VXO_D13]
[ VOUT2]
[ VDAC_GY_YC_P]
[ LBADC_IN5]
[ VXI_D16]
[ VXI_D15]
[ SV4P]
[ AUD_IN_I2S] Muxed Aud io [ AUD_OUT1_L,R]
I2S
SIF AMA UDIO
TR Ad j
MSP4458
TUNER
[ C4 P]
[ LBADC_IN4]
[ A4 P]
[ A2P] , [ B2P] , [ C2P]
5:GND
5:blue GND
23:GND
23:GND
22:GND
21:safety GND
21:safety GND 22:GND
20:CVBS in
19:CVBS out (DTV out) 20:CVBS in
19:CVBS out (TV out)
18:GND
17:video GND 18:RGB Control GND
17:video GND
15: NC
15:Red
16: NC
14:data GND (NC) 16:SCART FB
13: Link
14:data GND (NC)
12:data1 (NC)
11:NC
10:data 2 (NC)
9: NC
8:function select
7:NC
13: Link (red GND)
12:data1 (NC)
11:Green
10:data 2 (NC)
9:green GND
8:SCART ID
7:Blue
6:audio L in
4:audio GND
6:audio L in
3:audio L out (DTV)
4:audio GND
2:audio R in
1:Audio R out (DTV)
SCART 2
3:audio L out (TV)
2:audio R in
1:Audio R out (TV)
SCART 1
4TX
6 RX
3 TX
G-probe
CHAPLIN TX
CHAPLIN RX
UCOM RX
UCOM TX
MICOM
AT24C02BN
2 RX
[DSDA1,DSCL1]
Usage : BUF
Schmitt triggering
74HC14D
Level Adj
Level Adj
EDID EEPROM
D_SUB_I2C
PC L,R
HSYNC VSYNC
RGB Link
VGA_B
VGA_G
VGA_R
COMP Link
COMP_R
COMP_L
COMP_PR
COMP_PB
COMP_Y
[VXO_D21]
[VXO_D19]
[VXO_D20]
[2WIRE_S1]
[2WIRE_S2]
[BRX]
[VXO_CLK]
[VXI_D23]
[VXO_D6]
FLI10306
[2WIRE_S0]
[ARX]
[HDMI_A_HPD]
[VXO_D22]
[HDMI_B_HPD]
[AUD_IN_L5,R5]
[AHS_ACS] [AVS]
[VXO_HS]
[C1P]
[B1P]
[A1P]
[VXO_D0]
[AUD_IN_R3]
[AUD_IN_L3]
[C3P]
[B3P]
[A3P]
HDMI SW TMDS[8bit]
HDMI4 5V DET
HP DET S/W4
HDMI EQ Ctrl
HDMI I2C [SW]
HDMI SW TMDS[8bit]
HP DET S/W3
HP DET S/W2
HP DET S/W1
HDMI3 5V DET
HDMI2 5V DET
HDMI1 5V DET
BlockDiagram ( Component & RGB & HDMI)
IC101
- 22 -
MAX3232CDR
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
NLASB3157 IC502
LGE Internal Use Only
[GPIOA1]
[GPIOA0]
AT24C02BN
EDID
DDC HDMI4 I2C
HDMI Select 2
HDMI Select 1
EDID AT24C02BN
DDC HDMI3 I2C
HDMI 3 TMDS[8bit]
AT24C02BN
EDID
DDC HDMI2 I2C
HDMI 2 TMDS[8bit]
AT24C02BN
EDID
DDC HDMI2 I2C
HDMI 2 TMDS[8bit]
MICOM
[GPIOB1]
FET Bi-BUF
CEC_REMOTE
TMDS351PAG IC201
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
5V
- 23 -
IC301
Power Distributer
TPS2042BDRG4
5V 600mA
[GPIOE7]
RESET
[AUDO_I2SB_DAT2]
FLI10306
[AUDO_I2SB_DAT1]
NOR Flash
S29GL256N10TFI020
CI Address[8:14]
HOST Chip Enable FLASH WP Ctrl
HOST Out Enable
HOST Write Enable
HOST DATA[0:15]
HOST Address[1:24]
FE_TS_DATA_CLK
CI_MICLK
FE_TS_DATA_VAL FE_TS_DATA_SYN
IC408
CI_MISTRT
CI_MIVAL
Buffer
CI IOWR
HOST Address[5]
HOST Address[6] 74LCX244MTC
CI IORD
HOST Out Enable
CI Detect
HOST Address[10:13]
POD Address[8;9;14]
HOST Address[4]
CI Detect
HOST Address[0:3]
POD Address[4:7]
CI Detect
HOST DATA[0:7]
CI DATA Dir Select
HOST Write Enable
Buffer IC407
74LCX244MTC
IC406
Buffer
74LCX244MTC
IC405
Bi-Buffer
74LVC542A5
CI Detect
CI_TS[0:7]
CI Write Enable
CI Out Enable
REG
CI Address[0:7]
CI DATA[0:7]
TS[0], CLK, SY, VAL
PCMCIA Card
MICOM
5V_ANN_MNT
5V_ANN_CTL
Buffer IC402
FE_TS[0:7] 74LVC541A(PW) TS_IN[0:7]
CI Detect
BlockDiagram ( FE & PCMCIA)
Tuner (TDFV-G135D1) TU301 Tuner (TDFV-G135D1) TU301
LGE Internal Use Only
[HOST_BOOD_CS_N] [OOB_CTX]
[POD_OE_HOST_RD]
[POD_WE_HOST_WR]
[POD_OE_HOST_RD]
FLI10306
[POD_DIR_N]
[POD_DETECT_N]
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 24 -
LGE Internal Use Only
5V
USB20-PWE
PC L/R
Level Adj
Level Adj
MPE
[AUD_IN_L/R 1] Ch. 5
[AUD_IN_L/R 1] Ch. 4
SIDE L/R
[AUDO_SPDIR_OUT]
LR Ch. Data
[AUDO_I2SA_DAT0]
MICOM SPDIF_OUT
I2C 3.3V
LR CLK
[AUDO_I2SA_WCLK]
[RESET]
[FAULT]
NTP3000 Digital AMP
16V
MSP 4458
AUDIO_MUTE
TR BUF
AM AUDIO
TR BUF
Sound IF
Scart2 L/R
Scart1 L/R
Level Adj
Tuner (TDFV-G135D1) TU301
SW_RESET
Audio Master CLK
Bit CLK, LR CLK, CR Ch Data
Bit CLK
[AUD_MCLK0]
[VXO_D5]
[AUD_OUT1 L/R]
[AUDO_I2SA_BCLK]
FLI10306
[AUD_IN_L/R 1] Ch. 3
USB DP/DM
USB20-OC
Comp L/R Level Adj
600mA
5V
TPS2042BDRG4 Power Distributer IC901
Mute
TR BUF
TR BUF
LPF
LPF
[TR]
CTRL
MICOM SCART 2
TPY : 10W+10W MAX : 15W+15W
TV LR OUT
SCART 1
DTV/MNT LR OUT Mute CTRL [TR]
MUTE_LINE_DTV
BlockDiagram (Audio & etc) MUTE_LINE
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 25 -
LGE Internal Use Only
KIA7029AF MICOM Reset Power On Reset IC803
RESET
Tic S/W
[GPIOE6]
MICOM
[NRST]
BlockDiagram (Reset)
[EJ_RST_N]
[RESET_N]
S29GL256N10TFI020 NOR Flash IC404
EJTAG RESET
SYS RESET
FLI10306
[VXO_D5]
[POD_RESET]
[VXI_D14]
SW_RESET
CI_RST
FE_RESET
MSP 4458
NTP3000
PCMCIA
TUNER
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 26 -
LGE Internal Use Only
EDID AT24C02BN
EDID AT24C02BN
EDID AT24C02BN
EDID AT24C02BN
EDID AT24C02BN
I2C Control
[Slave I2C 0]
[Master I2C 0]
[Slave I2C 2]
FLI10306
[Slave I2C 1]
EDID AT24C02BN
TMDS 351PAG IC202
[Master I2C 1]
MICOM
[DSDA1,DSCL1]
SDA1_5V, SCL1_5V
SDA2_3.3V,SCL2_3.3V
MSP4458 Digital R:0x81 W:0x80
MVRAM 24LC512 W : 0xA6 R : 0xA7
TUNER Analog R : 0x87 W : 0x86
TUNER Digital R:0x1E W:0x1F
NTP3000 0x54
MICOM 0x50
Module X4 : 0x72
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 27 -
LGE Internal Use Only
16V
5V
12V
FET Power S/W (Q1003)
AZ1117H-3.3 (IC1003)
KIA78R33F 1A (IC1012)
RL_ON/PWR_ON/OFF
3.3V_ON
CI_EN
KIA78R05F (IC1007)
KA7809 (IC1005)
Power Voltage BlockDiagram
+5V
AZ1117H-1.8TRE (IC1004)
+3.3V-CI
Tuner
NTP3000A
HDMI S/W, OPTIC Jack, NVRAM, USB MSP4458
RS-232 Driver, Sub Micom ,
+1.8V Tuner, NTP3000A
HDMI S/W, CI buffer, Flash Memory, NTP3000A, Chaplin(AUD_VREFP )
Tuner
+5V-TUNER
+3.3V-TUNER
CI_module
MSP4458
+3.3V_STBY
+5V-CI
KIA78R05F (IC1011)
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 28 -
LGE Internal Use Only
5V
PQ018EZ02ZPH 0.23$ (IC1000)
1.26V_DOUGLAS_EN
SC4519STRT 600Khz,3A,0.41$ (IC1002)
1.8V_DOUGLAS_EN
3.3V_ON
KIA78R33F 1A (IC1001)
Power Voltage BlockDiagram
+1.26V_DOUGLAS
+1.8V_DOUGLAS_DDR
+3.3V-DOUGLAS
MEMO
CopyrightŠ2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 29 -
LGE Internal Use Only
EXPLODED VIEW 305
300
301 304
306
120 200
121
307 206
290
280
230 231
201 303
310
330
331 520
560
332
302 570
204
202 203 205
240
250
591
580
590 910 270
400
260
900
901
CopyrightŠ2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
- 30 -
LGE Internal Use Only
IC100 FLI10610H-AA
C320 4.7uF 10V READY
D20
D_SUB_SD A D_SUB_SC L
B12
100R928
A12
AR904 100 1/16W
IC302 TPS2042BDRG 4 +5V
GND IN EN1
R352 0
EN2
1 2 3
OUT2
6
4
E11
A13
5V_ANN_MNT
C9064 0 . 1 uF 16V
C9070 0 . 1 uF 16V
C9074 0 . 1 uF 16V
C9079 0 . 1 uF 16V
M12
C9084 0 . 1 uF 16V
M17 M18 M19
RESET
7
V11 V12 V13 V18
C9020 33pF 50V
V19
+1.26V_DOUGLAS +1.26V_ADC_DOUGLAS
W11 W12 W13
R913 0
USB20-OC1
C9154 10uF 6.3V
USB20-PWE 1
C9157 0 . 1 uF 16V
C9155 0 . 1 uF 16V
W18
+3.3V_IO_DOUGLAS
C9156 0 . 1 uF 16V
W19 F12
R985USB_HUB 0 P R986USB_HUBUSBUP-D 0
R956 6.2K 1%
F13 F14
USBUP-DM
+1.26V_DOUGLAS_D
F15
+1.26V_DOUGLAS
F16
R989USB_HUB_BYPASS 0
F18
USB20-1-DP
R990USB_HUB_BYPASS 0
C9019 0.1uF 16V
F19
R914 0
USB20-1-DM
AD8 C9027 10uF 6.3V
C21
C9031 0 . 1 uF 16V
C9035 0 . 1 uF 16V
C9039 0 . 1 uF 16V
C9044 0 . 1 uF 16V
C9049 0 . 1 uF 16V
C9056 0 . 1 uF 16V
C9063 0 . 1 uF 16V
C9069 0 . 1 uF 16V
C9073 0 . 1 uF 16V
C9078 0 . 1 uF 16V
AD10 AD11 AD12 AD14
PWM1
D13
RESET_N
V6 Y6
A21
PPWR
RESET
0.1uF C316
AD18
E13
DFSYNC
PWM0
D23
AD17
+3.3V_IO_DOUGLAS
U6
PWM2
C13 CI_EN
+3.3V_DOUGLAS
PWM3
B13
READY
5V_ANN_CTL
C9050 0 . 1 uF 16V
9
2WIRE_S2_SDA 2WIRE_S2_SC L
L18
8
AG20
USBPHY_VRES
IC100 FLI10610H-AA
+1.26V_DOUGLAS
L19
C9045 10uF 6.3V
6
AJ20
2WIRE_S1_SC L
C9087 0 . 1 uF 16V
M11
4
AH20
2WIRE_S1_SDA USBPHY_PADM
C9082 0 . 1 uF 16V
3
C28
USBPHY_PADP
C9077 0 . 1 uF 16V
L17
5
C29
USB_PWRE N
C9072 0 . 1 uF 16V
L11
A29
2WIRE_S0_SC L
C9068 0 . 1 uF 16V
AD16
R364 10K READY
OC2
5
2WIRE_S0_SDA
C9062 0 . 1 uF 16V
L12
1/10W 5%
B29
IRDATA
READY
READY
EJ_RST_N
USB_FLAG
D11
R362 2K
OUT1
7
2WIRE_M1_SCL
C9055 0 . 1 uF 16V
+1.8V_DOUGLAS_DDR 1
B28
2WIRE_M0_SDA
C12
OC1
8
TCK
C9047 0 . 1 uF 16V
C9042 10uF 6.3V
P904 12505WS-08A0 0
2
2WIRE_M0_SCL
D12
SDA_HDMI_SW SCL_HDMI_SW DDC_SDA_4 DDC_SCL_4
READY
R368 4.7K
+3.3V_CI
2WIRE_M1_SDA
C9199 0.1uF 16V
R957 22
A28
EJ_DINT
E20
100R927
R945
A27
TMS
D21
F20
C318 0.1uF
0
B27
TDI TDO
SDA2_3.3V SCL2_3.3 V SCL1_5V SDA1_5V
C19
CHAPLIN_TX
+3.3V_STBY +3.3V_STBY
B26
TRST
LBADC_RETURN
R912 4.7K AR903 100 1/16W
R944
R963 100
LBADC_IN6
F22
R905 4.7K
0
READY
KDS184 D301
LBADC_IN5
A24
R910 3.3K
UART1_CTS
+1.8V_DOUGLAS_DDR
CHAPLIN_RX
C20
LBADC_IN4
A25
R911SCART2_ID 3.3K
LBADC_IN3
DEBUG_RX
B20
1/16W 4.7K AR902
B25 B24
SCART1_ID
UART1_RTS
1/10W 5%
+3.3V_CI +5V
A1
UART1_TXD
R960 100
TUNER
LBADC_IN1 LBADC_IN2
DEBUG_TX
A20
UART1_RXD
C24
C
B19
LBADC_GND
C25
R954 1K
A2
A19
UART0_TXD
E23
AR901 1K 1/16W
UART0_RXD
LBADC_33
READY
D24 C9010 0.1uF
5% 1/10W R951 4.7K
TDFV-G135D1 TU301
SYNC 34 VA L 33 D0 32 D1 31 D2 30 D3 29 D4 28 D5 27 D6 26 D7 25 MCL 24 ERR 23 1.8V 22 3.3V 21 RST 20 SCL 19 SDA 18 S IF 17 AUDIO 16 VIDEO 15 NC_3 14 AIF_2 13 AIF_1 12 SCL_T 11 SDA_T 10 GND_2 9 NC_2 8 TP[VT] 7 RF_AGC 6 NC_1 5 +B[5V ] 4 GND_1 3 BB[CTR] 2 ANT[5V] 1
SHIELD
35
+3.3V_DOUGLAS
B21
PBIAS
C9026 10uF 6.3V
L910 M LB-201209-0120 P-N2
C9029 0 . 1 uF 16V
C9032 0 . 1 uF 16V
C9036 0 . 1 uF 16V
C9040 0 . 1 uF 16V
C9046 0 . 1 uF 16V
C9053 0 . 1 uF 16V
C9060 0 . 1 uF 16V
C9066 0 . 1 uF 16V
C9071 0 . 1 uF 16V
C9075 0 . 1 uF 16V
C9048 0 . 1 uF 16V
C9043 10uF 6.3V
C9058 0 . 1 uF 16V
AA6
+1.26V_ADC_DOUGLAS
AB6 A1 B2
+3.3V_ADC_DOUGLAS
READY
C3
+1.26V_DOUGLAS_D +1.26V_HDMI_DOUGLAS E4
+5V
+5V
IC907 R969 47K READY
+5V_TUNER
A0
R970 47K
A1
R365 10 E
R342 47
VSS
R366 2.2K
C
R367 10K
C322 0.1uF
C9101 0 . 1 uF 16V
C9095 10uF 6.3V
L922 M LB-201209-0120 P-N2
C9112 0 . 1 uF 16V
C9122 0 . 1 uF 16V
U4 U3
D22
+1.8V_DOUGLAS_DD R
IC901 TPS2042BDRG 4
C9123 0 . 1 uF 16V
C9113 10uF 6.3V
C9134 0 . 1 uF 16V
F25 F27 F29
5
C9025 100uF 16V
R961 0
OC2
+3.3V_DOUGLAS +3.3V_AUD_DOUGLAS
Y25 Y27 Y29 AB24 C9119 0 . 1 uF 16V
C9109 10uF 6.3V
L924 M LB-201209-0120 P-N2
C9130 0 . 1 uF 16V
AD29 AF25
+1.26V_DDRPLL
D901 30V
+3.3V_DOUGLAS E22 C9054 0 . 1 uF 16V
L919 M LB-201209-0120 P-N2
C9061 0 . 1 uF 16V
+3.3V_DOUGLAS_VDDI
AD23 G25
100K R920
R923 100K
HS_IND/CFG_SEL1
24
C9201 0 . 1 uF SCL/SMBCLK/CFG_SEL 016V
20
NC20
19
NC19
+3.3V_DOUGLAS
AG26 R962 READY 0
+3.3V_DOUGLAS C9159 330uF 6.3V
C9052 0 . 1 uF 16V
C9059 0 . 1 uF 16V
C9162 0 . 1 uF 16V
C9160 0 . 1 uF 16V
C9164 10uF 6.3V
L928 M LB-201209-0120 P-N2
C9161 0 . 1 uF 16V
C9165 0 . 1 uF 16V
C9163 10uF 6.3V
C9196 0 . 1 uF 16V
C9144 10uF 6.3V READY
+3.3V_DOUGLAS
+1.26V_DDRPLL
AG19
C9034 0 . 1 uF 16V
C9028 10uF 6.3V
L912 M LB-201209-0120 P-N2
C9038 0 . 1 uF 16V
C9002 10uF 6.3V
C9197 0 . 1 uF 16V
AD6
C9198 0 . 1 uF 16V
+3.3V_DAC_DOUGLAS C9152 AE6 0.1uF
AF5
C
Q902 2N3904S
B
DDR_D29
DDR_CK
DDR_D30
DDR_CK_N
DDR_D31 DDR_CKE DDR_DQS0 DDR_ODT
DDR_DQS0_N DDR_DQS1
DDR_CAL
DDR_DQS1_N
CPL_DDR2_BA0 CPL_DDR2_BA1
P29
10
CPL_DDR2_DQS3_ N CPL_DDR2_DQS3_ P
DDR2_VREF
CPL_DDR2_CAS_ N CPL_DDR2_RAS_ N CPL_DDR2_CS_ N CPL_DDR2_WE_ N
N25 T25
C755 0 . 1 uF 50V
C754 0 . 1 uF 50V
CPL_DDR2_D[26 ] CPL_DDR2_D[27 ]
U27
CPL_DDR2_CKE
M27
DDR2_ODT
R709 294
U24
1%
DDR_DQS2
DDR2_D[26] DDR2_D[27]
DDR2_DQS3_ N DDR2_DQS3_ P
11
12
AR716 10 1/16W
CPL_DDR2_C K CPL_DDR2_CK_ N
N29
R706 10 R703 10 R701 10 R702 10
GND LED_G
C833 100pF 50V
IC803 KIA7029AF
LED_G C826 470pF 50V
I 1 C814 0.1uF 16V
DDR2_D[30] DDR2_D[25] DDR2_D[28]
3 O 2
DDR_DQS3_N
+3.3V_STBY
C825 10uF 6.3V
DDR2_DQS0_ N DDR2_DQS0_ P
DDR2_ODT_T
A9
VDDQ10
K7
C1
VDDQ9
L7
C3
VDDQ8
K3
C7
VDDQ7
C9
VDDQ6
E9
VDDQ5
G1
VDDQ4
G3
VDDQ3
G7
VDDQ2
UDQS
LDM
F7 B7
G9
VDDQ1
UDM
B3
LDQS
E8
A3
VSS5
UDQS
A8
E3
VSS4
F3
NC4
L1
NC5
R3
NC6
R7
NC1
A2
NC2
E2
NC3
R8
VSSDL
J7
J3
VSS3
N1
VSS2
P9
VSS1
B2
VSSQ10
B8
VSSQ9
A7 D2 D8 E7 F2
+1.8V_DOUGLAS_DDR VDDL
J1
DQ10 DQ11
D1
DQ12
D9
DQ13
B1
DQ14
B9
DQ15
A9
VDDQ10
K7
C1
VDDQ9
L7
C3
VDDQ8
K3
C7
VDDQ7
C9
VDDQ6
E9
VDDQ5
G1
VDDQ4
G3
VDDQ3
G7
VDDQ2
F7
UDQS
B7
LDM
F3
UDM
B3
G9
VDDQ1
DDR2_DM[3] DDR2_DQS2_ N DDR2_DQS3_ N
LDQS
E8
A3
VSS5
UDQS
A8
E3
VSS4
J3
VSS3
NC4
L1
NC5
R3
NC6
R7
NC1
A2
NC2
E2
NC3
R8
VSSDL
J7
+1.8V_DOUGLAS_DDR VDDL
C723 0.1uF
CPL_DDR2_D[11]
R707 10
DDR2_D[11]
N1 P9
J1
VSS2 VSS1
B2
VSSQ10
B8
VSSQ9
A7 D2
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
C741 330uF 6.3V
C742 1uF 6.3V
CPL_DDR2_A[0-12]
VSSQ4
F8
VSSQ3 VSSQ2
H8
VSSQ1
D16 E16
DDR2_D[14] DDR2_D[9] DDR2_D[12]
AR706 10 1/16W
A15 B15 DDR2_D[0-31]
D15 E15 A14 B14 C14
HDMI2_5V_DET HDMI1_5V_DET
DDR2_A[1]
D14 E14
HDMI3_5V_DET DDR2_BA1
CPL_DDR2_A[1]
FE_RESE T REC_8_CTRL 2
AR717 10 1/16W CPL_DDR2_WE_ N
C15
REC_8_CTRL 1
DDR2_A[2] DDR2_A[9] DDR2_A[5]
CPL_DDR2_BA1
DDR2_WE_N DDR2_BA0 DDR2_CKE
E17
HP_DET_S/W_2
E18
HP_DET_S/W_4 +3.3V_DOUGLAS R8002 10K READY
CPL_DDR2_CK_ N CPL_DDR2_C K
R716 10 R715 10 CPL_DDR2_A[0]R714 10 DDR2_A[0] CPL_DDR2_A[4]R713 10 DDR2_A[4]
CPL_DDR2_A[8] CPL_DDR2_CAS_ N
AR704 10 1/16W
CPL_DDR2_A[11] CPL_DDR2_A[6]
DDR2_CK_N DDR2_CK
R8003 10K READY
VXO_CLK
VXI_DE
VXO_DE
VXI_V S
VXO_VS
VXI_H S
VXO_HS
VXI_D 0
VXO_D0
VXI_D 1
VXO_D1
VXI_D 2
VXO_D2
VXI_D 3
VXO_D3
VXI_D 4
VXO_D4
VXI_D 5
VXO_D5
VXI_D 6
VXO_D6
VXI_D 7
VXO_D7
VXI_D 8
VXO_D8
VXI_D 9
VXO_D9
VXI_D10
VXO_D10
VXI_D11
VXO_D11
VXI_D12
VXO_D12
VXI_D13
VXO_D13
VXI_D14
VXO_D14
VXI_D15
VXO_D15
C27
R8001 10K READY
AD19 AE19
VXI_D17 VXI_D18 VXI_D19 VXI_D20 VXI_D21
REF_CLK XTAL_I N CLKOUT OBUFC_CLK
HDMI4_5V_DET SCART2_LINK
AF18
IOVDD33_3
CVSS_24
IOVDD33_4
CVSS_25
IOVDD33_5
CVSS_26
IOVDD33_6
CVSS_27
IOVDD33_7
CVSS_28
IOVDD33_8
CVSS_29
IOVDD33_9
CVSS_30
IOVDD33_10
CVSS_31
IOVDD33_11
CVSS_32
IOVDD33_12
CVSS_33
IOVDD33_13
CVSS_34
IOVDD33_14
CVSS_35
IOVDD33_15
CVSS_36
IOVDD33_16
CVSS_37
IOVDD33_17
CVSS_38
IOVDD33_18
CVSS_39
IOVDD33_19
CVSS_40
IOVDD33_20
CVSS_41 CVSS_42
ADC_VDD12_1
CVSS_43
ADC_VDD12_2
CVSS_44
ADC_VDD12_3
CVSS_45 CVSS_46
ADC_VDDA33_1
CVSS_47
ADC_VDDA33_2
CVSS_48
ADC_VDDA33_3
CVSS_49
ADC_VDDA33_4
CVSS_50
ADC_VDDA33_5
CVSS_51 CVSS_52
AUD_AVDD12_1
CVSS_53
AUD_AVDD12_2
CVSS_54
C4P
CVSS_56
CVSS_55 AUD_AVDD33_2
CVSS_57
AUD_AVDD33_3
CVSS_58
AUD_AVDD33_4
CVSS_59
AUD_AVDD33_5
CVSS_60
AUD_AVDD33_6
CVSS_61 CVSS_62
AUD_HP_AVDD33
CVSS_63 CVSS_64
DDRPLL_AVDD12
CVSS_65 CVSS_66
DDR_VDD_1
CVSS_67
DDR_VDD_2
CVSS_68
DDR_VDD_3
CVSS_69
DDR_VDD_4
CVSS_70
DDR_VDD_5
CVSS_71
DDR_VDD_6
CVSS_72
DDR_VDD_7
CVSS_73
DDR_VDD_8
CVSS_74
DDR_VDD_9
CVSS_75
DDR_VDD_10
CVSS_76
DDR_VDD_11
CVSS_77
DDR_VDD_12
CVSS_78
DDR_VDD_13
CVSS_79
DDR_VDD_14
CVSS_80
DDR_VDD_15
CVSS_81
DDR_VDD_16
CVSS_82
DDR_VDD_17
CVSS_83
DDR_VDD_18
CVSS_84
DDR_VDD_19
CVSS_85
DDR_VDD_20
CVSS_86
DDR_VDD_21
CVSS_87
DDR_VDD_22
CVSS_88
DDR_VDD_23
CVSS_89
DDR_VDD_24
CVSS_90
DDR_VDD_25
CVSS_91
DDR_VDD_26
CVSS_92
DDR_VDD_27
CVSS_93
DDR_VDD_28 DDR_VDD_29
ADC_GND12_1
DDR_VDD_30
ADC_GND12_2
DDR_VDD_31
ADC_GND12_3
DDRPLL_AVDD33
ADC_GNDA_1
DDR_VDDI_1
ADC_GNDA_3
ADC_GNDA_2 DDR_VDDI_2
ADC_GNDA_4 ADC_GNDA_5
DDR_VRF_0
ADC_GNDA_6
DDR_VRF_1
ADC_GNDA_7
DDR_VRF_2
ADC_GNDA_8
L26 L28 M13 M14 M15 M16 N11 N12 N13 N14 N15 N16 N17 N18 N19 N27 N28 P11 P12 P13 P14 P15 P16 P17 P18 P19 P26 R11 R12 R13 R14 R15 R16 R17 R18 R19 T11 T12 T13 T14 T15 T16 T17 T18 T19 T24 T26 U11 U12 U13 U14 U15 U16 U17 U18 U19 V14 V15 V16 V17 V29 W14 W15 W16 W17 W24 W26 W28 AA24 AA26 AA27 AC24 AC26 AC28 AE24 AE26 AE28 D4 E5 F6 F5 E3 F1 G5 G3 H5 J5 K5 K3
A4P DLL_VAA 0 DLL_VAA 1
AUD_AVSS12_1 AUD_AVSS12_2
HDMI_VDDA33_1
B4P
HDMI_VDDA33_2
AUD_AVSS33_2
HDMI_VDDA33_3
AUD_AVSS33_3
HDMI_VDDA33_4
AUD_AVSS33_4
HDMI_VDDA33_5
AUD_AVSS33_5 AUD_AVSS33_6
HDMI_VDD12_1 HDMI_VDD12_2
AUD_HP_AVSS33
HDMI_VDD12_3 HDMI_VDD12_4
DDRPLL_AGND
LVTX_VDD33_1
HDMI_GNDA_1
LVTX_VDD33_2
HDMI_GNDA_2
LVTX_VDD33_3
HDMI_GNDA_3 HDMI_GNDA_4
LVTX_PLL_VDD33
HDMI_GNDA_5 HDMI_GNDA_6
OTP_VDD33
HDMI_GNDA_7 HDMI_GNDA_8
RPLL_AVDD33 RPLL_AVDD12
HDMI_GNDA_9 LVTX_VSS_1 LVTX_VSS_2
USB_AVDD12
LVTX_VSS_3 LVTX_VSS_4
USB_AVDD33_1 USB_AVDD33_2
RPLL_AGND_1
USB_AVDD33_3
RPLL_AGND_2
VDAC_VDD12
USB_GND_1
VDAC_AVDD 33_1
USB_GND_3
USB_GND_2 VDAC_AVDD 33_2 VDAC_AVDD 33_3
VDAC_VSS12
C9003 0.1uF
M6 N6 L2 P1 P2
C9004 0.1uF
R904 SCART1_VIN
22 R903
C9166 0 . 1 uF
R977 510
R978 10
SIDE_CIN
22
P3 P4 P5 U1 E21 A2 C5 C6 C7 C8 C9 C10 D7 D8 AD21 AD22 AE23 AG27 B22 C22 AD20 AJ19 AF19 AC6 AD7 AG4
CEC_0
AF15 AH16 AJ16 AE15 AE16
READY
SIDE_CVBS_LINK
RESET
33
2
32
3
IC802 4 WT61P8-RN440WT
31
5
29
6
28
7
27
8
26
9 10
25 24
11
23
MODULE_SER_CL K MODULE_SER_DATA SW_RESE T
AG16
HDMI_SW_EQ
AH17 AE17
R8087 0
COMP_LINK
AF16
AJ17
X802 24MHz
C812 C817 18pF 18pF 50V 50V
R8052 10K
R8069 100
+3.3V_STBY
AGC_SPEED_CT L BOOSTE R
AF17 AG17
IC801 AT24C16AN-10SI-2. 7
SIDE_S_S W
AH18 AJ18
DTV/MNT_SWITCH
AD15
C819 0.1uF 16V
WP
AE18
A22 A23 E12 F21
VCC
+3.3V_DOUGLAS
R8051 22
SCL
R8053 22
SDA
8
1
7
2
6
3
5
4
A0
A1
A2
+3.3V_STBY
NC_2 TESTMODE0
NC_3
TESTMODE1
NC_4
GND
NC_5 SIF_IN
F11 K6
R8094 10K READY R8093 10K
3.3V_ON RL_ON/PWR_ONOF F UCOM_TX UCOM_RX HDMI_SEL1
R8054 100
HDMI_SEL2 1.8V_DOUGLAS_E N 1.26V_DOUGLAS_E N
R8091 100
R8092 100
MUTE_LINE
MUTE_LINE_DTV
R8068 10K
R8070 6.8K R8095 6.8K
P_+5V
F9 F10
R8058 10K
R8073 10K
F7 F8
30
GPIOD2/P10/AD4 GPIOD3/P11/AD5 GPIOD4/P12/AD6 GPIOD5/P13/AD7 GPIOD6/TXD2 GPIOD7/RXD2 GPIOA0/PWM4/P00 GPIOA1/PWM5/P01 GPIOA2/PWM6/P02 GPIOA3/PWM7/P03 GPIOA4/DSCL2
+3.3V_STBY
VXI_D22 VXI_D23
+3.3V_STBY +3.3V_STBY
1
DDR2_A[8] DDR2_A[11] DDR2_A[6]
10 10
R8040 4.7K
IR
RGB_LINK
DDR2_CAS_N
H I G H : Wr i t a b le
DDR2_A[0-12] CPL_DDR2_CS_ N CPL_DDR2_RAS_ N
R724 R725
R8029 10K
SCART1_LINK
AG18
VXI_D16
NC_1 R8004 10K READY
C26
VSSQ8 VSSQ7 VSSQ5
F2
B16 C16
AR708 10 1/16W CPL_DDR2_A[10] DDR2_A[10] CPL_DDR2_A[3] DDR2_A[3] CPL_DDR2_A[7] DDR2_A[7] CPL_DDR2_A[12] DDR2_A[12]
CPL_DDR2_A[2] CPL_DDR2_A[9] CPL_DDR2_A[5]
VSSQ6
E7
H2
F17 A16
DDR2_DQS1_ P
D19
CPL_DDR2_D[14 ] CPL_DDR2_D[9] CPL_DDR2_D[12 ]
C738
C737
C736
0 .1uF
CPL_DDR2_D[10 ]
DDR2_D[10]
CPL_DDR2_BA0 CPL_DDR2_CKE
D8
VSSQ5
0 .1uF
L8
WE
D17 DDR2_DQS1_ N
R705 10 R704 10
K9
CAS
C17
AR711 10 1/16W
C734
VDD1
B17
DDR2_D[13] DDR2_D[8] DDR2_D[15]
R710 10
C735
VDD2
0 .1uF
VDD3
0 .1uF
VDD4
J9
A17
AR710 10 1/16W
CPL_DDR2_DQS1_ P
C733
VDD5
E1
R1
0 .1uF
A1
M9
J8 K2
LDQS
D18
CPL_DDR2_DQS1_ N
+1.8V_DOUGLAS_DDR
K8
VSSQ6
VSSQ1
DQ9
D3
CK
CS
DDR2_DM[2]
C2 D7
CK
RAS
DDR2_DQS2_ P DDR2_DQS3_ P
C8
DQ8
CKE
ODT
DDR2_ODT_T DDR2_CS_ N DDR2_RAS_N DDR2_CAS_N DDR2_WE_N
DQ7
C732
L2 L3
DQ6
F9
C731
R712 200 DDR2_CKE
BA0 BA1
DQ5
F1
0 .1uF
R2
DQ4
H9
C730
P7
A12
DQ3
H1
0 .1uF
A11
DQ2
H3
0 .1uF
P3 M2
H7
C725
P8
G2
CPL_DDR2_D[13 ] CPL_DDR2_D[8] CPL_DDR2_D[15 ]
DDR2_D[16] DDR2_D[17] DDR2_D[18] DDR2_D[19] DDR2_D[20] DDR2_D[21] DDR2_D[22] DDR2_D[23] DDR2_D[24] DDR2_D[25] DDR2_D[26] DDR2_D[27] DDR2_D[28] DDR2_D[29] DDR2_D[30] DDR2_D[31]
C729
P2
A8 A10/AP
VSSQ7
H8
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
N7
A7 A9
VSSQ8
VSSQ3 VSSQ2
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
A6
VSSQ4
F8 H2
C701 0.1uF
N8
B18
VXI_CLK
R8044 22
C804 0 . 1 uF 16V
VDD33V GND OSCO OSCI GPIOB6/SSDA GPIOB5/SSCL GPIOB4/P05 GPIOB3/P04 GPIOB2/IR GPIOB1/IRQ3/CEC GPIOB0/IRQ2 C818 0.1uF 16V
5V_MNT
L8
WE
N2 N3
DQ1
C724
K9
CS RAS CAS
M7
DQ0
C728
ODT
DDR2_CK C720 C721 DDR2_CK_N 330uF 1uF 6.3V 6.3V
M3
A4 A5
G8
C727
VDD1
M8
A1 A2
C18
DDR2_ODT DDR2_D[3] DDR2_D[6] DDR2_D[1] DDR2_D[4]
E19
C726
R1
0 .1uF
VDD2
K2
0 .1uF
VDD3
K8
0 .1uF
VDD4
J9
J8
0 .1uF
VDD5
E1 CK CK
J2
A0
A3
DDR2_BA0 DDR2_BA1
C704
A1
M9
DDR2_A[0] DDR2_A[1] DDR2_A[2] DDR2_A[3] DDR2_A[4] DDR2_A[5] DDR2_A[6] DDR2_A[7] DDR2_A[8] DDR2_A[9] DDR2_A[10] DDR2_A[11] DDR2_A[12]
+1.8V_DOUGLAS_DDR
0 .1uF
DQ15
0 .1uF
DQ14
B9
C716
B1
C714
D9
DQ13
C715
DQ12
C717
D1
0 .1uF
DQ11
0 .1uF
DQ10
0 .1uF
DQ9
D3
0 .1uF
C2 D7
C711
C8
DQ8
C710
DQ7
CKE
LDQS
DDR2_DQS0_ N DDR2_DQS1_ N
DQ6
F9
0 .1uF
L2 L3
DQ5
F1
C703
BA0 BA1
DQ4
H9
C709
P7 R2
DQ3
H1
C713
A11 A12
DQ2
H3
C712
P3
H7
0 .1uF
P2 P8 M2
R711 200
DDR2_DM[0] DDR2_DM[1]
N7
A7 A8
G2
VREF
0.1uF
0 .1uF
N2 N3
A10/AP
DDR2_ODT_T DDR2_CS_ N DDR2_RAS_N DDR2_CAS_N DDR2_WE_N
DDR2_DM[0-3]
M7
A9
DDR2_CKE
DDR2_DQS0_ P DDR2_DQS1_ P
M3
N8
A6
DDR2_BA0 DDR2_BA1 DDR2_CK DDR2_CK_N
M8
A3 A5
C722
DDR2_A[0-12]
DDR2_D[0] DDR2_D[1] DDR2_D[2] DDR2_D[3] DDR2_D[4] DDR2_D[5] DDR2_D[6] DDR2_D[7] DDR2_D[8] DDR2_D[9] DDR2_D[10] DDR2_D[11] DDR2_D[12] DDR2_D[13] DDR2_D[14] DDR2_D[15]
0 .1uF
A1 A2
DQ1
0 .1uF
A0
A4
DQ0
C708
DDR2_A[0] DDR2_A[1] DDR2_A[2] DDR2_A[3] DDR2_A[4] DDR2_A[5] DDR2_A[6] DDR2_A[7] DDR2_A[8] DDR2_A[9] DDR2_A[10] DDR2_A[11] DDR2_A[12]
G8
C707
J2
C705
DDR2_A[0-12]
IC703 HYB18T512160AF-3S
C750 0.1uF 16V
R796 10 R797 10 R798 10 R799 10
CPL_DDR2_D[3] CPL_DDR2_D[6] CPL_DDR2_D[1] CPL_DDR2_D[4]
C751 10uF 6.3VDDR2_VREF
C706
DDR2_VREF C752 10uF IC701 6.3V HYB18T512160AF-3S C753 0.1uF 16V C702 0.1uF VREF
DDR2_D[0-31]
A18
R777 10
SDA2_3.3 V SCL2_3.3 V
R8055 15K
R795 10
READY
R8071 22
R8075 47K
DDR2_D[2]
P_+5V
R8082 10K
CPL_DDR2_D[2]
IC100 FLI10610H-AA
C801 24pF
R792 10 R793 10 R794 10
DDR2_D[5] DDR2_D[0] DDR2_D[7]
X801 19.66080H z
R789 10 R790 10 R791 10
C802 24pF
CPL_DDR2_DQS0_ N CPL_DDR2_DQS0_ P
C815 0.1uF READY
DDR2_D[29] DDR2_D[24] DDR2_D[31]
+3.3V_STBY CPL_DDR2_D[5] CPL_DDR2_D[0] CPL_DDR2_D[7]
C813 0.1uF 16V
G
AR707 10 1/16W CPL_DDR2_D[29 ] CPL_DDR2_D[24 ] CPL_DDR2_D[31 ]
DDR_DQS2_N DDR_DQS3
CVSS_22 CVSS_23
AUDIO_MUTE
LED_R
BLM18AG121SN1 D L804
GND
13
CPL_DDR2_D[30 ] CPL_DDR2_D[25 ] CPL_DDR2_D[28 ]
IOVDD33_1 IOVDD33_2
L16 L24
R8063 10K
LED_R C832 470pF 50V
34
DDR_D28
U28 T27 P24 N26
C831 100pF 50V
35
DDR_CS_N DDR_WE_N
CVSS_20 CVSS_21
22
DDR_CAS_N DDR_RAS_N
DDR_D26 DDR_D27
CVDD12_20
L14 L15
R8050 10K C830 10pF 50V READY
21
DDR_D24 DDR_D25
L806 BLM18AG121SN1 D
LED_R
C807 L801 0.1uF 50V
36
AB26 AA29
DDR_BA1
DDR_D22 DDR_D23
P_+5V MLB-201209-0120P-N 2
C803 4.7uF 10V
GND
37
G28 G29 AB25 AA28
DDR_BA0
DDR_D21
10pF 50V READY
STBY_5V
19
H26
9
DDR_D19 DDR_D20
GND
20
H25
CPL_DDR2_DQS0_ P CPL_DDR2_DQS0_ N CPL_DDR2_DQS1_ P CPL_DDR2_DQS1_ N CPL_DDR2_DQS2_ P CPL_DDR2_DQS2_ N CPL_DDR2_DQS3_ P CPL_DDR2_DQS3_ N
+1.8V_DOUGLAS_DDR
CPL_DDR2_DM[0-3]
8
CVSS_18 CVSS_19
DDR2_CS_ N DDR2_RAS_N
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
KEY1
Y28
CPL_DDR2_DM[3]
DDR2_DM[0-3]
38
AD28
CPL_DDR2_D[31]
AC27
DDR2_DM[1]
18
CPL_DDR2_D[30]
6
DDR2_DM[0]
KEY2
W27
DDR2_D[21] DDR2_D[16] DDR2_D[23]
41
AE27
CPL_DDR2_D[29]
CPL_DDR2_DM[2]
39
CPL_DDR2_D[28]
CPL_DDR2_DM[1]
40
AC29
DDR_DM2 DDR_DM3
CPL_DDR2_DM[0]
J27 AD24
16
AB28
CPL_DDR2_D[27]
DDR_D17 DDR_D18
K24
15
AE29
CPL_DDR2_D[26]
DDR_DM1
17
W29
CPL_DDR2_D[25]
DDR_DM0
DDR_D16
CVDD12_18 CVDD12_19
J 28 L13
P_+5V
UART_SEL
Y26
CPL_DDR2_D[24]
R786 10 R787 10 R788 10
7
DDR_D14
CVSS_16 CVSS_17
+3.3V_STBY KEY1
C809 5pF READY
BLM18AG121SN1 D C829
GPIOE0/PWM0 LCD ONLY : MOVING_LED_PWM NRST GPIOE1/PWM1 LCD ONLY : SOFT_TOUCH_BUZZ_CTR L GPIOE2/PWM2 GPIOE3/PWM3 GPIOE4/LPWM/P06 GPIOE5/P07 GPIOE6/VIN2 LCD ONLY : PANEL_CTL R8031 GPIOE7/VIN1 100 GPIOD0/HIN1 GPIOD1/HIN2
AE25
CPL_DDR2_D[23]
CPL_DDR2_D[21 ] CPL_DDR2_D[16 ] CPL_DDR2_D[23 ]
DDR2_DM[2] DDR2_DM[3]
43
W25
CPL_DDR2_D[22]
CPL_DDR2_DM[1]
DDR2_D[22] DDR2_D[17] DDR2_D[20]
44
AF26
CPL_DDR2_D[21]
CPL_DDR2_A[ 12]
R782 10 R783 10 R784 10 R785 10
C808 5pF READY
L805
42
CPL_DDR2_D[20]
CPL_DDR2_DM[0]
CPL_DDR2_A[11]
R28 V26
CPL_DDR2_D[22 ] CPL_DDR2_D[17 ] CPL_DDR2_D[20 ]
DDR_D13 DDR_D15
10pF 50V READY
KEY1
13
AD26
DDR_A12
CPL_DDR2_A[ 10]
V25
CVDD12_16 CVDD12_17
J 24 J 26
KEY2 BLM18AG121SN1 D C828
GND
12
AC25
CPL_DDR2_D[19]
DDR_A11
DDR_D12
CPL_DDR2_A[9]
T29
5
14
CPL_DDR2_D[18]
DDR_D11
4
GPIOC7/P17/IRQ1 GPIOC6/P16/IRQ0 GPIOC5/P15/TXD1 GPIOC4/P14/RXD1 GPIOC3/AD3 GPIOC2/AD2 GPIOC1/AD1 GPIOC0/AD0 R8030 D_SUB_SD A 22 DSDA1 R8072 D_SUB_SC L22 DSCL1 GPIOA5/DSDA2
AF28
DDR2_D[18] DDR2_D[19]
CVSS_14 CVSS_15
R8057 22
Y24
CPL_DDR2_D[17]
CPL_DDR2_DM[2] CPL_DDR2_DM[3]
M5V_ON
F28
CPL_DDR2_D[16]
CPL_DDR2_D[18 ] CPL_DDR2_D[19 ]
CPL_DDR2_DM[0-3]
CPL_DDR2_A[8]
CVDD12_14 CVDD12_15
G26 G27
C810 680pF
R8041 3.3K
K28
CPL_DDR2_D[15]
CPL_DDR2_A[0-12]
CPL_DDR2_A[6]
CVSS_12 CVSS_13
L802
KEY2
CPL_DDR2_A[7]
R29
CVDD12_12 CVDD12_13
E28 G24
IR C827 10pF 50V READY
GND
R8049 3.3K
E27
CPL_DDR2_D[14]
DDR_A9 DDR_A10
CPL_DDR2_A[5]
R27 V28
CVSS_10 CVSS_11
10K R8065
L27
CPL_DDR2_D[13]
DDR_D9 DDR_D10
CPL_DDR2_A[4]
P25 T28
CVDD12_10 CVDD12_11
E24 E26
Douglas POWER
E
AC_DET
J29
CPL_DDR2_D[12]
DDR_A7 DDR_A8
CVSS_8 CVSS_9
R966 1K
R964 390
READY R8080 10K
CPL_DDR2_D[11]
CPL_DDR2_D[0-31 ]
DDR_A5 DDR_A6
DDR_D7 DDR_D8
CVDD12_8 CVDD12_9
D26 D28
+1.8V_DOUGLAS_DDR
READY
H28
DDR_A4
DDR_D5 DDR_D6
CVSS_6 CVSS_7
S
C9107 0 . 1 uF 16V
R8061 47K
L29
CPL_DDR2_D[10]
DDR_D4
3
CVSS_4 CVSS_5
CVDD12_6 CVDD12_7
VDAC_AVSS33_2
L803 BLM18AG121SN1 D
IR
CVSS_2 CVSS_3
CVDD12_4 CVDD12_5
VDAC_AVSS33_1
G
C9158 0 . 1 uF 16V
CVSS_1
CVDD12_2 CVDD12_3
+3.3V_DOUGLAS
R965 47K
+3.3V_OTP
1/16W
F26 E29
DDR2_DQS2_ N DDR2_DQS2_ P
1%
L25
R771 680
E25
CPL_DDR2_D[8] CPL_DDR2_D[9]
R778 10 R779 10 R780 10 R781 10
CPL_DDR2_DQS2_ N CPL_DDR2_DQS2_ P
CPL_DDR2_A[3]
U26
1%
M26
CPL_DDR2_D[6] CPL_DDR2_D[7]
DDR_A2 DDR_A3
2
R770 680
CPL_DDR2_D[4] CPL_DDR2_D[5]
DDR_D2 DDR_D3
CPL_DDR2_A[1] CPL_DDR2_A[2]
10K
K26
U29 R26
R772
CPL_DDR2_D[3]
CPL_DDR2_A[0]
P27
AH19
AF6
D
1
DDR_A0 DDR_A1
AF20
+1.26V_DOUGLAS
P803
DDR_D0
AE20
+3.3V_DOUGLAS_VA A
12505WS-12A0 0
DDR_D1
C23
+1.26V_DOUGLAS_ D
R901 0
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
CPL_DDR2_D[0-31 ]
A26 B23
+3.3V_DOUGLAS
+3.3V_DOUGLAS +3.3V_DAC_DOUGLAS
1/10W 5%
IC100 FLI10610H-AA
AF24
+3.3V_DOUGLAS_VDDI N e a r b y p i n F23 Nearby pin AD23
C9207C920 C920 8 3 1uF 0 . 1 uF 0 . 1 uF 16V 16V 16V
TUNER
AE21
C9206 1uF 16V
18
16
R922 100K
USB_HU USB_HU B USB_HU B B
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
E10
+3.3V_LVTX_DOUGLAS
+3.3V_LVTX_PLL_DOUGLAS
NC18
VDDA3310
7
17
10
9
R917 100K
8
C9081 0 . 1 uF 16V
C9076 33uF 10V
+3.3V_DOUGLAS
R916 100K
21
22
R918 100K
7
23
C9131 0 . 1 uF 16V
AE22
VDD33
NC7 NC8
C9121 0 . 1 uF 16V
+5V
Q901 RTR030P0 2
USBUP-DP
SUSP_IND/LOCAL_PWR/NON_REM 0 28
1%
USBUP-DM VDDA3329 29
30
XTAL 2
XTAL1/CLKI N
RBIAS
USBUP_DP
USBUP_D M
VDD33PLL
VDD18PLL 34
25
C9212 SDA/SMBDATA/NON_REM1 0 . 1 uF 16V NC21
6
C315 4700pF
3
5
NC9
AM_AUDI O
RESET_N
6
BLUE-DP
D10 E9
VBUS_DET
OCS2_ N
5
R356 1K
+1.26V_HDMI_DOUGLAS +1.26V_DOUGLAS_D
E8
26
15
C
C4 D5
E7 +3.3V_DOUGLAS
27
USB2512 USB_HUB
+3.3V_HDMI_DOUGLAS
C9051 0 . 1 uF 16V
E6
+3.3V_CI
NC6
4
M28 V24
C9037 0 . 1 uF 16V
+3.3V_CI
VDDA335
USB_HUB
C9033 0 . 1 uF 16V
D6
2
IC902
AA25
+3.3V_DOUGLAS_VAA
R908 0 C9030 0 . 1 uF 16V
1
4
R24
+3.3V_LVTX_PLL_DOUGLAS
R907 0
R915 100K
USBDN2_DP
BLUE-DP
BLUE-DM
31
R921 12K
USBDN2_DM
BLUE-DM
3
36
R988USB_HUB 0 USBDN1_DM R987USB_HUB 0 USBDN1_DP
35
C9200C9205 1uF 0 . 1 uF 16V 16V
VDD33CR
2SA1504S Q305
B
TUNER_VOUT
C321 220uF 16V
E R372 1K READY
R350 1K
C9204 0 . 1 uF 16V
14
1%
C310 4700pF
C9209 0 . 1 uF 16V
USB20-1-DP 2
Q302 2SC305 2
E
C9211 0 . 1 uF 16V
USB20-1-DM
1
C
C B
C9202 0 . 1 uF 16V
12
2SA1504S Q304
C9210 4 . 7 uF 6.3V
11
+5V P901 12505WS-06A0 0
R358 100
32
TU_MAIN C319 270pF READY
E
13
R302 0
R301 330 1%
TEST
R374 270 1%
F23
DDR2_VREF
C9214 33pF 50V
X901 24MHz
VDD18
SIF
Q301 2SA1504S
AD25
AF29
33
+3.3V_CI
AB27 AB29 AD27
+3.3V_DOUGLAS +3.3V_LVTX_DOUGLAS
C312 0.01uF
P28
AF27
USB POWER ENABL E USB20-1-DM LOW ACTIV E USB20-1-DP
OCS1_ N
FE_SDA
R347 82
N24
U25
120-ohm
OUT2
FE_SC L R346 470
M29
V27
+1.26V_DOUGLAS_D
AGC_SPEED_CT L
C9138 0 . 1 uF 16V
L908
OUT1
2
R360 10K
C9128 0 . 1 uF 16V
R25
USB20-OC1
B
C9118 0 . 1 uF 16V
VAVS_ON
5
4
C9104 10uF 6.3V
L923 M LB-201209-0120 P-N2
LED_G
6
3
USB 2.0 Jack
OC1
M25
DISP_EN
EN2
7
2
K29
4
R950 10K
EN1
8
K25 K27
3
1
IN
R936 0
E
R348 0
J25
D25
+3.3V_DOUGLAS +3.3V_ADC_DOUGLAS
R984 4.7K
USB DOWN STREA M
C9017 47uF 16V READY
1
L303 MLB-201209-0120P-N 2
R357 0
F24
U2
SDA1_5V
D902 30V
C317 4.7uF 10V C Q306 2SC305 2
C313 0.1uF 16V
R373 1K READY
M24
T5 U5
CDS3C30GT H
C307 C308 C309 100pF 0.1uF 220uF 50V 16V 16V
B
CPL_DDR2_D[1]
L1 T6
+1.26V_DDRPLL
CDS3C30GT H
+5V_TUNER
C306 0.1uF 16V
R371 0
CPL_DDR2_D[2]
C9005 0.1uF
JK901 KJA-UB-4-0004
(USE ONLY FOR SECAM )
SDA1_5V
SCL1_5 V
FE_SD A
FE_SC L
R902 22 SCART1_FB
H27
R345 4.7K
CPL_DDR2_D[0]
P6
H29
PRTPWR 1
SDA2_3.3V
K4
H24
C9213 33pF 50V R919 1M
100
R335
+1.26V_AUD_DOUGLAS +3.3V_AUD_DOUGLAS
+3.3V_OTP
+3.3V_TUNER
100
H4
+3.3V_HDMI_DOUGLAS
L926 M LB-201209-0120 P-N2
C326 C325 0.1uF 0.1uF 16V 16V
R334
+3.3V_DOUGLAS
SCL1_5V
R971 22
+1.8V
SCL2_3.3 V
C9136 0 . 1 uF 16V
READY
SDA
5
4
5
R968 22
SCL
6
RESET C9001 0.1uF 16V
+5V
BOOSTER
B Q308 E 2SC305 2
USB20-PWE 1
FE_RESE T
3
C9114 0 . 1 uF 16V
D29
C9016 0.1uF
FE_TS_DATA_CLK
FE_TS_DATA[7]
FE_TS_DATA[6]
FE_TS_DATA[5]
FE_TS_DATA[4]
FE_TS_DATA[3]
FE_TS_DATA[2]
FE_TS_DATA[1]
FE_TS_DATA[0]
7
C9103 0 . 1 uF 16V
R6
4
C9153 0.1uF
WP
C9096 0 . 1 uF 16V
D27
OPTION: RF AGC
FE_TS_DATA_VAL
FE_TS_DATA_SYN
FE_TS_DATA_VAL
2
3
C9090 0 . 1 uF 16V
+1.26V_DOUGLAS_D+1.26V_AUD_DOUGLAS
GND
FE_TS_DATA[0-7],FE_TS_DATA_CLK,FE_TS_DATA_VA L,FE_TS_DATA_SYN
VCC
8
PRTWR2
R343 47
33 AR303
33 AR302
33 AR301
C305 100pF 50V
R982 4.7K
Q307 2SA1504S B
C
A2
1
G4 C9085 10uF 6.3V
L921 M LB-201209-0120 P-N2
R909 10K
SW901 TMUE312GAB 1 2
24LC512
R967 47K
F4
+3.3V_OTP
CVDD12_1
Sub-Micom
DDR2 LGE Internal Use Only
+3.3V_DOUGLAS
IC100 FLI10610H-AA
N4
R601 22
AUDIO_MASTER_CLK
AUD_IN_L5
N2
C616 0.47uF
PC_AUDIO_R
L6 AC2
MS_BCLK
AB3
MS_WCLK
C603 10uF 16V
C604 0.1uF 16V C605 10uF 16V
C606 0.1uF 16V
T_SPRING
C697 47pF 50V
7B
B_TERMINAL2
6B
T_TERMINAL2
D601 CDS3C30GT H READY
PC_AUDIO_R
R624 220K
C Q601 2SC305 2
B
PC_AUDIO_L R647 1K C643 6800pF
D602 CDS3C30GT H READY
AUDIN_I2S_BCLK
AUDO_I2SB_DAT2
C684 25V 10uF
R696 2.2K
4.7K
C Q603 2SC305 2
R695 2.2K
E
AD3
A12
C13
SCART2 B u f f er MNT/DTV OUT
DTV/MNT_LOUT
2WIRE_S0_SDA
SW_ROUT SW_LOUT
P_+12V
C657
C Q602 2SC305 2
R648 1K C644 6800pF
C9064 0 . 1 uF 16V
C9070 0 . 1 uF 16V
C9074 0 . 1 uF 16V
C676 0.1uF
C624 100uF 16V
C628 10uF 16V
0.1uF VINPUT
2K
RESET
7
V11 V12
C9020 33pF 50V
V19
+1.26V_DOUGLAS +1.26V_ADC_DOUGLAS
W11 W12 W13
R913 0
USB20-OC1
C9154 10uF 6.3V
USB20-PWE 1
C9157 0 . 1 uF 16V
C9155 0 . 1 uF 16V
F13 F14
USBUP-DM
+1.26V_DOUGLAS_D
F15
+1.26V_DOUGLAS
F16
R989USB_HUB_BYPASS 0
F18
USB20-1-DP
R990USB_HUB_BYPASS 0
C9019 0.1uF 16V
F19
R914 0
USB20-1-DM
AD8 C9027 10uF 6.3V
C9031 0 . 1 uF 16V
C9035 0 . 1 uF 16V
1
R663 2.2K
E
A21
RESET_N
B21
PBIAS
R652
+5V
R969 47K READY
4
C9032 0 . 1 uF 16V
C682 25V 10uF
A0
R970 47K
A1 A2
1
VCC
8
2
SCL
6
VSS
+3.3V_DOUGLAS
C683 25V 10uF
R654
R662 470K
C9090 0 . 1 uF 16V
C9096 0 . 1 uF 16V
C9017 47uF 16V READY
IC901 TPS2042BDRG 4
1
C9101 0 . 1 uF 16V
T5
C9122 0 . 1 uF 16V
U4 U3
C9113 10uF 6.3V
C9123 0 . 1 uF 16V
8
USB 2.0 Jack
C9118 0 . 1 uF 16V
F25 F29
C9138 0 . 1 uF 16V
M29 N24 P28
5
4
L908
U25
120-ohm
OUT2
C9025 100uF 16V
R961 0
OC2
5
V27 4
OUT1
3
EN2
6
3
R25
USB DOWN STREA M
EN1
7
2
2 1
+3.3V_DOUGLAS +3.3V_AUD_DOUGLAS
Y29 AB24
AD29
R677 3 .3 C673 0.01uF
L610
USBDN2_DM
BLUE-DM
3
USBDN2_DP
BLUE-DP
BLUE-DM
5
C649 C630 C679 0.1uF 0.1uF 330uF 50V 50V 25V
VDDA3329
USBUP_DM
31
29
30
D902 30V
CDS3C30GT H VBUS_DET
26
RESET_N
3
25
HS_IND/CFG_SEL1
4
R922 100K
C9201 0 . 1 uF SCL/SMBCLK/CFG_SEL 016V
24
IC902
6
NC7
7
21
C9212 SDA/SMBDATA/NON_REM1 0 . 1 uF 16V NC21
8
20
NC20
19
NC19
BLUE-DP
NC8
6
USB2512 USB_HUB
23 22
9
+3.3V_DOUGLAS C9052 0 . 1 uF 16V
C9159 330uF 6.3V
C9059 0 . 1 uF 16V
C9160 0 . 1 uF 16V
C9034 0 . 1 uF 16V
C9028 10uF 6.3V
L912 M LB-201209-0120 P-N2
6.8K
R1327
R1172 220K
R1168 75
1%
D127
R1199 10K
D128
D126
SCART1_VIN
AF3 AF2 AG2 AF1 AG1
W5 Y5 Y4 AB1 AA1 Y1 AB2 AA2 Y2 AA3 Y3
V3
4
5
POD_HOST_D 4
CDI0_ERROR
POD_HOST_D 6 POD_HOST_D 7
OOB_CTX OOB_CRX
HOST_D8
OOB_DRX
HOST_D9 HOST_D11
POD_VS2_MCLKO
HOST_D12 HOST_D13
POD_DETECT_N
HOST_D14
POD_DIR_N
HOST_D15
POD_A4_CTX
POD_HOST_A 0
POD_A5_ITX
POD_HOST_A 1
POD_A6_ETX
POD_HOST_A 2
POD_A7_QTX
POD_HOST_A 3
POD_A8_CR X
PODREG_HOST_A 4
POD_A9_DRX
POD_IOWR_HOST_A 5 HOST_A7
POD_A14_MCLKO
HOST_A8
POD_BVD2_MOVAL
HOST_A9
POD_BVD1_MOSTRT
POD_HOST_A1 0 POD_HOST_A1 1
POD_D15_MDO 7
POD_HOST_A1 2
POD_D14_MDO 6
POD_HOST_A1 3
POD_D13_MDO 5
HOST_A14
POD_D12_MDO 4
HOST_A15
POD_D11_MDO3
HOST_A16
POD_D10_MDO 2
HOST_A17
POD_D9_MDO1
HOST_A18
POD_D8_MDO0
HOST_A19
R1163 75
R1166 4.7K
A2
A1
HOST_A22 HOST_A23
POD_CD_1
HOST_A24
POD_CD_2 POD_WE_HOST_WR POD_CE_ 1
POD_OE_HOST_R D
POD_CE_ 2 HOST_ACK POD_READY_IRQ_ N POD_RESE T
HOST_DEV_CS2_ N
C
HOST_DEV_CS0_ N HOST_BOOT_CS_ N HOST_READY
HOST_D[0] HOST_D[1]
AG8
HOST_D[2]
AE7
HOST_D[3]
AH9
HOST_D[4]
AF9
HOST_D[5]
AJ10
HOST_D[6]
AG10
C9107 0 . 1 uF 16V
HOST_D[7]
DIR CI_DAT_DIR
AE9 AH10
CI_DATA[0] A0
AF10 AJ15
HOST_A[0]
AH15
HOST_A[1] HOST_A[2]
AG15 AE14
HOST_A[3]
AF14
HOST_A[4]
AG14
HOST_A[5]
AH14
HOST_A[6]
AJ14
HOST_A[7]
C107 4.7pF
CI_DATA[1] A1
HOST_A[0] HOST_A[1] HOST_A[2] HOST_A[3] HOST_A[4] HOST_A[5] HOST_A[6] HOST_A[7]
AE13
CI_DATA[2] A2 CI_DATA[3] A3 CI_DATA[4] A4
HOST_A[10]
AH12
HOST_A[11]
AJ12
HOST_A[12]
AE11
HOST_A[13]
CI_DATA[5] A5
HOST_A[10] HOST_A[11] HOST_A[12] HOST_A[13]
AF11
D130
READY
DS_HS
HOST_A[2] HOST_A[3]
DS_VS
HOST_A[4] HOST_A[5] HOST_A[6]
CI_DATA[6] A6
AG11
+3.3V_CI
CI_DATA[7] A7
AE10 R402 4.7K READY
AF13 AG13
R401 4.7K READY
R424 4.7K FHD_FRC
H/W OPTION(AD13, AH13)
R425 4.7K XGA_FRC
HOST_A[7]
AD13
R422 4.7K
AH13 AJ11 R430 4.7K
R429 4.7K
AJ13
HOST_WE HOST_O E
AF8 AG3
AF4 AJ4 AG6
HOST_READ Y
R413 10K R414 10K READY
R415 10K READY
R408 10K
R416 10K
READY
R409 10K
R417 10K READY
R410 10K
R418 10K READY
R411 10K
R419 10K
R412 10K
11 10
6
9
7
8
R426 4.7K WXGA_XGA
R427 4.7K WXGA_FHD
NC_4
HOST_D[1]
B1
B2 5 16 Bidirec(High:A ->B) B3 6 15 7
14
NC_2 NC_3
HOST_D[2] HOST_READ Y HOST_D[3]
HOST_O E
HOST_D[4]
B4
NC_5 NC_6 R/B RE CE
HOST_CS0_ N
NC_7
8
13
9
12
10
11
HOST_D[5]
B5 B6
HOST_D[6]
B7
HOST_D[7]
VCC_1 VSS_1
HOST_D[0-7]
NC_9 NC_10 CLE
HOST_A[2]
: R 4 2 4 , R 4 2 7 ( 1 )0
HOST_A[1]
FR C
: R 4 2 4 , R 4 2 5 ( 11 )
HOST_WE
FLASH_WP
ALE WE
+3.3V_CI
B
C Q401 KRC103S E
R420 10K
KCN-DS-1-0088
R1164 100
DOUT2
1
RIN2 6
R1165 100
2 7
1%
SCART2_VIN
8
R1184
4
6
11
7
10
8
9
A0
[RD]CONTACT
ROUT1
R1186 100 CHAPLIN_RX
2C
[RD]U_CAN
DIN1
R1187 100
DIN2
R1188 100
CHAPLIN_TX
R1189 100 R1322 100
DEBUG_RX
READY R1347 0
UCOM_RX
1/16W 5%
+3.3V_STBY
IC1013 NLASB3157DFT2G
UART_SEL
SELECT VCC
C167 0.1uF 16V
A
6
1
5
2
4
3
B1
GND
B0
R1113 10K
D119
READY
D116
READY
DDR_VDD_17
CVSS_83
DDR_VDD_18
CVSS_84 CVSS_85
DDR_VDD_20
CVSS_86
DDR_VDD_21
CVSS_87
DDR_VDD_22
CVSS_88
DDR_VDD_23
CVSS_89
DDR_VDD_24
CVSS_90
DDR_VDD_25
CVSS_91
DDR_VDD_26
CVSS_92
DDR_VDD_27
CVSS_93
DDR_VDD_30
ADC_GND12_2 ADC_GND12_3
DDRPLL_AVDD33
ADC_GNDA_1
DDR_VDDI_1
ADC_GNDA_3
ADC_GNDA_6 ADC_GNDA_7
DDR_VRF_2
ADC_GNDA_8
U11 U12 U13 U14 U15 U16 U17 U18 U19 V14 V15 V16 V17 V29 W14 W15 W16 W17 W24 W26 W28 AA24 AA26 AA27 AC24 AC26 AC28 AE24 AE26 AE28
E5
F5 E3 F1 G5
ADC_GNDA_4
DDR_VRF_0
T24 T26
F6
ADC_GNDA_2
DDR_VRF_1
T18 T19
D4
ADC_GND12_1
DDR_VDD_31
G3 H5 J5 K5 K3
N6
B4P
HDMI_VDDA33_2
AUD_AVSS33_2
HDMI_VDDA33_3
AUD_AVSS33_3
HDMI_VDDA33_4
AUD_AVSS33_4
HDMI_VDDA33_5
AUD_AVSS33_5
AUD_HP_AVSS33 DDRPLL_AGND
LVTX_VDD33_1
HDMI_GNDA_1
LVTX_VDD33_2
HDMI_GNDA_2 HDMI_GNDA_3 HDMI_GNDA_5 HDMI_GNDA_7 HDMI_GNDA_9 LVTX_VSS_1 LVTX_VSS_3 LVTX_VSS_4
USB_AVDD33_1 USB_AVDD33_2
RPLL_AGND_1
USB_AVDD33_3
RPLL_AGND_2
VDAC_VDD12
USB_GND_1
VDAC_AVDD 33_1
USB_GND_3
USB_GND_2 VDAC_AVDD 33_2 VDAC_AVDD 33_3
VDAC_VSS12
C9003 0.1uF
M6
AUD_AVSS12_1
WP NC_11 NC_12 NC_13 NC_14 NC_15
1
48
2
47
3
46
4
45
5
44
L2 P1
C9004 0.1uF
P2
R904 SCART1_VIN
22 R903
C9166 0 . 1 uF
R977 510
R978 10
SIDE_CIN
22
P3 P4 P5 U1 E21 A2 C5 C6 C7 C8 C9 C10 D7 D8 AD21 AD22 AE23 AG27 B22 C22 AD20 AJ19 AF19 AC6 AD7 AG4
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
NC_28 NC_27 NC_26 NC_25 I / O7
HOST_D[7]
I / O6
HOST_D[6]
I / O5
HOST_D[5]
I / O4
HOST_D[4]
NC_24 NC_23 PRE
HOST_D[0-7]
VCC_2 VSS_2 NC_22 NC_21 NC_20 I / O3
HOST_D[3]
I / O2
HOST_D[2]
I / O1
HOST_D[1]
I / O0
HOST_D[0]
NC_19 NC_18 NC_17 NC_16
+3.3V_CI C415 0.1uF
DEBUG_TX
CI_DET
HOST_A[6] HOST_A[7]
74LCX244MTC OE1 HOST_O E
O4
FE_TS_DATA[5]
A2
FE_TS_DATA[4]
A3
FE_TS_DATA[3]
A4
FE_TS_DATA[2]
A5
1
20
2
19
3
18 17
4 COMMON INTERFACE
16
5 BUFFER 6
15
7
14
8
13
9
12
VCC
C402 0.1uF 16V
OE2 Y0 Y1 Y2 Y3 Y4
CI_MDI[ 7] CI_MDI[ 6] CI_MDI[ 5]
CI_MDO[0] CI_MDO[1] CI_MDO[2] CI_MDO[3]
CI_MDI[ 4] CI_MDI[ 3]
R437 READY 10K
0
COMMON INTERFACE
AR402 33 4 5 3 6 2 7 1 8 4 3 2 1
FE_TS_DATA[1] FE_TS_DATA[0]
A6 A7 GND
10
11
Y5 Y6 Y7
R443
R453 0 READY
10K
47 AR404
COMMON INTERFACE
5 6 7 8 4 3 2 1
33 4 3 2 1 AR405 5 33 6 7 8
COMMON INTERFACE
CI_CD2
+5V
SIDE_RIN C160 100pF READY
C404 GND0.1uF
AR403 33 5 6 7 8
R435
37
3
38
4
39
5
40
6
41
7
42
8
43
9
44
10
45
11
46
12
47
13
48
14
49
15
50
16
51 COMMON INTERFACE 17 52 18 53
19
54
20
55
21
56
22
57
23
58
24
59
25
60
26
61
27
62
28
63
29
64
30
65
20
2
19
3
18
4
17
VCC OE2
CI_MDI[ 0]
CI_MIVA L CI_MCLKI
3
C_LUG_L1
4
C_LUG_S2
5
C_LUG_L2
6
NC1
7
COM1
8
NO1
11
NO2
10
COM2
10K R428
C405 0.1uF 16V
C411 0.1uF
O6
O0
47
CI_OE
47 R478 R476 0
I3 O7
CI_MCLKI
CI_OE
15
7
14
8
13
9
12
O1 I5
CI_WE
O2
GND
10
11
FE_TS_DATA_VAL
47
CI_IORD
47
CI_IOWR
I6 FE_TS_DATA_SYN O3 R480
+5V
I7 FE_TS_DATA_CLK
GND CI_DET CI_DET
GND IC406 74LCX244MTC OE1 HOST_A[0] CI_ADDR[0-14]
CI_ADDR[7] HOST_A[1]
I0 O4 I1
1
20
2
19
3
18
4
17
IC407 74LCX244MTC
+3.3V_CI C414 0.1uF 16V
VCC
OE1
OE2 O0 I4
POD_A[8] CI_ADDR[0] POD_A[7]
I0 O4
REG POD_A[9]
I1
COMMON INTERFACE
CI_ADDR[6] GND
6
I4
R479
CI_IRQ
CI_ADDR[12] CI_ADDR[7] CI_ADDR[6] CI_ADDR[5] CI_ADDR[4] CI_ADDR[3] CI_ADDR[2] CI_ADDR[1] CI_ADDR[0]
1 G1
16
47
GND
CI_DATA[0] CI_DATA[1] CI_DATA[2]
COMMON INTERFACE
5
47
R475
CI_CE1
C419 0.1uF 16V
0
READY
I2
CI_WE
R456 100 R454
34
2 G2
O5 R474
CI_MISTRT HOST_A[5]
CI_ADDR[11] CI_ADDR[9] CI_ADDR[8] CI_ADDR[13] CI_ADDR[14]
33
68
HOST_A[2] CI_ADDR[5]
GND AR406 33 1/16W 1 8 2 7 3 6 4 5
HOST_A[6]
CI_ADDR[10]
32
67
GND
COMMON INTERFACE
CI_DATA[3] CI_DATA[4] CI_DATA[5] CI_DATA[6] CI_DATA[7]
31
66
R447 100
CI_MDI[ 2] CI_MDI[ 1]
47
36
100
I1
R473
CI_MIVA L
35
R446
4 3 2 1
COMMON INTERFACE
CI_RST CI_WAIT REG CI_MCLKO CI_MOVAL CI_MOSTRT
C_LUG_S1
HOST_A[3] CI_ADDR[4]
O5 I2 O6 I3 O7 GND
1
20
2
19
3
18
4
17
+3.3V_CI C413 0.1uF 16V
VCC OE2 O0 I4
CI_ADDR[8] HOST_A[4]
COMMON INTERFACE
5
16
6
15
7
14
8
13
9
12
10
11
O1 I5 O2 I6 O3 I7
CI_ADDR[1] POD_A[6] CI_ADDR[2] POD_A[5] CI_ADDR[3] POD_A[4]
CI_ADDR[14] HOST_A[10] CI_ADDR[13] HOST_A[11] CI_ADDR[12]
O5 I2 O6 I3 O7 GND
5
16
6
15
7
14
8
13
9
12
10
11
O1 I5 O2 I6 O3 I7
CI_ADDR[9] POD_A[14] CI_ADDR[10] HOST_A[13] CI_ADDR[11] HOST_A[12]
GND SIDE_CIN
SIDE_YIN/SIDE_VIN
R1110 0 +3.3V _CI 4.7K R1111
5 6 7 R4048
HOST_WE
P401 10067972-050L F
33
CI_MDI[ 4] CI_MDI[ 5] CI_MDI[ 6] CI_MDI[ 7]
GND_TER
NC2
1
R477 C407 100uF 16V C420 0.1uF 16V
CI_MDI[ 0] CI_MDI[ 1] CI_MDI[ 2] CI_MDI[ 3]
2
9
I0
R472
+5V
1
12
GND
IC408
+5V_CI
CI_MISTRT
+3.3V_STBY D121
C161 100pF READY
JK106 PSJ018-01
PC_COMMAND
100
D118
CVSS_81 CVSS_82
T16 T17
HOST_A[5]
ROUT2
R1185
READY
A1
FE_TS_DATA[0-7]
9
READY
SIDE_LIN 6.8K
5C
R1307 3.9K
FE_TS_DATA[6]
SIDE_CVBS_LINK
C119 0 . 1 uF 16V R1306 3.9K R1304
[RD]O_SPRING
R1152 10K
[WH]U_CAN
4C
220K
[WH]C_LUG
2B
R1309
[YL]U_CAN
3B
RIN1
100
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
2A
6.8K
12
5A
R1303
5
DOUT1
220K
13
C145 0.1uF
GND
R1310
4
VCC
R1160 1K D139 30V
14
[YL]CONTAC T
D131
15
3
5 10
DDR_VDD_15 DDR_VDD_16
T14 T15
75
C142 0.1uF V-
3 SCART2_VIN
C2-
16
2
[YL]O_SPRING
D132
C2+
1
4A
1% R1308
E
V+ C1-
P101
DTV/MNT_VOUT
I C101
0.1uF
C144 0.1uF
PPJ218-0 1
MAX3232CDR C1+
C143
+3.3V_STBY
75
1K R1340
330 R1337
R1345 470
C111 10uF 16V
CVSS_79 CVSS_80
T11 T12 T13
HOST_A[4]
+3.3V_CI
CI_DET
FE_TS_DATA[7]
1% R1312
E
R1344 B 82
27K R1339
C Q108 2SC305 2
27K R1338
E 2SA1504 S Q103 B R1336 330 C
330 R1341
B
R1343 330
DDR_VDD_13 DDR_VDD_14
R18 R19
HOST_A[3]
CI_MDO[4] CI_MDO[5] CI_MDO[6] CI_MDO[7] CI_CE2
D135
RS-232C Inpu t
R1342
47
SHIELD
CVSS_77 CVSS_78
HOST_A[2]
CI_CD1
D133
C141 0.1uF
1 : D a t a c a r r i e r d e t et c 2 : RX 3 : TX 4 : D T R ( D a t a t e r m i n a l r e ayd 5 : GND 6 : D S R ( D a t a s e t r e a d) y 7 : RT S ( Req uest t o sen d) 8 : C T S ( C l e a r t o s e n)d 9 : RI ( R i ng i n di c a to r)
DDR_VDD_11 DDR_VDD_12
R16 R17
HOST_A[1]
CI_IORD CI_IOWR
+3.3V_STBY
SCART2_LINK
CVSS_75 CVSS_76
R14 R15
HOST_A[0]
IC402
C114 0.1uF 16V
DDR_VDD_9 DDR_VDD_10
R12 R13
IC410 HY27US08121B-TPC B
NC_1
+3.3V_CI
FHD
V_SYNC_PC
SIDE_S_S W
D134
P_+12V
CVSS_73 CVSS_74
P26 R11
HOST_READ Y
D120
R1346 10K
SYNC_IN
DDR_VDD_7 DDR_VDD_8
P18 P19
CI_DET
HOST_D[0]
H/W VERSION OPTION(AJ11, AD9 )
DS_VS
OE1
R1325 100
SYNC_OUT
CVSS_71 CVSS_72
P16 P17
R436 10K
13 12
4 5
+3.3V _CI
R1148 10K
SYNC_GND2
DDR_VDD_5 DDR_VDD_6
P14 P15
HOST_ACK R423 10K
AH5
R407 10K
JK105
22
CVSS_69 CVSS_70
P12 P13
10K C412 0.1uF
GND
Boot Strap Setting (NOR FLASH Boot, 16bit, Internal OSC )
14
2 3
SCART2_ID
R1154 1K
R1117 75
17
R459 33
OE
R421 10K
HOST_CS0_ N
74LVC541A(PW)
RGB_IO
10K R1128
COMMON INTERFACE
4
VCC
B0
+3.3V_CI
R406 10K
R1238
SYNC_GND1
READY
18
HOST_ACK
AE5
C148 0.1uF
3.3K +3.3V_C I
R_OUT
C118 220uF 16V
19
3
R441 10K
1
H_SYNC_P C
READY
C Q106 2SC305 2
20
2
AD9
R405 10K
REC_8 R1240 1K
R1131 18K
RED_GND
DDR_VDD_3 DDR_VDD_4
N28 P11
47
SIDE CVBS & S_VIDE O
RGB_GND
R1119 75
GND
XGA : R426,R425(01 )
PC_SER_CL K
R1124 47K
D2B_OUT
COM_GND
R471
1
WXGA : R426,R427(00 )
AE12
READY
+5V
R1175 4.7K
C A1
D111 READY
D2B_IN G_OUT
CVSS_67 CVSS_68
N19 N27
C418 C417 0.1uF 0.1uF
NC_8
AH11
READY
D142 KDS184 A2
0
DDR_VDD_1 DDR_VDD_2
N17 N18
+3.3V_CI
PC_SER_DAT A
D114
CVSS_65
N15 N16
Douglas POWER
AF12 AG12
READY
R1123
G_GND
B
AJ9
R451 0
C124 220pF 50V READY
CVSS_63
N13 N14
+3.3V_CI
AG9
READY
C127 220pF 50V READY
AUDIO_L_IN B_OUT ID
C
+3.3V_CI
R442 10K
C125 270pF 50V READY
B_GND
CVSS_61
N11 N12
+1.8V_DOUGLAS_DDR
IC405 74LVC245A
R444 10K
470K R1136 220K R1118
C157
5pF
D110
READY
AUDIO_L_OUT AUDIO_GND
CVSS_59 CVSS_60
M15 M16
AF7 AH8 AE8
AR401
R1127 10
AUD_AVDD33_4 AUD_AVDD33_5
VDAC_AVSS33_2
E
COMMON INTERFACE R1126 10
AUDIO_R_IN
CVSS_57 CVSS_58
M13 M14
READY
HOST_A[1]
DS_HS
C126 270pF 50V READY
AUD_AVDD33_2 AUD_AVDD33_3
L26 L28
D_SUB_SC L
HOST_A[0]
ROM DOWNLOAD FOR PD P
C123 0 . 0 3 9 uF 25V READY
CVSS_56
VDAC_AVSS33_1
Q902 2N3904S
SCART2_LIN
AUDIO_R_OUT
C4P
+3.3V_DOUGLAS
R964 390
IC103
DTV/MNT_LOUT
CVSS_53 CVSS_54
USB_AVDD12
+3.3V_DAC_DOUGLAS C9152 AE6 0.1uF
74HC14 D
C109 1000pF READY
AUD_AVDD12_1 AUD_AVDD12_2
L16 L24
D_SUB_SD A
D_SUB_SC L
GND
CVSS_51
L14 L15
NAND FLASH READY AG7 AJ8
C150 0.1uF
SCART2_RIN R1158 75
R403 V2 22 V1
HOST_A21 POD_WAIT_N
HOST_DEV_CS1_ N
VGA_B
13.HSYNC 14.VSYNC R1157 75
W4
KDS184 D141
100
RGB_LINK
C112 0.1uF 16V R1334 22
R1180 1K
DTV/MNT_ROUT
470K R1137
V5 V4 AE4
CI_IRQ CI_RST
100 R1177
10.R_GND
C122 0 . 0 3 9 uF 25V READY
CVSS_49 CVSS_50
J 28 L13
R1181
R1138 1K
0 15
16
7
6
D129
14 10
8
2
3
READY
R1156 0 R1114
R1174 1K
R1145 1K
1
VGA_G C106 4.7pF
5.DDC_GND 6.SYNC_GN D
R1102 75
D_SUB_SD A
R1215 10K
VGA_R C108 4.7pF
R1335 22 +3.3V_CI READY
13
4
15.SCL
IC102 AT24C02BN-10SU-1. 8 R1214 10K
R1333 22
12
9
11.GND 12.SDA
SCART1_VIN
220K R1120
AE3
CI_CE1 CI_CE2
P_+5V
11
8 3
ADC_VDDA33_3 ADC_VDDA33_4
J 24 J 26
S
D
1%
R1210 12K
5% 1/10W
4.7K R1193
R1328 6.8K
R1169 220K
R1171 75
COMP_LINK
7 2
TUNER_VOUT
5pF
AD5
CI_MDO[7] CI_MDO[6] CI_MDO[5] CI_MDO[4] CI_MDO[3] CI_MDO[2] CI_MDO[1] CI_MDO[0]
C133 12pF
1%
AD4
POD_A[14] CI_MOVAL CI_MOSTRT
R1155 0
6 1
7.GNC 8.B_GND 9.G_GND
5
C158
2SC305 2 E1
C132 12pF
SCART1_F B
E
L106 3.3uH
READY
C3 Q104
COMP_Y
READY
1.RED 2.GRN 3.BLU 4.NC
E
R1116 470K
C110 1000pF READY
POD_HOST_D 1 POD_HOST_D 2 POD_HOST_D 3
HOST_D10 W6
CI_MCLKO CI_DET CI_DAT_DIR POD_A[4] POD_A[5] POD_A[6] POD_A[7] POD_A[8] POD_A[9]
READY C102 4.7pF
R1149 10K
+3.3V_CI
1%
JK104 KCN-DS-1-0089
R1147 1K C Q102 2SC305 2
R11431K
Q101 2SC305 2
R1125 3.3K
REC_8
+3.3V_CI
R1133 1K
B
W2 W3
CI_CD1 CI_CD2
11.RGB Input SCART1_R
+3.3V_CI
R1101 75
W1
FLASH_WP
SCART1_LINK
C115 0.1uF 16V
C
POD_HOST_D 0
CDI0_CLK CDI0_SYNC CDI0_D0
POD_IORD_HOST_A 6
D137 30V
R1104 75
AJ5
CDI0_VALI D
POD_HOST_D 5
Q107
2SC305 2 E1
C116 0.1uF 16V
D122
D140 30V
READY
SYNC_IN
AJ6 AJ7
CI_WAIT
R1153 1K
SYNC_OUT
3 C
4.89V / 9.09V_120ohm(LOAD) 5.19V / 10.91V_1Kohm(LOAD)
C3 Q105 2SC305 2 E1
2 B
2B
AH6 AH7
HOST_A20
SYNC_GND1 SYNC_GND2
R1195 1K
REC_8_CTRL 2
R1159 1K
SCART1_G +3.3V_CI
RGB_IO
READY
D123
R1247 3.3K READY
R1107 75
2 B
R1194 1K
COMP_P b
R1122 0
+3.3V_CI
CVSS_47 CVSS_48
LVTX_VSS_2
AF5
C9158 0 . 1 uF 16V
ADC_VDDA33_1
RPLL_AVDD12
AD6
C9198 0 . 1 uF 16V
CVSS_45
ADC_VDDA33_2
RPLL_AVDD33
AF6
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
FE_TS_DATA_VAL FE_TS_DATA_CLK FE_TS_DATA_SYN FE_TS_DATA[0]
[GN]1P_CAN
GND
C9197 0 . 1 uF 16V
R470 10K
4A [GN]CONTACT
SCART1_ID
R1112 18K
R_OUT
COM_GND
[GN]O_SPRING
PPJ209-0 1 JK103 R1245 1K
COMP_P r
REC_8_CTRL 1
D124
3A
Y
C9002 10uF 6.3V
10K R464
[BL]1P_CAN
C9038 0 . 1 uF 16V
CVSS_43 CVSS_44
HDMI_GNDA_8
AH19
+1.26V_DOUGLAS
ADC_VDD12_1 ADC_VDD12_2
OTP_VDD33
AF20
+3.3V_DOUGLAS_VA A
CVSS_41
HDMI_GNDA_6
AE20
+3.3V_DOUGLAS +3.3V_DOUGLAS
CVSS_39 CVSS_40
LVTX_PLL_VDD33
A26
C23
+1.26V_DOUGLAS_ D
IOVDD33_18 IOVDD33_19
HDMI_GNDA_4
B23
+1.26V_DDRPLL
CI_DATA[0-7 ]
[BL]C_LUG_L
2B
1%
[RD]1P_CAN1
5B
C9144 10uF 6.3V READY
IC100 FLI10610H-AA
R1170 75
2C
D117
RGB_GND
[RD]C_LUG_L
D125
5C
Pb
C120 0 . 0 3 9 uF 25V READY
D138 30V
RED_GND
[RD]1P_CAN2
C9196 0 . 1 uF 16V
CVSS_37 CVSS_38
G26 G27
P_+12V COMP_LIN
2D [WH]1P_CAN
R1150 10K
Pr
R1151 10K
D107 30V
READY
G_OUT D2B_OUT
COMP_RIN
5D [WH]C_LUG_L
TV_LOUT
R1103 75
1%
D105 30V
D2B_IN
READY
G_GND
D113
2E
L
[RD]O_SPRING
4E [RD]CONTACT
C9163 10uF 6.3V
IOVDD33_16 IOVDD33_17
E28 G24
[SCART PIN8]
R1179 3.9K D115
470K R1129
3E
R
C9165 0 . 1 uF 16V
CVSS_35 CVSS_36
LVTX_VDD33_3
AG19
USB_HU USB_HU B USB_HU B B
R1178 3.9K
C121 0 . 0 3 9 uF 25V READY
C9164 10uF 6.3V
L928 M LB-201209-0120 P-N2
C9161 0 . 1 uF 16V
R901 0
+3.3V_OTP
C688 33pF READY
C9162 0 . 1 uF 16V
+3.3V_DOUGLAS +3.3V_DAC_DOUGLAS
AUDIO_MUTE
0
R962 READY 0
N e a r b y p i n F23 Nearby pin AD23
IOVDD33_14 IOVDD33_15
HDMI_VDD12_4
AG26
C9206 1uF 16V
VDD33
5
NC6
7
R689
XTAL1/CLKI N
27
2
VDDA335
NC9
C654 22000pF
1
CVSS_33 CVSS_34
HDMI_VDD12_2
AF24
+3.3V_DOUGLAS_VDDI
IOVDD33_12 IOVDD33_13
HDMI_VDD12_3
AE21
+3.3V_LVTX_PLL_DOUGLAS +3.3V_DOUGLAS
CVSS_31 CVSS_32
HDMI_VDD12_1
E9 E10
+3.3V_LVTX_DOUGLAS AE22
+3.3V_DOUGLAS
IOVDD33_10 IOVDD33_11
AUD_AVSS33_6
D10
C9081 0 . 1 uF 16V
C9076 33uF 10V
CVSS_28 CVSS_29 CVSS_30
HDMI_VDDA33_1
E8 C9131 0 . 1 uF 16V
R965 47K
2
+1.26V_DOUGLAS_D
C9121 0 . 1 uF 16V
IOVDD33_7 IOVDD33_8 IOVDD33_9
AUD_AVSS12_2
C4
+1.26V_HDMI_DOUGLAS
+3.3V_DOUGLAS
+5V
CVSS_26 CVSS_27
DLL_VAA 0
E7
+3.3V_CI
IOVDD33_5 IOVDD33_6
E24 E26
R966 1K
USB20-1-DP
17
USB20-1-DM
1
36
R636 3 .3 C672 0.01uF
R988USB_HUB 0 USBDN1_DM R987USB_HUB 0 USBDN1_DP
VDD18PLL
C9200C9205 1uF 0 . 1 uF 16V 16V
RBIAS
C9204 0 . 1 uF 16V
VDD33PLL
C9209 0 . 1 uF 16V
34
C9211 0 . 1 uF 16V
35
C9202 0 . 1 uF 16V
15
26
P901 12505WS-06A0 0
11
BST2B
VDR2B
R673 4.7K
P_+16V
PGND2B_1
FAULT
PROTECT
C650 0.1uF
C9210 4 . 7 uF 6.3V
+5V
JK603
4
100 100
R645 R643
1F
C667 0.01uF R640 3 .3
USB_HUB
C633 1uF
220 220 220
R641 4.7K
CVSS_24 CVSS_25
DLL_VAA 1
D5
+3.3V_CI
G
R680 R678 R679
27
29 25
30
24
13 14 22
31
C641 0.1uF
12
32
1S
C664 390pF R688 5 .6
C666 0.47uF
10
NTP3000A
11 12
L605 DA-8580 EAP3831900 1 2F
TEST
33
2S
M28
+3.3V_HDMI_DOUGLAS
C9051 0 . 1 uF 16V
IOVDD33_3 IOVDD33_4
D26 D28
A4P
E6
Q901 RTR030P0 2
BST1B
43 34
23
LFM
EAN41584001
6602T25009 C
C651 390pF
OCS1_N
10
L604 R644 5 .6
VDDA3310
9
BST2A
AA25
V24
C9037 0 . 1 uF 16V
CVSS_22 CVSS_23
ADC_GNDA_5
D6
R915 100K
PGND1B_1
VDR1B
45
44
35
AGNDPLL
+3.3V_CI
C9033 0 . 1 uF 16V
IOVDD33_1 IOVDD33_2
DDR_VDDI_2
R24
+3.3V_DOUGLAS_VAA
R908 0 C9030 0 . 1 uF 16V
R917 100K
PGND1B_2
36
C662 1uF C646 22000pF
VDR2A
AD23
R907 0
C9214 33pF 50V
X901 24MHz
F23
+3.3V_LVTX_PLL_DOUGLAS
CVSS_20 CVSS_21
DDR_VDD_29
G25
R923 100K
C9213 33pF 50V R919 1M
4
2
NC_2
+3.3V_DOUGLAS_VDDI
+3.3V_DOUGLAS +3.3V_LVTX_DOUGLAS
L606
PGND2A_2 PGND2A_1 OUT2A_2 OUT2A_1 PVDD2A_2 PVDD2A_1 PVDD2B_2 PVDD2B_1 OUT2B_2 OUT2B_1 PGND2B_ 2
C9061 0 . 1 uF 16V
DDR2_VREF
R916 100K
R686 4.7K
C9054 0 . 1 uF 16V
L919 M LB-201209-0120 P-N2
CVSS_18 CVSS_19
DDR_VDD_28
AF25
+1.26V_DDRPLL
E22
100K R920
C638 0.1uF
SUSP_IND/LOCAL_PWR/NON_REM 0
C631 390pF R671 5 .6
28
C658 0.47uF
1F
C656 0.01uF R674 3 .3
D901 30V
1S
AD25
+3.3V_DOUGLAS
R918 100K
C635 0.1uF
AB27 AB29 AD27
18
C670 0.1uF
R642 4.7K
C9130 0 . 1 uF 16V
AF27
CDS3C30GT H
C634 0.1uF
C639 0.1uF
C9119 0 . 1 uF 16V
AF29
USBUP-DM
L609 DA-8580 EAP3831900 1 2S 2F
C9109 10uF 6.3V
CVDD12_18 CVDD12_19
DDR_VDD_19
Y25 Y27
L924 M LB-201209-0120 P-N2
CVSS_16 CVSS_17
CVSS_66
F27
C9128 0 . 1 uF 16V
CVDD12_16 CVDD12_17
DDRPLL_AVDD12
K25
C9104 10uF 6.3V
CVSS_14 CVSS_15
CVSS_64
M25 L923 M LB-201209-0120 P-N2
CVDD12_14 CVDD12_15
AUD_HP_AVDD33
K29
OC1
CVSS_12 CVSS_13
CVSS_62
D25
C9134 0 . 1 uF 16V
CVDD12_12 CVDD12_13
AUD_AVDD33_6
U2
+1.8V_DOUGLAS_DD R
CVSS_10 CVSS_11
CVSS_55
L1 T6
K27
C9207C920 C920 8 3 1uF 0 . 1 uF 0 . 1 uF 16V 16V 16V
SCART1_RIN
R1106 47K
D109
C9112 0 . 1 uF 16V
CVDD12_10 CVDD12_11
CVSS_52
P6
C9005
CVSS_8 CVSS_9
ADC_VDDA33_5
D22
NC18
OUT1B_1 47
46
7 8
DGNDPLL
C691 33pF READY
READY
21
K4
+3.3V_DOUGLAS +3.3V_ADC_DOUGLAS
1%
OUT1B_2
IC601
CLK_O VDD_IO
C640 0.1uF
MS_DAT_AMP MS_WCLK_AMP MS_BCLK_AMP SDA2_3.3V SCL2_3.3 V
R1324 100 READY
20
+1.26V_AUD_DOUGLAS +3.3V_AUD_DOUGLAS
CVDD12_8 CVDD12_9
CVSS_46
H4
R902 22
C9095 10uF 6.3V
L922 M LB-201209-0120 P-N2
JK901 KJA-UB-4-0004
IN
L603
TV_ROUT
D136 30V
19
C9136 0 . 1 uF 16V
CVSS_6 CVSS_7
ADC_VDD12_3
U5
R984 4.7K
USB POWER ENABL E USB20-1-DM LOW ACTIV E USB20-1-DP
AUDI O
READY
17 18
C3
H29
R921 12K
PVDD1B_1 49
48
PGND1A_1
PVDD1B_2
PGND1A_2
PVDD1A_2
PVDD1A_1
OUT1A_1
OUT1A_2
55
53
52
54
6
37
NC_1
C661 10uF 6.3V
51 50
38
DVDDPLL
C668 0.1uF
40 39
AVDDPLL
C674 10uF 6.3V
41
4 5
PWM_3B/PWM_HP 2
RESETQ
56
C677 C632 100pF 1000pF R646 C652 3.3K 0.1uF
42
2 3
C653 C689 0.1uF 10uF
MS_BCLK MS_WCLK MS_DAT B_OUT ID
D112 16
C9114 0 . 1 uF 16V
CVSS_4 CVSS_5
CVDD12_6 CVDD12_7
CVSS_42
H24
1
1
AD CLK_I
+1.8V
2A
D102 14 15
C9103 0 . 1 uF 16V
CVSS_2 CVSS_3
CVDD12_4 CVDD12_5
IOVDD33_20
H27
C669 1uF
VSS_IO
PWM_3A/PWM_HP 1
100pF C625
0.01uF C636
0.01uF C687
/RESET
+1.8V L608 MLB-201209-0120P-N 2
18
15
16
14 I2S_CL3
I2S_WS3
10 DVSUP
DVSS 11 I2S_DA_IN2/3 12 NC1 13
9
8
I2S_CL4
6
7
I2S_WS4
I2S_DA_IN1
I2S_DA_OUT4
1
2
4
5
3 I2S_CL
I2C_CL
I2S_WS
I2C_DA
220I2S_DA_OUT
220
100
100
220 R609
BST1A VDR1A C645 1uF
+1.8V +3.3V_CI
R611
R612
R614
R603 750
750
750
1000pF C665 AUDIO_MASTER_CLK
R616
R602
R610
R670 100
SW_RESE T
17
AUDIO_L_IN
JK102 PSC003-0 3
9
AB6
+3.3V_OTP
R1146 1K
13
+1.26V_ADC_DOUGLAS
0.1uF
L926 M LB-201209-0120 P-N2
3
VREF2 19 DACA_L 18 DACA_R
L105 3.3uH
12
AA6
D29
USBUP-DP
20
16
61
100 1%
D104 30V
READY
AUDIO_GND
C162 1000pF
10
C9058 0 . 1 uF 16V
+3.3V_HDMI_DOUGLAS
+5V
C637 22000pF
20
ADR_SEL
C663 22000pF
21
60
NC2 22 DACM_L 21 DACM_R
17
D_CTR_I/O_0
23
15
58 59
B_GND
C165 1000pF
11
C9048 0 . 1 uF 16V
SCART1_FB
DTV/MNT_ROUT
4.7K
R635 5 .6 C671 390pF
C675 R687 330uF 3 .3 25V C678 0.01uF
19
NC6 D_CTR_I/O_1
R615 READY
D106 30V
AUDIO_L_OUT
Half SCART 2
7
C9043 10uF 6.3V
D27
R664 2.2K
16
NC3
SCART1_LIN
D103 READY
8
C9075 0 . 1 uF 16V
SDA1_5V
OCS2_N
24
R1105 220K
C105 5pF
1%
6
C9071 0 . 1 uF 16V
+1.26V_DDRPLL
R971 22
SDA
5
4
RESET
SCL1_5V
PRTWR2
57
R1109 75
4
C9066 0 . 1 uF 16V
READY
USBUP_DP
NC5
B
5
C9060 0 . 1 uF 16V
G4 C9085 10uF 6.3V
L921 M LB-201209-0120 P-N2
C9001 0.1uF 16V
5
R968 22
XTAL 2
NC4
R1134 1K
R1115 1K
3
C9053 0 . 1 uF 16V
R6
4
C9153 0.1uF
WP
7
3
3
32
25
SHIELD
2
C9046 0 . 1 uF 16V
+1.26V_DOUGLAS_D+1.26V_AUD_DOUGLAS
C Q604 2SC305 2 E
P_+16V
DTV/MNT_LOUT_SC2 DTV/MNT_ROUT_SC2
SCART1_B
22
1
C9040 0 . 1 uF 16V
F4
R909 10K
SW901 TMUE312GAB 1 2
33
56
AUDIO_R_OUT AUDIO_R_IN
1%
21
C9036 0 . 1 uF 16V
+3.3V_OTP
24LC512
R967 47K
R982 4.7K
R650 1K C648 6800pF
C9029 0 . 1 uF 16V
E4
+5V
R658 470K
B
AD17
A1
14
AUD_CL_OUT
R1121 C101 1000pF 470K READY
D101 30V
20
AD11 AD12
Y6
13
TP
27 SC2_OUT_ L 26 SC2_OUT_ R
R604
C156 5pF L101 3.3uH
READY
18 19
AD10
AD18
C9026 10uF 6.3V
L910 M LB-201209-0120 P-N2
VDD18
54 55
100
220K R1108
READY
D108 30V 17
C9078 0 . 1 uF 16V
U6
VDD33CR
VREF1
R1140 1K
15
C9073 0 . 1 uF 16V
+3.3V_ADC_DOUGLAS
28
28
COMPONEN T
JK101 PSC003-0 3
16
C9069 0 . 1 uF 16V
V6
33
34
36
35
37
38
39
40
41
42
43
IC602 MSP4458G-C 4
XTAL_OUT
READY
C103 1000pF READY
C164 1000pF
14
C9063 0 . 1 uF 16V
E13
DFSYNC
DTV/MNT_LOUT
4.7K
DTV/MNT_ROUT_SC 2
SCL
53
TV_LOUT_SC1 TV_ROUT_SC1
SDA
XTAL_I N
30 SC1_OUT_ L 29 SC1_OUT_ R
BCK
52
WCK
TESTEN
L102 3.3uH C163 1000pF
12
C9056 0 . 1 uF 16V
+3.3V_IO_DOUGLAS
+1.26V_DOUGLAS_D
DVSS
ANA_IN2+
56pF
Full SCA RT 1
13
C9049 0 . 1 uF 16V
AD14
1/10W 5%
11
C9044 0 . 1 uF 16V
+1.26V_DOUGLAS_D +1.26V_HDMI_DOUGLAS
C660 0.1uF
2
2K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
10
C9039 0 . 1 uF 16V
CVSS_1
CVDD12_2 CVDD12_3
CVDD12_20
F12
MUTE_LINE_DTV
CAPL_M 32 AHVSUP 31 CAPL_A
C609 4.7uF 10V
8
W19
R985USB_HUB 0 P R986USB_HUBUSBUP-D 0
C21
PPWR
R936 0
DVDD
C622
SCL1_5V SDA1_5V SW_RESET
9
W18
+3.3V_IO_DOUGLAS
C9156 0 . 1 uF 16V
B2
USB20-PWE 1
SDATA
ANA_IN?
50 51
R617 0 X601 18.432MHz
49
64
7
M18
V13
R956 6.2K 1%
PWM0
RESET
PWM AM P
L607 MLB-201209-0120P-N 2
R626 470
ANA_IN1+
STANDBYQ 62 NC7 63
5
M17
V18
AG20
PWM2
GND
C608 470pF
C617 2pF 50V
2SC3875 S
6
M12
C9084 0 . 1 uF 16V
M19
+3.3V_DOUGLAS
PWM1
C685 10uF 16V
AHVSS
AGNDC
SC4_IN_L
SC4_IN_R
ASG1
SC3_IN_L
SC3_IN_R
ASG2
SC2_IN_L
SC2_IN_R
ASG3
SC1_IN_R
MONO_IN
AVSS
SC1_IN_L 44
45
46
47
48 C686 0.1uF
C623 2pF 50V
56pF Q611
4
C9079 0 . 1 uF 16V
9
1 2
VCC
C694 3.3uF
C693 0.01uF
C626
C621
6
RT1P141C-T112 Q610
B
JK602 JST1223-00 1
ZD601
READY
0.47uF
0.47uF
0.47uF
0.47uF
0.47uF
0.47uF
C627
C690
L19
C9050 0 . 1 uF 16V
C9045 10uF 6.3V
PWM3
D23
C9016 0.1uF
VREFTOP
L611 M LB-201209-0120 P-N2
C618 4.7uF 10V
CVDD12_1
L18 M11
4
USB20-OC1
R627 1.5K
IC100 FLI10610H-AA
+1.26V_DOUGLAS
READY
C610
3
C9087 0 . 1 uF 16V
8
IC907
GND
AVSUP
1
C9082 0 . 1 uF 16V
L17
5
2WIRE_S2_SDA
R668
Q607 2SC305 2
Q608 2SC305 2
3
SCART2_RIN SCART2_LIN
SCART1_RIN SCART1_LIN
AM_AUDI O
1K SPDIF_OU T
+5V
2
C9077 0 . 1 uF 16V
3
AJ20
2WIRE_S2_SC L
C9072 0 . 1 uF 16V
1
AH20
USBPHY_VRES
C9068 0 . 1 uF 16V
L11
C28
2WIRE_S1_SC L
C9062 0 . 1 uF 16V
L12
1/10W 5%
C29
2WIRE_S1_SDA USBPHY_PADM
C9055 0 . 1 uF 16V
+1.8V_DOUGLAS_DDR
A29
USB_PWRE N
C9047 0 . 1 uF 16V
C9042 10uF 6.3V
P904 12505WS-08A0 0
2
B29
USBPHY_PADP
D13
CI_EN
F i b er O p t i c
C642 0.01uF 0.47uF
EJ_RST_N
2WIRE_S0_SC L
E11
R4
FIX_POLE
C629
2WIRE_M1_SCL
C9199 0.1uF 16V
R957 22
B28
USB_FLAG
C12
B13
R672
C620
TCK
2WIRE_M0_SDA
D12
R3
DTV/MNT_LOUT_SC2
C607
R945
A28
IRDATA
R5
LS_OUT_SW
C680 3.3uF 50V
0
AD16
LS_OUT_R
+8V_MSP
2WIRE_M1_SDA
AE1
LS_OUT_L
AUD_VREFN
C19
CHAPLIN_TX
+3.3V_STBY +3.3V_STBY
A27
EJ_DINT
A13
AUD_VCM
120-ohm
100R928
R944
2WIRE_M0_SCL
D11
AUD_VREFP
MLB-201209-0120P-N 2 L602
B12
SDA_HDMI_SW SCL_HDMI_SW DDC_SDA_4 DDC_SCL_4
SPDIF OPTIC JAC K OPTIO N +5V +5V
R625 24K
100R927
AR904 100 1/16W
R661 470K
4.7K
C647 6800pF
D_SUB_SC L
3
SIF
D20 E20
D_SUB_SD A TV_ROUT
R653
5V_ANN_MNT
C681 25V 10uF
0
B27
TDI TMS
D21
SDA2_3.3V SCL2_3.3 V SCL1_5V SDA1_5V
R655 470K
R669
C692 0.01uF
AR903 100 1/16W
C20
B26
TRST
LBADC_RETURN
TDO
R905 4.7K
DTV/MNT_ROUT
R628 62K
LBADC_IN6
F22
TV_LOUT
R651
R649 1K
UART1_CTS
+1.8V_DOUGLAS_DDR
CHAPLIN_RX
B20
LBADC_IN5
A24
R910 3.3K
LBADC_IN3
R912 4.7K
E
B
AC3
AUDO_I2SB_BCLK
2K
F20
5V_ANN_CTL
AE2
R667
UART1_RTS
LBADC_IN4
A25
D R911SCART2_I 3.3K
C659 0.1uF
2
Q606 2SC305 2 TV_LOUT_SC1
R631 3.9K
C696 47pF 50V
SHIELD_PLATE
8
R623 220K
MS_DAT_AMP
AD2
AUDO_MUTE
L4
R_SPRING
5
B25 B24
SCART1_ID
MUTE_LINE 1
UART1_TXD
PRTPWR 1
C602 0.1uF 16V
AUDO_I2SB_DAT1
AUDIN_SPDIF_IN
L5
4
+3.3V_CI +5V
Q609 RT1P141C-T112 3
LBADC_IN1
DEBUG_TX
A20
UART1_RXD LBADC_IN2
DEBUG_RX
B19
LBADC_GND
C25 C24
TV_ROUT R630 3.9K
TV_ROUT_SC 1
AUDO_I2SB_WCLK
L3
B_TERMINAL1
MS_WCLK_AMP
AC4
SIF_RTN
AUDIN_I2S_DAT
AA5
C601 47uF 16V
AUDO_I2SA_DAT0
AUDIN_I2S_WCLK
AA4
MS_DAT
AUD_MCLK1
SPDIF_OU T
MS_BCLK_AMP
AC5
AUDO_I2SA_WCLK
T_TERMINAL1
7A
2K
P_+12V
A19
UART0_RXD UART0_TXD
E23
AR901 1K 1/16W
R665
Q605 2SC305 2
R950 10K
MLB-201209-0120P-N 2 L601
+3.3V_CI
AB4
AUDO_I2SA_BCLK
AB5
R606 220
AD1
AUD_MCLK0
6A
T2
AUDO_SPDIF_OU T
TV_LOUT
E_SPRING
3
AUD_IN_R5
AC1
C619 47pF 50V READY
AUD_OUT_HP_L AUD_OUT_HP_R
PEJ024-0 1
T1
AUD_IN_R4
N1
C615 0.47uF
PC_AUDIO_L
AUD_OUT2_R
AUD_IN_L4
JK601
T4
AUD_IN_L3 AUD_IN_R3
SW_ROUT
R963 100
N3
C614 0.47uF
PC Sound
SW_LOUT
READY
C613 0.47uF
AUD_OUT2_L
AUD_IN_R2
0
1/16W 4.7K AR902
M5
R621
T3
LBADC_33
1/10W 5%
N5
C612 0.47uF
R2
D24 C9010 0.1uF
R960 100
SIDE_LIN SIDE_RIN
C611 0.47uF
AUD_OUT1_R
TV_L/ROUT SCART1 B u f f er MU TE Ctrl
R954 1K
COMP_LIN
AUD_OUT1_L
AUD_IN_R1 AUD_IN_L2
M2
COMP_RIN
AUD_IN_L1
0
5% 1/10W R951 4.7K
M1
R620
R697 6.8K
M4
R1
R698 6.8K
M3
READY
IC100 FLI10610H-AA
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
F l a s h & CI
SHIELD
UCOM_TX
External Jack Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
LVTX_EVN_CH5P_DISPH S
TXCLK_SW+
B10 A9
TX0_SWTX0_SW+
B9
TX1_SW-
A8
TX1_SW+
B8
TX2_SW-
A7
TX2_SW+
B7 B11
HP_DET_S/W_3
C11
HP_DET_S/W_1
A11 A6 TXCLK_BUF-
B6
TXCLK_BUF+
A5
TX0_BUF-
B5
TX0_BUF+
A4
TX1_BUF-
B4
TX1_BUF+
A3
TX2_BUF-
B3
TX2_BUF+ +3.3V_HDMI_DOUGLAS R523
R526
1
249 1%
D9
ARXCP
VDAC_COMP VDAC_BU_N
ARX0M
VDAC_RV_N
ARX0P
VDAC_GY_YC_N
ARX1M
VDAC_RSET
ARX1P ARX2M
VDAC_BU_P_1
ARX2P
VDAC_BU_P_2
4
VDAC_GY_YC_P
6
AH3 R555 1.8K
3 5
12
11
RX0-
14
13
RX1-
RX2+
16
15
RX2-
CK+_HDMI2 CK-_HDMI2 DDC_SCL_2 DDC_SDA_2
R299 1 C205
HDMI_SW_EQ
R268
18
17
RXCLK-
RX3+
+3.3V_CI
RX4+
0
R537 R543
20
15
R589 SCL2_3.3 V
8 7 6 5
RX34
22
21
24
23
26
25
3
RX4-
2
R538
0
R544
0
1
PC_SER_CL K ROM_DL R587 HD
100
R590 10K HD
MODULE_SER_CL K DISP_E N
28
27
30
29
CH1E-
CH2E+
32
31
CH2E-
CKE+
34
33
CKE-
CH3E+
36
35
CH3E-
CH4E+
38
37
40
39
BRX2M
11 10 9
CH1E+
BRX0P
R527 FHD
0
DDC_SDA_1 DDC_SCL_ 1
JK204
0 R262 0 R259
HDMI_SEL2 HDMI_SEL1
CH4E-
A1 A2
1
8
2
7
3
6
4
5
20 21
D1_GND
D2-
D2-_HDMI1
D2_GND
A2
R216 56K
D2+
GND
GND QJ41193-F EE2-7F
C202 0.1uF 16V R204 1K
22
18
R283 22 GND R288 22
1
8
2
7
3
6
4
5
11 10 9
4
5
3
4
A
10K R591
3
C550 0.1uF 50V
2 1 20 21
A2
A1
VCC WP
R238 0
KDS184 D204
R246 18K
R242 18K
SCL SDA
DDC_SDA_1
C217 0.1uF
R218 0 READY
5V_HDMI_2P_+5V CEC_0
IC204 AT24C02BN-10SU-1. 8
SB D
A0
BSS83 Q201
A1
G A2
1
8
2
7
3
6
4
5
VCC WP
R239 0
KDS184 D205
R247 18K
R243 18K
SCL
HP_DET_S/W_ 2
DDC_SCL_ 2 GND
SDA DDC_SDA_2
DDC_SDA_2 DDC_SCL_2
5V_HDMI_4P_+5V
C218 0.1uF
HDMI 5V Detection
0
CEC_REMOTE CK-_HDMI2
12
5
2
SDA
R233 47K
CEC_REMOT E
6
B0
SCL
DDC_SCL_ 1 GND
D2+_HDMI1
GND
7
GND
R245 18K
R241 18K
5V_HDMI_1P_+5V
A0 A1
16
DTV/MNT_SWITCH
KDS184 D203
R237 0
IC203 AT24C02BN-10SU-1. 8
D1+_HDMI1
10K
+5V
WP
DDC_SDA_3
D1+
17
P502 FHD SMW200-26 C
C216 0.1uF
VCC
DDC_SCL_ 3 GND
D1-_HDMI1
19
DISP_E N R529
A0
+3.3V_STBY
D0+_HDMI1
D1-
JK202
100
IC202 AT24C02BN-10SU-1. 8
R264 4.7K SDA_HDMI_SW SCL_HDMI_SW
D0-_HDMI1
D0+
8
SELECT +5V VCC
GND
CK+_HDMI1
D0_GND
13
6
TX2_BUF+
DATA2 +
DC1R019NB H
14
1
DATA2_SHIELD
CK-_HDMI1
D0-
15
B1
TX2_BUF-
DATA2 -
CK+
CH0E-
FHD
IC502 NLASB3157DFT2 G
TX1_BUF+
DATA1 +
CEC_REMOTE
5V_HDMI_2
R528 FHD
REXT
R552 75 1%
TX1_BUF-
DATA1 DATA1_SHIELD
14 13
CH0E+
BRXCM
R285 22 GND R284 22
16
100
19
ROM_DL
R551 75 1%
R207 47K
C204 0.1uF
C212 0.1uF
C208 0.1uF
C207 0.1uF
C209 0.1uF
C206 0.1uF
C210 0.1uF
1
0
32
31
4 3
S1
29
30
HPD_SINK
GND_5
SCL_SINK
SDA_SINK
28
S2
5
2
READY
C
A1
A2 KDS184 D207
0.1uF
C211
0.1uF HPD2
VDD 49
SDA2
SCL2
B21 53
52
51 50
B22
VCC_7
A21 54
56
55
GND_7
A23
B24
A22 57
58
HPD3
VCC_8
A24
B23 59
60
61
62
63
64
EQ
33
HP_DET_S/W_1
12
RXCLK+
HDMI_CEC
BRX2P
17
RX1+
0
BRX1P
18
RX0+
PC_SER_DAT A
BRX1M
19
7
MODULE_SER_DATA
BRX0M
HPD1
34
C201 0.1uF 16V R203 1K
22
9
1%
BRXCP
35
R261 4.7K
10
R588
C523 0.1uF
AH2
AJ3
36
15 16
1
8 SDA2_3.3 V
AH1
HDMI_B_HPD
13 14
VSADJ
A34
6
D0+_HDMI1 D0-_HDMI1 CK+_HDMI1 CK-_HDMI1 DDC_SCL_ 1 DDC_SDA_1
TX0_BUF+
DATA0 +
5V_HDMI_3P_+5V
CH4E+
AG24
HDMI_A_HPD
SCL1
TXCLK_BUF+
DATA0_SHIELD
+3.3V_CI
2
AG25
AJ2
B11
37
5V_HDMI_1
CH4E-
AG21
AJ1
A11
38
CH3E+
AF21
AH4
VCC_5
39
7
C
AJ21
AG5
QJ41193-F EE2-7F
CH3E-
SCART_FB
ARXCM
GND
B12
40
CKE+
AH21
R593 1K
A10
JK201
A12
41
GND_3
CKE-
AG22
100 TXCLK_SW-
D2-_HDMI3 D2+_HDMI3
42
SDA1
B34
8
D1+_HDMI1 D1-_HDMI1
A2
LVTX_EVN_CH5N_DISPVS
12
GND_6
A1
LVTX_EVN_CH4P_DISP 0 VOUT2
10 11
A32
B13
43
TX0_BUF-
DATA0 -
C
LVTX_EVN_CH4N_DISP1
AV S
B33 A33 VCC_2
A13
44
CLK+
A2
LVTX_EVN_CH3P_DISP 4
AHS_ACS
CH2E+
AF22
8 9
D1-_HDMI3 D1+_HDMI3
VCC_6
45
CLK_SHIELD
A1
G6
LVTX_EVN_CH3N_DISP5
7
GND_2
D2+_HDMI3
46
TXCLK_BUF-
CLK-
C
22
LVTX_EVN_CLKP_DISP6
SVN
D0-_HDMI3 D0+_HDMI3
B32
D2-_HDMI3
IC201 TMDS351PAG
DDC_SCL_ 4
CEC
5V_HDMI_2
5V_HDMI_3
CK+
IC205 AT24C02BN-10SU-1. 8
CK+_HDMI2 D0D0-_HDMI2 D0_GND
R219 10K
R212 10K
A0
D0+
HDMI3_5V_DET
D0+_HDMI2 D1D1-_HDMI2 D1_GND
R213 33K
R289
R524
SCART1_F B
LVTX_EVN_CLKN_DISP7
SV4P
P501 HD SMW200-40 C
CH2E-
AJ22
5
9
DDC_SDA_4
22
SCL NC
HDMI2_5V_DET
A1
R220 33K
A2
D1+
1
8
2
7
3
6
4
5
A1
J4
LVTX_EVN_CH2P_DISP 8
SV3P
AH22
3 4 6
GND
21
PANNEL WAFER
CH1E+
B31
10
D2+_HDMI1 D2-_HDMI1
HP_DET_S/W_4
R23 0 GND 229 R22
SDA
VCC WP
R240 0
R244 18K
SCL
D1+_HDMI2 D2-_HDMI2
KDS184 D206
R248 18K DDC_SCL_ 4
D2D2_GND
A2
H6
V_SYNC_P C
LVTX_EVN_CH2N_DISP9
SV2P
CH1E-
AG23
16
C220 0.1uF 16V R232 1K
HPD +5V_POWE R DDC/CEC_GND
C
J6
H_SYNC_P C
LVTX_EVN_CH1P_DISP1 0
AF23
GND_1 A31
D2+ GND
20
B14
MMBD301LT1G D202 30V
J3 K2
LVTX_EVN_CH1N_DISP11
D2_GND
1
CH0E+
A14
47
VCC_1
D1+_HDMI3
D2-
2
CH0E-
AJ23
48
2
CK-_HDMI3 CK+_HDMI3
D1+
4
AH23
17
11
1
26
C520 0.1uF
LVTX_EVN_CH0P_DISP1 2
18
13
SCL3
27
C519 0.1uF
LVTX_EVN_CH0N_DISP13
19
12
SDA3
25
R521 22 R522 56
R_GRA
D1-_HDMI3
D1_GND
5
DDC_SDA_3 DDC_SCL_ 3
Z1
TU_MAIN SCART2_VIN
D1-
6
AG28
D0+_HDMI3
Y1
H3
D0+
RX4+
AG29
D0-_HDMI3
D0_GND
7
VCC_4
C518 0.1uF
8
C213 0.1uF 16V
20
15
TXCLK_SW+ TXCLK_SW-
R520 22
SIDE_YIN/SIDE_VIN
RX4-
JACK_GND
14
CK+_HDMI3
D0-
3
C3P CN SV1P
9
5V_HDMI_4 +3.3V_CI
CK-_HDMI3
24
F3
RX3+
CEC_REMOTE
CK+
23
C517 0.1uF
11 10
Z2
R519 22
LVTX_ODD_CH5P_DISPD E
AJ24
12
RX3-
Y2
D3
C2P
AH24
13
RXCLK+
TX0_SW+ TX0_SW-
H2
AJ25
RXCLK-
READY
K1
AH25
READY
C501 0.1uF C515 0.1uF
AJ26
21
R517 56
AH26
19
R503 22 VGA_R
14
17
H1
COMP_P r
LVTX_ODD_CH5N_DISPC LK
RX2+
22
C513 0.1uF
SCART1_ B
LVTX_ODD_CH4P_DISP 2 C1P
DDC_SCL_ 3
20
R515 22
E1
DDC_SDA_3
18
C512 0.1uF
LVTX_ODD_CH4N_DISP3
BN
R287 22
15
Z3
C1 R514 22
LVTX_ODD_CH3P_DISP1 4
G_GRA
R286 22 GND
16
Z4
F2
C510 0.1uF
LVTX_ODD_CH3N_DISP15
17
RX2-
Y3
R512 56
J1
LVTX_ODD_CLKP_DISP16
B3P
18
RX1+
Y4
C506 0.1uF
LVTX_ODD_CLKN_DISP17
B2P
AJ27
VCC_3
R508 22 VGA_G
B1P
AH27
GND_4
G1
LVTX_ODD_CH2P_DISP1 8
RX1-
AJ28
TX1_SW+ TX1_SW-
D1
C508 0.1uF
LVTX_ODD_CH1P_DISP2 0 LVTX_ODD_CH2N_DISP19
+5V
HP_DET_S/W_3
TX2_SW+ TX2_SW-
C507 0.1uF
R510 22 COMP_P b
LVTX_ODD_CH1N_DISP21
AN
19
R217 0
B1 R509 22 SCART1_ G
A3P B_GRA
C203 0.1uF 16V R202 1K
22
RX0+
AH28
R208 47K
J2 D2
RX0-
AJ29
D201
C511 0.1uF C505 0.1uF
AH29
R201 4.7K
R507 56
LVTX_ODD_CH0P_DISP2 2
READY
R513 22 VGA_B
LVTX_ODD_CH0N_DISP23
A2P
R205 47K
COMP_Y
A1P
READY
G2
R206 47K
E2
C503 0.1uF
READY
C502 0.1uF
R505 22
1K R592
C2 R504 22 SCART1_ R
D1+_HDMI2 D1-_HDMI2
D2+_HDMI2 D2-_HDMI2
5V_HDMI_3
D0+_HDMI2 D0-_HDMI2
SIDE HDMI
IC100 FLI10610H-AA
5V_HDMI_1
GND
5V_HDMI_4
SDA DDC_SDA_4
D2+ D2+_HDMI2 GND
R231 10K
R214 10K
GND
HDMI1_5V_DET R215 33K
DTV/MNT_VOUT
HDMI4_5V_DET R222 33K
GND
C219 0.1uF
JK203
GND QJ41193-F EE2-7F
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
LVDS, AFE
HDMI
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
PRINTED CIRCUIT BOARD MAIN(TOP)
Copyright©2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
MAIN(BOTTOM) Control B/D(TOP)
PREAMP B/D(TOP)
Control B/D(BOTTOM)
PREAMP B/D(BOTTOM)
LGE Internal Use Only
P/NO : MFL41181004
Mar., 2008 Printed in Korea