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May 2023 COT’S PICKS

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COT’S PICKS

COT’S PICKS

Pasternack Releases New Line of PushButton Attenuators

New Push-Button Attenuators Address Wide Range of Applications

Pasternack has just introduced a new series of push-button attenuators to address multiple applications, including test instrumentation and cellular, wireless, and satellite communications.

Pasternack’s new line of continuously variable attenuators features even greater maximum power ratings of 5 and 10 watts, an operating frequency range of up to 18 GHz, and attenuation levels of up to 50 dB.

The new variable phase shifters provide frequency ranges at 2 GHz, 4 GHz, and 8 GHz, along with a 100-watt power rating. These variable phase shifters also have adjustable phases at 60 degrees/ GHz, 90 degrees/GHz, and 180 degrees/GHz.

The step attenuators are engineered for supe- rior R.F. performance with frequency ranges of 6 GHz, 8 GHz, and 18 GHz. They feature attenuation levels including 10, 60, 70, and 99 dB, and attenuation steps at 1 dB and 10 dB depending on the model.

Pasternack pasternack.com

Rapid Silicon Launches Vega eFPGA I.P. for Programmable Solutions

Rapid Silicon, a provider of A.I. and intelligent edge-focused FPGAs based on open-source technology, announced its Vega eFPGA I.P today. The Vega eFPGA I.P. is an embeddable standalone FPGA IP core, which is flexible, powerful, and efficient to enable a programmable solution to your SoC. Its customizable and scalable architecture allows the design of custom eFPGA I.P. from 1.5K to 100K+ Logic Cells, configurable BRAM, and DSP MAC tiles. The eFPGA I.P. also comes with I.O. tiles covering all sides of the I.P. for easy SoC integration. The Vega IP also includes an FPGA configuration block for easy eFPGA configuration and can be configured with different combinations of CLB, BRAM, and DSP tiles.

“We are thrilled to launch our Vega eFPGA I.P.,”; said Naveed Sherwani, CEO of Rapid Silicon. Customers can tailor the Vega IP to meet their needs with its highly configurable architecture. The Raptor Design Suite makes it easy for customers to integrate the I.P. into their SoCs, reducing time-to-market and development costs. We are excited to see the innovative solutions our customers will create with the Vega eFPGA I.P.

The Vega eFPGA I.P. is built based on foundry-specific standard cells, which makes it easier to port to different foundry and technology nodes. It is easy to embed into an SoC and comes with configurable input/output, clocking, and test/ DFT pins. Vega IP has soft FPGA configuration logic and can be integrated with SoC using JTAG or APB interface. Vega IP has an internal power grid that can be connected to the customer’s digital SoC power grid. It is highly configurable and can be ported easily to other technology nodes.

The Vega eFPGA I.P. license comes with Raptor Design Suite - the industry's first and only commercially available open-source toolchain for FPGA. It has a complete FPGA design tool chain, including Simulation, Synthesis, Placement, Routing, Bitstream Generation & Configuration. Raptor has integrated LiteX and Migen IP management integration for easier I.P.

Integration - Our design suite includes Rapid Power Estimator for I.P. power estimation

Rapid Silicon rapidsilicon.com

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