Siemens PLM Software
Accelerating innovation in semiconductor development A Siemens and Methodics perspective
Rick Stanton Semiconductor Practice Lead Siemens Kyle Fraunfelter Solutions Consultant Siemens
Vishal Moondhra Vice President Product and Applications Methodics Michael Munsey Vice President Business Development and Strategic Accounts Methodics
www.siemens.com/plm
White paper | Accelerating innovation in semiconductor development
Contents
Introduction.............................................................. 3 Product lifecycle management................................. 5 IP lifecycle management........................................... 7 Challenges due to siloed information....................... 8 Integrating IP and product lifecycles........................ 9 The digital thread in the enterprise........................ 10 Closed-loop verification.......................................... 11 Closed-loop requirements and verification............. 12 Handling upcoming product complexity................. 14 Conclusion.............................................................. 15
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White paper | Accelerating innovation in semiconductor development
Introduction The complexity of today’s semiconductor devices rivals the complexities of systems design in other industries. Coupled with the pace of innovation, accelerated lifecycles, and increasing design costs, semiconductor companies must continue to improve efficiencies across all aspects of the product lifecycle in order to maintain or grow operating margins and market position.
other business systems to access the most current and relevant data. Traditionally, decisions in many companies are made using non-current data; whether it be minutes, hours, days or weeks old. PLM systems allow information to be made available immediately and consumed in formats that make sense for each stakeholder.
Systems design has evolved over the past decade. The semiconductor industry can learn a lot from the evolution of systems design. One of the advancements of the past two decades has been the adoption of product lifecycle management (PLM) solutions to manage systems designs from ideation through end of life. PLM systems are used by the automobile industry, aerospace industry, industrial equipment segment, and consumer product companies and have been recently adopted by other industries like fashion, retail and financial services.
The issue for semiconductor companies is that the industry developed along its own path. Many of the design tools and methodologies needed for semiconductor design and development are unique to the industry. PLM systems traditionally came from mechanical CAD companies and were originally intended to combine part management and design process information. Semiconductor design traditionally operates in a different and unique paradigm that may not fit within a mechanical CAD-driven environment. But this is rapidly changing. The semiconductor industry is adopting aspects of systems design into its workflows and is more focused than ever on business process efficiency. Moving beyond using PLM as just a repository for product bills of materials (BOM), semiconductor companies have become a high-growth market for PLM.
PLM systems help businesses run their entire operation, by creating an environment where all product data and metadata can be organized, accessed and analyzed. The collaborative platform helps to improve product execution by tying all this information together and allowing
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White paper | Accelerating innovation in semiconductor development
Semiconductor design is a highly dynamic, iterative process that requires instantaneous access to quickly evolving data. This data needs to be rapidly assembled and integrated into highly specialized design and verification tools. In order to meet time-to-market demands and confront the exponentially growing costs of semiconductor fabrication, companies have adopted intellectual property (IP) re-use to streamline semiconductor development. In this context, IP refers to design blocks that provide specific functions to be used within the semiconductor product. These are typically proven in production, are well-documented and have been preverified to match the specification. Companies can no longer afford to build designs from scratch. By assembling designs made up of existing IP, they can reduce the time of development, and maximize the investment in the development of these IP blocks. To enable an IP-driven design methodology, companies must have a best-in-class IP management system that understands the highly dynamic semiconductor development environment. Information describing the state of the IP, such as where it is used and when it is updated, must be maintained. Metadata related to the IP, such as verification information, electrical properties and requirements, needs to be captured to effectively maintain the IP catalog. This system allows individual design teams to collaborate across the enterprise through the use of enterprise design assets. Systems design techniques are now part of the semiconductor product design process. Semiconductor companies can now benefit from PLM systems. The ideal solution is for a best-in-class PLM solution to interface with a best-in-class semiconductor IP management solution. By integrating the two solutions, semiconductor companies reap the benefits of streamlined and cost-efficient business processes and optimized semiconductor design methodologies. All aspects of the product lifecycle can be planned, decision-makers have improved visibility for decision support, and all stakeholders can be prepared to execute their parts of the process with minimized wait time.
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For the first time, a “digital thread� can be created that starts during product ideation and definition of requirements, and traces all the way into the semiconductor design process. It can then continue into manufacturing, sales and support, creating an environment where all the important information is interlinked and tracked. Requirements from the product ideation process can be linked to semiconductor IP, creating a traceable link that shows the specific product requirements that are met by that IP. During semiconductor verification, functional coverage results at the IP level can also be tracked and related back to the IP. In this way, best-in-class PLM and IP management systems can be combined to provide needed traceability for safety critical systems, like automotive, and be used to adhere to safety standards like ISO 26262. The IP management solution can also keep track of the IP bill of information (BOI), which contains all IP in a given design. This BOI can be fed forward into the PLM system, ultimately to tie the engineering bill of materials (BOM) and manufacturing BOM to the dynamic semiconductor design process. In this way, manufacturing, legal, contracts, compliance, and sales and support have a view into what happened during design, and the other processes used by various departments always have the latest information. What follows in this white paper is how a semiconductor company can benefit from using best-in-class PLM solutions integrated with best-in-class IP management solutions to tie product, business, development, manufacturing and support processes together to enable efficiencies in semiconductor design and development to drastically reduce engineering costs and improve time to market for new products.
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White paper | Accelerating innovation in semiconductor development
Product lifecycle management Semiconductor products are becoming increasingly complex, requiring tighter integration of the multiple engineering disciplines – analog, digital, embedded software and packaging. Product lifecycles continue to shorten compared to development cycles, narrowing the window of opportunity for market success. There is increasing pressure on requirements-to-prototype and time-to-yield cycle times. This means: • Capabilities to rapidly source, qualify, verify and integrate IP into designs will differentiate companies. • Increasing the use of methods such as multi-program mask sets and IP/sub-chip re-use • Numerous parallel research and development (R&D) investments will be required and must be actively managed to feed the new product pipeline.
• Actively managing the new product project portfolio within the constraints of a finite set of resources is critical to getting new, profitable products out the door. • Management and integration of multiple design disciplines in parallel (analog, digital, software, hardware) • Increased integrated device manufacturer (IDM) participation and design collaboration with customers in both application/design definition and downstream board and box integration • Significantly increased requirements to identify and manage multi-sourced IP
New product introduction
Dashboard and analytics
Chip design
Governance and compliance
Document management
Integration with other systems
Requirements management
Semiconductor design and manufacturing
Cost management
IP management
Total quality management Text data management
Verification
BOI management
Tapeout process
Semiconductor design and manufacturing building blocks for PLM
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White paper | Accelerating innovation in semiconductor development
Furthermore: • Effective hand-offs to foundries, sub-cons and remote design centers become increasingly critical to time-to-yield/volume. • New capabilities will be required to manage geographically dispersed teams as low-cost regions are exploited for development (for example, India, China). • New access and security protocols will be required to address intercompany and cross-enterprise collaboration to address potential International Traffic in Arms Regulations (ITAR) issues. Siemens is helping customers accelerate time to market for complex semiconductor products across the extended, disaggregated semiconductor design chain, while significantly lowering development and product costs by providing a unique, end-to-end solution for collaborative product lifecycle management that connects the semiconductor and IP designers to the extended enterprise. With a continued stream of investment, Siemens is able to offer capabilities for all of the stakeholders across the product lifecycle to help in innovation and execution.
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White paper | Accelerating innovation in semiconductor development
IP lifecycle management An IP lifecycle management system is used by design teams and managers to create, discover and track the usage of IP blocks within an enterprise. A well-designed system incorporates a dynamic IP catalog that allows users to easily find the exact IPs they need to complete their designs, and allows IP creators to easily build, update and release versions of IPs. Percipient™ from Methodics is an IP lifecycle management platform that works both in the designer’s environment and in the higher-level decision making process to facilitate IP discovery and re-use across the company. It easily integrates with existing processes and systems like PLM, bug trackers and software configuration management (SCM) systems, and provides a critical link in the entire design chain.
• Manage IP hierarchy to allow users to build out dependent subsystems • Enable users to select and use IPs that they have access to • Build project workspaces to include all IPs and their dependencies as selected for the project in the designer’s native work environment • Optionally provide IP caches to accelerate IP distribution • Track IP and IP version usage across the enterprise • Integrate with other sources of IP data like bugs, requirements, test and verification databases • Integrate with the larger company-wide PLM system to provide end-to-end transparency
Key roles of the IP lifecycle management solution are: • Fine-grained, searchable, dynamic IP catalog listing all available IPs • Manage IP versioning to handle IP evolution
PLM Dynamic catalog
User-defined attributes
IP lifecycle management
SCM (SVN, P4…)
Full traceability workspace management
Verification databases Bugs
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White paper | Accelerating innovation in semiconductor development
Challenges due to siloed information In a typical enterprise environment, there are many points of data entry where visibility is compromised. When trying to trace back through these systems, it is often impossible to understand what data was handed across these silos. For example, if a manufacturing process needs to determine exactly which version of an IP was used in a particular product run, this information may not be easily available because the IP contents are opaque in the manufacturing modules.
These challenges result in teams wasting hours and weeks trying to reconstruct information from different design processes, slowing down the decision-making process and responsiveness, and may even lead to critical mistakes with direct impact on the product and market space.
Other examples of this type of information loss include tracing requirements to verification plans to actual verification results, or tracking the actual IP and IP contents used in an SOC BOM against what was recorded in some disconnected system.
Product engineer Tapeout
Architects Requirements technology selection variants
Sourcing/procurement Who owes us? Whom do we owe?
IP management
Design EDA PDK Flows Integration Configuration management, releases, validation‌
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Compliance Security, export controls
Enterprise PLM
Operations Yield, optimization, manufacturing execution, quality
Legal/contracts Effectivity dates, restrictions, allowed usage, T&C
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White paper | Accelerating innovation in semiconductor development
Integrating IP and product lifecycles Integrated IP and PLM solutions eliminate non-value added activities when making the best technical and business decision for the product or program by seamlessly having all the necessary information from a single user interface for all enterprise stakeholders throughout the product’s lifecycle.
Architects Requirements technology selection variants
Design EDA PDK Flows
Integration Configuration management, releases, validation…
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The IP and product lifecycle management integration allows users to connect all processes from ideation, requirements, planning, design, manufacturing and test − and more importantly, all the way back via a single thread, closing the loop. In this closed-loop system, there is seamless hand-off and full transparency of information from end to end.
Product engineer Tapeout Sourcing/procurement Who owes us? Whom do we owe?
IP management
Enterprise PLM
Compliance Security, export controls
Operations Yield, optimization, manufacturing execution, quality
Legal/contracts Effectivity dates, restrictions, allowed usage, T&C
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White paper | Accelerating innovation in semiconductor development
The digital thread in the enterprise Most companies believe that once they have completed digitalizing all their business processes they’ve completed their digitalization journey. However, the digitalization journey is not complete until the threading of information through the whole value chain is complete, from idea all the way through the realization of that
idea to the final utilization of that product. This is called the digital thread. The digital thread is the connected chain of information connecting all participants with the applications and information they need to design, build and support next-generation smart products.
Threading the IC design lifecycle Specification
Behavioral
NPI project management and dashboard
VHDL
IP management and re-use
Functional verification
Synthesis
Timing verification
DFT insertion
P&R
Verification
Tapeout
Integrated verification and validation
Product design kit management
Tapeout management
Design and engineering collaboration
Closed-loop quality management
Improve NPI execution and visibility
Improve productivity and compliance
Reduce defects and escapes
Improve wafer manufacturability
Improve design-tomask quality
Internal and external collaboration
Enable continuous improvement
Provide a real-time objective dashboard for project/program status
Enable search, catalog, upload/ download, security and re-use of silicon IP
Enable end-to-end functional verification and physical test validation
Ensure compliance of design to fab manufacturability rules
Enable a clear sign-off process from design to mask
Enable collaboration across the entire semiconductor ecosystem
Provide PLM-MES integrated solution for closed-loop quality management
The digital thread As companies are completing the digitalization of the enterprise, it becomes critical to stitch the systems together in the form of a digital thread.
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White paper | Accelerating innovation in semiconductor development
Closed-loop verification Using Siemens’ closed-loop verification methodology and enabling solutions, design and verification engineers and managers have a firm grasp on the verification process. In a typical flow without this methodology, a verification plan was created in ad-hoc tools (Excel®, Word, XML, etc.) and imported into the simulation tool. As the verification process got underway, the synchronization to the original plan was done manually at best. Further, you needed help understanding whether the original requirements had been verified at all. The new methodology takes away the guessing game. In one document you describe the verification plan, check the latest verification status, know when you are done and what has been completed. This is a huge improvement over past practices that fell short of accomplishing full functional verification. As chip complexity continues the growth trends, the need to make sure that teams and resources are working towards the original requirements becomes critical.
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Requirement traceability is not just something that must be achieved in order to get the ISO 26262 certification; it is becoming a must-have methodology to get to market fast while using optimal resources. It shouldn’t be considered a burden, but a means to focus the team on the real objectives and get a clear understanding of where it is compared to its design verification goals. • Challenges − requirements and verification plans are not connected to actual design activity. Manual processes needed to update plans and requirements as design progresses. • Solution − integration that allows IP design flow to automatically update results from verification runs and other design activity into the PLM system without manual intervention. Status is always current and visible.
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White paper | Accelerating innovation in semiconductor development
Closed-loop requirements and verification To make effective decisions, stakeholders must have on-demand access to all the linked program data. Most importantly, such a system maintains the digital thread and enables answering the “why” question. Knowing the answer to the “why” question is critical throughout the thousands of decisions made during the product’s design, manufacture and service. Having all the artifacts and information that informed the initial verification process ensures that when a question arises, the answer is easily found and traced through each part of the process. Anyone can review how the original requirement was met and the verification completed. What was the analysis? What thinking drove that analysis? What tests were run? Why this set of requirements?
With total integration of the product’s lifecycle, knowledge is retained and easily available, ensuring that full system program verification is completed cost-effectively and on schedule, and that any problems at any time can be solved quickly. Siemens’ closed-loop verification capabilities provide that central location where all requirements, verification plans and all associated verification progress is kept in an easy-to-access synchronized state, causing the least burden on the actual verification process, the verification environment, and on the engineers. It provides a methodology that is not seen by the design and verification teams to be a chore, but rather something that efficiently drives the process forward and helps in achieving the design verification objectives.
Without such traceability, locating the analysis behind a decision, or the tests that were run and their results, costs time and money. In many cases, the knowledge is either lost or so difficult to find that tests must be rerun and re-analyzed.
Pre-silicon verification
Post-silicon validation End-to-end traceability Model verification
Spec
Block verification
Block design IP design Chip design
Wafer manufacturing
IP verification Chip verification
Wafer test/CP
Packaging
Drive tests
Assembly
Packaging test Final test
Test results The digitalization platform supports the end-to-end process for full hierarchical verification and validation processes, and closes the loop between pre-silicon verification and post-silicon validation.
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White paper | Accelerating innovation in semiconductor development
IP “leakage” and prevention Most global teams face unique challenges when it comes to sharing and working on common designs. Often, IPs have global restrictions − certain IPs cannot be used in certain geographies due to contract obligations, ITAR or security concerns. These are generally out of the hands of individual designers, who simply want to get their work done with as little overhead as possible. It is impractical to assume that each designer on a project would have the bandwidth and knowledge to assess whether a particular IP should be shared in a specific part of the world. In addition, restricted IP content could very well be buried deep inside the hierarchy of a design. Thus, even if some IP was not meant to be shared with a team, it could quite easily end up being available in the restricted area because the IP hierarchy was flattened and the entire IP was delivered as an opaque tarball. This can result in IP “leakage” − inadvertent delivery of restricted IP content. A robust, well-designed IP lifecycle management system preserves IP hierarchy at all times − at creation, during development, and at consumption − so that at each point in the workflow, it is abundantly clear exactly which IP is being used by which user in which workspace. This helps prevent IP leakage:
Sub1
Leaf1
• IP level permissions are maintained inside the IP hierarchy at all times. Hierarchical IPs built into workspaces do not include IPs that the user does not have permissions to, even if these IPs are part of the hierarchy. • The missing IPs are never mentioned explicitly; the only warnings that are issued are that the hierarchy view or workspace is incomplete. • With built-in traceability, it is easy to audit and generate quick reports to ensure that each IP’s exact use both within hierarchies and in actual end-user workspaces can always be visible. Once the IP management tool can guarantee that there is no IP leakage, it is of critical importance that the overall system have a simple and convenient way to actually implement the restrictions based on contracts or regulations. These regulations and contracts are managed inside the PLM system. By integrating the IP lifecycle management system and PLM, customers can achieve best-in-class IP management, prevent inadvertent leaks of IP content, and build a unified system that works with real data across the enterprise with full visibility at all times.
Geo1
Geo2
Top
Top
Sub2
Restricted IP
Sub1
Leaf1
Sub2
Restricted IP
Restricted IP should not be visible in Geo2, even if it is deep inside the IP hierarchy.
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White paper | Accelerating innovation in semiconductor development
Handling upcoming product complexity Siemens’ configuration management of complex products covers the detailed definition of products (IC, SoC, etc.) by managing the composition (BOM) and all the related information (BOI), starting from a system specification. Complex BOM structures such as stacked die packaging information are managed in configuration, and all related information is captured or referenced inside Siemens solutions for easy traversal of all product information such as requirements, test plans, simulation results, business documentation and process design kits (PDKs).
Value • Obtain full traceability of data and documents for a product/project • Facilitate ISO 26262 audit and avoid errors by managing any data/document in configuration (revision and status) and with access control • Accelerate NPI process by providing a single source of truth • Each role sees what they need to see
Benefits • Organize information and data into a BOI • BOI explorer • Flexible data model allowing any file to be managed • BOM compare, redlining and baseline • View modifications applied by changes • Vendor management for approved vendor/manufacturing list Semiconductor BOI (design BOI / software BOI / process BOI Top level BOI (product) BOI (product)
Product artifacts
Product component
Product requirement Product specification
BOI (software)
ALM:
Application Lifecycle Management
Software requirement Source code
BOI (design)
IP: Intellectual property
Verification rule
Product parts
Execution file
IP deliverable
Software specification
Software specification
IC and packaging
Hardware specification
Software document
IC design
Firmware specification
Business artifacts
IP (IP block)
Business plans and documents
Process design kit
BOI (process) Technology development
ManufacRun decks turing Process design kit technology and process Backend assembly and packaging
Manufacturing document
Verification
Design documents
Design specifications
Process specification Process plans
Test plans Test
Final testing and binning
End-to-end product configuration.
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White paper | Accelerating innovation in semiconductor development
Conclusion Semiconductor companies can experience the benefits of modern product lifecycle solutions, but they must be tailored to the semiconductor design and development process. Modern PLM solutions can improve the business efficiency of semiconductor companies, but bestin-class solutions must be employed in the semiconductor design space to ensure the continuity of the digital thread. By integrating a best–in-class IP lifecycle management solution, semiconductor design teams can continue to work in their highly dynamic environment, unencumbered by solutions not tailored to the semiconductor design environment. In this way, semiconductor design teams can experience time-to-market advances while working within their native methodologies.
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Likewise, the PLM system will benefit from the continuity of the digital thread provided by the IP lifecycle management system, and can leverage information stored in the semiconductor design IP lifecycle management solution. Other business processes, like product ideation, manufacturing, sales and support, workflow automation and contract management can benefit from real-time access of the semiconductor bill of information, to drive downstream BOM processes. With the integration of best-in-class solutions, semiconductor companies can improve their time to market, reduce development and engineering costs and streamline both design and business processes within their organizations.
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About Siemens PLM Software Siemens PLM Software, a business unit of the Siemens Digital Factory Division, is a leading global provider of software solutions to drive the digital transformation of industry, creating new opportunities for manufacturers to realize innovation. With headquarters in Plano, Texas, and over 140,000 customers worldwide, Siemens PLM Software works with companies of all sizes to transform the way ideas come to life, the way products are realized, and the way products and assets in operation are used and understood. For more information on Siemens PLM Software products and services, visit www.siemens.com/plm.
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