5.EEE.Design datapath.FULL

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International Journal of Electrical and Electronics Engineering Research (IJEEER) ISSN 2250-155X Vol. 2 Issue 4 Dec - 2012 33-40 Š TJPRC Pvt. Ltd.,

DESIGN OF DATA PATH CONTROLLER IN AN INTERCONNECTION NETWORK 1

SHALU MALIK, 2NEHA ARORA, 3PRASHANT SINGH & 4NARENDRA BAHADUR SINGH 4

Chief Scientist

MEMS, MS & RF ICS Design Central Electronics Engineering Research Institute (CSIR-CEERI), Pilani, India 333031. 1,2,3

M. Tech. (VLSI Design) Trainees at CSIR-CEERI

ABSTRACT The paper presents the modeling of data path controller and its application in an interconnection network in 2-D and 3-D mesh topology. These controllers are required to route the signal from source to destination nodes in a network. The link would be wired, wireless or optical but it uses the path controller at the junction to route the signal to various nodes in the network. Here, all the input and output ports are buffered and wait for the controller. Data path controller logic is different from the traffic signal controller due to more robust and efficient logic for high speed data transfer in between data buses. Such architecture is required in a massive interconnection network to share resources in between processing nodes.

KEYWORDS: Data Path Controller, Traffic Signal Controller, TSP, Interconnection Network and Topology INTRODUCTION First, we did the analysis of traffic signal flow at the crossing. We assumed that the traffic is moving in the left side and left turn is free to go. Traffic from each direction can go straight way and left of it whenever there is green signal. Arrow green signal allows the traffic to take right turn. Yellow and Red signal signals that traffic have to slow down and stop respectively. When we represent traffic signal controller using a state flow diagram, then 6 states are required to control the traffic movement in all the four directions. The sequence of the states is as follows: State1: Green(G) Signal on the north-south direction and Red Signal on the east-west direction. In this state traffic coming from north and south direction are allowed to go straight way and left of it. The traffic coming from the east and west directions have to stop there. State2: Yellow(Y) Signal on the north-south direction and Red on the east-west direction. In this state traffic coming from north and south direction have to slow down their flow. The traffic coming from the east and west direction have to stop there. State3: Arrow Green(AG) Signal on the north-south and Red Signal on the east-west direction. In this state traffic coming from north and south direction are allowed to take right turn. The traffic coming from the east and west direction have to stop there. State4: Green Signal on the east-west direction and Red Signal on the north-south direction. In this state traffic coming from east and west direction are allowed to go straight way and left of it. The traffic coming from the north and south direction have to stop there.


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Shalu Malik, Neha Arora, Prashant Singh & Narendra Bahadur Singh

State5: Yellow Signal on the east-west direction and Red on the north-south direction. In this state traffic coming from east and west direction have to slow down their speed. The traffic coming from the north and south direction have to stop there. State6: Arrow Green Signal on the east-west direction and Red Signal on the north-south direction. In this state traffic coming from east and west direction are allowed to take right turn. The traffic coming from the north and south direction have to stop there.

Figure 1: An Intersection of Paths Here, zero wait for traffic signal is considered. A new concept for continuous flow of traffic without any wait condition is presented here. There are two cases, first one is with three flyovers with 4 ‘U’ turns and for the second one, we require one air bridge (flyover) in either north-south or east-west direction with 4 ‘U’ turns. Consider there is a flyover in north-south direction. If the traffic from the north direction have to move in all the four directions without interrupting the traffic from other directions, then 1) North to East: Traffic has to be on the left side of the path and then take the left turn. 2) North to South: Traffic has to move via flyover. 3) North to West: Traffic has to move via air bridge (flyover) and then after crossing it take a ‘U’ turn and then move to the left side and take a left turn. 4) North to North: Traffic has to move via air bridge and then after crossing the flyover take the ‘U’ turn then move the north direction via flyover. We are controlling the flow of data at a junction in the same manner as we have controlled the traffic at a crossing. Here we are representing a data path controller at the junctions, which will determine the flow of data without collision. This paper shows how the flow of data is controlled at junctions. We represent a flow diagram to determine it. In this, there are bidirectional buses in between the cores and at the junctions there is a controller to decide the data flow to which direction and at different timings. There are four different colors to determine the data permitted to pass through that junction. 1.

Signal Green(G) represents that the data is ready to be received at the junction via respective buses and can move forward in the opposite direction and left of it.

2.

Signal Arrow Green(AG) represents that the data can be transferred to its right.


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Design of Data Path Controller in an Interconnection Network

3.

Signal Yellow(Y) represents the buffer is almost full and the rate at which data transfer takes place has to be slow down and

4.

Signal Red(R) represents that the data is not be allowed to pass through the junction. Whenever there is AG, G and Y signal on the horizontal path the vertical line has the R signal and vice versa to

avoid the collision.

Figure 2: Four Line Junction of Data Buses

Figure 3: Four-Way Concentration of Figure 2, in a 2-D Mesh Network [2]

Here, the concentration is defined as four way concentration in a 2-D network with internal as well as external concentration[2-3]. Figure 3, represents an implementation of internal concentration, it integrates additional ports into router while external concentrator have single input and output ports to the router, it adds a concentrator(mux) to the input and a distributor(demux) to the output of the router to share the network injection/ejection bandwidth.

SYSTEM MODELLING Here, system modeling is carried out using Simulink in MATLAB [4]. First we, did the system modeling using the criteria for traffic signal controller. The data at the input terminal nodes I1, I2, I3 and I4 is 8-bit wide.

Figure 4: Finite State Machine Model for Single Node presented in Figure 3

Table 1: Simulink Model for Data Flow Controller

DTR ‘0’ from Tx port represents that the data is present in the buffer for Transmission(Tx). DTR ‘1’ from Tx port represents that the data is not present in the buffer for Tx. State timer ‘0’ represents no transition from the present state. State timer ‘1’ represents the transition from the present state to the next valid state.


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Shalu Malik, Neha Arora, Prashant Singh & Narendra Bahadur Singh

Figure 5: State Chart for Traffic Signal Controller R, G, AG, Y represents the Red, Green, Arrow Green and Yellow conditions of input-output buffers (IOB). Here G has been considered in the case of Data Path where transmit and receive conditions exist simultaneously but in most of the conventional buses, it is unidirectional data flow at a time. R1, G1, AG1, Y1 are the control signals for the data transfer between data bus related to line1 and line3 and R2, G2, AG2, Y2 are the control signals for data transfer between data bus in line2 and line4. As there are 6 states so we require 3 bits to represent each state and two of them are unused states, which are represented as ‘U’. The input from the DTR and the state timer (which is used to trigger the states) are given to the OR gate whose output is X which is used as triggering input (count) in the state table. When input X (count) is ‘0’, present state remains active and when it is ‘1’ it will move to the next state. The pulse signal used for DTR has a period of 10nsec (typical) and duty period of 7.5nsec, and for state timer its period is 10nsec and duty period of 5nsec. In the state chart the next state will be triggered only after the predefined number of rising edges of count signal pulses. These are the state equations for traffic signal controller in Boolean expressions form. _ _ _ _ R1= D1D2 (X+D3) +D1D2 (D3+X) _ _ _ _ _ G1=D1D2+D1D3X+D1D2D3X _ _ _ _ Y1=D1D2 (D3X+D3X) _ _ _ _ AG1=D1D2 D3X+D1D2D3X

_ _ _ _ _ R2=D1D2+D1D2+D1D3X+D1D3X _ _ _ G2=D1 (D2D3X+D2 D3X) _ _ _ _ Y2=D1D2D3X+D1 D2D3X _ _ _ _ AG2=D1D2D3X+D1D2D3X

Output Equations _ _ _ _ D1’= D1D2D3X + D1D2 (X+D3) _ _ _ _ _ D2’= D1D2D3X + D1D2 (D3+X) _ _ _ _ D3’= (D1+D2) (D3X+D3X) Here we have assumed bidirectional input-output bus i.e. data can be received and transmitted simultaneously, but if we have unidirectional bus then we require eight states to control the flow of the data at the junction. In this case, the


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Design of Data Path Controller in an Interconnection Network

flow of data from IOB1 to IOB3 and IOB3 to IOB1 has been taken in different states and similarly for IOB2 to IOB4 and IOB4 to IOB2.

Figure 6: Simulation Result for the State Diagram Presented in Figure 5

ROUTING IN A MESH TOPOLOGY The routing algorithm determines the path, a packet takes from its source to its destination. Routing algorithms can be classified into different algorithms, including minimal and non-minimal routing, as shown in Figure 7.a and 7.b. Minimal deterministic routing is the simplest routing algorithm to implement and is commonly used, but the performance can be limited. In some topologies, non-minimal routing is critical to improve the throughput of the network in adversarial traffic patterns.

Figure 7: a. Minimal Routing [1]

Figure 7: b. Non Minimal Routing [1]


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Shalu Malik, Neha Arora, Prashant Singh & Narendra Bahadur Singh

System Modelling for Data Path Controller applicable in a 2-D mesh routing.

Figure 8: State Diagram for Data Path Controller in Simulink [4] As presented in figure 8, the finite state machine model has been implemented in Simulink. In the above state chart S1, S2, S3 and S4 denotes the up, down, left and right sides. G, R, Y represents the same as explained above and LAG and RAG represents that the data can go in the left and right side respectively. The above context 2-D mesh network has been considered. In a 3-D Network data flow at a junction where top and bottom nodes are added as a neighborhood node along with lateral four side nodes, it happens in a six in and out bound routes. Here to control the data flow at a junction we require thirty states in a 3-D mesh. Different types of topologies used in communication are mesh, concentrated mesh and flattened butterfly [1-2], are presented in figure 9.

(a) (b) (c) Figure 9: Different Topologies (a) Mesh. (b) Concentrated Mesh and (c) Flattened Butterfly [1-2]

Figure 10: A 4x4 Network System Model in Simulink [4]


Design of Data Path Controller in an Interconnection Network

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Figure 11: 3-D 4x4 Network System Model Here in figure 11, the Pijk denotes the ith layer, jth row and kth column. In the above diagram we have shown the bottom layer as P0jk and top layer as P1jk in the first, second, third and fourth rows and columns. For example P123 shows top layer first row and third column.

CONCLUSIONS Modelling of Data Path Controller in a massive interconnection network has been presented in this paper for a two and three dimensional mesh topology. Interconnection network applications are in communication of electrical, radio frequency as well as optical signal routing from source to destination nodes in a topology. The idea could be applicable in the design of interconnect network where path may be different depending on the type of signal. The finite state machine model based micro controller decides the selection process from the source to destination signal routes in a concentrated in and out bound flow of signal during an allocated time slot. Idleness in the inbound channel traffic is sensed by the controller to make the system efficient.

REFERENCES 1.

John Kim, Member, IEEE, Kiyoung Choi and Gabriel Loh, “Exploiting New Interconnect Technologies in OnChip Communication,” in IEEE journal on emerging and selected topics in circuits and systems, Vol.2, No.2, June 2012

2.

J. Balfour and W. J. Dally, “Design tradeoffs for tiled CMP on-chip networks,” in Proc. Int. Conf. Supercomputer. (ICS), Carns, Queensland, Australia, 2006, pp. 187–198.

3.

P. Kumar, Y. Pan, J. Kim, G. Memik, and A. Choudhary, “Exploring concentration and channel slicing in on-chip network router,” in IEEE Int. Symp. Network-on-Chip (NOCS), San Diego, CA, May 2009, pp. 276–285.

4.

http://www.mathworks.in/products/st



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