Applications of op amp

Page 1

Notes Midterm 1 – Tuesday Oct. 12, 2004, 12:40-2:00. Last names beginning with A-L in F295 Haas; M-Z in Sibley Auditorium, Bechtel Center. Covers through Ch. 3, topics of HW4, concepts of first 3 labs. GSIs will review material in discussion sections this week. Bring photo-ID, no books, no cell phones, you may bring one 8-1/2 by 11 sheet of notes, you may bring a calculator, and you don’t need a blue book.

EECS40, Fall 2004

Lecture 12, Slide 1

Prof. White


Lecture #12 • • • • • •

OUTLINE Op-Amp circuits continued: examples Inverting amplifier circuit Summing amplifier circuit Non-inverting amplifier circuit Differential amplifier circuit Current-to-voltage converter circuit Reading Chapter 14. (Also, amplifiers are discussed in great detail in Ch. 11)

EECS40, Fall 2004

Lecture 12, Slide 2

Prof. White


Review: Negative Feedback • Negative feedback is used to “linearize” a high-gain differential amplifier. With feedback

+ 

V V+

V0

+ 

Without feedback

VIN

A  105

V0(V)

V0

V0

5

50μV

A  105

V  V

5 4 3 2 1 1 2345

VIN

5 EECS40, Fall 2004

Lecture 12, Slide 3

Prof. White


Application of Voltage Follower: Sample and Hold Circuit

EECS40, Fall 2004

Lecture 12, Slide 4

Prof. White


Inverting Amplifier Circuit in + – +

vs

vn + vp – –

+

Rs

if

vo  

is

Rf

+ vo –

Rf Rs

vs

in = 0  is = -if vp = 0  vn = 0 EECS40, Fall 2004

Lecture 12, Slide 5

Prof. White


Analysis using Realistic Op Amp Model • In the analysis on the previous slide, the op amp was assumed to be ideal, i.e. Ri = ; A = ; Ro = 0 • In reality, an op amp has finite Ri, finite A, nonzero Ro, and usually is loaded at its output terminals with a load resistance RL.

EECS40, Fall 2004

Lecture 12, Slide 6

Prof. White


Summing Amplifier Circuit Ra ib

+

– +

ic vc

– +

vb

in

Rc

vn + vp – –

in = 0  ia + ib + ic = -if

+

– +

va

Rb

Rf

if

ia

+ vo –

superposition !

Rf Rf   Rf vo   va  vb  vc  Rb Rc   Ra

vp = 0  vn = 0 EECS40, Fall 2004

Lecture 12, Slide 7

Prof. White


Application: Digital-to-Analog Conversion A DAC can be used to convert the digital representation Binary Analog number output of an audio signal into an analog voltage that is then (volts) used to drive speakers -- so that you can hear it! 0000 0 “Weighted-adder D/A converter” S4

20K 40K

S2

80K

+ -

S1

4-Bit D/A (Transistors are used as electronic switches) EECS40, Fall 2004

5K

 +

+ 

S3

8V

10K

V0

S1 closed if LSB =1 S2 " if next bit = 1 S3 " if " " = 1 S4 " if MSB = 1 Lecture 12, Slide 8

0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111

MSB

.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5

LSB Prof. White


Analog Output (V)

Characteristic of 4-Bit DAC 8 7 6 5 4 3 2 1 0

0000

0

2 0001

EECS40, Fall 2004

4 0100

6

8

10

1000

12

14

16

1111

Digital Input Lecture 12, Slide 9

Prof. White


Noninverting Amplifier Circuit

+ vn vg

Rg +

– +

ip

+

in

vo 

Rs

Rf

vp

+ vo –

Rs  R f Rs

vg

i p = 0  vp = vg  vn = vg in = 0  Rs & Rf form a voltage divider EECS40, Fall 2004

Lecture 12, Slide 10

Prof. White


Differential Amplifier Circuit Ra in

– +

Rc – +

vb

ip vn Rd –

+ vp –

vn  va vn  vo  0 in = 0  Ra Rb Rd ip = 0  v p  R  R vb  vn c d EECS40, Fall 2004

+

+

va

Rb

+ vo –

Rd ( Ra  Rb ) Rb vo  vb  va Ra ( Rc  Rd ) Ra Ra Rc Rb  vb  va  If  , then vo  Rb Rd Ra

Lecture 12, Slide 11

Prof. White


Differential Amplifier (cont’d) More usual version of differential amplifier (Horowitz & Hill, “Art of Electronics”, p. 184-5 (part of their “smorgasbord” of op-amp circuits): Let Ra = Rc = R1 and Rb = Rd = R2 Then v0 = (R2 / R1)(vb – va) To get good “common-mode rejection” (next slide) you need well-matched resistors (Ra and Rc, Rb and Rd), such as 100k 0.01% resistors

EECS40, Fall 2004

Lecture 12, Slide 12

Prof. White


Differential Amplifier – Another Perspective Redefine the inputs in terms of two other voltages: 1. differential mode input vdm  vb – va 2. common mode input vcm  (va + vb)/2 so that va = vcm – (vdm/2) and vb = vcm + (vdm/2) Then it can be shown that vo  Acm vcm  Adm vdm Ra Rd  Rb Rc Rd ( Ra  Rb )  Rb ( Rc  Rd ) where Acm  and Adm  Ra ( Rc  Rd ) 2 Ra ( Rc  Rd ) “common mode gain” EECS40, Fall 2004

“differential mode gain”

Lecture 12, Slide 13

Prof. White


Differential Amplifier (cont’d)

Ra Rc Rb If  , then vcm  0 and vdm  Rb Rd Ra • An ideal differential amplifier amplifies only the differential mode portion of the input voltage, and eliminates the common mode portion. – provides immunity to noise (common to both inputs)

• If the resistors are not perfectly matched, the common mode rejection ratio (CMRR) is finite:

Adm 1  Rb / Ra Ra Rc CMRR   if  (1   ) Acm  Rb Rd EECS40, Fall 2004

Lecture 12, Slide 14

Prof. White


Op-Amp Current-to-Voltage Converter

EECS40, Fall 2004

Lecture 12, Slide 15

Prof. White


Summary • Voltage transfer characteristic of op amp: vo

Vcc slope = A >>1

~10 V

vp–vn

-Vcc ~1 mV

• A feedback path between an op amp’s output and its inverting input can force the op amp to operate in its linear region, where vo = A (vp – vn) • An ideal op amp has infinite input resistance Ri, infinite open-loop gain A, and zero output resistance Ro. As a result, the input voltages and currents are constrained: vp = vn and ip = -in = 0 EECS40, Fall 2004

Lecture 12, Slide 16

Prof. White


EECS40, Fall 2004

Lecture 12, Slide 17

Prof. White


EECS40, Fall 2004

Lecture 12, Slide 18

Prof. White


EECS40, Fall 2004

Lecture 12, Slide 19

Prof. White


Differentiator (from Horowitz & Hill)

EECS40, Fall 2004

Lecture 12, Slide 20

Prof. White


Op-Amp Imperfections Discussed in Hambley, pp. 651-665 (of interest if you need to use an op-amp in a practical application!) Linear range of operation: Input and output impedances not ideal values; gain and bandwidth limitations (including gain-bandwidth product); Nonlinear limitations: Output voltage swing (limited by “rails” and more; output current limits; slew-rate limited (how fast can the output voltage change); full-power bandwidth DC imperfections: Offset current (input currents don’t sum exactly to zero); offset voltage;

EECS40, Fall 2004

Lecture 12, Slide 21

Prof. White


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