EEWeb Pulse - Issue 63

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PULSE

EEWeb.com INTERVIEW

Issue 63 September 11, 2012

Ahmad Bahai

CTO of Analog Business, Director of Kilby Labs & TI Silicon Valley Labs Texas Instruments

Electrical Engineering Community Visit www.eeweb.com

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TABLE OF CONTENTS

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Ahmad Bahai TEXAS INSTRUMENTS Interview with Ahmad Bahai - CTO of Analog Business and Director of Kilby Labs and TI Silicon Valley Labs

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Featured Products Why Can’t Johnny Design?

Part 2: Reinventing the Engineering Lab

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BY TOM LEE WITH QUANSER A focus on the undergraduate lab and how new technology and new thinking are triggering more effective learning.

Industrial Temperature and NAND Flash in SSD Products

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BY ELI TIOMKIN WITH WESTERN DIGITAL The effects of NAND flash based data storage systems when exposed to different temperatures.

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RTZ - Return to Zero Comic

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Ahmad Bahai Texas Instruments

With Texas Instrument’s monumental growth as the world’s largest analog semiconductor company comes the need to organize IP and be more efficient than ever before. That’s where Ahmad Bahai comes in. As CTO of Analog Business, Director of Kilby Lab and TI’s new branch, TI Silicon Valley Labs, Bahai reviews TI’s enormous portfolio of around 45,000 products and sees how to solve industry problems and create new solutions with the right combination of these products.

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INTERVIEW How did you get into electrical engineering?

Where did you end up after you finished your PhD?

I was fascinated by the mystery of electronics since I was in middle school. I started by assembling some electronic kits that were very popular—like putting together FM radios without knowing all of the details of circuits and transistors.

I was captivated by how much creativity you can bring to these electronic components to create a design. By the time I was in high school, my interest evolved to the point where I was so passionate about electronics, signal processing and doing things that looked like magic back then, that I decided it was definitely the area that I wanted to pursue. All of my degrees are in electrical engineering—I got my master’s in electrical engineering from Imperial College, University of London, which is considered the premier electrical engineering school in the UK and went on to receive my PhD from UC Berkeley.

The idea of enabling high speed wireless data transfer through data communication theory and advances in mixed signal circuits really energized me throughout my studies. I ended up moving into the communications field designing wireless transceivers. When I was doing my PhD, wireless was one of the hottest topics in the field, so I started developing RF and the whole back-end signal processing for wireless cellular systems. In fact, I did part of the research for my thesis on how to improve the performance of the cellular systems in GSM contexts in the wireless systems. I’d say the common thread in my interests during my education was bringing the capability and power of electronics—both in analog as well as digital—together with signal processing to create new applications, ranging from healthcare to communication.

After my PhD, I was offered several opportunities ranging from academic positions to major wireless power houses. However, while I was getting my PhD, I decided I wanted to go to Bell Labs where all of the coolest stuff started—from transistors to lasers to communication theory to satellite communication. At that time, Bell Labs was known as the greatest center of innovation in the last century and it was a great intellectual asset for my long-term career. I was there from the early ‘90s to the late ‘90s and this was the time when Bell Labs was at its peak—you could see all of the gurus in the field of signal processing and semiconductors walking down the hallways—so it was a good place to do research. After the disintegration of Bell Labs among multiple companies, I decided that it was time to move on, so I cofounded a startup, Algorex, with a couple of guys from Bell Labs, designing ICs and algorithms for wireless applications. The company was based on a bootstrapping model— we received funding from large companies who had trust in our team and offered these opportunities to help us develop some of the earliest versions of wireless LAN, CDMA and eventually, GSM. The company I cofounded was later acquired

by National Semiconductor and I moved back to the West Coast.

I became the CTO of wireless at National and did some parttime teaching at Stanford and UC Berkeley. I started with 3G modem design but later my role expanded to driving certain initiatives from analog and mixed-signal processing all the way to advanced research for nextgeneration audio systems. Since the acquisition of National by Texas

Instruments, I was encouraged to stay on the team where I am CTO

I’d say the common thread in my interests during my education was bringing the capability and power of electronics—both in analog as well as digital—together with signal processing to create new applications, ranging from healthcare to communication. of the analog business for Texas Instruments and director of Kilby Labs and TI Silicon Valley Labs.

Tell us a little bit about the book you wrote.

Since my time at Bell Labs, I’ve been concerned as to why people look at everything in time-domain without looking beyond the present day of communication techniques. An old-timer I was working with at the time, Burt Saltzberg, told me about a type of technology that has been in development since the ‘60s called ‘multicarrier communication.’ It didn’t gain traction back then because the complex design was too much for the available technology. I saw this technology Visit www.eeweb.com

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EEWeb PULSE as having potential now given the progress in semiconductors and signal processing electronics.

We spent time developing the idea a little more despite the fact that everyone was saying that the technology was still too complex and needed another 10 to 15 years before it could be developed. That kind of skepticism got us even more excited—the idea that people think it’s too difficult or too futuristic— so we took it as a challenge to develop it to the point where we were able to write a book about it.

Subsequently, many wireless and high-speed communication systems and standards were based on this technology. Looking ahead and particularly beyond what’s available today really gets me excited. This is a big reason why I spend part of my

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time at universities, which enables me to think outside of the box. I’m a strong believer that you need to get outside of the box to know what the box is.

What’s your role at TI? Texas Instruments is the largest analog semiconductor company in the world and continues to grow.

My focus today is to identify and develop disruptive innovations that can further grow the company. As I look at TI’s product portfolio of almost 45,000 analog products, I see a challenge – to leverage this expansive portfolio by bringing products together and then stepping back to solve problems more efficiently with the right combination of these products—

EEWeb | Electrical Engineering Community

ranging from basic semiconductor and packaging technologies to circuits and systems. It’s a big job but I am excited.

What do you foresee as some of the biggest challenges to the electrical engineering industry?

A key challenge we are going to be facing as an electronics community is that we have been so successful over the past few decades in improving the quality, cost and effectiveness of electronic components, to the point where hardware is becoming a commodity.

The capabilities of a smart phone today, which is significantly higher than a laptop three years ago, took a lot of innovation in process technology and circuit design. I

INTERVIEW

As I look at TI’s product portfolio of almost 45,000 analog products, I see a challenge – to leverage this expansive portfolio by bringing products together and then stepping back to solve problems more efficiently with the right combination of these products— ranging from basic semiconductor and packaging technologies to circuits and systems. think we will lose some of our top talents to non-hardware or nonelectronics parts of the hardware, which may tax us in the long run. I fear that a lot of students will move into applications design rather than driving innovation in hardware. We need to remind everyone that all of the social media applications that we use today for example require extremely capable and powerefficient semiconductor hardware to provide, which is a result of decades

of innovation. Another challenge I see is ensuring multidisciplinary education for electrical engineering students. Many innovations today are a convergence of several types of technologies.

The innovator today needs to be able to leverage the capabilities of all of these technologies together to really open the door for new opportunities.

Do you have any advice for the electrical engineering community to help the development of these new innovations?

I think it is very important to develop new ways to shorten the cycle of innovation. Particularly, reducing the amount of time between coming up with a great idea and the commercialization of that idea.

At Silicon Valley Labs, we work extensively in analog and mixedsignal processing to discover the next big thing. The challenge is to make the development process more efficient. Over the last few years, we discovered through practice a collaborative way of innovating. Collaboration can really

help bring ideas from their infancy to the point of realistic evaluation.

Today, we work with people at the top schools on projects, not in the classic way of funding a project and reporting back every six months, but getting heavily involved and spending time with the team and bouncing ideas off of each other.

This interaction really helps take ideas from the whiteboard to the development of hardware in an amazingly short period of time.

It’s very competitive out there and having these innovations can give us a six-month window over our competition. We extend that window with more innovation.

Back in the old days the best way to protect your innovation was to patent it. Nowadays, the best way to protect your innovation is with more innovation. ■

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Tom Lee

Chief Education Officer Quanser

Why Can’t Johnny Design?

Part 2:

Reinventing the Engineering Lab Part 1 of this series of articles surveyed the key trends and drivers that are challenging the way we train the next generation of engineers. Global political and economic dynamics, increasing complexity of modern engineering systems, and general resource challenges that vex most education institutions are some of the difficult issues that so many of us are concerned about.

This follow-up article begins looking at some of the better ideas emerging from engineering campus to take on these challenges. In particular, Part 2 will focus

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EEWeb||Electrical ElectricalEngineering EngineeringCommunity Community EEWeb

on the undergraduate lab and how new technology and new thinking are triggering more effective learning.

The modernization and enrichment of the undergraduate lab experience is one of the primary elements of engineering education innovation and it is a critical part of the broader trend of introducing more and better hands-on experiences in the curriculum. Hands-on education has taken several key forms in the modern institution. Most of us are familiar with the most obvious

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form – the undergraduate lab. That place that we all went to once a week to touch real knobs, measure noisy signals, and somehow try to connect the dots to the theory. Other prominent forms of hands-on education also include project-based learning, virtual laboratories, and the mother of all hands-on experiences, internships or co-op programs.

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From Theory to the Real World In any formal gathering of academics on the topic of teaching young engineers, the topic of handson education inevitably come sup. Trends towards interdisciplinary engineering, or increasing the realworld application dimension in courses, are fueling very needed debate within academic circles and in most cases, the vectors are pointed away from traditional lecture-centered education.

Another driver is the availability of new technology that provides cost-effective options for education innovation.

Rich information among instructors and students are possible through social networks such as Facebook or academic systems like Blackboard. Simulation and virtualization is another example of providing some level of interactive engagement with a “real enough” engineering system. Though nothing compares to actual engagement with real systems, many instructors are turning to virtual techniques to enrich the learning of topics that simply would have stayed highly theoretical and abstract. Pure simulation, in this sense, can be a very effective tool for establishing context.

The final technological influence is simply the increase in quality and sophistication of education-focused equipment that students can now access. For those of us trained in the bad old days (1980’s for me), we have less than fond memories of aging and often inconsistent lab equipment where we had to mentally build a connection between some highly contrived experiment and a bunch of differential equations. Today’s lab equipment, whether through digital evolution or simply better manufacturing practices are more robust, more flexible, and can offer a much richer set of relevant experiences for less money.

All of these factors have established truly fertile ground for campuses to explore and implement new ideas. In the category of “This is not the lab I remember from my college days!”, the modern robotics lab based on the new generation of consumer and educational robotics platforms, has to be one of the more notable trends and it is largely driven by the issue of student motivation.

This concern about student motivation is really at the heart of a lot of heated discussion within the engineering education world. Recent statistics indicate that in the U.S. upwards of 40% of all undergrads who start science, technology, engineering, math (STEM) programs never finish. When you also consider that less than 15% of all incoming freshmen choose STEM, the final numbers of those who enter STEM careers is very low indeed.

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Above: Lego Mindstorms

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Many institutions are investing heavily in ways to make engineering a more attractive option for young people, and interesting and even fun lab experiences are seen as part of the answer. There is no more prominent manifestation of this effort than with the explosion in consumer and educational robotics.

Fun With Robots Twenty years ago, the concept of consumer robotics would simply be unheard of or even mocked but today, young people playing and creatively programming small autonomous robots have become a part of mainstream youth culture. Lego Mindstorms has become the most recognizable name for youth or even young kids’ robotics. The FIRST (For Inspiration and Recognition of Science and Technology) organization has elevated the hobby of robotics to an international spectacle where high-school aged students build rover style robots of complexity that would have been considered researchgrade a generation ago. The open platform Arduino, has become the grown-up hobby roboticist’s platform of choice and has spawned countless weird and wonderful, crawling, flying, and dancing mechatronic critters.

Below: Arduino Board

This trend has not gone unnoticed by universities and indeed, Arduino or Lego-based projects and labs are a very popular option to add some sizzle to the undergraduate lab. In fact, an interesting observation is the introduction of such robots into the freshman curriculum. At the University of New Mexico in Albuquerque, the school of engineering now requires students to program an Arduino platform autonomous ground vehicle to navigate a complex course. The goal was to bring some life to a notoriously hated course, introduction to C programming, by adding an engaging project. By all measures, this has been a successful initiative and the course continues to include such a project. In fact, similar additions of robotics labs into existing courses are very common at many institutions.

The robotics lab project also recognizes the broadening of the role of computers in engineering. The traditional curriculum viewed computing as a platform to program algorithms to manipulate data and this is why we have always taught sorting algorithms and textbook-loads of numerical methods for seemingly every type of math problem. In a recent meeting of the Canadian Field Robotics Network held at McGill University in Montreal, Professor Gregory Dudek remarked that he believed that the primary goal of all computer scientists should be to move computing off the desktop and onto Visit www.eeweb.com

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In contrast, an Arduino or Legobased project basically steps around the theory and there is typically no consideration of the system dynamics, deep analysis, or optimal design.

That world tends to work on trial and error and heuristics. Ultimately, motivation, hard work, diligence, creativity are the key qualities that are nurtured – all very important but, in the minds of many, insufficient to deal with the complexity of real systems.

The Driving Simulator attempts to introduce the motivation and the other soft qualities via the application that remains squarely within the framework of a traditional lab.

System components for the QDS lab concept mobile platforms – that the days of the “Hello World!” programming course was over.

This is setting up an interesting situation. We now have a generation of kids coming into college with practical and sometimes advanced knowledge in robotics and realtime computing. They may not know the formalisms or all of the proper terminology but they know how make machines literally dance and sing. On the other hand, you have the community of engineering educators struggling to make sense of a curriculum that dates back to the 1950’s (or the 1750’s if you consider the math sequence!). In a perfect world, the new empowered generation would represent an opportunity to enrich the curriculum and build on top of this new enlarged skill set.

In reality, however, it can be problematic as the inherent conflict between hobby robotics and large majority of the traditional curriculum are simply too great. Tradition focuses on rigor and theory while dancing robots often reward cleverness and trial and error.

The approach takes a very typical undergraduate control lab system – two DC servo motors – and maps the control and operation of these motors to a car driving simulation. So rather than students exploring the impact of a parameter on the damping response of a naked motor, the application clearly shows how such variations can influence a more intuitive response in a car. To increase the realism, the lab also has within the control loop, an option for manual driving of the car via a game controller, and 3D virtual reality-style visualization.

In real time, CAD-based renditions the car, road, and terrain, provide a very video-game like experience.

The manual mode is typically used early in the lab sequence to motivate the students. There is also an automatic driver mode where formal, rigorous concepts of control can be addressed.

Application-Centered Labs for Control Systems Recently, at the 2012 American Society of Engineering Education (ASEE) Annual Conference in San Antonio, Texas, I, representing Quanser, the control systems lab equipment company, presented a new lab concept that was developed in collaboration with the University of Toronto. Called the Quanser Driving Simulator (QDS), the concept was the integration of a strong application context on a more traditional undergraduate lab concept in control systems (Figs. 3, 4). This approach maintains the rigor of the traditional theory but layers a more intuitive and engaging context.

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This comparison to the video is actually quite important.

The system was intentionally designed to appeal to the incoming video-game generation. The belief is, of course, having some fun with your lab early on is not

EEWeb | Electrical Engineering Community

entirely a bad thing and will motivate you to work through the more challenging material. The critical difference is, however, there is actual plant hardware in the loop (the motors) with sufficient fidelity in the models to map well to real engineering, and in particular, Hardware in the Loop (HIL) testing of control systems.

Pioneered by the aerospace and auto industries for improving controller design, it emphasizes a simulation and modeling approach but one where there is also some system hardware (a plant) within the control loop. With HIL, engineers can achieve higher fidelity simulation runs that still embody real world effects, non-linearity, and noise that only true hardware can provide. The driving simulation lab’s rendition of HIL is a reasonable replication of an important modern industrial workflow.

In terms of control systems theory, the Driving Simulator successfully navigates the key concepts of modeling, system characterization, and compensator design. The Toronto students, based on course grades, had similar or better comprehension than with traditional labs.

Anecdotally, the instructors felt that there was a distinct increase in the level of motivation and interest in the course. Basic observations such as students wanting to remain in the lab long past designated hours, or developing very creative variations of the driver model tied to the controller model (e.g. a sober driver vs. a drunk driver) are examples of student behavior showing very positive changes. The University of Toronto has recently announced that it will increase the use of this lab concept for their control course.

In the end these two lab concepts should instill some optimism within the engineering community. Dr. Jacob Apkarian, Founder and CTO of Quanser, recently remarked that curriculum transformation is more like moving a cemetery rather than moving a house. The decades, if not centuries, of tradition is in fundamental conflict first with the changing youth culture and demographics of today’s students but also with the changing realties and expectations of modern industry.

The good news is, however, as was demonstrated by the case studies highlighted here, is the fact that it was relatively easy to do. In the case of consumer robotics, the information is all out there and the components are cheap. The main challenge is organizing the class and providing help to the students as required. And ultimately, help will likely come from other students or on-line any ways. With the Driving Simulator, the transformation from abstract to engaging was, for all

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intents and purposes, through clever use of software.

All other components were off-the-shelf and wellestablished. It is true that this approach is significantly more expensive but relatively speaking even advanced lab hardware experiences the general reduction in cost and performance improvements that consumer tech products do. The slope may not be Moore’s Law but there is definitely a general tendency in the right direction.

For many, including myself, the more rigorous approach embodied by the Driver Simulator merits serious consideration as it is not tied to a consumer trend and it maintains a healthy respect for going beyond trial and error in design. Techniques such as HIL is showing that you cannot simply “rule of thumb” your way to designing a hybrid powertrain. The motivation and fun side, however, should not be dismissed. When we were in college we joked about awful courses because we thought that’s the way things were supposed to be and things will never change. But with declining enrollment and pressing societal challenges that need more and better engineers any effective way of retaining bright students is well worth the effort.

About the Author Dr. Lee has been an active contributor in the global engineering and control systems community for over twenty years. As Chief Education Officer at Quanser, a leader in realtime control and mechatronics solutions for education, research, and industry, Dr. Lee develops and implements the company’s strategy for enriching and increasing the educational effectiveness of technology in the modern engineering education context. Prior to his appointment at Quanser, Dr. Lee was Vice President of Applications Engineering at Maplesoft, creators of the renowned Maple mathematical software system.

In that capacity, he helped the company transform the mathematical technology to a complete engineering modeling and simulation solution. He also serves as an Adjunct Professor of Systems Design Engineering at the University of Waterloo, noted for its leadership in engineering, computer science, and mathematics.

Dr. Lee earned his Ph.D. in Mechanical Engineering at the University of Waterloo, and his M.A.Sc. and B.A.Sc. in Systems Design Engineering at the University of Waterloo. He has published numerous papers and is a frequent invited speaker in the areas of engineering education, engineering modeling and simulation, and engineering computation. ■

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Eli Tiomkin

Director Business Marketing

Industr Temper

and NAND in SSD Pro

20 28

EEWeb EEWeb||Electrical ElectricalEngineering EngineeringCommunity Community

rial rature

D Flash oducts

TECH ARTICLE

Many NAND flash based SSD products on the market today are touted as “Industrial Grade” or as supporting “Industrial Temperature” (typically -40˚C to 85˚C) operation. These SSD products are typically screen-tested for functionality across the temperature range prior to shipment. The effects of temperature on the data retention and endurance of the SSD, however, is rarely specified or discussed.

The ability of NAND flash to store and retain data depends on the temperature which the NAND flash is subjected to during writing, and between the time the data is written to the time the data is read. The higher the temperature that the NAND flash experiences, the greater the acceleration of charge de-trapping mechanisms that could lead to random data bit failures. NAND endurance is also impacted since endurance has an inverse relationship to data retention, and the rate of wear-out of NAND cells is affected by temperature at the time of programming and erasing NAND. This article describes these effects and provides some direction on the operation of a NAND flash based data storage system when exposed to different temperatures.

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NAND Memory Cell Control Gate Inter-poly Oxide Layers

Polysilicon Floating Gate Oxide

Oxide

Oxide

Implanted Diffusion Region

–

Source

–

Oxide

Implanted Diffusion Region

Tunnel Oxide

Drain

The floating-gate transistor is the building block of all flash technology.

In the floating-gate transistor, an insulating oxide layer resides between the floating gate and the substrate.

When voltage above the cell threshold, (Vt), is applied to the top gate, the transistor is “turned on” and conducts a current. To prevent the transistor from conducting current, electrons are forced through the thin oxide layer by the application of high voltage applied to the top gate.

This is the process of writing (or programming) the NAND cell. To erase a cell, the substrate well is raised to a high voltage forcing the electrons back through the oxide layer from the floating gate into the substrate. To

read a NAND cell, a voltage above Vt is applied to the top gate and the current flowing in the transistor sensed by a sense amplifier, which gives information about the amount of charge stored in the cell.

Charge De-trapping and Bit Flips The repeated electron tunneling mechanism from writing and erasing NAND cells causes the buildup of charge traps in the tunnel oxide layer. Some of the traps are deep, and eventually accumulate to the point where the tunnel oxide becomes conductive without

• At a temperature T (Kelvin), that fraction of electrons that have energy greater than Ea is proportional to Ae-Ea/RT (Maxwell-Boltzmann distribution) • A is approximately contstant and R is the universal gas constant Rate of reaction = Ae-Ea/RT • The aggregated activation energy of electron tunneling in NAND flash = 1.1eV at end of life per JESD47H.01 • The ratio of two rates of reaction will produce an acceleration factor (Rate of change at = T2) / (Rate of change at T1) = (Ae-Ea/RT2) / (Ae-Ea/RT1) = e-Ea/R(T2 - T1) = e-K(1/T2 - 1/T1) where K is a constant (=Ea/R) • From empirical data based on JESD47H.01, the constant K is calculated to be = 12,765 • The acceleration factor between T1 and T2 = e-12,765(1/T2 - 1/T1)

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Storage Temp (ºC)

Acceleration Factor Relative to 55ºC

Bake Time (Hrs) Equivalent to 1 Yr at 55ºC

125

939

10

85

26

360

70

5

1712

55

1

9390 (~1 year)

25

0.01988

442,380 (~50 years)

application of an input voltage, and the cell is no longer capable of storing charge. At this point, programming the NAND will result in program failures and the entire block must be marked “bad” by the SSD. Other traps are shallow and as they collect charge, inhibit normal programming of the cell. Shallow traps start de-trapping immediately after the cell is programmed, causing the cell threshold to decrease from the level set through the NAND program algorithm, leading to a potential “bit flip”. In addition, charge naturally de-traps within a NAND cell over time, which is the limiting factor in NAND data retention.

De-trapping of stored charge is accelerated by exposure to high temperature, and the temperature that the NAND flash is subjected to is a critical factor. The Arrhenius equation describes the rate of reaction for a given temperature (T), and activation energy (Ea) and can be used to calculate the acceleration in charge detrapping for the NAND flash cell.

Example of Arrhenius Equation Calculation in JEDEC NAND Standard

At the end of life of a NAND cell, when the device has been cycled through the maximum number of program-erase (endurance) cycles as specified by the manufacturer, data loss can occur if the NAND is stored or read over extended periods of time at high temperature. Conversely, when the NAND is stored or read at a lower temperature than 55°C, the acceleration factor becomes less than 1 and the NAND data retention is extended relative to the specification.

It should be noted that at the end of NAND’s rated endurance, the NAND device is usually not in jeopardy of immediate failure. NAND manufacturer’s endurance ratings are typically specified to ensure that the number of bad blocks that occur over time will be within a predictable percentage limit and that the NAND will be able to retain data for 1 year at 55°C in accordance with JESD47H.01. Beyond the endurance limit, blocks may become bad at a faster rate and the data retention capabilities of the drive become diminished. The impact to reliability of the drive is then dependent upon the media management capabilities of the drive controller.

Temperature and Bit Error Rate Over time, NAND cells may lose enough charge and flip enough bits to overwhelm the ECC capability of the drive controller and cause data loss. Another illustration of the effects of temperature on reliability is the differences in raw bit error rate (RBER) of the NAND when write cycled to a fixed P/E count at different temperatures.

WD internal test data shows the following relationship between the RBER and temperature.

NAND RBER vs. Temperature

• JEDEC NAND reliability specification JESD47H, states that a bake time of 10 hours at 125°C is equivalent to 1 year data retention at 55°C

• 10 hours accelerated by a factor of 939 is 9,390 hours ~ 1 year (8,760 hours) It is important to note that the temperature and duration to which the NAND flash is subjected to after programming is the most critical part in determining the acceleration factor. The acceleration factor for a NAND relative to a temperature of 55°C is shown in the table below. For example, for NAND devices specified with 1 year of data retention, storing at 85°C will accelerate the charge de-trapping mechanism by 26 times when compared to storing at 55°C.

(Fixed P/E cycle count) Vendor A

Vendor B

RBER (Lower is Better)

• The Arrhenius equation derives an acceleration factor from 55°C to 125°C of 939

TECH ARTICLE

-60

-40

-20

0

20

40

60

80

100

Temperature (ºC)

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EEWeb PULSE The data shows that NAND programmed to its endurance limit at -40°C will have a higher RBER than NAND programmed at 25°C, and higher than that of NAND programmed at 85°C. The operation of programming NAND at low temperature increases the rate of degradation of the cell oxide layer relative to programming at higher temperature.

Conclusion NAND is subject to two competing factors relative to temperature. At high temperature, programming and erasing a NAND cell is relatively less stressful to its structure, but data retention of a NAND cell suffers.

At low temperature, data retention of the NAND cell is enhanced but the relative stress to the cell structure due to program and erase operations increases.

About the Author Eli Tiomkin is the Director, Business Development at Western Digital (WD) and previously held executive positions at Violin Memory (director of sales), STEC (director of OEM sales), and M-Systems (sales director). A dynamic, creative sales professional with extensive experience in the high-tech storage market, Tiomkin holds an MBA in International Business and Organizational Behavior and BS in Marketing, both from Oakland University. ■

The effects of temperature apply in varying degrees to all NAND devices from all NAND vendors. Industrial temperature rated NAND devices from the manufacturer are tested for functionality at temperatures of -40˚C and +85˚C (depending on the NAND manufacturer’s specification), but that does not give these parts higher endurance or greater immunity to the effect of charge de-trapping. Sensitivities to these factors appear to be increasing as NAND process geometries shrink, but the actual endurance and data retention characteristics of a particular NAND device will vary between NAND manufacturers, process materials, and geometries.

Therefore, it behooves the SSD vendor to fully understand the physical characteristics of the NAND chosen for various applications, and to specify SSD products with the different endurance and data retention characteristics seen across the industrial temperature range. At the same time, it is also important for users of NAND flash based SSDs to understand the relationship between temperature, data retention, and endurance; and how their usage models will affect the long term reliability of the SSD. The best way to optimize the data retention of a NANDbased SSD is to limit the temperature at which the NAND flash is stored. When the drive has reached or is approaching its end of life, limiting the time of exposure to high temperature will also help extend the data retention.

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TECH ARTICLE Get the Datasheet and Order Samples http://www.intersil.com

Single or Multiple Cell Li-ion Battery Powered 4-Channel and 6-Channel LED Drivers ISL97692, ISL97693, ISL97694A The ISL97692, ISL97693, ISL97694A are Intersil’s highly integrated 4- and 6-channel LED drivers for display backlighting . These parts maximize battery life by featuring only 1mA quiescent current, and by operating down to 2.4V input voltage, with no need for higher voltage supplies.

The ISL97692 has 4 channels and provides 8-bit PWM dimming with adjustable dimming frequency up to 30kHz. The ISL97693 has 6 channels with Direct PWM dimming control.

The ISL97694A has 6 channels and provides 8-, 10-, or 12-bit PWM dimming with adjustable dimming frequency up to 30kHz, 7.5kHz, or 1.875kHz, respectively, controlled with I2C or PWM input.

ISL97692 and ISL97694A feature phase shifting that may be enabled optionally, with a phase delay between channels optimized for the number of active channels. In ISL97694A, phase shifting can multiply the effective dimming frequency by 6 allowing above-audio PWM dimming with 10-bit dimming resolution.

The ISL97692/3/4A employ adaptive boost architecture, which keeps the headroom voltage as low as possible to maximize battery life while allowing ultra low dimming duty cycle as low as 0.005% at 100Hz dimming frequency in Direct PWM mode.

The ISL97692/3/4A incorporate extensive protection functions including string open and short circuit detections, OVP, and OTP. The ISL97692/3 are offered in the 16 Ld 3mmx3mm TQFN package and ISL97694A is offered in the 20 Ld 3mmx4mm TQFN package. All parts operate in ambient temperature range of -40°C to +85°C.

Features • 2.4V Minimum Input Voltage, No Need for Higher Voltage Supplies • 4 Channels, up to 40mA Each (ISL97692) or 6 Channels, up to 30mA Each (ISL97693/4A) • 90% Efficient at 6P5S, 3.7V and 20mA (ISL97693/4A) • Low 0.8mA Quiescent Current • PWM Dimming Control with Internally Generated Clock - 8-bit Resolution with Adjustable Dimming Frequency up to 30kHz (ISL97692/4A) - 12-bit Resolution with Adjustable Dimming Frequency up to 1.875kHz (ISL97694A) - Optional Automatic Channel Phase Shift (ISL97692/4A) - Linear Dimming from 0.025%~100% up to 5kHz or 0.4%~100% up to 30kHz (ISL97692/4A) • Direct PWM Dimming with 0.005% Minimum Duty Cycle at 100Hz • ±2.5% Output Current Matching • Adjustable Switching Frequency from 400kHz to 1.5MHz

Applications • Tablet, Notebook PC and Smart Phone Displays LED Backlighting

Related Literature (Coming Soon) • AN1733 “ISL97694A Evaluation Board User Guide” • AN1734 “ISL97693 Evaluation Board User Guide” • AN1735 “ISL97692 Evaluation Board User Guide” 10

L1

VIN: 2.4V~5.5V

10µH

4.7µF

10

D1

VOUT: 24.5V, 6 x 20mA 4.7µF 4.7µF

1

VIN LX COMP

15nF 12k

100pF 470k

OVP 2.2nF

ISL97694A

ILED (mA)

1µF

23.7k

ISET 53k

AGND

PGND

0.1

0.01 fPWM: 200Hz

SDA/PWMI SCL

CH1

EN

CH2

FPWM 291k

143k

FSW

0.001

CH3 CH4 CH5

0.0001 0.001

CH6

FIGURE 1. ISL97694A TYPICAL APPLICATION DIAGRAM

July 19, 2012 FN7839.2

fPWM: 100Hz

0.01 0.1 1 INPUT DIMMING DUTY CYCLE (%)

10

FIGURE 2. ULTRA LOW PWM DIMMING LINEARITY

Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2012 All Rights Reserved. All other trademarks mentioned are the property of their respective owners.

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