Highly Parallelized Pattern Matching Hardware for Fast Tr acking at Hadron Colliders
Abstract: A high-performance “pattern matchingâ€? implementation based on the Associative Memory (AM) system is presented. It is designed to solve the real-time hit-totrack association problem for particles produced in high-energy physics experiments at hadron colliders. The processing time of pattern recognition in CPU-based algorithms increases rapidly with the detector occupancy due to the limited computing power and input-output capacity of hardware available on the market. The AM system presented here solves the problem by being able to process even the most complex hadron collider events produced at a rate of 100 kHz with an average latency smaller than 10 Îźs. The board built for this goal is able to execute ~12 petabyte comparisons per second, with peak power consumption below 250 W, uniformly distributed on the large area of the board.