CSEA Linked List Node5

Dr. D Dr

Cover Story

B L U F F GOOGLE

CONTENTS

3

Editorial

4 Faculty Talk

Dr. Hemangee K. Kapoor, Assistant Professor, CSE

DIGITAL MIND

Bluetooth Sniffing

Gunjan Bansal, 3rd year, B. Tech. CSE

7

NATURAL SELECTION

9 Its Time for Clock-Less Chips Rakesh Yarlagadda, 4th year, B. Tech. CSE

COVER STORY

Bluff Google

Sai Sheshank Burra, 4th Year, B. Tech. CSE

12

BONJOUR

14 Intern Review

Aatish Rathi, 4th Year, B. Tech. CSE GEEK CORNER

Multi-Model Interface Design Ravi Tandon, 3rd Year, B. Tech. CSE

16

DIGITAL MIND

19 Quantum Computing D. Pramod, 3rd Year, B. Tech. CSE

NOSTALGIA

Confessions of Back Benchers K. Sanmukh Rao, 4th Year, B. Tech. CSE

BIRD’S EYE VIEW

23 Concurrent Programs and TVLA Sharvanath Pathak, 3rd Year, B. Tech. CSE

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Editorial Here comes the Fifth Edition of Linked-List with some cool stuff during the hot season of placement and cool breeze of weather. Placement fever is all over on our beloved 4th Yearites, the 3rd Yearites are struggling for their internship, 2nd Yearites are exploring their department and the 1st Yearites are just exploring the end of the first term of their new world. This is the section with least tech-talk and only chit-chat with the readers which most of you don’t do and prefer to skip. This node of Linked-List comes up with some new set of articles, which are today in the top and relevant to hot areas in Computer Science and mostly for pure geeks to have research on.

New areas in Computer Science are rapidly evolving and are even hard to figure the current scenario in each existing area and scope of new area. With this node of Linked List, we tried to come up with a few of them. Quantum Mechanics is a fear for most of the people, what would you say about Quatum Computing ? Clock Synchronization is a very big issue in design relevent to Hardware, think of Technology which is Clock Less. HCI is gaining popularity and importance day by day and bluetooth technology is spreading wider and impinging into more and more fields.

This edition of Linked List co-incidently comes with release APU (Advanced Processing Units) by AMD, QWiki (First ever information visualization initiative), Windows Phone 7 and Ubuntu Maverick Meerkat 10.10. Gadgets like Kindle are gaining popularity which are eco-friendly as well by huge battery backup of 1-month and also saves paper. Things in Computer Science are moving at a very rapid pace and through with this edition of Linked List, we endeavour to present some of the recent developments and creating awareness among the community while maintaining the interest of the readers.

This page just gives the glimpse of the remaining sections and now i left the readers to the them by their own.

Chinmaya Poswalia Publication Secretary, CSEA

Linked List

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Computer Science and Engineering Association, IIT Guwahati

Faculty Talk with

Dr.

04

Hemangee K. Kapoor

Please tell us something about your academic background? What are your fields of interests and how did you develop interest in them?

I did my Bachelors from the Govt. College of Engineering, Pune(1994-98), a er which I enrolled in IIT Bombay for M.Tech. in Computer Science and Engineering. A er comple ng masters in year 2000, I worked for 2 years in Persistent Systems as a so ware engineer. My inclinaon was always towards academia and so I went for PhD. As I did not want to give GRE :) my op ons were limited to European countries. A er ge ng PhD admission from a few places in Europe, I chose to go to the UK as it was an English speaking country. I enrolled in the London South Bank University where I was awarded a PhD in 2004.

When you are abroad, there is always a feeling that someday you will go back, that could be in 3 years or in 50 years. Also I did not go there to make a career; I went there to study. Having achieved the objec ve and as a job offer in India was in hand, I

chose to come back. I joined as a faculty member at Dhirubhai Ambani Ins tute of Informa on and Communica on Technology, Gandhinagar. A er teaching there for 3 years, I wanted to move to an IIT, and the first of-

“Higher studies is possible at the moment, but it may not be possible if you delay it longer.

While taking any decision make sure that it will increase your avenues in the future and not limit them” fer I got was from IIT Guwaha , which I joined in June 2007.

From research interest point of view, I have always liked the area of Applied Formal Methods. I did my M.Tech. thesis on formal verifica on and developed theories for term rewri ng

techniques. In PhD, I developed methods and tools for verificaon of asynchronous circuits.

The modeling techniques used were based on process algebra.

As a student, I was always interested in Digital design and Computer Architecture, and having done PhD in asynchronous circuits, I started doing research in hardware. To learn more about asynchronous circuits, I developed an elec ve course on the subject, which was also the first course I taught in my career.

You are currently doing a project tled “Formal Approach to design of latency-insensi ve systems”.

What is it about and what are the prac cal applicaons of such systems ?

Latency insensi ve design has been proposed as the correct by construc on methodology for coping with latency arising due to long interconnects in a single clock System-on-Chip (SoC). In other words, a signal may take mul ple clock cycles to move from one module to other, where the receiver is expecting data at every clock cycle.

Faculty Talk To solve this problem, the computa onal blocks are made paent, i.e. they wait for the data to arrive. And the interconnects are divided by special buffers, which transmit either data or absence of data per clock ck.

As a part of my project, I have developed a process algebraic model for single clock LI systems. I want to extend it to mulple clock systems. The project is funded by the Department of Science and Technology, Government of India.

With the advancement of semiconductor technology, wire delays are domina ng gate delays, implying longer latency. Moreover, the various components of the chip are not expected to run at the same frequency. The soluon is to have local synchronous blocks and make the interconnects asynchronous. This design style is popularly known as the GALS design style. My project has direct applica ons for this design methodology.

Please men on a few interes ng projects that you had been associated in the past.

There are two projects in my mind: I developed a model for an asynchronous DLX processor and formally verified it. This was done out of my own interest.

While working in industry, I worked on LDAP servers and Oracle database, to develop backup recovery and data management related func ons for email servers.

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Do you agree that present students are more inclined to doing innova ve work in so ware than hardware?

What are the reasons behind this trend?

In India there are more so ware industries than hardware industries, and student interests are mostly market driven. If we will have more hardware industries, students might be more interested in hardware :)

You have been through IIT Bombay and London South Bank University. What are the differences you see and the changes that you recommend?

While I was doing MTech at IIT Bombay, we as students were more keen in learning new things, as we were thrilled to enter an IIT. We used to take “unknown” courses, where good grades were not guaranteed, because most of these were with the top ranked BTech students.

Talking about the London South Bank University, I would comment on a PhD student’s life in UK. There were frequent technical interac ons with supervisors, and we also used to have frequent seminars among our peers within the university and across universi es. This gave us ideas about what others were doing, mo vated us to improve our research quality, and also to

increase the pace of our work.

I have always benefited, personally and professionally, because of my interest to learn new things and interac ng with peer groups. Are our present students doing this?

What do you advise to someone considering to pursue a PhD? Before pursuing a PhD, one must ask himself/herself some ques ons: Do I believe that PhD will open new avenues for me?

Am I commi ed to give 3-5 years of my life to solve ONE problem, with ONE supervisor :) ?

PhD is not a degree to be given, rather it is a degree to be earned. Hard work and sincerity are mandatory. Do not expect that you will do big inven ons in your PhD, it is just a process to learn how to do research.

Also note that, not having a job should never be a mo va on for doing a PhD.

What according to you will be the trend of our field for the coming ten years?

I am s ll a novice to predict the future. However I feel that the number of processors will definitely increase. We will have mul ple cores on our laptops 8,16,32,... ? Concurrent programming will be a norm. Programming for mul -cores will be as prevalent, as it is for C, C++ today. And I hope to see only one (remote controlled) device

Computer Science and Engineering Association, IIT Guwahati

Faculty Talk to operate all appliances and make phone calls. :)

What is your idea of a healthy faculty-student rela onship? What recommenda ons would you like to give to both faculty and students to improve the rela ons?

Rela onship can be healthy if there is freedom of expression for both par es. As the professor advises the students on technical ma ers, the student should reciprocate and even give a cri cal response if required. Being a technical ins tute, we must have good technical discussions with the students, but it should not stop there. The students should feel free to express their personal and social issues related to themselves and their community. And of course we should have fun together, picnics, par es, etc To improve faculty-student rela onship in our department, we can start at a smaller level by having technical get-together of students working in related areas, where the students can present their work and get inputs from faculty members apart from their supervisors.

most in our campus and would miss the most if you leave this place?

I am fond of water bodies, so lakes and The Brahmaputra river I will miss the most. I have a lake behind my house, which gives me the pleasure of watching flocks of migratory birds.

Any message that you would like to convey through the magazine ?

As BTechs you are too young to start earning. You have to explore more, learn more, which might not be possible 5-10 yrs down the line. For example higher studies is possible at the moment, but it may not be possible if you delay it longer. While taking any decision make sure that it will increase you avenues in the future and not limit them.

[Interviewed By] Kuppannagari Sanmukh Rao, B. Tech. 4th Year CSE, for CSEA

Call for Ar cles Since its incep on, the CSEA has conducted many workshops, lectures and programming contests to increase awareness regarding new technologies and the science behind them.

Linked List is yet another a empt to get closer to the fellow IITians. Linked List requires ar cles that maintain the originality and the quality of the magazine. Send in your ar cles to csea@iitg.ernet.in or contact the editorial team for any clarifica on.

Looking forward for an overwhelming response.

The ques on was: “What to do to improve the interac on?” …

“Just Interact!!!”

Leaving aside academics, what is it that you like the Linked List

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Computer Science and Engineering Association, IIT Guwahati

Digital Mind

07

Bluetooth Sniffing

By Gunjan Bansal, 3rd Year, B. Tech. CSE one packet per channel. Hoping sequence is determined by the clock and MAC address of master device.

Master device is the one that ini ates the connec on.

Data transfer takes place on alterna ve hops leaving intervening hops for acknowledgements. The difficulty in eavesdropping is thus in determining the sequence and hoping quickly enough. The data whitening is determined by lower 6 bits in master device clock. Thus if Bluetooth is widely used for confiden al communica- we have informa on on MAC address and clock of mason over short distances. Applica ons of Bluetooth in- ter device its easy to eavesdrop a connec on. To obclude Bluetooth headsets, synchroniza on, file transfer tain clock one can establish connec on to device, but etc. Bluetooth communica on is difficult to eavesdrop in order to that MAC address is required (remember because of frequency hopping and data whitening. undiscoverable mode). Thus much difficulty lies in deBluetooth sends data on different frequencies and termining the MAC address. Apart from this Bluetooth hops at around 1600 mes a sec. As this hoping se- dongles have no concept of `promiscuous’’ mode. quence is unknown to a acker it is difficult for him to Recently Dominic Spill and Andrea Bi au showed that eavesdrop unless he listens on all 79 channels concur it is possible to overcome these difficul es to recomently which is imprac cal considering hardware limi- pose the MAC address and unwhiten (unscrambling) ta ons. Data whitening (Scrambling of data) creates data on undiscoverable devices. Furthermore it was more hurdles in inspec ng the captured data or even observed that commercial Bluetooth sniffing packages know Bluetooth headers. Apart from this undiscover- are not ed to their hardware but have most of their able mode is available in many devices. In this mode sniffing capabili es implemented in so ware. Universal device doesn’t reveal its MAC address and only devices So ware Radio Peripheral (USRP) is hardware device with prior knowledge of MAC address can communi- associated with the GNU Radio project , which sets out to create an open source framework for implemen ng cate with our device.

Bluetooth is wireless protocol that operates at 2.4 GHz radio devices in so ware. This so ware was used to license free band. Eavesdropping a Bluetooth connec- demodulate and process Bluetooth packets that had on boils down to two variables unique for each de- been received by the USRP hardware. The USRP device i.e. MAC addresses and clock. The 3.2 KHz clock is vice consists of a motherboard, which has DACs and stored in 28 bit number and wraps in approximately 23 ADCs on it, and daughterboard’s which are able to rehours. Bluetooth hops over 79 channels to minimize ceive, and some mes transmit, over a specific band of interference and usually hops every 625 Us, sending frequencies. For eavesdropping on Bluetooth packets,

Disclaimer: - Most of the stuff in this ar cle is borrowed from “BlueSniff: Eve meets Alice and Bluetooth” wri en by Dominic Spill and Andrea Bi au of University of London. This ar cle aims at making theory easy to understand and use Bluetooth sniffing capabili es.

For Scien fic proofs please refer to link given at the bo om.

Digital Mind daughterboard used, is locked to the free 2.48GHz ISM band used by Bluetooth devices.

Cambridge Silicon Radio (CSR) based Bluetooth dongles that causes packets to be sent repeatedly on a single channel, which allows elimina on of variables such as channel hopping. The main parameters for the demodulator are the modula on index and the symbol rate given in the form of number of samples per symbol which can be found with the help of the CSR debug packets. The bandwidth of the USRP is approximately 5MHz and it is larger than a single Bluetooth channel, and with one daughter board 5 channels can be listened upon. As USRP can have 2 daughter boards, It can eavesdrop 10 channels. Therefore all 79 channels can be listed using 8 USRP’s. As all these channels need to be filtered, monitored and incoming data is ordered, high computa onal power is required.

further help, example being mobile phones and laptop computers. Mobiles are generally from Motorola/ nokia etc , whereas laptop Bluetooth are from other vendors.

A er MAC address is successfully determined, the clock is easily determined by connec ng to device. As the clock is global so knowing its value once will enable the a acker to listen on any connec on ini ated by device. Tools included in Linux Bluetooth stack (BLUEZ) are helpful for this task.

and Non-significant Address Part (NAP). The lengths of these parts are three, one and two bytes respec vely.

Determining LAP is straigh orward since it is present in the Bluetooth packet headers. When raw data is received from the GNU Radio, the start of a packet needs to be found.

can be made into a sniffing device. Many firmware’s are proprietary and we don’t have an access to them.

None the less the method explained by Kaept is awesome and really helpful for novices.

So far the discussion seems to be easy but how does one go about it ? A genuine ques on one might ask is, How do we listen a connec on if there is no concept of promiscuous mode In Bluetooth dongles ?

A do it yourself guide by Kaept’n Karacho explains the procedure of flashing Bluetooth dongle and loading it with custom firmware. This is really painstaking The MAC address is divided into three parts called the and some mes the user ends up with bricked dongle.

Lower Address Part (LAP), Upper Address Part (UAP) As the firmware’s are device specific, not all dongles

Not many so ware’s with GUI (at least in open source) exists which can club all these facili es in a single package. Umit’s PacketManipulator is one such so ware which enables user to eavesdrop a Bluetooth connecon with ease. It’s an extension of BTPincrack, a C library wri en which provides all the basic essen als of Bluetooth sniffing. Umit Network Scanner provides a tool named as Bluetooth Scanner which can be used to perform manufacturer iden fica on and service detec on of Bluetooth devices.

People interested in detailed reading can see http://www.usenix.org/event/woot07/tech/full_papers/spill/spill_html/ h t t p : / / w w w. e v i l g e n i u s . d e / w p - c o n t e n t / u p loads/2008/03/diy_bt_sniffer.pdf h p://darkircop.org/bt/bt.tgz h p://www.umitproject.org

The Upper Address Part (UAP) is not stored within each packet, and is only transmi ed as part of the handshaking procedure. However, each packet has a header with an error check field which is calculated from the UAP. The calcula ons can be run in reverse direc on and yield us UAP. None of the informa on in the packet is based on the NAP so there is no way to determine them from received packets. In prac ce, of the two bytes in the NAP, the first is virtually always zero. Thus, the remaining byte can be brute forced by sending at most 256 pings to all the possible remaining MAC address combina ons. IEEE assigns MAC address ranges to vendors to avoid address collisions. A complete list of address ranges is available and known as Organiza onally Unique Iden fier (OUI) list. UAP can used to filter out possible candidates from this list. Type of devices can Linked List

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Natural Selection

9

Clock-Less Chips Its time for the Clock-Less

Chips

By Rakesh Yarlagadda, 4th year, B.Tech. CSE

The present Clock-less companies believe that the “Asynchronous Design” or “Self Timed Circuits” can bring a revolu on intended to wrest computer chips from the constraints of the past. How? By throwing out the clock, the fundamental way that chips, since the dawn of the Computer Age, e, have organized and executed their work.

People, who know nothing about out micro processors, know something ng about their clocks – Intel for yearss has used the clock speed of its microprocessors as a marke ng tool. The number that dominates most computer ads, along with price, is a label like “1.3 GHz” (or gigahertz). That figure refers to the speed of the clock that governs the internal opera on of the machine’s microprocessor.

Within every one-gigahertz microprocessor, there lies an n oscilla ng crystal cking one billion on mes a second. Engineers are trained to design chips where their heir first considera on is ge ng work done before the next clock- ck comes around. ound. A chip without a clock would be aboutt as useful as a page of text without any space ace between the le ers. For most chip designers, throwing out the clock is difficult to imagine. “Designers are realizing that distribu ng a clock across ever more complicated

systems is becoming more and more difficult, and that sooner or later it won’t work,” says Alain Mar n, a professor of computer science at Caltech, who built the first clock-less microprocessor in 1989. He points out that as chips ch get more complex, more and more of the power it takes to run them gets ge eaten up by the clock itself, which now needs to coordinate the work of millions of transistors.

Dis Dispensing with this overhead co confers large advantages on aasynchronous chips. One is vvastly improved electrical efficiency, which leads directly to prolonged ba ery life.

The clock-less technology also yields an edge in compu ng speed. In labs at Sun Microsystems, Intel and IBM, clock-less chips have iincreased the pace at which h high-end processors do their w work. In 1997, Intel developed an asynchronous, Pen umcom compa ble test chip that ran three mes as fast, on half the power, as its synchronous synch equivalent.

The Path Not Taken The founders of modern computer technology contemplated asynchronous design as early as 1946.

But these early computer engineers chose instead to

Natural Selection go with a clock. “At the me, it was the right choice,” says Jo Ebergen, a senior staff engineer at Sun who works in an asynchronous research group headed by Sun fellow and vice president Ivan Sutherland. “The circumstances in which they had to design, using vacuum tubes and relay circuits, meant that they really couldn’t build a reliable computer without a clock governing the whole thing,” he adds. By using a clock, engineers could build in fail-safe measures that made computers reliable even when the parts they were made from weren’t.

By the 1960s, the no on of clock-less chips had all but disappeared—kept alive only by an esoteric paper or two coming out of universi es. In today’s chips, therefore, the clock remains the key part of the ac on.

As a microprocessor performs a given opera on, electronic signals travel along microscopic strips of metal—forking, intersec ng again, encountering logic gates - un l they finally deposit the results of the computa on in a temporary memory bank called a register. Let’s say you want to mul ply 4 by 6. If you could slow down the chip and peek into the register as this calcula on was being completed, you might see the value changing many mes, say, from 4 to 12 to 8, before finally se ling down into the correct answer.

That’s because the signals transmi ed to perform the opera on travel along many different paths before arriving at the register; only a er all signals have completed their journey is the correct value assured.

The role of the clock is to guarantee that the answer will be ready at a given me. The chip is designed so that even the slowest path through the circuit—the path with the longest wires and the most gates—is guaranteed to reach the register within a single clockck.

With a central mepiece governing the ac on, engineers don’t have to worry about the varying lengths of millions of infinitesimally small wires. Signals can arrive at the register in any order, as long as they all se le in before the clock next cks. Teams of hundreds of engineers can coordinate their work around the unifying principle of the clock. And we all benefit: the discipline of clock-based design has enabled the magic Linked List

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Natural Selection of exponen al growth in chip performance to endure for more than 30 years. But a er a point, cranking up the clock speed becomes an exercise in diminishing returns. That’s why a one-gigahertz chip doesn’t run twice as fast as a 500-megahertz chip.

of any synchronous design, but the design, tes ng and manufacturing systems that support conven onal microprocessor produc on s ll have about a 20-year head start on anything that supports asynchronous produc on. Anyone planning to develop a clock-less

The clock, through the work it must do to coordinate millions of transistors on a chip, generates its own overhead. The faster the clock, the greater the overhead becomes. The clock in a state-of-the-art microprocessor can consume up to 30 percent of the chip’s compu ng capability, with that percentage increasing at an ever faster rate as clock speeds increase. It’s as if a factory became overrun with stopwatch-wielding supervisors who improved efficiency but also took up more and more space held by workers and machines. Clocked chips are becoming serious power hogs, too: the job of coordina ng tens of millions of transistors at a billion cks per second requires the consump on of a lot of energy, most of which ends up as heat.

Clock-less to the Rescue By throwing out the clock, chip makers will be able to escape from this bind. Clockless chips draw power only when there is useful work to do, enabling a huge savings in ba ery-driven devices. Like a team of horses that can only run as fast as its slowest member, a clocked chip can run no faster than its most slothful piece of logic; the answer isn’t guaranteed un l every part completes its work. By contrast, the transistors on an asynchronous chip can swap informa on independently, without needing to wait for everything else. The result ? Instead of the en re chip running at the speed of its slowest components, it can run at the average speed of all components. At both Intel and Sun, this approach has led to prototype chips that run two to three mes faster than comparable products using conven onal circuitry.

chip will need to find a way to short-circuit that lead.

“If you get three mes the power going with an asynchronous design, but it takes you five mes as long to get to the market—well, you lose,” says Intel senior scien st Ken Stevens, who worked on the 1997 asynchronous project. “It’s not enough to be a visionary, or to say how great this technology is. It all comes back to whether you can make it fast enough, and cheaply enough, and whether you can keep doing it year a er year.”

Why, for example, did Intel scrap its asynchronous chip? The answer is that although the chip ran three mes as fast and used half the electrical power as clocked counterparts, that wasn’t enough of an improvement to jus fy a shi to a radical technology.

An asynchronous chip in the lab might be years ahead Linked List

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Computer Science and Engineering Association, IIT Guwahati

COVER STORY

12

BL UFF Search Google Without Letting it know what you are Searching !!!

Sai Shashank Burra, 4th Year, B.Tech. CSE What if you want to query a search engine, but don’t want to tell the search engine what you are looking for?

You might consider encryp ng your query, but if you use an ordinary encryp on scheme, the search engine will not be able to manipulate your ciphertexts to construct a meaningful response. What you would like is a cryptographic equivalent of a photograph developer’s “dark room”, where the search engine can process your query intelligently without ever seeing it.

the security parameter and the size of the func on f that you are compu ng, and the size output ciphertext grows only linearly with the size of f’s output (which is the best you can hope for). Although all algorithms run in polynomial me, there is s ll work to be done to make it truly prac cal.

Technically, Gentry begins by construc ng a “somewhat homomorphic” encryp on E that uses a mathema cal object called an “ideal la ce”. This scheme is somewhat homomorphic in the sense Or, what if you want to store your data on the internet, that E can handle only simple func ons -- i.e., it so that you can access it at your convenience? You can take encryp ons of m_1, ..., m_t and compute want your data to remain private, even from the server a valid encryp on of f(m_1, ..., m_t) only if f is in a that is storing them; so, you store your data in encrypt class of simple func ons. Gentry then shows how a form. But you would also like to be able to access your somewhat homomorphic encryp on scheme E can data intelligently -- e.g., you would like the server to be “bootstrapped” to construct a fully homomorphic be able to return exactly those files containing the encryp on scheme if E’s decryp on func on f_{Dec} word `homomorphic’ within five words of `encryp on’. is simple enough -- in par cular, if the complexity of Again, you would like the server to be able to “process” f_{Dec} is a li le bit less than the complexity of the simple func ons that E can handle. He then shows your data while it remains encrypted. that the decryp on func on in his ideal-la ce-based A “fully homomorphic” encryp on scheme creates encryp on scheme, with a few modifica ons, is simple exactly this cryptographic dark room. Using it, anyone enough to permit bootstrapping. can manipulate ciphertexts that encrypt data under some public key pk to construct a ciphertext that To understand fully homomorphic encryp on and encrypts *any desired func on* of that data under bootstrapping, the following physical analogy may pk. Such a scheme is useful in the se ngs above (and help. Suppose that the owner of a jewelry store (Alice) wants her employees to assemble raw precious many others). materials (diamonds, gold, etc.) into finished products, In 2009, Gentry proposed the first efficient fully but she is worried about the . She addresses the homomorphic encryp on scheme. It is efficient in problem by construc ng glove boxes for which only the sense that all algorithms run in me polynomial in she has the key, and she puts the raw materials inside.

COVER STORY glove box is something which you see in biotechnology labs or chemistry labs. Try googling if you s ll don’t get an idea. Using the gloves, an employee can manipulate the items inside the box. Moreover, an employee can put things inside the box -- e.g., a soldering iron to use on the raw materials -- even though he cannot take anything out. Also, the box is transparent, so that an employee can see what he is doing. (In this analogy, encryp on means that the employee is unable to take something out of the box, not that he is unable to see it.) A er the employee is done, Alice can recover the finished product at her leisure. This analogy approximates the sort of func onality that one obtains with fully homomorphic encryp on, but the analogy is inadequate in the sense that the glove box might become quite clu ered, whereas in the fully homomorphic encryp on scheme only the final product need remain.

property of E, along with the pk2-encoded copy of sk1 which you sent along, to undo the pk1 encryp on “inside” pk2. The next “li le extra” can used to homomorphically implement the next part of your func on; call this f2. And so on.

Informa on I is manipulated I --> f (I) without being decoded. The process uses a finite-depth homomorphic

Once you have a “homomorphic enough” encryp on algorithm E, Gentry explains how to homomorphically implement a func on f of arbitrary complexity; this is illustrated in the “bootstrapping” diagram below. You choose enough different (public key, private key) pairs so that the “li le extra”s add up to enough for your job. You encrypt the nth private key skn using the (n + 1)st public key pkn+1, and send them all along with your informa on I, which you have encrypted using pk1. Suppose pk1 has exhausted its homomorphic poten al, and has implemented the first steps of f ; call these f1. Your accountant over-encrypts f1(I) (already pk1-encrypted) using pk2, and uses the homomorphic encryp on algorithm E of the self-decryp ng type described by Gentry, with public keys pk1, pk2, ... and corresponding private (secret) keys sk1, sk2, ... the number depending on the complexity of f. The func on f is expressed as the composi on of f1, f2, f3, ... so that, for example, the complexity of f3 plus the complexity of the decoding algorithm decrypt: [sk2, pk2( f2 f1(I))] --> f2 f1(I) does not exceed the homomorphic depth of E. Each of the private keys sk1, sk2, ... is protected by encryp on with the next public key on the list.

The dashed arrows represent func ons implemented homomorphically on encrypted informa on.

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BONJOUR

14

Aatish Rathi Aatish, 4th Year B. Tech. CSE, tells us about his extra-internship activities during his summer internship

I am Aa sh Rathi, a 4th year B.Tech student of CSE Department, IIT Guwaha . I did my summer internship at FH Stralsund (Germany) under Prof Oliver Lueth on the project – “Development of Stock Market System for mid-sized companies in Germany and India”.

I applied for DAADWISE Scholarship for the funding of my intern and luckily I got it due to which I experienced the best summer of my life. This intern was like a dream intern for me as I was always looking for an opportunity to work on e-business sector.

will remain in my mind forever.

My professor was a very cool person, always smiling. I just wonder some mes that if all our IIT profs become like him, then educa on would be so much fun here.

Though I can proudly say that our IIT profs are at par with these western universi es prof in intellectuality but they should learn how to be more friendly with students.

Though I faced two major problems – one was language problem since I was living in a small city (there is no When I first reached Germany, I was surprised by few such problem in big ci es though) and the other was things like the opposite in finding pure vegetarian direc ons for vehicles food there( ) . But on road, switch on-off these seemed just very posi on, climate, strict small problems when I punctuality of train etc see the bigger picture – which were just opposite the country has got an to India. My city Stralsund excellent environment is a very small, yet for studies, excellent peaceful and beau ful culture, lovable and city near Bal c Sea. I friendly people, awesome roamed around various transport system and countries with my other infrastructure and what IITG friends. From the not. city of seven hills(Rome) to city of canals and Few things which I romance(Venice, though encountered and enjoyed we had no one to do a lot were my intern romance there ;) ), from city of lights and love (Paris) to work and learning about many cultures as I stayed Heaven on earth (Switzerland), from many wonderful in Interna onal guest house which had “beau ful” ci es of Germany like Berlin, Hamburg etc (not to forget people from 10 different countries. I was alone in my my sweet Stralsund) to lots of wonderful beaches(I flat but never felt lonely because of such wonderful hope you understood what I meant by “wonderful” :D and lovely neighbors cum friends from Columbia, Iran, ), the awesome memories of three months Euro tour Russia etc (luckily all gals ).

BONJOUR

One interes ng story which I would like to share with you :- When I first met my prof, he told me that “You have to work with Ruby”, and then a er seeing the wonderful expressions on my face, he understood that I had taken him wrongly , he immediately corrected me “she is not a sexy girl but ya definitely a sexy programming language” :P . And a er working on it for more than 2 months, I must admit that I found Ruby on Rails the best web development framework I have ever worked on. I don’t know why it is not so famous in India, (but very famous in Japan and all).

I had lots of memorable moments during the whole tour (in fact each and every moment was memorable) but if I would have to choose any two then they would be:1. Since I was the only Indian at that university and not many students there had met any Indian before, so my professor asked me to give a presenta on on India to his students and colleagues so that they would get to know more about India. I also realized that their knowledge of growing super power countries was limited to China, they had no idea about how fast India is also developing and other aspects of India. I took a week off from my intern work and prepared the presenta on on my country as it was a huge responsibility. I was represen ng my country for the very 1st me in my life. I got a great response from the audience for the presenta on and my professor told me that you were really successful in removing lots of myths and misconcep ons about India amongst us.

2. I spent the 2nd last day of my stay in Germany with my professor and his family. I went for a long drive with my professor to the countryside of Germany, enjoyed with his family; for the 1st me in their life they were ea ng pure vegetarian lunch (because of me ), played soccer and did horse riding with them and lastly I got an awesome recommenda on le er from him! (that was the biggest surprise )

•

•

others to get one.

One small but effec ve thing which I did before leaving for Germany was purchasing a gi having some Indian flavor for my professor and his family.

Believe me, when you will give this gi to your professor on the very first day of your meet, it makes lots of impression about you and also about India.

Lastly but the most important advice to all of you is “Always remember you are represen ng your country whenever you are in some foreign land.

So, all your ac vi es should be such that you give a posi ve impression to others about India and its people”.

With Best Regards Aa sh Rathi Email- aa sh@iitg.ernet.in

Well just to complete one formality, here are few advices and sugges ons to my juniors :•

Please have unity in your batch regarding internship.

Once you get an internship, please genuinely help

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GEEK CORNER

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By Ravi Tandon, 3rd Year, B. Tech. CSE them has not become a popular means of general purpose HCI. In our project we proposed a new technology that would make it easy for any applica on to enable speech and touch based user interac ons.

Introduction: Mul -Modal Interfaces are one of the most advanced means of interac on between humans and machines.

Over the last few decades, we have seen substan al advances in speech and touch recogni on technology.

Although there has been concerted eort to make human-computer interac ons (HCI) easy, combining

GEEK CORNER The Architecture

Speech Valida on: The architecture mainly consisted of : Interface for Valida on through XML files: Each word spoken is speech,touch followed by Listeners for speech touch, parsed through all the XML files to locate its category. followed by the Valida on and Gesture Builder Units. Then each according to the current Category we apply These were common to both Speech and Touch Raw a “Gesture Construc on Logic� to create a Gesture.

Gesture Listener Unit, Gesture Valida on Unit, Gesture This Gesture is then seman cally checked through the Builder Unit, Syntac c and Seman c Analyzer Unit. Rela onal XML files to check for the correctness of Gesture Combina on Unit does integra on of speech the Gesture setup if it is a unimodal Gesture or else is dispatched Combo-Gesture Handler. and touch gesture into one.

Touch Valida on: The Individual Parts are described as follows: The Raw Touch Gestures are handled in a simple 1)Raw Gesture Listener: There are two listeners, one each for Mode fashion. However, we defined hand movements for of input. Some Gesture-Interpreta on is done at the various gestures such as two finger rotate, zoom, flick, Gesture Build up phase. If the Gesture is intelligible tap, swing, etc. The values are subsequently calculated according to some pre-defined rule then it is dispatched for the various gestures and sent to the Combo-Gesture Handler. further else it is rejected by the listener itself.

3) Gesture Builder Unit: 2) Gesture Valida on: The Gestures are interpreted in terms of FiveIt occurs in two phases: Linked List

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GEEK CORNER The Application-Flow:

Categories. So, for example, if no new command is spoken the values can easily beover-ridden. Also the A ribute, Type, Keyword for a par cular command can be reset by any Mode of input itself. This gives great flexibility for use by the user. This builds the Gesture and Passes it on the last Analyzer Unit.

4) Seman c Analyzer Unit: We have pre-defined “Rela onal Rules” for the various commands in terms of The Five Category Fields. An example is as follows: This is an instance of the resize command and its associa on Table: This is used for error checking of the Gestures Build up finally.

Other Features: The applica on also supported Valida on through XML parsing, Contextual Feedback support and Intelligent Error – Correc on and Sugges on System.

The Design Methodology: Future Scope:

Each gesture was broken up into five separate parts: Command, A ribute, Value, Keyword, and Type. They were combined to give a result. Therefore any input that came from any mode of input was analyzed and appropriately added to the context to give a valid gesture. Therefore, any input from any mode (speech, touch) was interpreted as belonging to one of these categories or junk.

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Mul -Modal interfaces have a long way to go as far as Interfaces are concerned. I-phone APIs, Google’s Android’s APIs s ll do not combine gestures in a way we tried here. There are s ll no interface-designs available which can be easily extended to incorporate various combina ons of input modes such as Eye-Gaze and Touch or other combina ons. The field s ll holds a lot of promise for research opportuni es and further work.

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DIGITAL MIND

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Quantum Computing The New-Era of Computing D. Pramod, 3rd Year, B.Tech. CSE Our compu ng world is surrounded by breath-taking innova ons, and many of them involve more powerful and smaller chips. Chip capacity has doubled every 18 months, according to Moore’s Law, but the chip size remains constant. The number of transistors on a single chip is rising exponen ally also.If miniaturiza on con nues at the current rate, a bit will be represented by a single atom by the year 2020. This trend inevitably leads us into the micoworld of quantum effects, where classical rules no longer apply.A Quantum computer uses quantum mechanical proper es to perform opera ons on data. The basic principle behind quantum computa on is that quantum proper es can be used to represent data and perform opera ons on these data.

Qubit: The Bloch sphere is a representa on of a qubit.

A qubit is the fundamental unit of quantum compu ng.

It is analogous to a bit used in present day computers but a qubit in addi on has quantum mechanical proper es associated with it. Where a bit can only be 0 or 1 , a qubit can be 0 , 1 or a superposi on of both.

In simple words, a pair of qubits can be in any quantum superposi on of 4 states, and three qubits in any superposi on of 8. In general a quantum computer with n qubits can be in an arbitrary superposi on of up to 2n different states simultaneously (this compares to a normal computer that can only be in one of these 2n states at any one me). A quantum computer operates by manipula ng those qubits with a fixed sequence of quantum logic gates. The sequence of gates to be applied is called a quantum algorithm.

Challenges: Instead of performing computa ons by retrieving data from a hard disk and processing it using an integrated circuit filled with logic gates, quantum computers process data by bombarding the informa oncontaining molecule with short pulses of radia on.

Each bombardment cycle represents an algorithmic opera on on the data contained within the molecule.

When the algorithm terminates, the quantum state of the molecule is measured, but this itself alters the result (Uncertainty Principle in Quantum Mechanics) To circumvent this difficulty, quantum compu ng algorithms are run mul ple mes and the weighted average of the output asympto cally approaches the correct answer. Because quantum mechanical phenomena are inherently probabilis c rather than

DIGITAL MIND determinis c, a well-defined answer on the first try is not possible Because quantum compu ng uses such small instruments on which to store informa on, the data can become easily corrupted. In order to make quantum compu ng prac cal, an effec ve way must be devised to stabilize qubits so that their values will not change under normal circumstances. If the value does change, it will be to 0 or 1. This makes a qubit no more effec ve than a tradi onal bit.

calcula ons can be performed simultaneously

Shore’s Algorithm: Shore’s algorithm runs on quantum machine and enables factorisa on of large numbers exponen ally faster than in classical computers.For a number having K digits, Shore’s Algorithm runs in O(K^3).The major impact of this algorithm is in cryptography and network security. The RSA algorithm and other cryptography algorithms ( based on the factorising of large primes) would be broken with the evolu on of quantum computers.

Ultra-secure and Super-dense Communica ons It is possible to transmit informa on without a signal path by using a newly-discovered quantum principles, quantum teleporta on. There is no way to intercept the path and extract informa on. Ultrasecure communica on is also possible by super-dense informa on coding, which is a new technology in its own right. Quantum bits can be used to allow more informa on to be communicated per bit than the same number of classical bits.

Molecular Simula ons Richard Feynman showed in 1982 that classical computers cannot simulate quantum effects without slowing down exponen ally; a quantum computer can simulate physical processes of quantum effects in real me. Molecular simula ons of chemical interac ons will allow chemists and pharmacists to learn more about how their products interac on with each other, and with biological processes such as how a drug may interact with a person’s metabolism or disease.

Pharmaceu cal research offers a big market to such applica ons.

Applications: Advances in quantum computa on can exponen ally increase the compu ng power.Due to the probabilis c nature of the qubit , the qubit can exist in many states at once , hence using a quantum algorithm mul ple Linked List

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NOSTALGIA

Confessions of Back Benchers

By K. Sanmukh Rao, 4th Year, B. Tech. CSE I am a back bencher and not wish to share my woes with pray for my peace a er reading.

proud to be one. I you guys, please

The Tedious Machine: Theore cally it can solve any problem of the world, though I have no idea whether it would solve your problem of gf or not. But lets skip it, so I was saying that it can theore cally solve any problem of the world but prac cally none. To solve even the simplest problem, You have to rely upon that bulky magne c tape which is supposed to be infinite(God knows how!), and a greater problem is if the tape goes into an infinite loop, its not the tape’s fault, its actually tape’s method of saying, “What the hell! Cant you give me a correct input!”.

OK! even if I somehow figure out how to detect whether the tape is working or it is in an infinite loop, I have no guarantee that I would get my result in a reasonably good me. “Efficiency to Moh-Maya hai”. You should solve the problem, however inefficient it may be, just solve it. Just start the tape and let your grandson or great-grandson take the credit of the result.(Hope theres no syntax error).

Thank God those EC people came up with the idea of IC or I d have shi ed to arts or commerce .

The Non-Cooperating System: Those were the golden days when a computer used to have a single CPU, a single Memory, and a user was allo ed a me slot to get her job done.(Ya they used

to call processes by this name: jobs, how lame no!).

But this Turing guy had to use his god gi ed brain and come up with the concept of OS on the principle of The Universal Turing Machine.(Now dont ask me what it is, might be some kind of that tedious machine I spoke of before).

And so we have to study how to tame when “pro-

cesses go wild”!!!, how to distribute memory among the processes like we distribute sweets among children(believe my experience, children are a million mes more innocent when compared to processes) and how to keep the process in the illusion that they have 4GB of memory all for themselves while in reality we dont even provide them with more than a few Mbs. (I know it’s unethical!!).

And as if all that is not enough, we have to make sure that all of the 5 philosophers have their dinner,(If it was in my hands, I would have provided them with extra forks.), we have to make sure that those 3 chain smokers get to smoke without any problems,(I thought

NOSTALGIA

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smoking was banned in our IIT) and also we have to make sure that the lazy sleepy barber doesnt miss any customer in his slumber,(cant he have a bell or something for the customers to ring).

Considering the insanity of the processes, the foolishness of the kitchen staff, the obsession of the smokers and the indolence of the barber, I choose to not cooperate with this course.

Finding Nemo, the more you feel that you can do something like that only in dreams.

There is nothing anima ng about this course of anima on, oops I overrated it, its actually just a course of graphics which is supposed to be a base for animaons. I wish we had some graffi on the walls of our

Network-Timed out: When speaking of networks, speak as network administrators do. Its easy to imagine the class, Just imagine the AIR(All India Radio) Vivid Bhara Prasaran. With each class, the AIR broadcast centre begins its broadcast which lasts for 1 hour. And sooner or later or never, we radios(dumb nodes in terms of networks ) tune up to the correct signal. To respect the fact that we are IITians, Id like to give a be er tle than dumb radios.

So the class consists of some 70-80 IBM Desktops. The basesta on, a mainframe computer, with its monotonous broadcas ng, interrupted again and again by some of the desktops, reminds me of Lord Ganesha, scribe of story tellers, though in this case the story is more of network protocols and topologies. And among those 70 desktops, I am sure most of them have their OS as linux, stable and secure, so secure that some of them block their listening ports and dont even allow the broadcast to enter into the system. Dont know about others, but I sure do block my ports and so finally the basesta on gives up its desire to establish a connec on with me and declares a network- me-out.

class rooms or atleast I knew calligraphy.

P.S.: This ar cle is purely intended for humour with the hope that nothing offensive or misleading is extracted from its essence.

The Dreamworks: A suitable name for this course, for everything happens in dreams. You come to class to dream(some call it sleep but thats so wrong), you build a model of IITG in your dreams(which when coded in OpenGL as we do, has no resemblance to the real IITG even in dreams ), and the more you watch the movies like Avatar and Linked List

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Bird’s Eye View

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Concurrent Programs & the 3-Valued Logic Analyzer

By Sharvanath Pathak,3rd Year, B. Tech. CSE

Introduction: Concurrency today is one of the most exci ng & challenging fields in theore cal computer science.

Just for the sake of completeness I define concurrent programs before beginning.Concurent programs are those which are capable of running parallely, so they might not run in parallel if the processor is not mul core, s ll they are much more than isolated sequen al programs. Parallel programs are o en confused with concurrent programs, but there are subtle differences between the two.Which is, in certain context concurrent programs are reffered to as parallel programs. So concurrent programs are much more general than parallel programs because it can involve arbitrary and dynamic pa erns of communica on and interac on, whereas parallel systems generally have a predefined and well-structured communica ons pa ern which depends mostly on the opera ng system.Also word parallelism is generally used where several processes are involved in doing a single job.The two major aspects in the context of concurrent programming are correctness and performance.

It’s useless to talk about the applica ons of such a versa le concept and especially if some computer scien st finds them there are chances of being scolded.

Concurrency Bugs: The sequence of execu on of not only the higher level instruc ons but also the microinstruc ons is important when looking at the outcome of a concurrent program. Concurrency control errors may lead to generic safety property viola ons like nullpointer dereference, memory leak, data loss, dangling pointers, etc. I will explain some of them by examples.

The following is a sequen al c program that reverses a given list Z.

reverse (List z) { y = NULL; x = z →head; while (x != NULL) { t = y; y = x; x = x→next; y→next = t; } z→head = y; } Let’s see what happens if we execute the statements concurrently (which is not the case in this sequen al programs).You can easily no ce that if there are interferences errors like null-pointer dereference, memory leak are likely to occur .In fact if the last statement is not actually executed a er the end of loop it might not do the job at all which it was supposed to do. It is now trivial that concurrent code must look different than sequen al code. Also it is apparent that we need concurrency support right at the level of programming language to write efficient concurrent codes. It is known that Java supports concurrency but it is not always efficient, for reference one might look at new languages like X10(from IBM).

Concurrent data structures: Clearly the data structures cannot be implemented the same way in concurrent programs as they are implemented in non-concurrent programs. Let’s consider the following example of list implementa on of stack:

Bird’s Eye View

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In this case if we have push2(4,5) || push2(7,8) and then pop2() the result might be 8,5 whereas it should have been 4,5 or 7,8 if push2 had been atomic.

This calls for some concurrency control algorithms simplest of them being the locking of resources before using and releasing them a er use.

Following are some references to clever and intricate realiza ons of linearizabilty: 1. Op mis c concurrency control 2. Benign data races 3. CAS (compare-and-swap opera on) We summarize some of our goals in the context of concurrent programs now: 1. Verifica on of Generic safety proper es • Null-pointer dereference This is the non-concurrent implementa on of a stack.

• Memory safety No ce that if we have two pops in parallel it might lead to the viola ons we talked about like null-pointer 2. Data structure Invariants • acyclicity dereference, memory leak, dangling pointers, etc.

To be more precise we must have some criteria to • treeness judge whether a concurrent execu on is legal. Let’s • sortedness look at the concept of atomicity to understand what 3. Func onal correctness can be a possible defini on of a legal execu on in the 4. Linearizability context of concurrency.

Atomic opera ons are basically undivisible opera ons. Verification techniques: Atomic ac ons cannot be interleaved, so they can be We discuss about Sta c Verifica on here: used without fear of thread interference. A stricter Sta c program analysis computes (approximate) condi on Linearizability means opera ons should informa on about the dynamic (i.e., run me) behavior appear to execute in some sequen al order that is if of a given program sta cally (i.e., without running the A and B are two concurrent opera ons the result must program) be one of the two, sequen al execu on of A before B or sequen al execu on B before A. Let’s look at Non- State space explora on: linearizable pairs stack to get a be er understanding The basic idea of state space explora on is to of it: compute all reachable states and state changes of the void push2 (Stack *S, data_type v1, data_type * v2) system and represen ng these as a directed graph. The { push(s, v1); reachable = {}; push(s, v2); worklist = {ini al-state}; } while (worklist != empty) void pop2 (Stack *S, data_type * v1, data_type * v2) { { remove any x from worklist; *v2 = pop(s); if (x not in reachable) *v1 = pop(s); { } if (x in BadStates) { return error; pop (Stack s) { if (s→top != null) { t = s→top; v = t→data; s→top = t→next; free(t); return v; } else return null; }

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Bird’s Eye View

abstrac on. But then let’s consider the following code:

} add x to reachable; add successors(x) to worklist;

while (?) { f = new InputStream(); f.read(); f.close(); }

} } following code makes is clearer: But there might be an Infinite state space and that implies the algorithm may not terminate.

Abstract Interpreta on: Abstract Interpreta on is a powerful framework for formally addressing many aspects of sta c analysis.

Let the real state graph of a program be called concrete form. Then approxima on of one la ce (the “concrete” la ce) by another la ce (the “abstract” la ce) is abstract interpreta on.

As a simplest example the integers {1, 0,-2} are the concrete states (fields in case of classes) and the respec ve abstrac on approxima ons might be {+, 0,}.

But we usually need to abstract a set of states into a power set or singleton. Well the last idea trivially extends to them for example for the set {{2,1,3},{2,0,4}} of concrete states the power set abstrac on might be {{+,+,+},{-,0,+}} and the singleton abstrac on as {?,?,+}.We now look at A Parametric Shape Graph Analysis framework TVLA.

The abstract state graph is just f poin ng to combined node of f1 closed. Which raises a false cau on that a read might be erroneous? Hence we need more flexible and dynamic criteria for merging nodes.

TVLA achieves these using rela ons (Predicates) to represent concrete shape graphs.

The Rela ons of following types are defined: • x(u) which means does pointer x point to cell, • n(v1,v2) does the n field of v1 point to v2.

And many such obvious predicates are defined depending on the specific problem.

Formalizing TVLA: It Represents Concrete States By Logical Structures: Let P be a finite set of predicate symbols (nullary, unary, and binary predicate symbols).

A 3-valued logical structure over P consists of an universe U & an interpreta on func on i where : i(p) : {0,1,1/2} for every nullary symbol p in P i(p) : U -> {0,1,1/2} for every unary symbol p in P i(p) : U X U -> {0,1,1/2} for every binary symbol p in P.

TVLA (Three-Valued Logic Analyzer) The key technique here is to merge mul ple objects (nodes) together to get a summary node and ensure a sta cally bounded number of summary nodes.

Primi ve-typed field values and pointers are merged suitably. For example if there are two nodes A&B (with members a data and a pointer) with values 1& 2 and the pointer of A points to B then they can be combined to a node with data as the set {1,2} and pointer poin ng to itself. There might be various ways of combining pointers in other situa ons, this being the simplest example of them. But the ques on now is which nodes should be merged together? A widely used criterion is objects allocated at the same alloca on-site shall be merged together as it also guarantees a finite Linked List

One might wonder why we include ½ in the range and the answer is there are cases (especially a er abstrac on) when there is no clear answer to the predicate yes or no, i.e. it might be yes in some cases and no for some other. A simple example is suppose we have a unary predicate n (u) which means that the cell u appears on a directed n-cycle. Now suppose, the abstract graph is a node X poin ng to a combined node Y, then in this graph the n(X) is clearly 0.But we can’t say about n(Y) as for the first node of the combina on it is zero but there might be a cycle at the end and that means it’s non-zero for some nodes at the end. In this case the i(n)(X) takes the value ½ .

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Bird’s Eye View Now a er the abstract representa on of the concrete shape graph is obtained a Canonical abstrac on of this structure is done. Like Merge individuals with same values for all unary predicates (canonical name).So what we need is a set of predicates depending on the specific problem.

If A is the set of unary predicates. Then a er abstrac on the structure is guaranteed to be bounded with at most 2|A| individuals.

An example: Let’s consider the following code where SSL is a class and getEvent is func on which generates some data at each execu on. class SLL { Data d; SLL n; } while (true) { Data e = getEvent(); if(e.color==RED) insert(x, e); if(e.color==BLUE) insert(y, e); if(e.color==GREEN) { insert(x, e); insert(y, e); } }

So here the unary predicates which we would like to define are: x(v),y(v),GREEN(v),BLUE(v),RED(v),reach[x] (v),reach[y](v) and the binary predicates are n(u,v) , d(u,v).

The logical structure would then be the following.

and suppose an execu on gives rise to the following shape graph.

And the Final form a er abstrac on would be: Also I would suggest reading the following ar cle: Comparison Under Abstrac on for Verifying Linearizability(CAV 2007) Daphna Amit, Noam Rinetzky, Mooly Sagiv,Tom Reps, Eran Yahav.

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Brought to you by: Computer Science and Engineering Association, Department of Computer Science and Engineering, Indian Institute of Technology Guwahati Email: csea@iitg.ernet.in Website: http://csea.iitg.ernet.in

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Do not waste paper.

Mail in your sugges ons to csea@iitg.ernet.in. Visit h p://csea.iitg.ernet.in for more.