Total Harmonic Distortion Analysis of Diode Clamped Multilevel Inverter with Resistive and Inductive

IJSRD - International Journal for Scientific Research & Development| Vol. 4, Issue 04, 2016 | ISSN (online): 2321-0613

Total Harmonic Distortion Analysis of Diode Clamped Multilevel Inverter with Resistive and Inductive Load Akhila A1 Manju Ann Mathews2 Nisha G K3 PG Scholar 2Assistant Professor 3Associate Professor 1,2,3 Department of Electrical & Electronic Engineering 1,2,3 Mar Baselios College of Engineering and Technology Trivandrum, Kerala, INDIA 1

Abstract— Multilevel inverters are considered as one of the industrial solutions for high power medium voltage and power quality demanding applications due to reduced EMI and EMC issues, reduced total harmonic distortion, lower switching frequency etc. This paper presents the total harmonic distortion (THD) analysis of output current for three level diode clamped multilevel inverters for both resistive and inductive loads. The PWM technique used here is Sinusoidal Pulse Width Modulation (SPWM).By comparing the current THDs, the advantages of inductive load over the resistive load is confirmed. The simulations are performed using MATLAB/SIMULINK software and the results were presented.

Key words: Multilevel inverters (MLI), THD, SPWM, Multicell converters (MCs), NPC, EMI I. INTRODUCTION Inverter is a device which converts DC power to AC power at required output voltage and frequency levels. They are broadly classified into:  Single level inverters  Multilevel inverters Multilevel inverters are again classified into(a)Diode Clamped or Neutral Point Clamped (NPC),(b) Flying Capacitor or Capacitor Clamped,(c)Cascaded HBridges with isolated DC sources. Flying capacitors and Cascaded H-Bridges are referred to as multi cell converters (MCs) due to their modular structure.[1]-[2]. The main function of multilevel inverters is to synthesize a desired waveform from several levels of dc voltages. As the number of levels increases the output waveform has more number of steps so that it becomes similar to that of a sine wave. Therefore the total harmonic distortion reduces. Multilevel converters have several advantages over the conventional two level inverters which use the high switching frequency PWM. The two level inverters have high THD in output voltages, more switching stresses on devices, high electromagnetic interference as compared to the multilevel converters. So the multilevel inverters become the best choice at high power and power quality applications. The advantages of multilevel inverters over the conventional two level inverters are [3]-[5]:  Reduction in switching losses. ��  Low and EMI. ��  Low THD in output voltage.  Reduction in harmonic content of line to line voltages.

Among the three different topologies mentioned above diode clamped or neutral point clamped has been commonly used.In this paper the THD analysis of diode clamped or neutral point clamped multilevel inverters for resistive and inductive load is conducted. The research and

analysis of other topologies namely flying capacitors, Cascaded H-Bridges and modular multilevel converters is going on.

II. CONVENTIONAL TWO LEVEL INVERTER A. Basic Theory of Two Level Inverter The topology of three phase two level inverter is shown in below figure1.The switches S1, S3, S5 forms the upper leg and S2,S4,S6 forms the lower leg .Vdc represents the dc link voltage of the inverter. The main constraint in this topology is that no two switches of the same leg are turned ON at the same time as it shorts the DC bus. Therefore the switches in the upper and lower legs are complementary to each other.

Each switch will assume either +Vdc when it is connected to the positive bus and –Vdc when it is connected to the negative bus as shown in the figure 1.The PWM used here is SPWM. Va,Vb and Vc are the three phase reference voltages which are displaced at 1200 apart. The triangular wave is used as the carrier wave. The reference signal is having a frequency of 50Hz and the carrier signal is having a switching frequency of 10KHz.Both the signals have the same amplitude of 1V. The sine and the triangular waves are compared by using a comparator and the output pulses are fed to the positive switches S1,S3 and S5and the complementary pulses are fed to switches S4,S6 and S2 respectively.

Fig. 1: Schematic of two level inverter III. DIODE CLAMPED MULTI-LEVEL INVERTER A. Basic Theory of Diode Clamped Multilevel Inverter The topology of three phase three level diode clamped multilevel inverter is shown in figure1.TThe diode clamped converter is composed of two traditional two level voltage source converters stacked one over the other with some modifications[4].The three level converters consists of twelve switches, four switches per phase. Considering A phase the switches Sa1 and Sa3 are complementary and the

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Total Harmonic Distortion Analysis of Diode Clamped Multilevel Inverter with Resistive and Inductive Load (IJSRD/Vol. 4/Issue 04/2016/308)

switches Sa2 and Sa4 are complementary. And for B phase the complementary pairs are Sb1,Sb3 and Sb2,Sb4. And the corresponding in C phase. For an m level (m-1) capacitors,2(m-1) switches and parallel diodes and (m-1)(m2) clamping diodes are required. Considering A phase for obtaining positive voltage the upper switches Sa1 and Sa2 are ON, for obtaining negative voltage the lower switches Sa3 and Sa4 are ON and for obtaining zero level the middle switches Sa2 and Sa3 are operated.

signals have the same amplitude of 1V.The switching pulses is in such a way that in each phase the first and the third switches are complementary and the second and the fourth switches are complementary. The carriers for the first and second switches are1800 out of phase and the third and fourth switches are having a phase shift of 180 0.

The advantages of diode clamped multilevel converters are[4]:  Reactive power flow can be controlled  Efficiency is high because all the devices are switched at fundamental frequency.  As the number of levels is high the distortion level is low and the use of filters is unnecessary.  The disadvantages are[4]:  The number of diodes become extensively high with the increase in level  More difficult to control the power flow in each converter  For topologies with more than three levels the clamping diodes are subjected to increased voltage stresses.

IV. RESULTS AND DISCUSSION

Fig. 2: Three level diode clamped multilevel inverter The multicarrier phase shifted PWM technique is used in this topology. It is a type of Sinusoidal Pulse Width Modulation (SPWM). In this technique for an m level inverter (m-1) carriers are needed and the phase shift may vary according to the level of the inverter. The phase shift Ă˜s is given by

The THD analysis of three level diode clamped multilevel inverter for both resistive and inductive load is conducted using MATLAB/SIMULINK. Here the sinusoidal pulse width modulation (SPWM) with switching frequency of 10kHz is used as the basic modulation. The output load current and total harmonic distortion is obtained for different inverter topologies using the load values as R=1Ί,L=5.4mH,input DC source voltage 800V and dc link capacitors each 4700¾F.Since it is a resistive load the output voltage and current are in phase therefore their waveforms are similar .

Figure4 shows the simulink model of diode clamped multilevel inverter. Figure 5 shows the simulink model of three level diode clamped multilevel inverter. Figure6 shows the sinusoidal pulse width modulation. Figure 7 shows the diode clamped MLI simulink model for inductive load.

Figure 8 shows the PWM inputs. Figure 9 shows the PWM output signal for A phase. Figure 10 and figure 11 shows the inverter output line and phase voltage for resistive load.

Fig. 3: Phase shifted PWM technique for three level inverter 360 Ă˜s = ‌‌‌‌‌‌(1) m−1 where m is the level of the inverter. The phase shifted PWM technique for a single phase three level inverter is shown in figure 4.For the PWM the reference voltages Va, Vb and Vc are displaced at 1200 apart.

Va=Vm Sin (ωt)‌‌‌‌‌‌(2) 2đ?œ‹ Vb=Vm Sin( ωt- )‌.‌.‌‌(3) 3 2đ?œ‹

Vb=Vm Sin( ωt+ )‌‌.‌‌(4) 3 The triangular wave is used as the carrier wave.

The reference signal is having a frequency of 50Hz and the carrier signal is having a frequency of 10KHz.Both the

Fig. 4: Diode clamped MLI Simulink Model for R load

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Total Harmonic Distortion Analysis of Diode Clamped Multilevel Inverter with Resistive and Inductive Load (IJSRD/Vol. 4/Issue 04/2016/308)

Fig. 5: Three level Diode clamped MLI Simulink Model

Fig. 6: Sinusoidal PWM

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Total Harmonic Distortion Analysis of Diode Clamped Multilevel Inverter with Resistive and Inductive Load (IJSRD/Vol. 4/Issue 04/2016/308)

Fig. 7: Diode clamped MLI Simulink Model for L load

Fig. 11: Inverter output phase voltage for R load

Fig. 8: PWM inputs (reference and carrier waves} Fig. 12: Inverter output current for R load

Fig. 9: PWM output signal for A phase

Fig. 13: Inverter output current for L=5.4mH

Fig. 10: Inverter output line voltage for R load

Fig. 14: Inverter Output Current THD for resistive load

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Total Harmonic Distortion Analysis of Diode Clamped Multilevel Inverter with Resistive and Inductive Load (IJSRD/Vol. 4/Issue 04/2016/308)

Figure 12 and figure 13 shows the inverter output current for resistive and inductive loads respectively. Figure 14 and figure 15 shows the current THD for both resistive and inductive load respectively.

Fig. 15: Inverter Output Current THD for inductive load From the results it is clear that the current THD for resistive load is high compared to inductive load since the output of inductive load is a sine wave where as the output for resistive load is a stepped waveform. Therefore the harmonic distortion of sine wave is low compared to the stepped waveform. Table 1 shows the current THD analysis of diode clamped multilevel inverter for both resistive and inductive load.

Current THD(%) Sl Topology Resistive Inductive No load load Diode clamped or 1 5.72 0.54 Neutral Point Clamped Table 1: Comparison of current THD for resistive and inductive load

[5] Bose BK. “Power electronics—an emerging technology”.

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[6] A. Nabae, I. Takahashi, and H. Akagi, “A new neutralpoint clamped PWM inverter,” IEEE Trans. Ind. Applicant. Vol. IA-17, pp. 518– 523,Sept. /Oct. 1981.

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V. CONCLUSION The simulation of three level diode clamped multilevel inverter was carried out using multi carrier phase shifted pulse width modulation. From the above results obtained it is clear that the current THD for the inductive load is less compared to that of resistive load. Therefore by comparing the current THD the advantages of inductive load over the resistive load is confirmed.

REFERENCES [1] P.K.Chaturvedi, S. Jain, Pramod Agrawal “ Modeling, Simulation and, Analysis of Three level Neutral Point Clamped inverter using mat lab/ Simulink/Power System Blockst” [2] G.Bhuvaneshwari and Nagaraju “ Multilevel inverters – a comparative study” vol .51 No.2 March – April 2005.

[3] Tolbert. L. M and Pend. F. Z, “Multilevel Converter as a Utility Interface for Renewable Energy Systems,” IEEE Power Engineering Society Meeting, Vol. 2, pp.

1271-1274, 2000.

[4] Jose Rodriguez, Leopoldo. G.Franquelo, SamirKouro, Jose.I.Leon, Ramon.C.Portil. “Multilevel Converters an Enabling Technology for High power Applications,” IEEE Trans. Ind. Applicat., vol. 97, no. 11, pp. 17861816,Nov 2009.

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