A Review on Multilevel Inverter Topologies And Modulation Techniques

IJSRD - International Journal for Scientific Research & Development| Vol. 4, Issue 05, 2016 | ISSN (online): 2321-0613

A Review on Multilevel Inverter Topologies and Modulation Techniques Dhananjay S Nirwan1 Surbhi Shrivastav2 Alka Daharwal3 1 P.G. Scholar 2Head of Dept. 3Professor 1,2,3 Department of Electrical Engineering 1,2,3 WCEM, Nagpur (M.H.) Abstract— Multilevel inverters have been drawing attention in the recent years especially in the distributed energy resources area due to the fact that various batteries and solar cell can be connected through multilevel inverter to feed a load or the ac grid. Multilevel inverter becomes an alternative in the area of high- power medium-voltage energy control. Hence, Harmonic mitigation in multi-level inverters are to be considered very important task nowadays. For eliminating the harmonics lot of researchers have suggested modifications in the circuit topology and optimal selection of firing angle using various types of optimization algorithms.

This paper discusses a review application by different optimization techniques for harmonic mitigation in multilevel inverters. Finally the investigation on various multilevel inverter topologies, methods of elimination of harmonics and conclusion has also been discussed.

Key Words: Cascaded Multilevel Inverter, Genetic Algorithm (GA), H-Bridge, Multilevel Inverter, Particle Swarm Optimization (PSO), Total Harmonic Distortion (THD), Voltage Source Inverter (VSI), Uninterruptible Power Supplies (UPS), Hybrid Asymmetric Cascaded (HAC), Space Vector Pulse Width Modulation (SVPWM), Selective Harmonic Elimination Pulse Width Modulation (SHEPWM), Selective Harmonic Mitigation Pulse Width Modulation (SHMPWM), Cascaded H-Bridge Multilevel Inverter (CHMI) I. INTRODUCTION A multilevel converter is a power electronic device that synthesizes a desired output voltage from several levels of dc voltages as inputs. The multilevel inverter has been introduced since 1975 as alternative in high power and medium voltage. VSIs are to be mostly used in dc to ac applications motor drives, UPS systems, ac power supplies and synchronous motor drives, etc while CSI’s are to be used mostly as high power adjustable speed drives where four quadrant operation is necessary.[3] With an increasing number of dc voltage sources, the converter output voltage waveform approaches a nearly sinusoidal waveform while using a fundamental frequency-switching scheme.

Numerous topologies of multilevel inverter have been introduced and used extensively for various types of utilities and drives application. There are also proposed multilevel inverter which consists of less numbers of switches when compare to other types of conventional topologies which also results in reduction in cost due to reduction in switches[2].The hybrid asymmetric inverter (HAC) topology which is a new promising development in the world of multilevel inverter in which all the combination of various control schemes such as SVPWM,SHEPWM and SHMPWM is to be included which improves performances and efficiency.A HAC inverter is to be proposed by Author Sepahvand H.[5] Multi level starts from three level. As we increases the level more steps add to the synthesized waveform and as

the number of level increases the output voltage waveform becomes more sinusoidal. Consideration for superiority in performance the number of levels can be increases upto nine level. Various popular modulation techniques are to be proposed by Authors to eliminate the harmonics, to improve THD of inverter current and to get the effective results.

There are various modulation method for low switching frequency such as sinusoidal PWM and space vector PWM, e.t.c while for low switiching frequency space vector modulation and SHE technique can be used.[2].There are also drawbacks of above techniques such as SPWM can not able to eliminate lower order harmonics completely, space vector modulation can’t be applied to DC voltages if they are unbalanced, SHE methods includes more mathematical methods. Authors had selected one of the modulation technique from above as per their requirements to achive the desired results. A new filter strategy had also been proposed for reduction of harmonics that is using Active series filter which utilizes multiplier, integrator, amplifer and substraction circuit[6]. Mostly used method is selective harmonic elimination technique out of all the above methods. In this approach the solution of a set of nonlinear equations is to be formed and leads to identify a proper set of switching angles which are then used for application of turn-on and turn-off sequences of power semiconductor devices. For various assumed modulation index m, such equations may have lead to simple or multiple possible solutions, sometimes a single solution and sometimes no solution. The need is to take a proper guess at the starting of iterative method for more than 3 switching angles and that can be achived by plotting the approximate curve of locous of solution sets.

II. OVERVIEW OF MULTILEVEL INVERTERS AND THEIR TOPOLOGIES

Various topologies have been studied and introduced for numerous particular application. Following are the summarized multilevel inverter topologies. Cascaded HBridge Multilevel inverter (CHMI), Diode Clamp Multilevel Inverter (DCMI), Flying capacitor multilevel inverter (FCMI), Hybrid Multilevel Inverter (HMI), Generalized multilevel inverter and some special type of proposed multilevel inverter with the advantage of having low number of switches. Likewise every multilevel inverter having various advantage and disadvantage .Any multilevel inverter topology can be used according to requirement and desired results.

A. Cascaded Multilevel inverter (CHMI) In CMI output phase voltage is synthesized by sum of HBridge series output .number of levels is equals to twice the number of H-bridge plus one that is; N = (2M+1) Where, N=number of levels and M=numbers of bridges

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A Review on Multilevel Inverter Topologies and Modulation Techniques (IJSRD/Vol. 4/Issue 05/2016/039)

The sum of individual series H-bridge output voltage produces the output phase voltage of output stack.

Mostly this type of topology is to be proposed in research for high power application.

Fig. 1: Cascaded H-bridge multilevel inverter B. Diode Clamp Multilevel Inverter (DCML) In DCML each switch is to be controlled independently. An m-level diode clamp inverter typically consists of (m-1) capacitors or the dc bus and produces m levels of phase voltages. As number of level increases the synthesized output voltage waveform adds more steps producing a stair case wave which produces sinusoidal waveform with less harmonic distortion. A string of the series connected capacitors and a clamping diode used to clamp the voltage across non conducting switches. This series capacitors string is shared by all the phase leg and serves as the dc bus .As dc bus is shared by all the phases capacitance requirement of inverter gets reduced. The disadvantage is that the load distribution among the switches and capacitors is not equally in case of diode clamp multilevel inverter.

Efficiency is high because all the devices is switched at fundamental frequency. Reactive power flow can be controlled by using DCML.[8]

Fig. 2: Diode Clamped multilevel inverter

C. Flying Capacitor Multilevel Inverter (FCML)

Fig. 3: Flying Capacitor multilevel inverter This is somewhat new topology as compare to that of above two topologies. The figure 3 represents the simulink model of flying capacitor multilevel inverter.[9]This topology has plus point that it has an ability to regulate the flying capacitors voltage through redundant states selection even if the number of voltage levels are greater than three levels. It is possible to change the ratio of capacitor voltage which sacrifies the redundancy in order to improve the power quality by increasing the numbers of voltage levels. Real and reactive power flow can equally be controlled. The large numbers of capacitors enable the inverter to ride through short duration outages and deep voltage sags. It requires a single isolated dc supply voltage.

D. Hybrid Multilevel Inverter (HMI)

Fig. 4: Mixed level Hybrid multilevel inverter Nowadays there is a trend in power semiconductor technology in selection of power electronic devices in form of switching frequency and voltage with stand capability.

Fig.4 represents the model of hybrid multilevel inverter.[10] The main aspect of hybrid multilevel inverter is with several

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A Review on Multilevel Inverter Topologies and Modulation Techniques (IJSRD/Vol. 4/Issue 05/2016/039)

series connected cells which provide different dc voltage levels to optimized the power utilization of overall systems.As hybrid multilevel inverter can generate same number of output voltage levels with lesser power devices and dc sources compare to above classical topologies, the optimized type of multilevel proves more efficient .The advantage of this hybrid multilevel inverter topology is the requirement of dc source is less while the disadvantage is the topology of this inverter is more complex due to hybrid in structure.

E. Generalized Multilevel Inverter A series of new multilevel inverter topology is to be derived in addition with the above conventional multilevel inverter topologies.Fig.5 represents the modle of generalized multilevel inverter.[11] It is used to balance each type of circuit automatically by itself regardless of reactive or active power conversion or load charaterstics..In this topology extra switiching states for middle voltage level can be realize which are not possible for highest and lowest voltage level.

Fig. 5: Generalized n-level multilevel inverter

There are various special type of proposed multilevel inverter as per the requirement of desired results such as inverter which consists of less number of switches compared to above convectional multilevel inverter topologies. As in this topology the initial cost considerably reduces because of reduction in switches, controlling became easier and weight of overall inverter also decreases and due to elimination of harmonics losses has also reduced to a particular extent. The figure below is the seven level proposed multilevel inverter by author B.Ashok, A.Rajendran which requires the same numbers of switches equal to number of levels.[2] III. OVERVIEW OF HARMONIC ELIMINATION METHOD IN MULTILEVEL INVERTERS

Now a days topologies of multilevel inverter are developing which results in more complexity in structure and requirement of application which is for high frequencies mostly in case of derived application. This results in modification in modulation techniques which is used to produce a staircase waveform as shown in fig.

Fig. 7: Output voltage of multilevel inverter As the number of level increases the voltage waveform becomes more sinusoidal and there wiil be reduction in harmonic content in fundamental frequency of voltage and current waveform. So various modulation techniques have been proposed in order to eliminate the harmonics and to improve the total harmonics distortion in inverter current current or voltage. Some of the modulation methods proposed by various researches as per the requirement represents in above block diagram.

F. Special Type Of Proposed Multilevel Inverter

Fig. 8: Classification of modulation strategies

Fig. 6: Seven Level Proposed multilevel inverter

A. Selective Harmonic Elimination Technique As compare to other modulating methods selective harmonic elimination technique can be able to produce high quality power output at fundamental switching frequency.Some

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A Review on Multilevel Inverter Topologies and Modulation Techniques (IJSRD/Vol. 4/Issue 05/2016/039)

switching angles per quarter fundamental cycle are predefined and evaluated earlier via Fourier series expansion to ensure the elimination of undesired low-order harmonics [12].

Where: Hn is the amplitude of nth harmonic of waveform Vk is the kth level of DC voltage and α k is the switching angles.

The condition: α1 < α 2 <…< α m < π/2 must be satisfied, so as to make the harmonics that will be reduced to zero. With this operation, a voltage waveform converted in a staircase waveform. There are various proposed methods by researchers to find out the switching angles; that is resultant theory, optimal methods, optimization search, Walsh function, homotopy based computation. The drawback of this technique is that it provides less range of modulation index.

B. Carrier Based Modulation: The common PWM techniques have been further developed by using multiple carriers to have a control on power switch where a low frequency fundamental reference waveform is to be compared with high frequency carrier waveform.

Various carrier waveform are to be used ;that is triangular ,saw tooth and trapezoidal waveform. The sinusoidal carrier based PWM is to be mostly used in the literature .there are two types of carrier arrangement ; Phase shifted PWM and Level shifted PWM. 1) Phase Shifted PWM Between the carrier signals a phase shift is to be introduced so as to produce phase shifted switching pattern so that a staircase waveform is to be generated for a converter of one cell,. A carrier shift of 180º/m for Cascaded H-Bridge multilevel inverter and of 360º/m for Flying Capacitor multilevel inverter is introduced across the cells to generate a staircase multilevel output waveform with reduced distortion, where m is the number of cells. Mostly this technique is to be used with CHB and FCMI as each cell is modulated independently.

Fig. 9: Representation of five level PSPWM waveform 2) Level Shifted PWM It is the development of bipolar PWM where only one carrier signal is to be compared to reference. For a multilevel inverter (m-1) carriers are required. There are to be arranged in vertical shift where each carrier is to be set between two voltage levels , so it is called level shifted PWM. There are three alternatives that are mostly used.  All the carriers are in phase diposition (PD)  All the carriers above zero reference are in phase ,but in opposition with those below(POD)



All the carrier are alternatively in opoosition disposition (APOD).

Fig. 10: Representation of Carrier and Reference waveform C. Space Vector Modulation PWM Technique: In SVM the desired vector is depend on volt-second balance. Here we have to approximate the reference vector using various nearest switching vectors. The desired vector is synthesized using neighboring nonzero vector of desired vector and zero vectors.

SVM for multilevel inverter, the algorithm is basically a PWM strategy with various switching times, which are computed based on three phase space vector representation of the reference and the inverter switching states instead of the per-phase in time representation of the reference and the output levels. It involves expressing a reference voltage (Vref) in a vector form and by matching it with discrete switching states, the reference voltage simulated at the inverter output[13]. With increasing n, redundant switching states and the complexity in the algorithm (selecting the switching state) and mathematical computation also increase significantly [14]. Vref as shown in given fig.9 can be obtained by computing the corresponding duty cycles Tj, Tj+1, and Tj+2 [13]

Fig. 11: Space Vector Modulation[13] IV. CONCLUSION The review of different recent modulation techniques which can be used for elimination of multilevel inverter and different topologies od multilevel inverter used by the researchers has been discussed. Apology for not inclusion of all papers because of space constraints .Definitely this paper will serve as a valuable resourse for any future work related to harmonic elimination in multilevel inverter.

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REFERENCES [1] Jagdish Kumar, Biswarup Das,” Selective Harmonic Elimination Technique for a Multilevel Inverter”, Fifteenth National Power Systems Conference (NPSC), IIT Bombay, December 2008.

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[3] José R. Espinoza, Géza Joós, Johan I. Guzmán, Luis A. Morán,” Selective Harmonic Elimination and Current/Voltage Control in Current/Voltage Source Topologies:A Unified Approach”, IEEE transactions on industrial electronics, vol. 48, no. 1, february 2001.

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978-98 [14] J. Rodriguez, J. S. Lai, and F. Z. Peng, “Multilevel inverters: Survey of topologies, controls, and applications,” IEEE Transactions on Industry Applications, vol. 49, no. 4, pp. 724-738, Aug. 2002.

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[19] Leon M. Tolbert, John Chiasson, Keith McKenzie, Zhong Du,” Elimination of Harmonics in a Multilevel Converter with Non Equal DC Sources”, 0-7803-77680/03/$17.00 (C) 2003 IEEE 589.

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