Cascaded H-Bridge Multilevel Inverter Based DSTATCOM for Mitigation of Harmonics to Improve Power Qu

IJSRD - International Journal for Scientific Research & Development| Vol. 4, Issue 05, 2016 | ISSN (online): 2321-0613

Cascaded H-Bridge Multilevel Inverter based DSTATCOM for Mitigation of Harmonics to Improve Power Quality Sameer G. Attar1 Ritesh R. Ulhe2 Prof. J. O. Chandle3 1,2,3 Department of Electrical Engineering 1,2,3 VJTI, Mumbai Abstract— The increased rate of power electronics devices is mostly in distribution side can cause the current and voltage distortions in the power system results disturbed power quality. It is very much important to give attention on PQ issue, negligence may cause severe damage to the system.

Due to some situations like active and reactive power exchange, balancing the load condition, harmonics, sag, swell, different kinds of faults and so on causes the systems power quality. Non linear load is the major cause for the production of harmonics in the system. To amplify these situations need of CPD like DSTATCOM. In that CHB based 7 level DSTATCOM is a high power device used to mitigate harmonics distortions to reduce the PQ problems and improve power factor. In this proposed work LSPWM technique supports to CHB for the applications of DSTATCOM. The reference current signals for generation of switching signals of multilevel inverter are obtained using SRF theory. THD calculated of non-linear load and compared with and without DSTATCOM. This work has been simulated in Matlab/Simulink environment.

Key words: Power Quality (PQ); Custom Power Devices (CPD); Distribution static compensator (DSTATCOM); Cascaded H-Bridge Multilevel Inverter (CHB); Synchronous Reference Frame(SRF); Level Shift Pulse Width Modulation (LSPWM); Total Harmonic Distortion (THD) I. INTRODUCTION Modern power systems are of complex networks, where hundreds of generating stations and thousands of load centres are connected through long power transmission and distribution networks [1]. Years ago there was no attention on the power quality issues as there were no such complex networks but due to increased rate of new technology introducing of various semiconductor power devices like IGBTs, MOSFETs, IGCTs, STATCOM as the compensating devices to eliminate the power quality issues generating from the non-linear loads. Non-linear loads/equipment consist large number of semiconductor switches which is nothing but the major cause of disturbed current and voltage waveform in the system. These distorted waveforms are considered as harmonics. The introduction of harmonics in the utility system leads to greater power losses in distribution networks, over loading, overheating and failure of power factor correction capacitors [2].

Static var compensators (SVCs) were widely used in 1970 to enhance the performance of system in the power industries. Due to increased development in power switching element such as IGCTs, STATCOM, IGBTs has been identifying as next generation compensators. The device distribution level static synchronous compensator (DSTATCOM) is a new generations and developed compensator. As compared to other compensating devices it has much better and quick response.

Many devices can use for compensation but in this paper cascaded MLI based DSTATCOM is used. Multilevel inverters are most advanced and latest power electronic converters that gives desired output from several dc voltage levels.

There are three types of multilevel inverters/converters such as 1) Diode clamped multilevel inverter, 2) Flying capacitor multilevel inverter, 3) Cascaded H-bridge multilevel inverter. The CHB inverter is used for constructing the DSTATCOM due to its harmonic mitigation without having voltage unbalance problem, simple structure this type of inverter suitable for the compensator [7].

Synchronous reference frame (SRF) theory used for the control strategy. This paper presents compensating device DSTATCOM with use of proportional integral controller based CHB along SRF control strategy simulated and total harmonic distortion compared with the linear and non-linear load.

II. DESIGN OF MULTILEVEL INVERTER BASED DSTATCOM A. Basic Configuration of DSTATCOM DSTATCOM is a shunt connected custom power device. The fig.1 shows the configuration of DSTATCOM. The primary aims of device like power factor correction, current harmonic filtering, load balancing etc. It is connected near to the load at distribution system. It consist of voltage source or current source PWM converter along these units control scheme, energy storage unit, filter and injection transformer also the part of the device. The output of DC link is the input for the multilevel inverter which is connected to the line near the load through the filter and injection transformer [7]. The purpose of energy storage device is to supply necessary energy to the VSC via DC link for the generation of injected voltage which helps to compensate the distortions present in the system.

Fig. 1: Structure of DSTATCOM connected to the line distribution system Injection transformer so designed that it attempts to limit the coupling noise and transient energy from primary

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Cascaded H-Bridge Multilevel Inverter based DSTATCOM for Mitigation of Harmonics to Improve Power Quality (IJSRD/Vol. 4/Issue 05/2016/070)

side to secondary side. It takes output of multilevel inverter and injects into the supply voltage after filtering harmonics by using filter circuit.

B. Cascaded H- Bridge Multilevel Inverter Fig. 2 shows the single phase cascaded H-bridge inverter.

Using this CHB inverter model we can get upto 3 voltage levels. The output voltage levels of CHB can be find out by using 2n+1, whereas voltage step of each level find out by using Vdc/2n,where n is the no. of H-bridges connected in cascaded [1].

the table we can easily understand the operation of the inverter [9].

Switches turn ON Voltage Level S1,S2,S6,S8,S10,S12 Vdc S1,S2,S5,S6,S10,S12 2Vdc S1,S2,S6,S8,S9,S10 3Vdc S2,S4,S6,S8,S10,S12 0 S3,S4,S6,S8,S10,S12 -Vdc S3,S4.S7,S8,S10,S12 -2Vdc S3,S4,S7,S8,S11,S12 -3Vdc Table 1: Switching states III. REFERENCE CURRENT CONTROL SCHEME Fig.4 shows the block diagram of Synchronous Reference Frame (SRF) theory. This theory includes the PLL circuit for unit vectors generation and also controller for voltage regulation. It is used to get the reference current from the distorted current waveform.

Fig. 2: Single cascaded H-bridge inverter circuit In this inverter operation case one when switches S1 and S2 becomes turn ON we get the voltage Vdc. In second case switches S3 and S4 turn ON we get the negative Vdc and when switch S4 and D2 turn ON we get no voltage level.

Fig 3. Shows the configuration of the seven level CHB multilevel inverter. In multilevel inverter harmonics can be reduced by increasing the number of output voltage level.

The cascaded H-bridge multilevel inverter is very simple in construction and requires less clamping diodes, capacitors as compared to diode clamped and flying capacitor multilevel inverter.

Fig. 3: Seven level CHB multilevel inverter Here we have twelve switches but at any switching state only two switches will ON and OFF at voltage level of Vdc/3 so switching losses will reduce. Below table shows the switching states of seven level CHB multilevel inverter. From

Fig. 4: Block diagram of Synchronous Reference Frame Theory In this, load currents iLa , iLb , iLc are transformed into synchronous or rotating frame using park’s transformation [2].

2π 2π sin θ sin(θ − ) sin(θ + ) iLa 2 id 3 3 i [i ] = [ 2π 2π ] [ Lb ] (1) 3 q cos θ cos(θ − ) cos(θ − ) iLc 3 3 Now reference frame rotates with the fundamental currents resulting time variant currents and the fundamental frequencies are constant. Current component has average value and oscillating value that is, id = i̅d + ĩd iq = i̅q + ĩq (2) These id and iq currents passed through a low pass filter so the dc component will automatically eliminate in the non-linear load current. This required current added into d-q current. Here currents which were in two phases again transformed back into its pervious phases. The output current is nothing but the required reference current is given by, sin θ cos θ iSa ∗ 2π 2π ∗ sin(θ − ) cos(θ − )] [id ] [iSb ] = [ (3) 3 3 iq 2π 2π ∗ iSc sin(θ + ) cos(θ + ) 3 3 The reference signals iSa ∗ , iSb ∗ , iSc ∗ which we have obtained are compared with the actual load currents in the comparator. The output signal acts as a gate signal for the switches of the multilevel inverter [2].

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Cascaded H-Bridge Multilevel Inverter based DSTATCOM for Mitigation of Harmonics to Improve Power Quality (IJSRD/Vol. 4/Issue 05/2016/070)

IV. PULSE WIDTH MODULATION TECHNIQUES FOR CHB INVERTER

There are two most popular methods used for gate signal generation in the multilevel inverters. These are 1) Level Shifted PWM 2) Phase Shifted PWM The level shifted PWM modulation has three types 1) In phase disposition 2) Phase disposition opposition 3) Alternate phase opposition disposition

The above model consist of 11 KV voltage source, it is connected to the load. As the load is non-linear in nature voltage swell occurs. Due to voltage swell level of voltage will increased for a small time. In fig 6.no compensating device is connected. Voltage swell can cause due to system fault, deenergization of very large load.

Fig. 7: Source Voltage without DSTATCOM

Fig .5: Level Shifted Carrier PWM Fig.5 shows the level shifted carrier pulse width modulation.

Out of these three types In Phase Disposition technique used in this work. From fig.5 we can see all the phases are in phase.

The required number of carrier waveform can find by m-1 where m is the number of output voltage level. Consider that if we have 5 level CHB inverter requires four triangular carrier waveforms. In this carrier waveform is continuously compared with error signal to provide gate signal to the multilevel inverter [8].

Fig. 8: Source Current without DSTATCOM

Fig. 9: Load Voltage without DSTATCOM V. MATLAB/SIMULINK MODELING AND SIMULATION RESULTS

Fig.6 shows the matlab model of power circuits without DSTATCOM. This power circuit consist of programmable voltage source, voltage – current measurement and non-linear load. The parameters of system for simulation study are source voltage of 11 Kv, 50 Hz AC supply, Inverter series inductance 10 mH, Source resistance of 0.1 ohm and inductance of 0.9 mH. Load resistance 60 ohm and inductance 30 mH are chosen

Fig. 10: Load Current without DSTATCOM A. THD Analysis Without DSTATCOM

Fig. 6: Simulink model of Power Circuit without DSTATCOM

Fig. 11: THD of Source voltage and Source current without DSTATCOM

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Cascaded H-Bridge Multilevel Inverter based DSTATCOM for Mitigation of Harmonics to Improve Power Quality (IJSRD/Vol. 4/Issue 05/2016/070)

Fig. 17: Load Current with DSTATCOM B.

THD Analysis with DSTATCOM

Fig. 12: THD of Load voltage and Load current without DSTATCOM

Fig. 18: THD of Source voltage and Source current with DSTATCOM

Fig. 13: Simulated power circuit with DSTATCOM

Fig. 14: Source Voltage with DSTATCOM

Fig. 19: THD of Load voltage and Load current with DSTATCOM System Source Source Load Load condition voltage current voltage current THD without 0.42% 1.76% 5.01% 1.76% DSTATCOM THD with 0.00% 0.00% 0.18% 0.00% DSTATCOM Table 2: Result Analysis VI. CONCLUSION

Fig. 15: Source Current with DSTATCOM

In this work CHB multilevel inverter based DSTATCOM developed and investigated by the simulink with non-linear load. The source voltage and source current, load voltage and load current simulated with and without DSTATCOM under non-linear load. From the results it is very clear that there is an improvement in the power factor so as in power quality.

REFERENCES

Fig. 16: Load Voltage with DSTATCOM

[1] J. Ganesh Prasad Reddy, K. Ramesh Reddy, “Design and Simulation of Cascaded H-Bridge Multilevel Inverter Based DSTATCOM for Compensation of Reactive Power and Harmonics”, IEEE 1ST International

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Cascaded H-Bridge Multilevel Inverter based DSTATCOM for Mitigation of Harmonics to Improve Power Quality (IJSRD/Vol. 4/Issue 05/2016/070)

Conference on Recent Advances in Information Technology [RAIT]-2012.

[2] Mrs. M. Kala Rathi “PI Control of Multi Level Inverter Based Shunt Active Power Filter for Harmonic Mitigation in Three Phase Systems” 2015 International Conference on Circuit, Power and Computing Technologies [3] Karuppanan P and Kamala Kanta Mahapatra “Shunt Active Power Line Conditioners for Compensating Harmonics and Reactive Power”-Proceedings of the International Conference on Environment and Electrical Engineering (EEEIC), pp.277 – 280, May 2010 [4] Bhim Singh, Kamal Al-Haddad & Ambrish Chandra, “A New Control Approach to 3-phase Active Filter for Harmonics and Reactive Power Compensation”-IEEE Trans. on Power Systems, Vol. 46, NO. 5, pp.133 – 138, Oct-1999 [5] S. Iyer, A. Ghosh and A. Joshi, “Inverter Topologies for DSTATCOM applications-A Simulation Study,” Elect.

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[6] W. K. Chang, W. M. Grady, Austin, M. J. Samotyj “Meeting IEEE- 519 Harmonic Voltage and Voltage Distortion [7] Constraints with an Active Power Line Conditioner”IEEE Trans on Power Delivery, Vol.9, No.3, pp.15311537, 1994 [8] Wei-Neng Chang, Jing-Huan Liau,“Development of a Cascaded Multilevel DSTATCOM for Real-Time Load Power Factor Correction”, The 2010 International Power Electronics Conference.

[9] S. B. Sakunde1, V. D. Bavdhane2,“Level Shifted Pulse Width Modulation in Three Phase Multilevel Inverter for Power Quality Improvement” International Journal of Science and Research (IJSR) ISSN (Online): 2319-7064 [10] Nasreen M. Iqubal, “Current Compensation using Modified Seven Level Multilevel Inverter based DSTATCOM”, 2014 International Conference on Advances in Green Energy (ICAGE) | 17-18 December 2014 | Trivandrum.

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