IPC APEX EXPO 2013 Conference Brochure by IPC

CONFERENCE & EXHIBITION ®

February 19–21, 2013 San Diego Convention Center

INFORMATION that INSPIRES INNOVATION

The Premier Electronics Industry Conference and Exhibition www.ipcapexexpo.org

design | printed boards | electronics assembly | test and printed electronics

INFORMATION that INSPIRES INNOVATION

IPC APEX EXPO® —

There’s no other event like it in the world!

Technical Conference • Exhibition • Professional Development • Standards Development • Certification Get Inspired! Join thousands of your peers from more than 50 countries at IPC APEX EXPO® 2013 in San Diego. Engage with Leaders! Witness the latest advances in technology, materials and processes firsthand. Learn from the world’s top experts in electronics manufacturing, industry thought-leaders, and technology visionaries. Drive Your Continued Success! Get the tools, expertise, knowledge and contacts to keenly address your challenges, both technical and competitive. THIS EVENT IS … Produced by: IPC — Association Connecting Electronics Industries®

Supported by: China Printed Circuit Association (CPCA) European Institute of Printed Circuits (EIPC) Hong Kong Printed Circuit Association (HKPCA) International Electronics Manufacturing Initiative (iNEMI) Indian Printed Circuit Association (IPCA) JPCA-Japan Electronics Packaging and Circuits Association

Japan Robotics Association (JARA) JEDEC Solid State Technology Association Korea Printed Circuit Association (KPCA) Microelectronics Packaging and Test Engineering Council (MEPTEC) Organic and Printed Electronics Association Surface Mount and Circuit Board Association (SMCBA) Taiwan Printed Circuit Association (TPCA)

TABLE OF CONTENTS

WELCOME__________________________________________________________________ 1 Schedule of Events _______________________________________________________ 2 Exhibitors _______________________________________________________________ Hand Soldering Competitions_____________________________________________

On the Show Floor _______________________________________________________ Networking Opportunities _______________________________________________

6 8

Keynote Sessions ________________________________________________________ 9 Programs for Designers ________________________________________________ 10 Programs for Executives_________________________________________________ 11 BUZZ Sessions ___________________________________________________________ 12 IPC Technical Conference ________________________________________________ Professional Development Courses ______________________________________ Standards Development Meetings ______________________________________ Hotel__________________________________________________________________

13 19

35 43

Travel _________________________________________________________________ 44 Registration Options _________________________________ inside back cover The show, conference and meetings will take place at the San Diego Convention Center, 111 W. Harbor Drive, San Diego, California USA.

www.IPCAPEXEXPO.org

WELCOME

Inspiration, innovation and a rock star await ... Dear Colleague, For me, IPC APEX EXPO 2013 is all about creating the perfect environment to learn from peers, pick up new ideas and get excited about the future. Bring your colleagues and meet the industry experts and thought leaders at our industry’s premier event for learning, networking and leadership. I am very excited about this year’s keynotes. What a great lineup! Rock star theoretical physicist Dr. Michio Kaku will provide Tuesday’s opening keynote address — a vision of life in the year 2100 from the amazing to the mundane. On Thursday, IPC has lined up B. Gentry Lee, chief engineer for the Mars Curiosity rover mission. If you love space exploration as much as I do, hearing from someone who has been so deeply involved in leading this milestone of human achievement is a can’t miss event. Throughout IPC APEX EXPO, you’ll discover activities and information to enhance your knowledge, but most of all, you’ll meet great people. Take the time to develop new business relationships, build your contacts and your network, and exchange ideas. I am confident that at IPC APEX EXPO, you’ll find new ways to solve challenges, suppliers that can help you fix problems and save money, and new business opportunities for your company. Don’t miss out on ideas that can literally help you change the future for your company and your career. Sincerely,

Steve Pudles CEO, Spectral Response LLC and IPC Chairman

NEW IN 2013 KEYNOTES

Rover Taking ide! for a R B. Gentry Lee — Mars Curiosity Mission

Rock Starsicist! l Phy Theoretica Dr. Michio Kaku

Printed Board Assembly Cleaning & Contamination Center

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IPC Hand Soldering World Championship INFORMATION that INSPIRES INNOVATION

SCHEDULE OF EVENTS

Sunday, February 17 8:00 am–6:00 pm IPC Standards Development Committee Meetings 9:00 am–5:00 pm Professional Development Courses

Monday, February 18 7:30 am–1:30 pm

Designers Forum

7:30 am–9:00 pm IPC PCB Supply Chain Leadership Meeting & Dinner 7:30 am–9:00 pm IPC EMS Management Council Meeting & Dinner 8:00 am–5:00 pm IPC Standards Development Committee Meetings 9:00 am–5:00 pm Professional Development Courses 12:00 pm–1:30 pm Event Awards Luncheon 5:30 pm–6:30 pm

Select IPC Standards Development Meetings will take place on Saturday, February 16. Certification programs for designers and EMS program management will take place throughout the week; see pages 10 and 11, respectively, for dates and times.

FREE! International Reception

Tuesday, February 19 7:30 am–8:30 am FREE! IPC First-Timers’ Welcome Breakfast 8:30 am–9:30 am

FREE! Opening Keynote Session

9:45 am–10:00 am Ribbon Cutting Ceremony 10:00 am–5:00 pm IPC Standards Development Committee Meetings 10:00 am–6:00 pm EXHIBITS OPEN 12:00 pm–1:30 pm Event Luncheon & IPC Annual Meeting 1:30 pm–5:00 pm

Technical Conference Sessions

1:30 pm–4:45 pm

FREE! BUZZ Sessions

4:00 pm – 6:00 pm FREE! Show Floor Welcome Reception

Wednesday, February 20 7:30 am–8:30 am FREE! Women in Electronics Networking Meeting 8:00 am –9:00 am FREE! Keynote Session 8:00 am–5:00 pm IPC Standards Development Committee Meetings 9:00 am–3:30 pm

Technical Conference Sessions

10:00 am–6:00 pm EXHIBITS OPEN 9:00 am–3:30 pm FREE! BUZZ Sessions 12:00 pm–1:30 pm Event Awards Luncheon 3:30 pm–4:30 pm FREE! Poster Presentations by Authors 6:00 pm

Exhibitor Networking Functions

Thursday, February 21 7:00 am–8:00 am

FREE! IPC Tech Talk Breakfast

8:00 am–9:00 am

FREE! Keynote Session

8:00 am–12:00 pm IPC Standards Development Committee Meetings 9:00 am–11:45 am FREE! BUZZ Sessions 9:00 am–11:45 am Technical Conference Sessions 9:00 am–5:00 pm Professional Development Courses 10:00 am–2:00 pm EXHIBITS OPEN 1:00 pm

IPC Hand Soldering World Champion Announced

www.IPCAPEXEXPO.org

All events in gold are FREE with pre-registration. This schedule is current as of October 15, 2012. Visit www.IPCAPEXEXPO.org for the most current schedule.

EXHIBITORS

EXHIBITS OPEN Tuesday, February 19 10:00 am–6:00 pm Wednesday, February 20 10:00 am–6:00 pm Thursday, February 21 10:00 am–2:00 pm See and compare equipment from more than 400 of the industry’s top suppliers. Discover new processes to gain greater efficiency. Find new suppliers to save you hundreds of thousands of dollars. Uncover new solutions that will improve your bottom line. Every year, attendees tell us that they’ve learned something important or found a critical new supplier, often with a big impact on their companies. That can be your story, too! Exhibits Only registration is FREE to individuals who pre-register online at www.IPCAPEXEXPO.org. Register today! 3D Glass Solutions 3M Electrical Solutions Division A D S Gold Inc. AccuAssembly Acculogic, Inc. ACCU-TECH Laser Processing Inc. ACD ACE Production Technologies Aculon Inc. Advanced Chemical Company Advanced West Aegis Software Agilent Technologies AI Technology, Inc. AIM Air & Water Systems Air Products Airtech International, Inc. AIR-VAC Engineering Aiscent Technologies Inc. Akrometrix, LLC All Flex Flexible Circuits & Heaters All4-PCB (North America) Inc. Allfavor Circuits (Shenzhen) Co., Ltd. Alpha - Cookson Performance Materials Alpha 1 Technologies ALT-Dynachem Amerivacs Amistar Automation, Inc. Amtech - Advanced SMT Solder Products Apex FA/Mirae Corporation Apollo Seiko Aqueous Technologies Arc-Tronics, Inc.

IPC APEX EXPO allows me and my colleagues to evaluate new technologies to keep our company on the leading edge. The ability to learn and communicate with suppliers along with IPC experts at the same place makes IPC APEX EXPO a “must attend.” David Gale, Manufacturing Manager MJS Designs, Inc. Argosy Industries, Inc. Arlon ASC International, Inc. Ascentec Engineering Ascentech LLC - GEN3 Ash Technologies Ltd. ASM Assembly Systems Assembléon America, Inc. Assembly Cleaning & Contamination Testing Center ASSEMBLY Magazine Aster Technologies Asys Group Americas Inc. AT&S Americas LLC A-Tek Systems Group atg-LM Atotech USA, Inc. Austin American Technology Aven Inc. Baker Technology Associates, Inc. Bare Board Group Besi (BE Semiconductor Industries N.V.) Blackfox Training Institute, LLC BPM Microsystems

Brock Electronics Ltd. BTU International Bürkle North America, Inc. C.A. Picard Inc. Caltex Scientific CCI Cencorp Americas LLC Chad Industries CheckSum CHEMCUT Corporation China Printed Circuit Association — CPCA Chromaline Screen Print Products Cincinnati Sub-Zero Circuit Foil Luxembourg Circuits Assembly Cirris Systems Cogiscan Inc. Computrol Inc. Conductive Compounds Inc. Control Micro Systems, Inc. Conveyor Technologies Count On Tools Crystal Mark, Inc. Custer Consulting Group CyberOptics Corporation Data I/O Corporation Datapaq, Inc. Daylight Company DDM Novastar, Inc. De Nora Tech, Inc. DEK International Diamond-MT, Inc. Digicom Electronics, Inc. DIS Inc. Divsys International, LLC DMI

INFORMATION that INSPIRES INNOVATION

EXHIBITORS

Dow Electronic Materials DuPont Electronics Eastman Kodak Company Easy Braid Co ECD ELANTAS PDG, Inc. Electra Polymers Ltd. EMSNow EPTAC Equipment Technologies, Inc. ERSA North America ESSEMTEC European Institute of Printed Circuits — EIPC Europlacer North America Exatron Excellon Automation Exopack Advanced Coatings Fancort Industries, Inc. FASTechnologies, Corp. FCT Assembly FEASA Finetech (parent company of Martin) Fischer Technology, Inc. Fisnar Inc. FKN Systek FlexLink Systems, Inc. FocalSpot, Inc. Fuji America Corporation FUJIFILM Dimatix, Inc. GE Measurement & Control Solutions Glenbrook Technologies, Inc. Global SMT & Packaging GOEPEL Electronics Gordon Brush Mfg. Co., Inc. GPD Global, Inc. GSC Hamamatsu Corporation Heller Industries Henkel Electronic Materials, LLC HEPCO, Inc. Hirox-USA, Inc. Hisco Hitachi High Technologies America Hitachi Via Mechanics (USA), Inc. Hong Kong Printed Circuits Association — HKPCA HumiSeal, Chase Electronic Coatings Huntron, Inc.

www.IPCAPEXEXPO.org

I Source Technical Services, Inc. IBE SMT Equipment IBL Technologies, LLC ICAPE Group I-Connect007 Indian Printed Circuit Association — IPCA Indium Corporation INGUN Pruefmittelbau GmbH Insulectro InsulFab PCB Tooling Integrated Process Systems Intercept Technology Inc. Interconnect Systems, Inc. InterLatin Isola ITC Intercircuit The show was invaluable. I went to find new resources and suppliers. The payoff was great; I collected more ideas than ever before. It was an incredible experience. Bob Heston Supervisor, Manufacturing Support L-3 Communications JBC Tools Jevco International JG&A Metrology Center JMW Enterprises JNJ Industries JOT Automation JPCA-Japan Electronics Packaging & Circuits Assoc. JTAG Technologies Juki Automation Systems KIC Kingboard Laminates Koh Young Technology Inc. Kuper Technologies Kyzen LaserJob Inc. Lewis & Clark, Inc. Lista International LPKF Laser & Electronics M+B Plating Racks MacDermid Inc. Machine Vision Products Malcomtech International Manncorp

Maskless Lithography, Inc. Maxpcb Mentor Graphics, Valor Division MET Metrohm USA MG Chemicals Ltd. MicroCare Corporation MicroCraft Micron Laser Technoloy Micronic North America Microscan MicroScreen, LLC Microtek Laboratories Mid America Taping & Reeling Inc. Minan Electronics Ltd. Co. MIRTEC Corp. ML Draabe Systems MPO mta automation inc. MYDATA automation, Inc. National Graphic Supply Nihon Superior Co., Ltd. Nikon Metrology, Inc. Nix of America Nordson ASYMTEK Nordson Dage Nordson EFD Nordson YESTECH North Star Imaging, Inc. Novagard Solutions, Inc. Nujay Technologies Inc. Nutek Americas Oak Mitsui, Inc. OEM Press Systems Ohmega Technologies Inc. OK International OMG Electronic Chemicals Omni Training Omron Inspection Systems Orbotech Orpro Vision Ovation Products P. Kay Metal, Inc. Pac Tech USA PACE Panasonic Factory Solutions Company of America Para Tech Coating, Inc. Park Electrochemical Corp. Parker FNS PCB Sourcing Company

PDQ Precision Inc. PCQR2 — A Partnership Between CAT & IPC PDR Pemtron Technology Pentagon EMS Phibro-Tech, Inc. Photo Stencil Pillarhouse USA Inc. Plasma Etch, Inc. Polar Instruments, Inc. Polyonics Posalux SA PPG Industries Semco Packaging & Application Systems Precision Placement Machines Premier Semiconductor Services Printed Circuit Design & Fab Printed Circuit Girls and Geeks Printed Circuit Journal Production Solutions, Inc./ Red-E-Set productronica 2013/MMI ProEx Device Programming PROMATION, Inc. Prototron Circuits PVA Q Corporation Q1 Test Inc. QA Technology Company Inc. Qualectron Systems Corporation Qualitek International, Inc. Quik-Tool, LLC QxQ, Inc. Rainbow Technology Systems RBP Chemical Technology, Inc. Real Time with...IPC Rogers Corporation RPS Automation Saki America, Inc. Samsung Sanmina - SCI Saturn Electronics Corporation ScanCAD International, Inc. Schleuniger, Inc. Schmid Systems Inc. USA Scienscope International SEHO North America, Inc. Seica Inc. Seika Machinery, Inc. Semblant

A great way to compare similar equipment; to see who has that extra feature that puts them at the top of the list...especially from a vendor you didn’t know existed! Erik Wahl Manufacturing Engineer GE Energy Senju Comtek Corp. Sensible Micro Corporation SGS North America Inc. Shengyi Technology Co., Ltd./ Paramount Laminates Shenmao America, Inc. Shin-Etsu Silicones of America, Inc. Siemens PLM Software SiFO Simplimatic Automation Sims Recycling Solutions Smart Sonic Stencil Cleaning Systems SMT Magazine SMT North America, Inc. SMTNet.com SmtXtra Solder Indonesia, PT. Sonoscan, Inc. Sono-Tek Corporation Sovella Inc. SPEA America Specialty Coating Systems, Inc. Spectrum Assembly, Inc. Speedline Technologies, Inc. Speedprint Technology LTD Spindle Dynamics LLC STI Electronics, Inc. Stoelting LLC Stone Mountain Tool, Inc. Sujun Electronic Co., Ltd. (Changzhou) Super Dry Swiss Interconnect, Inc. Taconic Taiwan Printed Circuit Association Taiwan Union Technology Corporation Taiyo America Tamura H.A./Eunil H.A. Tapco Circuit Supply

TDI International, Inc. TDK-Lambda Americas TE Connectivity Technic Inc. Technica, USA Test Research USA, Inc. Texmac/Takaya The PCB Magazine Ticer Technologies Tintronics Industries TMP Inc., A Division of French TopLine Total Parts Plus Transition Automation Inc. TUV Rheinland U.S. Tech Ucamco USA UKTI UL Unicomp Technology USA United Resin Corporation Universal Instruments Corporation UPA Technology Uyemura International Corporation Ventec USA Vi Technology Virtual Industries, Inc. Viscom Inc. Vision Engineering Vitronic Soltec Vitrox Technologies VJ Electronix, Inc. V-TEK, Inc. WAGO Corporation Weller/Apex Tool Group WISE srl World Equipment Source XACTPCB Ltd. XJTAG X-Line Assets XOS Yamaha Motor IM America, Inc. YJ Link America, Inc. Yxlon Zestron America Zymet, Inc. Exhibitor list is current as of October 9, 2012

INFORMATION that INSPIRES INNOVATION

Hand Soldering Competition February 19–20 and

IPC World Championship February 21

Who’s the Best-of-the-Best?

Do you think you have what it takes to win at soldering? Is your company proud of how many IPC Certified Specialists it has on staff? If you think you have what it takes to be a soldering champion, BRING IT at the IPC APEX EXPO Hand Soldering Competition. Cash prizes of $500, $250 and $100 will be awarded to the top three finalists at the close of IPC APEX EXPO competition at 5:00 pm on Wednesday, February 20. Visit www.IPCAPEXEXPO.org/soldering for more information and to submit your entry. The entry deadline is January 11, 2013.

IPC WORLD CHAMPIONSHIP February 21, 2013

The winner of the IPC APEX EXPO Hand Soldering Competition will move on to the IPC WORLD CHAMPIONSHIP on Thursday, February 21 to face off with winners from IPC hand soldering competitions around the world. The winner of the IPC Hand Soldering Grand Championship will be awarded a $1,000 cash prize and a new Metcal soldering station.

Premier Sponsor: Supporter: Vision Engineering Ltd.

SPECIAL EVENTS

FREE Activities On the Show Floor NEW! New Product Corridor

NEW! Printed Board Assembly Cleaning and Contamination Testing Center Live

View cutting-edge products and services in the new, New Product Corridor on the show floor. Get a sneak preview of the equipment, materials and services that are breaking new ground in our industry.

The center will provide practical support to visitors keen to implement new cleaning and contamination monitoring processes as well as overcome common reliability failures.

Show Floor Reception Tuesday, February 19 • 4:00 pm–6:00 pm

Ionic testing, surface insulation resistance (SIR), solder paste flux cleaning system, cleaning materials, optical inspection, PCB and component compatibility testing are just some of the processes that will be demonstrated.

Kick back with your colleagues at IPC’s very own happy hour. Walk the exhibition, scope out the new exhibitor offerings, and catch up with colleagues.

During the show, the center will also feature seminar presentations, live testing, prize drawings for cleaning standards and a display of cleaning books and test boards available in the industry. There will also be the opportunity to meet some of the engineers who help produce the IPC industry standards on cleaning.

IPC APEX EXPO® Hand Soldering Competition Tuesday–Wednesday, February 19–20 Do you think you have what it takes to win at soldering? BRING IT!

NEW! IPC Hand Soldering World Championship

The clinic is organized by IPC & National Physical Laboratory.

Thursday, February 21

Watch the world’s best hand soldering technicians vie for the title of IPC Hand Soldering CORE CORE APPLICAT CORE APPLICATION APPLICATION ICONS: ICONS: World Champion. EARCH GENERAL SEARCH, AGENDA, PRODUCT SEARCH, SESSION SEARCH, FACILITY SEARCH GENERAL SEARCH, AGENDA, GENERAL SEARCH, AGENDA, PRODUCT SEARCH, SESSION SEARCH, FACILITY PRODUCT SEARCH SEA See opposite page for details.

Get a head start on your show experience with My APEX EXPO® interactive planner Learn about all the companies exhibiting

• Search for companies by keyword, category, and more. • View exhibiting companies on the floor plan. • Read up on exhibitors’ products and services. • Access photos, press releases, company contacts and more. It’s all at your fingertips in your planner — so you can make informed buying decisions once you’re on-site.

Create your own personal itinerary for the event

• Communicate with exhibitors in advance of the show and schedule appointments with them. • Plan out your days so overlapping appointments won’t catch you off guard on-site. • Download or print your itinerary to Outlook® so you have it at all times.

Expand your network of professional and business contacts

• Catch up with colleagues and meet others with similar interests. Start networking even before you arrive!

Visit www.IPCAPEXEXPO.org/my-show to get started.

INFORMATION that INSPIRES INNOVATION

SPECIAL EVENTS

Great Networking Opportunities! FREE! International Reception

IPC Event Luncheons

Monday, February 18 • 5:30 pm–6:30 pm

(registration required)

Our international friends are invited to relax, have a bite to eat and meet their colleagues from around the world at this festive gathering.

Awards Luncheons Monday, February 18 • 12:00 pm–1:30 pm Wednesday, February 20 • 12:00 pm–1:30 pm Event Luncheon and IPC Annual Meeting Tuesday, February 19 • 12:00 pm–1:30 pm

FREE! First-Timers’ Welcome Tuesday, February 19 • 7:30 am–8:30 am Maximize your time at IPC APEX EXPO. Enjoy a continental breakfast while your colleagues share the ins and outs of this event. Learn how to put IPC’s resources to use for you and your company and find out how to take advantage of everything this event has to offer. Even if you’re not a first-timer, join us for a refresher course on IPC programs.

IPC Government Relations Committee Open Forum Tuesday, February 19 • 11:00 am–12:00 pm What are your international, national and regional concerns regarding government regulations and laws impacting your company’s ability to compete globally? Join members of the IPC Government Relations Committee for this important forum to receive updates on key issues impacting your company’s bottom line as well as an overview of IPC efforts to support the prosperity of the global electronic interconnect industry. After the overview, there will be open discussion on future issues for the committee to address.

FREE! Women in Electronics Networking Meeting Wednesday, February 20 Breakfast 7:30 am • Meeting 7:45 am–8:30 am Featured Speaker: Dr. Susan Graham President and CEO, ELANTAS PDG, Inc. Women continue to make great strides in all areas of the electronic interconnect industry. Join your colleagues from across the supply chain to share your ideas and experiences as a woman and build your industry network. RSVP through IPC APEX EXPO online registration.

FREE! IPC Tech Talk Thursday, February 21 • 7:00 am–8:00 am Nothing beats a little caffeine and Tech Talk to start the day right. Join your colleagues for this early morning gathering with discussions on and insights into next-generation interconnect technologies and manufacturing trends.

Get Connected! Five Easy Ways! ☞M y APEX EXPO:

Visit www.IPCAPEXEXPO.org/my-show to connect with exhibitors and attendees and plan your itinerary before the show!

☞ Twitter: Use #IPCShow ☞ Facebook: www.IPC.org/facebook ☞ L inkedIn: Find us at IPC — Association Connecting Electronics Industries ☞ I PC Technet: Ask questions and connect with experts at www.ipc.org/technet.

www.IPCAPEXEXPO.org

SPECIAL EVENTS

Keynote Sessions Opening Keynote: Imagine, and create, the future February 19 • 8:30 am–9:30 am

Michio Kaku, Ph.D. Join theoretical physicist, best-selling author and futurist Dr. Michio Kaku for an awe-inspiring look at the future … a vision of life in the year 2100, culled from ideas of 300 of the country’s most influential scientists. He will share insights into revolutionary advancements in medicine, energy production, artificial intelligence and aeronautics that will forever change our way of life. Let yourself be drawn into a future where innovations like Internet-enabled contact lenses let you surf the Web with the blink of an eye … where your commute to work is stress-free, because your car drives itself while you relax … and where tiny brain sensors let you move objects using only the power of your mind. Don’t miss this wild and inspirational ride into the future with Dr. Kaku! Referred to as a “rock star” by many in the scientific community, Dr. Kaku is an internationally recognized authority on Einstein’s unified field theory and known for using science to predict trends affecting business, commerce and finance. His television documentaries for the BBC, and Science and Discovery channels, as well as his radio shows, such as Science Fantastic, and his New York Times best-selling books like Physics of the Future have popularized science and roused the interest of millions of followers around the globe.

Book Signing Tuesday, February 19 • 10:00 am Exhibit hall Meet Dr. Michio Kaku in person. Following his keynote, Dr. Kaku will sign copies of his most recent best-selling book, Physics of the Future. Copies will be available for purchase on-site.

Keynote:

Journey to Mars — Curiosity Rover Mission Thursday, February 21 • 8:00 am–9:00 am

B. Gentry Lee On August 6, 2012, a mobile laboratory known as the Curiosity rover made an amazing landing on Mars. Curiosity boasts the biggest, most advanced payload of scientific instruments ever sent to the Martian surface. Its mission: to assess whether Earth’s neighbor has ever had conditions favorable to life. B. Gentry Lee, chief engineer for the Solar System Exploration Directorate at the Jet Propulsion Laboratory (JPL) in Pasadena, Calif., is responsible for the robotic planetary missions managed by JPL for NASA — including Curiosity. Join Lee for a fascinating inside look at the mission to Mars that has captured the imaginations of millions … and learn about the feats of engineering that brought the Curiosity itself into existence.

INFORMATION that INSPIRES INNOVATION

PROGRAMS FOR DESIGNERS

Continuing Education with a Design Focus A commitment to professional development makes a difference to not only your career, but also your customers, suppliers and employees. Make the most of your time and training budget with just one trip to IPC APEX EXPO! IPC APEX EXPO design-focused activities will benefit engineering staff and managers in design, sales, purchasing and quality. • Designers Forum — a half-day educational program featuring presentations by thought leaders in design • Professional Development courses — three-hour classes led by subject-matter experts • Designer Certification program — basic (CID) and advanced (CID+) • Exhibition — the show floor is an education in itself with more than 400 of the industry’s top suppliers — many who can help you address your design challenges Stay on top of design advancements, sharpen your skills and network with leaders in the industry. Register today for the Designers Forum or get the most education from your investment by registering for the Maximum Value Package!

Designers Forum Monday, February 18 Designers Forum registration includes a boxed lunch.

Agenda 7:30 am Check-in and Networking Breakfast

11:30 am Ask the Flexperts

Mark Finstad, Senior Applications Engineer, Flexible Circuits Technologies; Mark Verbrugge, Program Manager, Pica Manufacturing Solutions

8:00 am Roadmapping for Designers

Dieter Bergman, IPC Director of Technology Transfer

8:30 am I PC-2561 Consortium: How Is It Going to Work for Me? Edward Acheson, Principal Product Engineer, Cadence Design Systems Inc.

9:10 am Designing for High-Reliability Applications

Daniel DiTuro, Principal, DiTuro Consulting

10:35 am The Increasing Complexity of PCB Designs Happy Holden, Director of Electronics Technologies, Gentex

12:15 pm Embedded Circuits: New Design Guidelines, Material Selection Variations, Termination Methodologies, Process Information Vern Solberg, Consultant, Solberg Technical Consulting

12:45 pm Professional Design: Technology and Technique Rick Hartley, CID, Sr. Principal Engineer, L-3 Avionics Systems Inc.

1:15 pm Networking Lunch Adjourn

IPC Designer Certification (CID and CID+) This program provides objective evaluation of core competencies based on industry standards. Courses enhance and assess knowledge: how to transform an electrical circuit description into a PCB design that can be manufactured, assembled and tested. CID (certified interconnect designer-basic) and CID+ (advanced) are credentials recognized throughout the electronics industry.

Workshops: CID and CID+ Friday, February 15 • 8:30 am–5:00 pm Saturday, February 16 • 8:30 am–5:00 pm

Exams: CID and CID+ Sunday, February 17 • 8:30 am–1:30 pm

Participants are expected to be familiar with course materials prior to attending the workshop. Register today at www.ipcapexexpo.org/Designer-Certification to allow time for materials to be shipped in advance!

For more information on IPC APEX EXPO design-focused programs, visit www.IPCAPEXEXPO.org/design.

www.IPCAPEXEXPO.org

EXCLUSIVE PROGRAMS FOR EXECUTIVES

NEW! IPC PCB Supply Chain Leadership Meeting

IPC EMS Management Council Meeting

Monday, February 18 • 8:00 am–5:00 pm Networking Breakfast: 7:30 am–8:00 am Networking Reception and Dinner: 6:00 pm–9:00 pm

A new learning and networking forum for seniorlevel executives of PCB fabricator organizations and their suppliers, this meeting focuses on issues related to executive decision making in the industry, such as market trends, customer requirements and the economy. Hear from noted industry experts and find out how your peers are addressing common challenges.

Receive the information you need to lead. With a unique high-level focus, this event will keep you up on current trends and strategies so you can make the best choices for your company’s future. Network with your peers and learn how other EMS executives are resolving problems that you are also facing. • Joint session: Disruptive Environmental Regulations

• Joint session: Disruptive Environmental Regulations

• Joint session: Business Outlook — The Global Electronics Industry

• IPC EMS Management Council Committee Update

• Distributive Technologies: What the Executive Needs to Know About ◯ Conductive Pastes ◯ Embedded Components ◯ 3-D Circuits ◯ Printed Electronics ◯ Laser Drilling

• Economic Update for Small to Medium EMS Companies • M&A Update for Tier 2 & 3 EMS Companies • EMS Assembly in India: Market Status and Cooperation

• How Environmental Regulations will Impact Materials Availability

• State of the Industry: The Distributor Perspective

• The ODM: What the PCB Industry Needs to Know

• Best Practices of Customer Relations: Secrets of a Certified EMS Program Manager

• PCB Fabrication in India: Market Status and Opportunities for Cooperation

• Roundtable Discussions

• Roundtable Discussions Agendas are subject to change. For the most current information on the EMS and PCB supply chain management programs, visit www.IPCAPEXEXPO.org/executives.

IPC EMS Program Management Training and Certification An EMS program manager needs a multitude of skills to be successful. EMS Program Management Training is a three-part course that tailors topics, such as operations management, finance management, contract management and leadership skills, to the EMS industry. Essentials of EMS Program Management Thursday, February 21 • 8:00 am–5:00 pm Friday, February 22 • 8:00 am–5:00 pm Saturday, February 23 • 8:00 am–5:00 pm

EMS Program Management Training and Certification Exam Saturday, February 23 • 8:00 am–12:00 pm

EMS Leadership Training: Friday, February 22 • 8:00 am–5:00 pm

Visit www.IPCAPEXEXPO.org/EMScert to learn more about the program or to download a registration form.

INFORMATION that INSPIRES INNOVATION

FREE BUZZ SESSIONS

What’s the BUZZ all about? Check out these FREE sessions on hot topics that have people buzz’n.

BZ1

New Technologies

Tuesday, February 19 • 1:30 pm–3:00 pm Jasbir Bath, Bath & Associates Consultancy LLC Learn about new and emerging technologies within the electronics industry. Topics will include: printed electronics, nano-technology, 3-D technology (silicon stacking interconnection) and ultra-high density interconnection. Advancing the state-of-the-art of electronic interconnections will be a central theme to this discussion.

BZ2 Hall of Famers: Roundtable Discussion Tuesday, February 19 • 3:15 pm–4:45 pm C. Don Dupriest, Lockheed Martin Missiles & Fire Control Here’s your chance to ask the Who’s Who of Electronics, IPC Hall of Fame award winners, questions regarding technology and trends in electronics. There are more than 300 years of experience which can be drawn from. Past, present and future opportunities will all be discussed in this very lively gathering.

BZ3 Export Controls: Understanding ITAR and its Reform Wednesday, February 20 • 9:00 am–10:00 am Fern Abrams, IPC Government Relations Get a snapshot of ongoing U.S. government and industry efforts to clarify International Traffic in Arms Regulations (ITAR) and its application to printed boards. Our panel of experts will address the confusion in the current law and assess the trajectory of export control reform.

BZ4 Conflict Minerals Wednesday, February 20 • 10:15 am–11:45 am Fern Abrams, IPC Government Relations This session will give you an overview of the 356-page conflict minerals disclosure and reporting regulation finalized by the U.S. Securities and Exchange Commission in August 2012. A panel of experts will tell you what you need to know to comply and meet your customers’ expectations.

BZ5 Automotive Technologies Wednesday, February 20 • 1:30 pm–3:30 pm Gregory Munie, Ph.D., IPC Get an in-depth view of global electronics technology used within the automotive electronics industry. Engine and powertrain, embedded telematics, anti-lock brake sensing technology and lighting will all be discussed during this special session on automotive electronics.

BZ6 Underwriters Laboratories Thursday, February 21 • 9:00 am–10:00 am Crystal Vanderpan, UL LLC Hear about the new UL initiatives within the industry regarding reclassification of FR-4 materials. An industry update will be provided to attendees who depend on UL recognition for laminates and printed board materials. For any and all users and suppliers that manufacture in accordance with UL 796 and UL 746 standards.

BZ7 Technology Roadmaps — IPC/iNEMI Thursday, February 21 • 10:15 am–11:45 am Marc Carter, CID2012, IPC Take a tour of the technology roadmapping efforts for printed circuit cards and electronics assemblies and discover the major trends in the evolution of technology across multiple disciplines, with an emphasis on the identification of disruptive technology.

www.IPCAPEXEXPO.org

TECHNICAL CONFERENCE

The IPC APEX EXPO technical conference is known worldwide as one of the finest and most selective in the world. Learn about new research and innovations from key industry players in the areas of board fabrication and design and electronics assembly. Sign up for one day, the full conference or get the most for your money with the Maximum Value Package. Register by January 25 and save 20%. S01

Rework/Repair I

Tuesday, February 19 • 1:30 pm–3:00 pm Mumtaz Bora, CID, Peregrine Semiconductor It’s always best to do it right the first time. But since Murphy’s Law has yet to be repealed, one needs to be prepared for rework and repair. In this first of two sessions on rework and repair, the topics of high density assembly repair, process control and protection of components from damage will be covered by our group of experts. Sharpen your repair knowledge and skills by joining us in this factfilled session. Advanced Rework Technology and Processes for 01005, Fine Pitch POP, Micro-QFNs and Next Generation Ultra-Large Devices Brian Czaplicki, Air-Vac Engineering Company, Inc. Rework and Reliability of High I/O Column Grid Array Assemblies Reza Ghaffarian, Ph.D., Jet Propulsion Laboratory

Assembly Reliability I

Tuesday, February 19 • 1:30 pm–3:00 pm Polina Snugovsky, Ph.D., Celestica Reliability has many facets such as design, component choice, materials and environment. Reliability may mean how mechanically strong a solder joint is and how resistant to thermal cycles. Or it may mean how resistant the assembly materials are to the environment the assembly is deployed in. This session covers both these latter issues, looking at the mechanics of the assembly and the assembly’s resistance to corrosion. Join us for an enlightening view of two of the facets of reliability. Predicting the Lifetime of the PCB — From Experiment to Simulation Markus Leitgeb, AT&S Austria Technologie & Systemtechnik AG Assembly Process Feasibility of Low Silver Alloy Solder Paste Materials Jennifer Nguyen, Flextronics

EOS Exposure of Components in Soldering Process Vladimir Kraz, OnFilter, Inc.

S02

S03

Cleaning I

Tuesday, February 19 • 1:30 pm–3:00 pm Todd MacFadden, Bose Corporation If you clean, are you accomplishing your goals? Is the assembly better and more reliable? Depending on the scale of your cleaning, whether for mass production of high-volume lots or low-volume mixed production, the best approach may be very different. In the first of two sessions on cleaning, you will get new insights into analysis of cleaning effectiveness and choices of cleaning processes. Cleaning Assembled Printed Circuit Boards — A Crucial Way of Enhancing Reliability and Avoiding Problem Field Failures Wilfried Clemens, Kolb Cleaning Technology GmbH

Manufacturability and Reliability Screening of Lower Melting Point Lead-Free Alloys Containing Bi Polina Snugovsky, Ph.D., Celestica

S06

Rework/Repair II

Tuesday, February 19 • 3:15 pm–4:45 pm Russell Nowland, Alcatel-Lucent This second session on repair and rework will cover component rework and reliability, automated rework and through hole rework. When faced with the necessity for rework, knowledge from this session will prove invaluable in helping assure the reliability of your products. Effect of BGA Reballing and its Influence on Ball Shear Strength S. Manian Ramkumar, Ph.D., Rochester Institute of Technology

High Reliability and Low Variability Results with Benchtop PCB Cleaning Steve Cook, TechSpray

Automated Optical Rework: Technology Advancement Replaces Manual Process Bert Kelley, Orbotech Inc.

Adding In Situ Recycling of Cleaning and Rinsing Fluids to Meet Lean & Green Cleaning Process Targets Steve Stach, Austin American Technology

Advanced Through Hole Rework of Thermally Challenging Components on High Thermal Mass Assemblies: A New Approach Brian Czaplicki, Air-Vac Engineering Company, Inc.

INFORMATION that INSPIRES INNOVATION

S07

TECHNICAL CONFERENCE

Assembly Testing

Tuesday, February 19 • 3:15 pm–4:45 pm Todd McFadden, Bose Corporation Test is an end-of-line process that, hopefully, will confirm that all is well in the design and manufacturing processes that preceded it. But test has many facets and some will be more applicable than others for your specific needs. This knowledge-intensive session looks at in circuit test, boundary scan, flying probe and X-ray test methods. Boundary Scan Integration on Flying Probe Testers Zinnour Soultanov, SPEA America Economic Justification for Automated X-Ray Peter Chipman, Rocket EMS, Inc.

S09

Advanced Packaging

Tuesday, February 19 • 3:15 pm–4:45 pm Rita Mohanty, Ph.D., Speedline Technologies, Inc. Packaging has changed drastically over time. Standard through hole assemblies of years past are dinosaurs in performance and size compared to today’s high density packaging options. Learn the latest in high density package choice and acquire the best information on what choices you have in component types. Evaluation and Characterization of Molded Flip-Chip BGA Package for 28nm FPGA Applications Ganesh Sure, Altera Corporation

The Evolution of ICT Alan Albee, Teradyne Inc.

Material Selection and Parameter Optimization for Reliable Tmv Pop Assembly Martin Anselm, Universal Instruments Corporation

S08

S11

Assembly Reliability II

Tuesday, February 19 • 3:15 pm–4:45 pm Hikmat Chammas, Honeywell Inc. Air Transport Systems This second session in assembly reliability will address testing. What choices of tests do you have to determine if your design and materials choices are “okay,” “good enough” or “excellent”? Tests such as HALT, HASS and drop shock will be reviewed by our industry experts to give you an in-depth knowledge base to use in your choice of testing protocol. Study of SMT Process: A Design, Materials and Process Perspective Frank Liang, Intel Corporation

Solder and Alloy Reliability I

Wednesday, February 20 • 9:00 am–10:00 am Carol Handwerker, Sc.D., Purdue University With a new generation of alloy materials moving into mainstream assembly process, manufacturers may feel they are facing a bewildering plethora of alloy choices. Two of the industry’s leading experts will guide you through the latest developments in alloy technology. With their help, the array of choices will hopefully be less daunting and your job will be that much easier. Influence of Microstructure on Mechanical Behavior of Bi-Containing Lead-Free Solders David Witkin, The Aerospace Corporation

Improving Product Reliability Through HALT & HASS Testing of Electronics and PCBs Mark Chrusciel, Cincinnati Sub-Zero

Grain Refinement for Improved Lead-Free Solder Joint Reliability Keith Sweatman, Nihon Superior Co., Ltd.

Mechanical Reliability — A New Method to Forecast Drop Shock Performance Ronald Frosch, AT&S (China) Co., Ltd.

S12

Fluxes and Pastes

Wednesday, February 20 • 9:00 am–10:00 am Bhanu Sood, University of Maryland Reliable solder joint formation depends on the design/ paste/printing/reflow process. Weakness in any of these areas means defects and decreased reliability. This session will highlight the choices an assembler has in pastes. Both the flux/vehicle and metal components of solder pastes will be covered. Build on your knowledge base to make the best choices in the quest for reliable solder joints. Conformal Coating Over No-Clean Flux Karl Seelig, AIM, Inc. Reliability Assessment of No-Clean and WaterSoluble Solder Pastes Emmanuelle Guene, Inventec Performance Chemicals

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S14

Pad Cratering

Wednesday, February 20 • 9:00 am–10:00 am Russell Nowland, Alcatel-Lucent Pad cratering is a relatively new phenomenon and has root causes in design, materials and process as the pad lifting may not always be immediately apparent. In such cases, the defect escapes through testing and is revealed in the field (much to the dismay of the end user as you may imagine). In this session, the latest on cause, effect, prediction and prevention will be covered. Methodology to Predict Mechanical Strength and Pad Cratering Failures Under BGA Pads on Printed Circuit Boards Mudasir Ahmad, Cisco Systems Inc.

S15

Voiding

Wednesday, February 20 • 9:00 am–10:00 am Gary Ferrari, CID+, CIT, FTG Circuits Voids have been a reliability concern for years. And, while there are standards for defining safe void levels, many of the root causes and cures are still in the investigation stage. Today’s session addresses that search for a void cure head on with two world class papers by industry experts. If you have concerns about voids in your solder joints this is a must-attend session for you. Root-Cause Analysis for Voiding in BTCs and BGAs Helmut Oettl, Rehm Thermal Systems GmbH Voiding Mechanism and Control in Mixed Solder Alloy System Ning-Cheng Lee, Ph.D., Indium Corporation of America

S16

Solder and Alloy Reliability II

Wednesday, February 20 • 10:15 am–11:45 am Dennis Fritz, MacDermid, Inc. This second session on solder and alloy reliability continues the examination of the new generation of alloy materials moving into mainstream assembly. The effects of microstructure on reliability will be discussed to provide you with additional and in-depth information on what alloy choices are best for your applications. Method to Measure Intermetallic Layer Thickness and its Application to Develop a New Equation to Predict its Growth Jose Servin, CIT, Continental Temic SA de CV Reliability for Higher Temperature Application with Soft Solder LF Alloys and Alternatives Joerg Trodler, Heraeus Materials Technology GmbH & Co. KG Reliability of Lead-Free LGAs and BGAs: Effects of Solder Joint Size, Cyclic Strain and Microstructure Martin Anselm, Universal Instruments Corporation

S17

Embedded

Wednesday, February 20 • 10:15 am–11:45 am Patricia Goldman, P. J. Goldman Consulting Embedded devices are now mainstream and, with semiconductor technology, provide the basis for much of the new generation of mobile, feature heavy electronics. In this session on embedded, you will learn the latest of reliability, design and process. If you are making embedded boards or if you are using embedded devices, then this is a session you don’t want to miss. Quantitative Analysis of Corrosion Resistance for Electroless Ni-P Plating Lei Jin, He Shan World Fair Electronics Technology Ltd. Simulation of Embedded Components in PCB Environment and Verification of Board Reliability Johannes Stahr, AT&S Austria Technologie & Systemtechnik AG Embedded Passive Technology Materials, Design and Process Hikmat Chammas, Honeywell Inc. Air Transport Systems

S18

High Frequency

Wednesday, February 20 • 10:15 am–11:45 am David Hoover, TTM Technologies High frequency electronics present challenges for board design and board fabrication. In this session, these two issues are addressed providing you with the latest on design, modeling and fabrication techniques. Insertion Loss Comparisons of Common High Frequency PCB Constructions John Coonrod, Rogers Corporation Influence of Via Stub Length and Anti-Pad Size on the Insertion Loss Profile Alexander Ippich, Multek Europe GmbH & Co. KG Embedded System Access — A Paradigm Shift in Electrical Test Heiko Ehrenberg, GOEPEL Electronics LLC “The results from the technical papers allow us to get to solutions faster, reduce our internal experimentation and make connections with experts that are great resources for future projects. By talking face-to-face with engineers working on similar challenges, we will make progress on reaching industry-wide solutions that benefit all of us.” Julie Silk RoHS Technical Program Manager Agilent Technologies

INFORMATION that INSPIRES INNOVATION

S19

TECHNICAL CONFERENCE

Head on Pillow

Wednesday, February 20 • 10:15 am–11:45 am Beverley Christian, Ph.D., Research In Motion Limited Head on pillow is a subtle defect that does not always manifest itself during test. The papers presented here will provide you with guidelines and technologies for catching these defects before they become field issues. For knowledge you can use in your assembly operation, join us for a fact-filled session. Head in Pillow Inspection Alejandro Castellanos, Flextronics Technologies Mexico S.de R.L.de C.V.

S22

Package on Package

Wednesday, February 20 • 1:30 pm–3:30 pm Dennis Fritz, MacDermid, Inc. Long ago, many people thought the world was flat. In the past days of electronic assembly there was a time when the “flat earth gurus” ruled a land of single-sided PWBs. No more. Electronic design is moving into the third dimension. This session will give you a glimpse into where 2.5 and 3-D technology is evolving. Get a fascinating look at an emerging technology at this session. The Coming of the Multi-Chip Module Dieter Bergman, IPC

Advanced Second-Level Assembly Design and Analysis Techniques — Troubleshooting Head-OnPillow, Opens, and Shorts with Dual Full-Field 3-D Surface Warpage Data Sets Ken Chiavone, Akrometrix LLC

BVA: Molded Cu Wire Contact Solution for Very High Density Package-on-Package (PoP) Applications Vern Solberg, Solberg Technical Consulting

S21

Printed Circuit Structures, the Evolution of Printed Circuit Boards Prashant Joshi, Interconnect Systems Inc

Solder and Alloy Reliability III

Wednesday, February 20 • 1:30 pm–3:30 pm Carol Handwerker, Sc.D., Purdue University Lead free has now been a reality for several years. But all of the long term impacts are still not sorted out. Especially critical is the impact of these new metallurgical systems on assembly reliability. In this session, our four speakers tackle the areas of mixed metallurgy, embrittlement and lead-free/leaded solder joints. For the knowledge to face the challenges of the lead-free world, this is the session for you. Mixed Metals Impact on Reliability Richard Gunn, Nextek, Inc. Testing Intermetallic Fragility on ENIG upon Addition of Limitless Cu Martin Anselm, Universal Instruments Corporation Double Reflow-Induced Brittle Interfacial Failures in Lead-free Ball Grid Array (BGA) Solder Joints Julie Silk, Agilent Technologies Assessment of Reterminated RoHS Components for SnPb Applications Christopher Hunt, Ph.D., National Physical Laboratory

3-D Memory Modules Kenneth Church, Volux Inc.

S23

PCB Materials and Solderability

Wednesday, February 20 • 1:30 pm–3:30 pm Gary Ferrari, CID+, CIT, FTG Circuits PCB design and materials are constantly in flux as new design techniques, materials and applications emerge. This session will provide the latest on new glass technology, solderability and high frequency materials. Cost-Effective Precision 3-D Glass Microfabrication Jeb Flemming, Life BioScience Inc. TOF SIMS Analysis for SnxOy Determination on LeadFree HASL PCBs Jose Servin, CIT, Continental Temic SA de CV Improving Density in Microwave Multilayer Printed Circuit Boards for Space Applications David Nevo, Thales Alenia Space France Behavior of Materials in Manufacturing Environment Hardeep Heer, FTG Circuits

S24

Printed Electronics

Wednesday, February 20 • 10:15 am–11:45 am Polina Snugovsky, Ph.D., Celestica If you would like to know more about this growing and perhaps soon to be ubiquitous technology, this is the track for you. Nanomaterial Performance Advantages in PE and Implementation Issues Alan Rae, Ph.D., Nanomaterial Innovation Center Nano Materials Development Process Kurt Schroder, Novacentrix Development of Printed Flex Circuits Hirofumi Matsumoto, Nippon Mektron Ltd.

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S25

Cleaning II

Wednesday, February 20 • 1:30 pm–3:30 pm Todd MacFadden, Bose Corporation Our second session on cleaning of human-introduced contaminants, cleaning of Class 3 assemblies produced with lead-free processes, and optimization of cleaning based on end use. If you are cleaning and would like to hear the latest, join us in this session. The Effects of Human Induced Contamination on PCB Assembly Electrical Reliability Eric Bastow, Indium Corporation of America Capillary IC — A New Platform for High Throughput or High Resolution Separations of Ionic Compounds Peter Bodsky, ThermoFisher Scientific

Bare Board Test

Military Electronics

Military Applications of Flexible Circuits Bradford Saunders Sr., Minco Products, Inc.

Thursday, February 21 • 9:00 am–10:00 am Rita Mohanty, Ph.D., Speedline Technologies, Inc. Bare board test ensures that the input (from the board perspective) to the final assembly process is of sufficient quality that the product being produced will perform as expected. In today’s two paper session, the attributes of different test fixture structures and dielectric breakdown testing procedures will be discussed. Electrical Test Conditions & Considerations Rick Meraw, Gardien Services USA, Inc.

S30

Hi Pot Dielectric Breakdown Automated Verification How-To Todd Kolmodin, Gardien Services USA, Inc.

Printing I

Thursday, February 21 • 9:00 am–10:00 am Eric Bastow, Indium Corporation of America Of all the solder joint formation steps, printing is the one with the most pitfalls. Good control over board and stencil design and the accuracy and repeatability of paste deposition are critical for the continued production of reliable solder joints. In the first of two sessions, stencil and squeegee design will be discussed. For the knowledge to improve your paste deposition printing process, this is the session to attend. Two Print Stencil Systems William Coleman, Ph.D., Photo Stencil Inc. Profiled Squeegee Blade: Rewrites the Rules for Angle of Attack Ricky Bennett, Ph.D., Assembly Process Technologies

Evaluating the Accuracy of a Nondestructive Thermo Couple Attach Method for Area Array Package Profiling S. Manian Ramkumar, Ph.D., Rochester Institute of Technology Thursday, February 21 • 9:00 am–10:00 am Dennis Fritz, MacDermid, Inc. Military systems are probably the origin of the phrase “mission critical.” Survival is often predicated in military operations on reliability and performance. Today’s two paper session on military electronics will address the issues of design cycle and process and new applications for flex circuits in military hardware. Integrating Manufacturability into Design Stephen Redington, US Army ARDECD

CO2 Clean Manufacturing Technology for Electronic Device Fabrication David Jackson, CleanLogix LLC

S27

onDestructive Reflow N Temperature Profiling

Thursday, February 21 • 9:00 am–10:00 am Russell Nowland, Alcatel-Lucent Reflow Temperature David Steele, UTC Aerospace Systems

S29

Cleanliness Assessment for Class 3 Lead-Free NoClean Assemblies Phase 1: Process Development Trials Umut Tosun, ZESTRON America

S26

S28

Plating

Thursday, February 21 • 9:00 am–10:00 am Gregory Munie, Ph.D., IPC The heart of the interconnection process in PCB fab is plating. Without a reliable plating process, getting a signal from point A to point B will simply not happen. Today’s session looks at the latest plating chemistry developments. For the best technical knowledge in “how to connect the dots from A and B” you will want to attend this session. Direct Determination of Phosphorus Content in Electroless Plating Applications Using X-Ray Fluorescence (XRF) Spectroscopy Michael Haller, Fischer Technology Inc. Via Filling: Challenges for the Chemistry in the Plating Process Michael Palazzola, Atotech USA Inc. “I always look forward to attending the IPC conference and show. It is a great opportunity to attend courses, sit in on standards meetings and connect with industry experts. To sum it up, IPC meets my personal and company goals.” Frank Collins Process Engineer Johns Hopkins University Applied Physics Lab

INFORMATION that INSPIRES INNOVATION

S31

TECHNICAL CONFERENCE

ESD

Thursday, February 21 • 10:15 am–12:00 pm Benjamin Piepgrass, CID+, Southwest Research Institute Electrostatic discharge is an insidious threat to the reliability of any electronic system. The speakers in this session have in-depth ESD backgrounds. Their knowledge is what you need to meet the threat of ESD damage to your products. Real Time Electrostatic Discharge (ESD) Detection Call to Action Julian Montoya, Intel Corporation Sources in a Production Line (SMT) and Solutions Against ESD (Electrostatic Discharge) — Requirements Today and in the Future Hartmut Berndt, B.E.STAT European ESD Competence Centre

S32

Printing II

Thursday, February 21 • 10:15 am–12:00 pm Beverley Christian, Ph.D., Research In Motion Limited Our second printing session continues the examination of printing technology for paste deposition by considering miniaturization and stencil coatings. For more precise knowledge of the how and why of the printing process, join our experts in this session. Big Ideas on Miniaturization Clive Ashmore Low Surface Energy Coatings, Rewrites the Area Aspect Ratio Rules Ricky Bennett, Ph.D., Assembly Process Technologies

S33

Laminate Reliability

Thursday, February 21 • 10:15 am–12:00 pm Patricia Goldman, P. J. Goldman Consulting Laminates of today are expected to be robust under far harsher conditions than the laminates of only a decade ago. With the advent of lead-free assembly and the necessity for multiple thermal excursions, laminate reliability is not always a given. Our speakers will address those concerns and provide you with the latest information on laminate reliability in the harsh, new world of lead free. Reliability Performance of Very Thin Printed Circuit Boards with Regard to Different Any Layer Manufacturing Technologies Thomas Krivec, AT&S Austria Technologie & Systemtechnik AG LTCC Substrate Substitution by High Performance FR4 PCB with Bondable Surface Gregor Langer, AT&S Austria Technologie & Systemtechnik AG Evaluate Performance and Surface Morphology of Sample Cores and Copper Foils Processed with MultiBond John Marshall, MacDermid, Inc.

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S34

ovel Attachment Technologies N and Processes

Thursday, February 21 • 10:15 am–12:00 pm Dennis Fritz, MacDermid, Inc. If you can’t get people to communicate, there is probably little hope you can form them into a reliable team. The same is true of the components in an electronic assembly; if they don’t communicate well, the assembly won’t work. Today there is an amazing variety of interconnection technologies. This session will give you a view of new approaches to establishing the “channels of communication” within your electronic assemblies. QFN Voiding Control Via Solder Mask Patterning on Thermal Pad Ning-Cheng Lee, Ph.D., Indium Corporation of America Fluxless Metal Die Attach by Activated Forming Gas Chun Christine Dong, Ph.D., Air Products & Chemicals

S35

Coatings and Adhesives

Thursday, February 21 • 10:15 am–12:00 pm Frank Hart, PVA With more of today’s dense, high performance electronics being deployed in less than optimal environments, protective coatings are becoming more critical to protect electronic assemblies. This three-paper session will address performance of silicone-based and plasmapolymerized coatings for circuit protection. Exploring the High Temperature Reliability Limits for Silicone Adhesives Carlos Montemayor, Dow Corning Corporation Protective Coatings for Electronics Using Plasma Polymerization Tim Von Werne, Ph.D., Semblant Ltd. Mobile Electronics: How to Keep the Elements Inside Running Reliably and Smoothly in a Harsh World Hector Pulido, Nordson Asymtek

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PROFESSIONAL DEVELOPMENT COURSES

Find out about the latest in design, lead-free technology, materials, process improvement, solder joint reliability and more. Courses are listed by general categories to help you find just what you’re looking for. Get the most for your money by registering for the Maximum Value Package and selecting six half-day courses that meet your professional needs. Register by January 25 to save 20%. Assembly Processes for____________ 19 Lead Free and Tin-Lead Cleaning/Coating/Contamination___ 24 Design____________________________ 24

Emerging Technologies ____________ 27 PCB Fabrication and Materials_____ 27 Quality, Reliability and Test________ 30 Supply Chain/Business Issues ______ 33

Assembly Processes for Lead Free and Tin-Lead

PD08

PD05

SMT and Through Hole Defect Analysis and Process Troubleshooting — Part I

Monday, February 18 • 9:00 am–12:00 pm S. Manian Ramkumar, Ph.D., Rochester Institute of Technology BASIC Part I of a two-part course, this session will provide a thorough understanding of SMT and through hole defects, as well as the various factors that influence the formation of defects. Knowledge gained from this course will help companies enhance product development and manufacturing yield. Participants should register for Part II (PD06) to gain the maximum benefit of this course. What You Will Learn • Systematic approach to problem solving • Defining a problem by repeated questioning • Skills to address the root causes of problems • Methodology to find solution(s) to address root cause • Applying analytical methodology to different situations About the Instructor Dr. S. Manian Ramkumar teaches courses in SMT electronics packaging and manufacturing automation. He was instrumental in developing the CIM and Surface Mount Electronics Manufacturing Laboratory and curriculum at RIT, and has been the principal investigator for several applied research projects.

PD06

SMT and Through Hole Defect Analysis and Process Troubleshooting — Part II

Monday, February 18 • 2:00 pm–5:00 pm S. Manian Ramkumar, Ph.D., Rochester Institute of Technology BASIC This session will build on the morning’s information (PD05) pertaining to SMT and through hole defect analysis and process troubleshooting. Case studies will be shared to actively engage participants in the problem-solving process. For maximum benefit, enrollment in both this session and Part I is highly recommended. See PD05 above for more information.

Design For Manufacturing (DFM): Best Practices

Sunday, February 17 • 9:00 am–12:00 pm Cheryl Tulkoff, CRE, DfR Solutions INTERMEDIATE Gain a greater understanding of potential manufacturability hazards to avoid during the design process. In this course, participants will get first-hand information on issues that impact both leaded and leadfree manufacturability and performance requirements. The course offers practical recommendations for successfully managing the interconnection of both through hole and surface mount technology at the bare board level. Increasingly sophisticated PCB fabrication technologies and processes will be discussed, including laminate selection, trace width and spacing, solder mask and finishes. What You Will Learn • Printed boards and process material selection • Plated-through hole design • Keep-out zones • Copper balancing • Microvias, via fill technologies • Multiple lamination • Equipment process controls and reliability testing • Matching PCB complexity to supplier capabilities • Importance of supplier report cards to monitor quality • Cover circuit card assembly • Heat sink selection • Influences of PCB thickness, cut-outs and depanelization techniques on reliability • Moisture sensitivity level handling, process optimization and control strategies, repair and rework About the Instructor Cheryl Tulkoff has more than 22 years of experience in electronics manufacturing with an emphasis on failure analysis and reliability. She has worked throughout the electronics manufacturing life cycle beginning with semiconductor fabrication processes through the analysis and evaluation of field returns.

INFORMATION that INSPIRES INNOVATION

PROFESSIONAL DEVELOPMENT COURSES

PD13

Best Practices in Electronics Assembly Processes — Part I

PD17

Best Practices in Electronics Assembly Processes — Part II

Sunday, February 17 • 9:00 am–12:00 pm Joseph Belmonte, W. James Hall, and Phil Zarrow, ITM Consulting Inc.

Sunday, February 17 • 2:00 pm–5:00 pm Joseph Belmonte, W. James Hall, and Phil Zarrow, ITM Consulting Inc.

INTERMEDIATE You have the responsibility and resources to improve the productivity of an assembly operation. What do you do? This course drives awareness of, and proposes solutions to, the adverse impact of nonoptimal assembly practices and processes on the product quality and financial success of electronics assembly businesses. Participants will gain a comprehensive perspective on problem issues for today’s most critical electronics assembly processes, materials (both existing and emerging), equipment, procedures and methods. Most important, practical solutions will be presented. Key issues that consistently result in assembly problems and low yields will be identified and resolved. Participants should register for both this course and Part II (PD17) in the afternoon.

INTERMEDIATE This two-part course continues the discussion from Part I (PD13). For maximum benefit, participants should register for both this course and Part I in the morning. See PD13 on this page for more information.

What You Will Learn Best practices for: • Assembly process • Solder paste printing process • Pick and place • Reflow, wave and selective soldering • Conformal coating • QFNs • Ultra-miniature components • Data-driven process design (including DOE and SPC) About the Instructors A principal consultant with ITM Consulting, Joe Belmonte has more than 25 years of experience in all aspects of electronic product assembly operations. He is a co-holder of a patent for high speed electronic systems and methods. Jim Hall is a principal consultant and resident Lean Six Sigma Master Black Belt with ITM Consulting. A pioneer in reflow technology, Hall has been actively involved in electronics assembly technology for more than 26 years. His expertise spans process development and integration, fluid and thermodynamics and computer control systems. Phil Zarrow has been involved with PCB fabrication and assembly for more than 30 years. His expertise includes the manufacture of equipment for PCB fabrication and assembly of through hole and surface mount technologies. Since 1993, Zarrow has helped clients around the world solve assembly problems and optimize facility operations. “In one course I learned enough about a machine technology we’re investing in to pay for my entire trip to IPC APEX EXPO.”

PD14

An Introduction to DOE, SPC and Weibull Analysis

Sunday, February 17 • 9:00 am–12:00 pm Ronald Lasky, Ph.D., PE, Indium Corporation of America INTERMEDIATE Design of experiment (DOE), statistical process control (SPC) and Weibull Analysis are fundamental tools in modern electronics assembly. This course will discuss each technique and teach course attendees how to solve simple electronics assembly-related problems using Minitab® 16 (free 30-day download). What You Will Learn • Understand and execute assembly experiments • Statistical process control analysis • Weibull Analysis About the Instructor Dr. Ron Lasky is a professor at Dartmouth College and senior technologist at Indium Corporation. His experience includes electronic and optoelectronic packaging and assembly at IBM, Universal Instruments and Cookson Electronics. He has authored/edited books on science and electronics, as well as articles for Scientific American.

PD15

Preventing Assembly Production Defects and Failures

Monday, February 18 • 9:00 am–12:00 pm Jennie Hwang, Ph.D., Sc.D., H-Technologies Group INTERMEDIATE Considering the new and anticipated developments in packaging and assembly, this course focuses on how to prevent prevailing production defects — and take remedial measures — through an understanding of potential causes. Defects such as pad cratering, BGA head-on-pillow, passive 01005 issues, copper dissolution and lead-free through-hole barrel filling problems will be covered. PCB thermal properties and halogen-free PCB laminates will be discussed. New developments in tin whisker and mitigating measures will also be outlined. Attendees are encouraged to bring their issues for discussion.

Peter James Manufacturing Machine Dept. Supervisor IPC Systems

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Visit www.IPCAPEXEXPO.org/courses for complete course information and full instructor biographies.

What You Will Learn • The five most common production defects and issues in lead-free assembly • PCB pad cratering — causes and solutions • Head-on-pillow defect — causes, factors and remedies • Copper dissolution — process factors, impact on through-hole solder joint reliability and mitigation • Lead-free through-hole barrel filling — material, process and solder joint integrity • Passive 01005 assembly — process, factors and best practices • New developments in characteristics and characterization of PCB laminates • Tin whiskers — new developments and mitigation About the Instructor Dr. Jennie Hwang has been a major contributor to the implementation of SMT manufacturing and lead-free electronics, providing solutions to many challenging problems — from production yield to field failure diagnosis to reliability issues. She has received numerous honors and awards and has authored several books and publications.

PD16

Manufacturing for High Yields in Assembly

Sunday, February 17 • 2:00 pm–5:00 pm Ronald Lasky, Ph.D., PE, Indium Corporation of America INTERMEDIATE There is a strong need for a systematic approach to meet the challenges of global environmental regulations compliance. This course will cover logistical and technical issues of assembly environments (PCB finishes, components and alloys) and review implementation of small and large board assembly. Process and product reliability data will also be presented using case studies. In addition, the root causes of electronic product failure — long-term use, solder joint reliability and PCB survival during the soldering process — will be addressed. This course will provide a framework for discussion of quality, manufacturability and reliability — and for examination of material properties and design parameters. Discussion will explore options for increasing the reliability of electronics assemblies.

PD19

Stencil Printing Process and Solder Paste Inspection: An In-Depth Look

Sunday, February 17 • 9:00 am–12:00 pm S. Manian Ramkumar, Ph.D., Rochester Institute of Technology INTERMEDIATE The stencil printing process is the most critical in surface mount electronics assembly. It tremendously influences the quality of the final PCB. This course will provide a thorough understanding of the print process for lead-based and lead-free solder paste print applications. Topics include an in-depth look at stencils, solder paste, squeegee, process parameters, process characteristics, inspection techniques, defect identification and corrective actions. Participants in this course will acquire a sound understanding of the solder paste print process and its influence on yield. A brief discussion on the use of this process for adhesive print applications is also included. What You Will Learn • Stencil printing process and process parameters • Importance and influence of solder paste, flux, temperature, humidity, board support and machine setup • Evaluation of materials such as paste, stencil and squeegee for efficient printing • Solder paste constituents and types of paste • Stencils, solder paste and printer requirements for various applications • Stencil construction and features for efficient paste transfer • Recent advances in print technology • Evaluation of raw materials and procedure for qualifying vendors • Print process for adhesive applications About the Instructor See PD05 on page 19.

What You Will Learn • Current alloy systems in use • Preferred PCB finishes for lead-free assembly • Concerns with lead-free components • Best practices for setting up • Implementation of DFR procedures • Solder behavior under load, solder-joint fatigue • Processing issues, and how to address them About the Instructor See PD14 on page 20.

INFORMATION that INSPIRES INNOVATION

PROFESSIONAL DEVELOPMENT COURSES

PD20

Reflow Soldering Process and the Influence on Defects

Sunday, February 17 • 2:00 pm–5:00 pm S. Manian Ramkumar, Ph.D., Rochester Institute of Technology INTERMEDIATE The reflow soldering process is a key step in surface mount electronics assembly after stencil printing process. The soldering parameters influence the quality of the solder joint in a surface mount PCB assembly. This course will provide a thorough understanding of the reflow process for tin-lead and lead-free soldering. Topics include an in-depth look at the various soldering methods, mechanism for solder joint formation, intermetallic formation, reflow parameters, effect of reflow parameters, thermocouple attachment and profiling, importance of profiling, defect identification and corrective action. Participants in this course will acquire a sound understanding of the soldering process and its influence on assembly yield. What You Will Learn • Describe the reflow soldering process and the process parameters • Identify the importance and influence of alloy phase diagrams, flux, temperature, time, profile parameters and thermocouple attachment • Evaluate materials such as flux, solder alloy and pad/ lead/bump metallization for efficient soldering • Specify profile requirements for various assembly types and applications • Evaluate oven construction and features for efficient soldering • Evaluate solder joints, their formation and parameter requirements for effective soldering About the Instructor See PD05 on page 19.

PD29

Achieving a High-Yield Manufacturing Process: DFM/DFX

Monday, February 18 • 2:00 pm–5:00 pm Dale Lee, Plexus Corp. INTERMEDIATE Today’s design tolerances have impacted traditional assembly processes with very tight solder application, component placement and soldering constraints. Traditional Six Sigma process controls are insufficient to achieve a high-yielding manufacturing process. This course will introduce the elements of design for matched process (DFMP), and provide examples of several opportunities within the DFMP for yield improvement through manufacturing tooling design, SMT and PTH assembly process matching and environmental controls.

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What You Will Learn • Global product design elements • PCB design impacts • Wave solder design impacts • SMT solder design impacts • Thermal balance, trace routing, equipment limitation/ tolerance, PCB array tolerance, process tooling design • Process control impacts • Paste volume, thermal shock SMT and PTH, reflow process warpage • Cleaning impacts • Compatibility issues, low stand-off components About the Instructor Dale Lee is a staff DFX process engineer with Plexus Corporation, primarily involved with DFX analysis and definition/correlation of design, process, legislative and tooling impacts on assembly processes and manufacturing yields. He is an author, instructor and speaker on advanced packaging, design, assembly, DFX and rework.

PD30

Ball Grid Array (BGA): Principles and Practice

Monday, February 18 • 2:00 pm–5:00 pm Ray Prasad, Ray Prasad Consultancy Group ADVANCED This interactive course will identify the technical issues in BGA design and manufacturing that must be resolved for effective implementation on a mixed technology board. Gain insight into the details of BGA to resolve implementation and vendor issues, and learn the technical details of design and manufacturing problems. What You Will Learn • Flavors of BGA, including frowning and smiling BGAs • Driving forces • BGA limitations and issues — implementation, reliability and design considerations • BGA assembly processes and repair, failure case studies and troubleshooting • CSP and flip chip • Trade-offs between BGA and fine-pitch components • BGA applications • Qualifying a subcontractor for BGA assembly • Design for manufacturability and yield About the Instructor Prior to starting his consulting practice, Ray Prasad held key technology positions at Boeing and Intel. A recipient of the IPC Presidents Award, Prasad chaired the committee that drafted IPC-7095. He received a B.S. from Regional Institute of Technology, India, and an M.S. and MBA from the University of California, Berkeley.

Visit www.IPCAPEXEXPO.org/courses for complete course information and full instructor biographies.

PD39

Design and Assembly Challenges of Ball Grid Arrays (BGAs) and Bottom Termination Components

Monday, February 18 • 9:00 am–12:00 pm Ray Prasad, Ray Prasad Consultancy Group INTERMEDIATE Lead free has impacted the entire electronics industry, especially for those who must deal with backward and forward compatibility issues. Designing for BGA and BTC can involve trial and error and lots of frustration, compounded by fast-paced changes in packaging technologies. This course tackles real-world problems in lead-free implementation and includes updated information on BTCs based on the recently released IPC-7093. Learn to identify design and process issues in BGAs and BTCs, and the issues that must be resolved for effective implementation of mixed assembly electronics products — for both tin-lead and lead free. What You Will Learn • Overview of BGA, CSP and emerging technologies, such as BTCs (QFN, DFN and MLF) • How to effectively implement BGAs and bottom termination surface mount components in a lead-free world, at a lower cost and higher yield • Troubleshooting BGA and BTC problems in manufacturing • Best way to handle backward and forward compatibility situations: lead-free and tin-lead components on the same board • Metallurgy of lead-free solder: selection of appropriate lead-free solder alloys, soldering and rework processes and equipment • Key strategies in design and manufacturing processes to prevent field returns • Design and process guidelines for BGAs and BTCs About the Instructor See PD30 on page 22.

PD42

Zero-Defect Implementation and Design on Pin-In-Hole Intrusive Reflow

Monday, February 18 • 9:00 am–12:00 pm Bob Willis, AskBobWillis.com ADVANCED SMT is part of mainstream electronics assembly with virtually all market sectors benefiting from it. One problem is the use of existing through hole components when no equivalent SMT parts are available; hence, the interest in pin-in-paste, intrusive reflow and multi-spot soldering. Regardless of the name, it’s a perfect option to eliminate the wave and selective soldering process with minimal cost. This course will cover pin-in-hole reflow, a method of soldering surface mount and through hole components in a single operation that simplifies the manufacturing process. Participants will receive a copy of the instructor’s book on pin-in-hole reflow as well as a set of intrusive reflow inspection posters.

What You Will Learn • PCB design and component requirements • PIHR advantages and disadvantages • Paste application by stencil printing • Double stencil print • Dispensing • Stencil aperture calculations and design roles • Solder pallet support placement options • Reflow soldering profiles for convection & vapour phase • Inspection requirements • X-ray voiding assessment • Microsection analysis • Process defects • Reliability of through hole joints About the Instructor Bob Willis operates a training and consultancy business in England with one of the industry’s largest collections of interactive and online training material. With a special focus on the implementation of lead-free manufacturing, his expertise includes contract assembly, PCB manufacturing, failure analysis and environmental test facilities.

PD51

Advanced Rework: Hands-on BGA Reballing, Leadless Devices and Fine-Pitch Parts — Part I

Monday, February 18 • 9:00 am–12:00 pm Norman Mier Jr., MIT, and Robert Wettermann, MIT, BEST Inc. ADVANCED This course is designed for those seeking advanced rework skills on BGA, leadless device and fine-pitch component rework. It is unique in that both theoretical and practical skills are demonstrated in the classroom. Participants should register for both this session and Part II (PD52) in the afternoon. What You Will Learn • Methods, materials and processes for reballing components • Plastic and ceramic BGA device reballing • Rework of bottom terminated components • Methods, materials and processes for reworking bottom-terminated components • Rework of fine-pitched components via paste printing and hand soldering About the Instructors Norman Mier Jr. has more than 20 years of experience in the electronics rework and repair industry, initially with the U.S. Navy Micro Miniature (2M) Electronic Repair Program. An IPC certified master instructor, Mier provides training to engineers and technicians in surface mount and advanced surface mount technologies. Robert Wettermann is an MIT and president of BEST, Inc. An electrical engineer with experience in applications and design, Wettermann holds several patents in the fields of surface science, factory automation products and PCB rework/repair.

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PD52

Advanced Rework: Handson BGA Reballing, Leadless Devices and Fine-Pitch Parts — Part II

Monday, February 18 • 2:00 pm–5:00 pm Norman Mier Jr., MIT, and Robert Wettermann, MIT, BEST Inc. ADVANCED This course is designed for those seeking advanced rework skills on BGA, leadless device and fine-pitch component rework. It is unique in that both theoretical and practical skills will be demonstrated in the classroom. Participants should register for both this session and Part I (PD51) in the morning. See PD51 on page 23 for more information.

Cleaning/Coating/ Contamination PD04

Process Technology Options for Cleaning Highly Dense Assemblies

Sunday, February 17 • 9:00 am–12:00 pm Mike Bixenman, DBA, Kyzen Corporation INTERMEDIATE In highly dense circuit assemblies, process residue removal is critical to ensuring reliability. Lead-free alloys with tighter component densities require flux residues that withstand higher reflow temperatures, but traditional cleaning agents and cleaning equipment may not remove these harder-to-clean flux residues from extremely small geometries. Bottom-termination surface mount components increase circuit functionality, but as they shrink, component distance from board to underside reduces. When flux residues bridge conductors, cleaning becomes difficult. This course examines innovations in cleaning agents and machines that address these challenges, and discusses how suppliers and assemblers can collaborate to develop improved cleaning processes. What You Will Learn • Chemical properties of residues • Solvent and aqueous cleaning agent innovations • Cleaning equipment innovations • Integrating cleaning agent and cleaning machine • Controlling the process About the Instructor Dr. Mike Bixenman is a co-founder and CTO of Kyzen Corporation. An active researcher and innovator in the field of precision cleaning, he chaired the committee that developed IPC Cleaning & Alternatives Handbook and IPC Stencil Cleaning Handbook as well as two IPC/SMTA cleaning and conformal coating conferences.

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PD33

Conformal Coating Applications, Inspection, Rework & Quality Control

Sunday, February 17 • 9:00 am–12:00 pm Bob Willis, AskBobWillis.com INTERMEDIATE Conformal coating has provided benefits in the highreliability and extreme-conditions sectors as well as in consumer applications. Selective coating has also been used in the telecommunications and automotive sectors, but for different reasons. This course will provide a guide to the use of coatings: application and process, product benefits, inspection and quality control. Participants will be given the opportunity to examine coated boards using different materials and to inspect the coating application. Each participant will receive a set of wall charts that illustrate coating application and common defects for use on the manufacturing shop floor. What You Will Learn • Why conformal coating? • To clean or not to clean? • Coating materials and process options • Cost of coating assemblies • SIR and cleanliness testing • Reliability • Rework and repair of board assemblies • Testing, inspection, quality control and evaluation • Design for coating • Masking options and methods About the Instructor See PD42 on page 23.

Design PD10

Extreme HDI: Designing for Maximum Density

Monday, February 18 • 2:00 pm–5:00 pm Happy Holden, Gentex Corporation INTERMEDIATE High density interconnect (HDI) has become the most widely used emerging technology for high-performance electronics, but implementation can be formidable. This course relates the successful design training used by large aero/military, telecom and computer OEMs for product development to successfully implement HDI in their PCB programs. Understanding and using the new HDI design paradigms allows HDI to actually reduce costs while increasing layout density by factors of 2x to 4x. Certain through hole multilayer practices have to be unlearned to properly utilize HDI. This course will illustrate new design requirements, and introduce a planning methodology.

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PD12

What You Will Learn • HDI analysis methodology prior to layout • The seven popular HDI stackups with analysis for density, costs, signal integrity and power integrity • Fine-pitch and high-I/O BGA design rules • Advantages of blind-vias and HDI with drivers • Layer assignment, and routing, reducing layers with channels and boulevards • New methodology to break out big BGAs using “swing and rotated” vias

Sunday, February 17 • 9:00 am–12:00 pm Daniel DiTuro, DiTuro Consulting INTERMEDIATE Learn about design and packaging guidelines based on military and NASA requirements, as well as approved materials and processes for printed boards and printed board assemblies. There are many challenges with increasing circuit density and power dissipations in smaller, lighter packages. High vibration levels, operational thermal cycling and extended mission life require robust design beyond the requirements of most consumer electronics. Find out why typical SMT designs for consumer products may not be appropriate for these applications due to reliability, mechanical and electrical characteristics.

About the Instructor Happy Holden has been involved in advanced PCB technologies for more than 40 years. Prior to serving as CTO of Foxconn, Holden was the senior PCB technologist for Mentor Graphics. The first 28 years of his career were spent at Hewlett-Packard as the director of PCB R&D and PCB engineering manager.

PD11

Flexible and Rigid-Flex Circuits: Ask the Flexperts

Sunday, February 17 • 9:00 am–12:00 pm Mark Finstad, CID, Flexible Circuit Technologies, Inc.; Mark Verbrugge, CID, Pica Manufacturing Solutions INTERMEDIATE This course features a review of highlights culled from the past 15 years of “Ask the Flexpert” columns that appeared monthly in industry magazines. The instructors take a real-world approach to problem-solving everyday flex-circuit design challenges. The course will consist of a highly interactive review of past column subjects with both pictorial and physical examples shared with the audience. Bring your questions to class! Both instructors have a strong background in U.S. and Asian manufacturing of flexcircuits and circuit assemblies as well as design experience in commercial, military, medical/implantable applications. What You Will Learn • Cost containment • When/how to use FFC (flat flexible cable), PWB (hardboards), flex and rigid-flex • Common and not-so-common design mistakes • Design challenges for unusual applications • Excessive length • Tight/critical forming • Dynamic bending • Unusual environmental conditions • Manufacturing flex in a global market • Material selection • Troubleshooting (failure analysis) About the Instructors Mark Finstad is an applications engineer at Flexible Circuits, with more than 30 years of experience in design and manufacture of flex and rigid flex circuits. He is vicechair of the IPC Flexible Circuits Design Subcommittee and is active on the Flexible Circuits Performance Subcommittee. Mark Verbrugge holds the position of field program manager with PICA Manufacturing Solutions (Printed Circuit and Component Assemblies) and has been building and designing flex and rigid-flex circuits for 26 years.

Space Hardware and Other High-Reliability Applications: Design and Packaging

What You Will Learn • High reliability printed board and printed board assembly design • Selecting parts and materials for high-reliability printed board assemblies • Material properties: outgassing, CTE, Tg, radiation hardening • Designing for conduction and radiation cooling • Surviving high vibration levels • Importance of solder joint thermal fatigue and part lead fatigue analysis About the Instructor Daniel DiTuro has more than 30 years of experience designing electronics assemblies for military and space applications, including side-looking radar for the U.S. Air Force and Navy, electronics assemblies for communication satellites, the space shuttle cockpit display processor and International Space Station MDMs.

PD35

Signal Integrity in Very High Speed Circuits

Sunday, February 17 • 2:00 pm–5:00 pm Richard Hartley, CID, L-3 Avionics Systems Inc. INTERMEDIATE In all high-frequency circuits, signal integrity (SI) depends upon a number of variables, all of which accumulate to impact the noise budget of the circuit. At very high speeds, an even larger number of issues comes into play — and all the effects are more extreme. Some problems are driven by design deficiencies, some by the physical structure and design of the ICs and still more are driven by the PCB’s copper style and base material parameters. This course will outline the many variables impacting SI and provide solutions to these issues. What You Will Learn • Inter symbol interference • Jitter and its impact on timing • Attenuation of the signal eye • Skin effect and loss tangent • Impact of improper trace routing • Via length and via stubs INFORMATION that INSPIRES INNOVATION

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About the Instructor Richard Hartley is a senior principal engineer at L-3 Avionics Systems Inc. He also teaches and consults with major corporations worldwide to prevent and resolve noise, signal integrity and EMI problems. His focus is on circuits and PC boards for aircraft avionics, computers and telecommunications.

PD36

Control of EMI Coupling Mechanisms

Sunday, February 17 • 9:00 am–12:00 pm Richard Hartley, CID, L-3 Avionics Systems Inc. INTERMEDIATE This course explains the concepts needed in high-speed circuit and printed circuit design to ground a circuit for proper operation, to minimize noise and EMI. Gain an understanding of grounding and all its aspects. Each participant will receive a workbook to reference for future designs. What You Will Learn • Tips for controlling EMI • Effect of component positions on noise and EMI • Positions of planes and signals on a PCB • Split power planes and plane islands • Secondary coupling and cascaded crosstalk • Effect of corners and other impedance discontinuities • 20H rule vs. via stitching About the Instructor See PD35 on page 25.

PD40

Fundamentals of Creating Routing Channels

Monday, February 18 • 2:00 pm–5:00 pm Susy Webb, CID, FairfieldNodal INTERMEDIATE When routing signals from one area of a board to another, often the most efficient approach is to take them through channels specifically designed for that purpose. Those channels can be anything from short and simple fan-out grids that consider paths for a few signals in each direction, to long and more constrained freeways for major bus flow. This course addresses how to create appropriate channels for your application. What You Will Learn • Parts placement • Fan-out vias • Routing vias • Rough in routing • Setting up channels • Restrictions for the signals and spacing within the channels, including examples About the Instructor Susy Webb has 30 years of design experience in a variety of fields, including point-to-point microwave network systems, oceanographic oil exploration equipment and CPCI and ATX computer motherboards. Webb serves on the IPC Designers Council Executive Board.

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PD41

Designing PCB Stackups to Balance Signal Integrity Against Manufacturability

Sunday, February 17 • 2:00 pm–5:00 pm Lee Ritchey, Speeding Edge INTERMEDIATE With increasing speeds of logic and RF system speeds, demands placed on PCBs make it necessary to consider more than impedance when designing the stackup used for PCB manufacturing. Find out what you need to know to make performance decisions about crosstalk rules, impedance targets, interplane capacitance and types of weaves, so you can minimize the differential skew between high-speed differential pairs used in protocols, such as PCI Express, XAUI, Double XAUI and other data links that operate at multiple gigabit-per-second rates. This session will cover all aspects of PCB stackup design to help you maximize the advantages of the fabrication process and work with both fabricators and laminate suppliers to achieve the highest performance from the overall process at the lowest cost. What You Will Learn • PCB stackup design • Materials choices • Arrangement of signal layers and power planes About the Instructor Lee Ritchey has participated in the design of more than 3,000 high speed PCBs, ranging from PC mother boards and elevator controllers to the backplanes used in terabit routers. An author of two high speed design books, Ritchey consults for top manufacturers of Internet and server products.

PD43

Designing Complex Boards

Sunday, February 17 • 2:00 pm–5:00 pm Susy Webb, CID, FairfieldNodal INTERMEDIATE When beginning a complex board design, designers are faced with a unique set of needs and questions. Where should the process start? How should information be organized on all the schematic pages? What is the best way for these parts and sections to fit together electronically? How can everything be placed and routed so it all fits within the board outline and has good signal integrity? This course will reveal the answers to these questions and provide important insight into designing complex boards. What You Will Learn • Laws of physics • Why some practices may work better than others • Board design examples About the Instructor See PD40 on this page.

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Emerging Technologies PD44

Package on Package (PoP), Design Assembly, Rework and Inspection

Sunday, February 17 • 2:00 pm–5:00 pm Bob Willis, AskBobWillis.com INTERMEDIATE PoP applications are growing in popularity for mobile and handheld electronics, increasing demands on assembly engineers. When the real estate on printed boards is at a premium for logic and memory, the only way to go is up. PoP — especially the new TMV packages — is new to many contract and OEM assembly staff. Paste dipping, reflow warpage, increased placement accuracy and process introduction can be demanding, and staying up to date with the technology is vital. Multi-level ball inspection can be a challenge, as level-one balls can mask level-two and -three interconnections. With TMV packages, the second level terminations are not available for optical inspection, making x-ray mandatory. Learn the benefits and challenges of PoP stack packages. Each participant will receive a set of PoP inspection and quality control wall charts covering optical and X-ray inspection, dip flux and past application, placement criteria and all of the latest assembly defects that can occur with the second generation of PoP. What You Will Learn • PCB design rules — pad layout, via hole connection • PoP placement — tack flux, dip solder paste • Reflow soldering — convection, vapor phase, temperature profiling • Optical and X-ray inspection for PoP and TMV • Underfill • Rework • Defects About the Instructor See PD42 on page 23.

PCB Fabrication and Materials PD01

Advanced Troubleshooting: Cause, Effect and Prevention of PCB Defects

Monday, February 18 • 9:00 am–12:00 pm Mike Carano, OMG Electronic Chemicals ADVANCED This course will address advanced problem solving of printed board defects. Some defects, such as interconnect separation, delamination, wedge voids, plating folds, microvoids, surface pitting and hole wall pull-away, carry significant costs. Many are difficult to solve because the root cause may not be readily apparent and multiple factors may contribute. This course will explore the most intricate of these factors and how the interrelationship of up- and down-stream processes contribute to scrap product. What effect does drilling have on hole-wall quality and the subsequent metallization process? Participants will learn how to recognize problems like this and take corrective action. What You Will Learn • Lamination and other multilayer related defects • Electrodeposition defects: mouse bites, pitting, nodules, crown or dome plating, dog bone defects — copper plating reliability • How to improve plating distribution and throwing power • Metallization: microvoids/voiding, interconnect separation, hole wall pull-away and assembly issues • Black pad phenomenon: new details on its cause and how to eliminate it • Imaging: defects, surface preparation, solder mask issues and defects, process control • Other final-finish related defects: creep corrosion, champagne bubble effect About the Instructor An author and patent holder with more than 30 years of industry experience, Mike Carano’s primary focus is on metallization technologies, electroplating, solderable finishes, HDI, selective metal finishing, semiconductor packaging, surface treatment of metallic and non-metallic substrates and imaging processes.

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PD07

PCB Fabrication Basics: Process and Specification — Part I

Sunday, February 17 • 9:00 am–12:00 pm Don Schmieder III and Jim Vanden Hogen, Plexus Corporation BASIC This two-part course for engineering, design and procurement staff and management will review an entire multilayer PCB fabrication process and show how design affects fabrication and assembly. Physical samples taken from the fabrication process will be available for inspection. Part I will cover PCB types and industry specifications, laminates and their properties, front-end engineering and basic layer stackups. Discussion will continue with inner-layer processing and lamination, and conclude with drilling. For maximum benefit, register for both this session and Part II (PD-02) in the afternoon. What You Will Learn • Step-by-step PCB fabrication process • PCB types and industry specs • Laminate types and properties • Stackups, via metrics and aspect ratios About the Instructors Working in the electronics field for 22 years, Don Schmieder worked in production and quality at Zycon and in the Plexus PCB Commodity Group. His experience spans purchasing, procurement, manufacturing, assembly and testing of PCBs, and he has performed technical and quality audits of more than 50 PCB fabricators worldwide. Jim Vanden Hogen has more than 35 years of experience in the design, purchase, manufacture, assembly, test and sale of PCBs. A senior PCB commodity specialist, he has worked as a PCB designer, DFM technologist and product introduction manager at Plexus Corporation, and as a regional sales manager for Herco Technology.

PD02

PCB Fabrication Basics: Process and Specification — Part II

Sunday, February 17 • 2:00 pm–5:00 pm Don Schmieder III, and Jim Vanden Hogen, Plexus Corporation BASIC Part II of this full-day course will review the fabrication process after drilling, and discuss desmear, electroless copper, outer-layer processing, soldermask, legend and electrical test. The instructors will share the pros and cons of various surface-finish applications and discuss cost-effective arrays that maximize material, facilitate manufacturing and allow for post-assembly singulation. Using the IPC-6012 PCB fabrication specification for reference, participants will learn how to develop their own procurement documentation, including addressing RoHScompliant materials. For maximum benefit, register for both this session and Part I (PD07) in the morning. See PD07 above for more information.

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PD03

Metallization and Electroplating for HighAspect Ratio Holes and SmallDiameter Blind Vias

Monday, February 18 • 2:00 pm–5:00 pm Mike Carano, OMG Electronic Chemicals INTERMEDIATE In order to jump up the technology curve, fabricators must be able to metallize and electroplate increasingly smaller through holes and blind vias. Plating distribution, throwing power and copper deposit reliability are all key success factors in metallization operation. The course will include fundamentals of electroless copper, acid copper electroplating, equipment set-up and process controls for a successful plating operation. Pulse plating will also be presented. What You Will Learn • Electroless copper parameters — chemical and mechanical • Acid copper fundamentals • Effect of additives on performance • Physical properties of the copper deposit • How to improve throwing power and plating distribution • Design considerations for plating success • Plating equipment set-up • Process maintenance and controls for pulse plating About the Instructor See PD01 on page 27.

PD09

Advanced HDI Substrates: Successful HDI Product Implementation

Sunday, February 17 • 2:00 pm–5:00 pm Happy Holden, Gentex Corporation ADVANCED High density interconnect (HDI) implementation can be formidable. This course models successful engineering training used by a number of large aero/military, telecom and computer OEMs for product development to successfully implement HDI technologies in their PCB programs. The course also covers signal and power integrity of advanced HDI structures and examples of their effects. Understand the challenges and work required to successfully implement HDI technology.

“The professional development courses were very useful for learning about processes and new technologies.” Hiroya Saito PWA IMC Manager Schlumberger K.K.

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PD34

What You Will Learn • Buried active devices • Progress in embedding actives in PCBs from Japan, Europe and North America • Process details including examples with performance information • Optical waveguides in PCBs • Industry test vehicles and experiences and reliability performance of HDI structures • Advanced HDI structures, second and third generation, including the “stacked” and “any-layer-via” structures • Signal integrity/power integrity of HDI • Basic HDI electrical performance of fine-line and blindvias for signal loss, crosstalk, capacitance, inductance and signal propagations

Sunday, February 17 • 9:00 am–12:00 pm Christopher Ryder, AT&S Austria Technologie & Systemtechnik AG INTERMEDIATE HDI (high density interconnect) PCB manufacturing brings with it a host of variations in process and product compared to standard multilayer PCB production. This course highlights key points from last year’s introductory course and builds on the specifics of process, materials, design rules and reliability pertaining to HDI products and principles. Realizing an HDI product in terms of design and application elements will be a focal point as we explore elements such as special materials (CAF resistance, low loss factor, halogen-reduced, etc.) and their role in the final goods. Furthermore, advanced HDI fabrication concepts, such as embedded components, alternative via construction and HDI rigid-flex, will be introduced and discussed.

About the Instructor See PD10 on page 24.

PD25

Applications of Flexible Circuits for Military Products

Monday, February 18 • 2:00 pm–5:00 pm Bradford Saunders Sr., Minco Products, Inc. INTERMEDIATE Arm yourself with the knowledge you need to develop flexible circuits that meet military requirements. This course will baseline a standard flex fabrication process in comparison to a standard rigid board, and explore the potential for substantial savings in parts per panel quantity. DFM insight, decisions that affect next-assembly, circuit card assembly (CCA), line-replaceable units (LRU), and long term plated-through hole reliability will be covered. Learn about documentation and specifications, along with criteria for surface finish, materials and vias. The correlation of arrays to reliability and cost, as well as the importance of flex transition zone to price/schedule and reliability will also be discussed. What You Will Learn • Configuration and types of flex, multilayer flex in excess of 36 inches • HDI design rules; sub .8mm BGA build • Conventional sequential lamination design rules • Aspect ratio tradeoffs to min PTH • Failure analysis of common errors About the Instructor Bradford Saunders has more than 25 years of experience as a packaging design engineer, performing hands-on engineering and fabrication of flex, PWB, CCA, cabinets and cables for military and commercial applications.

HDI: Understanding Processes, Realizing Products

What You Will Learn • HDI stackup nomenclature • Basic HDI PCB manufacturing process flow • Common base materials employed in HDI • Quality control tests and methods • Common process defects • Laser via process, including general industry variations About the Instructor Christopher Ryder is the global customer quality manager at AT&S. A prolific contributor to the technical domain, he has co-authored technical papers on topics including embedded component reliability, multi-depth cavity PCBs and others. Ryder is a member of the IPC J-STD-003 and IPC-TM-650 standards committees.

PD45

Front-End Engineering Perspective on Design Issues

Sunday, February 17 • 9:00 am–12:00 pm Mike Tucker, Colonial Circuits Inc. BASIC Today’s CAM systems and departments are critical for engineering CAD data, ensuring manufacturability and creating manufacturing tools. This course will provide an inside look at a typical CAM department at a bareboard fabricator, highlighting day-to-day challenges and practices to avoid common problems, and reviewing how a basic multilayer board is built and why a design may go on hold in fabrication. Find out why some fabricators flag issues that others don’t. Actual case studies of problems and resolutions will be discussed. Physical production panels from every phase of the fabrication process will be displayed to demonstrate how a basic multilayer board is built. Classroom demonstrations and discussion will make this course extremely valuable to participants.

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What You Will Learn • Data required from designers for fabrication • What CAM departments do with your data • Design recommendations • Rules-of-thumb DFM guidelines • Top reasons why jobs go on hold at fabrication About the Instructor As director of engineering for Colonial Circuits, Mike Tucker works to create robust, manufacturable products. He has more than 15 years of industry experience, with special expertise in front-end engineering for bare-board fabrication.

Quality, Reliability and Test PD18

Durability/Reliability Simulations CAE APPS for Physics of Failure

Sunday, February 17 • 2:00 pm–5:00 pm James McLeish, DfR Solutions ADVANCED Physics of failure (PoF) is a science-based approach for achieving reliability-by-design in electronics based on research into why electronic components and materials fail. Computer aided engineering (CAE) tools can use PoF knowledge to perform durability simulations and reliability assessments to evaluate whether a design is susceptible to failure. In the past, the time/expertise involved limited the expansion of PoF and other CAE tools in many industries. Now, new CAE applications and templates are being developed to resolve this bottleneck. This course will introduce the new generation of PoF CAE applications for electronics and provide examples. What You Will Learn • Physics of failure and reliability physics methods • Achieving reliability and durability by design • Modern PoF-based failure durability simulations and reliability assessment methods for electronic equipment • Emergence of CAE applications • Virtual validation modeling tools • How durability simulations can be used in virtual field to test correlation activities, such as simulation aided testing (SAT) for projecting test results to the field environment and simulation guided testing (SGT) for designing an accelerated test profile

PD21

Tin Whiskers: Failure Risk and Mitigation Strategies

Sunday, February 17 • 2:00 pm–5:00 pm Michael Osterman, Ph.D., University of Maryland INTERMEDIATE Tin whiskers are fine hair-like conductive structures that form unpredictably on pure tin and tin-based alloys. In electronic systems, the formation of tin whiskers can lead to serious failure risks. Tin whiskers have been responsible for the failure of automotive, satellite, nuclear power plant, missile defense and medical equipment. Alloying tin with lead has been demonstrated to significantly reduce the risk of tin whisker formation; however, the ban on lead in electronics in many countries has resulted in the increased use of lead-free tin. As a result, concerns about tin whisker-induced failures have risen. This course will review theories of whisker growth, tin whisker failure mechanisms and strategies for assessing and mitigating tin whisker failure risk. What You Will Learn • Growth mechanisms • Test methods • Mitigation strategies • Whisker-induced electrical shorts and metal vapor arc formation • GEIA-STD-0005-2 • Failure risk assessment About the Instructor Dr. Michael Osterman is a senior research scientist and the director of the CALCE Electronic Products and System Consortium at the University of Maryland. He heads the development of simulation-assisted reliability assessment software for CALCE and simulation approaches for estimating time-to-failure of electronic hardware.

About the Instructor James McLeish is a manager of DfR Solutions, a failure analysis/lab services and quality/reliability/durability (QRD) consulting firm. He holds an MSEE, is a senior member of the ASQ Reliability Division and a member of the SAEAutomotive Reliability Standards and ISO-26262 Functional Safety Committees.

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Visit www.IPCAPEXEXPO.org/courses for complete course information and full instructor biographies.

PD22

Physics of Failure

Sunday, February 17 • 9:00 am–12:00 pm Michael Osterman, Ph.D., University of Maryland ADVANCED Reliability is the ability of a product to perform without failure and within specified performance and time limits in its life-cycle application environment. The physics-offailure (PoF) approach to reliability utilizes knowledge of the life-cycle load profile, product architecture and material properties to identify potential failure mechanisms and reduce product failures through robust design, manufacturing and product verification practices. This course will explore key reliability concepts and relate them to the PoF approach. The information provided will be useful for implementing a physics-of-failure methodology for the life cycle of a product, including product development. Participants will learn how to develop a PoFbased reliability assessment program and migrate to it from current practices. What You Will Learn • Reliability and physics of failure • Steps in design for reliability • Failure modes, mechanisms and effects analysis • Simulation assisted reliability assessment • Product verification, including accelerated testing

About the Instructor Since 2002, Martin Anselm has been working in Universal Instruments’ Advanced Process Lab. He has worked with some of the world’s largest electronics manufacturers, not only determining root cause, but also implementing changes to improve end product quality, reliability and manufacturability.

PD27

Optimizing X-Ray Inspection: Equipment, Processes and Procedures

Monday, February 18 • 9:00 am–12:00 pm Bob Klenke, ITM Consulting Inc.

About the Instructor See PD21 on page 30.

PD23

What You Will Learn • Major difficulties in lead-free reliability testing • Mixed alloy assembly best practices • ENEPIG intermetallic formation morphologies • PCB plating considerations • Analytical testing techniques • Root causes of production failures • Failure analysis studies — fine-pitch printing, PoP, 01005 defects and high Tg laminate failures

Failure Analysis: Lessons Learned

Monday, February 18 • 9:00 am–12:00 pm Martin Anselm, Universal Instruments Corporation INTERMEDIATE When reviewed in conjunction with research, failures provide a unique perspective on design for manufacturability and reliability. This course will provide valuable lessons learned from practical experience through discussion of material selection, current electronics research and failure analysis case studies. Design considerations for advanced assembly processes and analytical techniques for materials characterization will also be covered. In addition, a review of lead-free laminate selection and testing procedures will shed some light on the question, “Can your board withstand 9x reflow?” Participants are encouraged to bring specific questions or examples of surface mount process difficulties to be shared in open discussion at the end of the course.

INTERMEDIATE High manufacturing yields are best attained by a comprehensive understanding and successful implementation of the most appropriate test and inspection regimen. Based on a real-world consulting practice, this course will provide participants with a thorough, practical overview of the X-ray inspection process. It includes step-by-step coverage of X-ray inspection methodologies, including equipment characteristics, processes and procedures. In addition, participants will learn techniques vital to the inspection of lead-free assemblies, as well as methods to minimize X-ray dosage experienced by radiation-sensitive components such as DRAM and SDRAM devices. What You Will Learn • Fundamentals of X-ray inspection • Defect detection techniques • Specific application requirements • Computerized tomography • Optimizing the X-ray inspection process About the Instructor A consultant to the PCB assembly industry and member of ITM Consulting, Bob Klenke’s area of responsibility includes working with OEMs and EMS companies to solve assembly problems and optimize facility operations. His expertise includes process optimization, process troubleshooting and value-added defect resolution strategies.

INFORMATION that INSPIRES INNOVATION

PROFESSIONAL DEVELOPMENT COURSES

PD31

Tin Whiskers Mitigation: A New Approach

PD49

Test Strategies With Boundary Scan

Monday, February 18 • 9:00 am–12:00 pm Cheryl Tulkoff, CRE, DfR Solutions

Sunday, February 17 • 9:00 am–12:00 pm Louis Ungar, A.T.E. Solutions, Inc.

ADVANCED Aerospace and defense industries consider tin whiskers the greatest reliability risk associated with lead-free electronics. Gain an understanding of tin whisker formation, and learn how to apply the latest advances for mitigation and prevention in this course. The course emphasizes the importance of addressing all potential sources of compressive stress for a particular application to ensure successful mitigation. It also examines the cost savings and quality benefits of using a checklist approach rather than long-term environmental testing for whisker management.

INTERMEDIATE Faults can occur at every stage of the manufacturing process. Test planners must develop strategies based on circuit types, workloads, various fault distributions and volume of production. This unique course will introduce a new way to increase test capabilities with existing automatic test equipment (ATE), and will benefit those concerned with successful production of quality products. Boundary scan (JTAG) has become an important asset in more timely and cost-effective test strategies. Both incircuit and functional board tests benefit greatly from even a few boundary scan chips on a circuit board, especially if those ICs are large pin count ball grid arrays (BGAs). Such devices are now readily available. With boundary scan pins performing as virtual test points and test points performing as virtual boundary scan pins, a variety of test functions can be created. Integrating boundary scan with built-in self-test (BIST) can also bring even more capabilities into the test strategy mix. With JTAG ports available on many devices — even when boundary scan is not — the possibilities increase.

What You Will Learn • What are tin whiskers? • What are the potential failure modes? • Where have tin whiskers caused failure? • Root causes of whiskers • Drivers • Mitigation • Sources of compressive stress • Checklist About the Instructor See PD08 on page 19.

PD37

Design For Reliability (DFR)

Sunday, February 17 • 2:00 pm–5:00 pm Cheryl Tulkoff, CRE, DfR Solutions INTERMEDIATE Why design for reliability? The foundation of a reliable product is a robust design that provides margin, mitigates risk from defects and satisfies the customer. Ensuring reliability of electronic designs is becoming increasingly difficult due to increasing complexity of electronic circuits, increasing power requirements, introduction of new component and material technologies and introduction of less robust components. This results in multiple potential drivers for failure. The process of design for reliability (DfR) is achieving a high profile in the electronics industry and is part of an overall design for excellence (DfX) program. What You Will Learn • Definition of “design for reliability” • Motivation for use • Specifications (product and environment definitions and concerns) • Component selection and considerations • Failure mechanisms • New technologies — power components, electronic modules and fuses • Newer leadless devices — QFNs, DFNs, wearout mechanisms and physics of failure

What You Will Learn • Test strategies • Review of automated inspection methodologies • Boundary scan (JTAG/IEEE-1149.1) as part of design for testability (DFT) • Boundary scan interactions with built-in self-test (BIST) • Test economics About the Instructor Louis Ungar is president of A.T.E. Solutions. He has served as testability chair for the Surface Mount Technology Association and on committees for various IEEE standards, including those of IEEE Std. 1149.x. Ungar holds a BSEE and a computer science degree from UCLA, and has completed course work toward an M.A. in management. “I came to IPC APEX EXPO to attend some professional development courses to help further my career as a PCB designer. I was able to speak with experts in the design, fabrication, and assembly of printed circuit boards. The knowledge I gained helped solve serious issues my company had with a few designs. The cost of the show was irrelevant compared to the money invested in diagnosing our issues and the tenfold knowledge gained.” Tommy Ligotti Senior PCB Designer

About the Instructor See PD08 on page19.

www.IPCAPEXEXPO.org

Visit www.IPCAPEXEXPO.org/courses for complete course information and full instructor biographies.

PD32

Supply Chain/Business Issues PD24

Preparing Your Business for Sale or Transition or Readiness

Lean: 10 Things Every Manager Should Know for a Competitive Advantage

Thursday, February 21 • 9:00 am–12:00 pm Steven Williams, Plexus Corporation

Thursday, February 21 • 9:00 am–12:00 pm Bob Richardson, Team ITAR INTERMEDIATE According to Dunn & Bradstreet, 63 percent of privately held businesses are owned by members of the “baby boom” generation. Over the next 20 years, most of these businesses will be sold, transferred or merged. While a business is normally one’s largest single asset, few business owners have prepared for maximum gain at sale. This fastpaced seminar will provide information crucial to navigation through the process, with strategies and actions participants can start taking now to improve financial return later. What You Will Learn • Methodology and mechanics of valuation • Discussion of buyer types and attributes — financial, strategic, hybrid and individual • Regulatory considerations impacting value and transfers • Transaction structures and tax implications • Timing, momentum and managing expectations • Using an intermediary and/or investment banker to orchestrate the process • The first date — be prepared • The Letter of Intent (LOI) • Due diligence • Purchase and sale agreement • Developing a business value improvement plan About the Instructor Bob Richardson was a senior vice president and director of marketing of a global M&A firm, where he screened and reviewed more than 5,000 business-acquisition candidates and facilitated the acquisition and sale of defense-related businesses. Richardson has also been a contributing columnist to Inc. Magazine.

INTERMEDIATE Lean is the most powerful tool your company can use to improve organizational performance and competitiveness. This course will provide an overview of lean to help managers understand how the program can help any organization survive. Lessons learned from experience in manufacturing management will be shared. Hear about common mistakes and myths as well as what it takes to successfully implement a lean program. What You Will Learn • The need for lean • Drive-by lean • The lean philosophy • The seven deadly wastes • Process analysis • Why 99 percent yield is not good enough • The lean toolkit • A glossary of lean terms About the Instructor A 35-year veteran of the electronics industry, Steve Williams is currently responsible for strategic materials management and tactical support of a custom-engineered components supply base for a major manufacturer. He is an author and a contributing columnist for PCB007.

PD38

Counterfeit Protection & Detection Strategies: When to Do It and How to Do It

Monday, February 18 • 2:00 pm–5:00 pm Cheryl Tulkoff, CRE, DfR Solutions INTERMEDIATE Gain important knowledge to help keep counterfeit components off of your printed boards. Counterfeit components are a rapidly-growing area of concern. The Department of Commerce has identified a 141 percent increase in the last three years alone! Counterfeit parts are no longer an emerging threat: they’re real and here to stay. A counterfeit item is one that is “not as it is represented, with the intention to deceive buyer or user.” The misrepresentation is often driven by the known presence of defects or other inadequacies in regards to performance. Whether used for a commercial, medical or military application, a counterfeit component can cause catastrophic failure at a critical time. What You Will Learn • State of counterfeiting • Background, facts and statistics • Strategies for prevention • Mitigation case studies and examples • Detection and failure analysis techniques About the Instructor See PD08 on page 19.

INFORMATION that INSPIRES INNOVATION

PROFESSIONAL DEVELOPMENT COURSES

PD47

Contracting with the Customer: What the EMS Manager Needs to Know — Part I

Thursday, February 21 • 9:00 am–12:00 pm Allen Anderson J.D., CPCM, and Jeffrey Roth, Fees & Burgess, P.C. ADVANCED Without a doubt, negotiating with OEMs is one of the biggest challenges facing EMS managers. What needs to be covered in the contract? Is your company protected? What should you do if there is a dispute? This comprehensive, two-part course addresses the specific contractual issues faced by EMS companies. Gain a stepby-step understanding of the contracting lifecycle between an EMS provider and its customer, starting with initial engagement and signing of a nondisclosure agreement, through the bid process and formal contract negotiation, to resolution of disputes under the applicable contract(s). Using real-life situations, the contracting process as well as the questions that must be answered before entering into an agreement will be covered. Participants must be representatives of EMS organizations to attend. It is recommended that participants attend both this session and Part II (PD48) in the afternoon. What You Will Learn • How to reduce risk in contracting by having an appropriate agreement in place at each step of the relationship • How to deal with letters of intent and other preliminary and precontractual agreements • Key contract risk areas and practical suggestions for negotiating favorable terms in those areas • How to respond to customer boilerplate contract documentation and purchase orders • Specific methodologies for limiting financial, warranty, product liability and other risks About the Instructors Allen Anderson is a shareholder in the law firm of Fees & Burgess, P.C., practicing in the areas of commercial, construction and employment law, and corporate and government contracting. He received his J.D. from Cumberland School of Law at Samford University, and holds a B.S. and a B.A. from Wofford College. Jeffrey Roth practices in the areas of commercial and contract law, business transactional and regulatory law, employment, general corporate law and governmental contracting. He has held senior corporate counsel positions with Avco Electronics TEXTRON, AVEX Electronics, Benchmark Electronics, and Sanmina-SCI.

www.IPCAPEXEXPO.org

PD48

Contracting with the Customer: What the EMS Manager Needs to Know — Part II

Thursday, February 21 • 2:00 pm–5:00 pm Allen Anderson J.D., CPCM, and Jeffrey Roth, Fees & Burgess, P.C. ADVANCED This is the second of a two-part course on contracts. Participants must be representatives of EMS organizations to attend. It is recommended that participants attend both this session and Part I (PD47) in the morning.

“I loved the show. The conference and courses are a great opportunity to increase my value as a professional. Having the opportunity to shape the industry through the committee meetings, meeting my colleagues, and last, having the chance to talk to the technical experts and see equipment being used today is incredibly valuable.” Rigo Garcia Sr. Quality Assurance Engineer NASA Goddard Space Flight Center

Visit www.IPCAPEXEXPO.org/courses for complete course information and full instructor biographies.

STANDARDS DEVELOPMENT MEETINGS

Contribute to the industry standards and guidelines that your company, customers, suppliers and competitors rely on. These sessions are open to all attendees, unless noted otherwise. Registration to attend committee meetings is FREE before the show ($40 on-site). Take advantage of all the show has to offer with the Maximum Value Package. Register by January 25 and save 20%. 5-23b Component and Wire Solderability

Assembly and Joining

5-20 Assembly & Joining Committee

Specification Task Group Monday, February 18 David Hillman, Rockwell Collins This group will discuss the ongoing round Robin Test S (found in the J-STD-002 document) to better define solder stencil aperture requirements.

5-21e Solder Stencil Task Group Monday, February 18 William Coleman, Ph.D., Photo Stencil Inc; George Oxx Jr., Jabil Circuit, Inc. (HQ) This task group is responsible for the maintenance of the IPC-7525, Stencil Design Guideline. This guide assists users in selecting stencil apertures for solder paste printing, including support for use with lead-free alloys.

5-24a Flux Specifications Task Group Wednesday, February 20 Renee Michalkiewicz, MIT, Trace Laboratories - Baltimore This group will revise/update test methods applicable to J-STD-004.

Sunday, February 17 Leo Lambert, MIT, EPTAC Corporation This is a planning meeting for the task group and subcommittee leaders of the Assembly and Joining Processes Committee.

5-21f Ball Grid Array Task Group Wednesday, February 20 Ray Prasad, Ray Prasad Consultancy Group The committee will review the published C revision of IPC-7095, and determine the applicable changes that need to be made in a companion document, IPC-7093 on bottom termination components. 5-21h Bottom Termination Components (BTC)

Task Group Wednesday, February 20 Ray Prasad, Ray Prasad Consultancy Group; Vern Solberg, Solberg Technical Consulting The committee will review the deliberations of the completion of IPC-7095C and consider an amendment or revision to the bottom termination components document, IPC-7093.

5-22a J-STD-001 Task Group Sunday, February 17 Teresa Rowe, CIT, AAI Corporation This task group is developing revision F of J-STD-001, Requirements for Soldered Electrical and Electronic Assemblies. 5-23a Printed Circuit Board Solderability

Specifications Task Group Monday, February 18 Gerard O’Brien, Solderability Testing & Solutions, Inc. This group is updating IPC J-STD-003 to its C revision. This document will address more wetting balance data generation and provide improved solder float test and solder spread test protocols.

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5-24b Solder Paste Task Group Wednesday, February 20 Graham Naisbitt, Gen3 Systems Limited Karen Tellefsen, Ph.D., Cookson Electronics This group is revising IPC-HDBK-005. 5-24c Solder Alloy Task Group Tuesday, February 19 Jennie Hwang, Ph.D., Sc.D., H-Technologies Group This group is working on revision C of J-STD-006, Requirements for Electronic Grade Solder Alloys and Fluxed and Non-Fluxed Solid Solders for Electronic Soldering Applications. 5-24f Underfill Adhesives for Flip Chip Applications

Task Group Thursday, February 21 Brian Toleno, Ph.D., Henkel Corporation This group is working on revision A of J-STD-030, Guideline for Selection and Application of Underfill Material for Flip Chip and Other Micropackages, and a re-title of the document to Design, Selection and Process Implementation for Underfill Materials, that allows the document to be less constrained on topic and serve as both a specification and a guideline.

“I really enjoyed participating on the IPC-A-610 and J-STD-001 standards committees. It is exciting to see a room full of concerned volunteers share their vast wisdom and experience to improve the documents we use daily.” Floyd Bertagnolli Master IPC Trainer Service To Mankind

INFORMATION that INSPIRES INNOVATION

STANDARDS DEVELOPMENT MEETINGS

Base Materials

3-11 Laminate/Prepreg Materials Subcommittee

Monday, February 18 Antonio Senese, Panasonic Electric Works This subcommittee is revising IPC-4101 to its D revision. The revisions include: adding an optional fracture toughness test method; adding DMA as well as DSC and TMA thermal analysis test methods as an allowed means of determining the Tg for selected specification sheet materials; cleaning up the use of N/A in all of the specification sheets to prevent confusion; eliminating some specification sheets for obsolete materials; and adding any new materials not already delineated in existing specification sheets.

3-11f UL/CSA Task Group Tuesday, February 19 Douglas Sober, Shengyi Technology Co. Ltd. This task group addresses issues relative to UL’s standards on rigid (nonflexible) laminates (UL-746E) and on rigid (nonflexible) printed boards (UL-796). The technical issues will feed into the UL STP meeting on these two UL standards. 3-11g Corrosion of Metal Finishes Task Group Thursday, February 21 Beverley Christian, Ph.D., Research In Motion Limited This group is exploring and gathering data on the effects of corrosion on surface finishes through the use of mixed flowing gas (MFG) testing. Test facilities capable of running very high levels of hydrogen sulfide (≥1700 ppb) in conjunction with three other corrosive gases have been located and round robin MFG testing has started. 3-12a Metallic Foil Task Group Tuesday, February 19 Rolland Savage, High Performance Copper Foil Inc. This group is generating a noncontact test method and is gathering data on copper foil surface roughness measurements for possible inclusion in revision B of IPC4562, Metal Foil for Printed Board Applications. 3-12d Woven Glass Reinforcement Task Group Monday, February 18 Mike Bryant, BGF Industries Inc. This task group is working on the B revision of IPC4412, Specification for Finished Fabric Woven from “E” Glass for Printed Boards. The B revision is anticipated to be concluded in early 2013 which means the efforts are definitely on a fast track.

3-12e Base Materials Roundtable Task Group Monday, February 18 Edward Kelley, Isola Group SARL Using an open discussion format, this group will explore needed specifications and characterization methods for strategic materials used to manufacture laminates and prepregs. Discussions on reinforcements, resins, fillers and metal foils are anticipated.

Cleaning and Coating

5-31g Stencil Cleaning Task Group Wednesday, February 20 Mike Bixenman, DBA, Kyzen Corporation This task group is responsible for the maintenance of the guideline document, IPC-7526, Stencil and Misprinted Board Cleaning Handbook. This meeting will continue the process of revising the standard to revision A. 5-32a Ion Chromatography/Ionic Conductivity Task

Group Monday, February 18 John Radman, Trace Laboratories - Denver This task group is reviewing comments to test methods for ionic cleanliness testing.

5-32b SIR and Electrochemical Migration Task

Group Monday, February 18 Keith Sellers, Trace Laboratories - Baltimore This task group is working to complete IPC-9203, User Guideline for the IPC B-52 SIR Test Board.

5-32c Bare Board Cleanliness Assessment

Task Group Wednesday, February 20 Douglas Pauls, Rockwell Collins This task group is finalizing IPC-5703, a cleanliness guideline for printed board fabricators.

5-32e Conductive Anodic Filament (CAF) Task Group Tuesday, February 19 Karl Sauter, Oracle America, Inc. This group has just added the A revision of Test Method 2.6.25 into IPC-TM-650. The group is working on the B revision of IPC-9691, User Guide for the IPC-TM-650, Method 2.6.25, Conductive Anodic Filament (CAF) Resistance Test (Electrochemical Migration Testing. 5-33a Conformal Coating Task Group Wednesday, February 20 John Waryold, HumiSeal Division of Chase Corporation This task group is initiating a revision of the IPC-CC-830 conformal coating specification to address new conformal coating materials and will discuss an adhesion testing method.

For current schedule, times, and full descriptions, visit www.IPCAPEXEXPO.org/standards. Days are subject to change.

5-33c Conformal Coating Handbook Task Group Tuesday, February 19 and Wednesday, February 20 Amy Hagnauer, Raytheon Company; Jason Keeping, Celestica This task group is revising the IPC-HDBK-830 conformal coating handbook.

Electronic Documentation Technology

2-40 Electronic Documentation Technology

Committee Tuesday, February 19 Karen McConnell, CID, Northrop Grumman Corporation The 2-40 committee covers documentation (IPC-2610 series) which includes hard copy, electronic copy and machine-usable data. The committee has turned its attention to providing electronic formats for both printed board and assembly standards using IPC-2581A schema concepts. An effort will be started on revision A to IPC-2614 on the printed board, including IPC-2614-1 for laminate and IPC-2614-2 for board electronic description.

2-41 Product Data Description Subcommittee

Monday, February 18 Douglas Sober, Shengyi Technology Co. Ltd. The purpose of the meeting is to analyze the data model for laminate construction and convert a portion of it into the XML schema identified in IPC-2581. Members will consider how any missing elements or attributes characterized in IPC-1730 can be captured in a future revision of IPC-2614, Sectional Requirements for Board Fabrication Documentation.

Electronic Product Data Description

2-16 Product Data Description (Laminar View)

Subcommittee Sunday, February 17 This committee will discuss new requirements to be added to the XML schema of IPC-2581A, Generic Requirements for Printed Board Assembly Products Manufacturing Description Data and Transfer Methodology. Of great interest is the coordination needed between electronic documentation identified in IPC-2614-1 and IPC2614-2. The committee will also prepare an outline for the assembly (IPC-2616) and testing (IPC-2617).

2-18 Supplier Declaration Subcommittee Friday, February 22 Krista Crotty, Alberi EcoTech This subcommittee recently approved an amendment to IPC-1751A. The group will review the XML schema for all supplier declaration standards and discuss further enhancements.

www.IPCAPEXEXPO.org

2-18b Materials Declaration Task Group Tuesday, February 19 Mark Frimann, Texas Instruments Inc.; Aidan Turnbull, Ph.D., ENVIRON UK Ltd This task group will continue discussing harmonization of the IPC-1752A materials declaration management standard with the IEC 62474 materials declaration standard. IPC1752A allows for the exchange of information related to materials in products. The standard is part of the IPC 175x series of data exchange standards. 2-18f Declaration of Shipping, Pack and Packing

Materials Task Group Tuesday, February 19 John Ciba Jr., Brady Corporation; Lee Wilmot, TTM Technologies, Inc. This task group will discuss possible enhancements to the IPC-1758 standard on declaration requirements for shipping, pack and packing materials.

2-18g Declaration of Batteries and Battery

Materials Task Group Wednesday, February 20 Aimee Siegler, Benchmark Electronics Inc.; Kelly St. Andre, PTC This group is developing a new IPC standard for the declaration of batteries and battery materials. Intended to facilitate the exchange of information related to compliance and conformance with customer and legal requirements pertaining to battery chemistry, weight and category, this standard will be part of the IPC-175x series which are XML schema-based.

2-18h Conflict Minerals Data Exchange Task Group Thursday, February 21 John Plyler, Research In Motion This task group is developing a data exchange standard for the exchange of supply chain data necessary for compliance with the Dodd-Frank conflict minerals regulation and OECD Due Diligence Guidelines for conflict minerals. The data standard is being developed as a part of the IPC-175x declaration family. 2-18j Laboratory Report Declaration Task Group Wednesday, February 20 William Haas, Seagate Technology LLC This task group will continue development of a data exchange standard for laboratory chemical analysis reports between supply chain members. Companies are being asked to provide laboratory analytic data to show compliance with the RoHS Directive and other customer requirements, such as halogen-free.

INFORMATION that INSPIRES INNOVATION

STANDARDS DEVELOPMENT MEETINGS

Embedded Devices

D-55 Embedded Devices Process Implementation

Subcommittee Tuesday, February 19 Rajesh Kumar, Viasystems North America, Inc.; Vern Solberg, Solberg Technical Consulting This group will discuss IPC-7092, which describes the design and assembly challenges for implementing passive and active components in either formed or inserted methodology on a printed board. The new standard focuses on fabrication and assembly processes and attempts to identify various board types where components are inserted on one or both sides of a center core encapsulated by additional HDI layers.

Environment, Health & Safety (EHS) 4-30 Environment, Health & Safety Steering

Committee Monday, February 18 Lee Wilmot, TTM Technologies, Inc. The EHS committee is responsible for promoting cleaner and safer electronics manufacturing worldwide. The committee will discuss global, legislative, and regulation issues affecting the electronics industry.

4-32 Equipment Safety Subcommittee Monday, February 18 Stefan Radloff, Intel Corporation; Lee Wilmot, TTM Technologies, Inc. This committee is developing a standard for equipment safety in the PCB/electronics industry. Equipment users require some basic safety requirements for equipment, however, those requirements vary from customer to customer. The standard will establish a common set of safety expectations for equipment that will help ensure that safety is designed into equipment from the beginning and that custom requirements are minimized. 4-33a Low-Halogen Guideline Task Group Friday, February 22 Mark Frimann, Texas Instruments Inc.; John Sharp, TriQuint Semiconductor Inc. This task group will discuss comments received during the ballot of IPC-4903, Guideline for Defining ‘Low-Halogen’ Electronic Products, and hear comments from interested stakeholders.

4-34b Marking, Symbols and Labels for

Identification of Assemblies, Components and Devices Task Group Wednesday, February 20 Stephen Tisdale, Intel Corporation; Lee Wilmot, TTM Technologies, Inc. With the transition to a variety of lead-free solders and the use of tim-lead solders in certain end-use applications, labeling of printed board properties is increasingly important in PCB manufacturing and assembly, OEM manufacturing, rework and repair of printed circuit board assemblies and end-of-life disposition (recycling or disposal). This combined working group of IPC and JEDEC will discuss further enhancements to IPC/JEDEC J-STD609A, Marking and Labeling of Components, PCBs and PCBAs to Identify Lead (Pb), Pb-Free and Other Attributes.

Fabrication Processes

4-14 Plating Processes Subcommittee Wednesday, February 20 George Milad, Uyemura International Corp.; Gerard O’Brien, Solderability Testing & Solutions, Inc. This subcommittee develops guidelines, test methods and techniques for evaluating process control parameters on electrolytic and electroless/immersion plating. The subcommittee is working on revision A of IPC-4552. It will be completing the Ballot and release of IPC-4556, Specification for Electroless Nickel/Electroless Palladium/ Immersion Gold (ENEPIG) Plating for Printed Circuit Boards prior to IPC APEX EXPO 2013.

Flexible and Rigid-Flex Printed Boards

D-11 Flexible Circuits Design Subcommittee Wednesday, February 20 William Ortloff Sr., Raytheon Company This subcommittee is working on revision D of the IPC2223 flexible printed board design standard. D-12 Flexible Circuits Specifications

“The IPC committee meetings provided crucial face-to-face consideration of all the important issues affecting the industry today. The exchange of ideas was invaluable.” Bill Haas Sr. Manager Seagate Technology LLC

Subcommittee Wednesday, February 20 Nick Koop, CID, Minco Products, Inc. This subcommittee is completing revision C of the IPC6013 performance specification, focusing on updates to HDI/microvia and plating requirements.

For current schedule, times, and full descriptions, visit www.IPCAPEXEXPO.org/standards. Days are subject to change.

D-13 Flexible Circuits Base Materials

Subcommittee Wednesday, February 20 Clark Webster, ALL Flex LLC The subcommittee expects that revision A of IPC-4203, will be completed and released prior to IPC APEX EXPO 2013. Upon completion, the subcommittee will immediately turn its efforts to amending or revising IPC-4202A with details that have arisen since its release in April 2010.

D-15 Flexible Circuits Test Methods Subcommittee Wednesday, February 20 Rocky Hilburn, Insulectro; Duane Mahnke, DBMahnke Consulting This subcommittee provides test methods required by other subcommittees within the D-10 Flexible Circuits Committee. IPC-TM-650, Test Methods Manual, which is defined in all flexible circuits committee documents, will be examined in detail for applicability and need for replacement or revision. Also, any test methods specified in new flexible circuitry documents will be generated.

High Speed/High Frequency Interconnections

D-20 High Speed/High Frequency Committee Tuesday, February 19 Edward Sandor, Taconic Advanced Dielectric Division This is a general committee meeting addressing goals of the various high speed/high frequency subcommittees and task groups. D-22 High Speed/High Frequency Board

Performance Subcommittee Wednesday, February 20 This subcommittee is evaluating HDI/microvia performance criteria for a future revision C of IPC-6018, Qualification and Performance Specification for High Frequency (Microwave) Printed Boards. Subcommittee Wednesday, February 20 Edward Sandor, Taconic Advanced Dielectric Division This subcommittee is discussing goals for a future B revision of IPC-4103.

CCC Committee Chairman Council (By Invitation) Sunday, February 17 David Torp, IPC This meeting of all task group, subcommittee and committee chairs is for general committee updates and discussion of IPC technical programs. E-20 Intellectual Property Standard Committee

Wednesday, February 20 Rajesh Kumar, Viasystems North America, Inc.; Michael Moisan, TTM Technologies This committee is responsible for IPC-1071, Best Industry Practices for Intellectual Property Protection in Printed Board Manufacturing.

E-21 EMS Intellectual Property Subcommittee

Wednesday, February 20 Ben Lee, Cisco Systems Inc. This subcommittee is developing a guideline on best practices for intellectual property protection in electronics assembly.

TAEC Technical Activities Executive Committee

(By Invitation) Monday, February 18 Douglas Pauls, Rockwell Collins This committee comprises leaders of all IPC general committees and oversees IPC’s standardization efforts.

D-24a TDR Test Methods Task Group Tuesday, February 19 Don DeGroot, CCNi This task group is discussing a revision to IPC-TM-650, Method 2.5.5.7 for impedance testing of lines on printed boards.

V9-10a EMS Management Council Steering

Frequency-Domain Methods Tuesday, February 19 This task group monitors the needs of the microelectronics industry for high frequency dielectric test methods.

www.IPCAPEXEXPO.org

8-41 Technology Roadmap Subcommittee Sunday, February 17 John Fisher, Interconnect Technology Analysis, Inc. This subcommittee will confirm or amend the strategy used for the 2013 IPC International Technology Roadmap scheduled to be released prior to this meeting. Emulator vs. market model to be re-examined for the 2015 release, as are “lessons learned” in first pass effort at “distributed processing” model for Roadmap creation.

E-30 Conflict Minerals Due Diligence Committee Wednesday, February 20 John Ciba Jr., Brady Corporation; Joel Sherman, KEMET Electronics Corp. This committee will discuss the IPC-1081 Conflict Minerals Due Diligence Guidance document, which will assist the electronics industry in complying with due diligence requirements for conflict minerals under Section 1502 of the Dodd-Frank Act.

D-23 High Speed/High Frequency Base Materials

D-24c High Frequency Test Methods Task Group:

Management

Committee (By Invitation) Wednesday, February 20 Mark Wolfe, Phoenix International Corp. This committee helps manufacturers of electronics assemblies be more productive and profitable. It provides leadership in identifying and developing financial, managerial and technical programs to meet the needs of EMS companies and their customers.

INFORMATION that INSPIRES INNOVATION

STANDARDS DEVELOPMENT MEETINGS

V9-20 IPC PCB Management Council Steering Committee (By Invitation)

Wednesday, February 20 Peter Bigelow, IMI Inc. This committee identifies and disseminates information about trends and issues, and provides opportunities for presidents and senior-level managers of printed board manufacturers to exchange ideas.

V9-34 SMEMA Statistical Subcommittee

(By Invitation) Wednesday, February 20 Karen Moore-Watts, DEK UK This subcommittee will discuss IPC’s assembly equipment statistical program.

V9-40b Process Consumables Statistical

Subcommittee (By Invitation) Wednesday, February 20 Mike Carano, OMG Electronic Chemicals This subcommittee will discuss IPC’s process consumables statistical program.

V9-40d IPC PCB New Technology Subcommittee (By Invitation)

Wednesday, February 20 Kenneth Parent, Insulectro Dedicated to educating the electronics industry supply chain on the latest technological developments, this subcommittee is responsible for the Embedded Devices Users Group which is currently developing a benefits model on embedded passives.

V-EMTSC Executive Market & Technology Steering

Committee (By Invitation) Tuesday, February 19 Don Schroeder, Paradigm Shift Development This steering committee will meet over dinner to discuss IPC’s market research programs and Executive Summit.

Packaged Electronic Components

B-10a/ Joint Meeting — Plastic Chip JEDEC

arrier Cracking Task Group and C JEDEC JC-14.1 Tuesday, February 19 Steven Martell, Sonoscan Inc. During this joint meeting, IPC B-10a and JEDEC JC-14.1 groups will continue revising J-STD-020D, IPC/JEDEC Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices, and J-STD-075, Classification of Non-IC Electronic Components for Assembly Processes.

B-10b Exploratory Strategy Meeting on 3-D

Packaging Wednesday, February 20 Phil Marcoux, PPM Associates; Ray Prasad, Ray Prasad Consultancy Group This is an exploratory meeting to discuss issues related to implementing 3-D IC packages and how designers can work with semiconductor foundries in order to develop their own application-specific integrated circuits and multichip modules.

Printed Board Design Technology 1-10b Current Carrying Capacity

Task Group Monday, February 18 Michael Jouppi, Thermal Management Inc. This task group is meeting to discuss additions to the IPC-2152 standard which will address high current pulses, copper plane structures, and new printed board materials.

1-10c Test Coupon and Artwork Generation Task

Group Monday, February 18 Timothy Estes, Conductor Analysis Technologies, Inc. This task group maintains test coupon designs referenced in IPC-2221 and IPC-6010 specifications. The task group is evaluating the need for new coupon designs, including CAF and modifications to the A/B-R design.

D-31b IPC-2221/2222 Task Group Tuesday, February 19 Gary Ferrari, CID+, CIT, FTG Circuits This task group is meeting to prepare the balloting of IPC2221B, Generic Standard on Printed Board Design.

Printed Electronics

8-61 Printed Electronics Technology Roadmap

Subcommittee Sunday, February 17 Daniel Gamota, Jabil Circuit, Inc. (HQ) This subcommittee will discuss the strategy for developing a printed electronics technology roadmap.

D-61 Printed Electronics Design Subcommittee Thursday, February 21 Daniel Gamota, Jabil Circuit, Inc. (HQ); Jie Zhang, Ph.D., Institute of Materials Research & Engineering (IMRE) The subcommittee will focus on finalizing IPC/JPCA-2291, Design Guidelines for Printed Electronics. D-63 Printed Electronics Functional Materials

Subcommittee Thursday, February 21 Josh Goldberg, Taiyo America Inc.; Markus Riester, maris TechCon The subcommittee will review lessons learned on release of IPC-4591, Requirements for Printed Electronics Functional Materials and begin collecting data for expansion and eventual revision A.

For current schedule, times, and full descriptions, visit www.IPCAPEXEXPO.org/standards. Days are subject to change.

D-64 Printed Electronics Final Assembly

Subcommittee Thursday, February 21 Daniel Gamota, Jabil Circuit, Inc. (HQ) The subcommittee will focus on developing a draft of IPC-6901, Performance Requirements for Printed Electronics Assemblies.

Process Control

7-23 Assembly Process Effects Handbook

Subcommittee Tuesday, February 19 Greg Hurst, BAE Systems; Sharon Ventress, U.S. Army Aviation & Missile Command This committee will concentrate on completion of a companion document to the modification and repair document, IPC-7711/7721. The new process effects or troubleshooting guide will have a similar focus for process effects related to the assembly (IPC-9111). The handbook provides assembly anomaly illustrations with possible cause and solution explanations.

7-24 Printed Board Process Effects Handbook

Subcommittee Tuesday, February 19 Dennis Fritz, MacDermid, Inc. This subcommittee will concentrate on completion of a companion document to the modification and repair document, IPC-7711/7721. The new process effects or troubleshooting guide will have a similar focus for process effects related to the printed board (new document IPC-9121). Based on user input, the new format for the handbook will provide printed board anomaly illustrations with possible cause and solution explanations and will be more closely tied to IPC-A-600 acceptability criteria.

Product Assurance

5-22a/ Synergy Meeting â&#x20AC;&#x201D; J-STD-001 & 7-31b IPC-A-610 Task Groups

Monday, February 18 Jennifer Day, CIT, U.S. Army Aviation & Missile Command; Constantino Gonzalez, MIT, ACME Training & Consulting; Teresa Rowe, CIT, AAI Corporation The J-STD-001 and IPC-A-610 task groups will work together to resolve comments common to both standards.

7-30 Product Assurance Committee Monday, February 18 Mel Parrish, STI Electronics, Inc. This is a planning meeting for all task group and subcommittee leaders of the Product Assurance Committee.

7-31fs Space Electronic Assemblies IPC/

WHMA-A-620 Addendum Task Group Tuesday, February 19 Garry McGuire, CIT, NASA Marshall Space Flight Center This task group is developing a space hardware addendum for revision B of IPC/WHMA-A-620, Requirements and Acceptance for Cable and Wire Harness Assemblies.

7-31h/ Joint Meeting â&#x20AC;&#x201D; IPC-D-620 Wire 7-31k Harness Design and IPC-HDBK-620

Handbook Task Groups Wednesday, February 20 Robert Cooke, CIT, NASA Johnson Space Center; Brett Miller, USA Harness, Inc. These two task groups are working together to develop wire harness design guidelines as well as a wire harness handbook.

7-31j IPC-A-630 Requirements for Structural

Enclosure Task Group Thursday, February 21 Eddie Hofer, Rockwell Collins; Richard Rumas, CIT, Honeywell Canada This task group is developing a handbook and the acceptance standard for box-level assembly of electronic enclosures for use in military and aerospace applications. Emphasis will be placed on materials selection, mechanical assembly, fasteners, gasketing and sealing, as well as related testing associated with high level assemblies and electronic enclosures.

7-32c Electrical Continuity Testing Task Group Monday, February 18 Mike Hill, Viasystems Group, Inc. This task group will discuss goals for a B revision to IPC9252, Requirements for Electrical Testing of Unpopulated Printed Boards.

Product Reliability

6-10c Plated-Through Via Reliability-Accelerated

7-31b IPC-A-610 Task Group Saturday, February 16 Jennifer Day, CIT, U.S. Army Aviation & Missile Command; Constantino Gonzalez, MIT, ACME Training & Consulting This task group is developing revision F of IPC-A-610, Acceptability of Electronic Assemblies.

www.IPCAPEXEXPO.org

7-31f Wire Harness Acceptability Task Group Tuesday, February 19 Theodore Laser, MIT, L-3 Communications; Brett Miller, USA Harness, Inc. This task group is a joint effort with the Wire Harness Manufacturers Association. The group will be celebrating publication of revision B of IPC/WHMA-A-620, Requirements & Acceptance for Cable & Wire Harness Assemblies.

Test Methods Task Group Tuesday, February 19 Randy Reed, Viasystems Group, Inc. This task group is revising IPC-TM-650, Method 2.6.26, for DC Current Induced Thermal Cycling, addressing IST and CITC test procedures.

INFORMATION that INSPIRES INNOVATION

STANDARDS DEVELOPMENT MEETINGS

6-10d SMT Attachment Reliability Test Methods

Task Group Tuesday, February 19 Reza Ghaffarian, Ph.D., Jet Propulsion Laboratory This task group is addressing acoustic emission for detecting pad cratering in PCB bend test within the IPC9700 reliability series.

6-11 Printed Board Coplanarity Subcommittee

Wednesday, February 20 John Davignon, Intel Corporation This new subcommittee will develop a high-temperature printed board warpage measurement methodology focused primarily on component (land) areas. The goal is to align high-temperature printed board flatness to existing JEDEC SPP-024A (reflow flatness requirements for BGA packages) and JEDEC JESD22-B112 (high-temperature package warpage measurement methodology) which will enable a fully integrated guideline for SMT optimization.

Rigid Printed Boards

7-31a/ Joint Meeting - IPC-A-600 D-33a and Rigid Printed Board Performance

Specifications Task Groups Sunday, February 17 Mark Buechner, BAE Systems These task groups are addressing initial working drafts of IPC-A-600J and IPC-6012D. The focus of the meeting is the addition of criteria for HDI/microvia technology and an amendment to IPC-6012C that addresses lot frequency testing with new IPC test coupons.

D-35 Printed Board Storage and Handling

Subcommittee Monday, February 18 C. Don Dupriest, Lockheed Martin Missiles & Fire Control This subcommittee is reviewing content for a future A revision to IPC-1601, Printed Board Handling and Storage Guidelines.

D-36 Printed Board Process Capability, Quality

and Relative Reliability Benchmark Test Subcommittee Monday, February 18 Gary Long, Intel Corporation This subcommittee has developed a database for benchmarking printed board fabrication capability, quality and relative reliability. It maintains a family of process capability panel designs and standards for use by both subscribers and suppliers. This subcommittee meeting is open to all interested parties.

Terms and Definitions

2-30 Terms and Definitions Committee Sunday, February 17 Michael Green, Lockheed Martin Space Systems Company This committee is working on revision K of the IPC-T-50 terms and definitions standard.

Testing

7-11 Test Methods Subcommittee Tuesday, February 19 Joseph Russeau, Precision Analytical Laboratory, Inc. This subcommittee meets to review, validate and approve new or revised IPC-TM-650 Test Methods. 7-12 Microsection Subcommittee Wednesday, February 20 Russell Shepherd, MIT, Microtek Laboratories This task group is revising IPC-TM-650 Methods 2.1.1 and 2.1.1.2 for microsection preparation and evaluation, addressing blind and buried via structures.

UL-IAG Industry Advisory Group (IAG)

for UL Thursday, February 21 Ovidiu Munteanu, Underwriters Laboratories This is an open meeting run by UL for the purpose of resolving questions about nontechnical developments related to Underwriters Laboratories documents as well as their enforcement within the global electronic interconnection industry as they pertain to UL-746E, UL796, UL-746F and UL-796F.

UL-STP UL STP Committee (By invitation only) Friday, February 22 Bradley Schmidt, Underwriters Laboratories Inc. This meeting of the Standards Technical Panel (STP), the official voting body for four UL Standards: UL 746E, UL 796, UL 746F and UL 796F, will provide STP members with additional information on proposed technical changes to one or more of the four standards.

Xtras

8-51 Jisso North America Council (JNAC) Sunday, February 17 Dennis Fritz, MacDermid, Inc. JNAC provides input to the global Jisso International Council (JIC). The JIC focuses on the “Total Packaging Solution.” This meeting will focus on the completion of projects identified during JIC 13 held in May 2012. Some of this activity will also include potential participation in a new council being considered for standardization on 3-D packaging.

“It was great to meet people from the industry and update each other on the standards and technologies used in different commodities but also continents! Great networking!” Christopher Hermann Account Quality Manager AT&S (China) Co., Ltd.

For current schedule, times, and full descriptions, visit www.IPCAPEXEXPO.org/standards. Days are subject to change.

HOTEL/TRAVEL

2013 Hotels Book Your Hotel Room Today! Last year’s hotels sold out early. Reserve your room today to ensure you get exceptional service and special IPC rates at the hotel of your choice. (PLUS … Book Now, Pay Later.) Make your reservation through the official housing service, Experient, to take advantage of the special IPC rates. These rates will be available until January 28, 2013, or until all rooms are booked. With their convenient location and the special IPC rates, these hotels will book quickly — so make your reservation today! Online: www.IPCAPEXEXPO.org/hotels By Phone: 800-974-9833 or +1 847-996-5875 (8:00 am–5:00 pm Central time)

BENEFITS OF BOOKING IN THE IPC BLOCK Lowest Rates

Official hotels of IPC APEX EXPO.

Book Now, Pay Later

1 San Diego Marriott Marquis & Marina

Outstanding Customer Service

333 West Harbor Drive CityView - $249 BayView - $269

Dedicated Housing Specialists

2 Hilton San Diego Gaslamp Quarter

401 K Street $199

3 The Hard Rock Hotel San Diego

* 8 M anchester Grand Hyatt San Diego 1 Market Place $195

4 Omni San Diego

* 9 Hotel Solamar — A Kimpton Property 435 6th Avenue $172

5 San Diego Marriott Gaslamp Quarter

ilton San Diego Bayfront * 10 H 1 Park Blvd. $195

6 R esidence Inn San Diego Downtown/Gaslamp

* 11 Andaz San Diego 600 F Street $185

207 5th Avenue $219 675 L Street $175

660 K Street $209

Quarter 356 6th Avenue $169

Ability to Waitlist

7 Embassy Suites San Diego Bay - Downtown

12 Courtyard San Diego Downtown 530 Broadway Street $180

601 Pacific Highway $169

* Limited government-rate rooms are available; contact ipc@experient-inc.com. Most hotels are within walking distance to the convention center. For an additional economy option, The Horton Grand is offering a rate of $155. Reservations accepted through Experient. Visit www.IPCAPEXEXPO.org/hotels for reservation details and information on changes/cancellations.

INFORMATION that INSPIRES INNOVATION

HOTEL/TRAVEL

Travel American Airlines

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Save five percent off the lowest applicable fares on any American Airlines/oneworld carrier when you use 9923BW. Rates are available February 13–28, 2013.

Get the lowest available rate guaranteed, when you use CM009S. Rates are available February 13–28, 2013. Online: www.Dollar.com

Online: www.aa.com

By Phone: 800-800-4000 (U.S./Canada)

By Phone: 800-433-1790 (U.S./Canada) (5:00 am–12:00 am Central time)

Additional information on carpooling, parking and taxis & shuttles is available at www.IPCAPEXEXPO.org/travel.

THIS EVENT IS PRODUCED … With support from: • ASSEMBLY • Circuit Cellar • Circuitnet • Circuits Assembly • Control Design • EDACafé.com • Electronics Assembly/Electronics Sourcing North America • Electronics Protection • Elektor US • EMChina.org.cn • EMSNow • FLEX007 • Global PCB Marketplace • Global SMT & Packaging • MedicalDeviceNow.com

• Medical Product Outsourcing • Metal Finishing • MoreRFID • The PCB Magazine • PCB007 • PCBDesign007 • + Plastic Electronics • Printed Circuit Design & Fab • Printed Circuit Journal • Printed Circuit World • SMT magazine • SMTnet.com • Surface Mount World • U.S. Tech • Wiring Harness News

Policies Any function that is not part of the “official program” is prohibited, from the first meeting to the close of the event. IPC does not permit solicitation by nonexhibiting companies. Any individual who is observed participating in activities to solicit or sell products to event attendees or exhibitors without having a booth at the event will be asked to leave immediately.

www.IPCAPEXEXPO.org

REGISTRATION OPTIONS

Visit www.IPCAPEXEXPO.org/register to sign up today!

Register by January 25 and save 20%! Group Discount: Register four colleagues from the same company, same company location, at the same time, for items marked with a and deduct another $100 from each registration. INDUSTRY MEMBER FREE Exhibit Hall Only — includes admission to the exhibit hall and event essentials ($25 on-site) Maximum Value Package $1,495 $1,145 includes all technical conference sessions • technical conference proceedings (provided online) • standards development committee meetings • your choice of up to six half-days of professional development • IPC luncheons (Mon., Tue., and Wed.) • Show floor concession cash on Thursday • Designers Forum • PCB Supply Chain Leadership Meeting or EMS Management Council Meeting (must qualify) • event essentials Technical Conference Full Conference includes all technical conference paper sessions • conference proceedings (provided online) • standards development committee meetings • event essentials (luncheons not included)

$685 $565

One-Day Conference includes all technical conference paper sessions on the day of your choice (Tue., Wed., or Thur.) • standards development committee meetings • event essentials (luncheons and conference proceedings not included)

$355

Executive Management Programs PCB Supply Chain Leadership Meeting (must qualify) includes Monday meeting • Monday luncheon • VIP Networking Dinner • event essentials

$565 $450

EMS Management Council Meeting (must qualify) includes Monday meeting • Monday luncheon • VIP Networking Dinner • event essentials VIP Networking Dinner for guest

$295

$565

$450 $125 ea

Professional Development Courses Half-Day Course includes three hours of classroom instruction with supporting materials. $375 ea Select up to six courses

$300 ea

Standards Development Committee Meetings Committee Meetings Plus Conference $775 includes all technical conference paper sessions • conference proceedings (provided online) • standards development committee meetings • IPC luncheons (Mon., Tue. and Wed.) • Show floor concession cash on Thursday • event essentials

$650

Committee Networking Meetings $185 $165 ($195 on-site) includes standards development committee meetings • IPC luncheons (Mon., Tue. and Wed.) • Show floor concession cash on Thursday • event essentials Committee Meetings includes standards development committee meetings • event essentials (luncheons not included)

FREE ($40 on-site)

Designers Forum includes Monday meeting • continental breakfast • lunch • event essentials

$400 $325

Additional Items Technical Conference Proceedings (provided online)

$175

Luncheons (each) — Select Monday, Tuesday and/or Wednesday

$150 $45 ea

Need assistance? Call 877-472-4724 (toll free in U.S. and Canada) or +1 847-597-2860 or e-mail registration@ipc.org

Event Essentials • Exhibit Hall • Tuesday Show Floor Reception • Keynote Sessions • BUZZ Sessions

• Poster Sessions • First-Timers’ Welcome • Women in Electronics Networking Meeting

• IPC TechTalk • New Products Corridor • IPC Hand Soldering Competitions

• Printed Board Assembly Cleaning & Contamination Testing Center

Visit www.ipcapexexpo.org/register! Registration for IPC Designer Certification and EMS Program Management Certification is separate. To register, visit www.IPCAPEXEXPO.org/certification.

3000 Lakeside Drive, Suite 309 S Bannockburn, IL 60015-1249 USA

San Diego Convention Center

February 19–21, 2013

CONFERENCE & EXHIBITION

INFORMATION that INSPIRES INNOVATION

www.ipcapexexpo.org

Sean Keating Engineering Team Leader Amphenol Ltd (UK)

There really is nowhere else in the industry or around the globe where you can find such an amazing mix of technologies complemented with the awesome camaraderie of like-minded engineers.