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Calcium fluoride has a large coefficient of thermal expansion, which would make overlay difficult. Some people are advocating fluorinated silica, which might have adequate transmission at 157 nm. No one seems to know of a good pellicle material.
published value divided by the Mask Error Enhancement Factor (MEEF). The MEEF is increasing, and the tightening of specifications is accelerating dramatically. That challenge alone could keep the mask industry busy for the next few years.
Meanwhile, we have some near-term problems. At International SEMATECH’s Optical Extensions Workshop in January, it became clear that several semiconductor manufacturers are preparing to move phase shift technology into manufacturing. Some of them have told me that they’ve purchased fewer than ten phase shift masks. That means they’re now basing their plan of record on masks which were made in R&D mode. For perspective, consider that some of the participants at the NGL workshop said that proponents of any post-optical technique would have to build at least 300 masks to demonstrate feasibility.
The mask community doesn’t have enough resources to deal with all these issues. NIST, DARPA, and SEMATECH have wisely made significant investments in advanced mask technology, but there isn’t enough money available to develop a complete infrastructure for PSM, 157 nm optical masks, and four types of NGL masks within five years. Even if cash were not an issue, I don’t think the industry has enough facilities and experienced people to meet all these challenges in a timely manner.
I’m afraid the IC manufacturers will soon say to the makers of masks and mask equipment, “We’re moving PSM into the production mainstream. Within six months, we want you to be able to deliver reasonable quantities of high-quality phase shift masks at low costs with short delivery times.” Mask makers will have to launch a major development effort to create a reliable manufacturing process which can assure fast delivery of alternate aperture phase shift masks. They’ll have to learn to coat resist with low defect levels and to etch quartz in a controlled manner. They’ll need production-worthy tools for inspection, repair, and metrology. I’m not sure they can acquire all the required capabilities as quickly as the chip makers would like. Even “simple” binary masks are confronting us with technical challenges. Mask requirements for CD control and defect sensitivity are tightening up even faster than wafer linewidths are shrinking because of the nonlinear pattern transfer that occurs at low k1 lithography. The authors of the SIA roadmap may recast the specifications for CD’s and defects as the previously
Within the mask community, we have no meaningful mechanism for limiting the scope of our R&D activity, partly because the selection of mask types hinges on broader issues such as the selection of a new lithography infrastructure. I think we have to help our customers understand that it would take ten years and a billion dollars to solve all these problems. We have to look for ways to focus and avoid working on dead ends, such as 230 mm masks and mask types that will never reach the marketplace. Together with the IC lithography community, we must realistically face the cost and time of mask equipment and process development, not just the ultimate cost of ownership of advanced masks. We need to implement an industry-wide strategic planning process, establish a comprehensive advanced mask plan of record, and drive the creation of a compatible industry-wide funding model with firm, long term, financial commitments. I think we need to draw a cut line and say, “We’ll fund everything above this line to a successful conclusion, and we won’t work on this other stuff.” What shall we work on now? ❈ The content for this perspective was first published in the April, 1999 edition of BACUS News, to readership primarily comprised of mask manufacturers and micro-lithographers.
KLA-Tencor Trade Show Calendar December 1-3, 1999 February 2-3, 2000
SEMICON/Japan, Makuhari, Japan Display Works, San Jose, California
February 10-11, 2000
CMP-MIC, Santa Clara, California
February 15-17, 2000
SEMICON/Korea, Seoul, Korea Autumn 1999
Yield Management Solutions
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