SN54/74LS107A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS107A is a Dual JK Flip-Flop with individual J, K, Direct Clear and Clock Pulse inputs. Output changes are initiated by the HIGH-to-LOW transition of the clock. A LOW signal on CD input overrides the other inputs and makes the Q output LOW. The SN54 / 74LS107A is the same as the SN54 / 74LS73A but has corner power pins.
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY
CONNECTION DIAGRAM DIP (TOP VIEW) VCC
CD1
CP1
K2
CD2
CP2
J2
14
13
12
11
10
9
8
J SUFFIX CERAMIC CASE 632-08 14 1 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.
1
2
3
4
5
6
7
J1
Q1
Q1
K1
Q2
Q2
GND
N SUFFIX PLASTIC CASE 646-06
14 1
LOGIC SYMBOL 1 1
J
14
2 Q
3
8
J
9
CP
11
K
1
Q
D SUFFIX SOIC CASE 751A-02
5
ORDERING INFORMATION 12
CP
4
K
CD
Q
2
CD
Q
SN54LSXXXJ SN74LSXXXN SN74LSXXXD
6
Ceramic Plastic SOIC
10
13 VCC = PIN 14 GND = PIN 7
GUARANTEED OPERATING RANGES Symbol
Parameter
Min
Typ
Max
Unit
VCC
Supply Voltage
54 74
4.5 4.75
5.0 5.0
5.5 5.25
V
TA
Operating Ambient Temperature Range
54 74
– 55 0
25 25
125 70
°C
IOH
Output Current — High
54, 74
– 0.4
mA
IOL
Output Current — Low
54 74
4.0 8.0
mA
FAST AND LS TTL DATA 5-1
SN54/74LS107A DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits S b l Symbol VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VIK
Input Clamp Diode Voltage
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
IIH
Min
P Parameter
Typ
Max
2.0 54
0.7
74
0.8 – 0.65
– 1.5
U i Unit
T Test C Conditions di i
V
Guaranteed Input HIGH Voltage for All Inputs
V
Guaranteed Input p LOW Voltage g for All Inputs
V
VCC = MIN, IIN = – 18 mA
54
2.5
3.5
V
74
2.7
3.5
V
VCC = MIN,, IOH = MAX,, VIN = VIH or VIL per Truth Table VCC = VCC MIN, VIN = VIL or VIH per Truth Table
54, 74
0.25
0.4
V
IOL = 4.0 mA
74
0.35
0.5
V
IOL = 8.0 mA
J, K Clear Clock
20 60 80
µA
VCC = MAX, VIN = 2.7 V
J, K Clear Clock
0.1 0.3 0.4
mA
VCC = MAX, VIN = 7.0 V
– 0.4 – 0.8
mA
VCC = MAX, VIN = 0.4 V
–100
mA
VCC = MAX
6.0
mA
VCC = MAX
Max
U i Unit
Input HIGH Current
IIL
Input LOW Current
IOS
Short Circuit Current (Note 1)
ICC
Power Supply Current
J, K Clear and Clock – 20
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V) Limits S b l Symbol fMAX tPLH tPHL
P Parameter Maximum Clock Frequency
Min
Typ
30
45
Propagation p g Delay, y, Clock to Output
T Test C Conditions di i
MHz
15
20
ns
15
20
ns
Max
U i Unit
VCC = 5.0 50V CL = 15 pF
AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V) Limits S b l Symbol
P Parameter
Min
Typ
tW
Clock Pulse Width
20
ns
tW
Clear Pulse Width
25
ns
ts
Setup Time
20
ns
th
Hold Time
0
ns
FAST AND LS TTL DATA 5-2
T Test C Conditions di i
VCC = 5 5.0 0V