SN54/74LS153
DUAL 4-INPUT MULTIPLEXER The LSTTL / MSI SN54 / 74LS153 is a very high speed Dual 4-Input Multiplexer with common select inputs and individual enable inputs for each section. It can select two bits of data from four sources. The two buffered outputs present data in the true (non-inverted) form. In addition to multiplexer operation, the LS153 can generate any two functions of three variables. The LS153 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families.
• • • •
DUAL 4-INPUT MULTIPLEXER
Multifunction Capability Non-Inverting Outputs Separate Enable for Each Multiplexer Input Clamp Diodes Limit High Speed Termination Effects
LOW POWER SCHOTTKY
CONNECTION DIAGRAM DIP (TOP VIEW) VCC
Eb
S0
I3b
I2b
I1b
I0b
Zb
16
15
14
13
12
11
10
9
J SUFFIX CERAMIC CASE 620-09 16
NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.
1 Ea
2 S1
3 I3a
4 I2a
5 I1a
6 I0a
1
8 GND
7 Za
N SUFFIX PLASTIC CASE 648-08
16 1
PIN NAMES S0 E I0, I1 Z
LOADING (Note a) Common Select Input Enable (Active LOW) Input Multiplexer Inputs Multiplexer Output (Note b)
HIGH
LOW
0.5 U.L. 0.5 U.L. 0.5 U.L. 10 U.L.
0.25 U.L. 0.25 U.L. 0.25 U.L. 5 (2.5) U.L.
1
NOTES: a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW. b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges.
ORDERING INFORMATION SN54LSXXXJ SN74LSXXXN SN74LSXXXD
LOGIC DIAGRAM Ea I0a 1
6
I1a 5
I2a 4
I3a 3
S1 2
S0 14
I0b 10
I1b
I2b
11
12
D SUFFIX SOIC CASE 751B-03
16
Ceramic Plastic SOIC
I3b Eb 13
15
LOGIC SYMBOL
1
14 2
7
Za
VCC = PIN 16 GND = PIN 8 = PIN NUMBERS
6 5 4 3
Ea I0a I1a I2a I3a S0 Sa
10 11 12 13 15 I0b I1b I2b I3b Eb
Za
Zb
7
9
VCC = PIN 16 GND = PIN 8 9
Zb
FAST AND LS TTL DATA 5-1