Prominent Publication 1. “FPGA based Digital System Design-Issues and Challenges” Naresh Grover, M.K. Soni MR International Journal of Engineering & Technology Vol. 2 June 2010 1-12. 2. “Reduction of Power Consumption in FPGAs - An Overview” Naresh Grover, M.K. Soni I.J. Information Engineering and Electronic Business, MECS, 2012, 5, 50-69. 3. “Design of FPGA based 32-bit Floating Point Arithmetic Unit and verification of its VHDL code using MATLAB” Naresh Grover, M.K. Soni I.J. Information Engineering and Electronic Business, MECS, 2014, 1, 1-14. 4. “Simulation and Optimization of VHDL code for FPGA-Based Design using Simulink” Naresh Grover, M.K. Soni I.J. Information Engineering and Electronic Business, MECS, 2014, 3, 22-27. 5. “A New Optimization Approach Using Smoothed Images Based on ACO for Medical Image Registration” Sunanda Gupta, Naresh Grover, Zaheeruddin I.J. Information Engineering and Electronic Business, MECS, 2016, 2, 30-36. 6. “A Robust Approach for R-Peak Detection” Amana Yadav, Naresh Grover I.J. Information Engineering and Electronic Business, MECS, 2017, 6, 43-50. 7. ‘A Novel Approach for Intensity Based Non- rigid Image Registration Using Powell's Algorithm’. Sunanda Gupta, Naresh Grover, Zaheerudin. Int. J. Biomedical Engineering and Technology, United Kingdom Vol. 24, No. 2, pp.103–120, 2017. Scopus indexed. 8. “Novel Design of 32-bit Asynchronous (RISC) Microprocessor & its Implementation on FPGA” Archana Rani, Naresh Grover I.J. Information Engineering and Electronic Business, MECS, 2018, 1, 39-47 9. “A REVIEW OF AHB PROTOCOLS WITH MEMORY CONTROLLER” Hitanshu Saluja, Naresh Grover International Journal of Pure and Applied Mathematics, Volume 114 No. 10 2017, 349-361 10. “An Area Efficient AHB Master Designing using VHDL” Hitanshu Saluja, Naresh Grover Proceedings of the 12th INDIACom; INDIACom-2018; IEEE Conference ID: 42835 2018 5th International Conference on “Computing for Sustainable Global Development”, 14th 16th March, 2018 at Bharati Vidyapeeth's Institute of Computer Applications and Management (BVICAM), New Delhi (INDIA) 11. “A Study and Comparative Analysis of Power Exhausting Attack” Jaya Kaushik, Naresh Grover, International Research Journal of Computer Science (IRJCS), 2017 Vol.04/Issue11/SPCS10084, Pg. 31-36 12. “An enhanced FPGA Based design of microprocessor and its implementation using VIVADO and ISIM” Archana Rani, Naresh Grover Bulletin of Electrical Engineering and Informatics-IAES, 2018, Vol.7, No.2, Pg. 199-208. 13. “Design and Implementation of control Unit-ALU of 32 Bit Asynchronous Microprocessor based on FPGA” Archana Rani, Naresh Grover International Journal of Engineering and Management (IJEM), 2018, ISSN:2305-3631 (Print), PP.12-22. 14. “Synthesis & Optimization of Asynchronous Processor using Xilinx ISE & Vivado” Archana Rani, Naresh Grover, IJCESR, 2017, Vol.-IV, Issues-XI (UGC approved)
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