Wideband Continuous-time Σ∆ ADCs, Automotive Electronics, and Power Management: Advances in Analog Circuit Design 2016 1st Edition Andrea Baschirotto
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Andrea Baschirotto · Pieter Harpe Ko A.A. Makinwa Editors
Wideband Continuous-time
ADCs, Automotive Electronics, and Power Management
Design
AndreaBaschirotto•PieterHarpe KofiA.A.Makinwa
Editors
AndreaBaschirotto DepartmentofPhysics“G.Occhialini”
UniversityofMilan Milano,MI,Italy
KofiA.A.Makinwa
ElectronicInstrumentationLaboratory DelftUniversityofTechnology Delft,Zuid-Holland TheNetherlands
PieterHarpe DepartmentofElectricalEngineering EindhovenUniversityofTechnology Eindhoven,Noord-Brabant TheNetherlands
ISBN978-3-319-41669-4ISBN978-3-319-41670-0(eBook) DOI10.1007/978-3-319-41670-0
LibraryofCongressControlNumber:2016947073
©SpringerInternationalPublishingSwitzerland2017
Thisworkissubjecttocopyright.AllrightsarereservedbythePublisher,whetherthewholeorpartof thematerialisconcerned,specificallytherightsoftranslation,reprinting,reuseofillustrations,recitation, broadcasting,reproductiononmicrofilmsorinanyotherphysicalway,andtransmissionorinformation storageandretrieval,electronicadaptation,computersoftware,orbysimilarordissimilarmethodology nowknownorhereafterdeveloped.
Theuseofgeneraldescriptivenames,registerednames,trademarks,servicemarks,etc.inthispublication doesnotimply,evenintheabsenceofaspecificstatement,thatsuchnamesareexemptfromtherelevant protectivelawsandregulationsandthereforefreeforgeneraluse.
Thepublisher,theauthorsandtheeditorsaresafetoassumethattheadviceandinformationinthisbook arebelievedtobetrueandaccurateatthedateofpublication.Neitherthepublishernortheauthorsor theeditorsgiveawarranty,expressorimplied,withrespecttothematerialcontainedhereinorforany errorsoromissionsthatmayhavebeenmade.
Printedonacid-freepaper
ThisSpringerimprintispublishedbySpringerNature TheregisteredcompanyisSpringerInternationalPublishingAGSwitzerland
Preface
ThisbookispartoftheAnalogCircuitDesignseriesandcontainsthecontributions fromall18speakersofthe25thWorkshoponAdvancesinAnalogCircuitDesign (AACD).Thisyear,thesponsorsoftheworkshopwereInfineon(mainsponsor), JoanneumResearchCenter,INTEL,andIEEESolid-StateCircuitsSocietyAustrian andItalianChapters.TheworkshopwasheldattheInfineonsiteinVillach(Austria), fromApril26to28,2016.Thebookcomprisesthreeparts,coveringtopicsin advancedanalogandmixed-signalcircuitdesignthatweconsidertobeofgreat interesttothecircuitdesigncommunity:
•Continuous-TimeSigma-DeltaModulatorsforTransceivers
•AutomotiveElectronics
•PowerManagement
Eachpartconsistsofsixchapterswrittenbyexpertsinthefield.Theaimof theAACDworkshopistobringtogetheragroupofexpertdesignerstodiscuss newdevelopmentsandfutureoptions.Eachworkshopisthenfollowedbythe publicationofabookbySpringeraspartoftheirsuccessfulseriesonAnalogCircuit Design.Thisbookisthe25thinthisseries(afulllistoftheprevioustopicscanbe foundonthefollowingpage).Theseriescanbeseenasareferenceforallpeople involvedinanalogandmixed-signaldesign.Weareconfidentthatthisbook,like itspredecessors,willprovetobeavaluablecontributiontoouranalogandmixedsignalcircuitdesigncommunity.
Milano,ItalyAndreaBaschirotto Eindhoven,TheNetherlandsPieterHarpe Delft,TheNetherlandsKofiA.A.Makinwa v
TheTopicsCoveredBeforeinThisSeries
2015Neuchatel(Switzerland)EfficientSensorInterfaces AdvancedAmplifiers LowPowerRFSystems
2014Lisbon(Portugal)High-PerformanceADandDAConverters
ICDesigninScaledTechnologies Time-DomainSignalProcessing
2013Grenoble(France)FrequencyReferences PowerManagementforSoC SmartWirelessInterfaces
2012Valkenburg(TheNetherlands)NyquistA/DConverters CapacitiveSensorInterfaces BeyondAnalogCircuitDesign
2011Leuven(Belgium)Low-VoltageLow-PowerDataConverters
Short-RangeWirelessFront-Ends PowerManagementandDC-DC
2010Graz(Austria)RobustDesign SigmaDeltaConverters RFID
2009Lund(Sweden)SmartDataConverters FiltersonChip MultimodeTransmitters
2008Pavia(Italy)High-SpeedClockandDataRecovery High-PerformanceAmplifiers PowerManagement
2007Oostende(Belgium)Sensors,ActuatorsandPowerDrivers fortheAutomotiveandIndustrial Environment IntegratedPAsfromWirelinetoRF VeryHighFrequencyFrontEnds
2006Maastricht(TheNetherlands)High-SpeedADConverters
AutomotiveElectronics:EMCIssues UltraLowPowerWireless
2005Limerick(Ireland)RFCircuitsWideBand,Front-Ends,DACs DesignMethodologyandVerificationof RFandMixed-SignalSystems LowPowerandLowVoltage
2004Montreux(Switzerland)SensorandActuatorInterfaceElectronics
IntegratedHigh-VoltageElectronicsand PowerManagement Low-PowerandHigh-ResolutionADCs
2003Graz(Austria)Fractional-NSynthesizers
DesignforRobustness LineandBusDrivers
2002Spa(Belgium)StructuredMixed-ModeDesign Multi-bitSigma-DeltaConverters Short-RangeRFCircuits
2001Noordwijk(TheNetherlands)ScalableAnalogCircuits High-SpeedD/AConverters RFPowerAmplifiers
2000Munich(Germany)High-SpeedA/DConverters Mixed-SignalDesign PLLsandSynthesizers
1999Nice(France)XDSLandOtherCommunication Systems
RF-MOSTModelsandBehavioural Modelling
IntegratedFiltersandOscillators
1998Copenhagen(Denmark)1-VElectronics Mixed-ModeSystems LNAsandRFPowerAmpsforTelecom
1997Como(Italy)RFA/DConverters
SensorandActuatorInterfaces Low-NoiseOscillators,PLLsand Synthesizers
1996Lausanne(Switzerland)RFCMOSCircuitDesign BandpassSigmaDeltaandOtherData Converters
TranslinearCircuits
1995Villach(Austria)Low-Noise/Power/Voltage Mixed-ModewithCADTools Voltage,CurrentandTimeReferences
1994Eindhoven(TheNetherlands)Low-PowerLow-Voltage IntegratedFilters SmartPower
1993Leuven(Belgium)Mixed-ModeA/DDesign SensorInterfaces CommunicationCircuits
1992Scheveningen(TheNetherlands)OpAmps ADCs AnalogCAD
Contents
PartIContinuous-Time † ModulatorsforTransceivers
1WiFiReceiverEvolutioninaDenseBlockerEnvironment ............3 PatrickTorta,AntonioDiGiandomenico, LukasDörrer,andJoseLuisCeballos
2High-ResolutionWidebandContinuous-Time † Modulators .......23 LucienBreemsandMuhammedBolatkale
3Sigma-DeltaADCswithImprovedInterfererRobustness .............45 RudolfRitter,JiazuoChi,andMauritsOrtmanns
4DesignConsiderationsforFilteringDeltaSigmaConverters .........65 ShanthiPavanandRadhaRajan
5BlockerandClock-JitterPerformanceinCT † ADCs forConsumerRadioReceivers ............................................89 SebastiánLoeda
6Continuous-TimeMASHArchitecturesforWidebandDSMs ........105 HajimeShibata,YunzhiDong,WenhuaYang, andRichardSchreier
PartIIAutomotiveElectronics
7TrendsandCharacteristicsofAutomotiveElectronics
HermanCasier
8NextGenerationofSemiconductorsforAdvancedPower DistributioninAutomotiveApplications .................................141 AndreasKucherandAlfonsGraf
9High-VoltageFast-SwitchingGateDrivers ..............................155 BernhardWicht,JürgenWittmann,AchimSeidel, andAlexisSchindler
10ASelf-CalibratingSARADCforAutomotiveMicrocontrollers ......177 CarmeloBurgio,MauroGiacomini,EnzoMicheleDonze, andDomenicoFabioRestivo
11AdvancedSensorSolutionsforAutomotiveApplications ..............205 PaoloD’Abramo,AlbertoMaccioni,GiuseppePasetti, andFrancescoTinfena
12ALow-PowerContinuous-TimeAccelerometerFront-End ...........215 PieroMalcovati,MarcelloDeMatteis,AlessandroPezzotta, MarcoGrassi,MarcoCroce,MarcoSabatini, andAndreaBaschirotto
PartIIIPowerManagement
13Switched-CapacitorPower-ConverterTopologyOverview andPerformanceComparison ............................................239 RaviKaradi,GerardVillarPiqué,andHenkJanBergveld
14ResonantandMultimodeSwitchedCapacitorConverters forHigh-DensityPowerDelivery .........................................263 JasonT.Stauth,ChristopherSchaef,andKapilKesarwani
15HeterogeneousIntegrationofHigh-SwitchingFrequency InductiveDC/DCConverters ..............................................281 BrunoAllard,FlorianNeveu,andChristianMartin
16ElectricalCompensationofMechanicalStressDrift inPrecisionAnalogCircuits ...............................................297 MarioMotzandUdoAusserlechner
17PowerElectronicsforLEDBasedGeneralIllumination ...............327 StefanDietrichandStefanHeinen
18AnUltra-Low-PowerElectrostaticEnergyHarvesterInterface ......343 StefanoStanzione,ChrisvanLiempd,andChrisvanHoof
WiFiReceiverEvolutioninaDenseBlocker Environment
PatrickTorta,AntonioDiGiandomenico, LukasDörrer,andJoseLuisCeballos
1.1Introduction
Themostdemandingscenariothatareceiverchainmustsustainisadense blockerenvironmentwheremanycontiguousreceivingchannelsareallocatedand simultaneouslyinusebymanyusers.Insuchascenariothesignaltobeconverted inthebandofinterestcanbetransmittedfromafarstationandcanthereforebe veryweakcomparedtothetransmittedsignalofanearuser.TheWiFitransceiver canbeembeddedintoaplatformwhichservesalsootherstandardslikecellular, GNSS,BTorFMradioinaco-runningmode.Astheisolationoftheantennais limitedtoapproximately10–12dB,itisimportanttoensurethatothersignalsdo notdegradethewantedsignalduetoalias,foldingordistortion.Theanalysisof allpossibledisturbercombinationsisadifficulttask,inparticularwhentheA/D clockfrequencyislowanditsmultiplescan generateintermodulationproductsand foldingeffectstogetherwiththereceiverchainmixerclock.Figure 1.1 showsa basebandspectrumscenarioandareceiverchaincomposedbymanyconsecutive filter-and-gainstagesfollowedbyamediumresolutionADC.TheADCisclocked attwiceoftheNyquistrateofthewantedsignalbandwidth.Averyhighchaingain isneededtoprovidesufficientsignaltonoiseanddistortionratio(SNDR)atthe ADCinput:thissetsstringentconstraintstoallthebasebandblocks.Inparticular thechainstronglyamplifiesthenon-idealitiesoftheblocksimmediatelyfollowing themixer.Thefrequencybehavioroftheanalogactivecomponentscanbestrongly affectedbypoorlycontrollableparasiticsandevenbytheconfigurationsettingsfor theblockbandwidthandthegain.Forinstance,theDCoffsetofthemixeraswell astheI-Qskewofthedirectconversionreceiverneedtobecarefullycontrolledand
P.Torta( )•A.DiGiandomenico•L.Dörrer•J.L.Ceballos IntelAustriaGmbH,Villach,Austria e-mail: patrick.torta@intel.com
©SpringerInternationalPublishingSwitzerland2017 A.Baschirottoetal.(eds.), WidebandContinuous-time ˙ ADCs,Automotive Electronics,andPowerManagement,DOI10.1007/978-3-319-41670-0_1
Fig.1.1 AfilterandgainreceiverchainandthespectrumattheADCinput
mappedtoallchainconfigurationstoguaranteehighchainresolution.Alownoise DCoffsetcancellationmayberequired.Thisleadstocomplexgainandcalibration schemes.
WhenanoversampledhighresolutionADCisused,thechaincankeepthe requiredinbandSNDRand,atthesametime,absorbthepoweroftheoutofband signalsemployingalowerchaingain.Thisrelaxessomeanalogblocksrequirements andtheamountofdigitalcalibrationsneeded.Thereceiverlineupspresentedin Fig. 1.2 areminimalreceiverarchitectures implementinghighdynamicrange(DR) continuoustimesigmadeltaADC(SD-ADC).Theupperoneimplementsonlyone activefilterstagewithtrans-impedanceamplifier(TIA)betweenthepassivemixer andtheSD-ADC.Thisstructuretargetstominimizeareaandpowerconsumption comparedtothefilter-and-gainchainandislessexposedtothecircuitimperfections oftheblocksinterconnections.IthasaRF-to-basebandinterfacethatcanbeeasily simulatedwithcommonknowntechniques.Afurthersteptoreducetheareaandthe powerconsumptionavoidstheinstantiationoftheTIAstage,asshowninFig. 1.2 (middle),andreplacestheactivestage byasmallpassiveattenuationstageand alowerpoleinthefirststage.AhighorderSD-ADCisachaoticsystemandit isingeneralnotpossibletousedirectlyharmonicbalancetosimulatethischain performanceandalinearizedmodelcanbeusedinstead.Bothlowgainproposed chainshaveincommonthatthefirstactivestageafterthemixersuffersofnoisegain duetotheequivalentsmallimpedanceintheRFchain.Thethirdpresentedlineup inFigure(bottom)usesapassivemixerinvoltagemodefollowedbyaGmstage havingahighoutputimpedanceinterfacetotheSD-ADC.
1.2TheReceiverChainasaFullFeaturedandFairADC VerificationEnvironment
Allpresentedreceiverarchitecturesareabletoconvertsignalspresentinthetwo WiFiRFbands.Thesignalattheantennaisamplifiedbyacascadeddifferential lownoiseamplifier(LNA)anddownconvertedtozeroIF.Apassiveswitchin
Fig.1.2 Thethreeminimalgain,highdynamicrangelineupspresentedinthisworkandthe typicalPSDplotscenarioinbaseband.Theoutofbandsignalsdoesnotsaturatethechain.Less foldinginbandisachievedduetothehighclkfrequency
serieswiththeswitchingquadmixerselectsthebandofinterestandthesignal isroutedtotheIandQbasebandpaths.TheWiFistandarddefinesthepossibility toallocateforeachuserachannelcontainingadifferentnumberofcarriers.Asa resultallproposedlineupsareabletoprocessabasebandsignalswithbandwidth of8.9,18.3and38.3MHz.AttheoutputoftheADCachainofdecimatorsand digitalfiltersprocessestheconvertedsignal.Theimplementedanaloggaincontrol adaptstheLNAgainproportionallytothesignalstrengthdetectedattheADC output.InthedigitaldomainitisalsopossibletocollecttheundecimatedSD-ADC datastreamstoredintoaninternalmemory.Asidesoftheactivepolethereisa significantdifferencethatdistinguishthesystems:theADCclockcanbederived fromthemixerlocaloscillator(LO)orfromaseparatedPLL.ALOderivedclock isparticularlyhelpfulwhentheisolationofanactiveblockismissing.Inthiscase avariablerateconverterneedstobeaddedattheendofthedecimationchainto interpolatethedecimatedsamplestothefixedfrequencyofthesystem.Thevariable rateconvertercanbeskippedifamultipleofthesystemclockisusedfortheADC. Thethreechipshaveacompatiblepinout;inparticulartheprogrammingofthe devices,theroutingoftheRFsignalstotheLNAandofthesupplylinesarethesame andthusthesamemotherboardisusedtomeasureandcomparethem(Fig. 1.3).
Fig.1.3 ClocksourcesinthefullreceiverincludingdecimatorsandAGC
1.2.1TheTIA-ADCLineup
ThefunctionalblockofthereceiverispresentedinFig. 1.4.InthisSD-ADC,aswell asintheotherpresentedSD-ADC,thechosencontinuoustimefilterisimplemented asathird-orderchainofintegratorsinfeedback.Anadvantageofthisstructureis thattheresistorbetweenTIAandADCcan beprogrammedtoachieveanadditional gainandDRboostoffewdBsatthecostofaddedgaincomplexity.Ablock-level noisebudgetisusedtosizeanddesigntheblocksandit’scalculatedbyreplacing theantenna,theLNAandthemixerwithagreatlysimplifiedmodelasshown inFig. 1.5.Themodelreplacestheantennabyanidealvoltagesourcedrivinga noiselessvoltagegainelementofvalueGconnectedtoanoiselessresistor Rmix , whichrepresentsthemixer’soutputimpedance.Thisresistorvalueisaffectedby thechosenRFfrontendarchitectureandinourdesignhasavalueoffewhundred Ohms.Asafurthersimplificationthenoiseof allpassiveelementsinthebasebandis neglected,sincethenoiseoftheamplifiersistheonethatdominatesthetotalnoise and,asaconsequence,thesystemareaandpowerconsumption.Tofairlycompare thelineupsweassumethatbothGand Rmix arefixedinallsystems.Thetransfer function(TF)oftheTIAandtheoneoftheADCareflatinthebandofinterest. ThereforeinthenoisebudgetmodelwecanskiptheTIAcapacitorandthehigh frequencysuppressionoutofbandoftheADCSTF.ThecompleteADCisthus reducedtoasimpleinvertingamplifier:thefeedbackresistor Rdac istheequivalent resistorofthefirstcurrentsteeringDAC,whichtogetherwiththeresistor R2 sets theADCgain. Nop1 and Nop2 mimictheinputreferrednoiseoftheOPAMPsand Nq replacestheADCquantizationnoise.
Wecanusethesuperpositionprincipletocalculatetheinputreferrednoiseofthe systemundertheassumptionthatthegainoftheOPAMPsisveryhigh.Thesystem gainfrominputXtooutputYisgivenby: Y X D Rdac R1 G Rmix R2
BycalculatingtheTFofeachnoisesourcetotheoutputanddividingthembythe systemgainweobtaintheinputreferrednoisecontributionequation:
Fig.1.4 Conceptualdrawingofthefirstproposedlowgainhighdynamicrangelineup.TheTIA filtersthehighfrequencysignals
Fig.1.5 SimplifiedDCnoisemodeloftheTIAandADCcascade
Thevalueofthequantizationnoise Nq isdrivenbytheclock.Ononeside,toreduce thepowerconsumptiontheclockneedstobeminimized,ontheothersidealower frequencydecreasestherateoftheDACfeedbackandreducestheloopstability.The polesoftheADChavealimitedhighestfrequencyconstraintforthesamereasons. Asthequantizationnoiseisaddedattheendofthechainitcanbeminimizedby risingthegainthroughanincreasingof R1 and Rdac .Thesupplyvoltagelimits thetotalgainofthefirststageandsetsconstraintsontheADCgain Rdac =R2 . Thushavingaflattransferfunctionontwostagesandasmall R2 setsequivalent stringentconstraintstoboththeTIAnoiseandtotheADCfirststagenoise.Itis possibletocalculatetheinputreferrednoisebudgetforeachfrequencyandwith
Fig.1.6 ChaingainandSTF(top)andinputreferrednoisebudget(bottom).Thisincludesthe contributionofthequantizationnoise,oftheTIAandofthefirstADCopampnoise.IfR2equals Rdacthentheopamp1noisecanbegreatlyrelaxed
lesssimplificationsbyusingmathtoolstosolvethesystemequations.Anexample forthebreakdownisshowninFig. 1.6.Theareaandthepowerconsumptionof thesetwoblocksisconsiderable.
Toreduceataminimumthethermalnoisecontributionofthefirststage,the multipathOPAMPstructure[1]wasusedintheTIAstage.ThedifferentialOPAMP conceptisdepictedinFig. 1.7.The gm stagescanbeprogrammedtofindabetter tradeoffbetweenthenoise(gm1 and Cg1 ),the GBW andthepowerconsumption. Thetwocascaded gm stagesallowtoachieveveryhighgainatlowerandmedium frequencies.AsinglestageversionoftheclassABoutputstageasreportedin[2]is usedtoefficientlydrivetheintegratorfeedbackcapandtheload.
ThefollowingOPAMPsinthedesignneedtoachieveahigherbandwidthbutnot muchinbandgainandatwostagemillercompensatedstructurewasused.
Theclockofthislineuphasbeenderivedfromthemixerclock.Thelocal oscillator(LO)isdividedbyanintegerfactorwhichchangeswiththeWiFimode. Theclockcanthusspanoverawiderange,andtheADCneedstofulfillallstability andDRrequirementsforthelowestclock,butalsoneedstobeabletorunatthe highestclockfrequency.ThedatapathbetweenquantizerandDACsneedstobe designedtoavoidthemetastabilityregionwhenthesampleiscapturedintheDAC latch.
Fig.1.7 TheTIAandthefirstADCopampisaGmCmultipathstructurecascadedtoaclassAB stage(left ).Opampopenloopfrequencyresponse(right )
Fig.1.8 Thereferenceandoffsetsamplingphase(left ),andtheinputsignaltrackingphase(right ) foracomparatorinthequantizer
Thequantizerdesignimplementsanevolutionoftheoffsetcompensatedcomparatorspresentedin[3].Thebasicdifferentialcomparatorslicecircuitincluding thereferencegenerationcapacitivenetworkandthepreamplifierforthelatchis showninFig. 1.8.Itoperatesessentiallyintwonon-overlappingphasesdrivenby theADCclock.Inthefirstphase,depictedontheleft,thedifferentialpairoutputs andinputsareshorted.Thereferencefullscalevoltage,commontoallcomparators, isconnectedtothecomparatorcapacitorarray.Inthisway,thevoltagestoredinthe capacitorsissampledagainsttheoperatingpointofthedifferentialpair.Assuming adifferentialpreamplifiergainG,theoutputvoltageinthisoperatingconditionis:
1 D GVOffs G C 1
Thismeansthatalsotheoffsetvoltage VOffs ofthecomparatorisstoredinthe capacitors.Inthesecondphase,depictedontherightofFig. 1.8,aswitchconnected totheSD-ADCfilterisclosed.Inthiswaychargeredistributionbetween C1 and C2 occurs.Thevoltageattheoutputofthepreamplifieristhengivenby:
2
1
Voutdiffph2 D G Vindiff C
Voutdiffph
Fig.1.9 Afullquantizerarrayoffourcomparators(left )andanoptimizedversionthatenables afasterchargeredistributionduetothereducedamountofcapacitors(right ).TheVINpswitches canbeboostedtoachievehigherfrequency
Ifthegainishighenoughthenthelasttwotermsarecanceledandtheoffsetis compensated.AlthoughthecapacitorscanbealtogetherintherangeoftenthsoffF thespeedofthisstructureislimitedinphaseonebytheparasiticcapacitorsatthe differentialinputpair.Forthisreasonitisessentialtobuildanextremelycompact layoutforthiscell.Thetotalparasiticcapacitancestemsfromparasiticsalongthe routedlinestogetherwiththedifferentialpairgatecapacitanceandtheparasitic capacitancethattheresistiveloadsshowversusthesubstrate.
Thelattertermappearsduetothefactthatinadvancedtechnologiesthe minimumresistorwidthiswidecomparedtothetransistors.Inthesetechnologies theallowedminimumdistancebetweentransistorsisshortcomparedtotheone betweenatransistorandapolyresistor.Tomitigatealltheseparasiticeffects twolongPMOStransistorsdrivenintheohmicregionareusedasloadinstead oftheresistors.Duetotheembeddedoffsetcompensationofthestructurethe mismatchbetweenthetwoPMOSloadsisnotofconcern.Anadditionalspeedlimit comesfromthechargeredistributionswitchesinthesecondphase.Contrarytothe referenceswitches,theinputswitchesdonotsitatapotentialneartothesupply.The issueisthat Vinp and Vinn areoftenclosetocommonmodevoltageandthiscanbe solvedusingtwotricksimplementedasshowninFig. 1.9.Comparingtheleftand therightpart:threeboostedswitches sw canbeusedinsteadoftwotoreducetheir seriesresistance Ron .Moreover,wherethecomparatorlevelallowsit,thenumber ofunitcapacitor Cu canbereducedtotheminimumrequiredratiobasedonratio matchingandgainrequirements.
TheoutputofthequantizerisfedtotheDACsafterasmalldelayofseveral hundredsofpicoseconds.ToincreasetheperformanceoftheADCtheDACtransfer functionshallbelinear.AstheDACcellssufferfrommismatchabackground calibrationhasbeenimplemented.Theliteraturereportsseveralwaystolinearize theDAC.Thescramblingofthecellsusedbydynamicelementmatchingtechnique
isveryefficientinsimulation,butdifficulttobeimplementedoutoftheboxdueto theaddeddelayintheloopandduetothecommonmodeglitchenergy,generated atthefirstOPAMPinput.Thisglitchmodulateswiththeinputsignalgenerating distortiontones.AnotherwaytolinearizetheDACistocalibratethemismatch ofthecells.Itispossibletocalibratethemismatchinadigitalcontrolledfashion [4],oritisalsopossibletodoitwithinananalogloop[5].Theadvantageofthe digitalcalibrationisthattheobservabilityandmanipulationiswellcontrolledin thedigitaldomainandtherefreshrateinbackgroundcanbeperformedseldom; theimplementationiscomplexandtheresidualerrorislimitedbytheimplemented LSB.Ontheotherhandtheanalogcalibrationloopneedsacontinuousrefreshand thecalibrationisvirtuallyabletoreducetheresidualerrortoasmall ".
InthisADCdesigntheanalogcalibrationwaschosenbecausethecomplexity isreduced.ThecircuitideaofthecalibrationisshownFig. 1.10 andthebasic techniqueisknownsinceverylongtime[6].Todecreasetheamountofnoise injectedintheintegratorstheunusedDACcellsaredisconnectedfromthefilterand connectedtoafloatingnode dump.Ifacellisinusethenthedigitalwordcoming fromthequantizerisroutedtotheswitches DPx =DN x .TheDACsinjectthecurrent pulsesinanonreturn-to-zerofashion.ThecurrentsteeringPMOSandNMOSare splitintwoparts:awidetransistorpartisconnectedtoafixedbiasvoltagethat grantstoinjectacurrentofabout90%ofthewantedcurrent.Additionallyasmaller transistorinparallelinjectstheresidual calibratedcurrentofabout10%.Itsbias voltageisstoredintoalocalcapacitor.Ifacellisincalibrationitsquantizerdata isroutedtoasparecellthatcantakeoverthetaskofinjectingtherequiredcurrent inthefilterintegrators.Thecellincalibrationactivatestheswitchesmarkedwith CALsw and DC x .Inthiswayareferencecurrentcellisconnectedandcompared againstthecellincalibration.Asbothreferencecellandin-calibrationcurrent steeringcellshowsahighimpedanceoutput 1=gds thevoltageatthenode CALsw settlestotherequiredvoltageneededtoproducethereferencecurrent.Aftersettling isachievedthecellisreinsertedbackintheSD-ADCloop.Asthedisconnectionand thereinsertionofthecellcanaffectthestoredbiasvoltagethisoperationisdonein anon-overlappingfashion.
Thefunctionalityofthecircuithasbeentestedwithmeasurementsshownin Fig. 1.11 andthecircuitisabletolinearizetheDACbyreducingthethirdharmonic.
1.2.2TheRF-ADCLineup
ThelineupisshowninFig. 1.12.Asdemonstratedintheprevioussectionthe presenceofanactivestagebetweenmixerandADCistighteningthenoise requirementsforbothTIAandthefirstADCstage.Theideaistoassigntheportion ofnoisegeneratedfromtheTIAintothetotalADCnoisebudget,actuallyrelaxing itsrequirements.
Fig.1.10 TheDACbiasandacurrentsteeringDACcellincludingtheswitchesfortheoperation, forthedumpingandforthecalibrationagainstareferencecurrent
Fig.1.11 MeasuredFFTspectrumperformedinjectinga 3dBFStonewithandwithoutcalibration.Withcalibrationthethirdharmonicissuppressedby9dBFS
GiventhesimplifiednoisemodelofFig. 1.13,thechainDCgainwithhighgain amplifiersAis
andtheinputnoisepower
Y X D Rdac G Rmix
Fig.1.12 Conceptualdrawingofthesecondproposedlowgainhighdynamicrangelineup.The SD-ADCandthemixerareconnecteddirectly
Fig.1.13 SimplifiedDCnoisemodeloftheRFADC
Thefinalgoalistoreducetheoverallareaandpowerconsumption.TheSD-ADC coefficientsetneedstofulfilltheoutofbandsignalrejectionrequirements:thiscan bepartlyachievedbyusingapassivepoleinfrontoftheADCandalowercut-off frequencyinthefirststagewhichlimitsthequantizationnoise.Adisadvantageof thislineupisthatchangingthelowfrequencygainoftheSTFwouldrequirethe DAC1currentandthefirstfiltercapacitor C1 ,orthesecondstageinputresistor R2 ,tobereprogrammedtokeepthepolepositionatthesamefrequency.Theinput referrednoisebreakdownisshowninFig. 1.14.
ThebuildingblocksofthisADCarethesameastheonesofthepreviousdesign. TheinterfacebetweenmixerandADCneeds carefulattention.Iftheclockofthe LOandtheclockofthefirstDACarenotsynchronizedspurscanpollutethe
Fig.1.14 NoisebudgetbreakdownfortheRFADC.Thedominantnoiseisgeneratedinthefirst opampandatthequantizer
inbandspectrum.TheDACactsasadifferentialcurrentsource,butwhenacell changesitsstatethegenerationofasmallcommonmodeglitchcannotbeavoided. ThecommonmodeglitchcontainsseveralharmonicsatthemultiplesoftheADC clock.Adifferentialsignalproducedbythemixeratthesamefrequencyisdownconvertedtobaseband:itsamplitudeatthedigitalADCoutputdependsonthefirst stageperformance,whichisusuallylimitedathigherfrequencies.Inthislineupthe clockisderivedfromtheLO;thismakestheanalysisandtheassessmentofthe potentialproblematicscenariosmucheasier.Forhighfrequencyisolationpurposes itisadvisabletoaddasmallandnon-dominantRCpassivepoleattheADCinput. Atoobigcapacitorbooststhefirststagenoise.
ThedesignoftheRFcomponentsrequiresagoodmodelofthebaseband circuitry.DuetothecoarsequantizationofthesignalattheoutputoftheADC filter,itisnotgrantedthatthedatastreamisperiodic.Thisnon-periodicbehavior ofaSDADCisablockingpointforallharmonicbalancebasedsimulators.Afull transistorlevellinearmodeloftheADCisneeded.Forthispurposethequantizer andtheDACcanbereplacedbyasimplevoltagecontrolledcurrentsourceasshown inFig. 1.15.ThismodelfitswelltherealSTFandNTFathigheroversamplingratio andcanbeusedtoverifytheoverallchainperformance.Goodmatchingbetween simulationsandmeasurementshasbeenachieved.Inthemodelitispossibleto emulatethenoisecontributionofthequantizer.Thenoisegeneratedbyaresistor
Fig.1.15 LinearizedmodeloftheSD-ADC(top)andequivalentquantizationnoisegeneratorfor transientsimulations(bottom)
canbesizedtofittotheonedeterminedbythenumberofbitsandbytheADCclock frequency.ThequantizationnoiseintherealADCissampledatfclkandthusitis filteredatitsmultiples.Thethermalnoiseofaresistorshowsaflatcharacteristic: itisthereforeadvisabletostronglyfiltertheresistornoisewithanLCfilterpriorto theinjectionatthefilteroutput.
1.2.3TheGm-ADCLineup
HavingaclockfrequencysynchronizedwiththeLOissimplifyingtheanalysisof thepossibleblockerscenariosbutrequirestheuseofavariablerateconverterinthe digitaldomain,whichisaverypowerhungryblock.Onewaytoavoidthisadditional digitalblockistokeeptheSD-ADCclockinsynchwiththesystemandindependent oftheLO.InsuchanarchitectureitisveryimportanttoimplementastrongantialiasfunctionincascadewiththeADCSTFwhichavoidsintermodulationbetween themixerandtheDAC.Thisisachievedintroducinga gm stageinthechain.Inall thepresentedarchitecturesthemixeris passiveandcomposedofsimpleswitches drivenatthecommonmodevoltage.Themixertobasebandinterfaceinthiscaseis notfixedatcommonmodeasitisinthevoltagedomain.Thisisanopportunityto
Fig.1.16 Conceptualdrawingofthethirdproposedlowgainhighdynamicrangelineup.AGm stagefilterstheoutofbandsignalswithacapacitorattheinputandattheoutput
Fig.1.17 SimplifiedDCnoisemodeloftheGmADC
filtertheinputsignalwithacapacitor.The gm cellisdirectlyfeedingtheADCin currentmode,anditcanbeseenattheinputoftheopampasahighimpedanceinput load Rg .ComparedtotheTIAlineupthe gm inter-stagerelaxesthefirstOPAMP noisebudget.Theequivalentcircuitforthebasicnoisebudgetcalculationdoesnot containanymorethemixerimpedance;justtheLNAgainG(Figs. 1.16 and 1.17). Thechaingain,undertheassumptionofahighgainamplifiersA,isgivenby:
andtheinputreferrednoiseis
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plants. ↑
Hopoe was said to be a woman that was turned into stone by Pele in a fit of jealous anger. ↑
This mele of Kamapuaa’s seeks to imply that Pele knew him only in spirit. ↑
This likely has reference to some bird traits or habits, there being no known birds of this name whose home at high elevations, like the koae, or bos’n bird, is in a region of cold temperature ↑
Referring to the Kaliuwaa episode where his forces climbed up his body and escaped. ↑
Haleaha, a place in Makua, opposite the Kaliuwaa valley, near the main road. ↑
Sore or inflamed eyes to which Pele is likened from her fires. The chant throughout is a series of irritating slurs. ↑
This is the first instance where the Hiiaka family name of Pele’s eight sisters is given to any of the brothers, and is a grave error. ↑
A case of love soothing the way. ↑ Lonomakua as Pele’s agent ↑ Pele. ↑
Pohakea, a section of Kilauea ↑ Thunder is frequently referred to as rolling stones in the heavens. ↑
This, then, would be the accompanying lightning ↑
Referring to the Hilo rains. ↑
Volcanic eruption ↑
Abbreviation of Kamapuaa, a not infrequent habit of the race with their names, not restricted to their stories ↑
Hia was the term used for rubbing the two sticks aulima and aunaki together, producing a powder which became ignited by friction ↑
Summary treatment for a discourteous act. ↑
The same Makalii that had escaped alone on several occasions to tell Olopana of his defeat. ↑
Aalii (Dodonaea viscosa), a mediumsized, common forest tree of hardgrained, dark wood. ↑
This is a play on the latter part of Kualele, a practice common to chants and meles; a poetic license. ↑
First use of this name in full, probably through his higher rank and claiming possession of Kauai. As an epithet it embodies nothing complimentary. ↑
Aimoku is rendered creator of the isles rather than devourer, as connected with volcanic origin. ↑
Nananuu, the place of offering in the temple, as was experienced at the heiau of Kawaewae, where the tables were turned on Olopana. ↑
Mahiki in the sense used here is thought to mean a leap, to indicate the proximity of the two islands, rather than Kauai being pried from Oahu ↑
Kamapuaa here warns Makalii that he is an easy mark ↑
Names indicative of various cloud formations, the latter “a large cloud standing close to the heavens ” ↑
The early part of this story locates this person with Olopana in Koolau, Oahu. ↑
Kahikiula, father of Kamapuaa, a reason for shielding him from certain death at the hand of his antagonist, as also to test him for recognition. ↑
This denial was probably based on the supposed death of Kamapuaa in the encounter with Pele. ↑
This is the first mention of the demigod having a brother. Kahikihonuakele, lit., muddy foundation foreign land. ↑
Reviving his brother by the lomilomi process, a rubbing, pressing method to relieve pain and bruises. ↑
Further insight in Kamapuaa’s family history. The failure of father and brother and subsequently the mother to recognize him shows he had assumed a form which they were unfamiliar with ↑
“Their own mother,” a customary complimentary term, rendered more applicable in this case owing to the
bond of relationship existing between the men ↑
This throws light perhaps on a tendency in ancient times of falsely claiming or asserting kinship for the sake of personal gain ↑
These two had been assigned to the uplands with Makalii, but are prepared to “eat humble pie” and own Kamapuaa ↑
A complimentary, figurative name to sooth Kamapuaa’s anger; a play on Iliahi, the fragrant sandalwood ↑
A condition that arises from the excessive use of awa, sacred to the gods. ↑
Ka ua kilinoe hau might be better defined as “the fine dewy rain,” or probably “the cold misty rain.” ↑
Prostrating at one’s feet is indicative of contrition for past wrongs, but the sitting on Hina and then trampling on them all shows Kamapuaa was not to be placated. ↑
An act of abandon; abject submission, appealing for forgiveness. ↑
Resuming his hog form he revenges his insults at the fisherman’s hands. ↑
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