Manual de serviço Televisor de Plasma LG modelo 50PA4500-SF chassis PB21A. by Portal da Eletrônica

Internal Use Only North/Latin America Europe/Africa Asia/Oceania

http://aic.lgservice.com http://eic.lgservice.com http://biz.lgservice.com

PLASMA TV SERVICE MANUAL CHASSIS : PB21A

MODEL : 50PA4500

50PA4500-SF

CAUTION

BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL67341904 (1201-REV00)

Printed in Korea

CONTENTS

CONTENTS . ............................................................................................. 2 SAFETY PRECAUTIONS ......................................................................... 3 SPECIFICATION........................................................................................ 4 ADJUSTMENT INSTRUCTION................................................................. 5 BLOCK DIAGRAM................................................................................... 12 EXPLODED VIEW .................................................................................. 13 SCHEMATIC CIRCUIT DIAGRAM ..............................................................

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LGE Internal Use Only

SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

General Guidance

Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet.

An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB. Keep wires away from high voltage or high temperature parts.

Do not use a line Isolation Transformer during this check. Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5 mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.

Leakage Current Hot Check circuit

AC Volt-meter

Before returning the receiver to the customer, always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 MΩ and 5.2 MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.

-3-

To Instrument's exposed METALLIC PARTS

0.15u

Good Earth Ground such as WATER PIPE, CONDUIT etc.

1.5 Kohm/10W

LGE Internal Use Only

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range

This spec sheet is applied all of the PDP TV with PB21A chassis.

2. Requirement for Test

Each part is tested as below without special appointment. (1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C (2) Relative Humidity: 65 % ± 10 % (3) Power Voltage : Standard input voltage (AC 100-240 V~, 50/60 Hz) * Standard Voltage of each products is marked by models. (4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. (5) The receiver must be operated for about 5 minutes prior to the adjustment.

3. Test method

(1) Performance: LGE TV test method followed (2) Demanded other specification - Safety : CE, IEC specification - EMC : CE, IEC

4. Model General Specification No

Item

Receiving System

Available Channel

Input Voltage

Specification

Remark

1) SBTVD / NTSC / PAL-M / PAL-N

50A6500-SA 50A4900-SA

2) DVB-T

42/50PA4500-DF

1) VHF : 02~13 2) UHF : 14~69 3) DTV : 07-69 (VHF high/UHF) 4) CATV : 02~135

50A6500-SA 50A4900-SA

1) VHF : 02~13 2) UHF : 14~69 3) DTV : 14~69 (UHF) 4) CATV : 02~135

42/50PA4500-DF

1) AC 100 ~ 240V 50/60Hz

Market

Brazil / chile / Peru / Venezuela / Costarica / Uruguay

Screen Size

42 inch Wide(1024 × 768) 50 inch Wide(1024 × 768) 50 inch Wide(1920 × 1080) 60 inch Wide(1920 × 1080)

Aspect Ratio

16:9

Tuning System

Module

PDP42T4#### PDP50T4#### PDP50R4#### PDP60R4####

Operating Environment

1) Temp : 0 ~ 40 deg 2) Humidity : ~ 80 %

Storage Environment

1) Temp : -20 ~ 60 deg 2) Humidity : ~ 85 %

42PA all model 50PA4 all model 50PA6 all model 60PA6 all model

(1024 × 768) (1024 × 768) (1920 × 1080) (1920 × 1080)

42PA all model 50PA4 all model 50PA6 all model 60PA6 all model

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LGE Internal Use Only

ADJUSTMENT INSTRUCTION 1. Application Range

This spec. sheet applies to PB21A chassis applied PDP TV all models manufactured in TV factory.

4. PCB Assembly Adjustment 4.1. Using RS-232C

2. Specification

■ Adjustment sequence

(1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. (2) Adjustment must be done in the correct order. But it is flexible when its factory local problem occurs. (3) T he adjustment must be performed in the circumstance of 25 °C ± 5 °C of temperature and 65 % ± 10 % of relative humidity if there is no specific designation. (4) The input voltage of the receiver must keep AC 100-240 V~, 50/60 Hz. (5) Before adjustment, execute Heat-Run for 5 minutes. ■ A fter Receive 100% Full white pattern (06CH) then process Heat-run (or “8. Test pattern” condition of Ez-Adjust status) ■ How to make set white pattern 1) Press Power ON button of Service Remocon 2) Press ADJ button of Service remocon. Select “10. Test pattern” and, after select “White” using navigation button, and then you can see 100% Full White pattern. * In this status you can maintain Heat-Run useless any pattern generator * Notice: if you maintain one picture over 20 minutes (Especially sharp distinction black with white pattern – 13Ch, or Cross hatch pattern – 09Ch) then it can appear image stick near black level.

3. Adjustment items

3.1. PCB Assembly adjustment

■ Adjust 480i Comp1 ■ Adjust 1080p Comp1/RGB ● If it is necessary, it can adjustment at Manufacture Line ● You can see set adjustment status at “9. ADJUST CHECK” of the “In-start menu”

3.2. Set Assembly Adjustment

■ EDID (The Extended Display Identification Data ) ■ Color Temperature (White Balance) Adjustment ■ Make sure RS-232C control ■ Selection Factory output option

- A djust 3 items at 3.1. PCB assembly adjustments " 4.1. ■ Adjustment sequence" one after the order.

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Order

command

Set response

1. I nter the Adjustment mode

aa 00 00

a 00 OK00x

2. C hange the Source

XB 00 40 XB 00 60

b 00 OK40x (Adjust 480i Comp1 ) (Adjust 1080p Comp1) b 00 OK60x (Adjust 1080p RGB)

3. Start Adjustment

ad 00 10

4. Return the Response

OKx ( Success condition ) NGx ( Failed condition )

5. R ead Adjustment data

( main ) ad 00 20 ( main ) ad 00 30

(main : component1 480i, RGB 1080p) 000000000000000000000000007c007b006dx (main : component1 1080p) 000000070000000000000000007c00830077x

6. Confirm Adjustment

ad 00 99

NG 03 00x (Failed condition) NG 03 01x (Failed condition) NG 03 02x (Failed condition) OK 03 03x (Success condition)

7. End of Adjustment

ad 00 90

d 00 OK90x

< See ADC Adjustment RS232C Protocol_Ver1.0 >

■ Necessary items before Adjustment items ● Pattern Generator : (MSPG-925FA) ● Adjust 480i comp1 (MSPG-925FA:model :209, pattern :65) - comp1 Mode ● Adjust 1080p comp1 (MSPG-925FA:model :225 , pattern :65) - comp1 Mode ● Addjust RGB (MSPG-925FA:model :225 , pattern :65) - RGB-Pc Mode * If you want more information then see the below Adjustment method (Factory Adjustment) ■ Adjustment sequence ● aa 00 00: Enter the ADc Adjustment mode. ● xb 00 40: change the mode to component1 (No actions) ● ad 00 10: Adjust 480i comp ● ad 00 10: Adjust 1080p comp ● xb 00 60: change to RGB-Pc mode(No action) ● ad 00 10: Adjust 1080p RGB ● xb 00 90: Endo of Adjustmennt

LGE Internal Use Only

5. Factory Adjustment

-> PU21A/PB21A : USE INTERNAL ADC(LM1) : using internal pattern.

5.1. Auto Adjust Component 480i/1080p RGB 1080p

■ Summary : A djustment component 480i/1080i and RGB 1080p is Gain and Black level setting at Analog to Digital converter, and compensate the RGB deviation ■ Using instrument ● A djustment remocon, 801GF(802B, 802F, 802R) or MSPG925FA pattern generator ( I t can output 480i/1080i horizontal 100% color bar pattern signal, and its output level must setting 0.7V±0.1V p-p correctly)

* caution : Set Volume 0 after adjustment

5.2. Use Internal ADC(S7R)

- A DJ(EZ ADJUST) -> 6.ADC Calibration -> ADC Calibration(START)

< Adjustment pattern : 480i / 1080p 60Hz Pattern > ● You must make it sure its resolution and pattern cause every instrument can have different setting ● Adjustment method 480i Comp1, Adjust 1080p Comp1/ RGB (Factory adjustment) ● ADC 480i Component1 adjustment - Check connection of Component1 - MSPG-925FA -> Model: 209, Pattern 65 ● Set Component 480i mode and 100% Horizontal Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to “NORMAL” ● ADC 1080p Component1 / RGB adjustment - Check connection both of Component1 and RGB - MSPG-925FA -> Model: 225, Pattern 65 ● Set Component 1080p mode and 100% Horizontal Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to “NORMAL” ● After get each the signal, wait more a second and enter the “IN-START” with press IN-START key of Service remocon. After then select “7. External ADC” with navigator button and press “Enter”. ● After Then Press key of Service remocon “Right Arrow (VOL+)” ● You can see “ADC Component1 Success” ● Component1 1080p, RGB 1080p Adjust is same method. ● C omponent 1080p Adjustment in Component1 input mode ● RGB 1080p adjustment in RGB input mode ● If you success RGB 1080p Adjust. You can see “ADC RGB-DTV Success”

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* E DID (The Extended Display Identification Data)/DDC (Display Data Channel) Download. ■ Summary ● It is established in VESA, for communication between PC and Monitor without order from user for building user condition. It helps to make easily use realize “Plug and Play” function. ● For EDID data write, we use DDC2B protocol. - Auto Download ■ After enter Service Mode by pushing “ADJ” key, ■ Enter EDID D/L mode. ■ Enter “START” by pushing “OK” key. * Caution: - N ever connect HDMI & D-sub Cable when the user downloading . - Use the proper cables below for EDID Writing

LGE Internal Use Only

■ It only needs to PCM EDID D/L for North America Product. (PU21A)

■ EDID data (Model name = LG TV) - RGB HD 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 01 16 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 26 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 36 00 B0 84 43 00 00 18 A0 0F 20 00 31 58 1C 20 28 80 14 00 B0 84 43 00 00 1E 00 00 00 FD 00 3A 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 58 - South Centural America _2D_HD HDMI 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26

* Edid data and Model option download(RS232) NO

Enter download MODE

EDID data Model option download

Item

download ‘Mode In’

download

CMD 1

CMD 2

Data 0

When transfer the ‘Mode In’, Carry the command.

Automatically download (The use of a internal pattern)

0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 36 00 B0 84 43 00 00 18 A0 0F 20 00 31 58 1C 20 28 80 14 00 B0 84 43 00 00 1E 00 00 00 FD 00 3A 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 3F 02 03 27 F1 4F 10 1F 84 13 05 14 03 02 12 20 22 15 11 16 01 26 15 07 50 09 57 07 67 03 0C 00 10 00 B8 2D E3 05 03 01 01 1D 00 72 51 D0 1E 20 6E

- Manual Download ■ Write HDMI EDID data ● Using instruments - Jig. (PC Serial to D-Sub connection) for PC, DDC adjustment. - S/W for DDC recording (EDID data write and read) - D-sub jack - Additional HDMI cable connection Jig. ● Preparing and setting. - Set instruments and Jig. Like pic.5), then turn on PC and Jig. - Operate DDC write S/W (EDID write & read) - It will operate in the DOS mode.

28 55 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40 58 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 D1

< For write EDID data, setting Jig and another instruments >

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LGE Internal Use Only

- South Centural America _2D_HD HDMI 2

00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 3F

- Adjustment Color Temperature(White balance) ■ Using Instruments ● Color Analyzer: CA-210 (CH 10) - Using LCD color temperature, Color Analyzer (CA210) must use CH 10, which Matrix compensated (White, Red, Green, Blue compensation) with CS2100. See the Coordination bellowed one. ● Auto-adjustment Equipment (It needs when Auto-adjustment – It is availed communicate with RS-232C : Baud rate: 115200) ●V ideo Signal Generator MSPG-925F 720p, 216Gray (Model: 217, Pattern 78)

02 03 27 F1 4F 10 1F 84 13 05 14 03 02 12 20 22

■ Connection Diagram (Auto Adjustment) ● Using Inner Pattern

00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 36 00 B0 84 43 00 00 18 A0 0F 20 00 31 58 1C 20 28 80 14 00 B0 84 43 00 00 1E 00 00 00 FD 00 3A 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC

15 11 16 01 26 15 07 50 09 57 07 67 03 0C 00 20 00 B8 2D E3 05 03 01 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40 58 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 C1 ● Using HDMI input

- South Centural America _2D_HD HDMI 3 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 36 00 B0 84 43 00 00 18 A0 0F 20 00 31 58 1C 20 28 80 14 00 B0 84 43 00 00 1E 00 00 00 FD 00 3A 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 3F

< connection Diagram for Adjustment White balance > ■ White Balance Adjustment If you can’t adjust with inner pattern, then you can adjust it using HDMI pattern. You can select option at “Ez-Adjust Menu – 7. White Balance” there items “NONE, INNER, HDMI”. It is normally setting at inner basically. If you can’t adjust using inner pattern you can select HDMI item, and you can adjust.

02 03 27 F1 4F 10 1F 84 13 05 14 03 02 12 20 22 15 11 16 01 26 15 07 50 09 57 07 67 03 0C 00 30 00 B8 2D E3 05 03 01 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40 58 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B1 - See Working Guide if you want more information about EDID communication.

-8-

In manual Adjust case, if you press ADJ button of service remocon, and enter “Ez-Adjust Menu – 7. White Balance”, then automatically inner pattern operates. (In case of “Inner” originally “Test-Pattern. On” will be selected in The “Test-Pattern. On/Off”. ● Connect all cables and equipments like Pic.5) ●S et Baud Rate of RS-232C to 115200. It may set 115200 orignally. ● Connect RS-232C cable to set ● Connect HDMI cable to set

LGE Internal Use Only

● When Color temperature (White balance) Adjustment (Automatically) - Press “Power only key” of service remocon and operate automatically adjustment. - Set BaudRate to 115200. ● You must start “wb 00 00” and finish it “wb 00 ff”. ● If it needs, then adjustment “Offset”. ■ White Balance Adjustment (Manual adjustment) ● Test Equipment: CA-210 - Using PDP color temperature, Color Analyzer (CA-210) must use CH 10, which Matrix compensated (White, Red, Green, Blue compensation) with CS-2100. See the Coordination bellowed one. ● Manual adjustment sequence is like bellowed one. - Turn to “Ez-Adjust” mode with press ADJ button of service remocon. - Select “10.Test Pattern” with CH+/- button and press enter. Then set will go on Heat-run mode. Over 30 minutes set let on Heat-run mode. - Let CA-210 to zero calibration and must has gap more 10cm from center of PDP module when adjustment. - Press “ADJ” button of service remocon and select “7.White-Balance” in “Ez-Adjust” then press “►” button of navigation key. (When press “►” button then set will go to full white mode) - Adjust at three mode (Cool, Medium, Warm) - If “cool” mode Let B-Gain to 192 and R, G, B-Cut to 64 and then control R, G gain adjustment High Light adjustment. - If “Medium” and “Warm” mode Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment. - All of the three mode Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment. - With volume button (+/-) you can adjust. - After all adjustment finished, with Enter (■ key) turn to Ez-Adjust mode. Then with ADJ button, exit from adjustment mode

■ RS-232C Command (Commonly apply) RS-232C COMMAND [CMD ID DATA]

Meaning

White Balance adjustment start.

Start of adjust gain

End of gain adjust

Start of offset adjust

(Inner white pattern)

(Inner white pattern) wb

End of offset adjust

End of White Balance adjust (Inner pattern disappeared)

● “wb 00 00”: Start Auto-adjustment of white balance. ● “wb 00 10”: Start Gain Adjustment (Inner pattern) ● “jb 00 c0” : ●… ● “wb 00 1f”: End of Adjustment * If it needs, offset adjustment (wb 00 20-start, wb 00 2fend) ● “wb 00 ff”: End of white balance adjustment (inner pattern disappear)

* Attachment: W hite Balance adjustment coordination and color temperature. ● Using CS-1000 Equipment. - COOL : T=11000K, ∆uv=0.000, x=0.276 y=0.283 - MEDIUM : T=9300K, ∆uv=0.000, x=0.285 y=0.293 - WARM : T=6500K, ∆uv=0.000, x=0.313 y=0.329

■ Adjustment Mapping information RS-232C COMMAND [CMD ID DATA] Cool

Mid

Warm

M I N

CENTER (DEFAULT) Cool

Mid

Warm

M A X

R Gain

184

192

G Gain

187

183

159

192

B Gain

192

161

192

R Cut

127

G Cut

127

B Cut

127

-9-

LGE Internal Use Only

6. GND and ESD Testing

6.1. Prepare GND and ESD Testing.

● When tester will measure on Cool condition, adjust W30 on TV display menu.

■ Check the connection between set and power cord

6.2. Operate GND and ESD auto-test.

■ Fully connected (Between set and power cord) set enter the Auto-test sequence. ■ Connect D-Jack AV jack test equipment. ■ Turn on Auto-controller(GWS103-4) ■ Start Auto GND test. ■ If its result is NG, then notice with buzzer. ■ If its result is OK, then automatically it turns to ESD Test. ■ Operate ESD test ■ If its result is NG, then notice with buzzer. ■ If its result is OK, then process next steps. Notice it with Good lamp and STOPER Down.

● When tester will measure on medium condition, adjust 0 on TV display menu.

● When tester will measure on warm condition, adjust W30 on TV display menu. ● Using CA-210 Equipment. (10 CH) - Contrast value: 216 Gray Color temperature

Test Equipment

6.3. Check Items.

Color Coordination x

■ Test Voltage ● GND: 1.5KV/min at 100mA ● Signal: 3KV/min at 100mA ■ Test time: just 1 second. ■ Test point ● GND test: Test between Power cord GND and Signal cable metal GND. ● ESD test: Test between Power cord GND and Live and neutral. ■ Leakage current: Set to 0.5mA(rms)

COOL

CA-210

0.276 ± 0.002

0.283 ± 0.002

MEDIUM

CA-210

0.285 ± 0.002

0.293 ± 0.002

WARM

CA-210

0.313 ± 0.002

0.329 ± 0.002

- Brightness spec. Item

White average brightness

Min

Typ

Max Unit Remark

Brightness uniformity -20

6.4. POWER PCB Ass’y Voltage adjustment (Va, Vs voltage adjustment)

+20 cd/m²

- 100% Window White Pattern - 100IRE(255Gray) - Picture: Vivid(Medium)

- 85IRE(216Gray) 100% Window White Pattern - Picture: Vivid(Medium)

6.4.1. Test equipment : D.M.M 1EA 6.4.2. Connection Diagram for Measuring : refer to fig.1 <XPOWER4 50R4/T4 PSU>

5.3. Test of RS-232C control.

- Press In-Start button of Service Remocon then set the “4.Baud Rate” to 115200. Then check RS-232C control and

5.4. Selection of Country option.

- Selection of country option is allowed only North American model (Not allowed Korean model). It is selection of Country about Rating and Time Zone. ■ Models: All models which PU11A Chassis (See the first page.) ■ Press “In-Start” button of Service Remocon, then enter the “Option” Menu with “PIP CH-“ Button ■ Select one of these three (USA, CANADA, MEXICO) depends on its market using “Vol. +/-“button. * Caution : Don’t push The INSTOP KEY after completing the function inspection. * Caution : Inspection only PAL M / NTSC

(fig.1) PCB Assy Voltage adjustment

6.4.3. Adjustment method

6.4.3.1. Vs adjustment (refer fig.1) (1) Connect + terminal of D.M.M. to Vs pin of P811, connect -terminal to GND pin of P811 (2) After turning VR901, voltage of D.M.M adjustment as same as Vs voltage which on label of panel left/top ( deviation ; ±0.5V) 6.4.3.2. Va adjustment (refer fig.1) (1) After receiving 100% Full White Pattern, HEAT RUN. (2) Connect + terminal of D.M.M. to Va pin of P811, connect -terminal to GND pin of P811 (3) After turning VR502,voltage of D.M.M adjustment as same as Va voltage which on label of panel left/top (deviation; ±0.5V)

- 10 -

LGE Internal Use Only

7. Default Service option.

■ Select download file (epk file)

7.1. ADC-Set.

■ R-Gain adjustment Value (default 128) ■ G-Gain adjustment Value (default 128) ■ B-Gain adjustment Value (default 128) ■ R-Offset adjustment Value (default 128) ■ G-Offset adjustment Value (default 128) ■ B-Offset adjustment Value (default 128)

7.2. White balance. Value. Center(Default) COOL

Mid

Warm

R Gain

192

G Gain

192

B Gain

192

R Cut

G Cut

B Cut

7.3. Temperature Threshold ■ Threshold Down Low ■ Threshold Up Low ■ Threshold Down High ■ Threshold Up High

20 23 70 75

8. USB DOWNLOAD(*.epk file download) ■ Put the USB Stick to the USB socket ■ Press Menu key, and move OPTION

■ After download is finished, remove the USB stick. ■ Press “IN-START” key of ADJ remote control, check the S/W version.

9. Tool option 50PA4500-SF

■ Press “FAV” Press 7 times

- 11 -

Tool option 1

36864

Tool option 2

22794

Tool option 3

3697

Tool option 4

51270

Tool option 5

Country code

Country Group

Country

LGE Internal Use Only

BLOCK DIAGRAM

- 12 -

LGE Internal Use Only

EXPLODED VIEW IMPORTANT SAFETY NOTICE

601

304

A12

520 501

910

400

900

120

240

590

LV1

A10

201

206 203

202

207

204

200

302

205

580

301

208

305

209

303

540

300

310

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

- 13 -

LGE Internal Use Only

+5V

Full SCART

PDP GP4 LM1 EAX64280503

MULTI E L103 120-ohm EU

+3.3V MMBT3906(NXP) Q103-*1

EU JK100 PSC008-02

R104 10K EU AV/SC1_DET R129 0 EU

B SC1_SOG_IN

C C

23 B

AV/SC1_CVBS_IN

AV_DET C109 27pF 50V EU

R117 75 EU

22 COM_GND 21 SYNC_IN

C111 220pF 50V EU

Q100 MMBT3904(NXP) EU

19 SYNC_GND1

5% 1/16W

R113 75 EU

SYNC_GND2 18 17

R134 100 1/4W EU

R141 220 EU

R135 0 EU

SC1_FB R_OUT

15 RGB_GND

R106 75

14 R_GND

R123 33 EU

R119 75 EU

SC1_R+/COMP1_Pr+

R114 10K EU

D2B_OUT 12 G_OUT

REC_8

R108 75

D2B_IN 10

G_GND ID

R115 470K EU

C102 R121 1000pF 10K 50V EU READY

R126 12K EU

R116 470K EU

C103 R124 1000pF 10K EU 50V READY

R127 12K EU

EU C 12K R160

EU 1K R158 SC_RE1

EU MMBT3904(NXP) B Q105 C

EU MMBT3904(NXP) B Q107

MULTI D112-*1 MMBD6100 A2

AV/SC1_L_IN

E EU MMBT3904(NXP) Q106

R120 2.7K EU

SC1_G+/COMP1_Y+

R143 180 EU

EU KDS184 D112 A2 SC1_ID

DTV/MNT_VOUT

C116 10uF 16V EU

R147 10K EU

R142 390 READY

RGB_IO 16

R136 330 EU

E Q104 MMBT3904(NXP) EU

C110 1000pF 50V READY

C106 100uF 16V EU

R118 470K EU

R146 18K EU

Q103 ISA1530AC1 EU

SC1_VOUT

SYNC_OUT

C117 0.1uF 16V READY

R144 470 EU

R105 1K EU

SHIELD

EU 7.5K R156

C EU R155 3K

SC1_B+/COMP1_Pb+

7 AUDIO_L_IN 6

R107 75

B_GND

SC_RE2

EU 12K R159

8 B_OUT

EU 1K R157

AV/SC1_R_IN

P_17V IC101 AZ4580MTR-E1 P_17V

AUDIO_GND 4 AUDIO_L_OUT

AUDIO_R_OUT R125 0 EU

Q101 MMBT3904(NXP) EU

R149 15K EU

R145 6.8K EU

R137 2K EU

R139 2K EU Q102 MMBT3904(NXP) EU

C112 10uF 16V EU

+3.3V_ST

R154 5.6K EU

OUT2

IN1+

IN2-

VEE

IN2+

EU 5.6K R153

SCART1_Rout

SCART1_MUTE

AR105

/PCM_OE /PCM_WE

CI_IORD

/PCM_IORD

CI_IOWR

/PCM_IOWR AR106

C101 0.1uF 16V EU

R140 2K EU

C100 22uF 10V EU

VCC

R152 6.8K EU

R148 15K EU

CI_WE

+5V_CI_ON

EU R189 10K

CI_OE

CI SLOT

IN1-

SCART1_Lout

C115 27pF 50V EU

DTV_R_OUT

OUT1

CI_ADDR[12]

PCM_A[12]

CI_ADDR[13]

PCM_A[13]

CI_ADDR[14]

PCM_A[14] /PCM_REG

REG

BUF2_FE_TS_DATA[0-7] BUF2_FE_TS_DATA[0]

+5V

R151 10K EU /CI_CD1

JK102 10067972-000LF EU 35

R102 100 EU

PCM_D[3]

PCM_D[4]

PCM_D[5] PCM_D[6]

CI_TS_DATA[6] CI_TS_DATA[7]

PCM_D[7] R130 33 EU 1/16W R1315% 33 EU

R111 10K EU

BUF2_FE_TS_DATA[0] BUF2_FE_TS_DATA[1] BUF2_FE_TS_DATA[2]

READY R112 0

BUF2_FE_TS_DATA[3]

CI_ADDR[10]

CI_ADDR[11]

CI_ADDR[9]

CI_ADDR[8]

CI_ADDR[13]

CI_ADDR[14]

BUF2_FE_TS_DATA[4] BUF2_FE_TS_DATA[5]

R109 10K EU

BUF2_FE_TS_DATA[6] BUF2_FE_TS_DATA[7] R100 EU 33 R101 EU 33

15 16

100 EU

BUF2_FE_TS_CLK

CI_ADDR[12]

CI_ADDR[7] CI_ADDR[6]

CI_ADDR[3]

CI_TS_VAL

CI_TS_SYNC

PCM_D[1]

PCM_D[2]

CI_TS_DATA[1]

CI_TS_DATA[2]

33 EU

AR109 33 EU BUF2_FE_TS_DATA[4] BUF1_FE_TS_DATA[4] BUF2_FE_TS_DATA[5]

BUF1_FE_TS_DATA[5]

BUF2_FE_TS_DATA[6]

BUF1_FE_TS_DATA[6]

BUF2_FE_TS_DATA[7]

BUF1_FE_TS_DATA[7]

2Y3

1A4

PCM_A[3] 2Y1

CI_ADDR[4] GND

EU C105 0.1uF 16V

AR110 33 BUF1_FE_TS_SYN

VCC

BUF1_FE_TS_VAL_ERR

2OE

BUF1_FE_TS_CLK

BUF2_FE_TS_SYN BUF2_FE_TS_VAL_ERR BUF2_FE_TS_CLK

1Y1

CI_ADDR[0] 2A4

PCM_A[7] 1Y2

CI_ADDR[1] 2A3

PCM_A[6] 1Y3

CI_ADDR[2] 2A2

PCM_A[5] 1Y4

CI_ADDR[3] 2A1

PCM_A[4]

CI POWER ENABLE CONTROL +5V

+5V_CI_ON

R150 10K EU

2 G2

R103 100 EU

/CI_CD2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright Â© 2012 LG Electronics Inc. All rights reserved. Only for training and service purposes

L100 120-ohm EU

CI_ADDR[2] R184 10K READY

CI_ADDR[1] EU

AR104 33

CI_ADDR[0]

R187 10K EU

C131 0.1uF 16V READY

C104 0.1uF 16V EU

R198 10K READY

PCM_D[0]

3.3V_CI

AO3407A CI_ADDR[0-14]

G1 1

C PCM_D[0-7]

PCM_5V_CTL PCM_D[0-7]

+3.3V

R188 2K EU

CI_TS_DATA[3]

+5V

Q114 RSR025P03 EU D

R110 0 READY AR102

1A2

PCM_A[1] CI_ADDR[6] 2Y2

CI_TS_DATA[0]

2Y4

BUF2_FE_TS_VAL_ERR

CI_ADDR[4]

33 EU

1A1

CI_ADDR[5]

READY

CI_ADDR[5]

AR101

1OE

CI_DET PCM_A[0]

1A3

REG

IC100 TC74LCX244FT

PCM_A[2]

/PCM_WAIT

EU R165 10K

CI_OE

/PCM_IRQA

CI_TS_CLK

PCM_A[11]

+3.3V_CI

PCM_RST

BUF1_FE_TS_DATA[3]

PCM_A[10]

+3.3V_CI

CI_WE R132

BUF1_FE_TS_DATA[1] BUF1_FE_TS_DATA[2]

BUF2_FE_TS_DATA[3]

CI_ADDR[11]

CI_ADDR[7]

R128

BUF2_FE_TS_DATA[2]

BUF1_FE_TS_DATA[0-7]

PCM_A[8]

/PCM_CE

AR108 33 EU BUF1_FE_TS_DATA[0]

PCM_A[9]

CI_ADDR[10]

R133 10K EU

43 45

CI_IOWR BUF2_FE_TS_SYN BUF2_FE_TS_DATA[0-7]

AR103 33

37 33

CI_IORD

BUF2_FE_TS_DATA[0-7]

CI_ADDR[9]

AR100

AR107

CI_ADDR[8]

CI_TS_DATA[5]

CI_TS_DATA[4]

BUF2_FE_TS_DATA[1]

B R181 10K EU

C114 27pF 50V EU

C113 10uF 16V EU

+3.3V_CI

R138 2K EU

BUF1_FE_TS_DATA[0-7]

C107 5600pF 50V EU C108 5600pF 50V EU

R122 0 EU

AUDIO_R_IN

5% 1/16W

MULTI Q114-*1

L101 120-ohm EU

Q113 MMBT3904(NXP) EU

C136 0.1uF 16V READY

GP4_S7LR SCART,CI Slot

C137 0.1uF 16V EU

2011-10-20 1

LGE Internal Use Only

SPDIF +5V

DATA1DATA0+

DATA0_SHIELD DATA0CLK+ CLK_SHIELD CLKCEC NC SCL

DDC_SDA_1

SDA DDC/CEC_GND +5V_POWER

15 JP202

R208 33 HDMI_1

14 13 12

9 8 7 6

4 3 2

9 10 11

R286 10K SIDE_HDMI_1

12 13 14 15

Q201 MMBT3904(NXP) SIDE_HDMI_1 E R230 3.3K R231 R287 SIDE_HDMI_1 33 10K SIDE_HDMI_1 SIDE_HDMI_1

R227 1.8K SIDE_HDMI_1

R237 10K SIDE_HDMI_1

R288 10K SIDE_HDMI_2

R250 10K SIDE_HDMI_2 E R244 3.3K R289 SIDE_HDMI_2 R245 10K 33 SIDE_HDMI_2 SIDE_HDMI_2 DDC_SDA_3

R260 56K READY

DDC_SCL_3

R261 0 READY

DDC_SCL_2

19 20 SHIELD

HDMI_ARC

CEC_REMOTE

CK-_HDMI1

12 11 10 9

D0-_HDMI1

D0_GND

D0+

7 D0+_HDMI1 6

D1D1-_HDMI1 D1_GND

D1+

4 D1+_HDMI1 3

D2D2-_HDMI1

D2_GND

D2+

R232 33 SIDE_HDMI_1

R246 33 SIDE_HDMI_2

14 CEC_REMOTE CK-_HDMI2

CK+ CK+_HDMI2 D0D0-_HDMI2 D0_GND

11 10 9 8

D0+ D0+_HDMI2 D1D1-_HDMI2 D1_GND

7 6 5

D1+ D1+_HDMI2 D2D2-_HDMI2 D2_GND

4 3 2

D2+ D2+_HDMI2

D2+_HDMI1

CEC_REMOTE

R269 27K READY

C219 0.1uF 16V

VINPUT

R285 100 SPDIF_OUT

CEC_REMOTE

VCC

VIN

CEC_REMOTE_S7 PEN_TOUCH +5V_ST D225 B140A

SIDE USB

D222 READY

CK+

C220 10pF 50V

FIX_POLE

D224 MMBD301LT1G 30V READY R268 100

CK-_HDMI3

VCC

R209 10K SIDE_HDMI_2 HPD3

Q202 R241 1.8K SIDE_HDMI_2MMBT3904(NXP) SIDE_HDMI_2

DDC_SDA_2

+3.3V_ST C B

Fiber Optic

GND

Q203 BSS83

CK+_HDMI3

+3.3V

VOUT

SWITCH ADDED

+3.3V +5V

+5V_ST

IC204 AP2191SG-13

40V

READY

D0-

1A SPEC IC207 AP2337SA-7

PEN_TOUCH VIN 3

GND

D0-_HDMI3

R264

Capacitors on VBUSA should be 10K placed as closd to connector as possible.

D0_GND

D0+

OUT_2

JK209 3AU04S-305-ZC-(LG)

D0+_HDMI3 D1D1-_HDMI3 D1_GND D1+ D1+_HDMI3 D2D2-_HDMI3 D2_GND D2+ D2+_HDMI3

GND

R270 10K

R243 0

R247 0 READY

IN_1

$0.11 OUT_1

C213 10uF 10V USB1_OCD

C212 0.1uF 16V

SIDE_USB_DM

SIDE_USB_DP

R258 33

FLG

IN_2

USB1_CTL

R271 33

CK+_HDMI1

D0-

R203 10K SIDE_HDMI_1 HPD2

USB DOWN STREAM

CK+

11 10

HPD

DDC_SCL_1

R226 1K SIDE_HDMI_1

+5V

DATA1_SHIELD

HPD1

GND

R281 10K HDMI_1

DATA1+

R217 10K HDMI_1

Q200 MMBT3904(NXP) HDMI_1 E R204 3.3K R207 R282 HDMI_133 10K HDMI_1 HDMI_1 JP201

R201 1.8K HDMI_1

DATA2-

JP208

B 19

DATA2_SHIELD

5V_DET_HDMI_3 R240 1K SIDE_HDMI_2

JP207

HDMI1_NON Screw DATA2+ 1

R202 10K HDMI_1

JP204

5V_DET_HDMI_1

R200 1K HDMI_1

JP205

SHIELD 20

5V_DET_HDMI_2

Fiber Optic

For CEC BODY_SHIELD

JK200-*1 YKF45-7058V

BODY_SHIELD

SHIELD

5V_HDMI_3

+5V

5V_HDMI_2

+5V

MULTI JK204-*1 2F01TC1-CLM97-4F

JK204 JST1223-001

5V_HDMI_1

SIDE_HDMI_2

SIDE_HDMI_1

HDMI_1

JK211 PPJ239-01

10mm

COMPONENT2

RS232C

R283 R284

[RD1]O-SPRING_2

[RD1]CONTACT_2

JK203 SPG09-DB-009 [GN]E-LUG

+3.3V

R251 75

6A [GN]O-SPRING

COMP2_Y+

R276 100 R266 1K

R252 75

R265 10K

+5V_ST

AV2_DET

[RD]O-SPRING_1

[RD1]O-SPRING_1

9 5

COMP2_Pr+

Q204 MMBT3904(NXP) USA

[RD]CONTACT_1

7F 5E

[BL1]O-SPRING

[WH]O-SPRING

[RD]CONTACT_2

[BL1]E-LUG-S

[GN1]CONTACT

[GN1]O-SPRING

[RD2]E-LUG

[RD2]O-SPRING_2 [RD2]CONTACT

R235 470K

R236 12K

R238 470K

R242 12K

7 12

[RD2]O-SPRING_1

V_SYNC

DIN1

R233 100K USA

C225 0.1uF 16V

ET_NET 5

C226 0.1uF 16V

ROUT2

BS-R430051

3 3

1 ET_NET_UDE

RN C200 0.1uF 16V ET_NET

R274 0 NON_RGB

TP 2

C2+

C2-

JK210-*1

D200 D204 5.6V 5.6V ET_NET ET_NET

D205 5.6V ET_NET

D206 5.6V ET_NET

DOUT2 9 9

RIN2

C227 0.1uF 16V

R273 0 ET_NET

R291 0 ET_NET

R280 0 ET_NET

R290 0 ET_NET

B_TERMINAL1

RGB_DDC_SDA DSUB_G+

R216 75

DSUB_HSYNC

+3.3V

C203 10pF 50V

DSUB_VSYNC R224 10K

R225 1K

T_TERMINAL1 B_TERMINAL1

R_SPRING

T_SPRING

B_TERMINAL2

T_TERMINAL2

R218 470K

R222 12K

R_SPRING

T_SPRING

R220 10K PC_R_IN

DSUB_B+

R206 33 C202 10pF 50V

T_TERMINAL1

E_SPRING

6A DSUB_R+

3 6A

B_TERMINAL2

T_TERMINAL2

R213 0 NON_USA

R221 10K

R210 10 USA

PC_L_IN R219 470K

R223 12K

DSUB_DET RGB_DDC_SCL PC_SER_DATA

DDC_GND R212 10

[RD2]E-LUG-S

R205 33

DDC_CLOCK

SC1_R+/COMP1_Pr+

GND_1 SYNC_GND

USA

R215 75

BLUE NC

JK206 PEJ027-04

R214 75

GREEN H_SYNC

C1-

R296 10K READY

DIN2

RED

BLUE_GND

V+

C228 0.1uF 16V

JK207 PEJ027-04

R298 10K

DDC_DATA

COMP1_L_IN

R263 12K

GREEN_GND

NON_EU

[WH2]O-SPRING

NON_EU

C1+

PC AUDIO

GND_2

NON_EU R239 10K

RED_GND

NON_EU

+5V_ST

R297 10K

COMP1_R_IN

+2.5V JK210 XRJV-01V-0-D12-080

[RD]E-LUG

JK205 SPG09-DB-010

NON_EU R234 10K

COMP2_R_IN

R257 10K R255 470K

ROUT1

PC_SER_DATA R275 0 NON_RGB PC_SER_CLK

R262 12K

RGB PC

[GN1]E-LUG

R254 470K

[RD]O-SPRING_2

NON_EU

COMP2_L_IN

R256 10K 5D

RIN1

R229 100K USA B

[RD1]E-LUG-S

DOUT1

R253 75

C229 0.1uF 16V

R267 1K

[RD]E-LUG-S

R277 100

R228 10K USA

COMP2_Pb+ 5B

GND

[BL]O-SPRING

[RD1]CONTACT_1

COMP2_DET 7

VCC

4A [BL]E-LUG-S

+3.3V_ST

IC206 MAX3232CDR

R279 10K

R259 10K

[GN]CONTACT

[WH1]O-SPRING

ETHERNET

S7_TXD S7_RXD PM_TXD PM_RXD

0 0

5A R299 0

R278 10K

JK208 PPJ234-02 EU

+3.3V_ST

[RD1]E-LUG

1/16W 5%

NON_EU 6H

JK202 SIDE_HDMI_2

1/16W 5%

JK201 SIDE_HDMI_1

JK200 HDMI_1

R211 10

PC_SER_CLK

SHILED

[BL2]O-SPRING

[BL2]E-LUG-S

[GN2]CONTACT

[GN2]O-SPRING

[GN2]E-LUG

SC1_B+/COMP1_Pb+

GND

+3.3V NON_EU R248 10K

NON_EU R249 1K COMP1_DET

SC1_G+/COMP1_Y+

GP4_S7LR JACK INTERFACE

2011-10-20 2

LGE Internal Use Only

TUNER

BUF1_FE_TS_DATA[0-7] AR300 FNIM 33 FE_TS_DATA[0] BUF1_FE_TS_DATA[0] BUF1_FE_TS_DATA[1] FE_TS_DATA[1] FE_TS_DATA[2]

BUF1_FE_TS_DATA[2]

FE_TS_DATA[3]

BUF1_FE_TS_DATA[3]

FE_TS_DATA[4]

AR301 FNIM 33 BUF1_FE_TS_DATA[4]

FE_TS_DATA[5]

TUNER

OPT1

TDSS-G101D

DVB-T/C

OPT2 HNIM

BUF1_FE_TS_DATA[5] BUF1_FE_TS_DATA[6]

FE_TS_DATA[6] FE_TS_DATA[7]

OPT3 X

BUF1_FE_TS_DATA[7] AR302 33

FE_TS_DATA[0-7]

FNIM BUF1_FE_TS_SYN

FE_TS_SYN

TDSS-H101F

ATSC

TDSH-T101F

DVB-T_SCA HNIM

RF_SW

TDSN_B001F

SBTVD

FNIM

RF_SW

TDSN_G201D

DVB_T2

FNIM

HNIM

FE_TS_VAL_ERR

BUF1_FE_TS_VAL_ERR BUF1_FE_TS_CLK

FE_TS_CLK

RF_SWITCH R310 1K RF_SWITCH_CTL C307 0.1uF 16V RF_SWITCH

Close to Tuner Pin TU303 TDSN_B001F

TU304 TDSN-G301D 1 2 3 4 5 6 7 8 9 10 11

+1.25V_TU

12 13 C300 10uF 6.3V FNIM

C301 0.1uF 16V FNIM

14 15 16 17 18 19 20 21 22 23 24 25 26 27

NC_1

RESET

SCL

SDA

+B1[3.3V]

SIF

+B2[1.8V]

CVBS

+B3[2.5V]

NC_2

NC_3

+B4[3.3V]

+B5[1.23V]

NC_4

GND

ERROR

SYNC

VALID

MCLK

ATSC

DVB_T/C

SBTVD

DVB_T2

RF_S/W_CTL

RESET

SCL

SDA

+B1[3.3V]

SIF

+B2[1.8V]

CVBS

NC_1

NC_2

NC_3

SCL

SDA

+3.3V

SIF

+1.8V

CVBS

IF_AGC

DIF[P]

DIF[N]

+1.8V_TU

+2.5V_TU

DVB_T_SCA 1

RESET

+3.3V_TU

TU300 TDSH-T101F

TU301 TDSS-H101F

TU302 TDSS-G101D

RESET

SCL

SDA

+B1[3.3V]

SIF

+B2[1.8V]

CVBS

IF_AGC

DIF[P]

DIF[N]

RF_S/W_CTL RESET

R308 R301 2.2K 100

SCL

R307

SDA

R306 22

R311 10K

R309 2.2K

TUNER_RESET

+B1[3.3V] SIF +B2[1.8V] CVBS IF_AGC

C302 0.1uF 16V

C303 10uF 16V

DVB_T2 0 HNIM 0

16V 0.1uF C310

C304 68pF 50V

TU_SCL

TU_SDA

C305 68pF 50V

C311 0.1uF 16V

Close to Tuner Pin

R302 R303 IF_AGC_MAIN

DIF[P]

HNIM 0

R304

DIF[N]

R305

HNIM

READY R313 0

IF_P_MSTAR IF_N_MSTAR

+5V

+B3[3.3V] +B4[1.23V] NC_4

12 SHIELD

SHIELD

GND ERROR

SHIELD

R316 470 C308 0.1uF 16V

E R312 4.7K

READY R300 0

R317 82

TU_SIF

MMBT3906(NXP) Q301 C

SYNC FE_TS_SYN VALID FE_TS_VAL_ERR MCLK D0

FE_TS_CLK FE_TS_DATA[0]

FE_TS_DATA[1]

FE_TS_DATA[2]

FE_TS_DATA[3]

FE_TS_DATA[4]

FE_TS_DATA[5]

FE_TS_DATA[6]

FE_TS_DATA[7]

FE_TS_DATA[0-7]

TU_CVBS

28 SHIELD

SHIELD

Tuner block

TUNER

LGE Internal Use Only

VIDEO/AUDIO

IC400 LGE2111A-T8

IC400-*1 LGE2111A-TE

E6 F5 B6 E5 D5 B7 E7 F7 AB5 AB3 A9 F4 AB1 N6 AB2 AC2

GPIO36

LVA0P

GPIO37

LVA0N

GPIO38

LVA1P

GPIO39

LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

AB23 AC25 AB24 AD25 AC24 AE23 AC23 AC22 AD23

LVA4N

GPIO49 GPIO50 GPIO51

V23 Dvix only

LVB0P

U24

LVB0N

GPIO52 I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

V25

J3 K3 J1 K2 K1 L2 L3 T5 T4 V5

AC4 RXACKP

VIFP

RXACKN

VIFM

RXA0P

AD3

HNIM 0.1uF

C452 100

R451 HNIM

RXA1P

RXA1N

AE3

C432 C433

0.1uF 0.1uF

R464 R465

47 47

AD4

RXA2P

SIFP

RXA2N

SIFM

L400 120-ohm Main

AC5

R446

DDCDA_DA/GPIO24

10K

DDCDA_CK/GPIO23

PCM_D[0] PCM_D[1] PCM_D[2] PCM_D[3] PCM_D[4] PCM_D[5] PCM_D[6] PCM_D[7]

IF_N_MSTAR PCM_A[0-14] TU_SIF

C457 1000pF 50V READY

+3.3V

IF_AGC

AA23

AE2

RF_AGC

Y24

LVB3N

AA25

LVB4P

AA24

LVB4N

AE6 AE24 LVACKP

I2C_SCKM1/GPIO75

AD24

LVACKN

AD6

I2C_SDAM1/GPIO76

Y23

LVBCKP

R497

AD2R452

W25 W23

LVB3P

0 HNIM C435 R437 0.1uF 0 HNIM READY TU_SCL TU_SDA

C450 100pF 50V HNIM

C1612 0.047uF 25V

100

HNIM

IF_AGC_MAIN C1613 0.1uF HNIM

HNIM

W24

LVBCKN

HOTPLUGB/GPIO20 AE9

AD9 AC11 AD10 AE11 AD11 AE8 AD8 AC8

RXCCKP

SPDIF_IN/GPIO152

RXCCKN

SPDIF_OUT/GPIO153

RXC0N

G3 F1 G2 G1 H2 H3 R6 U6 P5 R4

USB0_DM

RXC1N

USB0_DP

RXC2P

R404 R405 R406 R407 R408 R409 R410 R411 R412

DSUB_G+ DSUB_B+ R400 10K

R403 2.4K

22 22 33 68 33 68 33 68 0

USB1_DM

DDCDC_DA/GPIO28

USB1_DP

0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 1000pF

N2 P3 N3 N1 M3 M2 M1

X-TAL_1

SIDE_USB_DM SIDE_USB_DP

AE12

R413 R414 R415 R416 R417 R418

SC1_G+/COMP1_Y+ SC1_B+/COMP1_Pb+ SC1_SOG_IN

33 68 33 68 33 68

C408 C409 C410 C411 C412 C413 C414

0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 1000pF

U3 U2 T1 T2 R2 R1 T3

AA15 AE21 AB21 Y15

R473 10K

RXDCKP RXDCKN

I2S_IN_SD/GPIO151

I2S_IN_WS/GPIO149

RXD0P

R462

B10

RXD0N

I2S_OUT_BCK/GPIO156

RXD1P

I2S_OUT_MCK/GPIO154

RXD1N

I2S_OUT_SD/GPIO157

RXD2P

AA21 Y19 AB17 Y16 AB19 AB20 AA16 AA19 AC21 AA17

Y18 Y21 Y22

PCM_RST /CI_CD1 /CI_CD2

C10

C437 C438

AB9 AUR0

HSYNC0

AUL1

VSYNC0

AUR1

RIN0P

AUL2

RIN0M

AUR2

GIN0P

AUL3

GIN0M

AUR3

BIN0P

AUL4

BIN0M

AUR4

AA11

2.2uF 2.2uF

AV/SC1_L_IN AV/SC1_R_IN

T20 U22

R471 2.2K

R472 2.2K

HSYNC1

NON_EU C472 NON_EU C478 C443 C444 C445 C446

AA7 AB8 Y8 Y10 AC7 AD7

EU R442

100

VSYNC1

AUOUTL0

RIN1P

AUOUTL2

RIN1M

AUOUTL3

GIN1P

AUOUTR0

GIN1M

AUOUTR2

BIN1P

AUOUTR3

22 22 R481 R482

2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF

COMP1_L_IN COMP1_R_IN COMP2_L_IN COMP2_R_IN PC_L_IN PC_R_IN

R479 R480 22 22

PCMADR[0]/GPIO125

NF_CLE/GPIO136

PCMADR[1]/GPIO124

NF_REZ/GPIO139

PCMADR[2]/GPIO122

NF_WEZ/GPIO140

PCMADR[3]/GPIO121

NF_ALE/GPIO141

PCMADR[4]/GPIO99

NF_RBZ/GPIO142

E4 N25 N24 A8

R477 R478

22 22

R469 R470

RGB_DDC_SDA RGB_DDC_SCL

AR400

1/16W 22

AD17 AE17 AD19

AV/SC1_DET

AMP_RESET_N TUNER_RESET

B7 E7

PCM_5V_CTL

F7 AB5

AMP_SCL AMP_SDA

R438

AB3

PCMADR[7]/GPIO103 PCMADR[8]/GPIO108

R486

PCMADR[9]/GPIO110

GPIO_PM[0]/GPIO6

PCMADR[10]/GPIO114

PM_UART_TX/GPIO_PM[1]/GPIO7

PCMADR[11]/GPIO112

GPIO_PM[2]/GPIO8

PCMADR[12]/GPIO104

GPIO_PM[3]/GPIO9

PCMADR[13]/GPIO107

GPIO_PM[4]/GPIO10 PM_UART_RX/GPIO_PM[5]/GPIO11 PM_SPI_SCZ1/GPIO_PM[6]/GPIO12 GPIO_PM[7]/GPIO13 GPIO_PM[8]/GPIO14

PCMOE_N/GPIO113

GPIO_PM[9]/GPIO15

PCMWE_N/GPIO197

PM_SPI_SCZ2/GPIO_PM[10]/GPIO16

PCMIORD_N/GPIO111

AC_DET PM_TXD DISP_EN 5V_ON RL_ON PM_RXD

R449

J6 K4 L6 C2

PM_SPI_CZ0/GPIO_PM[12]/GPIO0

PCMIRQA_N/GPIO105

PM_SPI_SDI/GPIO2

PCMCD_N/GPIO130

PM_SPI_SDO/GPIO3

N6 USB1_OCD

AB2 AC2

COMP2_Pr+ COMP2_Y+ COMP2_Pb+

33 68 33 68 33 68 0

0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 1000pF

Y2 AA3 W2

P24

22 22

Y3 V1 W3

TS0CLK/GPIO87 PCM2_CE_N/GPIO131

TS0VALID/GPIO85

PCM2_IRQA_N/GPIO132

READY R487 R432 22

R489 33

R490

PWM0 PWM1 COMP2_DET SC_RE2

N23 P22 R21 P20 F6

SCART1_Rout

AE5

SOGIN2

R427 33 C422 R428 EU 33EUC423 R429 33 C424

TU_CVBS AV/SC1_CVBS_IN COMP2_Y+

0.047uF 0.047uF 0.047uF

Y4 W4

KEY1 KEY2 TOUCH_VER_CHK

R444 100

AA5

C400 1000pF READY

Y5 AA4

50V

Y6 AA1

DTV/MNT_VOUT

ET_RXD[0]/RP/GPIO60

CVBS3

ET_TXD[0]/TP/GPIO57

CVBS4 CVBS5 CVBSOUT0

C428

0.047uF

C434 1uF

C449 0.1uF

G5 G4 J5 J4

L401 BLM18SG121TN1D

T21 T22

VCOM

ET_TX_EN/GPIO58 ET_MDC/GPIO61 ET_MDIO/GPIO62

Y12 Y13

PCM2_WAIT_N/GPIO133

TS0DATA_[0]/GPIO77

PCM2_RESET/GPIO134

TS0DATA_[1]/GPIO78 TS0DATA_[2]/GPIO79

UART1_TX/GPIO43

TS0DATA_[3]/GPIO80

UART1_RX/GPIO44

TS0DATA_[4]/GPIO81

UART2_TX/GPIO65

TS0DATA_[5]/GPIO82

UART2_RX/GPIO64

TS0DATA_[6]/GPIO83

UART3_TX/GPIO47

TS0DATA_[7]/GPIO84

I2C_SCKM2/DDCR_CK/GPIO72

TS1VALID/GPI96

I2C_SDAM2/DDCR_DA/GPIO71

TS1SYNC/GPIO97

Y11 AA12 AB12 AA14 AB14 AA13 AB11

DDCA_DA/UART0_TX

TS1DATA_[0]/GPIO88

DDCA_CK/UART0_RX

TS1DATA_[1]/GPIO89 TS1DATA_[3]/GPIO91

PWM0/GPIO66

TS1DATA_[4]/GPIO92

PWM1/GPIO67

TS1DATA_[5]/GPIO93

PWM2/GPIO68

TS1DATA_[6]/GPIO94

PWM3/GPIO69

TS1DATA_[7]/GPIO95

RP TP

RN ETH_LED1

B6 E5 D5 B7 E7 F7 AB5 AB3 A9 F4 AB1 N6 AB2 AC2

GPIO37

LVA0N

GPIO38

LVA1P

GPIO39

LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N

GPIO50 GPIO51USA_SPIL_MAIN ICLVB0P GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N LVB3P LVB3N LVB4P

AB23

AC25

AB24

AD25

AC24

AE23

AC23

AC22

AD23

AB5 AB3

V23

U24

V25

AB1

V24

W25

AB2

W23

AC2

LVBCKP

GPIO194 GPIO195

LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N

GPIO50

C3 A3 B3 B4

TN CI_DET

R402 EU 22 DSUB_DET AV2_DET ETH_LED0

R445 R460 R431 R443 49.9 49.9 49.9 49.9 1% 1% 1% 1% ET_NET ET_NET ET_NET ET_NET

PIN NAME

AC16

GPIO51EU_SPIL_MAIN ICLVB0P GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N

AA25

LVB4P

AA24

AD24

PIN NO. A9

MODEL_OPT_2

AE15 AE14 AC13 AC14 AD12 AD13 AD14

POWER

K10

C1406 C1407 C1408 C1409 C1410 C1411

LVACKN LVBCKP

W24

LVBCKN

FHD

R401 1K FHD

R430 1K 3D

T24 T23

HDMI_ARC

MODEL_OPT_3 R1400 1K READY

C1419 0.1uF

R1406 150 READY

R419 1K HD

R467 1K 2D

GPIO196 GPIO194

VDDC : 2026mA

K11 L10 M12 M13 N12 P14 P15

C1412

0.1uF

R10 R14

C1413

10uF

R15 T10

C436 0.1uF

READY R1407 63.4 READY +3.3V_ST

V25

SOC_RESET

V24

IC400 LGE2111A-T8

FB_CORE

GND

W23

A-TMA0 A-TMA1 A-TMA2 A-TMA3 A-TMA4 A-TMA5 A-TMA6 A-TMA7 A-TMA8 A-TMA9 A-TMA10 A-TMA11 A-TMA12 A-TMA13 A-TMA14

A-TMBA0 A-TMBA1 A-TMBA2

A-TMODT A-TMRASB A-TMCASB A-TMWEB

Y24

A-TMRESETB

AA25

C429 22uF 16V

AA24

C487 10uF 16V READY

AD24 Y23

A-TMDQSL A-TMDQSLB

R436 10

W24

SOC_RESET A-TMDQSU A-TMDQSUB

U23 T24 T23

GPIO195

R434 100K

D400 KDS181

C430 0.1uF 16V

A-TMDML A-TMDMU

<LM1 CHIP Config> (AUD_SCK,AUD_MASTER_CLK,PWM1,PWM0) B51_NO_EJ SB51_WOS SB51_WS MIPS_SPI_NO_EJ MIPS_SPI_EJ_1 MIPS_SPI_EJ_2 MIPS_WOS MIPS_WO

: : : : : : : :

4’b0000 4’b0001 4’b0010 4’b0100 4’b0101 4’b0110 4’b1001 4’b1010

Boot from 8051 with SPI flash Secure B51 without scramble Secure B51 with scramble Boot from MIPS with SPI flash Boot from MIPS with SPI flash Boot from MIPS with SPI flash Secure MIPS without scramble Secure MIPS with scramble

P19 R16 L11 M14

A11 C14 B11 F12 C15 E12 A14 D11 B14 D12 C16 C13 A15 E11 B13

B23 A_DDR3_A[0]

B_DDR3_A[0]

A_DDR3_A[1]

B_DDR3_A[1]

A_DDR3_A[2]

B_DDR3_A[2]

A_DDR3_A[3]

B_DDR3_A[3]

A_DDR3_A[4]

B_DDR3_A[4]

A_DDR3_A[5]

B_DDR3_A[5]

A_DDR3_A[6]

B_DDR3_A[6]

A_DDR3_A[7]

B_DDR3_A[7]

A_DDR3_A[8]

B_DDR3_A[8]

A_DDR3_A[9]

B_DDR3_A[9]

A_DDR3_A[10]

B_DDR3_A[10]

A_DDR3_A[11]

B_DDR3_A[11]

A_DDR3_A[12]

B_DDR3_A[12]

A_DDR3_A[13]

B_DDR3_A[13]

A_DDR3_A[14]

B_DDR3_A[14]

D25 F22 G22 E24 F21 E23 D22 D24 D21 C24 C25 F23 E21 D23

B-TMA0 B-TMA1 B-TMA2 B-TMA3 B-TMA4 B-TMA5 B-TMA6 B-TMA7 B-TMA8 B-TMA9 B-TMA10 B-TMA11 B-TMA12 B-TMA13 B-TMA14

L402 120-ohm Main L414 Main 120-ohm +3.3V_ST

L403 120-ohm Main

C1415 C1416 C1417

F13 B15 E13

G20 A_DDR3_BA[0]

B_DDR3_BA[0]

A_DDR3_BA[1]

B_DDR3_BA[1]

A_DDR3_BA[2]

B_DDR3_BA[2]

C17 A17 B16

A12 C12

F20 G25

A_DDR3_MCLK

B_DDR3_MCLK

A_DDR3_MCLKZ

B_DDR3_MCLKZ

A_DDR3_MCLKE

B_DDR3_MCLKE

E14 B12

F24

G23 F25

D20 A_DDR3_ODT A_DDR3_RASZ A_DDR3_CASZ A_DDR3_WEZ

B_DDR3_ODT B_DDR3_RASZ B_DDR3_CASZ

B25 B24 A24

B_DDR3_WEZ

A-TMDQL0 A-TMDQL1 A-TMDQL2 A-TMDQL3 A-TMDQL4 A-TMDQL5 A-TMDQL6 A-TMDQL7 A-TMDQU0 A-TMDQU1 A-TMDQU2 A-TMDQU3 A-TMDQU4 A-TMDQU5 A-TMDQU6 A-TMDQU7

F11

E20 A_DDR3_RESET

B_DDR3_RESET

B19 C18

K24 A_DDR3_DQSL A_DDR3_DQSLB

B_DDR3_DQSL B_DDR3_DQSLB

B18 A18

J21 A_DDR3_DQSU A_DDR3_DQSUB

B_DDR3_DQSU

H24 A_DDR3_DQML

B_DDR3_DQML

A_DDR3_DQMU

B_DDR3_DQMU

D17 G15 B21 F15 B22 F14 A22 D15

F16 C21 E16 A20 D16 C20

L20 L23

A_DDR3_DQL[0]

B_DDR3_DQL[0]

A_DDR3_DQL[1]

B_DDR3_DQL[1]

A_DDR3_DQL[2]

B_DDR3_DQL[2]

A_DDR3_DQL[3]

B_DDR3_DQL[3]

A_DDR3_DQL[4]

B_DDR3_DQL[4]

A_DDR3_DQL[5]

B_DDR3_DQL[5]

A_DDR3_DQL[6]

B_DDR3_DQL[6]

A_DDR3_DQL[7]

B_DDR3_DQL[7]

G16 B20

J20

B_DDR3_DQSUB

E15 A21

K25

J24 L24 J23 M24 H23 M23 K23 G21

A_DDR3_DQU[0]

B_DDR3_DQU[0]

A_DDR3_DQU[1]

B_DDR3_DQU[1]

A_DDR3_DQU[2]

B_DDR3_DQU[2]

A_DDR3_DQU[3]

B_DDR3_DQU[3]

A_DDR3_DQU[4]

B_DDR3_DQU[4]

A_DDR3_DQU[5]

B_DDR3_DQU[5]

A_DDR3_DQU[6]

B_DDR3_DQU[6]

A_DDR3_DQU[7]

B_DDR3_DQU[7]

L22 H22 K20 H20 L21 H21 K21

0.1uF 0.1uF 10uF

RXB1+

AA25

RXB0-

AA24

RXB0+ RXA2-

AD24

RXA2+

Y23

RXB2-

W24

RXB2+

U23 T24 T23

G10 GND_32 GND_33 VDDC_1

GND_34

VDDC_2

GND_35

VDDC_3

GND_36

VDDC_4

GND_37

VDDC_5

GND_38

VDDC_6

GND_39

VDDC_7

GND_40

VDDC_8

GND_41

VDDC_9

GND_42

VDDC_10

GND_43

VDDC_11

GND_44

VDDC_12

GND_45

VDDC_13

GND_46

VDDC_14

GND_47

AVDD2P5:172mA 0.1uF

W10 W12

AVDD25_PGA:13mA C1418

0.1uF

L413 120-ohm Main

C440 0.1uF Close to the Main IC AVDD_NODIE:7.362mA

C469

0.1uF

U19

L406 +3.3V 120-ohm Main

W15

B-TMBA0 B-TMBA1 B-TMBA2

C471 C427

AVDD33

0.1uF 10uF

C441 0.1uF

P7 R7

B-TMCK B-TMCKB B-TMCKE

Close to the Main IC L408 120-ohm Main

B-TMODT B-TMRASB B-TMCASB B-TMWEB

C473 C474 C475

AU33:31mA

1uF

C442 0.1uF

10uF 0.1uF

C476 C477

0.1uF 0.1uF

R456 1K READY

R453 1K

R447 1K READY

R439 1K READY

R455 1K READY

R457 1K

R454 1K READY

R448 1K

R440 1K

R463 1K

GND_57

AVDD2P5_ADC_2

GND_58

AVDD2P5_ADC_3

GND_59

AVDD25_REF

GND_60 GND_61

AVDD_MOD_1

GND_64

AVDD_MOD_2

GND_65 GND_67

AVDD25_PGA

GND_68

AVSS_PGA

GND_69 GND_70

W19

L409 120-ohm Main VDD33_T/VDDP/U3_VD33_2:47mA

B-TMDQSU B-TMDQSUB

VDD33_NAND

C479 C482 C483 C484

1uF 10uF 10uF 10uF

AVDD_DVI_USB_1

GND_73

AVDD_DVI_USB_2

GND_74

AVDD3P3_MPLL

GND_75

AVDD_DMPLL

GND_76 GND_77

C485

0.1uF

C453 0.1uF

GND_79 GND_80

AVDD_EAR33

GND_81 GND_82

VDDP_1

GND_83

VDDP_2

GND_84 GND_85

B-TMDQU0 B-TMDQU1 B-TMDQU2 B-TMDQU3 B-TMDQU4 B-TMDQU5 B-TMDQU6 B-TMDQU7

AVDD_LPLL_1

GND_86

AVDD_LPLL_2

GND_87 GND_88

VDDP_NAND

GND_91

J17 K15

C455 0.1uF

AVDD_DDR0_D_1

GND_92

AVDD_DDR0_D_2

GND_93

AVDD_DDR0_D_3

GND_94

AVDD_DDR0_C

GND_95 GND_96

K17 L17

+1.5V_DDR_IN

M17 L16

C486 C492

C467 1000pF

L412 120-ohm Main

C470 C488 C468 0.1uF 1uF 10uF Close to the Main IC

C493 C494 C497 C498

0.1uF 0.1uF 10uF 10uF

AVDD_DDR1_D_3

GND_99 GND_100 GND_102 GND_103 GND_104 GND_105

A23 B17 C23

C22 D14 D18 D19

E22 F8

F19

N22 N21 N20 M22 M21 M20 F10 V15 W16 V8 T18

MAIN

GND_98

GND_EFUSE

C19

GP4_S7LR

AVDD_DDR1_D_2

C11

C466 1000pF

GND_97

GND_101

B-MVREFCA

AVDD_DDR1_D_1

AVDD_DDR1_C

0.1uF 10uF

AVDD_DDR0:55mA AVDD_DDR1:55mA

GND_89 GND_90

K16

Close to the Main IC

GND_78

AVDD_AU33

V19

L15

B-TMDML B-TMDMU

GND_71 GND_72

Close to the Main IC

B-TMDQSL B-TMDQSLB

B-TMDQL0 B-TMDQL1 B-TMDQL2 B-TMDQL3 B-TMDQL4 B-TMDQL5 B-TMDQL6 B-TMDQL7

GND_62 GND_63

R19

F18

C465 0.1uF

AVDD2P5_ADC_1

T19

CLose to Saturn7M IC

R492 1K 1%

GND_56

DVDD_NODIE

B-TMRESETB

PWM0 C464 1000pF

GND_54

M19

R491 1K 1%

C463 0.1uF

DVDD_DDR

W18

A-MVREFCA

R484 1K 1%

GND_53

AVDD_NODIE

LED_RED

AVDD10_LAN

VCC_1.5V_DDR

PWM1

GND_52

AUD_MASTER_CLK

AVDDL_MOD

GND_66

F17

R483 1K 1%

GND_51

V18

E19

AUD_SCK

FB_CORE

AVDD25_LAN

+3.3V

VCC_1.5V_DDR

GND_50

Y17

E18

CLose to Saturn7M IC

AVDD1P0

W9 W11

C425 C439 0.1uF

GND_49

GND_55

E17

RXB1-

Y24

W14

AA23

RXBCK+

AA23

P10

Close to the Main IC

A-TMCK A-TMCKB A-TMCKE

T25 GPIO193

+1.10V_VDDC

0.1uF 0.1uF 0.1uF 10uF 10uF 10uF

LOW

HIGH 3D

R1401 1K READY

AE24 LVACKP

W23

AVDDLV_USB

SPI2_CK/GPIO203

U24

W25

RXB3+ RXBCK-

W25

SPI1_DI/GPIO202

AC23 AD23

RXB3-

V24

K12

SPI1_CK/GPIO201

AC24

AC22

RXB4+

V25

IC400 LGE2111A-T8

SAR3/GPIO34

AD25 AE23

RXB4-

U24

BUF1_FE_TS_DATA[0-7]

SAR2/GPIO33

+3.3V

LVB4N

Y23

U23

AB24

RXA0+

BUF1_FE_TS_DATA[0] BUF1_FE_TS_DATA[1] BUF1_FE_TS_DATA[2] BUF1_FE_TS_DATA[3] BUF1_FE_TS_DATA[4] BUF1_FE_TS_DATA[5] BUF1_FE_TS_DATA[6] BUF1_FE_TS_DATA[7]

DDR

MODEL_OPT_1

C458 0.1uF ET_NET

ARC AC25

RXA0-

AD23

GPIO195

RF_SWITCH_CTL

AB23

RXA1+

AC22

T25

SAR1/GPIO32

V23

LVB3P

T25 GPIO196

GPIO39

LVB3N

LVBCKN

GPIO193

LVA0N LVA1P

Y24

AE24 LVACKN

GPIO37 GPIO38

AA23

LVB4N LVACKP

LVA0P

LVB2N

SAR0/GPIO31

MODEL OPTION

AB25 GPIO36

LVB2P

GPIO74

+2.5V

16V

E6 F5

AB25

LVB1N

GPIO73

GPIO194

PWM4/GPIO70

MODEL_OPT_1

LVA0P

RXA1-

AC23

GND_48

SOC_RESET

GPIO36

I2C_SDAM0/GPIO54

GPIO193

L405 120-ohm Main

LVB1P

GPIO196

BUF1_FE_TS_CLK BUF1_FE_TS_VAL_ERR BUF1_FE_TS_SYN

AD15

AD16

HWRESET

IC400-*3 LGE2111A-T8 SPIL

LVB0N

I2C_SCKM0/GPIO53

CI_TS_DATA[0] CI_TS_DATA[1] CI_TS_DATA[2] CI_TS_DATA[3] CI_TS_DATA[4] CI_TS_DATA[5] CI_TS_DATA[6] CI_TS_DATA[7]

AC15 TS1CLK/GPIO98

IC400-*2 LGE2111A-TE SPIL

LVB0P

GPIO52

CI_TS_DATA[0-7]

MIUVDDC

C426 0.1uF ET_NET ARC0

RXACK+

AE23

AE24

AB6

ET_COL/LED0/GPIO55

IRIN/GPIO4

AC24

V23

GPIO51

SPI2_DI/GPIO204

B5 ET_TX_CLK/TN/GPIO59

AB4

GPIO50

SAR4/GPIO35

R25

C454 10uF

AC6

ET_TXD[1]/LED1/GPIO56

CVBSOUT1

R433

C431 4.7uF

A6 ET_RXD[1]/RN/GPIO63

LVA4N

LVBCKP

R24

CVBS2

LVA4P

GPIO49

LVACKN

CVBS0 CVBS1

GPIO46

LVACKP

EARPHONE_OUTR

AA8

LVA3N

RXA3RXA3+ RXACK-

AD25

LVB4N

AA6 EARPHONE_OUTL

LVA3P

GPIO45

RXA4+

AB24

AD5

AUVRP

LVA2N

GPIO42

LVB4P

PWM_PM/GPIO199

LED_RED

AUVRM AUVAG

GPIO41

LVB3P

VSYNC_LIKE/GPIO145

BIN2M

LVA2P

SPI_SCK /SPI_CS SPI_SDI SPI_SDO

CI_TS_CLK CI_TS_VAL CI_TS_SYNC

AA10

TS0SYNC/GPIO86

PCM2_CD_N/GPIO135

P21

RIN2P

BIN2P

GPIO40

USB1_CTL MODEL_OPT_3

R23

GIN2M

LVA1N

AC25

LVBCKN

HSYNC2

GIN2P

GPIO39

RXA4-

AB23

BIN1M

RIN2M

LVA1P

PCMWAIT_N/GPIO100

P23

AMP_MUTE C415 C416 C417 C418 C419 C420 C421

LVA0N

GPIO38

LVB3N

AA2

R420 R421 R422 R423 R424 R425 R426

LVA0P

GPIO37

ERROR_DET

AB1

AB25 GPIO36

/FLASH_WP

RF_SWITCH_CTL

SCART1_MUTE

A2 PM_SPI_SCK/GPIO1

PCMCE_N/GPIO115

100

MODEL_OPT_1

100

GPIO_PM[11]/GPIO17

TS1DATA_[2]/GPIO90

SCART1_Lout

AC19

PCMADR[6]/GPIO102

UART3_RX/GPIO48

I2C_SCL I2C_SDA

AC18

COMP1_DET

/PF_WP /PF_CE0 /PF_CE1 /PF_OE /PF_WE PF_ALE /F_RB

AD18

PCMADR[5]/GPIO101

AA9

NF_CEZ/GPIO137

AC17

Y14

R20

AUD_LRCK

I2S_OUT_WS/GPIO155

NF_WPZ/GPIO198

U21 V21

HOTPLUGD/GPIO22

NF_CE1Z/GPIO138

PCMDATA[7]/GPIO116

5V_DET_HDMI_3

PCM_RESET/GPIO129

22 EU R458 22 R459 EU

UART_TXD UART_RXD S7_TXD S7_RXD

1/16W AR401 22

AE18

PCMDATA[6]/GPIO117

AD21

+3.3V

DDCDD_DA/GPIO30

PCMDATA[5]/GPIO118

PCMADR[14]/GPIO106

AC20

5V_DET_HDMI_2

PCMDATA[4]/GPIO119

PCMIOWR_N/GPIO109

SOGIN1

R498 0 NON_EU

AA20

AD20

RXD2N DDCDD_CK/GPIO29

W22

5V_DET_HDMI_1

PCMDATA[3]/GPIO120

PCMREG_N/GPIO123

AUD_SCK AUD_MASTER_CLK AUD_LRCH

V20

AD22

/PCM_CE

C461 C462 0.1uF 0.1uF READY EU 16V 16V

PCMDATA[2]/GPIO128

W20

AB18

AA22

/PCM_IRQA

SUB_SDA SUB_SCL P_SCL

PCMDATA[1]/GPIO127

AB15

/PCM_WAIT I2S_IN_BCK/GPIO150

PCMDATA[0]/GPIO126

Y20

/PCM_OE /PCM_WE /PCM_IORD R476 /PCM_IOWR 10K

V2 V3

AE20

/PCM_REG

SOGIN0

SC1_ID SC1_FB SC1_R+/COMP1_Pr+

AB22

+5V

C401 C402 C403 C404 C405 C406 C407

P_SDA SPDIF_OUT

AA18

DDCDC_CK/GPIO27

CEC/GPIO5

5pF

X400 24MHz GND_1

R441 1M

AC12

RXC2N

AUL0

DSUB_HSYNC DSUB_VSYNC DSUB_R+

GND_2

R468 3.3K

RXC1P

F2 F3

R466 3.3K 22 100

RXC0P

HOTPLUGC/GPIO21

CK+_HDMI1 CK-_HDMI1 D0+_HDMI1 D0-_HDMI1 D1+_HDMI1 D1-_HDMI1 D2+_HDMI1 D2-_HDMI1 DDC_SDA_1 DDC_SCL_1 HPD1 CEC_REMOTE_S7

R461 R488

AC9 AC10

CK+_HDMI3 CK-_HDMI3 D0+_HDMI3 D0-_HDMI3 D1+_HDMI3 D1-_HDMI3 D2+_HDMI3 D2-_HDMI3 DDC_SDA_3 DDC_SCL_3 HPD3

X-TAL_2 C448

AC1

XOUT

SC_RE1

5pF

T23

XIN

T24

GPIO194 GPIO195

C447

GPIO193

+3.3V

AD1

U23

T25 GPIO196

W21

PCM_A[0] PCM_A[1] PCM_A[2] PCM_A[3] PCM_A[4] PCM_A[5] PCM_A[6] PCM_A[7] PCM_A[8] PCM_A[9] PCM_A[10] PCM_A[11] PCM_A[12] PCM_A[13] PCM_A[14]

HNIM

HOTPLUGA/GPIO19

IF_P_MSTAR

C460 100pF 50V HNIM

AC3

RXA0N

IC400 LGE2111A-T8

PCM_D[0-7]

READY HNIM C456 C459 100pF 100pF 50V 50V

V24

LVB2N

GPIO74

CK+_HDMI2 CK-_HDMI2 D0+_HDMI2 D0-_HDMI2 D1+_HDMI2 D1-_HDMI2 D2+_HDMI2 D2-_HDMI2 DDC_SDA_2 DDC_SCL_2 HPD2

AB25

LVDS

IC400 LGE2111A-T8

HNIM 0.1uF

R450 100 C451 HNIM

GND_1

GND_106

GND_2

GND_107

GND_3

GND_108

GND_4

GND_109

GND_5

GND_110

GND_6

GND_111

GND_7

GND_112

GND_8

GND_113

GND_9

GND_114

GND_10

GND_115

GND_11

GND_116

GND_12

GND_117

GND_13

GND_118

GND_14

GND_119

GND_15

GND_120

GND_16

GND_121

GND_17

GND_122

GND_18

GND_123

GND_19

GND_124

GND_20

GND_125

GND_21

GND_126

GND_22

GND_127

GND_23

GND_128

GND_24

GND_129

GND_25

GND_130

GND_26

GND_131

GND_27

GND_132

GND_28

GND_133

GND_29

GND_134

GND_30

GND_135

GND_31

GND_136

G11 G12 G13 G14 G17 G18 G19 G24 H11 H12 H13 H14 H15 H16 H17 H18 H19 J9 J10 J11 J12 J13 J14 J15 J16 J18 J19 J25 K9 K13 K14 H10 K18 K19 K22 L8 L9 J8 L12 L13 L18 L19 M8 K8 M10 M11 L14 M15 M16 M18 M25 N10 N11 N13 N14 N15 N16 N17 N19 K7 P8 P9 M9 P11 P13 P16 P17 P18 P12 R8 R9 R11 R12 R13 R17 T8 T9 N7 T11 T12 T13 T14 T15 T16 T17 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 R18 V9 V10 V11 V12 V14 V17 T7 E8

2011-10-20 4

LGE Internal Use Only

0.1uF

C528

0.1uF

C530

0.1uF

C531

0.1uF

C532

VDD_3

A11

VDD_4

A12/BC

VDD_5

0.1uF

C533

VDDQ_2

C1 C9 D2 F1 H2 M8 A0

VREFCA

A1 A2

VREFDQ

VDDQ_3

VDDQ_4

CKE

VDDQ_6

VDDQ_7

ODT

VDDQ_8

RAS

VDDQ_9

CAS

VDD_2 VDD_3 VDD_4

A13

VDD_5

A15

VDD_7

BA0

VDD_8

VDD_9

NC_2

BA1

BA2

A1 VDDQ_1

J7 CK

K7 K9

VDDQ_3 VDDQ_4

C1 C9

VDDQ_7 VDDQ_8

CAS

VDDQ_9

WE RESET

NC_2

DQSL

NC_6

J9 L1

NC_3

NC_4

A-TMA14

DQSL C7 DQSU

VSS_1

DQSU

VSS_2

DML

NC_6

E3 DQL0

F7 F2

VSS_8 VSS_9

DQL3

H3 H8 G2

VSS_11 VSS_12

DQU2

C2 A7 A2

VSSQ_5 VSSQ_6

DQU5

B8 A3

B9 D1

VSS_1

VSSQ_8 VSSQ_9

E8 F9

VSSQ_7

DQU6 DQU7

VSS_2

VSSQ_4

DQU3 DQU4

J2 SS_1G_1600

IC501-*2 K4B1G1646G-BCK0

P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3

A1 A2 A4 A5

L8 ZQ

A6 A8

B2 VDD_1

A9 A10/AP

VDD_2

A11

VDD_3 VDD_4

A12/BC

VDD_5 VDD_6

NC_5

VDD_7

BA0

VDD_9

VDD_8

M2 M3

BA2

J3 K3 L3

VDDQ_2

VDDQ_3

CKE

VDDQ_4

VDDQ_6

VDDQ_5 ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

T1 T9

C9 D2

DMU

VSS_7

DQL0

VSS_8

DQL1

VSS_9

DQL2

VSS_11

A8 C1

DML

VSS_5

VSS_10

R1 R9

VSS_12

E9 F1

RESET

NC_2 NC_3 NC_4

F3 DQSL

VSS_1 VSS_2 VSS_4

VSS_3

DMU

VSS_5

DQL0

VSS_7

VSS_6

E3 F7 F2 F8 H3 H8 G2 H7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

A7 A2 B8 A3

DQL5

A-TMRASB

A-TMCASB

VSSQ_2

P1 P9

T1 T9

VSSQ_5 VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9 D1 D8 E2 E8

F9 G1 G9

E8 F9 G1 G9

R537

A-TMWEB

R506 10K

12 13

14 RXA2RXA2+

A-TMDQSL

A-TMDQSLB 22 23

A-TMDQSU

A-TMDQSUB

DQU0 DQU1 DQU2 DQU3

VSSQ_6

DQU4

VSSQ_7

DQU5

VSSQ_8

DQU6

A-TMDML

A-TMDMU

A-TMDQL0

240 1%

C502 C500 0.1uF 1000pF C506

10uF

C507

0.1uF

C509

0.1uF

C510

0.1uF

C511

0.1uF

C512

C508

0.1uF

C513

0.1uF

C514

0.1uF

C515

0.1uF

A8 VDD_1

VDD_2

A10/AP

VDD_3

A11

VDD_4

A12/BC

VDD_5

A13

VDD_6 VDD_7 VDD_9

RXACKRXACK+ RXA3RXA3+ RXA4RXA4+

N2 P8

A-TMDQL1 A-TMDQL2

A-TMDQL3

P2 R8 R2 T8 R3 L7 R7 N7 T3

A-TMDQL4

A-TMDQL5

N8 M3

A-TMDQL6

A-TMDQL7

VDD_4 VDD_5 VDD_7

BA0

VDD_9

VDD_6 VDD_8

IC500-*1 H5TQ1G63DFR-PBC N3

N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3

VREFCA

A2 A3

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4 VDD_5 VDD_6 VDD_7 VDD_8

BA0

K3 L3

VDDQ_2

VDDQ_3

CKE

VDDQ_4 VDDQ_5

L2 K1 J3

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

C1 C9 D2 E9 F1 H2

RESET

NC_2 NC_3 NC_4

F3 DQSL

F8 H3 H8 G2

VSS_2 VSS_3 VSS_4 VSS_5 VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

C8 C2 A7 A2 B8 A3

VSS_12

B3 E1 G8 J2

J8 M1 M9 P1 P9

T1 T9

DQL6 DQL7

B1 VSSQ_1

D7 C3

A9 VSS_1

DQSU DML DMU E3 F7 F2

DQU0 DQU1 DQU2

VSSQ_2 VSSQ_3 VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9 D1 D8

B-TMA14

E2 E8

P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7

VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

A1 A2

H1 VREFDQ

A5 ZQ

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4 VDD_5 VDD_7

BA0

VDD_9

VDD_6 VDD_8

J3 K3

VDDQ_2 VDDQ_3

CKE

VDDQ_4

VDDQ_6

VDDQ_5 ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

R1 R9

A8 C1 C9 D2

E9 F1 H2 H9

J1 NC_1

T2 RESET

NC_2 NC_3 NC_4

F3 G3

K2 K8 N1 N9

A1 VDDQ_1

CK CK

D9 G7

BA1 BA2

A6 A7

J7 K7

A13 NC_5 M2 N8

DQSL

J9 L1 L9 T7

NC_6

DQSL C7 B7

A9 DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3

E7 D3

DMU

VSS_5 VSS_6

E3 F7 F2 F8 H3 H8 G2 H7

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

C3 C8 A7 A2 B8 A3

RAS

VDDQ_9

CAS

B3 E1

G8 J2 J8 M1 M9

P1 P9

VSS_12

A-TMDQU1

DQU0 DQU1

VSSQ_2 VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

F7 F2 F8

G2 H7

C8 C2 A7 A2 B8

VDD_4 VDD_5 VDD_7

BA0

VDD_9

VDD_6 VDD_8

K7 K9

VSS_1

DQSU

VSS_2

DQSU

VDDQ_2 VDDQ_3

CKE L2 K1 J3

VDDQ_4 VDDQ_5

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

VSS_3

RESET

NC_2

NC_3

L9 T7

VSS_5 VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

NC_4 DQSL

A8 C1 C9 D2

E9 F1 H2 H9

J9 L1 L9

NC_6

A9 DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

E1 G8

VSS_3 DMU

VSS_5

VSS_6

M1 M9

F2 F8

P9 T1

H8 G2

DQL6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

+1.5V_DDR_IN

D8 E2

A7 A2

F9 G1

M1 M9 P1 P9 T1 T9

DMU

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9 D1

F9 G1 G9

32 31 30

/PF_WP

PCM_A[5]

I/O4

PCM_A[4]

NC_25 NC_24 C554 10uF

NC_23 VCC_2 VSS_2

C555 0.1uF

NC_22 NC_21 NC_20

AR519 22

I/O3

PCM_A[3] IC504-*1 K9F1G08U0D-SCB0

I/O2

SS NC_1

PCM_A[2]

NC_2 NC_3

I/O1

PCM_A[1]

NC_4 NC_5 NC_6

R558 0

NC_11

NC_12

R567 1K

NC_14

I/O0

R/B

PCM_A[0]

NC_19

NC_7 NC_8 VCC_1 VSS_1

NC_18

NC_9 NC_10

NC_17

ALE WE WP

NC_15

NC_16

NC_11 NC_12 NC_13 NC_14 NC_15

NC_29 NC_28 NC_27 NC_26 I/O7 I/O6 I/O5 I/O4 NC_25 NC_24 NC_23 VCC_2 VSS_2 NC_22 NC_21 NC_20 I/O3 I/O2 I/O1 I/O0 NC_19 NC_18 NC_17 NC_16

31 32 33 34

47 48

B-TMA1

B-TMA2

B-TMA3

B-TMA4

B-TMA5

B-TMA6

B-TMA7

B-TMA8

B-TMA9

IC505-*1 MX25L8006EM2I-12G

FHD

MX CS#

RXA0RXA0+

RXA1-

RXA1+

RXA2-

RXA2+

SO/SIO1

R569 4.7K READY

/SPI_CS 1

DO[IO1]

HOLD#

SPI_SDO WP#

GND

R561 0

SI/SIO0

%WP[IO2]

GND

47 RXACK-

RXACK+

RXA3-

RXA3+

RXA4-

RXA4+

C556 0.1uF

VCC

HOLD[IO3]

SCLK

/FLASH_WP

VCC

CLK SPI_SCK R575 DI[IO0] 33 SPI_SDI

55 56

RXB0-

RXB0+

RXB1-

RXB1+

B-TMA10

B-TMA11

B-TMA12

B-TMA13

B-TMBA0

B-TMBA1 B-TMBA2

RXB2-

RXB2+

B-TMCKB

RXBCK+

RXB3-

RXB3+

RXB4-

RXB4+

VSS

C542 0.01uF 50V

75 76 77

B-TMODT B-TMRASB

B-TMCASB

B-TMWEB

C552 0.1uF

VCC

IC503 AT24C256C-SSHL-T

SCL

SDA

72 74

B-TMCKE

Renesas_IC503 A0 1

VCC

R510 56 1%

R508 56 1%

IC503-*1 R1EX24256BSAS0A

RXBCK-

+3.3V

A0’h

EEPROM 1MBit

J7 K9

R564 10K

+3.3V_ST

IC505 W25Q80BVSSIG

B-TMA0

+3.3V_ST +3.3V_ST

A-TMDQU5

SERIAL FLASH 8MBit

RXBCKRXBCK+ RXB3RXB3+ RXB4RXB4+

A-TMDQU7

VCC_1.5V_DDR

SCL

R573 22

SDA

R574 22

I2C_SCL

P_SDA GND

DISP_EN

P_SCL PC_SER_DATA

PC_SER_CLK

I2C_SDA

R507 10K

B-TMRESETB

B-TMDQSL

B-TMDQSLB

B-TMDQSU

B-TMDQSUB

SS_2G_1333

B-TMDML

B-TMDMU

R8 R2 T8 R3 L7 R7 N7 T3

VSS_7 VSS_8

E3 DQL0 DQL1

VSS_9

DQL2

VSS_10

DQL3

VSS_11

DQL4 DQL5

VSSQ_2

DQU0

VSSQ_3

DQU1

VSSQ_4

DQU2

VSSQ_5

DQU3

VSSQ_6

DQU4

VSSQ_7

DQU5

VSSQ_8

DQU6

VSSQ_9

DQU7

A2 A3

H1 VREFDQ

B-TMDQL0

VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8

BA0

B-TMDQL1

K1 J3 K3 L3

B-TMDQL2

B-TMDQL3

B-TMDQL4

VDDQ_2

VDDQ_3 VDDQ_4 VDDQ_5

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

RESET

K1 J3

NC_2 NC_3

DQSU DQSU

B-TMDQL5

F8 H3 H8 G2 H7

VSS_6 VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

C8 C2

B-TMDQL7

B-TMDQU0

B-TMDQU1

B-TMDQU2

B-TMDQU3

B-TMDQU4

B-TMDQU5

B-TMDQU6

B-TMDQU7

A2 B8 A3

DQU1 DQU2

D9 G7 K2 K8 N1 N9

+3.3V

R1 R9

A1 VDDQ_1

VDDQ_2

VDDQ_3

CKE

VDDQ_4 VDDQ_5

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

NC_2 NC_3 NC_4

DQSL

A8 C1 C9 D2 E9 F1 H2 H9 J1

NC_1 RESET

C7 B7 E7 D3

F7 F2

J9 L1 L9 T7

NC_6

P9 T1

F8 H3 H8

VSSQ_3 VSSQ_4

DQU3

VSSQ_5 VSSQ_6 VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9 D1 D8

VSS_2 VSS_3 VSS_4 VSS_5 VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

C3 C8

C2 A7 A2

IC502 CAT24C08WI-GT3-H-RECV(TV)

E1 G8 J2 J8 M1 M9

R563 4.7K

P1 P9 T1 T9

DQL6 DQL7 DQU0 DQU1

VSSQ_2 VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4 DQU5

NC_1

NC_2

B1 VSSQ_1

E8 F9

A9 VSS_1

DML DMU

M9 P1

DQSU DQSU

E1 G8 J2 J8

VSSQ_2

DQU4 DQU5

VDD_8

A9 B3

B1 VSSQ_1

DQU0

VDD_9

BA1

DQL6

D7 C3

DQL7

B-TMDQL6

BA0

VDD_6

DQSL

VSS_4 VSS_5

DQL0

VDD_5 VDD_7

VSS_2

DML DMU

E3 F7 F2

VSS_1 VSS_3

E7 D3

L8 ZQ

VDD_1 VDD_2 VDD_3 VDD_4

A13 NC_5

L9 T7

NC_6

DQSL C7 B7

A9 A10/AP A11 A12/BC

F1 H2

NC_4 DQSL

K7 K9

H1 VREFDQ

A5 A6 A7 A8

C1 C9 E9

A2 A3

BA2

J1 NC_1

VREFCA

M2 N8 M3

VDDQ_1 CK

M8 A0 A1

CKE

L7 R7

K8 N1 N9 R1

VDD_9

D9 G7 K2

BA1

T8 VDD_1 VDD_2

A11 A12/BC

J7 K7 K9

A7 A8 A10/AP

N2 P8

A4 A6

N3 P7

BA2

DQL7 VSSQ_1

VREFCA

A13 M7

IC500-*4 K4B2G1646C M8

A0 A1

Addr:10101--

HDCP EEPROM 8KBit

SS_1G_1333

IC500-*3 K4B1G1646G-BCH9 N3

DQL6

C545 0.1uF 16V

PCM_A[6]

I/O5

RXB2RXB2+

A-TMDQU6

VSS_6

C544 10uF 10V

/PF_WE

NC_13

E2 E8

NC_5

E8 L500 500 Main

I/O6

DML

VSS_5

PCM_A[7]

VSS_4

VCC_1.5V_DDR

ALE PF_ALE

AR518 22

I/O7

B1 VSSQ_1

B3 E1 G8 J2

VSS_3

CLE

DQL6 DQL7

B1 VSSQ_1

DQU0 DQU1 DQU2 DQU3

RXB0RXB0+ RXB1RXB1+

J1 NC_1

K8 N1

DQSL

VSS_2 VSS_4

NC_10

/PF_CE1

R556 3.3K

N9 R1

A1 VDDQ_1

CK CK

D2 E9 F1

D9 G7 K2

A-TMDQU4

F3 DQSL

6 7

PCM_A[0-7] NC_26

BA1

A8 C1 C9

32 B2

VDD_2 VDD_3

A12/BC

M2 N8

NC_6

VSS_1

DQSU DML

DQL7

NC_4

NC_9

L8 ZQ

VDD_1

A9 A10/AP A11

J1 NC_1 NC_2 NC_4

DQSL

DQSU

A-TMDQU2

RESET

B1 VSSQ_1

VSS_1

NC_27

NC_3

VSS_12

T1 T9

VCC_1

H1 VREFDQ

A5 A6 A7 A8

R1 R9

DQSL

A-TMDQU3

WE NC_1

DQL6 DQL7

VDDQ_8

NC_6

NC_8

A1 A2 A3

DQSL

VREFCA

ODT

IC500-*2 K4B1G1646G-BCK0

VDDQ_7

NC_2

NC_7 R566 1K READY C550 0.1uF

VDDQ_6

N3 A0

VDDQ_5

SS_1G_1600

CKE

L1 L9 T7

NC_6

DQSU

E7 D3

VDDQ_4

DQSL C7 B7

VDDQ_3

CE /PF_CE0

CLE

B-TMCK BA0

VDDQ_1

J1 NC_1

K8 N1 N9 R1

A1 VDDQ_1

J7 K7

D9 G7 K2

VDD_9

BA1 BA2

A7 A8

A13 A15 M2 N8

H1 VREFDQ

A4 A5

C9 M8

A0 A1

/PF_OE

A13 NC_5

A1 VDDQ_1

CK CK

VREFCA

BA2

NC_3

R7 N7

M8 A0

N1 N9

RESET

R3 L7

D9 G7 K2

BA1

A-TMDQU0

R2 T8 B2

VDD_1 VDD_2 VDD_3

A12/BC

L8 ZQ

A8 A9 A10/AP A11

CKE

P8 P2

A5 A6 A7

BA2

H1 VREFDQ

L2 K1

A13 NC_5

J7 K7 K9

VREFCA

M8 A0

27 28

SS_2G_1333

N3 P7 P3

BA2 VDDQ_2

BA1

NC_6 R/B

NC_5

VDD_8

A1 Hynix_1G_1600

A6 A7

A3 A4

R504

A0 A1

R501 1K 1%

R568 4.7K

NC_28

IC501-*4 K4B2G1646C

IC501-*3 K4B1G1646G-BCH9

DQU7

VREFDQ

R565 1K

4 /F_RB

C520 10pF 50V

C522 10pF R520 50V 100READY C523 10pF 50V READY

NC_5

DMU

VSSQ_5

NC_4

NC_29

VCC_1.5V_DDR

B-MVREFDQ

SUB_SDA

R539 4.7K R519 100

R514 22

NC_3

NC_2

C547 0.1uF 16V

A-TMRESETB

VSSQ_4

VREFCA

A2 MMBD6100 D500*-1

RXA0RXA0+ RXA1RXA1+

B-MVREFCA

SUB_SCL

UART_RXD UART_TXD

IC500 H5TQ1G63DFR-H9C

R500 1K 1%

R577 4.7K

R536

VSSQ_3

VSSQ_9

R513 4.7K

VCC_1.5V_DDR

VSSQ_1

J2 J8 M1 M9

READY 0 0

B1 VSSQ_2 VSSQ_3 VSSQ_4

DQU3 DQU4

A-TMODT

DQL7

B3 E1 G8

VSS_12

VSSQ_1 DQU0 DQU1 DQU2

DQL5 DQL6

J9 L1

DQL6 DQL7

D7 C3 C8 C2

DQL4

A9 DQSU DQSU DML

DQL3

NC_6

DQSL C7

R576

+3.3V_ST

C534 220pF 50V

+3.3V

VSS_4

J1 NC_1

K2 K8 N1 N9

A1 VDDQ_1

L2 K1

D9 G7

BA1

J7 K7

A13

H1 VREFDQ

A-TMCKE

SS_1G_1333

VREFCA

DQSU

VSS_6

M1 M8

DQSU

VSS_3

C543 0.01uF 50V

B1 VSSQ_2 VSSQ_3

LED_RED

47K R578

F3 DQSL

T1 T9

VSSQ_1 DQU0 DQU1

DQL7 D7 C3

R511 56 1%

VSS_10

DQL4 DQL5

R509 56 1%

P1 P9

DQL6

+3.3V_ST

E Q500 MMBT3904(NXP)

C535 220pF 50V

R538 4.7K

VSS_7

DQL1 DQL2

A-TMBA2

VSS_5 VSS_6

DQSL

VSS_4

DMU

A-TMBA1

RESET

NC_4

VSS_3

E7 D3

A-TMCK A-TMCKB

A-TMBA0

J1 NC_1

F1 H2 H9

R516 100 KEY2

P503 TF05-51S

NC_3

VDDQ_6

ODT RAS

P500 104060-8017

VDDQ_5

L2 K1 J3 K3

VDDQ_2

CK CKE

A-TMA13

NC_1

VDD_6

M7 M2

G7 K2 K8

A-TMA12

B2 VDD_1

A10/AP A11 A12/BC

R542 10K R517 100

KEY1

C B

2K R579

A8 A9

L7 R7

A-TMA11

T8 R3

N7 T3

9 10

D500 KDS184

A-TMA10

VDDQ_5

A-TMA9

LD500

VDDQ_1

IC501-*1 H5TQ1G63DFR-PBC

BA2

Hynix_1G_1600

A-TMA8

BA0 BA1

0.1uF

NC_5

VDD_8 VDD_9

A-TMA7

A13

VDD_6 VDD_7

A-TMA6

C517 10pF 50V R540 10K

NC_1

ZD501

A10/AP

A-TMA5

IC504 H27U1G8F2BTR-BC

10V

0.1uF

C527

VDD_2

A-TMA4

NAND Flash 1GBit

+3.3V

R515 4.7K R518 100

+3.3V_ST

5.48VTO5.76V ZD505 ZD504

C526

VDD_1

ZD503

A-TMA3

ZD507 ZD506

0.1uF

A-TMA2

5.48VTO5.76V

10uF

USA

A-TMA1

ZD502 5.48VTO5.76V 5.48VTO5.76V 5.48VTO5.76V 5.48VTO5.76V 5.48VTO5.76V

B2 C524

P501 12507WS-08L

ZD500

C525

C529

+3.3V_ST

5.48VTO5.76V

Key/IR

240 1%

C503 C501 0.1uF 1000pF

A3 A4

R505

+5V

A-TMA0

A2 VREFDQ

R503 1K 1%

A0 A1

+5V

R512 4.7K

VREFCA

A-MVREFDQ

LVDS

A-MVREFCA

R502 1K 1%

MULTI

DDR3 Memory 1GBit x 2

IC501 H5TQ1G63DFR-H9C VCC_1.5V_DDR

VSSQ_6 VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

VCC

SCL

R571 22

SDA

R572 22

B9 D1 D8 E2 E8 F9 G1 G9

A2 3 VSS

READY

R570 4.7K I2C_SCL I2C_SDA

* LCI: LVDS Connection Indicator

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2012 LG Electronics Inc. All rights reserved. Only for training and service purposes

GP4_S7LR Memory.LVDS,IR

2011-10-20 5

LGE Internal Use Only

P600 SMAW200-H18S1

C626 3300pF 50V

VIN 3

GND

VOUT

C604-*1 1uF 10V

C601 0.1uF 16V

VIN

MULTI

C605 10uF 6.3V

C604 1uF 6.3V

GND

VOUT

IC602 AP1117EG-13 FNIM

L613 120-ohm 2A DVB_T2

IN R612 1 C612 10uF 6.3V

L604 120-ohm 2A

INPUT

OUT

C671 10uF 10V DVB_T2

C682 0.1uF 16V DVB_T2

C617 10uF 6.3V FNIM

ADJ/GND

OUTPUT

ADJ/GND

R618 240 FNIM

C627 10uF 6.3V

R620 1 FNIM

R648 120K

+5V

GND_2

GND_3

GND_4

GND_5

IC605 TPS65253RHDR

DCON_EN

L606 CIS21J121

EN2

RLIM2

PGOOD

R630 3K 1% R631 390K 1% R621 1 C631 10uF 6.3V

Vout=1.25*(1+R2/R1)

Audio AMP

VIN2

LX2_2

LX2_1

LX1_2

LX1_1

VIN1

C609 3300pF READY

R2 R656 47K 1% C656 22uF 16V

C651 22uF 16V

L607 NR5040T3R3N

C666 0.022uF 16V

R657 43K 1%

+1.5V_DDR_IN

R1 L608 NR5040T3R3N +1.10V_VDDC C683 22uF 16V C653 10uF 25V

C654 10uF 25V

C652 0.047uF 25V

C657 22uF 16V

R653 4.3K 1%

C661 0.022uF 16V

R654 51K 1%

R655 100K 1%

R658 0 READY

FB_CORE

+1.8V_TU

C625 10uF 6.3V FNIM

Vout=1.25*(1+R2/R1)

+3.3V

SS2

[EP]GND

IC604 R2 AZ1117BH-ADJTRE1

C645

IC600 AP2121N-3.3TRE1

+1.25V_TU

+3.3V

+3.3V_TU

+3.3V

220 100 R614 R613 5% 5%

IC601 TJ3940S-2.5V-3L

+3.3V_ST

3.3V_TU /1.8V_TU

R615 1 FNIM

+5V_ST

+2.5V_TU

+2.5V

+3.3V

C600 10uF 10V

1.25V_TU

2.5V Multi/2.5_TU

CMP2

GND_1

Vout=0.765*(1+R1/R2)

3.3Vst

FB2

BST2

R622 0

V3V

BST1

C630 0.1uF 16V

C629 10uF 16V

DCON_EN

C650 10uF 16V

GND

EN1

C624 1uF 10V

R649 33K

R2 R619 17.4K 1%

R670 4.7 READY C655 0.047uF 25V

RLIM1

READY

L605 NR5040T2R2N 2.2uH

C628 4700pF 50V

R647 100K

0.01uF

C649

C632 4.7uF 10V

+3.3V VBST

VREG5

SS1

C623 22pF 50V

100pF READY

C607 0.1uF 16V

C648

VFB

C634 10uF 16V

LOW_P

R1 R617 59K 1%

AC_DET

C603 0.1uF 16V READY

+5V_ST

R650 33K R634 56K

VIN

5V_ON

C610 0.1uF 16V

CMP1

C608 10uF 10V

V7V

ERROR_DET

R609 100

C606 0.1uF 16V

R639 3300pF 10K

THERMAL 29

C636

FB1

RL_ON

IC603 TPS54327DDAR [EP]GND

R661 10K

0.01uF READY 100pF

ROSC

R600 10K

+5V L600 120

C621 0.1uF 50V

C620 10uF 25V

R635 3300pF 10K

C613 10uF 25V READY

C642 C641

P_17V

THERMAL

1 5 +3.3V_ST

C602 0.1uF 16V READY

+3.3V Multi

P_17V

1.5V DDR / 1.24V Core

DCON_EN

Power Wafer

R662 56K

C611 3300pF 50V READY R666 4.7 READY

Vout=0.8*(1+R1/R2)

EMI GND R608 0

R628 10K READY C

READY

VDD_DIG_1 GND_DIG_1

AC_DET 22 R638

R625

PWRDN

2.2

VDD_PLL R629 2K

C633 0.1uF 16V R626 0 AUD_MASTER_CLK

READY AUD_SCK READY AUD_LRCK READY AUD_LRCH READY

C637 4700pF 50V

C647 680pF 50V

FILTER_PLL GND_PLL

C635 22pF 50V C639 22pF 50V C640 22pF 50V C644 22pF 50V

22 R640

XTI

22 R641

BICKI

22 R642

LRCKI

22 R643

SDI

AMP_RESET_N 22 R644 R623

RESET INT_LINE

R646 22

SDA

AMP_SDA R624

2K AMP_SCL

SCL R633 10K C638 0.1uF 50V

GND_DIG_2 C646 0.1uF 50V

VDD_DIG_2

27Close-by

Close-by 10

Close-by 31

33 34

THERMAL

R645 22

4 3

36 Close-by

OUT3A/FFX3A

R605 0

EMI_GND1

OUT3B/FFX3B R606 0

CONFIG C660 0.1uF 50V

VDD

R604 0

GND_REG OUT1A GND1

L609 10.0uH

C662 1uF C663

VCC1

25V C669 0.1uF 50V 330pF 50V

C672 0.22uF 50V

L610 10.0uH

C674 0.22uF 50V

C678 1000pF 50V

C675 0.22uF 50V

C679 1000pF 50V

OUT1B OUT2A

C664 1uF C665

C670 25V 330pF

0.1uF 50V

VCC2

L612 10.0uH

GND2 P_17V

OUT2B VCC_REG

L611 10.0uH

50V

C659 0.1uF 50V

C667 0.1uF 50V

C673 0.22uF 50V

C676 0.22uF 50V

C680 1000pF 50V

C677 0.22uF 50V

C681 1000pF 50V

EMI_GND2

R602 0

SMAW250-H04R P601

C643 0.1uF 50V

R686 39

TWARN/OUT4A

R688 39

EAPD/OUT4B

39 R685

Q600 MMBT3904(NXP) E READY R637 0

39 R687

READY

R627 10K AMP_MUTE

R607 0

R636 0

R601 0

EMI_GND3

R603 0

EMI_GND4 GND

C668 68uF 35V

VSS TEST_MODE SA GND_SUB

[EP]GND

STA368BWG IC606

GP4_S7LR Power,AMP

2011-04-01 6 LGE Internal Use Only

8Pin Wafer to Main +3.3V_ST

P1 12507WS-08L

IR Receiver

+3.3V_ST

IR OPT R13 2K

IC2 ZD3-*1 5.48VTO5.76V

KSM-903SMR1CL

R14 2.7K

ZD1-*1 5.48VTO5.76V

IC1 CM3231A3OG

KEY1

R1 47

VOUT

OPT R3 4.7K

VDD

Green Eye Sensor

+3.3V_ST

EYE_SDA

SDAT

LED_R

EYE_SCL

ZD3 5.6B

GND

ZD1 5.6B R2 330

VCC

+3.3V_ST

OPT

EYE_SCL

C2 10uF 6.3V

C1 0.1uF 16V

ZD6 5.6B

ZD2 5.6B

ZD7 5.6B

C3 10uF 6.3V

C4 0.1uF 16V

EYE_SDA 8

+3.3V_ST ZD6-*1 5.48VTO5.76V

JTP1283

ZD5-*1 5.48VTO5.76V

ZD4-*1 5.48VTO5.76V

ZD2-*1 5.48VTO5.76V

ZD5 5.6B

ZD4 5.6B

ZD7-*1 5.48VTO5.76V

JTP1283

KEY2 5

SCLK

GND

SW1-*1

SW2-*1

SW3-*1

SW4-*1

SW5-*1

SW6-*1

3 2

RED LED 3

Tact Switch SW7-*1

SW8-*1

+3.3V_ST

KEY2 R15 10K KEY1 R5 27K JTP1289

R6 3.9K

JTP1289

R7 10K

JTP1289

R8 27K

JTP1289

R9 620 JTP1289

R10 3.9K

JTP1289

R11 10K

JTP1289

R12 620

JTP1289

LED_R OPT C5 0.1uF 16V

ZD8 5.6B

OPT C6 0.1uF 16V

SW1

SW2

SW3

SW4

SW5

SW6

SW7

R4 4.7K

SW8

ZD9 5.6B

Q1 MMBT3904(NXP)

LTST-C191KRKT LD1 EAV60793101

E OPT C7 10uF 6.3V

ZD8-*1 5.48VTO5.76V

ZD9-*1 5.48VTO5.76V

Power

Input

Home

2.4V

0.93V

1.65V

Vol-

Vol+

CH-

CH+

2.4V

0.2V

0.93V

1.65V

0.2V

(KEY1) (KEY1) (KEY2)(KEY2)

(KEY2) (KEY2) (KEY1) (KEY1)

EAX64342101 Tact/IR/Eye

12/04/2011 1

1 LGE Internal Use Only

GP2R, LM1 Training Manual

Table of contents 1. PCB layout. 2. GP2R vs LM1 3. GP2R. (Block, Power, I2C) 4. LM1. (Block, Power, I2C) 5. LM1 SOC Power sequence. 6. Memory test. 7. Pen touch overview.

LGE Internal Use Only

1. PCB Layout.

GP2R (206 x 183)

LM1 (206 x 141.5)

※ LM1 use internal EDID&HDCP. (LM1 is Removing the EEPROM for EDID&HDCP) LM1 is optimizing Power block. (LM1 is reducing DC/DC, LDO, power application)

LGE Internal Use Only

2. GP2R vs GP4 LM1. Difference

GP2R 50PZ550

LM1 50PA6500

PDP Module

R3(FHD)

R4(FHD)

New module. 50R4 Initial model.

Tool

PZ Tool

PA Tool

12’ years New tool.

PCB

206x183

206x141.5

Main IC

S7R

S7LR

Jack Layout

Slim Depth

Sub Assy

PZ Tool

PA Tool

GP2R 15pin, LM1 8pin

PSU

50R3 XP5 B’d

50R4 UP1 B’d

Reduce power on time.

GP2R

LM1

PDP only code.

JIG

GP2R

LM1

Support DFT JIG.

Power Wafer

18P

Stand by 3.5V

Stand by 3.5V .

12V_secondary

Not use 12V.

IR Wafer

15P

LM1 not support 3D.

USB

SIDE USB.

Memory

DDR3

VSC

Changes

change PCB Size. (smaller than GP2R.) Internal sub-Micom .(PM block)

Same.

Develop new WAFER and CABLE. (12 years) Stand by 0.3W ↓

DDR3 1Gbit . 2ea LGE Internal Use Only

3. GP2R Power measure Summary Power Line

Voltage Spec [V]

Voltage [V]

+5V_ST

4.845~5.355

+5V_ST_EN

Ripple [mV]

Current [A]

5.01

0.009

4.845~5.355

5.00

0.710

+3.3V_AVDD

3.14~3.6

3.31

0.285

+2.5V_AVDD

2.38~2.62

2.53

0.200

+1.5V_DDR_IN

1.425~1.575

1.57

0.310

+1.26V_VDDC

1.2~1.32

1.27

0.770

+3.3V_ST

3.234~3.366

3.30

0.024

+17V

16.15~17.85

17.03

1.09A

1.420

+5V_TU

4.75~5.25

4.99

0.170

+5V

4.845~5.355

5.03

2.600

+3.3V_TU

3.15~3.46

3.26

None

0.320

+1.2V_TU

1.20~1.32

1.27

None

0.300

Ripple spec [Vpp]

0.5

1.5V +/-5%

0.5

None

Remark

LGE Internal Use Only

3-1. GP2R Power Block Diagram 5Vst

L603 MAX 3A

IC205 AT24C02BN RGB EDID

+5V_ST C619 100u 16V

C627 0.1u 16V

C219 0.1u 16V

C654 22u 16V

+5V_ST_EN Q600 C657 RTR030P02 C656

C655 0.01u 25V

100u 16V

0.1u 16V

IC600 AZ1085S 3.3V

C600 0.1u 16V

C607 22u 6.3V

C608 0.1u 16V

L602 2A

+3.3V_AVDD 2A/3ea

C615 0.1u 16V

S7_3.3V_AVDD

10u 2ea

0.1u 13ea

NAND Flash/HDCP/EEPROM

+2.5V_AVDD 2A 2A/2ea

IC604 TJ3964 C616

C623 0.1u 16V

22u 6.3V

C609 10u 16V

C611 0.1u 16V

IC602 TPA54319

10u 1ea

+1.5V_DDR_IN C637 10u 10V

C647 10u 10V

C650 0.1u 16V

2A/2ea

C610 10u 16V

C612 0.1u 16V

IC603 TPA54319

2.5V_AVDD 0.1u 4ea

10u 2ea

0.1u 32ea

10u 4ea

0.1u 10ea

DDR

S7 AVDD_DDR

+1.26V_VDDC C651 10u 10V

C652 10u 10V

C653 0.1u 16V

2A/2ea

10u 2ea

0.1u 2ea

10u 1ea

0.1u 8ea

DVDD VDDC IC203 MAX3232CDR

IC601 AP2121N 300mA

C601 0.1u 16V

+3.3V_ST C605 100u 16V

S7_MPLL

C606 0.1u 16V C552 0.1u 16V

+17V

17V

C634 4.7u 50V

C341 68u 35V

C635 4.7u 50V

C344 68u 35V

C636 0.01u 50V

C340 0.1u 50V

IC605 TPA54319

+5V_TU C641 10u 16V

C642 10u 16V

L610 2A

C304 22u 10V

IC503(S-FLASH) MX25L8005M2I-15G SUB ASSY

5V_TU

C307 0.1u 16V

IC303 Audio AMP STA338BWG13TR

LGE Internal Use Only

3-2. GP2R Power Block Diagram +5V

L604 3A L605 3A

+5V C621 100u 16V

C624 100u 16V

C628 0.1u 16V

L101 2A

C631 22u 16V

C103 22u 10V

IC206 AP2191

C223 100u 16V

C104 0.1u 16V

C725 10u 16V

C728 0.1u 16V

IC706 AZ1085S

C750 0.1u 16V

IC704 TPS54319

C753 22u 16V

C746 10u 10V

C747 10u 10V

L708 2A

C754 0.1u 16V

L709 2A

C748 0.1u 16V

L710 2A 0.1u 16V

+3.3V_3D

IC707 AZ1117ST C752

C751 0.1u 16V

22u 16V

L705 2A

C789 10u 16V C753 10u 16V

L706 2A L707 2A

C658 0.1u 16V

IC606 AZ1085S

C659 22u 6.3V

C660 0.1u 16V

L601 2A

C661 0.1u 16V

C126 0.1u 16V

L100 2A

1.0V

C735 0.1u 16V

R834 0Ω1/10W

C805 100p 50V C754 100p 50V

SPDIF

1.0V_LTX

13ea

C755 0.1u 16V

IC205 AT24C02 EDID USB

C222 0.1u 16V C235 0.1u 16V

L708 2A

+5V_CI_ON

0.1u 16V

7ea

0.1u 16V

7ea

0.1u 16V

3ea

33ea

IC702 MX25L4005

1.8V

3.3V_LTX 3.3V_VDD 3.3V_PLL

+3.3V_CI

C128 0.1u 16V C120 0.1u 16V C332 0.1u 50V

IC101 74LCX244

IC303 Audio AMP

+3.3V_TU L300 2A

C309 22u 10V

+3.3V_TU

C302 0.1u 16V

C313 0.1u 16V

IC301 AZ1117H

+1.2V_TU C325 22u 10V

C322 0.1u 16V

C300 0.1u 16V

+1.2V_TU

LGE Internal Use Only

3-3. LDO/DC-DC Start up ■ IC600 (+3.3V_AVDD/AZ1085S)

■ IC602 (+1.5V_DDR_IN/TPS54319)

Vin Vout Vin

Ve n Vo Io

■ IC604(+2.5V_AVDD/TJ3964S)

■ IC603 (+1.26V_VDDC/TPS54319)

Vin Vout

Vin

Ve n Vo Io

LGE Internal Use Only

3-4. LDO/DC-DC Start up ■ IC606 (+3.3V/AZ1085S)

Vout

Vin

■ IC605 (+5V_TU/TPS54231)

Vin Ve n Vo Io

LGE Internal Use Only

3-5. GP2R I2C MAP

+5V_HD MI

DDCR_CK/GPIO72 DDCR_DA/GPIO71

DDC_SCL/SDA_1~3 1 (R208,209) 2 (R233,234) 10K 3 (R256,257)

(N22)<I2C-SCL> (M22)<I2C-SDA>

EEPROM EEPROM 0xA0 0xA0 Ch2 Ch2

HDMI1,2,3 HDMI1,2,3 0xA0 0xA0 Ch10,12,11 Ch10,12,11 TGPIO2/I2C_CLK TGPIO3/I2C_SDA

<EEPROM-SCL>+3.3 <EEPROM-SDA> V

2.2K (R480,R482)

(R3) <TU_SCL> (T3) <TU_SDA>

HDCP HDCP EEPROM EEPROM 0xA8 0xA8 Ch2 Ch2

4.7K (R319,R326)

TUNER TUNER TDTJ-S001D TDTJ-S001D 0x10/C2 0x10/C2 Ch6 Ch6 SATURN7R SATURN7R TGPIO0/UPGAIN

+3.3V_S T

SUB_SCL SUB_SDA

(F15)I2S_IN_WS/GPIO174 (F14)I2S_IN_BCK/GPIO175

TGPIO1/DNGAIN

(U1) (U2)

2K (R360,R359)

AMP AMP STA338BWG13TR STA338BWG13TR 0x38 0x38 Ch5 Ch5

4.7K (R635,R633)

TOUCH TOUCH 0x52 0x52 Ch7 Ch7

G_EYE G_EYE 0x20 0x20 Ch7 Ch7

I2S_IN_SD/GPIO176 SPDIF_IN/GPIO177

DDCA_DA/UART0_TX

+3.3 V

+3.3 (F13)<P_SCL> <MODULE_SCL/3DF_SCL> 4.7K (R780,R781) <MODULE_SDA/3DF_SDA> (G14)<P_SDA> 3.3K (R1412,R1411) V_A VDD LG8300 MODULE LG8300 MODULE 0x74 0x74 Ch4 Ch4

DDCA_CK/UART0_RX

<AMP_SCL> <AMP_SDA>

(B5) <RGB_DDC_SCL> (A5) <RGB_DDC_SDA>

0x1C 0x1C Ch4 Ch4

10K (R237,R247) EEPROM EEPROM RGB RGB 0xA0 0xA0 Ch8 Ch8

+5.0 <DDC_SCL/UART_RX> <DDC_SDA/UART_TX> V_ST

ISP ISP

LGE Internal Use Only

4. LM1 Power Block optimization. 1. GP2R vs LM1 Power Block.

Amp 17V

17V

5V Tuner TPS54231 2A

5.1V

1.25V Tuner LDO

3.3V 3D LDO (3A)

1.8V 3D DDR LDO

1V 3D core AOZ1073 3A

FET SW St 5V

3.3V Standby LDO(AP2121)

3.3V AVDD LDO (3A)

LDO : 7

1.25V _TU LDO (1A) 2.5V LDO (1A)

5.1V

2.5V LDO

AP2191 USB

1.24V core 1.5V DDR TPS65253(3A)

1.5V DDR AOZ1073 3A 1.26V Core AOZ1073 3A

DC/DC : 4

1.8V Tuner LDO (1A)

3.3V Multi TPS54327(3A)

AP2191 USB 3.3V Multi LDO (3A)

Amp

3.5V St.

3.3V ST AP2121

DC/DC : 2

GP2R Power Block

LDO : 4

LM1 Power Block

LGE Internal Use Only

4-1. P_17V Spec) 850mV↓ 16mVrms 17V to 3.3V 283mVpp C620

C621

10uF

0.1uF

25V

50V

3216

2012

TPS54327 (3A, $0.14)

+3.3V

L605 2.2uH

+3.3V_CI

Spec) 165mV ↓ 4.7mVrms 46.6mVpp

L101 120 Ohm

3.5A

C629/50

C630

C137

4.9x4.9

10uF

0.1uF

1608

0.1uF

16V →6.3V 3216 →1608 0.00586↓

16V

1005

OP-Amp for SC

1 7 V

Spec) 165mV ↓ 8.66mVrms 37.5mVpp

Buffer for CI_ADDR [0:7]

change

C667

C668

0.1uF

68uF

50V

35V

1608

8PI/6.3H

C693

C694

10uF

0.01uF

Audio AMP

+3.3V_TU

Spec) 165mV ↓ 13.5mVrms 158mVpp

L604 120 Ohm

17V to 12V TPS54231D (2A)

C627

1608

3.3V to 1.8V AP1117E18G (850mW)

Spec) 90mV↓ 4.6mVrms 41.6mVpp C631

C618

10uF

0.1uF

6.3V

16V

1608

1005

Spec) 165mV↓ 23.4mVrms 166.6mVpp

25V

50V

C614

C615

3225

1005

0.1uF

10uF

16V

16V →6.3V 3216 →1608 change

C643 0.1uF C711

C712

10uF

0.1uF

16V

50V

3216

1608

LNB

50V 1608

Audio AMP

Spec) 165mV↓ 8.5mVrms 186.6mVpp

1005

Tuner

C638 C646 0.1uF 50V 1608

LGE Internal Use Only

4-2. P_17V * Y17

+2.5V

+3.3V

Spec) 165mV↓ 7.8mVrms 47.5mVpp

x3 3.3V to 2.5V TJ3940S-2.5V (714mW)

120 Ohm

L613

LM1

120 Ohm

C612

C1417

C682

C671

10uF

1608

10uF

0.1uF

1608

0.1uF

10uF

6.3V

16V

1608

10V →6.3V 2012 →1608 change

1005

10V →6.3V 2012 →1608 change

C605

Tuner

DVB_T2

1 7 V

* W18/9

Spec) 165mV↓ 9.7mVrms 67.5mVpp

L408/9 120 Ohm 2A

1608

0.1uF

10uF

16V

10V →6.3V 2012 →1608 change

1005

C427

0.1uF

10uF

16V

10V →6.3V 2012 →1608 0.00636↓

1005

Nand Flash

C554

0.1uF

10uF

16V

10V →6.3V 2012 →1608 change

1005

LM1

* L7

change

3.3V to 1.25V AP1117EG-13 (???mW)

C625 10uF 6.3V 1608

HDCP

Spec) 165mV↓ 8.5mVrms 45mVpp

+1.25V_TU

C552

Tuner

NVR

0.1uF

C684

C685

16V

0.1uF

10uF

1005

16V

6.3V

1005

1608

NOT_HNIM

LGE Internal Use Only

4-3. P_5V

Spec) 250mV↓ 7mVrms 70mVpp

L600 120 Ohm 5A

C608

C610

2012

10uF

0.1uF

10V →16V 2012 →3216 0.0005↓ change

5 V

+5V

USB OCD

16V 1005 C219

SPDIF

0.1uF 16V 1005

+5V_CI_ON

Spec) 250mV↓ 31mVrms 135.4mVpp

L100 MOFET Switch

120 Ohm 2A

C104

C100

C101

1608

0.1uF

22uF

0.1uF

16V

10V →16V 3216 →3225 0.017↓

1005

PCMCI

16V 1005

change

LGE Internal Use Only

4-4. P_5V * M14

+1.24V_VDDC

+5V L606

L405

???mVrms

120 Ohm

Spec) 55mV↓ 9.4mVrms 48.3mVpp C1413 ???mVrms

C653/4

C683/57

2012

10uF

22uF

1608

0.1uF

10uF

25V

16V

3225

1005

10V →6.3V 2012 →1608 change

5V to 1.1V TPS65253RH D (adjustable) $0.25

0.1uF

10uF

16V

10V →6.3V 2012 →1608 change

1005

5 V

* R15

LM1 Spec) 55mV↓ 17.7mVrms 70mVpp

* M17

+1.5V_DDR_IN

Spec) 55mV↓ 15.9mVrms 90mVpp

L412 120 Ohm C651/56

C467

22uF

1000pF 50V

1608

10uF

0.1uF

1uF

16V

10V

3225

1005

10V →6.3V 2012 →1608 change

1005

VCC_1.5V_DDR

LM1 MIU0/1

C468

* IC501 / G7

Spec) 55mV↓ 19.69mVrms 120.8mVpp

L500 500 Ohm 3A

C544

C545

???

10uF

0.1uF

1000pF

0.1uF

10V →6.3V 2012 →1608

16V

50V

16V

1005

DDR1/2

change

LGE Internal Use Only

4-5. STBY Spec) 250mV↓ 23mVrms 150mVpp

C600

C601

10uF 10V →16V 2012 →3216

5V to 3.3V AP2121N-3.3 (0.3A)

+3.3V_ST

C604

C228

0.1uF

1uF

0.1uF

16V

6.3V

16V

1005

RS232C

0.0005↓ change

L406 120 Ohm

S T B Y

C469

1608

0.1uF

LM1

16V 1005

C556

Serial Flash

0.1uF 16V 1005

C547

SUB Ass’y

0.1uF 16V 1005

LGE Internal Use Only

4-6. GP4 LM1 I2C MAP

EAX64337201_0 +3.3V_TU

I2C_SCKM1/GPIO75 I2C_SDAM1/GPIO76

AE6 AD6

TU_SCL TU_SDA

IC400

R3082.2K

R309 2.2K

TU300 TDSS-G201D +3.3V

GPIO49 GPIO50

AB5 AB3

AMP_SCL AMP_SDA

R624 2K

R623 2K

IC300 STA368BWG

+3.3V_AVDD

I2S_IN_WS/GPIO149 SPDIF_IN/GPIO152

D9 D7

P_SCL P_SDA

R468 3.3K

R466 3.3K

SCL_3.3V_MOD P500 SDA_3.3V_MOD LVDS

+3.3V_ST

I2S_IN_SD/GPIO151 I2S_IN_BCK/GPIO150

D8 C8

SUB_SCL SUB_SDA

R539 4.7K

R538 4.7K

P501 KEY/IR PIN8 +3.3V_AVDD

I2C_SCKM2/DDCR_CK/GPIO72 I2C_SDAM2/DDCR_DA/GPIO71

P23 P24

I2C_SCL I2C_SDA

R469 2.2K

R468 2.2K

IC503 EEPROM IC502 HDCP (OTP) LGE Internal Use Only

5. GP4 LM1 SOC Power Sequence Procedure ▶Hot Point

288ms / [Spec] before all pwr input raise SOC_RESET +3.3V_AVDD +1.10V_VDDC

Multi_PWR 0ms

+1.5V_DDR_IN

SOC_RESET Threshold

+3.3V_AVDD

+1.10V_VDDC

+1.5V_DDR_IN

◈ SOC_RESET timing and Power sequence are ok.

LGE Internal Use Only

5. GP4 LM1 SOC Power Sequence Procedure ◈ Solution

█ Value of Capacitor and resister. ① Cap Æ 22uF. 0CK226DC67A 22uF 6.3V

$0.0117

② Resister Æ 100㏀.

+3.3V_AVDD

Threshold SOC_RESET

LGE Internal Use Only

6. Memory margin test. (DDR) STEP1. Setting like below. (Red box)

STEP2. Call “direct MIU Auto BIST” function from Menu.

LGE Internal Use Only

6. Memory margin test. (DDR) STEP3. Setting like below and push “Start DQS”. (Red box)

STEP4. below picture is test result. Red box is timing margin.

※Normal operating board has timing margin 7~9. If timing margin under 7 ,it’s some problem DDR or Main MIU.

LGE Internal Use Only

7. Pen touch overview. (Installation_Pentouch Program.)

LGE Internal Use Only

7. Pen touch overview. (Installation_Pentouch Program.)

LGE Internal Use Only

7-1. Pen touch overview. (Check the installation status.) 1

Currently installed programs Check the LG Pentouch Multi-touch Driver or Pentouch TV

Check USB Dongle Driver in Device Manager -LG Pentouch Multi-touch Driver(MultiTouch) -LG Pentouch Multi-touch Driver(BUS) -LG Pentouch Multi-touch Driver(Dongle) the Dongle Driver should be displayed when connected USB Dongle

LGE Internal Use Only

7-2. Pen touch overview. (Pairing between Touch Pen and Dongle)

LGE Internal Use Only

7-3. Pen touch overview. (Pairing between Touch Pen and Dongle)

LGE Internal Use Only

7-4. Pen touch overview. (Using the Pentouch Function) ■ Image shown may differ from your monitor. You need the following items to use the Pentouch functions: 1 Enter the Pentouch mode on your monitor. - Press TOUCH button on the remote control or MENU to access the main menus. Then choose Pentouch function. 2 Select the correct computer input connection to enter the Pentouch mode.

3 Use the touch pen or the mouse to start the Pentouch program. Pressing the /Home button on the touch pen works in the same way as right-clicking the mouse.

■ Viewing the Screen Settings I mage shown may differ from your monitor. If you press the OK button on the remote control, the screen shown below appears to indicate that the screen settings have been updated successfully.

① The text "Pentouch" should be displayed to indicate that the Pentouch mode is activated. If not, restart the Pentouch mode. ② "1365x768 " should be displayed to indicate that the resolution has been set successfully. If not, set the monitor resolution again.(See p.38)

LGE Internal Use Only

7-5. Pen touch overview. (PDP Pen Touch Concept)

Principle 2. The position data processed Pentouch TV Application looks like PC mouse. Step 1. USB Dongle receive the position data. Step 2. USB Dongle Driver parsing the positon Step 3. Pentouch TV application drawing and click function. Step 4. The result was displayed PDP TV through HDMI or RGB cable.

Principle 1. The Pen using PDP Cell’s light energy Step 1. The pen detect the PDP Cell’s light Step 2. The pen convert detected light to voltage Step 3. The pen calculate X,Y position Step 4. The pen transfer the X,Y data through RF

Pen The photo sensor in the pen detect the light

RF Wireless communication (2.4GHz)

USB Dongle It can use Multi-Touch function by support 2 pens.

Plasma Display

Pentouch TV Application - It was developed by LG. - It can be using internet for web surfing , Flash Game etc.

The HDMI or RGB signal is PC’s output that configuration set by clone mode.

LGE Internal Use Only