Manual de serviço televisor SHARP LC-65RX1, LC-65RX1H e LC-65RX1X by Portal da Eletrônica

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LC-65RX1H/X

SERVICE MANUAL No. S68L7LC65RX1H

LCD COLOR TELEVISION MODELS

LC-65RX1H LC-65RX1X

In the interests of user safety (required by safety regulations in some countries) the set should be restored to its original condition and only parts identical to those specified should be used.

OUTLINE This model is based on the LC-65RX1M and partially modified. For the contents not covered in this Service Manual, accordingly, please refer to the LC-65RX1M (S58K6LC65RX1M) Service Manual.

CONTENTS OUTLINE AND DIFFERENCES FROM BASE MODEL OUTLINE.............................................................i DIFFERENCES FROM BASE MODEL..............ii

CHAPTER 4. TROUBLESHOOTING TABLE [1] TROUBLESHOOTING TABLE (for LC65RX1X) ........................................................4-1

SAFETY PRECAUTION IMPORTANT SAFETY PRECAUTION.............. iii Precautions for using lead-free solder ..............iv

CHAPTER 5. OVERALL WIRING DIAGRAM/BLOCK DIAGLAM [1] OVERALL WIRING DIAGRAM ......................5-1 [2] SYSTEM BLOCK DIAGRAM (LC-65RX1X) ........5-2

CHAPTER 1. SPECIFICATIONS [1] LC-65RX1H.................................................... 1-1 [2] LC-65RX1X .................................................... 1-2

CHAPTER 6. PRINTED WIRING BOARD [1] SUB UNIT (LC-65RX1X) ...............................6-1

CHAPTER 2. OPERATION MANUAL [1] OPERATION MANUAL .................................. 2-1

CHAPTER 7. SCHEMATIC DIAGRAM [1] SCHEMATIC DIAGRAM (LC-65RX1X) .........7-1

CHAPTER 3. DIMENSIONS [1] DIMENSIONS ................................................ 3-1

Parts Guide

Parts marked with " " are important for maintaining the safety of the set. Be sure to replace these parts with specified ones for maintaining the safety and performance of the set.

This document has been published to be used for after sales service only. The contents are subject to change without notice.

LC-65RX1H/X

Service Manual OUTLINE AND DIFFERENCES FROM BASE MODEL LC65RX1H

OUTLINE This model is based on the LC-65RX1M and partially modified. For the contents not covered in this Service Manual, accordingly, please refer to the LC-65RX1M (S58K6LC65RX1M) Service Manual.

LC-65RX1H/X DIFFERENCES FROM BASE MODEL LIST OF CHANGED PARTS (LC-65RX1H) Ref. No. Description LC-65RX1M PRINTED WIRING BOARD ASSEMBLIES N MINI-AV Unit DUNTKE632FM02 N R/C, LED Unit DUNTKE682FM02 N KEY Unit DUNTKD910FM12 N MAIN Unit DUNTKE630FM02 N SUB Unit DUNTKE631FM02 N FRC Unit DUNTKE046FM03 N POWER Unit-1 RDENCA283WJQZ N POWER Unit-2 RDENCA284WJQZ N AC-INLET Unit RUNTKA447WJQZ N INVERTER Unit A RDENC2509TPZZ N INVERTER Unit B RDENC2510TPZZ N INVERTER Unit C RDENC2511TPZZ N INVERTER Unit D RDENC2512TPZZ N INVERTER Unit E RDENC2513TPZZ N INVERTER Unit F RDENC2514TPZZ N C-PWB CPWBY3723TPZB LCD PANEL N 65” Panel Ass’y R1LK645D3LZ3F MAIN Unit: DUNTKE630VJ01 Q2406 Transistor VSRDTA144EK-1Y Q2411 Transistor VSRDTA144EK-1Y Q2602 Transistor VSRDTA144EK-1Y SC2401 Socket QSOCNA706WJZZ FRC Unit: DUNTKE046VJ03 C4810 Capacitor RC-KZA531WJQZY C4811 Capacitor RC-KZA531WJQZY C6001 Capacitor RC-KZA531WJQZY C6008 Capacitor RC-KZA531WJQZY C6012 Capacitor RC-KZA531WJQZY C6013 Capacitor RC-KZA531WJQZY 65” Panel Ass’y: R1LK645D3LZ30 Please refer to a Parts Guide

LC-65RX1H

Note

DUNTKE632VJ01 DUNTKE682VJ01 DUNTKD910VJ01 DUNTKE630VJ01 DUNTKE631VJ01 DUNTKE046VJ03 ← ← ← ← ← ← ← ← ← ←

No internal parts changed No internal parts changed No internal parts changed Some parts changed No internal parts changed Some parts changed -

R1LK645D3LZ30

Changes

VSDTA144EKA-1Y VSDTA144EKA-1Y VSDTA144EKA-1Y QSOCNA718WJZZ

Changes Changes Changes Changes

VCKYCZ1AB105KY VCKYCZ1AB105KY VCKYCZ1AB105KY VCKYCZ1AB105KY VCKYCZ1AB105KY VCKYCZ1AB105KY

Changes Changes Changes Changes Changes Changes

LIST OF CHANGED PARTS (LC-65RX1X) Ref. No. Description LC-65RX1M PRINTED WIRING BOARD ASSEMBLIES N MINI-AV Unit DUNTKE632FM02 N R/C, LED Unit DUNTKE682FM02 N KEY Unit DUNTKD910FM12 N MAIN Unit DUNTKE630FM02 N SUB Unit DUNTKE631FM02 N FRC Unit DUNTKE046FM03 N POWER Unit-1 RDENCA283WJQZ N POWER Unit-2 RDENCA284WJQZ N AC-INLET Unit RUNTKA447WJQZ N INVERTER Unit A RDENC2509TPZZ N INVERTER Unit B RDENC2510TPZZ N INVERTER Unit C RDENC2511TPZZ N INVERTER Unit D RDENC2512TPZZ N INVERTER Unit E RDENC2513TPZZ N INVERTER Unit F RDENC2514TPZZ N C-PWB CPWBY3723TPZB LCD PANEL N 65” Panel Ass’y R1LK645D3LZ3F SUB Unit: DUNTKE730FM01 Please refer to a Parts Guide

LC-65RX1X DUNTKE632FM03 DUNTKE732FM01 ← DUNTKE630FM03 DUNTKE730FM01 ← ← ← ← ← ← ← ← ← ← ← ←

Note No internal parts changed No internal parts changed No internal parts changed Changes -

LC-65RX1H/X

Service Manual

LC65RX1H

SAFETY PRECAUTION IMPORTANT SAFETY PRECAUTION

Service work should be performed only by qualified service technicians who are thoroughly familiar with all safety checks and the servicing guidelines which follow:

WARNING

•

1. For continued safety, no modification of any circuits should be attempted. 2. Disconnect AC power before servicing.

BEFORE RETURNING THE RECEIVER (Fire & Shock Hazard) Before returning the receiver to the user, perform the following safety checks:

Connect the resistor connection to all exposed metal parts having a return to the chassis (antenna, metal cabinet, screw heads, knobs and control shafts, escutcheon, etc.) and measure the AC voltage drop across the resistor. All checks must be repeated with the AC cord plug connection reversed. (If necessary, a non polarized adaptor plug must be used only for the purpose of completing these checks.) Any reading of 0.74 V rms (this corresponds to 0.5 milliamp. rms AC.) or more is excessive and indicates a potential shock hazard which must be corrected before returning the monitor to the owner.

3. Inspect all lead dress to make certain that leads are not pinched, and check that hardware is not lodged between the chassis and other metal parts in the receiver.

DVM AC SCALE

4. Inspect all protective devices such as non-metallic control knobs, insulation materials, cabinet backs, adjustment and compartment covers or shields, isolation resistor-capacitor networks, mechanical insulators, etc.

1.5k ohm 10W

5. To be sure that no shock hazard exists, check for leakage current in the following manner. •

Plug the AC cord directly into a 110 ~ 240 volt AC outlet.

•

Using two clip leads, connect a 1.5k ohm, 10 watt resistor paralleled by a 0.15µF capacitor in series with all exposed metal cabinet parts and a known earth ground, such as electrical conduit or electrical ground connected to an earth ground.

•

Use an AC voltmeter having with 5000 ohm per volt, or higher, sensitivity or measure the AC voltage drop across the resistor.

0.15 µF TEST PROBE

TO EXPOSED METAL PARTS

CONNECT TO KNOWN EARTH GROUND

///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

SAFETY NOTICE Many electrical and mechanical parts in LCD color television have special safety-related characteristics. These characteristics are often not evident from visual inspection, nor can protection afforded by them be necessarily increased by using replacement components rated for higher voltage, wattage, etc. Replacement parts which have these special safety characteristics are identified in this manual; electrical components having such features are identified by " " and shaded areas in the Replacement Parts Lists and Schematic Diagrams. For continued protection, replacement parts must be identical to those used in the original circuit. The use of a substitute replacement parts which do not have the same safety characteristics as the factory recommended replacement parts shown in this service manual, may create shock, fire or other hazards. ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

iii

LC-65RX1H/X Precautions for using lead-free solder Employing lead-free solder •

“All PWBs” of this model employs lead-free solder. The LF symbol indicates lead-free solder, and is attached on the PWBs and service manuals. The alphabetical character following LF shows the type of lead-free solder. Example:

L F a/a

LFa

Indicates lead-free solder of tin, silver and copper.

Using lead-free wire solder •

When fixing the PWB soldered with the lead-free solder, apply lead-free wire solder. Repairing with conventional lead wire solder may cause damage or accident due to cracks. As the melting point of lead-free solder (Sn-Ag-Cu) is higher than the lead wire solder by 40 °C, we recommend you to use a dedicated soldering bit, if you are not familiar with how to obtain lead-free wire solder or soldering bit, contact our service station or service branch in your area.

Soldering •

As the melting point of lead-free solder (Sn-Ag-Cu) is about 220 °C which is higher than the conventional lead solder by 40 °C, and as it has poor solder wettability, you may be apt to keep the soldering bit in contact with the PWB for extended period of time. However, Since the land may be peeled off or the maximum heat-resistance temperature of parts may be exceeded, remove the bit from the PWB as soon as you confirm the steady soldering condition. Lead-free solder contains more tin, and the end of the soldering bit may be easily corroded. Make sure to turn on and off the power of the bit as required. If a different type of solder stays on the tip of the soldering bit, it is alloyed with lead-free solder. Clean the bit after every use of it. When the tip of the soldering bit is blackened during use, file it with steel wool or fine sandpaper.

•

Be careful when replacing parts with polarity indication on the PWB silk.

Lead-free wire solder for servicing Part No. ZHNDAi123250E ZHNDAi126500E ZHNDAi12801KE

Description J J J

φ0.3mm 250g (1roll) φ0.6mm 500g (1roll) φ1.0mm 1kg (1roll)

Code BL BK BM

LC-65RX1H/X

Service Manual

LC65RX1H

CHAPTER 1. SPECIFICATIONS [1] LC-65RX1H Model

LC-65RX1H

Item LCD panel

65" (1639 mm) Advanced Super View & BLACK TFT LCD

Resolution

2,073,600 pixels (1920×1080)

Video Colour System

PAL/SECAM/NTSC 3.58/NTSC 4.43/PAL 60

TV Function

TV-Standard

PAL: B/G, D/K, I SECAM: B/G, D/K, K/K1, NTSC: M

Receiving VHF/UHF Channel CATV

44.25 - 863.25 MHz

TV-Tuning System

Auto Preset 99 ch

STEREO/BILINGUAL

NICAM: B/G, I, D/K A2 stereo: B/G

S1 - S41ch (including Hyperband)

Brightness

450 cd/m 2

Viewing angles

H : 176º V : 176º

Audio amplifier

7.5W x 2 + 15W

Speakers

10 x 4cm 2pcs, Ø2cm 2pcs, Ø5.5cm 1pc

Terminals Rear

Side

Rear

Antenna input

UHF/VHF 75

INPUT 1

VIDEO in, AUDIO in, COMPONENT in (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz)

INPUT 2

VIDEO in, AUDIO in, COMPONENT in (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz)

DIN type

INPUT 3

S-VIDEO in, VIDEO in, AUDIO in

INPUT 4

HDMI (HDMI input) (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz, 1080P/50Hz, 1080P/60Hz, 1080P/24Hz)

INPUT 5

HDMI (HDMI input) (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz, 1080P/50Hz, 1080P/60Hz, 1080P/24Hz)

INPUT 6

HDMI (HDMI input) (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz, 1080P/50Hz, 1080P/60Hz, 1080P/24Hz), AUDIO in (Ø 3.5 mm jack)

INPUT 7 (PC input)

15 pin mini D-sub, AUDIO in (Ø 3.5 mm jack)

MONITOR OUT

VIDEO out, AUDIO out

RS-232C

9 pin D-sub male connector

DIGITAL AUDIO OUTPUT Optical Digital Audio output Front

Headphone

OSD language

English/Simplified Chinese/Traditional Chinese/Arabic

Power Requirement

AC 110-240 V, 50/60 Hz

Power Consumption

481 W (0.5 W Standby)

Weight

without stand

62.0 kg

with stand

66.0 kg

Operating Temperature

0°C - 40°C

1–1

LC-65RX1H/X

[2] LC-65RX1X Model

LC-65RX1X

Item LCD panel

65" (1639 mm) Advanced Super View & BLACK TFT LCD

Resolution

2,073,600 pixels (1920×1080)

Video Colour System TV Function

TVStandard

PAL/SECAM/NTSC 3.58/NTSC 4.43/PAL 60 Analogue

PAL: B/G, D/K, I SECAM: B/G, D/K, K/K 1

Digital

DVB-T

Receiving VHF/UHF Channel CATV

44.25 - 863.25 MHz

TV-Tuning System

Auto Preset 99 ch

STEREO/BILINGUAL

NICAM: B/G, I, D/K A2 stereo: B/G

S1 - S41ch (including Hyperband)

Brightness

450 cd/m 2

Viewing angles

H : 176º V : 176º

Audio amplifier

7.5W x 2 + 15W

Speakers

10 x 4cm 2pcs, Ø2cm 2pcs, Ø5.5cm 1pc

Terminals Rear

Side

Rear

Antenna input

UHF/VHF 75

INPUT 1

VIDEO in, AUDIO in, COMPONENT in (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz)

INPUT 2

VIDEO in, AUDIO in, COMPONENT in (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz)

DIN type

INPUT 3

S-VIDEO in, VIDEO in, AUDIO in

INPUT 4

HDMI (HDMI input) (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz, 1080P/50Hz, 1080P/60Hz, 1080P/24Hz)

INPUT 5

HDMI (HDMI input) (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz, 1080P/50Hz, 1080P/60Hz, 1080P/24Hz)

INPUT 6

HDMI (HDMI input) (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz, 1080P/50Hz, 1080P/60Hz, 1080P/24Hz), AUDIO in (Ø 3.5 mm jack)

INPUT 7 (PC input)

15 pin mini D-sub, AUDIO in (Ø 3.5 mm jack)

MONITOR OUT

VIDEO out, AUDIO out

RS-232C

9 pin D-sub male connector

DIGITAL AUDIO OUTPUT Optical Digital Audio output Front

Headphone

OSD language

English/Simplified Chinese/Traditional Chinese/Arabic

Power Requirement

AC 110-240 V, 50/60 Hz

Power Consumption

481 W (0.5 W Standby)*

Weight

without stand

62.0 kg

with stand

66.0 kg

Operating Temperature

0°C - 40°C

As a part of policy of continuous improvement, SHARP reserves the right to make design and specification changes for product improvement without prior notice. The performance specification figures indicated are nominal values of production units. There may be some deviations from these values in individual units. * Standby power consumption is approx. 45W for 15-30 minutes after the TV is turned off by the remote control. This is required for automatically capturing EPG data for all tuned digital channels.

1–2

LC-65RX1H/X

Service Manual

LC65RX1H

CHAPTER 2. OPERATION MANUAL [1] OPERATION MANUAL

Part names TV (Front/Side)

POWER (On/Off) button

TV/VIDEO button Channel up ( )/down (

) buttons

Volume up ( )/down ( ) buttons

Such sensor is not applicable to Hong Kong model.

Such sensor is not applicable to this model.

Remote control sensor OPC sensor POWER indicator

Headphone jack OPC indicator* SLEEP timer indicator *OPC: Optical Picture Control

2â&#x20AC;&#x201C;1

LC-65RX1H/X TV (Rear)

INPUT 1 terminals

INPUT 4 (HDMI) terminal INPUT 2 terminals

SERVICE ONLY terminal* * Usuallydo not connect anything to this terminal as it is reserved only for service personnel. AC INPUT terminal

MONITOR OUTPUT terminals INPUT 3 terminals

INPUT 6 (HDMI) terminals

DIGITAL AUDIO OUTPUT terminal Antenna input terminal

RS-232C terminal

INPUT 7 (PC) terminals

INPUT 5 (HDMI) terminal

2â&#x20AC;&#x201C;2

LC-65RX1H/X Remote control unit (LC-65RX1H) 7

8 9 10

2 3

11 12

12 13

4 5 6 7 8 9

13 14 15 16 17 18 19

20 21

1 2 3

15 16

17 AV MODE Select a video setting. 18 MENU Display the menu screen. 19 / / / (Cursor) Select a desired item on the setting screen. ENTER Execute a command. 20 RETURN MENU mode: Return to the previous menu screen. 21 Such buttons are not applicable to Hong Kong model. 22 AQUOS LINK buttons If external equipment such as a AQUOS BD Player is connected via HDMI-certified cables and is AQUOS LINK compatible, you can use these AQUOS LINK buttons.

POWER (STANDBY/ON) To switch the power on and off. 0-9 Set the channel. (Flashback) Press to return to the previous selected channel or external input mode.

OPC To switch the Optical Picture Control on and off.

MPX Select the sound multiplex mode. VOL /VOL Set the volume.

(Mute) Mute the sound. WIDE Change the wide image mode. FREEZE Freeze a motion picture on the screen. EXIT Turn off the On-Screen Display. Such buttons are not applicable to Hong Kong model. TV/VIDEO (INPUT SOURCE) Select an input source. (TV, INPUT 1, INPUT 2, INPUT 3, INPUT 4, INPUT 5, INPUT6, INPUT7 (PC)) HDMI Select an HDMI. (INPUT4, INPUT5, INPUT6) DISPLAY Displays the channel or input information. CH /CH TV input mode: Select the channel. SLEEP Set the Sleep timer.

2â&#x20AC;&#x201C;3

LC-65RX1H/X Remote control unit (LC-65RX1X) 9

EPG DTV only: To display EPG (Electronic Programme Guide) screen.

10 INFO DTV only: Display the programme information. 11 EXIT Turn off the On-Screen Display. 12 OPC To switch the Optical Picture Control on and off.

AV MODE Select a video setting.

4 5 6 7 8 9 10

15 16 17 18 19 20 21 22

(Subpage) Display the Teletext subpage directly.

(Top/Bottom/Full) TELETEXT mode: Set the area of magnification.

WIDE Change the wide image mode. FREEZE Freeze a motion picture on the screen. 13

(TELETEXT) Select the TELETEXT mode. (all TV image, all TEXT image, TV/TEXT image) (Reveal hidden for TELETEXT) TELETEXT mode: Display hidden characters. (SUBTITLE for TELETEXT) To turn the subtitles on and off. (Hold) TELETEXT mode: Stop updating Teletext pages automatically. Press again to release the hold mode.

14 TV/VIDEO (INPUT SOURCE) Select an input source. (TV, INPUT 1, INPUT 2, INPUT 3, INPUT 4, INPUT 5, INPUT6, INPUT7 (PC))

15 FAV. DTV only: Display the favourite channel setting.

16 RADIO DTV only: Press to access RADIO mode. 17 DISPLAY Displays the channel or input information. Displays the time information included in the Teletext broadcast. 18 CH /CH TV input mode: Select the channel. TELETEXT mode: Select the page.

POWER (STANDBY/ON) To switch the power on and off.

0-9 Set the channel. TELETEXT mode: Set the page.

(Flashback) Press to return to the previous selected channel or external input mode.

ATV Press to access ANALOGUE mode.

DTV Press to access DTV mode.

MPX Select the sound multiplex mode.

VOL /VOL Set the volume.

(Mute) Mute the sound.

19 SLEEP Set the Sleep timer. 20 GUIDE DTV only: Display the programme list. 21 MENU Display the menu screen. 22

/ / / (Cursor) Select a desired item on the setting screen. ENTER Execute a command.

23 RETURN MENU mode: Return to the previous menu screen. 24 Colour (Red/Green/Yellow/Blue) Select four preset favourite channels in four different categories. While watching, you can toggle the selected channels by pressing R, G, Y and B. TELETEXT mode: Select the page. 25 AQUOS LINK buttons If external equipment such as a AQUOS BD Player is connected via HDMI-certified cables and is AQUOS LINK compatible, you can use these AQUOS LINK buttons.

2â&#x20AC;&#x201C;4

LC-65RX1H/X

Service Manual

LC65RX1H

CHAPTER 3. DIMENSIONS [1] DIMENSIONS

Unit: mm 1579

124

149

597

806.5

1062 982

1431.5

398

When using wall mount bracket AN-65AG1

278

192

0°/5°/10°

Power code connection terminal

On the wall bracket of AN-65AG1, there is a letter 'A' indicating the centre point of the TV monitor.

Cable opening

650

325

125

440

3–1

LC-65RX1H/X

Service CHAPTER 4. TROUBLESHOOTING TABLE LC65RX1H

Manual

[1] TROUBLESHOOTING TABLE (for LC-65RX1X) No picture on the display (3)

Does not the picture come out when DTV is received? TERMINAL UNIT: Is the voltage of regulation for a TUNER circuit and the power supply terminal of IC7507 (COFDM) supplied? (Refer to the circuit diagram)

Each power supply circuit is checked.

YES Is IF signal output from pin (20), (21) of TUNER (TU7501) to pin (30), (30) of IC7507 (COFDM)?

Check the tuner, IC7507 and their peripheral circuits. Replace as required.

TERMINAL UNIT: YES Similarly, is communication control carried out between pin (14),(15) of TU7501, and pin (4), (5) of IC7507?

YES Does X7502 (20.48MHz) oscillate?

YES Is MPEG data (FECLK, FED_D, FESTR_PSYNC, FEVAL_DEN) from IC7507 are output to pin (48)/FECLK, (46)/FED_D, (51)/ FESTR_PSYNC, (50)/FEVAL_DEN of a connector (SC501)? MAIN UNIT: YES Is the digital signal input into pin (48)/FECLK, (46)/FED_D, (51)/ FESTR_PSYNC, (50)/FEVAL_DEN of a connector (SC1101)?

YES Is the digital signal input into pin (AF3)/FECLK, (AF2)/ FED_D, (AF4)/FESTR_PSYNC, (AH3)/FEVAL_DEN of IC8101 (CPU/ DECODER)? YES Do X8101 (24.00MHz)/ X8102 (32.768kMHz) oscillate?

YES Are video signal VDB_R [0:9], VDB_G [0:9], VDB_B [0:9], and VBD_CLK/DE/HD/VD are output from IC8101 to IC3301 (VIDEO PROCESSOR)?

Check X7502 and its peripheral circuits.

Is the control signal named IC7507 and IC9101 (CPLD) normal? (FE_RST_LINE, FEERR_LINE, FEPG0_COMP_LINE, FEPG1_LOCK_LINE, etc.)

Connector SC501/SC1101 are checked.

Check the line between SC1101 and IC8101.

Check the X8101/ X8102 and their peripheral circuits.

Check IC8101, IC3301 and their peripheral circuits. (IC8301-IC8304 (DDR2_SDRAM), etc.)

YES Refer to “The picture doesn't appear in all modes.”

4–1

LC-65RX1H/X No sound (during the reception of TV (DIGITAL) broadcasting)

Does not the sound go out though the picture has come out when DTV is received? MAIN UNIT: Is DTV_SPDIF audio signal output from pin (T2) of IC8101 (CPU/ DECODER) to pin (42) of connector SC1101?

Check the line between IC8101 and SC1101, and their peripheral circuits.

TERMINAL UNIT: YES Is DTV_SPDIF audio signal input from pin(42) of connector SC501 to pin(4) of IC1404(CODEC)?

Check the line between SC501 and IC1404. (SC1101/SC501, etc.)

YES Refer to “No sound output in all modes”.

<During external connection> No picture on the monitor (2)

No picture appears on MONITOR OUT1 - connected monitor during the tuner (DTV) reception.

Checklist: 1) Is ANT-CABLE disconnected or connected improperly? ⋅ ⋅ ⋅ Connect it correctly as per the operation manual. 2) The picture is sent to the monitor in a CVBS signal if the source during display is TV, CVBS or Y/C of INPUT1-3. When sent by component, etc., that signal is not sent to the monitor. 3) When the monitor picture is not sent and is not displayed on the monitor, refer to “No picture” for each terminal. TERMINAL UNIT: Is CVBS signal outputted from pin (51) of IC506 to pin (6) of J1701?

YES

Check the setting of an external input device that connects of J1701.

MAIN UNIT: NO Is DTV_CVBS signal output from pin (18) of connector (SC1101) to pin (15) of IC506?

YES

Check the line between SC1101 (MAIN_UNIT)/ SC501 (TERMINAL UNIT) and IC506.

YES

Check the line between IC8101 and SC1101.

NO Is DTM_CVBS signal output to pin (AD4) of IC8101?

NO Check the IC8101 and its peripheral circuits.

4–2

LC-65RX1H/X

Service Manual

LC65RX1H

CHAPTER 5. OVERALL WIRING DIAGRAM/BLOCK DIAGLAM [1] OVERALL WIRING DIAGRAM

5–1

LC-65RX1H/X

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LC-65RX1H/X

Service Manual

LC65RX1H

CHAPTER 6. PRINTED WIRING BOARD [1] SUB UNIT (LC-65RX1X) Wiring Side-A J

6–1

LC-65RX1H/X

LUG1304

LUG505

FB404

R1324

C1318

R1916 R1914

R1919 R1920 R1928 R1917

C1327

C1306

C1904

C420

D408

C417

Q1901

C1901

C1915

C1918

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R1338

R1302

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C1303

C7577

IC7508

C7572

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Q1303

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C7574

R1309

R1313 R1308

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C1302

Q1301 R1339

C1305

Q1302

R1331

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C1316

L1304

L1303

C1319

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C428

IC406

C1914 C7573

C7575

R7551

R7510

R7534

R1314

R1905

Q7502 Q7507

IC7506

R1306

LUG1302

R621

LUG1301

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C1430

C1436

C1438

C588 R625

R538 R539

R649

R660

C601 R670

C602

R619

C604

R628

C603

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Q7505

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C7538

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D1903

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C1320

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L402

C431

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L7511

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C424

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IC407

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17 16 15 14 13 12 11 10 9

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C7553

C7545

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C7504

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C7503

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8 7 6 5

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R445

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P1702

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C7509

FL7501

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C7537 R7523

C617

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C7536

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R7502

IC403

C1922

R1918 Q521

C7507

C7508

R7552

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R1310 R7505 C7511

R1315 Q7501

R7550 FB7501

R7527 R7509 C7501

R1739

J1706

R438

C1304 R1330

C1919 FB401 R401 R403

L1901 L1902

R1929 C1920 R1921 R1922 C403 D412 R433 Q407

C401 C404 D411 R432 D409 C502

R404

C1917 C1916 R439 C1313 C1308 C430

C1311 C7539 C7551

C1317 C429 C7540

IC1901 C518

D1305 C7561

IC1301 FB7502

P1302 P401

C1921 D402

R441 D405

C7513 IC7507

D1304 R1319 R1317 R7571

KU3

C1324

D1306

C7554 C7552 C7560

R443 R7567

C1323

C7518 C7520

R440 L7509

C1326

C1322 R7566 L7510 C7580

R1907 R1906 R1301 R1303 C501

C7521 VA1701

LUG1303 C411 C406 R415 C405 C1747

R1329 FB406 LUG502

R1305 L501

C7522 L1701

C414 R1743 C1748 IC1702

C1314 C525

D521 R503

LUG503

C1911 C1907 C1909 C1913 C1910 R1901 C1902 R1908 R1911 R1927 R1910 Q1902 R1925 D501

R1740 C1749

FB405 LUG1701

VA1702

4 3 2 1

SC501

Chip Parts Side-A

C434

LUG1306

LUG1305

LUG501

LC-65RX1H/X Wiring Side-B J

6â&#x20AC;&#x201C;3

LC-65RX1H/X

Service Manual

LC65RX1H

CHAPTER 7. SCHEMATIC DIAGRAM [1] SCHEMATIC DIAGRAM (LC-65RX1X) 1. DESCRIPTION OF SCEMATIC DIAGRAM

7–1

LC-65RX1H/X 2. SUB UNIT-1

7–2

LC-65RX1H/X 3. SUB UNIT-2

7–3

LC-65RX1H/X 4. SUB UNIT-3

7–4

LC-65RX1H/X 5. SUB UNIT-4

7–5

LC-65RX1H/X 6. SUB UNIT-5

7–6

LC-65RX1H/X 7. SUB UNIT-6

7–7

TopPage

LC-65RX1M

SERVICE MANUAL No. S58K6LC65RX1M

LCD COLOR TELEVISION MODEL

LC-65RX1M

In the interests of user safety (required by safety regulations in some countries) the set should be restored to its original condition and only parts identical to those specified should be used.

CONTENTS SAFETY PRECAUTION IMPORTANT SAFETY PRECAUTION................i Precautions for using lead-free solder ...............ii CHAPTER 1. SPECIFICATIONS [1] SPECIFICATIONS ......................................... 1-1 CHAPTER 2. OPERATION MANUAL [1] OPERATION MANUAL .................................. 2-1 CHAPTER 3. DIMENSIONS [1] DIMENSIONS ................................................ 3-1 CHAPTER 4. REMOVING OF MAJOR PARTS [1] REMOVING OF STAND AND CABINET........ 4-1 [2] REMOVING OF MAJOR PARTS FROM PANEL UNIT .................................................. 4-2 [3] REMOVING OF MAJOR PARTS FROM CHASSIS TRAY ............................................. 4-6 CHAPTER 5. ADJUSTMENT PROCEDURE [1] ADJUSTMENT PROCEDURE ....................... 5-1

CHAPTER 6. TROUBLESHOOTING TABLE [1] TROUBLESHOOTING TABLE ......................6-1 CHAPTER 7. MAJOR IC INFORMATIONS [1] MAJOR IC INFORMATIONS .........................7-1 CHAPTER 8. BLOCK DIAGRAM/OVERALL WIRING DIAGRAM [1] SYSTEM BLOCK DIAGRAM .........................8-1 [2] OVERALL WIRING DIAGRAM ......................8-2 CHAPTER 9. PRINTED WIRING BOARD [1] MAIN UNIT ....................................................9-1 [2] SUB UNIT......................................................9-5 [3] FRC UNIT......................................................9-8 [4] MINI-AV UNIT ..............................................9-12 [5] R/C, LED/KEY UNIT....................................9-13 CHAPTER 10. SCHEMATIC DIAGRAM [1] SCHEMATIC DIAGRAM ..............................10-1 Parts Guide

Parts marked with " " are important for maintaining the safety of the set. Be sure to replace these parts with specified ones for maintaining the safety and performance of the set.

This document has been published to be used for after sales service only. The contents are subject to change without notice.

LC-65RX1M

Service Manual

LC65RX1M

SAFETY PRECAUTION IMPORTANT SAFETY PRECAUTION

Service work should be performed only by qualified service technicians who are thoroughly familiar with all safety checks and the servicing guidelines which follow:

WARNING

•

1. For continued safety, no modification of any circuits should be attempted. 2. Disconnect AC power before servicing.

BEFORE RETURNING THE RECEIVER (Fire & Shock Hazard) Before returning the receiver to the user, perform the following safety checks:

3. Inspect all lead dress to make certain that leads are not pinched, and check that hardware is not lodged between the chassis and other metal parts in the receiver.

DVM AC SCALE

1.5k ohm 10W

5. To be sure that no shock hazard exists, check for leakage current in the following manner. •

Plug the AC cord directly into a 110 ~ 240 volt AC outlet.

•

Use an AC voltmeter having with 5000 ohm per volt, or higher, sensitivity or measure the AC voltage drop across the resistor.

0.15 µF TEST PROBE

TO EXPOSED METAL PARTS

CONNECT TO KNOWN EARTH GROUND

LC-65RX1M Precautions for using lead-free solder Employing lead-free solder •

L F a/a

LFa

Indicates lead-free solder of tin, silver and copper.

Using lead-free wire solder •

Soldering •

•

Be careful when replacing parts with polarity indication on the PWB silk.

Lead-free wire solder for servicing Part No. ZHNDAi123250E ZHNDAi126500E ZHNDAi12801KE

Description J J J

φ0.3mm 250g (1roll) φ0.6mm 500g (1roll) φ1.0mm 1kg (1roll)

Code BL BK BM

LC-65RX1M

Service Manual

LC65RX1M

CHAPTER 1. SPECIFICATIONS [1] SPECIFICATIONS Model

LC-65RX1M

Item LCD panel

65" (1639 mm) Advanced Super View & BLACK TFT LCD

Resolution

2,073,600 pixels (1920Ă&#x2014;1080)

Video Colour System

PAL/SECAM/NTSC 3.58/NTSC 4.43/PAL 60

TV Function

TV-Standard

PAL: B/G, D/K, I SECAM: B/G, D/K, K/K1, NTSC: M

Receiving VHF/UHF Channel CATV

44.25 - 863.25 MHz

TV-Tuning System

Auto Preset 99 ch

STEREO/BILINGUAL

NICAM: B/G, I, D/K A2 stereo: B/G

S1 - S41ch (including Hyperband)

Brightness

450 cd/m 2

Viewing angles

H : 176Âş V : 176Âş

Audio amplifier

7.5W X 2 + 15W

Speakers

10 X 4cm 2pcs, Ă&#x2DC;2cm 2pcs, Ă&#x2DC;5.5cm 1pc

Terminals Rear

Side

Rear

Antenna input

UHF/VHF 75

INPUT 1

VIDEO in, AUDIO in, COMPONENT in (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz)

INPUT 2

VIDEO in, AUDIO in, COMPONENT in (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz)

DIN type

INPUT 3

S-VIDEO in, VIDEO in, AUDIO in

INPUT 4

HDMI (HDMI input) (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz, 1080P/50Hz, 1080P/60Hz, 1080P/24Hz)

INPUT 5

HDMI (HDMI input) (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz, 1080P/50Hz, 1080P/60Hz, 1080P/24Hz)

INPUT 6

HDMI (HDMI input) (480I, 576I, 480P, 576P, 720P/50Hz, 720P/60Hz, 1080I/50Hz, 1080I/60Hz, 1080P/50Hz, 1080P/60Hz, 1080P/24Hz), AUDIO in (Ă&#x2DC; 3.5 mm jack)

INPUT 7 (PC input)

15 pin mini D-sub, AUDIO in (Ă&#x2DC; 3.5 mm jack)

MONITOR OUT

VIDEO out, AUDIO out

RS-232C

9 pin D-sub male connector

DIGITAL AUDIO OUTPUT Optical Digital Audio output Front

Headphone

OSD language

English/Simplified Chinese/Traditional Chinese/Arabic

Power Requirement

AC 110-240 V 50/60 Hz

Power Consumption

481 W (0.5 W Standby)

Weight

without stand

62.0 kg

with stand

66.0 kg

Operating Temperature

0Â°C - 40Â°C

1â&#x20AC;&#x201C;1

LC-65RX1M

Service Manual

LC65RX1M

CHAPTER 2. OPERATION MANUAL [1] OPERATION MANUAL

Part names TV (Front/Side)

POWER (On/Off) button

TV/VIDEO button Channel up ( )/down (

) buttons

Volume up ( )/down ( ) buttons

Such sensor is not applicable to this model Headphone jack

Remote control sensor OPC sensor POWER indicator

OPC indicator* SLEEP timer indicator

*OPC: Optical Picture Control

2â&#x20AC;&#x201C;1

LC-65RX1M TV (Rear)

INPUT 1 terminals

INPUT 4 (HDMI) terminal INPUT 2 terminals

SERVICE ONLY terminal*

INPUT 3 terminals AC INPUT terminal MONITOR OUTPUT terminals

* Usually do not connect anything to this terminal as it is reserved only for service personnel .

INPUT 6 (HDMI) terminals

DIGITAL AUDIO OUTPUT terminal Antenna input terminal

RS-232C terminal

INPUT 7 (PC) terminals

INPUT 5 (HDMI) terminal

2â&#x20AC;&#x201C;2

LC-65RX1M Remote control unit 7

2 3

4 5 6 7 8 9 10

13 14 15 16 17 18 19 20 21

(Mute) Mute the sound.

WIDE Change the wide image mode. 9 FREEZE Freeze a motion picture on the screen. 10 EXIT Turn off the On-Screen Display. 11 (TELETEXT) Select the TELETEXT mode. (all TV image, all TEXT image, TV/TEXT image) (Reveal hidden for TELETEXT) TELETEXT mode: Display hidden characters. (SUBTITLE for TELETEXT) To turn the subtitles on and off. (Hold) TELETEXT mode: Stop updating Teletext pages automatically. Press3 again to release the hold mode. (Subpage) Display the Teletext subpage directly. (Top/Bottom/Full) TELETEXT mode: Set the area of magnification. 12 TV/VIDEO (INPUT SOURCE) Select an input source. (TV, INPUT 1, INPUT 2, INPUT 3, INPUT 4, INPUT 5, INPUT6, INPUT7 (PC)) 13 HDMI Select an HDMI. (INPUT4, INPUT5, INPUT6) 14 DISPLAY Displays the channel or input information. Displays the time information included in the Teletext broadcast. 15 CH /CH TV input mode: Select the channel. TELETEXT mode: Select the page. 16 SLEEP Set the Sleep timer.

1 2

POWER (STANDBY/ON) To switch the power on and off. 0-9 Set the channel. TELETEXT mode: Set the page. (Flashback) Press to return to the previous selected channel or external input mode.

OPC To switch the Optical Picture Control on and off.

MPX Select the sound multiplex mode. VOL /VOL Set the volume.

17 AV MODE Select a video setting. 18 MENU Display the menu screen. 19 / / / (Cursor) Select a desired item on the setting screen. ENTER Execute a command. 20 RETURN MENU mode: Return to the previous menu screen. 21 Colour (Red/Green/Yellow/Blue) TELETEXT mode: Select the page. 22 AQUOS LINK buttons If external equipment such as a AQUOS BD Player is connected via HDMI-certified cables and is AQUOS LINK compatible, you can use these AQUOS LINK buttons. See pages 40 to 44 for details.

2â&#x20AC;&#x201C;3

LC-65RX1M

Service Manual

LC65RX1M

CHAPTER 3. DIMENSIONS [1] DIMENSIONS

Unit: mm 1579

124

149

597

806.5

1062 982

1431.5

398

When using wall mount bracket AN-65AG1

278

192

0°/5°/10°

Power code connection terminal

On the wall bracket of AN-65AG1, there is a letter 'A' indicating the centre point of the TV monitor.

Cable opening

650

325

125

440

3–1

LC-65RX1M

Service CHAPTER 4. REMOVING OF MAJOR PARTS LC65RX1M

Manual

[1] REMOVING OF STAND AND CABINET 1. REMOVING OF STAND 1. Remove the Stand fixing 4 screws. 2. Detach the Stand from Cabinet. 3. When the Rear Cabinet is removed with the stand applied, remove the stand rear cover fixing 2 screws, and the stand rear cover is removed.

2. REMOVING OF CABINET 1. Detach the Terminal Cover Top/Bottom. 2. Remove the Rear Cabinet fixing 31 screws. 3. Remove the Rear Cabinet fixing 14 screws. 4. Detach the Rear Cabinet.

2-2 Terminal Cover Top Rear Cabinet 2-3

2-3 1-1 Terminal Cover Bottom

2-3

Stand Stand Rear Cover

1-3

4â&#x20AC;&#x201C;1

LC-65RX1M

[2] REMOVING OF MAJOR PARTS FROM PANEL UNIT 1. REMOVING OF SPEAKER SUPPORT ANGLES 1. Remove the Speaker Support Sub Angle fixing 6 screws. 2. Remove the 14 screws and detach the Speaker Support Angles.

㪪㫇㪼㪸㫂㪼㫉㩷㪪㫌㫇㫇㫆㫉㫋㪪㫌㪹㩷㪘㫅㪾㫃㪼 1-1 1-2

㪪㫇㪼㪸㫂㪼㫉㩷㪪㫌㫇㫇㫆㫉㫋 1-1 1-1 㪪㫌㪹㩷㪘㫅㪾㫃㪼 1-2 1-2

㪪㫇㪼㪸㫂㪼㫉㩷㪪㫌㫇㫇㫆㫉㫋㪪㫌㪹㩷㪘㫅㪾㫃㪼

㪪㫇㪼㪸㫂㪼㫉㩷㪪㫌㫇㫇㫆㫉㫋㪘㫅㪾㫃㪼㪪㫇㪼㪸㫂㪼㫉㩷㪪㫌㫇㫇㫆㫉㫋㩷㪘㫅㪾㫃㪼

4–2

LC-65RX1M 2. REMOVING OF CHASSIS TRAY 1. Remove the 5 screws and detach the Chassis Tray.

3. REMOVING OF MINI-AV PWB 1. Disconnect the connecting cord. 2. Remove the 2 screws and detach the MINI-AV PWB Cover. 3. Detach the MINI-AV PWB. 4. Detach the MINI-AV PWB Holder. 5. Remove the 4 screws and detach the Side Chassis.

4. REMOVING OF KEY PWB 1. Remove the 3 screws and detach the Top Cover. 2. Remove the 2 screws and detach the Insulation Plate. 3. Disconnect the connecting cord. 4. Detach the KEY PWB. 5. Detach the Operate Button.

5. REMOVING OF SPEAKERS 1. Disconnect the connecting cord. 2. Detach the Speaker L/R and Sub woofer.

2-1

㪚㪿㪸㫊㫊㫀㫊㩷㪫㫉㪸㫐

㪦㫇㪼㫉㪸㫋㪼㪙㫌㫋㫋㫆㫅㪢㪜㪰㩷㪧㪮㪙㪫㫆㫇㩷㪚㫆㫍㪼㫉㪠㫅㫊㫌㫃㪸㫋㫀㫆㫅㩷㪧㫃㪸㫋㪼 4-1 䎾䎮䎰䏀

4-3 4-2 3-5 㪤㪠㪥㪠㪄㪘㪭㩷㪧㪮㪙㩷㪟㫆㫃㪻㪼㫉

3-2 䎾䎫䎰䏀䎾䎸䎶䏀䎾䎹䎧䏀

3-2

3-1

㪤㪠㪥㪠㪄㪘㪭㩷㪧㪮㪙

㪤㪠㪥㪠㪄㪘㪭㩷㪧㪮㪙㩷㪚㫆㫍㪼㫉

㪪㫀㪻㪼㪚㪿㪸㫊㫊㫀㫊

䎾䎶䎳䏀

䎾䎶䎳䏀 5-1

5-1 㪪㫇㪼㪸㫂㪼㫉

㪪㫌㪹㩷㪮㫆㫆㪽㪼㫉

4–3

䎾䎶䎳䏀

5-1 㪪㫇㪼㪸㫂㪼㫉

LC-65RX1M 6. REMOVING OF POWER PWB 1, POWER PWB 2 AND AC INLET PWB 1. Disconnect the connecting cord. 2. Remove the 6 screws and detach the POWER PWB 2. 3. Disconnect the connecting cord. 4. Remove the 6 screws and detach the POWER PWB 1. 5. Disconnect the connecting cord. 6. Remove the 6 screws and detach the AC INLET PWB.

7. REMOVING OF R/C, LED PWB 1. Remove the 1 screw and detach the CORNER F ANGLE (R BOTTOM). 2. Disconnect the connecting cord. 3. Remove the 2 screws and detach the R/C, LED PWB. 4. Detach the Irss Cover. 5. Detach the LED Cover.

6-2

6-1

䎾䎳䎳䎔䏀䎾䎳䎳䎕䏀䎾䎯䎤䎵䏀

䎾䎳䎯䏀䎾䎳䎨䏀

6-4

㪧㪦㪮㪜㪩㩷㪧㪮㪙㩷㪉㪧㪦㪮㪜㪩㪧㪮㪙㩷㪈

䎾䎳䎧䏀䎾䎯䎤䎯䏀

6-3 䎾䎳䎳䎔䏀䎾䎳䎳䎕䏀䎾䎤䎦䏀

6-3

6-6 䎾䎤䎦䏀

6-5

㪘㪚㩷㪠㪥㪣㪜㪫㩷㪧㪮㪙㪠㫉㫊㫊㩷㪚㫆㫍㪼㫉㪣㪜㪛㩷㪚㫆㫍㪼㫉 7-5 7-1

7-4 䎾䎵䎤䏀 7-2

㪩㪆㪚㪃㩷㪣㪜㪛㩷㪧㪮㪙 7-3

㪚㪦㪩㪥㪜㪩㩷㪝㩷㪘㪥㪞㪣㪜㩷㩿㪩㩷㪙㪦㪫㪫㪦㪤㪀

4–4

6-1

LC-65RX1M 8. REMOVING OF FRC PWB 1. Disconnect the connecting cord. 2. Remove the 4 screws and detach the FRC PWB.

8-1

䎾䎯䎤䎕䏀

8-1

䎾䎯䎥䏀

䎾䎯䎤䎘䏀

䎾䎯䎺䏀䎾䎩䎯䏀䎾䎯䎩䏀

䎾䎶䎦䎙䎕䎔䎔䏀䎾䎶䎦䎙䎕䎔䎕䏀

8-1

8-2

㪝㪩㪚㩷㪧㪮㪙

4–5

LC-65RX1M

[3] REMOVING OF MAJOR PARTS FROM CHASSIS TRAY 1. REMOVING OF MAIN PWB 1. Remove the 6 screw and detach the MAIN PWB Shield. 2. Disconnect the connecting cord. 3. Detach the MAIN PWB. 4. Remove the 6 screws and detach the MAIN PWB Cover.

2. REMOVING OF SUB PWB 1. Disconnect the connecting cord. 2. Remove the 2 screws and detach the Terminal Cover Side. 3. Remove the 2 screws and detach the Tuner Cover. 4. Remove the 7 screws and detach the SUB PWB.

1-1 㪤㪘㪠㪥㩷㪪㪿㫀㪼㫃㪻

1-2 㪤㪘㪠㪥㩷㪧㪮㪙

2-4

1-2

䎾䎩䎵䏀䎾䎯䎥䏀䎾䎳䎧䏀䎾䎸䎶䏀

2-1

2-1 䎾䎹䎧䏀䎾䎮䎰䏀

䎾䎶䎳䏀

1-2

㪫㪼㫉㫄㫀㫅㪸㫃㩷㪚㫆㫍㪼㫉㩷㪪㫀㪻㪼

䎾䎳䎨䏀

䎾䎵䎤䏀

2-2 㪤㪘㪠㪥㩷㪧㪮㪙㪚㫆㫍㪼㫉

1-4

㪪㪬㪙㩷㪧㪮㪙 2-3 㪫㫌㫅㪼㫉㩷㪚㫆㫍㪼㫉

㪚㪿㪸㫊㫊㫀㫊㩷㪫㫉㪸㫐

4–6

LC-65RX1M

CHAPTER 5. ADJUSTMENT PROCEDUREService LC65RX1M

Manual

[1] ADJUSTMENT PROCEDURE 1. Adjustment method after PWB and/or IC replacement due to repair The unit is set to the optimum at the time of shipment from the factory. If any value should become improper or any adjustment is necessary due to the part replacement, make an adjustment according to the following procedure.

1. Procure the following units in order to replace the main unit, IC3301, IC8101, IC3501, IC3502, IC8301, IC8302, IC8303, or IC8304. MAIN UNIT:

DUNTKE630FM02

NOTE: [Caution when replacing ICs in the main unit (IC1501/IC1502/IC1503/IC2002) or the mini av unit (IC801)] The above ICs are EEPROMs storing the EDID data of HDMI and the monitor microcomputer. Before replacing the relevant part, procure the following parts in which the data have been rewritten. IC2002 IC801 IC1501 IC1502 IC1503

RH-IXB986WJNDQ RH-IXC284WJQZS RH-IXC285WJQZS RH-IXC286WJQZS RH-IXC287WJQZS

Monitor microcomputer INPUT4 INPUT5 INPUT6 INPUT7

2. After replacing the LCD panel or LCD control PWB, check PANEL_SIZE in the following procedure. 1) Enter the process adjustment mode. 2) Use the cursor keys

and CH

of R/C to select the item [PANEL_SIZE] on the page 32/32.

3) Verify that the panel size is displayed. 4) If the size doesn't match, select the values of the panel size with the Vol +/- keys. 5) After selection in Step 4), press the ENTER key, and it is completed with OK displayed. 3. After replacing the LCD panel or LCD control PWB, adjust the VCOM in the following procedure. 1) Enter the process adjustment mode. 2) Use the cursor keys

and CH

of R/C to select the item [VCOM ADJ] on the page 9/32.

3) Press the ENTER key to verify that the adjustment pattern is displayed. 4) Use the +/- keys of VOL of L/C to adjust the flicker in the center of the screen to minimum. 5) When the optimal state is achieved in Step 4, press the ENTER key to turn the pattern to OFF.

5â&#x20AC;&#x201C;1

LC-65RX1M 2. Entering and exiting the adjustment process mode 1. Press the “POWER” key on the set of running TV set to force off the power. 2. While holding down the “VOL (-)” and “TV/VIDEO” keys on the set at once, press the “POWER” key on the set to turn on the power. The letter “K” appears on the screen. 3. Next, hold down the “VOL (-)” and “CH (

)” keys on the set at once.

Multiple lines of character string appearing on the screen indicate that the set is now in the adjustment Process mode. If you fail to enter the adjustment process mode (the display is the same as normal startup), retry the procedure. (Another procedure) 4. Press the “MENU” key on the main unit to display OSD. 5. Move the cursor to SERVICE (OSD) using the cursor keys on the remote control. Then press the “MENU” key on the remote control to enter the service mode (adjustment process mode). 6. To exit the adjustment process mode after the adjustment is done, unplug the AC power cord to force off the power. (When the power is turned off with the remote controller, once unplug the AC power cord and plug it in again. In this case, wait 10 seconds or so before plugging.) CAUTION: Use due care in handling the information described here lest the users should know how to enter the adjustment process mode. If the settings are tampered with in this mode, unrecoverable system damage may result.

3. Remote controller key operation and description of display in adjustment process mode. 1. key operation Remote controller key CH (/)

Main unit key CH (

VOL (+/-)

)

VOL (+/-)

Cursor ( Cursor (

Function

/ /

) )

TV/VIDEO on remote controller RETURN ENTER

Moving an item (line) by one (UP/DOWN) Changing a selected item setting (+1/-1)

—

Turning a page (PREVIOUS / NEXT)

—

Changing a selected line setting (+10/-10)

—

Input source switching (toggle switching) (TV→EXT1~8)

— —

Returning to a present page Executing a function

Input mode is switched automatically when relevant adjustment is started so far as the necessary input signal is available.

4. Description of display (1) Page/ of present number of total pages (5) Inducing display (3) Input that has been selected now (2) Page present title (4) Present colour system (6) Model name

1/32

[INFO]

MAIN Version BOOT Version Monitor Version FRC Version CPLD Version EQ DATA CHECKSUM LAMP ERROR MONITOR ERR CAUSE NORMAL STANDBY CAUSE ERROR STANDBY CAUSE

INPUT1

AUTO

Description Page/ of present number of total pages Page present title Input that has been selected now Present colour system Inducing display Model name Item name Parameter

42E_D83

1.00 (E 2007/07/10 D) 1.0 a6 ROM 0 11 11 11 11 0 1) 0 0H 0M 4) 0 0H 0M

(7) Item name

No. (1) (2) (3) (4) (5) (6) (7) (8)

???

2) 0

3) 0 0H 0M

0H 0M

5) 0 0H 0M

(8) Parameter

Display specification 2char/2char Decimal Number mark. It bundles it by Max. 15 char “[“ ”]”. TV/INPUT1/INPUT2/INPUT3/INPUT5/INPUT6/INPUT7/INPUT8 NTSC/PAL/SECAM/COMP15K/COMP33K/COMP45K/COMP28K/COMP31K EUROPE/RUSSIA/SWEDEN MODEL NAME Max. 30 char Max. 60 char

5–2

LC-65RX1M 5. Adjustment process mode menu The character string in brackets [ ] will appear as a page title in the adjustment process menu header. Page 1/35

Line

Description

1 2 3 4 5 6 7 8 9

Item [INFO] MAIN Version BOOT Version Monitor Version FRC Version CPLD Version EQ DATA CHECKSUM LAMP ERROR MONITOR ERR CAUSE NORMALSTANDBY CAUSE

ERROR STANDBY CAUSE

[1] 00H 00M [2] 00H 00M [3] 00H 00M [4] 00H 00M [5] 00H 00M

1 2

[INIT] INDUSTRY INIT INDUSTRY INIT(-Hotel)

Enter OFF

3 4 5 6 7 8 9 10 11 12 13

HOTEL MODE Center Acutime RESET Backlight Acutime RESET LAMP ERROR RESET ADJ PARAM SET VIC XPOS VIC YPOS VIC SIGNAL TYPE VIC READ

OFF 5H 0M OFF 19H 35M OFF OFF Enter 0 0 MAIN OFF

2/35

3/35 1 2 3 4 5 6 7 8 9 4/35 1 2 3 4 5 6 5/35 1 2 3 4 6/35 1 2 3 4 5 6 7

[TUNER ADJ] RF AGC ADJ TUNER ADJ PAL+TUNER ADJ RF AGC ADJ(CA-8CH) TUNER ADJ(CA-8CH) PAL+TUNER ADJ(CA-8CH) RF AGC TUNER DAC RF AGC READ [PAL MAIN] PAL ADJ SECAM ADJ N358 ADJ PAL CONTRAST SECAM CONTRAST N358 CONTRAST [CEC TEST] HDMI CEC TEST INSPECT USB TERM MONIDATA READ[TEMP/OPC] CAUSE RESET [COMP15KMAIN] COMP15K ALL ADJ COMP15K MAIN Y GAIN COMP15K MAIN CB GAIN COMP15K MAIN CR GAIN COMP15K Y OFFSET COMP15K CB OFFSET COMP15K CR OFFSET

Remarks (adjustment detail, etc.) Main software version BOOT Version. Monitor software version FRC Version CPLD Version. Audio data checksum. Number of termination due to lamp error. Last error standby cause. Situation that became standby at the end. (Excluding the error) Error standby cause Total operating time before error.

Initialization to factory settings execution. Initialization to factory settings execution. (Hotel mode is excluded) Hotel mode setting execution. Main operating hours. Main operating hours reset. Backlight operating hours. Backlight operating hours reset. Lamp error reset. ADJ PARAM SET X-coordinate setting for VIC READ Y-coordinate setting for VIC READ Signal type setting for VIC READ Picture level acquisition function (Level appears in green on the upper right)

Enter Enter Enter Enter Enter Enter 25 164 OFF

RF-AGC auto adjustment execution TUNER auto adjustment execution PAL TUNER auto adjustment execution RF-AGC auto adjustment execution (CA-8CH) TUNER auto adjustment execution (CA-8CH) PAL TUNER auto adjustment execution (CA-8CH) RF AGC adjustment TUNER signal level adjustment

Enter Enter Enter 124 130 121

PAL adjustment SECAM adjustment N358 adjustment PAL contrast adjustment SECAM CONTRAST adjustment N358 CONTRAST adjustment

Enter Enter OFF Enter

CEC test

Enter 200 210 209 65 512 513

MONITOR Temperature/ OPC Acquisition tool.

Component 15K picture level adjustment Y GAIN adjustment value Cb GAIN adjustment value Cr GAIN adjustment value Y OFFSET adjustment value Cb OFFSET adjustment value Cr OFFSET adjustment value

5â&#x20AC;&#x201C;3

LC-65RX1M Page 7/35

Line 1 2 3 4 5 6 7

8/35 1 2 3 4 5 6 7 9/35 1 2 3 4 10/35 1 2 3 4 5 6 7 8 11/35 1 2 3 4 5 6 12/35 1 2 3 4 5 6 7 8 9 13/35 1 2 3 4 5 6 7 8 9

Item [HDTV] HDTV ADJ HDTV Y GAIN HDTV CB GAIN HDTV CR GAIN HDTV Y OFFSET HDTV CB OFFSET HDTV CR OFFSET [ANALOG PC] ANALOG PC ADJ R OFFSET G OFFSET B OFFSET R GAIN G GAIN B GAIN [LUMAADJ] VCOM ADJ LCD LUMA ADJ LCD LUMA UP LCD LUMA DOWN [FR DDRTEST] DDRA TEST1 DDRA TEST2 DDRB TEST1 DDRB TEST2 DDRB TEST3 FRC ON/OFF SOUSAM DDR BIST SOUSAS DDR BIST [LEV] LEV1 LEV2 LEV3 LEV4 LEV5 LEV6 [MGXX1] MG1R MG1G MG1B MG2R MG2G MG2B MG3R MG3G MG3B [MGXX2] MG4R MG4G MG4B MG5R MG5G MG5B MG6R MG6G MG6B

Description

Remarks (adjustment detail, etc.)

Enter 197 211 208 65 513 513

HDTV video level adjustment HDTV Y GAIN adjustment value HDTV Cb adjustment value HDTV Cr adjustment value HDTV Y OFFSET adjustment value HDTV Cb OFFSET adjustment value HDTV Cr OFFSET adjustment value

Enter 64 63 64 195 188 198

DVI ANALOG video level adjustment R CUTOFF adjustment value G CUTOFF adjustment value B CUTOFF adjustment value R DRIVE adjustment value G DRIVE adjustment value B DRIVE adjustment value

62 Enter 0 0 Enter Enter Enter Enter Enter Enter Enter Enter 176 352 528 656 800 928 185 162 141 366 324 286 544 486 443

W/B adjustment, gradation 1R adjustment value W/B adjustment, gradation 1G adjustment value W/B adjustment, gradation 1B adjustment value W/B adjustment, gradation 2R adjustment value W/B adjustment, gradation 2G adjustment value W/B adjustment, gradation 2B adjustment value W/B adjustment, gradation 3R adjustment value W/B adjustment, gradation 3G adjustment value W/B adjustment, gradation 3B adjustment value

674 604 561 812 737 700 928 855 843

W/B adjustment, gradation 4R adjustment value W/B adjustment, gradation 4G adjustment value W/B adjustment, gradation 4B adjustment value W/B adjustment, gradation 5R adjustment value W/B adjustment, gradation 5G adjustment value W/B adjustment, gradation 5B adjustment value W/B adjustment, gradation 6R adjustment value W/B adjustment, gradation 6G adjustment value W/B adjustment, gradation 6B adjustment value

5â&#x20AC;&#x201C;4

LC-65RX1M Page 14/35

Line 1 2 3 4 5 6 7 8 9 10

15/35 1 2 3 4 5 6 7 8 16/35 1 2 3 4 5 6 7 8 17/35 1 2 18/35 1 2 3 4 5 6 7 8 9 10 11 12 13 19/35 1 2 3 4 5 6 7 8 9 10 11 12 13

Item [G CO POS] MODE SELECT POS SELECT POS MIN POS MID1 POS MID2 POS MID3 POS MID4 POS MID5 POS MID6 POS MAX [G CO CD] CD MIN CD MID1 CD MID2 CD MID3 CD MID4 CD MID5 CD MID6 CD MAX [G CO VOL] CALC RESET VAL1 VAL2 VAL3 VAL4 VAL5 VAL6 [ACTIVEBL1] ABL TEST MODE PRINT DEBUG [SOUND1] AUDIO_PARAMETER_SWITCH AU_FLAT INPUT_MIXER_GAIN OUTPUT_MIXER_GAIN PEQ1_F0 PEQ1_Q PEQ1_GAIN PEQ2_F0 PEQ2_Q PEQ2_GAIN PEQ3_F0 PEQ3_Q PEQ3_GAIN [SOUND 2] PEQ4_F0 PEQ4_Q PEQ4_GAIN PEQ5_F0 PEQ5_Q PEQ5_GAIN GAIN_ADJUSTER1 GAIN_ADJUSTER2 GAIN_ADJUSTER3 GAIN_ADJUSTER4 GAIN_ADJUSTER5 GAIN_ADJUSTER6_SP GAIN_ADJUSTER6_HP

Description FACTORY WB IN 0 176 352 528 656 800 928 1023 0 0 0 0 0 0 0 0 OFF OFF 100 100 100 100 100 100 Enter OFF ROM

5–5

Remarks (adjustment detail, etc.)

LC-65RX1M Page 20/35

Line 1 2

21/35 1 2 3 4 5 22/35 1 2 3 4 5 6 7 8 9 10 11 12 23/35 1 2 3 4 5 6 7 8 9 10 11 24/35 1 2 3 4 5 6 7 8 9 10 25/35 1 2 3 4 5 6 7 8 9 10 11 12

Item [SOUND 3] LOUT1_VOLUME_CONTROL ROUT1_VOLUME_CONTROL [M PWM] PWM PWM FREQ PWM DUTY OSC FREQ OSC DUTY [M OPC1] OPC LDUTY0 OPC LDUTY1 OPC LDUTY2 OPC LDUTY3 OPC LDUTY4 OPC LDUTY5 OPC LDUTY6 OPC LDUTY7 OPC LDUTY8 OPC LDUTY9 OPC LDUTY10 OPC LDUTY11 [M OPC2] OPC LDUTY12 OPC LDUTY13 OPC LDUTY14 OPC LDUTY15 OPC LDUTY16 OPC LDUTY17 OPC LDUTY18 OPC LDUTY19 OPC LDUTY20 OPC LDUTY21 OPC LDUTY22 [M OPC3] OPC LDUTY23 OPC LDUTY24 OPC LDUTY25 OPC LDUTY26 OPC LDUTY27 OPC LDUTY28 OPC LDUTY29 OPC LDUTY30 OPC LDUTY31 OPC LDUTY32 [M ADL1] OPC33 ADLEVEL 0 OPC33 ADLEVEL 1 OPC33 ADLEVEL 2 OPC33 ADLEVEL 3 OPC33 ADLEVEL 4 OPC33 ADLEVEL 5 OPC33 ADLEVEL 6 OPC33 ADLEVEL 7 OPC33 ADLEVEL 8 OPC33 ADLEVEL 9 OPC33 ADLEVEL 10 OPC33 ADLEVEL 11

Description

5–6

Remarks (adjustment detail, etc.)

LC-65RX1M Page 26/35

Line 1 2 3 4 5 6 7 8 9 10 11

27/35 1 2 3 4 5 6 7 8 9 28/35 1 2 3 4 5 6 7 29/35 1 2 3 4 5 6 7 30/35 1 2 3 31/35 1 2 3 4 5 32/35 1 33/35 1 2 3 4 5 6

Item [M ADL2] OPC33 ADLEVEL 12 OPC33 ADLEVEL 13 OPC33 ADLEVEL 14 OPC33 ADLEVEL 15 OPC33 ADLEVEL 16 OPC33 ADLEVEL 17 OPC33 ADLEVEL 18 OPC33 ADLEVEL 19 OPC33 ADLEVEL 20 OPC33 ADLEVEL 21 OPC33 ADLEVEL 22 [M ADL3] OPC33 ADLEVEL 23 OPC33 ADLEVEL 24 OPC33 ADLEVEL 25 OPC33 ADLEVEL 26 OPC33 ADLEVEL 27 OPC33 ADLEVEL 28 OPC33 ADLEVEL 29 OPC33 ADLEVEL 30 OPC33 ADLEVEL 31 [M V6THE] V6 OS THERMO 1 V6 OS THERMO 2 V6 OS THERMO 3 V6 OS THERMO 4 V6 OS THERMO 5 V6 OS THERMO 6 V6 OS THERMO 7 [M V5THE] V5 OS THERMO 1 V5 OS THERMO 2 V5 OS THERMO 3 V5 OS THERMO 4 V5 OS THERMO 5 V5 OS THERMO 6 V5 OS THERMO 7 [M BLCTL TEMP] BL TEMP1 BL TEMP2 BL TDUTY [M EEP SET] MONITOR TIME OUT MONITOR MAX TEMP MONITOR EEP READ / WRITE MONITOR EEP ADR MONITOR EEP DATA [M TEST PATTERN] LCD TEST PATTERN [MEM CLEAR] KEY LOCK(1217) KOUTEI AREA ALL CLEAR A MODE AREA CLEAR BACKUP AREA CLEAR B MODE AREA CLEAR EXECUTION

Description

Remarks (adjustment detail, etc.)

72 86 96 108 120 132 144 72 86 96 108 120 132 144

ON 43 WRITE 0x 0 0x 0 OFF

Monitor and the main communication time-out setting MONITOR MAX temperature setting MONITOR EEPROM READ/WRITE Setting/execution MONITOR EEPROM arbitrary addressing MONITOR EEPROM arbitrary data specification Pattern with built-in LCD controller display

Enter Adjustment value clearness in all areas in process Adjustment value clearness of process A mode Adjustment value clearness in process backup area Adjustment value clearness of process B mode Clear execution

5–7

LC-65RX1M Page 34/35

Line 1 2 3

Item [FR REGI] READ/WRITE SLAVE ADDRESS REGISTOR ADDRESS

WRITE DATA

READ DATA

1 2 3 4 5 6 7 8

[ETC] EEP SAVE EEP RECOVER MONITOR ERROR CAUSE RESET STANDBY CAUSE RESET MODEL NAME PANEL SIZE PRODUCT EEP ADR PRODUCT EEP DATA

35/35

Description

Remarks (adjustment detail, etc.)

READ SLAVE0 0x 0 0x 0 0x 0 0x 0 0x 0 0x 0 OFF OFF OFF OFF RX1 65 0x 0 0x 0

Writing setting values to EEPROM. Reading setting values from EEPROM. Reset stand by cause. Model name setting Panel size setting.

5–8

LC-65RX1M 6. Special features 1. NORMAL STANDBY CAUSE (Page 1/32) Display of a cause (code) of the last standby. The cause of the last standby is recorded in EEPROM whenever possible. Checking this code will be useful in finding a problem when you repair the troubled set. 2. EEP SAVE (Page 32/32) Storage of EEP adjustment value 3. EEP RECOVER (Page 32/32) Retrieval of EEP adjustment value from storage area.

7. Lamp error detection 1. Function This LCD color TV set incorporates a lamp error detection feature that automatically turns off the power for safety under abnormal lamp or lamp circuit conditions. If by any chance anything is wrong with the lamp or lamp circuit or if the lamp error detection feature is activated for some reason, the following will result. 1) The power is interrupted in about 6 seconds after it is turned on. (The power LED on the front of the TV set turns red from green and keeps blinking in red: ON for 250 ms and OFF for 1 sec.). 2) If the above phenomenon 1) occurs 5 times consecutively, it becomes impossible to turn on the power. (The power LED remained red). 2. Measures 1) Checking with lamp error detection OFF Enter the adjustment process mode, referring to 1. Entering and exiting the adjustment process mode. If there is a problem with the lamp or lamp circuit, the lamp will go out. (The power LED is green.) Then, you can check the operation to see if the lamp and lamp circuit are in trouble. 2) Resetting the lamp error count After the lamp and lamp circuit are found out of trouble, reset the lamp error count. If a lamp error is detected five consecutive times, the power cannot be turned on. Using the cursor (UP/DOWN) key, move to the cursor to [LAMP ERROR RESET], Line 8 on adjustment process mode service page 2/33. With the cursor (LEFT/RIGHT) keys, select the [LAMP ERROR RESET] value. Finally press the cursor (ENTER) eys to reset the value to “0”.

Table of contents of adjustment process mode Page 2/32

[INIT] INDUSTRY INIT INDUSTRY INIT(-Hotel) HOTEL MODE Center Acutime RESET Backlight Acutime RESET LAMP ERROR RESET ADJ PARAM SET VIC XPOS VIC YPOS VIC SIGNAL TYPE VIC READ

Enter OFF OFF OFF OFF OFF Enter 0 0 MAIN OFF

5–9

Resetting to "0"

LC-65RX1M 8. STANDBY CAUSE FUNCTIONS This model is equipped with a STANDBY CAUSE FUNCTIONS which stores the cause of why the unit is turned off and displays it on adjustment process mode. 1. NORMAL STANDBY CAUSE ERROR CODE here indicates cause of standby in normal operation or Function of the Unit. No display when the unit is turned off with R/C. Only the latest cause is indicated. 2. ERROR STANDBY CAUSE ERROR CODE here indicates cause of Error in the unit. It also indicates accumulated operating times of the unit. The last five histories are displayed. 1)-5) five histories 1) is the latest. When there is no error, error code is ‘0’ and no characters appear. 3. MONITOR ERROR CAUSE When the monitor micom detects an error, ERROR CODE is displayed. The number of flashing Power LED and OPC LED indicates location of error detected. This number stores the latest four contents of the error. ‘0’ is displayed when no error. • NORMAL STANDBY CAUSE Display Code 2 3 6 8

Indication NO_OPERT NO_SIGNA SLEEP_TM OFF_232C

Description in the cause of “no operation off” in the cause of “no signal off” in the cause of “SLEEP timer” in the cause of command by RS-232C

• ERROR STANDBY CAUSE Display Code 17

Indication E_AVCTMP

Description in the cause of abnormal temperature

• MONITOR ERROR CAUSE Display 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E

Error Reason Initial Communication Error 1 Initial Communication Error 2 Initial Communication Error 3 Initial Communication Error 4 Initial Communication Error 5 Initial Communication Error 6 Initial Communication Error 7 Initial Communication Error 8 Initial Communication Error 9 Communication Error A Communication Error B Communication Error C Communication Error D Communication Error E Communication Error F Communication Error G Communication Error H Communication Error I Communication Error J Communication Error K Power (RED) LED Blink 0 Power (RED) LED Blink 1 Power (RED) LED Blink 2 Power (RED) LED Blink 3 Power (RED) LED Blink 4 Power (RED) LED Blink 5 Power (RED) LED Blink 6 Power (RED) LED Blink 7 Power supply Error 1 Power supply Error 2

Not used Cannot receive initial communication from main CPU Receive initial communication only To the communication setting reception To the initialization completion reception To the notice of version reception To the notice of start information reception To the start information answer reception To the time-out setting reception Request Time-out Restart Time-out End sequence Time-out Reserve start Time-out when End seqence Download Start Time-out Get Time Start Time-out Not used Watchdog Time-out Not used Not used Not used Not used Lamp Error AC_DET Error Not used Not used Monitor Temperature Error Not used Not used PS_ON(DET_10V) Error Not used

5 – 10

Power (RED) LED Blink Times

OPC LED Blink Times

3 times 3 times 3 times 3 times 3 times 3 times 3 times 3 times 3 times 3 times Off Off 3 times Off

1 time 2 times 2 times 2 times 2 times 2 times 2 times 2 times Off 4 times Off Off Off Off

3 times

1 time 2 times

Off 1 time

5 times

Off

2 times

3 times

LC-65RX1M Display 1F 20 21 22 23 24

Error Reason Power supply Error 3 Power supply Error 4 Power supply Error 5 Power supply Error 6 Main micom Error Power supply Error 7

Not used D_POW(DET_D3V3) Error Panel Power Error Not used Error Standby request from Main CPU AC_DET Error (during power on sequence)

5 â&#x20AC;&#x201C; 11

Power (RED) LED Blink Times

OPC LED Blink Times

2 times 2 times

4 times 5 times

2 times 2 times

7 times 1 time

LC-65RX1M 9. Public Mode (Hotel Mode) 1. Starting the Public Mode •

There are two following ways to display the PUBLIC Mode setting screen.

1) On the process adjustment mode screen (2/32), set the “HOTEL MODE” Flag to ON. Turn off the power, and turn it on again, pressing the CHANNEL UP and

Volume UP keys of the main unit at the same time.

2) Enter the Pass Word, and start the unit. a) Turn on the power, pressing the INPUT and

Volume UP keys of the main unit at the same time.

b) Display the Pass Word input screen.

Operation procedure •

The initial input position is the digit at the left end.

•

For the numeric keys 0 to 9 of R/C, key input is accepted. Input of the other keys is prohibited.

•

Change “-” to “*” by inputting the numeric key at the input position, and shift the input position rightward one digit.

•

When three digits are completely input, the Pass Word is judged.

c) Check the Pass Word by inputting three digits. If the Pass Word is 0

, it shifts to the PUBLIC Mode setting screen.

In another case, the screen is erased, and it operates in the ordinary mode. 2. Exiting the Public Mode screen •

There are two following ways to exit the Public Mode setting screen.

1) Turn off the power. 2) Select “Execution” in the PUBLIC_Mode to execute it. Activate the restart under the set content. Here, the START input SOURCE setting is excluded since this item is referred to only when the power is turned on. 3. Set value of the Public Mode •

Each set value in the PUBLIC Mode is initialized when the factory setting is applied. (The setting of the PUBLIC MODE Flag in the process adjustment mode screen is not changed.)

5 – 12

LC-65RX1M 4. Basic operation in the Public Mode Volume +/- or Cursor Channel sor

Change or execution of the set value.

Movement to the selected item.

or Cur-

Decision (ENTER) PUBLIC Mode R/C

Ordinary operation mode: PUBLIC Mode:

Execution (Used by the items “Execution” and “RESET”.) It enters the PUBLIC Mode. PUBLIC MODE Flag is set to “ON”. It exits the PUBLIC Mode. PUBLIC MODE Flag does not change. Any set item in PUBLIC Mode is not initialized.

Public Mode POWER ON FIXED

[VARIABLE]

SHUT DOWN MODE

[NORMAL]

MAXIMUM VOLUME

[60]

VOLUME FIXED

[VARIABLE]

VOLUME FIXED LEVEL

[20]

RC BUTTON

[RESPOND]

PANEL BUTTON

[RESPOND]

MENU BUTTON

[RESPOND]

AV POSITION FIXED

[VARIABLE]

ON SCREEN DISPLAY INPUT MODE START INPUT MODE FIXED LOUD SPEAKER

[YES] [NORMAL] [VARIABLE] [ON]

RC PATH THROUGH

[OFF]

232C POWON

[DISABLE]

HOTELMODE

[ON]

RESET EXECUTE 5. Operation after “RESET” Select “RESET” in the PUBLIC Mode, and it operates as follows when it is executed (refer to the basic operation). •

The set contents in the PUBLIC mode are initialized.

•

It does not exit the PUBLIC mode.

•

PUBLIC MODE Flag does not change. (It is not set to OFF.)

5 – 13

LC-65RX1M 6. Setting items (* Item names and selective items are expressed in English.) 1) Power ON Fixed (POWER ON FIXED) Selection Default Function Keys disabled when not set to Default Remarks

“VARIABLE” or “FIXED” is selectable. (Loop is provided.) “VARIABLE” • When "FIXED" is set, “Power ON/Standby Key” of the main unit and R/C is disabled. • OFF_TIMER (SLEEP) The function does not work for any other standby factors (see below). • No operation OFF • No signal OFF (including the power management)

If the power button is pressed in the ordinary mode when set to “FIXED”, the caution is displayed for 5 seconds. When power button on the main unit is pressed

When power button on R/C is pressed

No Power off by power button.

No Power off by remote control.

The OSD display is an example. If another ODS is previously displayed, the status is reset (MENU or similar).

2) Volume Maximum Level [MAXIMUM VOLUME] Selection Default Function Exception Remarks

0~60 (Loop is not provided.) 60 • Even if VOL is adjusted to a value higher than the adjusted one, it is not set to that value. (Only the speakers of the main unit) • •

When it is set to 59 or less, the number is displayed and the volume bar is not displayed during operation in the ordinary mode. VOLUME can be abbreviated to VOL.

3) Volume Fixed [VOLUME FIXED] Selection Default Function Exception Keys disabled when not set to Default Remarks

“VARIABLE” or “FIXED” is selectable. (Loop is provided.) “VARIABLE” It is selectable whether or not the volume is fixed to the value adjusted in the volume fixed level mode. (Only the speakers of the main unit) • In the adjustment process, the volume can be set as desired regardless of this setting. • Volume high/low (VOL+/-) (Both R/C and main unit) • Mute (MUTE) • Volume Fixed is prior to Volume Maximum Level. • Even if the above disabled keys are operated, the volume is not displayed. • VOLUME can be abbreviated to VOL.

4) Volume Fixed Level [VOLUME FIXED LEVEL] Selection Default Function Exception Keys disabled when not set to Default Remarks

0~60 (Loop is not provided.) Currently set volume The volume is fixed to the adjusted value. (Only the speakers of the main unit) • In the adjustment process, the volume can be set as desired regardless of this setting.

• •

When Volume Fixed is set to “VARIABLE”, the setting is inhibited to change. VOLUME can be abbreviated to VOL.

5 – 14

LC-65RX1M 5) R/C Operation [RC BUTTON] Selection Default Function

Exception

Remarks

“RESP0ND” or “NO RESPOND” is selectable. (Loop is provided.) RESP0ND R/C key operation is set. When set to “NO RESPOND”, the R/C keys are disabled in the ordinary mode. The power key (Power ON/Standby Key) is also disabled. • Regardless of the setting contents, the process mode, inspection mode and PUBLIC_Mode Key are enabled. • Regardless of the setting contents, all keys can be used while entering the process mode, inspection mode or PUBLIC_Mode. The CARD function stops all functions including the input switching and direct key when set to “NO RESPOND”.

6) Main Unit Operation [PANEL BUTTON] Selection Default Function Exception

“RESP0ND” or “NO RESPOND” is selectable. (Loop is provided.) RESP0ND NO RESPOND: Excluding power supply (Video/Standby key), the main unit keys are disabled. • Regardless of the setting contents, the start operation of the process mode, inspection mode and PUBLIC_Mode is enabled. • Regardless of the setting contents, all keys can be used while entering the process mode, inspection mode and PUBLIC_Mode.

7) MENU Operation [MENU BUTTON] Selection Default Function Exception

Key that becomes invalid excluding Default besides MENU Key because of setting Remarks

“RESP0ND” or “NO RESPOND” is selectable. (Loop is provided.) RESP0ND The MENU keys on the main unit and R/C MENU are disabled. • Regardless of the setting contents, the start operation of the process mode, inspection mode and PUBLIC_Mode is enabled. • Regardless of the setting contents, all keys can be used whileentering the process mode, inspection mode or PUBLIC_Mode. ON_TIMER, Auto Preset, Manual_Memory, and clock setting All Direct Shift keys to the MENU display

When set to “NO RESPOND”, • ON_TIMER is set to “OFF”.

8) ODS Display [ON SCREEN DISPLAY] Selection Default Function

Keys which can be enabled (Exquisite example) Keys disabled when not set to Default (Example) Remarks

“YES” or “NO” is selectable. (Loop is provided.) YES When set to “ON”, the following OSD is not displayed. Register, Setting, Adjustment MENU, Channel_Call, Volume Bar In the case of Wide Model, if the following operation is performed, it is immediately switched (since MENU can not be displayed). Input switching Brightness sensor, light control

Still screen, screen display, MENU, OFF_TIMER, A V Position, Wide Mode switch, Auto Instolation •

When set to “ON”, a) The OFF_TIMER (SLEEP TIMER) setting time is cleared.

9) Start Mode [INPUT MODE START] Selection Default Function Remarks

“NORMAL”, “TV(*Channel)”, “INPUT1”, “INPUT2” (Loop is provided.) NORMAL When the power is ON, the input source or channel to start is set. In the NORMAL mode, it follows the contents of Last_Memory. • When set to a mode other than “NORMAL”, a) It is inhibited to display the Channel Setting MENU and to set the Channel. b) On start with “ON_TIMER”, the set Channel of ON_TIMER is prior. • When set to “NORMAL”, “Mode Fixed (START MODE FIXED)” is set to “VARIABLE” to inhibit the selection.

5 – 15

LC-65RX1M 10)Mode Fixed [INPUT MODE FIXED] Selection Default Function Keys disabled when not set to Default (Example) Remarks

“VARIABLE” or “FIXED” is selectable. (Loop is provided.) VARIABLE When set to “FIXED”, it is disable to switch to other channel or input after start in the set value of “Start Mode (INPUT MODE START)”. Channel UP/Down, Direct, Channel Button, FLASHBACK, INPUT, STILL, Digit Select and Direct input switching • •

When “START MODE” is set to “NORMAL”, this item is disable to set. (Automatically set to “VARIABLE”.) When set to “FIXED”, The Channel setting MENU (Menu-setup-Auto Installation, Programme setup and Child Lock item hatching) and Input Selection MENU in MENU are not displayed.

10. Video signal adjustment procedure *

The adjustment process mode menu is listed in Section 4.

Signal generator level adjustment check (Adjustment to the specified level) • • •

Composite signal PAL : 0.7Vp-p ± 0.02Vp-p (Pedestal to white level) RGB signal : 0.7Vp-p ± 0.02Vp-p 15K component signal (50 Hz) : Y level : 0.7Vp-p ± 0.02Vp-p (Pedestal to white level) : PB, PR level : 0.7Vp-p ± 0.02Vp-p

1. Entering the adjustment process mode Enter the adjustment process mode according to Section 3. 2. RF AGC adjustment

Adjustment point Setting

Adjustment Conditions [Signal] PAL Split Field Colour Bar RF signal U/V

•

Adjustment procedure Feed the PAL Split Field colour bar signal (E-12ch) to TUNER. Signal level: 55 dB µV ± 1dB (75Ω LOAD)

[E-12CH] [Terminal] TUNER

㸡100% white 2

Auto adjustment performance

Page 3/32

Bring the cursor on [RF AGC ADJ] and press [ENTER] [RF AGC ADJ OK] appears when finished.

3. PAL signal & tuner adjustment

Adjustment point Setting

Adjustment Conditions [Signal] PAL Full Field Color Bar Composite or RF signal [Terminal] INPUT1 VIDEO INPUT TUNER

• • •

Adjustment procedure Feed the PAL full field colour bar signal (75% colour saturation) to INPUT1 VIDEO INPUT. Feed the RF signal (PAL colour bar) to TUNER. Make sure the PAL colour bar pattern has the sync level of 7:3 with the picture level.

㪲VIDEO IN SIGNAL]

㸡100% white 5 – 16

[RF Signal]

㸡100% white

LC-65RX1M 2

Adjustment point Auto adjustment performance

Adjustment Conditions Page 3/32

Adjustment procedure Bring the cursor on [PAL+TUNER ADJ] and press [ENTER] [PAL+TUNER ADJ OK] appears when finished.

4. SECAM adjustment

Adjustment point Setting

Adjustment Conditions [Signal] SECAM Full Field Colour Bar signal

•

Adjustment procedure Feed the SECAM full field colour bar signal (75% colour saturation) to INPUT1 VIDEO INPUT.

[Terminal] INPUT1 VIDEO IN

100% white

Auto adjustment performance

Page 4/32

Black

Bring the cursor on [SECAM ADJ] and press [ENTER] [SECAM ADJ OK] appears when finished.

5. N358 adjustment

Adjustment point Setting

Adjustment Conditions [Signal] N358 Full Field Colour Bar signal

•

Adjustment procedure Feed the N358 full field colour bar signal (75% colour saturation) to INPUT1 VIDEO INPUT.

[Terminal] INPUT1 VIDEO IN

100% white

Auto adjustment performance

Page 4/32

Black

Bring the cursor on [N358 ADJ] and press [ENTER] [N358 ADJ OK] appears when finished.

6. ADC adjustment (Component 15K)

Adjustment point Setting

Adjustment Conditions [Signal] COMP15K, 50Hz (576i) 100% Full Field Colour Bar signal

•

Adjustment procedure Feed the COMPONENT 15K (576i) 100% full field colour bar signal (100% colour saturation) to INPUT1 COMPONENT INPUT.

[Terminal] INPUT1 COMPONENT INPUT

100% white

Auto adjustment performance

Page 6/32

Black

Bring the cursor on [COMP15k ALL ADJ] and press [ENTER] [COMP15k ALL ADJ OK] appears when finished.

5 – 17

LC-65RX1M 7. ADC adjustment (Component 33K)

Adjustment point Setting

Adjustment Conditions [Signal] COMP33K, 50Hz (1080i) 100% Full Field Colour Bar signal

•

Adjustment procedure Feed the COMPONENT 33K 100% (1080i) full field colour bar signal (100% colour saturation) to INPUT1 COMPONENT INPUT.

[Terminal] INPUT1 COMPONENT INPUT

100% white

Auto adjustment performance

Page 7/32

Black

Bring the cursor on [HDTV ADJ] and press [ENTER] [HDTV ADJ OK] appears when finished.

8. DVI-I adjustment (ANALOG D-sub15PIN)

Adjustment point Setting

Adjustment Conditions [Signal] XGA 60Hz 100% Full Field Colour Bar signal

•

Adjustment procedure Feed the XGA 60Hz 100% full field colour bar signal (100% colour saturation) to INPUT7 PC IN.

[Terminal] INPUT7 PC IN

100% white

Auto adjustment performance

Page 8/32

Black

Bring the cursor on [DVI ANALOG PC ADJ] and press [ENTER] [DVI ANALOG PC ADJ OK] appears when finished.

11. White Balance Adjustment Adjustment gradation values (IN) appear on page 11/32 of process adjustment, and adjustment initial values (offset value) appear on pages 12/32 and 13/32. For white balance adjustment, adjust the offset values on pages 12/32 and 13/32. [Condition of the unit for inspection]: Modulated light: MAX (+16) [Adjustment reference device]

: Minolta CA-210

[Adjustment] Check that the values on page 11/32 of process adjustment are set as below. If not, change them accordingly. Point 1 (LEV1) Point 2 (LEV2) Point 3 (LEV3) Point 4 (LEV4) Point 5 (LEV5) Point 6 (LEV6)

176 352 528 656 800 928

1) Display the current adjustment status at point 6. (Page 11/32 of process adjustment) The display for checking the adjustment status is toggled by pressing the “6” button on the remote control. (Normal OSD display → “6” → display for check (OSD disappears) → “6” → normal OSD display → . . . ) 2) Read the value of the luminance meter. x=0.272, y =0.277 3) Change MG6R/MG6B (Adjustment offset value) on page 13/32 of process adjustment so that the values of the luminance meter approach x=0.272 and y =0.277. (Basically, G is not changed. If adjustment fails with R and B, change G. When G is lowered, the weaker of R and B must be fixed.) 4) Display the adjustment status of the current point 5. (Each time the “5” button on the remote control is pressed, the adjustment status check display is toggled.) (Normal OSD display → “5” → Check display (OSD disappears) → “5” → Normal OSD display → . . . ) Change MG5R/MG5B (adjustment offset value) on page 13/32 of process adjustment so that the values of the luminance meter approach x = 0.272 and y = 0.277.

5 – 18

LC-65RX1M 5) Repeat step 4) for points 4, 3, 2, and 1. [Adjustment reference standard value] Adjustment spec ± 0.002 Inspection spec ± 0.004 (point 1 and 2) Adjustment spec ± 0.001 Inspection spec ± 0.002 (Excluding the above-mentioned)

Adjusting procedure by use of [RS-232C]

1. Get ready the PC with COM port (RS-232C) running on Windows 95/98/ME/2000/XP operating system, as well as the RS-232C cross cable. 2. Start the unit with the RS-232C cable connected. 3. Start the terminal software. (The freeware readily available on the Internet will do.) 4. Make the following settings. Baud rate Data LENGTH Parity bit Stop bit Flow control

9,600 bps 8 bit None 1 bit None

5. If the settings are correct, the terminal software indicates “ERR” against pressing of the “ENTER” key. 6. After the settings are done correctly, it is possible to make an adjustment by typing in the command shown in the table below and pressing the “ENTER” key on the keyboard. 7. Command entry is successful if the terminal software indicates “OK” when the “ENTER” is pressed. If “ERR” is shown, retry to enter the command. 8. Send the process mode switching command to switch from the RS232C operation mode to the process mode. KRSW0001: “ERR” is returned. KKT10037: When “OK” is returned, the process mode becomes active. When “ERR”, start over from KRSW0001. 9. Send each adjustment command. RS-232C command list Command KYOF0000 OSDS0001 SBSL0016 MSET0001 MSET0004 LEV60928 MG6G **** MG6R **** MG6B **** LEV50800 MG5G **** MG5R **** MG5B **** LEV40656 MG4G **** MG4R **** MG4B **** LEV30528 MG3G **** MG3R **** MG3B **** LEV20352 MG2G **** MG2R **** MG2B **** LEV10184 MG1G **** MG1R **** MG1B **** MSET0003

Function Remote control disabled OSD display inhibited Light control level MAX Background adjustment start Initialization of adjustment value Graduation 6 (928-graduation adjustment) Adjustment of G of graduation 6 Adjustment of R of graduation 6 Adjustment of B of graduation 6 Graduation 5 (800-graduation adjustment) Adjustment of G of graduation 5 Adjustment of R of graduation 5 Adjustment of B of graduation 5 Graduation 4 (656-graduation adjustment) Adjustment of G of graduation 4 Adjustment of R of graduation 4 Adjustment of B of graduation 4 Graduation 3 (528-graduation adjustment) Adjustment of G of graduation 3 Adjustment of R of graduation 3 Adjustment of B of graduation 3 Graduation 2 (352-graduation adjustment) Adjustment of G of graduation 2 Adjustment of R of graduation 2 Adjustment of B of graduation 2 Graduation 1 (176-graduation adjustment) Adjustment of G of graduation 1 Adjustment of R of graduation 1 Adjustment of B of graduation 1 Writing of adjustment value

Remarks

0000 ~ 4095 0000 ~ 4095 0000 ~ 4095 Calculated value 0000 ~ 4095 0000 ~ 4095 Calculated value 0000 ~ 4095 0000 ~ 4095 Calculated value 0000 ~ 4095 0000 ~ 4095 Calculated value 0000 ~ 4095 0000 ~ 4095 Calculated value 0000 ~ 4095 0000 ~ 4095

5 – 19

LC-65RX1M 12. Confirmation item 1. Magi-Link Inspection The thing that the Magi-Link circuit operates is confirmed. 2. HDMI-CEC Inspection The thing that the HDMI-CEC circuit operates is confirmed.

13. Initialization to factory settings CAUTION: When the factory settings have been made, all user setting data, including the channel settings, are initialized. (The adjustments done in the adjustment process mode are not initialized.) Keep this in mind when initializing these settings.

Adjustment item Factory settings

Adjustment conditions ends by turning off the MAIN POWER key. (See to below caution)

Adjustment procedure [Factory setting with adjustment process mode] • Enter the adjustment process mode. • Move the cursor to [INDUSTRY INIT] on page 2/32. • “EXECUTING” display appears. • After a while, “SUCCESS” display appears, the setting is completed. When succeeding: Background color (green) When failing: Background color (red) The following items are initialized in the factory setting. 1) User settings 2) Channel data (e.g. broadcast frequencies) 3) Maker option setting 4) Password data

After adjustments, exit the adjustment process mode. To exit the adjustment process mode, turn off the MAIN power key. When the power is turned off with the remote control, unplug the AC power cord and plug it back in.

14. Upgrading the software 1. Turn off the AC power (Unplug the AC power cord). 2. Insert the upgrading USB flash memory for upgrade into the service slot. 3. While holding down the power button, plug in the AC power cord of the main unit to turn on the power. 4. Upgrade begins automatically. After the set starts, the upgrade screen like the figure below is displayed.

<SYSTEM UPGRADE> System Version: E0708021 BANK 1 30% BANK 2 0% STATUS UPDATING. . .

5. If any of the procedures fails, the following upgrade failure screen shows up. For the failing procedure, the “NG” marking turns red. NOTE: In such case, try to upgrade the software again. If it still fails, the hardware may be in trouble.

5 – 20

LC-65RX1M

<SYSTEM UPGRADE> System Version: E0708021 BANK 1 100%

BANK 2 44% STATUS UPDATING. . .

6. When all the procedures are complete, the following upgrade success screen shows up. The new software version can be confirmed on screen. The version number appears when each item has been successfully upgraded. Finally the main version number appears on screen.

<SYSTEM UPGRADE> System Version: E0708021 BANK 1 100%

BANK 2 100%

STATUS UPGRADE COMPLETE

7. Turn off the AC power (Unplug the AC power cord). Take out the upgrading USB flash memory. 8. Now the software has been upgraded. NOTE: Then get the set started and call the process adjustment screen 1/32 to check the main software version. CAUTION 1) Do not take out and put in the USB flash memory during formatting. 2) It takes about one minute to the rewriting completion. Please confirm the upgrade status on the screen becomes 100%.

5 â&#x20AC;&#x201C; 21

LC-65RX1M

Service CHAPTER 6. TROUBLESHOOTING TABLE LC65RX1M

Manual

[1] TROUBLESHOOTING TABLE No power or no startup.

Is the AC cord connector tightly connected to the set?

Reconnect the Ac cordtightly and turn on the power again.

YES Is the output voltage at pin(8) of PD plug(BU+5V) of RDENCA283WJQZ?

Replace the power unit (RDENCA283/284WJQZ) and ac inlet unit (RUNITKA477WJQZ).

YES Are the wire harness and other cables properly connected in the set?

Reconnect the wire harness and other cables properly set.

YES Is there the PS-ON signal and PNL-POW signal input at pin(4) and (6)of PD plug RDENCA283WJQZ?

Check the PS ON signal line PNL POW signal line.

Replace the power unit (RDENCA283/284WJQZ) and ac inlet unit (RUNITKA447WJQZ).

Check the DC/DC converters and control line.

YES Is the output voltage of each pin on PD plug of RDENCA283WJQZ? pin8 5V pin11 and 12 15V YES Are the DC/DC converter outputs and the output voltages along the control line? (SUB) 5V (IC402,Q402) 1.5V(IC403) 9V (IC404) B3.3 (IC406) YES Are the DC/DC converter outputs and the output voltages along the control line? (MAIN) 3.3V (Q9607,IC9601ete) 1.8V(Q9609,IC9606ete) 1.3V(Q9610,IC9603ete) 5V(IC9602) 2.5V(IC9605) 1.2V(Q9606,IC9604ete) BU3.3V(IC1805)

6â&#x20AC;&#x201C;1

LC-65RX1M The sound is not emitted from the speaker though the picture has come out.

No sound output in all modes? (Speaker-L/R) TEREMINAL UNIT: Is the audio signal output of pins (38) (L-ch) and (39) (R-ch) of IC1404 (CODEC) normal?

Check IC1404 and its peripheral circuits.

YES Is audio signal input to pin (5/L), pin (9/R) of IC1301 (AMP)?

Check the line between IC1404 and IC1301.

YES Is MUTE circuit [SP_MUTE_LINE, S_STBY_LINE] normal?

Check the SP_MUTE_LINE and S_STBY_LINE. (Q1302, etc.)

Check IC1301 and its peripheral circuits.

Is the audio signal output of pins (11) of IC1951 normal?

Check IC1404, IC1403, IC1951 and its peripheral circuits.

YES Is audio signal input to pin (5) of IC1901 (SUB AMP)?

Check the line between IC1951 and IC1901.

YES Is MUTE circuit [SP_MUTE, S_STBY_LINE] normal?

Check the SP_MUTE_LINE and S_STBY_LINE.

YES Is the audio signal output of pins (1, 2) of P1302?

Check IC1901 and its peripheral circuits.

YES Is the audio signal output of pins (6, 7) (L-ch) and (4, 5) (R-ch) of P1302 (AOUDIO-CONNECTOR) normal?

YES Check Speaker Box (right and left) and wire harness. No sound output in all modes? (Sub Woofer)

YES Check Speaker Box (Sub Woofer) and wire harness.

6â&#x20AC;&#x201C;2

LC-65RX1M No sound (during the reception of TV(ANALOG) broadcasting)

Does not the sound go out though the picture has come out when UHF/VHF is received? TEREMINAL UNIT: Is the IF signal output from pin (11) of TUNER (TU7501)?

Check the tuner and its peripheral circuits. Replace as required.

YES Is the SIF signal sent to pins (23) and (24) of IC7503 (IFDEMOD)?

Check FL7501 and its peripheral circuits.

YES Is the SIF signal input from pin (12) of IC7503 to pin (3) of IC1402 (SOUND MULTIPLEX DECODER)?

Check the line between IC7503 and IC1402. (Q7507, etc.)

YES Is audio signal input from pin (24/L-ch), (22/R-ch) of IC1402 to pin (61, 62) of IC1404 (CODEC)?

Check the line between IC1402 and IC1404.

YES Refer to “No sound output in all modes”. No sound from external input devices (1)

Does not the sound of the audio signal input to INPUT1 go out? Does not the sound of the audio signal input to INPUT2 go out? TEREMINAL UNIT: INPUT1 Is the audio signal properly sent to pins (5) (IN1_L) and (4) (IN1_R) of INPUT1(J1704)? INPUT2 Is the audio signal properly sent to pins (5) (IN2_L) and (4) (IN2_R) of INPUT2(J1702)? YES INPUT1 Is the audio signal properly sent to pins (51) (IN1_L) and (52) (IN1_R) of IC1404(CODEC)? INPUT2 Is the audio signal properly sent to pins (53) (IN2_L) and (54) (IN2_R) of IC1404(CODEC)?

Check the setting of an external input device that connects of J1704.

Check the setting of an external input device that connects of J1702.

Check the line between J1704 and IC1404.

Check the line between J1702 and IC1404.

YES Refer to “No sound output in all modes”.

6–3

LC-65RX1M No sound from external input devices (2)

Does not the sound of the audio signal input to INPUT3 go out? MINI AV_UNIT: Is audio signal output from pin (5/IN3-L), (4/IN3-R) of input terminal J901 to pin (3), (1) of connector P901?

Check connection of between from J901 to P901 and the external input device.

TERMINAL UNIT: YES Is audio signal input to pin (3/IN3-L), (1/IN3-R) of connector P501?

Check the connector (P901/P501).

YES Is audio signal input to pin (55/IN3-L), (56/IN3-R) of IC1404 (CODEC)?

Check the line between P501 and IC1404.

YES Is CVBS signal detection signal V3_PLUG signal from pin (7) in input terminal J901 normal?

Check the connection to J901 and external devices.

YES Is V3_PLUG signal input to pin (2) of IC506 (VIDEO SELECTOR)?

Everything from V3_PLUG_LINE J901 to pin (2) of IC506 is checked. (connector P901/P501 and etc.)

YES Refer to “No sound output in all modes”. No sound from external input devices (3)

Does not the sound of the audio signal input to INPUT4/5/6 (HDMI) go out?

Is picture of the signal input from INPUT4/5/6 displayed?

MAIN UNIT: YES Is the HDMI_SPDIF audio signal output from pin (W12) of IC3301 (VIDEO PROCESSOR) to pin (44) of connector SC1101? TERMINAL UNIT: YES Is HDMI_SPDIF audio signal input from pin (44) of connector SC501 to pin (5) of IC1404 (CODEC)?

Refer to “Does not the picture of the HDMI signal input to INPUT4/5/6 go out?”.

Check the line between IC3301 and SC1101, and their peripheral circuits.

Check the line between SC501 and IC1404. (SC1101/SC501, etc.)

YES Refer to “No sound output in all modes”.

6–4

LC-65RX1M No sound from external input devices (4)

Does not the sound of the audio signal input to INPUT6 (Analog) go out?

Does not the sound of the audio signal input to INPUT7 go out?

Whether “Analog” has selected it in the Audio setup of the HDMI option is checked. MAIN UNIT: YES Is audio signal sent from pin (2/L) and (3/R) of input terminal J1502 to pin (1) and (6) of IC1504 (SW)?

YES

NO Check the connection between J1502 and the peripheral circuit, the external input devices.

MAIN UNIT: Is audio signal sent from pin (2/L) and (3/R) of input terminal J1501 to pin (3) and (7) of IC1504 (SW)? NO Check the connection between J1501 and the peripheral circuit, the external input devices.

Is audio signal output from pin (15/HDMI_PC_L) and pin (11/HDMI_PC_R) of IC1504 to pin (24) and (26) of connector SC1101?

TERMINAL UNIT:

NO Check the line between IC1504 and SC1101, and their peripheral circuits.

YES

Is audio signal (HDMI_PC_L=MAIN_L, HDMI_PC_R=MAIN_R) sent to pins (24) and (26) of SC501?

YES Is audio signal input to pin (59/MAIN_L) and (60/MAIN_R) of IC1404 (CODEC)?

Check the connector (SC1101/SC501)

Check the line between P501 and IC1404.

YES Refer to “No sound output in all modes”. The audio signal is not output (1)

No audio signal output from AUDIO_OUTPUT terminal. TEREMINAL UNIT: Is audio signal output to pin (5/L-ch), (4/R-ch) of audio output terminal J1701?

NO Do pin (72)] of MONITOR_MUTE_LINE [IC506 (VIDEO_SELECTOR), pin (55)] of MUTE-A_ALL_LINE [MAIN_UNIT IC2002 (UCON) become H? NO Is the audio signal output of pins (40/L-ch) and (41/R-ch) of IC1404 (CODEC)?

YES

Check the connection to J1701 and external devices.

YES

Check the IC506,IC2002, its peripheral circuit and MONITOR_MUTE_LINE, MUTE-A_ALL_LINE. (Q512, Q511, D551, etc.)

YES

Check the line between IC1404 and J503. (IC1405, Q509, Q510, etc.)

NO Check IC1404 and its peripheral circuits.

6–5

LC-65RX1M The audio signal is not output (2)

No audio signal output from DIGITAL_AUDIO_OUTPUT terminal. TEREMINAL UNIT: Is audio signal output to pin (1) of digital sound output terminal D501?

NO Do pin (92) of SPDIF_MUTE_LINE [MAIN_UNIT IC9101 (CPLD)], pin (55) of MUTE-A_ALL_LINE [MAIN_UNIT IC2002 (UCON)] become H? NO Is an audio signal input from pin (23) of IC1404 (CODEC) to pin (2) of IC502, and is the logic signal input into pin (1)?

YES

Check D501 or peripheral circuits. (B3.3V_LINE, etc.)

YES

Check IC9101, IC2002, its circumference circuit and SPDIF_MUTE_LINE, MUTE-A_ALL_LINE. (Q521, D521, etc.)

YES

Check IC502 or peripheral circuits.

NO Check IC1404 and its peripheral circuits. The audio signal is not output (3)

No sound from HEADPHONE_OUTPUT terminal. LED_UNIT: Is the HP_PLUG signal input into pin (87) of MAIN_UNIT’s IC9101 (CPLD) from pin (6) of a headphone terminal (J101)?

Check the line between J1012 and IC9101. (P101/P2003,, etc.)

YES Is the audio signal output to pin (2)/L pin (3)/R of headphone terminal J101?

YES

Check HEAD-PHONE (J101) or peripheral circuits.

MAIN UNIT: NO Is the audio signal input into pin (12) and (13)of connector P2003 from pin (6)/L, (4)/R of Q2404?

YES

Check the line between P2003 and J101. (P101/P2003, etc.)

Check the pin (77) of CLONE_RC (IC9101 (CPLD)) and peripheral circuits (Q2403, Q2406 etc.).

YES

Check the line between Q2404 and P1101.

YES

Check the connector SC501/SC1101.

YES

Check pin (86) of MUTE circuit HP_MUTE_LINE [MAIN_UNIT IC9101 (CPLD) pin (86)] becomes H or not. (Q1402, Q1401, IC9101, etc.)

NO Do pin (1,3) of Q2404 become it?

YES Is the audio signal input into pin (5) and (2) of Q2404 from pin (68)/L, (70)/R of connector SC1101?

TERMINAL UNIT: NO Is audio signal sent to pins (68/L-ch), (70/R-ch) of SC501?

NO Is audio signal sent to pins (36/L-ch), (35/R-ch) of IC1404 (CODEC)?

NO Check IC1404 or peripheral circuits.

6–6

LC-65RX1M No picture on the display (1)

The picture doesn't appear in all modes. MAIN UNIT: Is LVDS signal output from 1st_channel and 2nd_channel of IC3301(VIDEO PROCESSER) in each mode? TA1_P/M (A14/B14), TB1_P/M (A15/B15), TC1_P/M (A16/B16), TD1_P/M (A18/B18), TE1_P/M (A19/B19), TCLK1_P/M (A17/B17), TA2_P/M (A20/B20), TB2_P/M (C20/D19), TC2_P/M (D20/E19), TD2_P/M (F20/G19), TE2_P/M (G20/H19), TCLK2_P/M (E20/F19) NO Check IC3301 and its peripheral control circuits. (IC2002, IC8101, IC3501, IC3502, etc.)

YES Is the above-mentioned LVDS signal output to connector P2601?

Check the line between IC3301 and P2601.

YES Is LCD controller's control signal normal?

control signals R/L_LINE, U/D_LINE, TEMP1/2/3_LINE, DET_PNL12V, ROMSEL0_LINE, ROMSEL1_LINE, and it peels off and whether normality is checked.

PANEL_UNIT: YES Similarly, is the LVDS signal input to connectorCN6281/CN4804?

Wire harness (LW) is checked.

YES Check the panel module and FRC unit. No picture on the display (2)

Does not the picture come out when VHF/UHF is received? TERMINAL UNIT: Is IF signal output from pin (11) of IC7501?

Check whether I2C is normally accessed between named TU7501.

YES Is signal output from pin (5) of IC7508?

Check the IC7508.

YES Is CVBS signal (MAIN_Y/V) output from pin (52) of IC506 to pin (2) of connector SC501?

Check the line between IC506 and SC501.

MAIN UNIT: YES Is CVBS signal (MAIN_Y/V) input to pin (2) of connector SC1101?

Check the connector SC501/SC1101.

YES Is CVBS signal (MAIN_Y/V) input to pin (Y4) of IC3301 (VIDEO_PROCESSOR)?

Check the line between SC1101 and IC3301.

YES Refer to “The picture doesn't appear in all modes.”

6–7

LC-65RX1M <External input INPUT1,INPUT2> No picture on the display (4)

Does not the picture of the CVBS signal input to INPUT1 go out? Does not the picture of the CVBS signal input to INPUT2 go out? TERMINAL UNIT: <INPUT1> Is CVBS signal sent to pin (6) of INPUT1 (J1704)?

Check the setting of an external input device that connects of J1704.

Check the setting of an external input device that connects of J1702.

Check the line between J1704 and IC506.

Check the line between J1702 and IC506.

YES Is Y/C signal output to pin (2) of connector SC501 from pin (52) of IC506?

Check the line between IC506 and SC501.

MAIN UNIT: YES Is CVBS signal (MAIN_Y/V) input to pin (2) of connector SC1101?

Check the connector SC501/SC1101.

YES Is CVBS signal (MAIN_Y/V) input to pins (Y4) of IC3301 (VIDEO_PROCESSOR)?

Check the line between SC1101 and IC3301.

<INPUT2> Is CVBS signal sent to pin (6) of INPUT2 (J1702)?

YES <INPUT1> Is CVBS signal sent to pin (65) of IC506? <INPUT2> Is CVBS signal sent to pin (71) of IC506?

YES Refer to “The picture doesn't appear in all modes.”

6–8

LC-65RX1M <External input INPUT1,INPUT2> No picture on the display (5)

Does not the picture of the component video signal input to INPUT1 go out? Does not the picture of the component video signal input to INPUT2 go out? TERMINAL UNIT: <INPUT1> Is COMPONENT1 signal sent to pins (6)/Y, (5)/Pb and (4)/Pr of COMPONENT1 (J1705)? <INPUT2> Is COMPONENT2 signal sent to pins (6)/Y, (5)/Pb and (4)/Pr of COMPONENT2 (J1703)?

Check the setting of an external input device that connects of J1705.

Check the setting of an external input device that connects of J1703.

Check the line between J1705 and IC506.

Check the line between J1703 and IC506.

Check from the input terminal J1705 to pin (38) of IC506.

Check from the input terminal J1703 to pin (40) of IC506.

YES Is COMPONENT signal output from pin (60)/Y, (59)/Pb, and (58)/ Pr of IC506 to pin (6), (8), and (10) of connector (SC501)?

Check the line between IC506 and SC501. (Q516, Q518, Q520, etc.)

MAIN UNIT: YES Is COMPONENT signal output from pins (6), (8), (10) of connector (SC1101)?

Check the connector. (SC501/SC1101)

YES Is COMPONENT signal input into pins (W6), (Y9), (W8) of IC3301 (VIDEO_PROCESSOR)?

Check the line between SC1101 and IC3301.

YES <INPUT1> Is COMPONENT1 signal sent to pins (21)/Y, (23)/Pb and (25)/Pr of IC506? <INPUT2> Is COMPONENT2 signal sent to pins (27)/Y, (29)/Pb and (31)/Pr of IC506? YES <INPUT1> Is detection signal COMP1_PLUG of the COMPONENT video signal from pin (7) of the input terminal J1705 normal? <INPUT2> Is detection signal COMP2_PLUG of the COMPONENT video signal from pin (7) of the input terminal J1703 normal?

YES Refer to “The picture doesn't appear in all modes.”

6–9

LC-65RX1M <When INPUT3 is used for external input> No picture on the display (6)

Does not the picture of the composite video signal input to INPUT3 go out? MINI-AV UNIT: Is CVBS signal output from pin (6) in input terminal J901 to pin (5) of connector P901?

Check the line between J901 and P901.

TERMINAL UNIT: YES Is the CVBS signal input from pin (5) of connector P501 to pin (3) of IC506 (VIDEO SELECTOR)?

Check the line between P501 and IC506. (Connector P901/P501, etc.)

YES Is the composite video signal detection signal V3_PLUG signal from pin (7) of the input terminal J901 normal?

Check J901 or peripheral circuits.

Check the between V3_PLUG_LINE J901 and pin (2) of TERMINAL UNIT's IC506. (ConnectorP901/P501,etc)

Check the line between IC506 and SC501.

Check the connector. (SC501/SC1101)

Check the line between SC1101 and IC3301.

YES Is the V3_PLUG signal input to pin (2) of IC506?

YES Is video signal MAIN_Y/V output into pin (2) of connector SC501 from pin (52) of IC506?

TERMINAL UNIT: YES Is picture signal MAIN_Y/V input to pin (2) of connector SC1101?

YES Is picture signal MAIN_Y/V input to pin (Y4) of IC3301 (VIDEO_PROCESSOR)?

YES Refer to “The picture doesn't appear in all modes.”

6 – 10

LC-65RX1M <When INPUT3 is used for external input> No picture on the display (7)

Does not the picture of the Y/C video signal input to INPUT3 go out? MINI AV_UNIT: Is Y/S signal input into pin (13), (11) of connector P901 from pin (3)/Y, (4)/C of J902?

Check the line between J901 and P901.

TERMINAL UNIT: YES Is Y/C signal input into pin (5), (7) of IC506 (VIDEO SELECTOR) from pin (13)/Y, (11)/C of connector P501?

Check the line between P501 and IC506. (Connector P901/P501, etc.)

YES Is the Y/C video signal detection function S3_PLUG signal from pin (6) of the input terminal J902 normal?

Check J902 or peripheral circuits.

Check the between S3_PLUG_LINE J902 and pin (42) of TERMINAL UNIT’s IC506. (connector P901/P501, etc.)

Check the line between IC506 and SC501.

Check the connector. (SC501/SC1101)

Check the line between SC1101 and IC3301.

YES Is the S3_PLUG signal input to pin (42) of IC506?

YES Is Y/C signal output into pin (2), (4) of connector SC501 from pin (52)/Y, (50)/C of IC506?

MAIN UNIT: YES Is Y/C signal input to pin (2), (4) of connector SC1101?

YES Is Y/C signal input to pin (Y4), (V9) of IC3301 (VIDEO_PROCESSOR)?

YES Refer to “The picture doesn’t appear in all modes.”

6 – 11

LC-65RX1M <When INPUT4 is used for external input> No picture on the display (8)

Does not the picture of the HDMI signal input to INPUT4 go out? MINI AV_UNIT: Is the HOT_PLUG detection function of pin (19) of a HDMI terminal (SC801) normal?

Check the between pin (56) of IC1507 and pin (19) of SC801.

Check the connection and setup with the external HDMI devices. YES Are EDID data pin (6)/SCL of IC801 (EEPROM), pin (5) / SDA accessed, and is it read from pin (15), (16) of a HDMI terminal (SC801)?

Is access possible in the re-writing or exchange of EDID data of IC801?

NO Check SC801, IC802, IC803 and peripheral circuits. YES Is TMDS signal input into pin (32, 33)/RXC±, (35, 36)/RX0±, (38, 392)/RX1±, (1, 2)/RX2± of IC802 (HDMI_BUFFER) from SC801?

YES Is TMDS signal output into pin (11, 12), (8, 9), (5, 6), (2, 3) of the connector SC803 from pin (18, 19)/CLK±, (15, 16)/DAT0±, (12, 13)/DAT1±, (9, 16)/DAT2± of IC802? YES Is TMDS signal input into pin(59,58)/TMDS6_CLK±, (62, 61)/ TMDS6_D0±, (65, 64)/TMDS6_D1±, (68, 67)/TMDS6_D2± of IC1507? YES Is each signal output from pin (10, 11)/TMDS_CLKP/N, (7, 8)/ TMDS_D0P/N, (4, 5)/TMDS_D1P/N, (1, 2)/TMDS_D2P/N, (77, 78)/SDA_SINK/SCL_SINK, (79)/DDC5VOR_A of IC1507?

Check the line between SC801 and IC802.

Check the line between IC802 and SC803.

Check the line between connector (SC803) and IC1507. (SC803, SC1503 and Wire harness (HM))

Is the control signal named IC1507 and IC9101 (CPLD) normal? (HDMI_SW_INT, HDMI_RST, etc.)

YES Is each signal of IC3301 (VIDEO_PROCESSOR) pin (L1, L2)/TMDS_CLKP/N, (M1, M2)/TMDS_D0P/N, (N1, N2)/TMDS_D1P/N, (P1, P2)/ TMDS_D2P/N, (T11, U11)/SDA_SINK/SCL_SINK, (T10)/DDC5VOR_A input? YES Refer to “The picture doesn't appear in all modes.”

NO Check the line between SC1101 and IC3301.

6 – 12

LC-65RX1M <When INPUT5/6 is used for external input> No picture on the display (9)

Does not the picture of the HDMI signal input to INPUT5/6 go out? MAIN UNIT: INPUT5 Is the HDMI detection function output from pin (19) of the HDMI terminal (SC1501) normal? INPUT6 Is the HDMI detection function output from pin (19) of the HDMI terminal (SC1502) normal?

INPUT5 Check between SC1501and IC1507(HDMI_SW)of pin(16). (IC1506, etc.) INPUT6 Check between SC1502 and IC1507(HDMI_SW) of pin(36). (IC1506, etc.) YES Check the connection and setup with the external HDMI devices.

YES INPUT5 Is EDID data pin (6)/SCL, pin (5)/SDA of IC1501 (EEPROM) accessed, and is it read from pin (15), (16) of a HDMI terminal (SC1501) pin(15), (16)?

Is access possible in the re-writing or exchange of EDID data of IC1501?

NO Check the circumference circuit of SC1501, IC1501and IC1507. INPUT6 Is EDID data pin (6)/SCL, pin (5)/SDA of IC1502 (EEPROM) accessed, and is it read from pin (15), (16) of a HDMI terminal (SC1501) pin (15), (16)?

Is access possible in the re-writing or exchange of EDID data of IC1502?

NO Check the circumference circuit of SC1501, IC1501and IC1507. YES INPUT5 Is TMDS signal input into pin (19, 18)/TMDS2_CLKP/N±, (22, 21)/TMDS2_D0P/N, (25, 24)/TMDS2_D1P/N, (28, 27)/ TMDS2_D2P/N of IC1507 from SC1501? INPUT6 Is TMDS signal input into pin (39, 38)/TMDS1_CLKP/N±, 42, 41)/ TMDS1_D0P/N, (45, 44)/TMDS1_D1P/N, (48, 47)/TMDS1_D2P/ N of IC1507 from SC1502? YES Is each signal output from pin (10, 11)/TMDS_CLKP/N, (7, 8)/ TMDS_D0P/N, (4, 5)/TMDS_D1P/N, (1, 2)/TMDS_D2P/N, (77, 78)/SDA_SINK/SCL_SINK, (79)/DDC5VOR_A of IC1507?

Check the line between SC1501 and IC1507.

Check the line between SC1502 and IC1507.

Is the control signal of IC1507 and IC9101 (CPLD) normal? (HDMI_SW_INT, HDMI_RST, etc.)

NO Check the line between IC1507 and IC3301.

6 – 13

LC-65RX1M <When INPUT7 is used for external input> No picture on the display (10)

Does not the picture of the DVI(ANALOG) video signal input to INPUT7(15pin-D-SUB terminal) go out? MAIN_UNIT: Are the video signal and the synchronized signal input from pin (1, 2, 3)/(R, G, B), (13 and 14)/(V, H) of input terminal D-SUB (SC1504)? NO Are the video signal and the synchronized signal input from pin (U8, Y7, W10)/ (R, G, B), pin (V10, U10)/(H, V) of IC3301 (VIDEO PROCESSOR)?

YES

Check the connection and setup between SC1504 and its circumference circuit as well as the external HDMI devices. (IC1503, etc.)

YES

Check the line between SC1504 and IC3301.

NO Refer to “The picture doesn't appear in all modes.”

6 – 14

LC-65RX1M <During external connection> No picture on the monitor (1)

No picture appears on MONITOR OUT1 - connected monitor during the tuner (U/V) reception.

YES

Check the setting of an external input device that connects of J1701.

NO Is TUNRECVBS signal output from pin (5) of IC7508?

YES

Check the line between IC7508 and IC503.

NO Is IF signal output from pin (11) of TU7501?

YES

Check the line between IC7508 and TU7501.

NO Check whether I2C is normally accessed between TU7501.

<During external connection> No picture on the monitor (3) SCART2: No picture from INPUT1, INPUT2 appears on MONITOR OUT-connected monitor.

Checklist: 1) The picture is sent to the monitor in a CVBS signal if the source during display is TV, CVBS or Y/C of INPUT1-3. When sent by component, etc., that signal is not sent to the monitor. 2) When the monitor picture is not sent and is not displayed on the monitor, refer to “No picture” for each terminal. TERMINAL UNIT: Is CVBS signal input from pin (51) of IC506 to pin (6) of J1701?

YES

Check the setting of an external input device that connects of J1701.

NO Is CVBS signal sent to pin INT_V/(65) or IN2_V/(71) of IC506 (VIDEO_SELECTOR)?

YES

Check the IC506 and its peripheral circuits.

NO Is CVBS signal sent to pin (8) of INPUT1 (J1704) or pin (8) of INPUT2 (J1702)?

YES

Check the line between J1702/J1704 and IC506.

NO Check the setting of an external input device that connects of J1702/J1704.

6 – 15

LC-65RX1M <During external connection> No picture on the monitor (4) SCART2: No picture from INPUT3 appears on MONITOR OUT- connected monitor.

YES

Check the setting of an external input device that connects of J1701.

NO Is CVBS signal input from pin (5) of the connector P501 to pin (3) of IC506 (VIDEO SELECTOR)?

YES

Check the IC506 and its peripheral circuits.

MAIN UNIT: NO Is CVBS signal input from pin (6) of the input terminal J901 to pin (5) of the connector (P501)?

YES

Check the connector (P501/P901)

NO Is V3_PLUG signal of the CVBS signal detection function from pin (7) of the input terminal J901 normal?

YES

Check the setting of an external input device that connects of J901.

NO Check between V3_PLUG_LINE J901 and pin (2) of IC506 in the TERMINAL UNIT. (Connector P901/P501, etc.)

LED flashing atterns for error notification 250ms 1sec 1) Power red LED Error type

Remarks Power red LED operation (1 cycle) H: On

Lamp failure Flashes once: Fast

L: Off H: On

Power failure Flashes twice L: Off Communication failure H: On with main CPU Flashes 3 times L: Off H: On Monitor temp. failure Flashes 5 times L: Off 2) Power failure details (Power LED flashes twice and OPC LED flashes) Error type OPC LED operation (1 cycle) PS_ON H: On 12V failure Flashes once L: Off PS_ON H: On 10V failure Flashes 3 times L: Off D_POW H: On Digital 3.3V failure Flashes 4 times L: Off PANEL_POW H: On Panel 5V failure Flashes 5 times L: Off H: On Main failure Flashes 7 times L: Off 3) Communication failure details (Power LED flashes 3 times and OPC LED flashes) Error type OPC LED operation (1 cycle) Initial communication H: On reception failure Flashes once L: Off Start-up confirmation H: On reception failure Flashes twice L: Off Regular communication H: On failure Flashes 3 times L: Off H: On Restart failure Flashes 4 times L: Off

Description ERR_PNL(IC2002_43pin): Abnormal L. Confirmed after 5 consecutive detections at 1 second intervals (detected Note that after five detection counts, the lamp cannot be activated except in the monitoring process. (For Accumulated counts are cleared to 0 when the corresponding setting in the process A is made, when the power Refer to "Power failure details".

Refer to "Communication failure details". Communication line failure or main CPU(IC8101) communication failure. ψ Check main CPU (IC8101). If the panel temperature is 60 C or more for 15 seconds or more in a row, CAUTION appears on the OSD of AVC If the panel temperature is 60 C or more for 15 seconds or more in a row, error standby is activated. (MONITOR MAX TEMP of process adjustment (28/31): Change of temperature failure AD value): Thermistor Remarks Description AC_DET(IC2002_16pin): Abnormal (L). Main converter 12V is not applied. If error is detected during operation, the power is turned on again by interrupt handling (instantaneous bl DET_10V(IC2002_57pin): Abnormal (L). Main power UR15V is not applied. If error is detected during start-up or operation, the power is turned on again by polling. DET_D3V3(IC2002_59pin): Abnormal (L). D3.3V is not applied. If error is detected during start-up or operation, the power is turned on again by polling. DET_PNL5V(IC2002_58pin): Abnormal (L). Panel power is not applied. If error is detected during start-up or operation, the power is turned on again by polling. Main microprocessor detection error The details are displayed on page 1 of process adjustment for the main microprocessor (IC8101).

Remarks Description Initial communication from the main CPU (IC8101) is not received. ψ Communication line failure or main CPU (IC8101) start-up failure Start-up reason confirmation from the main CP(IC8101) is not received. ψ Main CPU (IC8101) start-up failure or monitor microprocessor (IC2002) reception failure Regular communication that is performed at 1 second intervals in the normal operation is interrupted. ψ Main CPU (IC8101) operation failure or monitor microprocessor (IC2002) reception failure When restarted by a software with the standby off/on, restart completion notification is not received. ψ Main CPU (IC8101)restart failure to monitor microprocessor (IC2002) reception failure

6 – 16

LC65RX1M

CHAPTER 7. MAJOR IC INFORMATIONS Service LC65RX1M

Manual

[1] MAJOR IC INFORMATIONS 1. MAJOR IC INFORMATIONS 1.1. IC7503 (VHiTDA9886+-1Y) The TDA9886 is an alignment-free multistandard (PAL, SECAM and NTSC) vision and sound IF signal PLL demodulator for positive and negative modulation, including sound AM and FM processing.

1.2. IC506 (VHiMM3151XQ-1Q) This video switch controlled by the I2C bus is used to switch between component signal, S-video signal and composite signal. The signal group input from each input terminal and the tuner is selected by the control signal of the I2C bus. The selected output signal is fed to IC3301 (IXC010WJ) of the video processor circuit.

1.3. IC1402 (VHiR2A15505-1Y) R2S15502SP is a Sound Multiplex Decoder IC. It supports the NICAM and A2 system. It incorporates the high-speed ADC, and all processings are digitally implemented including demodulation.

1.4. IC1403 (VHiTAS3108D-1Y) This IC is an audio processor for the digital TV and a 1-chip IC equipping the DSP only for audio with the AD/DA converter. The 48bit DSP core has a processing capability of 135MHz and 675MIPS and realizes the high-quality audio processing.

1.5. IC1404 (VHiAK4683EQ-1Q) 1-chip 24bit CODEC (COmpression/DECompression) with a built-in 2ch ADC and 4ch ADC. The ADC has the enhanced dual bit architecture to realize the wide dynamic range. The DAC adopts the newly-developed advanced multi-bit architecture to achieve wider dynamic range and low outband noise. It also incorporates the digital audio receiver (DIR) and transmitter (DIT) compatible with 192kHz and 24bit. The DIR automatically detects Non-PCM data stream such as Dolby Digital (AC-3). For the digital audio output, ADC output or external digital input can be selected. The control is set through the serial µP I/F.

1.6. IC1301 (VHiYDA147SZ-1Y) High-efficiency digital audio power amplifier IC with maximum power output of 20W (Vddp=14V, RL=4Ω) x 2ch. It incorporates the “DRC (Dynamic range compression)” function. Since the volume is increased at low volume level and is decreased at high volume level, it is possible to prevent sudden volume change. It is also provided with the “power limiter” which can set the output limit.

1.7. IC402 (VHiBD9305AF-1Y) 1ch step-down switching regulator control It supplies a power supply voltage of +5.0V.

1.8. IC9601/9603/9604/9606 (VHiTPS40055-1Y) DC/DC converter IC. It supplies power supply voltages of 3.3/1.8/1.3/1.2V. This IC has various user programming functions such as operation frequency, soft-start time, voltage feed forward, high-side current limit, and external loop compensation. It is also provided with the stabilized 10V gate drive power supply for the boot strap charging circuit of the high-side N channel MOSFET and the driver for the low-side synchronous rectification MOSFET.

1.9. IC9602 (VHiMP2367DE-1Y) Monolithic step down regulator. It supplies a power supply voltage of D5.0V. •

Programmable Soft-Start.

•

Fixed 340kHz frequency.

•

Cycle-by-Cycle over current protection.

•

Input Under Voltage Lockout.

7–1

LC65RX1M 1.10. IC1507 (VHiSii9185A-1Q) Sil9185 is a 3-input/1-output switch compatible with HDMI1.3. •

Built in Consumer Electronics Control (CEC) support

•

Individual control of Hot Plug Detect (HPD) for each port

•

5V detect to help speed soft mute of audio during plug-in, plug-out conditions

•

Control via local I2C bus.

•

Supports video resolutions up to 1080p, 60Hz, 12-bit or 720p/1080i, 120Hz, 12-bit

•

Built-in adaptive equalizer provides long cable support even at deep color resolutions

•

Pre-emphasis in transmitter

•

DVI 1.0, HDCP 1.1 and HDMI 1.3 compliant receiver and transmitter

1.11. IC9101 (RH-iXC121WJQZQ) This IC performs the CPLD (Complex Programmable Logic Device) RESET, I/O and Bus control.

1.12. IC8101 (RH-iXC011WJQZQ) HIDTVPro-LX Digital AV decoder & Main CPU. •

Master CPU with MMU.

•

DDR2 memory up to 256mHz.

•

Two Transport stream inputs, DVB compliant.

•

Two HD MPEG2 video decoders.

•

Demux, supports two TS inputs and one PS input.

•

DVB_CI, up to two PCMCIA slots for CAM cards.

•

DVB/DES.

•

AC3/MPEG2/MP3/AAC ⋅ ⋅ ⋅ audio.

•

1920 x 1080p de-interlacing.

•

Graphics engine.

•

Two video planes and graphics planes with Alpha blender, overlay, scrolling, flashing, colour key, ARB support.

•

Smart-Cards/UART/infrared IR/RTC/two HW timers/interrupt/Key button ADCs.

•

Flash/IDE/PCI Host.

•

Audio interface: AC97 link/I2S_out/I2S_in/SPDIF and lip-sync.

•

Digital 24-bit RGB/YUV inputs.

•

Dual port/Single port LVDS output.

•

USB2.0 HOST/PHY built with EHCI.

•

CVBS/S-video/YCbCr output.

•

Two HD, 1920 x 1080p.

1.13. IC8701 (VHiS29G128P-1Q) 128Mbit Flash memory. 3.0V single power supply, page mode flash memory. It memorizes the program and broadcast data area.

1.14. IC8702 (RH-iXC150WJQZY) The ICS275 field programmable VCXO clock synthesizer generates up to four high-quality, high-frequency clock outputs including multiple reference clocks from a low-frequency crystal input. Using ICS’ VersaClockTM software to configure PLLs and outputs, the ICS275 contains a One-Time Programmable (OTP) ROM for field programmability. Programming features include VCXO, eight selectable configuration registers and up to two sets of two low-skew outputs. Using Phase-Locked Loop (PLL) techniques, the device runs from a standard fundamental mode, inexpensive crystal, or clock.

1.15. IC8301-4 (RH-iXC154WJQZQ) 4M x 16Bit x 4 Banks graphic DDR2 Synchronous DRAM with Differential Data Strobe. Program, DTV video buffer.

7–2

LC65RX1M 1.16. IC3301 (RH-iXC010WJN1Q) SVP-WX Video Processor. •

Integrated HDMI Receiver

•

Integrated De-interlacing

•

Integrated ADC

•

SRC (Scan Rate Conversion) Improvement

•

PC Auto Tune

•

Built-in LVDS Transmitter

•

Scaling Engine

•

DNR-Digital Noise Reduction Filter

•

Advanced Chroma Processing

•

Color Management

•

RCR (Real Color Reproducer)

•

Dynamic Contrast Improvement

•

Integrated 3D Digital Comb Video Decoder with Programmable Filter

•

Inverse Color Space Conversion (ICSC)

•

Frame Rate Conversion

•

Fast Blank

•

Built-in ADC to decode one FB and two FS signals to support dual SCART solutions

•

Teletext

•

Memory Interface

•

DCR Advanced Image Processing

•

Multi Screen Display Mode

•

OSD and VBI/Closed Caption

•

Advanced OSD Engine

1.17. IC3501-2 (RH-iXC163WJQZQ) 1M x 32Bit x 4 Banks Double Data Rate Synchronous DRA with Bi-directional Data Strobe and DLL. Video buffer.

1.18. IC2002 (RH-iXB986WJQZQ) The monitor microprocessor is intended to communicate with the main microprocessor and to operate the system. It also controls power of the entire system.

7–3

LC65RX1M 2. Detailed ICs Information 2.1. IC402 (VHiBD9305AF-1Y) 2.1.1 Pin Connections and short description Pin No. 1 2 3 4 5 6 7 8

Pin Name RT CT ENB GD VCC GND COMP FB

I/O — — I O — — O I

Pin Function Timing resistor external terminal Timing capacitor external terminal Control input terminal Gate drive output terminal Power terminal Ground terminal Error amplifier output terminal Error amplifier inversion input terminal

2.2. IC506 (VHiMM3151XQ-1Q) 2.2.1 Pin Connections and short description

69 75 1 7 70 76 2 65 71 77 3 9 15 68 74 80

Pin No.

Pin Name C1 C2 C3 C4 S1 S2 S3 V1 V2 V3 V4 V5 V6 S2-1 S2-2 S2-3/ FS3

I/O I I I I I I I I I I I I I I I I

67 73 79 5 14 16 32 20 26 21 27 33 22 28 34 24 30 36 23 29 35 25 31 37 38 40 42 45 46

Y1 Y2 Y3 Y4 ADR BIAS L13 L11/ FS1 L12/ FS2 CY1 CY2 CY3 L21 L22 L23 L31 L32 L33 PB1 PB2 PB3 PR1 PR2 PR3 SW1 SW2 SW3 SDA SCL

I I I I I I I I I I I I I I I I I I I I I I I I I I I I/O I

Pin Function Chroma signal input

The terminal which detects the connection state of S-connector.

Composite signal input.

The terminal which detects the aspect ratio information of S-connector. The terminal which detects the aspect ratio information of S-connector, or which detects the voltage of FS pin of a scart connector. Luminance signal input.

Slave address select pin. BIAS The terminal which detects the number of scanning lines information on D-connector. The terminal which detects the number of scanning lines information on D-connector, or which detects the voltage of FS pin of a scart connector. Component Y-signal input.

The terminal which detects the I/P information of D-connector.

The terminal which detects the aspect ratio information of D-connector.

Colour difference PB-signal input.

Colour difference PR-signal input.

The terminal which detects the connection state of D-connector.

Data I/O of I2C bus Clock input of I2C bus

7–4

LC65RX1M Pin No. 49 51 50 52 54 58 55 59 56 60 64 66 72 78 53, 57 8, 47 18, 44, 62 4, 6, 10, 11, 12, 13, 17, 19, 39, 41, 43, 48, 61, 63

Pin Name DCOUT VOUT3 COUT3/VOUT6 YOUT3/ VOUT5 PROUT2 PROUT1 PBOUT2/ COUT2 PBOUT1/ COUT1 CYOUT2/ YOUT2/ VOUT2 CYOUT1/ YOUT1/ VOUT1 O1 O2 O3 O4 VDD1 VDD2 GND NC

I/O O O O O O O O O O O O O O O — — — —

Pin Function DC output for S-terminal. Monitor output (composit signal) Monitor output (Chroma or composite signal) Monitor output (Luminance or composite signal) Colour difference PR-signal output. Colour difference PB-signal or chroma signal output. Colour difference signal, Luminance or composite signal output. Output port.

Power supply (+9V) Power supply (+5V) Ground Unconnected pins.

2.3. IC1301 (VHiYDA147SZ-1Y) 2.3.1 Block Diagram

7–5

LC65RX1M 2.3.2 Pin Connections and short description Pin No. 1, 2, 12, 25, 35, 36 3 4 5 6 7 8 9 10 11 13, 14 15, 16, 17 18, 19 20, 21, 22 23, 24 26 27 28 29 30 31 32 33 34 37, 38 39, 40, 41 42, 43 44, 45, 46 47, 48

Pin Name NC PVDDREG AVDD INLP INLM VREF INRM INRP AVSS PLIMIT PVDDPR OUTPR PVSSR OUTMR PVDDMR SLEEPN PROTN MUTEN CKOUT CKIN NCDRC0 NCDRC1 GAIN0 GAIN1 PVDDML OUTML PVSSL OUTPL PVDDPL

I/O — — — I I I I — I — O — O — I O I O I I I I I — O — O —

Pin Function No connection Power terminal for regulator (PVDD) Output terminal for 3.3V regulator Analog input terminal (Lch+) Analog input terminal (Lch-) VREF terminal Analog input terminal (Rch-) Analog input terminal (Rch+) GND terminal for analog Power limit setting terminal Power terminal for digital amplifier output (Rch+) Digital amplifier output terminal (Rch+) Ground terminal for digital amplifier output (Rch) Digital amplifier output terminal (Rch-) Power terminal for digital amplifier output (Rch-) Sleep control terminal Error flag output terminal Mute control terminal Clock output terminal for synchronization External clock input terminal Non-clip/DRC1/DRC2 mode selection terminal 0 Non-clip/DRC1/DRC2 mode selection terminal 1 GAIN setting terminal 0 GAIN setting terminal 1 Power terminal for digital amplifier output (Lch-) Digital amplifier output terminal (Lch-) Ground terminal for digital amplifier output (Lch) Digital amplifier output terminal (Lch+) Power terminal for digital amplifier output (Lch+)

2.4. IC1402 (VHiR2A15505-1Y) 2.4.1 Pin Connections and short description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Pin Name AVSS AVDD SIF VREF1 VREF2 TEST XI XO IVDD IVSS DVSS DVDD DACCLK BCK LRCK SD0 SDI SDA SCL STATUS RESET ROUT VCOM LOUT

I/O — — I — — I I O — — — — I/O I/O I/O O I I/O I I/O I O — O

Pin Function 0V Power Supply for Analog Core 3.3V Power Supply for Analog Core Sound IF Input ADC Voltage Reference 1 ADC Voltage Reference 2 Test pin Crystal Oscillator Input Crystal Oscillator Output 3.3V Power Supply for I/O Buffer 0V Power Supply for I/O Buffer 0V Power Supply for Logic Core 1.5V Power Supply for Logic Core DAC Clock Bit Clock LR Clock Digital Output for External DAC Digital Input for Internal DAC I2C bus Serial Data I2C bus Serial Clock PLL Setting / Status Signal Hardware Reset (Active low) Rch Analog Output DAC Voltage Reference Lch Analog Output

7–6

LC65RX1M 2.5. IC1403 (VHiTAS3108D-1Y) 2.5.1 Block Diagram

2.5.2 Pin Connections and short description Pin No. 38 1 7 9, 30 10, 29 8 19 5 21 6 31

Pin Name AVDD AVSS CS0 DVDD DVSS GPIO LRCLK MCLKIN MCLKO MICROCLK_DIV PDN

I/O — — I — — I/O I/O I O I I

34 35 36 33, 37 32 16 18 20

PLL0 PLL1 PLL2 RESERVED RESET SCL1 SCL2 SCLKIN

I I I — I I/O I/O I

Pin Function Analog power-supply input (3.3V) Analog ground Pull-down Chip select Digital power-supply input (3.3V) Digital ground Pull-up GPIO control pin (user programmable) Pull-down Sample rate clock (fS) input or output Master clock input (Connect to ground when not in use.) Master clock output Pull-down Internal microprocessor clock divide control Pull-up Powers down all logic and stops all clocks, active-low. Coefficient memory remains stable through power-down cycle. Pull-up PLL control 0 Pull-down PLL control 1 Pull-down PLL control 2 Connect to ground Pull-up Reset, active-low I2C port #1 clock (always a slave) I2C port #2 clock (always a slave) Pull-down Bit clock input

7–7

LC65RX1M Pin No. 22 23 15 17 11 12 13 14 27 26 25 24 2 3 4 28

Pin Name SCLKOUT1 SCLKOUT2 SDA1 SDA2 SDIN1 SDIN2 SDIN3 SDIN4 SDOUT1 SDOUT2 SDOUT3 SDOUT4 VR_PLL XTALI XTALO VR_DIG

I/O O O I/O I/O I I I I O O O O — I O ---

Pin Function Bit clock #1 out. Used to receive input serial data. Bit clock #2 out. Used to clock output serial data. I2C port #1 data (always a slave) I2C port #2 data (always a slave) Pull-down Serial data input 1 Pull-down Serial data input 2 Pull-down Serial data input 3 Pull-down Serial data input 4 Serial data output 1 Serial data output 2 Serial data output 3 Serial data output 4 Internal regulator. This pin must not be used to power external devices. Oscillator input (connect to ground when not in use) Oscillator output Internal regulator. This pin must not be used to power external devices.

2.6. IC1404 (VHiAK4683EQ-1Q) 2.6.1 Block Diagram

7–8

LC65RX1M 2.6.2 Pin Connections and short description

1 2 3

Pin No.

Pin Name PVDD RX0 I2C

I/O — I I

4 5 6 7 8

RX1 RX2 RX3 INT DZF

I I I O O

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

CDTO LRCKB BICKB SDTOB OLRCKA ILRCKA BICKA SDTOA MCKO TVDD DVSS DVDD XTI XTO TX

O I/O I/O O I/O I/O I/O O O — — — I O O

24 25

MCLK2 PDN

I I

26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

SDA SCL CSN SDTIA1 SDTIA2 SDTIA3 SDTIB HVDD HVSS HPR HPL MUTET LOUT2 ROUT2 LOUT1 ROUT1 VCOM AVDD2 AVSS2 LISEL LOPIN ROPIN RISEL AVSS1 AVDD1 LIN1 RIN1 LIN2 RIN2 LIN3 RIN3

I/O I I I I I I — — O O — O O O O — — — O O O O — — I I I I I I

Pin Function PLL Power supply, 4.5V~5.5V. Receiver Channel 0 (Internal biased pin. Internally biased at PVDD/2). Control Mode Select. “L”: 4-wire Serial, “H”: I2C Bus Receiver Channel 1. Receiver Channel 2. Receiver Channel 3. Interrupt Zero Input Detect. When the input data of DAC follow total 8192 LRCK cycles with “0” input data, this pin goes to “H”. And when RSTN1 bit is “0”, PWDA bit is “0”, this pin goes to “H” Control Data Output in Serial Mode and I2C pin = “L”. Channel Clock B Audio Serial Data Clock B Audio Serial Data Output B Output Channel Clock A Input Channel Clock A Audio Serial Data Clock A Audio Serial Data Output A Master Clock Output Output Buffer Power Supply, 2.7V~5.5V Digital Ground Digital Power Supply, 4.5V~5.5V X’tal Input X’tal Output Transmit Channel Output When DIT bit = “0”, RX0~3 Through. When DIT bit = “1”, Internal DIT Output. Master Clock Input Power-Down Mode & Reset When “L”, the AK4683 is powered-down, all registers are reset. And then all digital output pins go “L”. The AK4683 must be reset once upon power-up. Control Data in Serial Mode and I2C pin = “H”. Control Data Clock in Serial Mode and I2C pin = “H”. Chip Select in Serial Mode and I2C pin = “L”. Audio Serial Data Input A1 Audio Serial Data Input A2 Audio Serial Data Input A3 Audio Serial Data Input B HP Power Supply, 4.5V~5.5V HP Ground HP Rch Output. HP Lch Output. HP Common Voltage Output DAC2 Lch Positive Analog Output DAC2 Rch Positive Analog Output DAC1 Lch Positive Analog Output DAC1 Rch Positive Analog Output DAC/ADC Common Voltage Output DAC Power Supply, 4.5V~5.5V DAC Ground Lch Feedback Resistor Output Lch Feedback Resistor Input. 0.5 x AVDD1. Rch Feedback Resistor Input. 0.5 x AVDD1. Rch Feedback Resistor Output ADC Ground ADC Power Supply, 4.5V~5.5V Lch Input 1 Rch Input 1 Lch Input 2 Rch Input 2 Lch Input 3 Rch Input 3

7–9

LC65RX1M Pin No. 57 58 59 60 61 62 63 64

Pin Name LIN4 RIN4 LIN5 RIN5 LIN6 RIN6 PVSS R

I/O I I I I I I — —

Pin Function Lch Input 4 Rch Input 4 Lch Input 5 Rch Input 5 Lch Input 6 Rch Input 6 PLL Ground External Resistor

2.7. IC1507 (VHiSii9185A-1Q) 2.7.1 Block Diagram

7 – 10

LC65RX1M 2.7.2 Pin Connections and short description Pin No. Pin Name System Switching Pins 30, 50, 70 DSDA0, DSDA1, DSDA2 31, 51, 71 DSCL0, DSCL1, DSCL2 32, 52, 72 RPWR0, RPWR1, RPWR2

I/O I/O I I

16, 36, 56

HPD0, HDP1, HPD2

76 78

HPDIN TSCL

I O

TSDA

I/O

Configuration Pins 79 I2CADDR/TPWR

I/O

I2CSEL/INT#

I/O

75 Control Pins 13

RSVDL

RESET#

LSCL/EPSEL1

LSDA/EPSEL0

I/O

CEC Pins 54

CEC_A

I/O

CEC_D

I/O

Differential Signal Data Pins 22 R0X0+ 21 R0X025 R0X1+ 24 R0X128 R0X2+ 27 R0X219 R0C+ 18 R0C42 R1X0+ 41 R1X045 R1X1+ 44 R1X148 R1X2+ 47 R1X239 R1C+ 38 R1C-

I I I I I I I I I I I I I I I I

Pin Function DDC I2C Data for respective port. DDC I2C Clock for respective port. 5V Port detection input for respective port. Connect to 5V signal from HDMI input connector. Hot Plug Detect Output for respective port. Connect to HOTPLUG of HDMI input connector. Hot Plug Detect Input. Master DDC I2C Clock (Open Drain Output) to HDMI receiver. I2C transactions required for HDCP operation are performed over this I2C bus. Master DDC Data (Open drain output.) to HDMI receiver. I2C transactions required for HDCP operation are performed over this I2C bus. I2C Slave Address input / Transmit Power Sense output pin. When RESET# is low, this pin is used as an input to latch the I2C sub-address. The level on this pin is latched when the RESET# pin transitions from low to high. When RESET# is high, this pin is used as the TPWR output, indicating that the selected Rx-port has 5V present. When none of the Rx ports are selected, this signal is low. I2C Selection input / Interrupt output pin. When RESET# is low, this pin is used as an input to latch the External Port Detection signal. The level on this pin is latched when the RESET# pin transitions from low to high. When this pin is low during reset, the external pins EPSEL1/LSCL and EPSEL0/LSDA are used to select the Rx-port as EPSEL[1:0]. When this pin is high during reset, the internal local I2C register is used to select the Rxport. Reserved for use by Silicon Image and must be tied low. Reset Pin (Active LOW). Certain configuration inputs are latched when RESET# transitions from low to high. Local I2C Clock / External Port Select 1. When I2CSEL is high, this becomes the Local I2C bus clock pin, LSCL. When I2CSEL is low, this becomes the external port select pin, EPSEL1. True open drain, so does not pull to ground if power not applied. An external pull-up is required. Local I2C Data / External Port Select 0. When I2CSEL is high, this becomes the Local I2C bus data pin, LSDA. When I2CSEL is low, this becomes the external port select pin, EPSEL0. True open drain, so does not pull to ground if power not applied. An external pull-up is required. HDMI compliant CEC I/O used to interface to CEC devices. CEC electrically compliant signal. This pin connects to the CEC signal of all HDMI connectors in the system. As an input, the pad acts as a LVTTL Schmitt triggered input and is 5V tolerant. As an output, the pad acts as an NMOS driver with resistive pull-up. This pin has an internal pull-up resistor. CEC interface to local system. True open-drain. An external pull-up is required. This pin typically connects to the local CPU. TMDS input Port 0 data pairs.

TMDS input Port 0 clock pair. TMDS input Port 1 data pairs.

TMDS input Port 1 clock pair.

7 â&#x20AC;&#x201C; 11

LC65RX1M Pin No. 62 61 65 64 68 67 59 58 7 8 4 5 1 2 10 11 12

Pin Name R2X0+ R2X0R2X1+ R2X1R2X2+ R2X2R2C+ R2CTX0+ TX0TX1+ TX1TX2+ TX2TXC+ TXCEXT_SWING

I/O I I I I I I I I O O O O O O O O I

Power and Ground Pins 23, 43, 55, 63 AVCC33 6, 17, 29, 37, 49, AVCC18 57, 69 3, 9, 20, 26, 40, AGND 46, 60, 66, 80 33, 73 DVCC18 34, 74 DGND

Pin Function TMDS input Port 2 data pairs.

TMDS input Port 2 clock pair. TMDS output data pairs.

TMDS output clock pair. Voltage Swing Adjust. A resistor tied from this pin to AVCC18 determines the amplitude of the voltage swing. The recommended value is 750Ω.

— —

Analog VCC. Connect to 3.3V supply. Analog VCC. Connect to 1.8V supply.

—

Analog GND.

— —

Digital VCC. Connect to 1.8V supply. Digital GND.

2.8. IC2002 (RH-iXB986WJN8Q) 2.8.1 Pin Connections and short description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34

Pin Name SHIP_EN CS_CPLD N_SRESET PM_REQ IR_PASS Vc1 X2 X1 N_RESET OSC2 Vss OSC1 Vcc N_NMI WAKE_UP AC_DET POW_SW FRAME ROMSEL0 O_S_SET TEMP1 TEMP2 TEMP3 L_R U_D UARXD_M UATXD_M TXD RXD SCLD BUSY LED_R LED_G LED_OPC

I/O O O O O O — I O I O — I — I I I I O O O O O O O O I O O I I I O O O

Pin Function SHIP (CSI) processing enabled/disabled selection signal CPLD chip select Reset Request signal (Communication request at H) Remote control signal external through switching Internal voltage drop power terminal Sub clock (32.768kHz) Sub clock (32.768kHz) System reset System clock (20.00MHz) GND System clock (20.00MHz) Power supply (+3.3V) For FLASH rewrite For WAIT mode return For instantaneous blackout detection Power SW Panel controller control (50/60 setting) For test pattern control Panel controller control ON/OFF Panel controller control, temperature information 1 Panel controller control, temperature information 2 Panel controller control, temperature information 3 Panel controller control, flip horizontal Panel controller control, flip vertical Serial for MAIN CPU communication (To TXD of MAIN CPU) Serial for MAIN CPU communication (To RXD of MAIN CPU) For debugger (E8) connection For debugger (E8) connection For debugger (E8) connection For debugger (E8) connection Power LED, red Power LED, green OPC LED

7 – 12

LC65RX1M Pin No. 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

Pin Name LED_SLEEP AV_LINK_O ANT_POW EXE_LED I2C_GATE N_SYSRST_IN RS_ON STB ERR_PNL AV_LINK_I SYNC_DET VSYNC CEC_O CEC_I RC I2C1_SCL I2C1_SDA W_PROT_M P16 DVIA_DET MUTE_A_ALL DET_6V DET_10V DET_PNL12V DER_D3V3 DET_3V3 EU_POW LINK_POW PNL_POW D_POW SMPOW PSIZ_L PSIZ_H QSTEMP KEY1 KEY2 AREA1 PNL_TYPE OPC AFT/AGC Avss LNBSHORT Vref Avcc PNL_TYPE ILLUMI

I/O O O O O O I O O I I O I O I I O I/O O — I O I I I I I O O O O O I I I I I I I I I — I — — I O

Pin Function SLEEP_LED AV_LINK output Antenna power control Microprocessor operation check LED I2C bus SW SYSTEM RESET switch detection RS232C power control Backlight control. Lamp error detection (L: error) AV_LINK input PC power management setting VSYNC interrupt CEC output CEC input Remote control signal input. I2C CH1 I2C CH1 EEP write protection For debugger (E8) connection DVI analog detection (for PC power management) Audio mute 6V detection 10V detection Panel 12V detection D3.3V detection 3.3V detection Digital system power control i.Link power control 5V ON/OFF SW for panel Main power ON/OFF control Power control Panel size discrimination terminal (Mounting discrimination) Panel size discrimination terminal (Mounting discrimination) Thermistor input (Panel temperature) Main unit key input 1 Main unit key input 2 Panel size discrimination terminal (Mounting discrimination) Panel manufacturer discrimination (Mounting discrimination) Brightness sensor input Tuner AFT/ACG input Analog GND for A/D Antenna short detection (Low: OK, High: NG) A/D converter reference voltage Analog power for A/D Panel solution discrimination (Mounting discrimination) Illumination LED

7 – 13

LC65RX1M 2.9. IC3301 (RH-iXC010WJN1Q) 2.9.1 Pin Connections and short description Pin No. Pin Name Ball Assignments for CPU Host Interface. K20, K19, K18, K17, L20, A_D[7:0] L19, L18, L17 M17, M18, M119, M20, ADDR[7:0] N20, N19, N18, N17 J18 ALE J19 WR# J20 RD# H17 SDA H18 SCL J17 CPU_CS Ball Assignments for Analog Support Interface. W1 XTALI

I/O

Y1 XTALO U2 MLF1 R4 PLF2 Ball Assignments for Analog Input Interface. Y4 CVBS1 V6 Y_G1 W6 Y_G2 Y6 Y_G3 W2 CVBS_OUT1 V2 CVBS_OUT2 V9 C W9 PB_B1 Y9 PB_B2 Y10 PB_B3 Y8 PR_R1 W8 PR_R2 V8 PR_R3 W4, V4 FS2, FS1 U4, Y5 FB2, FB1 V10 AIN_H U10 AIN_V U8 PC_R Y7 PC_G W10 PC_B Ball Assignments for Capture Interface (TV & RGB). U18, U19, U20, T20, T18, DPB[15:8] (DP_B[15:8]) T17, R19, R20 Y12, U13, V13, W13, DPA[23:0] (DP_A[23:0]) Y13, Y14, W14, V14, U14, U15, V15, W15, Y16, W16, V16, U16, U17, V17, W17, Y17, Y18, W18, V18, W19 T19 DPB_CLK (CLK_B) Y15 DPA_CLK (CLK_A) W20 DPE_DE (DE_B) Y20 DPA_VS (VS_A) Y19 DPA_HS (HS_A) V20 DPB_VS (VS_B) V19 DPB_HS (HS_B) P19 HS P17 VS

O I I

Input for Clock Synthesizer. Supports 24MHz Oscillator or crystal powered by analog PLL. Used in conjunction with XTALI for 24MHz crystal output powered by analog PLL. Low pass filter node for memory clock PLL powered by analog PLL. Low pass filter node for video clock PLL powered by analog PLL.

I I I I I I I I I I I I I I I I I I I I

Composite video input 1. Y input 1 of component or G input 1 of PC RGB. Y input 2 of component or G input 2 of PC RGB. Y input 3 of component or G input 3 of PC RGB. CVBS Output 1. (Not connected) CVBS Output 2. (Not connected) C input of S-Video. PB input 1 of component. PB input 2 of component. PB input 3 of component. PR input 1 of component. PR input 2 of component. PR input 3 of component. SCART function select 2, 1. SCART FB input for Port 2, Port 1. Hsync input (PC RGB input) Vsync input (PC RGB input) PC Red input. PC Green input. PC Blue INPUT.

I/O I I I I I/O I I I

Pin Function Multiplexed address and data bus powered by VDDH/VSS. CPU Address. (Not connected) Address latch enables. CPU Write. CPU Read. I2C data. I2C clock. UX chip select pin from MCU. Active Low.

I/O

Digital input port [15:8] (Output reserved)

I/O

Digital input/output port [23:0]

I/O I/O I/O I/O I/O I/O I/O I/O I/O

Digital port B CLK input/output. (Not connected) Digital port A CLK input/output. DE input/output of Digital port B. Vsync input/output of Digital port A. Hsync input/output of Digital port A. Vsync input/output of Digital port B. (Not connected) Hsync input/output of Digital port B. (Not connected) Hsync output for Digital port. Vsync output for Digital port.

7 â&#x20AC;&#x201C; 14

LC65RX1M Pin No. Pin Name Ball Assignments for Frame Buffer Memory. D3, C3, C2, C1, A1, A2, MD[31:0] A3, C5, A4, B5, A5, D6, A7, B7, C7, D7, D8, C8, B8, A8, D9, D10, C10, B10, A10, A11, B11, C11, D12, A13, B13, C13 F1, F2, F3, F4, G4, G3, MA[11-0] G2, G1, H1, H2, H3, H4 J2 RAS# J1 CAS# K1 WE# J3 CS1# J4 CS0# D1 MCK0 E1 MCK0# B1, A6, A9, A12 DQM[3:0] K2 CLKE B2, B6, B9, B12 DQS[3:0] E3 MVREF K3 BA0 K4 BA1 Ball Assignments for Power and Ground. C14, C15, D13, D14, VDDC D15, E13, E14, E15, G16, H5, H16, J5, J16, K5, K16, R16, T14, T15 E4, E7 VSSR E2, E8 VDDR B4, C4, D4, D5, D11, E5, VDDM E6, E9, E10, E11, E12, F5, G5 L16, M16, N16, P16, T12, VDDH T13, R17, R18 B3, C6, C9, C12, D2, H8, VSS H9, H10, H11, H12, H13, J8, J9, J10, J11, J12, J13, K8, K9, K10, K11,K12, K13, L5, L8, L9, L10, L11, L12, L13, M8, M9, M10, M11, M12, M13, N8, N9, N10, N11, N12, N13, P18, T16, H20 W3 AVSS_BG_ASS V3 AVDD3_BG_ASS T3 PAVDD1 T2 PAVSS1 R3 PAVSS2 T4 PAVDD2 U6, T8, U7, U5 AVDD_ADC[4, 3, 2, 1] T6, T9, T7, T5 AVSS_ADC[4, 3, 2, 1] U9, Y3 AVDD3_ADC[2, 1] U3 AVDD3_OUTBUF Y2 AVSS_OUTBUF C18, C19 LVDS_VSSO C16 LVDS_VSSD E16 LVDS_VSSA E18 LVDS_VSSP D18 LVDS_VDDP E17 LVDS_VDDA D16 LVDS_VDDD C17, D17 LVDS_VDDO P20 NC U1 AVDDAPLL V1 AVSSAPLL R2 AVDDLLPLL

I/O

Pin Function

I/O

Memory data.

I/O

Memory Address.

O O O O O O O O O I/O — O O

RAS# signal powered by VDDH/VSS. CAS# signal powered by VDDH/VSS. WE#, write enable signal powered by VDDH/VSS. Chip select 0 for the first 2/4 Mbyte of SGRAM/SDRAM powered by VDDH/VSS. Chip select 1 for the first 2/4 Mbyte of SGRAM/SDRAM powered by VDDH/VSS. Memory clock+. Memory clock-. Read/Write bytes enable powered by VDDH/VSS. Memory clock enable. Memory data strobe. DDR voltage reference. Bank address select. Bank address select.

—

1.2V Digital core power.

— — —

Digital memory reference Ground. 2.5V Digital power for Memory. 2.5V Memory interface power. Output driver.

—

3.3V Digital I/O power.

—

Core and Digital IO ground.

— — — — — — — — — — — — — — — — — — — — — — —

ADC ground. 3.3V ADC power. 3.3V power for MCLK PLL. Ground for MCLK PLL. Ground for PCLK PLL. 3.3V power for PCLK PLL. 1.2V power for analog ADC. Ground for analog ADC. 3.3V ADC power. 3.3V power for output buffer. 3.3V ground for output buffer. LVDS out buffer ground. LVDS Digital ground. LVDS analog ground. LVDS PLL GND. LVDS PLL VDD. LVDS analog VDD. LVDS Digital VDD. LVDS out buffer VDD. Not connected. 1.2V analog PLL power. 1.2V analog GND. 1.2V Line Lock PLL power.

7 – 15

LC65RX1M Pin No. Pin Name T1 AVSSLLPLL Miscellaneous Ball Assignments. F18 RESET G18 INTN G17 PWM0 F16 V5SF F17 TESTMODE LVDS Output Ball Assignments. A14 TA1P B14 TA1M A15 TB1P B15 TB1M A16 TC1P B16 TC1M A18 TD1P B18 TD1M A19 TE1P B19 TE1M B17 TCLK1M A17 TCLK1P F19 TCLK2M E20 TCLK2P H19 TE2P G20 TE2M G19 TD2P F20 TD2M E19 TC2P D20 TC2M B20 TB2P A20 TB2M D19 TA2P C20 TA2M HDMI Interface Ball Assignments. L4 PVCC M5 ANTSTO M4, N4, N5, P4 AVCC L2 RXCL1 RXC+ L3, M3, N3, P3, R1 TMDS_GND M2 RX0M1 RX0+ N2 RX1N1 RX1+ P2 RX2P1 RX2+ R5 REGVCC P5 DGND T10 PWR5V T11 DSCL U11 DSDA U12 WS V11 SCDT V12 SD0 W11 AUDIOCLK W12 SPDIF Y11 SCK Pin Assignments for Reference Voltage. V5 VREFN1 W5 VREFP1 V7 VREFN2 W7 VREFP2

I/O — I I/O I/O I

Pin Function 1.2V Line Lock PLL GND.

System reset forces the chip to a known state. Active High. Interrupt signal (active low). PWM I/O. (Not connected) 5V reference voltage (must be connected to 5V even in standby mode, when CPU I/O is 5V) Reserved (Connected to ground).

O O O O O O O O O O O O O O O O O O O O O O O O

LVDS 1st Channel Differential positive data out. LVDS 1st Channel Differential negative data out. LVDS 1st Channel Differential positive data out. LVDS 1st Channel Differential negative data out. LVDS 1st Channel Differential positive data out. LVDS 1st Channel Differential negative data out. LVDS 1st Channel Differential positive data out. LVDS 1st Channel Differential negative data out. LVDS 1st Channel Differential positive data out. LVDS 1st Channel Differential negative data out. LVDS 1st Channel Differential positive CLK out. LVDS 1st Channel Differential negative CLK out. LVDS 2st Channel Differential positive CLK out. LVDS 2st Channel Differential negative CLK out. LVDS 2st Channel Differential positive data out. LVDS 2st Channel Differential negative data out. LVDS 2st Channel Differential positive data out. LVDS 2st Channel Differential negative data out. LVDS 2st Channel Differential positive data out. LVDS 2st Channel Differential negative data out. LVDS 2st Channel Differential positive data out. LVDS 2st Channel Differential negative data out. LVDS 2st Channel Differential positive data out. LVDS 2st Channel Differential negative data out.

— O — I I — I I I I I I — — I I/O I/O O O O I O O

TMDS PLL supply voltage. Test pin. (Not connected) TMDS analog supply voltage. TMDS differential CLK-. TMDS differential CLK+. TMDS GND. HDMI Differential input pair 0HDMI Differential input pair 0+ HDMI Differential input pair 1HDMI Differential input pair 1+ HDMI Differential input pair 2HDMI Differential input pair 2+ ACR PLL Regulator supply voltage. ACR PLL GND. TMDS port Transmitter Detect (5V tolerant). DDC I2C clock for DDC (5V tolerant). DDC I2C data for DDC (5V tolerant). I2S Word select output. Indicates Active video at HDMI input port. I2S serial data output. Audio master clock input reference. S/PDIF audio output. I2S serial clock output.

— — — —

ADC1 voltage reference-. ADC1 voltage reference+. ADC2 voltage reference-. ADC2 voltage reference+.

7 – 16

LC65RX1M 2.10. IC3501-2 (RH-iXC163WJQZQ) 2.10.1 Block Diagram

2.10.2 Pin Connections and short description

62, 63

Pin No.

Pin Name CK, CK

CKE

RAS

CAS

1, 28, 7, 34 44, 67, 50, 35

DQS0-3 DM0-3

I/O I

40, 78, 41, 42, 2, 46, 3, 4, 26, 65, 27, 66, 29, 68, 30, 69, 48, 5, 49, 6, 51, 8, 9, 52, 31, 32, 71, 33, 37, 38, 75, 39 14, 56 15, 16, 57, 17, 18, 60, 19, 20, 21, 59, 90, 58

DQ0-31

I/O

82, 88, 91, 92, 95, 101, 105, 106

VDD

BA0, BA1 A0-11

I/O I

I I

—

Pin Function The differential system clock Input. All of the inputs are sampled on the rising edge of the clock except DQ’s and DM’s that are sampled on both edges of the DQS. Activates the CK signal when high and deactivates the CK signal when low. By deactivating the clock, CKE low indicates the Power down mode or Self refresh mode. CS enables the command decoder when low and disabled the command decoder when high. When the command decoder is disabled, new commands are ignored but previous operations continue. Latches row addresses on the positive going edge of the CK with RAS low. Enables row access & precharge. Latches column addresses on the positive going edge of the CK with CAS low. Enables column access. Enables write operation and row precharge. Latches data in starting from CAS, WE active. Data input and output are synchronized with both edge of DQS. Data In mask. Data In is masked by DM Latency=0 when DM is high in burst write. DM0 for DQ0 ~ DQ7, DM1 for DQ8 ~ DQ15, DM2 for DQ16 ~ DQ23, DM3 for DQ24 ~ DQ31. Data inputs/Outputs are multiplexed on the same pins.

Selects which bank is to be active. Row/Column addresses are multiplexed on the same pins. Row addresses: RA0 ~ RA11, Column addresses: CA0 ~ CA7. Column address CA8 is used for auto precharge. Power for the input buffers and core logic.

7 – 17

LC65RX1M Pin No. 89, 94, 109, 115, 116, 117, 118, 124, 126, 127, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144 45, 47, 70, 72, 74, 76, 77, 79, 83, 84, 86, 87, 96, 97, 99, 100 36, 43, 81, 102, 103, 104, 107, 108, 110, 111, 112, 113, 114, 119, 120, 121, 122, 123, 125, 128 23 93, 61 13, 24, 25, 54, 55, 64, 73, 80, 85, 98

Pin Name VSS

I/O —

Pin Function Ground for the input buffers and core logic.

VDDQ

—

Isolated power supply for the output buffers to provide improved noise immunity.

VSSQ

—

Isolated ground for the output buffers to provide improved noise immunity.

VREF RFU1/RFU2 NC

— — —

Reference voltage for inputs, used for SSTL interface. Reserved for Future Use. No Connection.

2.11. IC8101 (RH-iXC011WJQZQ) 2.11.1 Pin Connections and short description Ref No. DAC Interface AD2 AD3 AD1 AE1 AE2 AE4 AE3 AA5 AB5 AB4 AB3 AB2 AB1 AC1 AC2 AC3 AC4 AC5 AD5 AD4 ADC Interface N2 N3 N4 N5 USB Interface R3 R2 P5 P4 P3 P2 P1 R5 R4 LVDS Interface AJ5 AJ3 AK5 AK4 AK1 AK2

Pin Name

I/O

Pin Function

VDDZ_DAC VSSZ_DAC DAC_VS DAC_HS DAC_CLK DAC_DE DAC_FLD AVSS51 COMP IRSET CVBS_B ADVSS2 ADVDD2 C_G AVSS50 AVDD50 Y_R ADVSS2 ADVDD2 VM

— — I/O I/O I/O I/O I/O — — I I — — I — — I — — I

Digital power for DAC (+3.3V). Digital ground for DAC. DAC vsync. DAC hsync. DAC clock DAC DE DAC field. Analog ground for DAC (for bias circuit). Bias for DAC coupling capacitor. Bias for DAC current source. DAC blue or PB (Not used). Analog ground for DAC (for DAC’s AVSS52). Analog power for DAC (+3.3V). DAC green or Y (Not used). Digital ground for DAC. Analog power for DAC (+3.3V). DAC red or PR (Not used). Analog ground for DAC (for DAC’s AVSS52). Analog power for DAC (+3.3V). DAC VM

AVDD VIN1 VIN2 AVSS

— I I —

ADC power +3.3V. VRADC INPUT1 (Not used) VRADC INPUT2 (Not used) ADC ground.

USB_PPON_PP USB_OC_PP VDDA DN DP VSSA RREFEXT VSSP VDDP

O I — O O — — — —

USB Power on control. USB over current control. Analog core +3.3V supply. Negative output channel. Positive output control. Analog core ground. External resistor connection for current reference. PLL ground pin Double Bond. PLL +1.2V supply Double Bond.

LVDS_VSSP LVDS_VDDP LVDS_VSSO LVDS_VDDO TF2P TF2M

— — — — O O

LVDS PLL Ground. LVDS PLL Power supply (+3.3V). LVDS Output buffer VSS (Long pad) LVDS Output buffer VDD (+3.3V). LVDS Positive Output. (Not used) LVDS Negative Output. (Not used)

7 – 18

LC65RX1M Ref No. AL1 AL2 AM1 AM2 AN1 AN2 AP1 AP2 AM4 AP3 AN3 AP4 AN4 AJ6 AP5 AN5 AP6 AN6 AP7 AN7 AP8 AN8 AP9 AN9 AJ4 AP10 AN10 AP11 AN11 AL5 AM5 AL3 AL4 AK3 AM3 PLL Interface B7 A7 A6 B6 C6 D6 E6 D5 C5 B5 A5 A4 B4 C4 D4 C3 B3 A3 A2 B2 A1 B1 C1 C2 D3 D2 D1 E1

Pin Name TE2P TE2M TD2P TD2M TCLK2P TCLK2M TC2P TC2M LVDS_VDDO TB2P TB2M TA2P TA2M LVDS_VSSO TF1P TF1M TE1P TE1M TD1P TD1M TCLK1P TCLK1M TC1P TC1M LVDS_VDDO TB1P TB1M TA1P TA1M LVDS_VSSO LVDS_VDDO LVDS_VSSA LVDS_VDDA LVDS_VSSD LVDS_VDDD

I/O O O O O O O O O — O O O O — O O O O O O O O O O — O O O O — — — — — —

Pin Function LVDS Positive Output. (Not used) LVDS Negative Output. (Not used) LVDS Positive Output. (Not used) LVDS Negative Output. (Not used) LVDS Positive clock Output. (Not used) LVDS Negative clock Output. (Not used) LVDS Positive Output. (Not used) LVDS Negative Output. (Not used) LVDS Output buffer VDD (+3.3V). LVDS Positive Output. (Not used) LVDS Negative Output. (Not used) LVDS Positive Output. (Not used) LVDS Negative Output. (Not used) LVDS Output buffer VSS. LVDS Positive Output. (Not used) LVDS Negative Output. (Not used) LVDS Positive Output. (Not used) LVDS Negative Output. (Not used) LVDS Positive Output. (Not used) LVDS Negative Output. (Not used) LVDS Positive clock Output. (Not used) LVDS Negative clock Output. (Not used) LVDS Positive Output. (Not used) LVDS Negative Output. (Not used) LVDS Output buffer VDD (+3.3V). LVDS Positive Output. (Not used) LVDS Negative Output. (Not used) LVDS Positive Output. (Not used) LVDS Negative Output. (Not used) LVDS Output buffer VSS. LVDS Output buffer VDD (+3.3V). LVDS Analog VSS. LVDS Analog VDD (+3.3V). LVDS Digital VSS. LVDS Digital VDD (+3.3V).

DVSS22 DVDD22 DVSS21 DVDD21 AVSS7 MCLK2LF AVDD7 AVSS6 MPEGCLK2LF AVDD6 AVSS5 MPEGCLK1LF AVDD5 AVSS2 PLF AVDD2 AVSS1 MLF AVDD1 AVSS4 IDELF AVDD4 AVDD3 CK48MLF AVSS3 XTLI XTLO DVSS12

— — — — — — — — — — — — — — — — — — — — — — — — — — — —

PLL ground related to DVDD22; supply for VCO circuit. PLL power= 1.2V; supply for VCO circuit. PLL ground related to DVDD21; supply for digital circuit. PLL power= 1.2V; supply for digital circuit. PLL ground related to AVDD7. Low pass filter for MCLK2PLL. PLL analog power= 3.3V; supply for MCLK2PLL. PLL ground related to AVSS6. Low pass filter for MPEGCLK2PLL. PLL analog power= 3.3V; supply for MPEGCLK2PLL. PLL ground related to AVSS5. Low pass filter for MPEGCLK1PLL. PLL analog power= 3.3V; supply for MPEGCLK1PLL. PLL ground related to AVSS2. Low pass filter for PCLKPLL. PLL analog power= 3.3V; supply for PCLKPLL. PLL ground related to AVSS1. Low pass filter for MCLKPLL. PLL analog power= 3.3V; supply for MCLKPLL. PLL ground related to AVSS4. Low pass filter for IDECLKPLL. PLL analog power= 3.3V; supply for IDECLKPLL. PLL analog power= 3.3V; supply for CK48MPLL. Low pass filter for CK48MPLL. PLL ground related to AVSS3. 24MHz_PLL crystal input. 24MHz_PLL crystal output. PLL ground related to DVDD12; supply for VCO circuit.

7 – 19

LC65RX1M Ref No. E2 E3 E4 FLASH Interface E25 D24 E24 A23 B23 D23 E23 A22 B22 C22 D22 E22 A21 B21 C21 D21 A20 B20 C20 A19 E19 A18 B18 C18 D18 E18 A17 B17 C17 D17 E17 A16 B16 C16 D16 E16 E15 D15 C15 B15 A15 A14 B14 C14 D14 E14 E13 D13 C13 B13 A13 A12 PCI Interface A27 C25 B27 B25 D27 D26 E26

Pin Name DVDD12 DVSS11 DVDD11

I/O — — —

Pin Function PLL power= 1.2V; supply for VCO circuit. PLL ground related to DVDD11; supply for digital circuit. PLL power= 1.2V; supply for digital circuit.

AD30_FRA14 AD28_FRA12 AD26_FRA10 AD29_FRA13 AD31_FRA15 AD24_FRA8 AD22_FRA6 CBE3#_FRA19 AD25_FRA9 AD27_FRA11 AD20_FRA4

I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O O

AD18_FRA2 AD19_FRA3 AD21_FRA5 AD23_FRA7 AD16_FRA0 IRDY_PCAS CBE2#_FRA18 AD17_FRA1 CBE1#_FRA17 AD15_FRD15 AD7_FRD7 AD10_FRD10 AD12_FRD12 AD13_FRD13 AD11_FRD11 AD8_FRD8 AD14_FRD14 AD9_FRD9 AD6_FRD6 CBE0#_FRA16 AD5_FRD5 AD1_FRD1 AD3_FRD3 AD2_FRD2 AD4_FRD4 AD0_FRD0 FRA25 FRA24 FRA23 FRA22 FRA21 FRA20 GCS3 GCS2 GCS1 GCS0 BOOTCS FWE# FOE# NAND_CE# NAND_RDY

O O O O O I/O O O O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O O O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O O O O O I

Flash address 14/PCI AD bus bit 30. Flash address 12/PCI AD bus bit 28. Flash address 10/PCI AD bus bit 26. Flash address 13/PCI AD bus bit 29. Flash address 15/PCI AD bus bit 31. Flash address 8/PCI AD bus bit 24. Flash address 6/PCI AD bus bit 22. Flash address 19/PCI CBE#[3]. Flash address 9/PCI AD bus bit 25. Flash address 11/PCI AD bus bit 27. Flash address 4/PCI AD bus bit 20/POD host interface Card access register selection. Flash address 2/PCI AD bus bit 18/POD host interface Card I/O output enable. Flash address 3/PCI AD bus bit 19/POD host interface Card I/O Write enable. Flash address 5/PCI AD bus bit 21. Flash address 7/PCI AD bus bit 23. Flash address 0/PCI AD bus bit 16/POD host interface Card I/O output enable. PCI bus IRDY# signal/M68K CPU interface address strobe signal. Flash address 18/PCI CBE#[2]. Flash address 1/PCI AD bus bit 17/POD host interface Card I/O Write enable. Flash address 17/PCI CBE#[1]. Flash Data bus bit 15/PCI AD bus bit 15. Flash Data bus 7/PCI AD bus bit 7. Flash Data bus bit 10/PCI AD bus bit 10/POD host interface address bit 2. Flash Data bus bit 12/PCI AD bus bit 12/POD host interface address bit 10. Flash Data bus bit 13/PCI AD bus bit 13/POD host interface address bit 13. Flash Data bus bit 11/PCI AD bus bit 11/POD host interface address bit 3. Flash Data bus bit 8/PCI AD bus bit 8/POD host interface address bit 0. Flash Data bus bit 14/PCI AD bus bit 14/POD host interface address bit 12. Flash Data bus bit 9/PCI AD bus bit 9/POD host interface address bit 1. Flash Data bus bit 6/PCI AD bus bit 6/POD host interface Data bus bit 6. Flash address 16/PCI CBE#[0]. Flash Data bus bit 5/PCI AD bus bit 5/POD host interface Data bus bit 5. Flash Data bus bit 1/PCI AD bus bit 1/POD host interface Data bus bit 1. Flash Data bus bit 3/PCI AD bus bit 3/POD host interface Data bus bit 3. Flash Data bus bit 2/PCI AD bus bit 2/POD host interface Data bus bit 2. Flash Data bus bit 4/PCI AD bus bit 4/POD host interface Data bus bit 4. Flash Data bus bit 0/PCI AD bus bit 0/POD host interface Data bus bit 0. Flash address bit 25. Flash address bit 24. Flash address bit 23. Flash address bit 22. Flash address bit 21. Flash address bit 20. Flash chip select (0:Active). Flash chip select (0:Active). Flash chip select (0:Active). Flash chip select (0:Active). EPPROM chip select (0:Active). Write enable signal of Flash Rom. Read enable signal of Flash Rom. Chip select signal of NAND Flash Rom. Ready signal of NAND Flash Rom.

INTA INTB INTC INTD GNT0 GNT1 GNT2

I I I I O O O

PCI interrupt A. PCI interrupt B. PCI interrupt C. PCI interrupt D. PCI gnt signal. (Not used) PCI gnt signal. (Not used) PCI gnt signal. (Not used)

7 – 20

LC65RX1M Ref No. D25 C27 A25 C24 B24 A24 C23 E21

Pin Name GNT3 PCIRST# PCICLK REQ0 REQ1 REQ2 REQ3 FRAME#_SIZI

I/O O O O I I I I I/O

A20 IRDY_PCAS I/O B20 CBE2#_FRA18 I/O D20 TRDY#_SIZ0 I/O B19 SEPR#_DSACK1 I/O C19 DVSEL_PCDS I/O D19 PAR_DSACK0 I/O E20 STOP#_PCRW I/O POD Interface B12 POD_ITX I C12 POD_WAIT I D12 POD_CE1 O E12 POD_CTX O A11 POD_DRX O B11 POD_CD1 I C11 POD_IREQ I D11 POD_CRX O E11 POD_RESET O A10 POD_QTX I B10 POD_VS1 I C10 POD_ETX I D10 POD_CD2 I E10 POD_CE2 O A9 POD_VPP_EN O B9 POD_OVERLOAD I C9 POD_VPP_EN# O D9 POD_VCC_EN# O E9 POD_VCC_EN O A8 POD_A9 O B8 POD_A8 O C8 POD_A7 I/O D8 POD_A6 I/O D7 POD_A5 I/O C7 POD_A4 O VDA Interface AP13, AN13, AM13, AL13, VDA_R[9:0] I AK13, AP14, AN14, AM14, AL14, AK14 AP15, AN15, AM15, AL15, VDA_B[9:0] I AK15, AM16, AL16, AK16, AP17, AN17 AM17, AL17, AK17, AP18, VDA_G[9:0] I AN18, AM18, AL18, AK18, AP19, AN19 AP16 VDA_CLK I AM19 VDA_VS I AL19 VDA_HS I AK19 VDA_DE I VDB Interface, EJTAG, IDE and POD2 share with VDB AK20 VDB_DE I/O

AL20

VDB_HS

I/O

Pin Function PCI gnt signal. (Not used) PCIRSTN/68K clock output. PCI clock. PCI req signal. PCI req signal. PCI req signal. PCI req signal. PCI bus FRAME# signal/68K Transfer size bit 1. (analog with Transfer size bit 0 to indicate the number byte to be transferred during a bus cycle M68K CPU bus.) PCI bus IRDY# signal/68K address strobe signal. PCI bus CBE#[2]/Flash address bit 18. PCI bus TRDY# signal/68K Transfer size bit 0. PCI bus SERR# signal/68K Data and Size acknowledge signal bit 1. PCI bus DEVSEL# signal/68K Data Strobe signal. PCI bus PAR signal/68K Data and Size acknowledge signal bit 0. Flash, 3.3V CMOS IF, 16mA output pad. POD OOB TXI Channel. POD WAIT# signal to expand bus cycle. Card enable. POD OOB TX Gapped Symbol clock. POD OOB RX data. Card Detect. Ready/IRQ POD OOB RX Gapped clock. POD Card reset signal. POD OOB TX Q Channel. Card voltage Sense. POD OOB TX enable. Card Detect. Card enable. Slot VPP enable. Current overload detect. Slot VPP enable. Slot VCC enable. Slot VCC enable. POD Host interface address bit 9. POD Host interface address bit 8. POD Host interface address bit 7. POD Host interface address bit 6. POD Host interface address bit 5. POD Host interface address bit 4. Video input, R channel. (Not used)

Video input, B channel. (Not used)

Video input, G channel. (Not used)

Video input, Clock. (Not used) Video input, Vertical sync. (Not used) Video input, Horizontal sync. (Not used) Video input, Data enable. (Not used) Video input/output; data enable; IDE: IDE bus interrupt. EJTAG: NOP POD2: POD_CE2B#, the second POD Card enable. Video input/output; Horizontal sync; IDE: PDLAGCBLID, Passed diagnostics, cable assembly type identifier. EJTAG: TDI2, TDI EJTAG input of slave CPU. POD2: POD_A_B5, the second POD host interface address bit 5.

7 â&#x20AC;&#x201C; 21

LC65RX1M AM20

Ref No.

Pin Name VDB_VS

I/O I/O

AN20

VDB_G0

I/O

AP20

VDB_G1

I/O

AK21

VDB_G2

I/O

AL21

VDB_G3

I/O

AM21

VDB_G4

I/O

AN21

VDB_G5

I/O

AP21

VDB_G6

I/O

AK22

VDB_G7

I/O

AL22

VDB_G8

I/O

AM22

VDB_G9

I/O

AN22

VDB_B0

I/O

AP22

VDB_B1

I/O

AK23

VDB_B2

I/O

AL23

VDB_B3

I/O

AM23

VDB_B4

I/O

AP23

VDB_CLK

I/O

Pin Function Video input/output; Vertical sync; IDE: DMAREQ, IDE bus DMA request. EJTAG: NOP POD2: POD_A_B4, the second POD host interface address bit 4. Video input/output; Green channel bit 0; IDE: IDE data bus bit 0. EJTAG: TDO2, TDO EJTAG input of slave CPU CPU. POD2: POD_A_B6, the second POD host interface address bit 6. Video input/output; Green channel bit 1; IDE: IDE data bus bit 1. EJTAG: TMS2, TMS EJTAG input of slave CPU CPU. POD2: POD_A_B7, the second POD host interface address bit 7. Video input/output; Green channel bit 2; IDE: IDE data bus bit 2. EJTAG: TCK2, TCK EJTAG input of slave CPU CPU. POD2: POD_A_B8, the second POD host interface address bit 8. Video input/output; Green channel bit 3; IDE: IDE data bus bit 3. EJTAG: DCLK EJTAG output of both CPU CPUs. POD2: POD_A_B8, the second POD host interface address bit 9. Video input/output; Green channel bit 4; IDE: IDE data bus bit 4. EJTAG: TPC[0], output as EJTAG PC Trace bus, bit 0. POD2: POD_CD2B#, the second POD interface card detect. Video input/output; Green channel bit 5; IDE: IDE data bus bit 5. EJTAG: TPC[1], output as EJTAG PC Trace bus, bit 1. POD2: POD_CD1B#, the second POD interface card detect. Video input/output; Green channel bit 6; IDE: IDE data bus bit 6. EJTAG: TPC[2], output as EJTAG PC Trace bus, bit 2. POD2: POD_RSTB, the second POD host interface reset. Video input/output; Green channel bit 7; IDE: IDE data bus bit 7. EJTAG: TPC[3], output as EJTAG PC Trace bus, bit 3. POD3: POD_A_B14, the second POD host interface address bit 14. Video input/output; Green channel bit 8; IDE: IDE data bus bit 8. EJTAG: TPC[4], output as EJTAG PC Trace bus, bit 4. POD3: POD2_TS2_D0, the second POD_TS2 data[0]. Video input/output; Green channel bit 9; IDE: IDE data bus bit 9. EJTAG: TPC[5], output as EJTAG PC Trace bus, bit 5. POD3: POD2_TS2_D2, the second POD_TS2 data[1]. Video input/output; Blue channel bit 0; IDE: IDE data bus bit 10. EJTAG: TPC[6], output as EJTAG PC Trace bus, bit 6. POD3: POD2_TS2_D2, the second POD_TS2 data[2]. Video input/output; Blue channel bit 1; IDE: IDE data bus bit 11. EJTAG: TPC[7], output as EJTAG PC Trace bus, bit 7. POD3: POD2_TS2_D3, the second POD_TS2 data[3]. Video input/output; Blue channel bit 2; IDE: IDE data bus bit 12. EJTAG: PCST[0], output as EJTAG PC Trace bus, bit 0. POD3: POD2_TS2_D4, the second POD_TS2 data[4]. Video input/output; Blue channel bit 3; IDE: IDE data bus bit 13. EJTAG: PCST[1], output as EJTAG PC Trace bus, bit 1. POD3: POD2_TS2_D5, the second POD_TS2 data[5]. Video input/output; Blue channel bit 4; IDE: IDE data bus bit 14. EJTAG: PCST[2], output as EJTAG PC Trace bus, bit 2. POD3: POD2_TS2_D6, the second POD_TS2 data[6]. Video input/output; Clock; IDE: IDE data bus IO access complete. EJTAG: NOP POD3: POD_CE1B#, the second POD interface card enable.

7 â&#x20AC;&#x201C; 22

LC65RX1M AK24

Ref No.

Pin Name VDB_B5

I/O I/O

AL24

VDB_B6

I/O

AM24

VDB_B7

I/O

AN24

VDB_B8

I/O

AP24

VDB_B9

I/O

AK25

VDB_R0

I/O

AL25

VDB_R1

I/O

AM25

VDB_R2

I/O

AN25

VDB_R3

I/O

AP25

VDB_R4

I/O

AK26

VDB_R5

I/O

AL26

VDB_R6

I/O

AM26

VDB_R7

I/O

AN26

VDB_R8

I/O

AP26

VDB_R9

I/O

IEEE1394 Interface, 8051 and 656 share with 1394 AM7, AL7, AK7, AK8, AL8, HSD[7:0] I/O AM8, AK9, AL9

Pin Function Video input/output; Blue channel bit 5; IDE: IDE data bus bit 15. EJTAG: PCST[3], output as EJTAG PC Trace bus, bit 3. POD3: POD2_TS2_D7, the second POD_TS2 data[7]. Video input/output; Blue channel bit 6; IDE: Chip Select 0 for IDE interface. EJTAG: PCST[4], output as EJTAG PC Trace bus, bit 4. POD3: POD2_TS2_DEN, the second POD_TS2 data valid. Video input/output; Blue channel bit 7; IDE: Chip Select 1 for IDE interface. EJTAG: PCST[5], output as EJTAG PC Trace bus, bit 5. POD2: POD2_TS2_CLK, the second POD_TS2 clock. Video input/output; Blue channel bit 8; IDE: IDE address bus bit 0. EJTAG: PCST[6], output as EJTAG PC Trace bus, bit 6. POD2: POD2_TS2_SYNC, the second POD_TS2 SYNC. Video input/output; Blue channel bit 9; IDE: IDE address bus bit 1. EJTAG: PCST[7], output as EJTAG PC Trace bus, bit 7. POD2: POD2_TS1_D0, the second POD_TS1 data[0]. Video input/output; Red channel bit 0; IDE: IDE address bus bit 2. EJTAG: PCST[8], output as EJTAG PC Trace bus, bit 8. POD2: POD2_TS1_D1, the second POD_TS1 data[1]. Video input/output; Red channel bit 1; IDE: IDE bus DMA acknowledge. EJTAG: PCST[9], output as EJTAG PC Trace bus, bit 9. POD2: POD2_TS1_D2, the second POD_TS1 data[2]. Video input/output; Red channel bit 2; IDE: IDE bus IO Read Strobe signal. EJTAG: PCST[10], output as EJTAG PC Trace bus, bit 10. POD2: POD2_TS1_D3, the second POD_TS1 data[3]. Video input/output; Red channel bit 3; IDE: IDE bus IO Write Strobe signal. EJTAG: PCST[11], output as EJTAG PC Trace bus, bit 11. POD2: POD2_TS1_D4, the second POD_TS1 data[4]. Video input/output; Red channel bit 4; IDE: NOP EJTAG: S1=0, select DCLK/TPC[7:0]/PCST[11:0] of host CPU as output. S1=1, select DCLK/TPC[7:0]/PCST[11:0] of slave CPU as output. POD2: POD2_TS1_D5, the second POD_TS1 data[5]. Video input/output; Red channel bit 5; IDE: NOP EJTAG: S1=0, two EJTAG are separately used. S1=1, two EJTAG are used in a daisy chain style. POD2: POD2_TS1_D6, the second POD_TS1 data[6]. Video input/output; Red channel bit 6; IDE: NOP EJTAG: TDI1, TDI EJTAG input of host CPU CPU. POD2: POD2_TS1_D7, the second POD_TS1 data[7]. Video input/output; Red channel bit 7; IDE: NOP EJTAG: TDO1, TDO EJTAG input of host CPU CPU. POD2: POD2_TS1_DEN, the second POD_TS1 data valid. Video input/output; Red channel bit 8; IDE: NOP EJTAG: TMS1, TMS EJTAG input of host CPU CPU. POD2: POD2_TS1_CLK, the second POD_TS1 clock. Video input/output; Red channel bit 9; IDE: NOP EJTAG: TCK1, TCK EJTAG input of host CPU CPU. POD2: POD2_TS1_SYNC, the second POD_TS1 SYNC. 1394: Parallel data. Video 656 port; 656D[9:2], data[9:2] 8051: AD[7:0], AD bus.

7 â&#x20AC;&#x201C; 23

LC65RX1M AM9

Ref No.

Pin Name HSDCLK

I/O I/O

AM10

HSDRW

I/O

AL10

HSDSYNC

I/O

AK10

HSDAV

I/O

AM11

HSDEN

I/O

Transport Stream Interface G4, G5, F1, F2, F3, F4, F5, E5 G3 G2 G1 J3, J2, J1, H1, H2, H3, H4, H5 J4 J5 K1 Memory Interface AM30 AP29 AP30 AN30 AN31 AM33 AM32 AL32 AK30 AK31 AJ29 AJ30 AP32 AP33 AN33 AN34 AM34 AL33 AL34 AK33 AK34 AJ32 AJ33 AH33 AH34 AG29 AG30 AF30 AF31 AE33 AE32 AD32 AC30 AC31 AB29 AB30 AG32 AG33 AF33

Pin Function 1394: clock. Video 656 port; 656CLK, clock. 8051: RD, ALE, address latch enable. 1394: Not used. Video 656 port; 656CHS, horizontal sync. 8051: RD, read signal, low active. 1394: Packet synchronization. Video 656 port; 656VS, vertical sync. 8051: WR, write signal, low active. 1394: Not used. Video 656 port; data[1]. 8051: NOP 1394: Data valid. Video 656 port; data[0]. 8051: CS, chip select.

TS2_D[7:0]

Transport Stream 2, data bus.

TS2_DEN TS2_SYNC TS2_CLK TS1_D[7:0]

I I I I

Transport Stream 2, data enable. Transport Stream 2, sync signal. Transport Stream 2, clock. Transport Stream 1, data bus.

TS1_DEN TS1_SYNC TS1_CLK

I I I

Transport Stream 1, data enable. Transport Stream 1, sync signal. Transport Stream 1, clock.

DRVIMP MD0 MD1 MD2 MD3 DQM0 DQS0 DQS0N MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 DQM1 DQS1 DQS1N MD12 MD13 MD14 MD15 MCLK0 MCLK0N MD16 MD17 MD18 MD19 DQM2 DQS2 DQS2N MD20 MD21 MD22 MD23 MD24 MD25 MD26

I I/O I/O I/O I/O O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O O I/O I/O I/O I/O I/O I/O O O I/O I/O I/O I/O O I/O I/O I/O I/O I/O I/O I/O I/O I/O

Driving strength impedance match reference pin. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data write mask enable for byte 0. Data strobe for memory data bus MD[7:0]. Data strobe for memory data bus MD[7:0]. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data write mask enable for byte 1. Data strobe for memory data bus MD[15:8]. Data strobe for memory data bus MD[15:8]. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory clock for MD[31:0]. Memory clock for MD[31:0] - active LOW. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data write mask enable for byte 2. Data strobe for memory data bus MD[23:16]. Data strobe for memory data bus MD[23:16]. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data bus.

7 â&#x20AC;&#x201C; 24

LC65RX1M Ref No. AF34 AE34 AD33 AD34 AC33 AC34 AB32 AB33 Y33 W34 W33 W31 W30 V34 Y32 U33 U32 U30 T34 T31 T33 T30 R32 R30 R33 R29 P34 P33 P30 N29 N30 M30 M31 L33 L32 K32 J30 J31 H29 H30 N32 N33 M33 M34 L34 K33 K34 J33 J34 H32 H33 G33 G34 F29 F30 E30 E31 D33 D32 C32 B30 B31 A29 A30

Pin Name MD27 DQM3 DQS3 DQS3N MD28 MD29 MD30 MD31 ODT CAS RAS WE CKE CS0 CS1 MAA10 BA1 BA0 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA11 MAA8 MAA9 MD32 MD33 MD34 MD35 DQM4 DQS4 DQS4N MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 DQM5 DQS5 DQS5N MD44 MD45 MD46 MD47 MCLK1 MCLK1N MD48 MD49 MD50 MD51 DQM6 DQS6 DQS6N MD52 MD53 MD54 MD55

I/O I/O O I/O I/O I/O I/O I/O I/O O O O O O O O O O O O O O O O O O O O O O I/O I/O I/O I/O O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O O I/O I/O I/O I/O I/O I/O O O I/O I/O I/O I/O O I/O I/O I/O I/O I/O I/O

Pin Function Memory data bus. Memory data write mask enable for byte 3. Data strobe for memory data bus MD[31:24]. Data strobe for memory data bus MD[31:24]. Memory data bus. Memory data bus. Memory data bus. Memory data bus. ODT Column Access Strobe of Port A or SCAN data input. Row Access Strobe of Port A or SCAN data input. Write Enable of Port A or SCAN data input. Clock enable. Chip select for Ext Mem. Chip select for Ext Mem. Memory Address line of Port A or SCAN data input. Internal Bank Address Select for SDRAM. Internal Bank Address Select for SDRAM. Memory Address line of Port A or SCAN data output. Memory Address line of Port A or SCAN data output. Memory Address line of Port A or SCAN data output. Memory Address line of Port A or SCAN data output. Memory Address line of Port A or SCAN data output. Memory Address line of Port A or SCAN data output. Memory Address line of Port A or SCAN data output. Memory Address line of Port A or SCAN data output. Memory Address line of Port A or SCAN data output. Memory Address line of Port A or SCAN data output. Memory Address line of Port A or SCAN data output. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data write mask enable for byte 4. Data strobe for memory data bus MD[39:32]. Data strobe for memory data bus MD[39:32]. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data write mask enable for byte 5. Data strobe for memory data bus MD[47:40]. Data strobe for memory data bus MD[47:40]. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory clock for MD[63:32]. Memory clock for MD[63:32] - active LOW. Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data write mask enable for byte 6. Data strobe for memory data bus MD[55:48]. Data strobe for memory data bus MD[55:48]. Memory data bus. Memory data bus. Memory data bus. Memory data bus.

7 â&#x20AC;&#x201C; 25

LC65RX1M Ref No. F32 F33 E33 E34 D34 C33 C34 B33 B34 A32 A33 CPU Interface B26 Interrupt Interface T1 I2C Interface W5 Y5 AE5 AF5 I2S Interface T3

Pin Name MD56 MD57 MD58 MD59 DQM7 DQS7 DQS7N MD60 MD61 MD62 MD63

I/O I/O I/O I/O I/O O I/O I/O I/O I/O I/O I/O

Pin Function Memory data bus. Memory data bus. Memory data bus. Memory data bus. Memory data write mask enable for byte 7. Data strobe for memory data bus MD[63:56]. Data strobe for memory data bus MD[63:56]. Memory data bus. Memory data bus. Memory data bus. Memory data bus.

MASTSEL

Lexra bus master select, H:I2C, L:1x5180.

INT1

External interrupt, low active Edge or level.

SCLMAST2 SDAMAST2 SCLMAST1 SDAMAST1

I/O I/O I/O I/O

I2C master 2 clock. I2C master 2 data. I2C master 1 clock. I2C master 1 data.

SCKIN

WSI2S

SDI2S

SCK

SD1

SD2

SD3

V5 V4

I2SCLK SD4

O I

SD5

SD6

I2S: SCK of I2S input port. (Not used) AC Link: SDATA_OUT POD2: POD_DRXB, the second POD OOB RX data. I2S: WS of I2S input port. (Not used) AC Link: ACLINK_RSTN POD2: POD_CRXB, the second POD OOB RX gapped clock. I2S: SD of I2S input port. (Not used) AC Link: SYNC POD2: POD_QTXB, the second POD OOB TXQ channel. I2S: WS of I2S output port. AC Link: SDATA_IN_2 I2S: SCK of I2S output port. AC Link: SDATA_IN_3 I2S: SD of I2S output port. AC Link: BIT_CLK I2S: SD of I2S output port. (Not used) AC Link: SDATA_IN_0 I2S: SD of I2S output port. (Not used) AC Link: SDATA_IN_1 I2S: 1, 2, 4, 8 times of SCK of I2S output port, used by D/A chip. I2S: SCK of second I2S input port. (Not used) POD2: POD_ETXB, the second POD OOB TX enable. I2S: WS of second I2S input port. (Not used) POD2: POD_ITXB, the second POD OOB TXI channel. I2S: SD of second I2S input port. (Not used) POD2: POD_CTXB, the second POD OOB TX gapped symbol clock.

SPDIF Interface T2 UART Interface Y4 Y3 Y2

SPDIF

I/O

SPDIF output.

TXD RTS DTR

O O O

Y1 AA1 AA2 AA3 AA4 Smart card Interface V1 W1

RXD CTS DSR DCD RI

I I I I I

Data output for UART. Request to send output for UART (8mA output pad). Data terminal Ready output for UART (8mA output pad, 5V TTL interface 25PF, 6ns rise timing). Data input for UART. Clear to send input for UART. Data set ready for UART. Receive line signal detect for UART. (Not used) Ring indicator for UART. (Not used)

SCRST SCPFET

I I

W2 W3

SCIO SCCLK

I/O O

Smart card reset 0, 8mA open-drain output pad. (Not used) Smart card power FET control output, 8mA open-drain output. The smart card reader interface requires this pin to drive an external power FET to supply the current for the Smart Card (65mA typical, 100mA short to ground). (Not used) Smart card serial data, 8mA open-drain in out pad. (Not used) Smart card clock, 8mA open-drain output pad (7.1M to 3.5M) (Not used)

7 â&#x20AC;&#x201C; 26

LC65RX1M Ref No. W4 CIR, RTC Interface M1 N1 L1 L2 L3 L4 L5 M5 M4 M3 M2 K4 K5 R1 Program IO AF4

Pin Name SCPRES

I/O I

Pin Function Smart card present detect. (Not used)

VCCH12 VSSH12 WDOG VCCH33 CK32 CK32E VSSH33 CRX0 PWRON PWRBT VCCHRST VCCH12 VSSH12 CTX0

— — O — I O — I O I I — — O

1.2V RTC power for logic. RTC ground for logic. Watch dog reset. 3.3V RTC power for logic. 32.768 kHz crystal oscillator input. 32.768 kHz crystal oscillator output. RTC ground for logic. CIR0, receive data for CIRo interface. Main power, power On control signal, low active, 4mA output pad. (Not used) Power switch button. VCCH RST 1.2V RTC power for logic. RTC ground for logic. Transmission data for CIR interface.

GP15

I/O

AF3

GP14

I/O

AF2

GP13

I/O

AF1

GP12

I/O

AG1

GP11

I/O

AG2

GP10

I/O

AG3

GP9

I/O

AG4

GP8

I/O

AG5

GP7

I/O

AH5

GP6

I/O

AH4

GP5

I/O

AH3

GP4

I/O

AH2

GP3

I/O

AH1

GP2

I/O

AJ1

GP1

I/O

AJ2

GP0

I/O

Program IO. PWM: Pulse-Width Modulation. POD: OVERLOAD, the second POD interface current overload. Program IO. PWM: Pulse-Width Modulation. POD: VS1, the second POD interface voltage sense. Program IO. PWM: Pulse-Width Modulation. POD: VPP_EN#, the second POD interface slot VPP enable. Program IO. PWM: Pulse-Width Modulation. POD: VPP_EN, the second POD interface slot VPP enable. Program IO. PWM: Pulse-Width Modulation. POD: VCC_EN#, the second POD interface slot VCC enable. Program IO. PWM: Pulse-Width Modulation. POD: VCC_EN, the second POD interface slot VCC enable. Program IO. PWM: Pulse-Width Modulation. POD: WAIT#, WAIT# signal to expend bus cycle. Program IO. PWM: Pulse-Width Modulation. POD: Ready and IREQ. Program IO. PWM: Pulse-Width Modulation. POD: SI2C1_SDA, I2C bus SDA. Program IO. PWM: Pulse-Width Modulation. POD: SI2C1_SCL, I2C bus SCL. Program IO. PWM: Pulse-Width Modulation. POD: SI2C1_DEVID, I2C bus DEVID. Program IO. PWM: Pulse-Width Modulation. POD: SI2C2_SDA, I2C bus SDA. Program IO. PWM: Pulse-Width Modulation. Program IO. PWM: Pulse-Width Modulation. Program IO. PWM: Pulse-Width Modulation. POD: SI2C2_SCL, I2C bus SCL. Program IO. PWM: Pulse-Width Modulation. POD: SI2C2_DEVID, I2C bus DEVID.

Power and ground pins A26, AJ20, Y6

V5SF

—

5V safe power.

7 – 27

LC65RX1M Ref No. AA13, AA22, AB13, AB14, AB21, AB22, AD6, AE6, AF6, AG6, AH6, AJ8, AJ9, AJ10, AJ11, AJ12, AJ16, AJ17, AJ18, AJ19, AK11, AK12, AL11, AL12, AM12, AN12, AP12, E7, E8, F6, F7, F8, F9, G6, H6, J6, N13, N14, N21, N22, P13, P22, T6, U6, V6, W6 A28, B28, C28, C29, D28, D29, E27, E28, F16, F17, F18, F19, F23, F24, F25, F26, F27, F28, K6, L 6, M6 AE31, AM31, C31, L31 AA29, AA30, AA31, AA32, AA33, AA34, AD29, AD30, AE29, AE30, AH29, AH30, AH31, AJ27, AJ28, AK27, AK28, AL27, AL28, AM27, AM28, AM29, AN27, AN28, AP27, AP28, G29, G30, G31, K29, K30, L29, L30, V31, V32, W29, Y29, Y30 —

AL29, V29, C30 AL30, V30, D30 AK29 OTHER C26 AJ7 K3 K2 AM6 AL6 AK6

Pin Name VDDC

I/O —

Core power supply= 1.2V

Pin Function

VDDF

—

Power supply= 3.3V

VDDI33 VDDM

— —

3.3V power for DDR IO input buffer. 2.5V supply ring for memory interface (Long PAD).

VSS

—

MVREF VDDR VSSR

— — —

IO ground related to VDDF./Core ground related to VDDC. A31, A34, AA6, AA14, AA15, AA16, AA17, AA18, AA19, AA20, AA21, AB6, AB15, AB16, AB17, AB18, AB19, AB20, AB31, AB34, AC6, AC29, AC32, AD31, AF29, AF32, AG31, AG34, AH32, AJ13, AJ14, AJ15, AJ21, AJ23, AJ24, AJ25, AJ26, AJ31, AJ34, AK32, AL31, AN16, AN23, AN29, AN32, AP31, AP34, B32, D31, E29, E32, F10, F11, F12, F13, F14, F15, F20, F21, F22, F31, F34, G32, H31, H34, J29, J32, K31, M29, M32, N6, N15, N16, N17, N18, N19, N20, N31, N34, P6, P14, P15, P16, P17, P18, P19, P20, P21, P29, P32, R6, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22, R31, R34, T13, T14, T15, T16, T17, T18, T19, T20, T21, T22, T29, T32, U13, U14, U15, U16, U17, U18, U19, U20, U21, U22, U31, V13, V14, V15, V16, V17, V18, V19, V20, V21, V22, V33, W13, W14, W15, W16, W17, W18, W19, W20, W21, W22, W32, Y13, Y14, Y15, Y16, Y17, Y18, Y19, Y20, Y21, Y22, Y31, Y34 Memory interface voltage reference. 1.8V input buffer reference power. Ground of input buffer reference power.

RESET# FULL_EJTAG VCOTP CLK27M PCMOD TESTCON TESTMOD

I I O I I I I

System reset input, high active. 1: Full EJTAG, 0:simple EJTAG. DEMUX output. DEMUX input. 1: PC MODE (Not used) Test mode control. Test mode input.

2.12. IC8301-4 (RH-iXC154WJQZQ) 2.12.1 Pin Connections and short description Pin No. 53, 52

Pin Name CK, CK

I/O I

CKE

ODT

77, 76, 70

RAS, CAS, WE

Pin Function Clock: CK and CK are differential clock inputs. CMD, ADD inputs are sampled on the crossing of the positive edge of CK and negative edge of CK. Output (read) data is referenced to the crossings of CK and CK (both directions of crossing). Clock Enable: CKE HIGH activates, and CKE Low deactivates, internal clock signals and device input buffers and output drivers. Taking CKE Low provides Precharge Power-Down and Self Refresh operation (all banks idle), or Active Power-Down (row Active in any bank). CKE is synchronous for power down entry and exit, and for self refresh entry. CKE is asynchronous for self refresh exit. CKE must be maintained high throughout read and write accesses. Input buffers, excluding CK, and CKE are disabled during powerdown. Input buffers, excluding CKE, are disabled during self refresh. Chip Select: All commands are masked when CS is registered HIGH. CS provides for external bank selection on systems with multiple banks. CS is considered part of the command code. On Die Termination: ODT (registered HIGH) enables termination resistance internal to the gDDR2 SDRAM. When enabled, ODT is only applied to each DQ, UDQS/UDQS, LDQS/LDQS, UDM, and LDM signal for x16 configurations. The ODT pin will be ignored if the Extended Mode Register (EMRS) is programmed to disable ODT. Command Inputs: RAS, CAS and WE (along with CS) define the command being entered.

7 – 28

LC65RX1M Pin No. 66, 62

Pin Name (L) UDM

42, 71

BA0 - BA1

50, 72, 75, 44, 49, 73, 74, 45, 48, 46, 43, 47, 13

A0 - A12

81, 57, 61, 29

10, 14, 15, 16, 32, 36, 3, 7, 22, 24, 26, 28, 63, 67, 80, 84 33, 35, 37, 39, 54, 56, 58, 60, 82 9 78 5, 12, 18, 20 11. 17, 65, 69 40

I/O I

DQ LDQS, (LDQS) UDQS, (UDQS)

I/O I/O

NC/RFU

—

Pin Function Input Data Mask: DM is an input mask signal for write data. Input data is masked when DM is sampled HIGH coincident with that input data during a Write access. DM is sampled on both edges of DQS. Although DM pins are input only, the DM loading matches the DQ and DQS loading. Bank Address Inputs: BA0 and BA1 define to which bank an Active, Read, Write or Precharge command is being applied. BA0 also determines if the mode register or extended mode register is to be accessed during a MRS or EMRS cycle. Address Inputs: Provided the row address for Active commands and the column address and Auto Precharge bit for Read/Write commands to select one location out of the memory array in the respective bank. A10 is sampled during a Precharge command to determine whether the Precharge applies to one bank (A10 LOW) or all banks (A10 HIGH). If only one bank is to be precharged, the bank is selected by BA0, BA1. The address inputs also provide the op-code during Mode Register Set commands. Data Input/ Output: Bi-directional data bus. Data Strobe: output with read data, input with write data. Edge-aligned with read data, centered in write data. LDQS corresponds to the data on DQ0-DQ7; UDQS corresponds to the data on DQ8-DQ15. The data strobes LDQS and UDQS may be used in single ended mode or paired with optional complementary signals LDQSand UDQS to provide differential pair signaling to the system during both reads and writes. An EMRS (1) control bit enables or disables all complementary data strobe signals. No Connect: No internal electrical connection is present.

VDDQ

—

DQ Power Supply: 1.8V ± 0.1V.

VSSQ

—

DQ Ground.

VDDL VSSL VDD VSS VREF

— — — — —

DLL Power Supply: 1.8V ± 0.1V. DLL Ground. Power Supply: 1.8V ± 0.1V. Ground. Reference voltage.

7 – 29

LC65RX1M 2.13. IC8451 (VHiS29G128P-1Q) 2.13.1 Block Diagram

2.13.2 Pin Connections and short description Pin No. 2 15 12 11 18 19 54 3 4 5 6 7 8 9 10 20 21 22 23 24 25 26 31 51

Pin Name A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 DQ15/A-1

I/O I I I I I I I I I I I I I I I I I I I I I I I I/O

Pin Function 23 Address inputs

DQ15 (Data input/output, word mode), A-1(LSB Address input, byte mode)

7 â&#x20AC;&#x201C; 30

LC65RX1M Pin No. 49 47 45 42 40 38 36 50 48 46 44 41 39 37 35 32 34 13 16 14 53 17 43 29 33, 52 1, 27, 28, 30, 55, 56

Pin Name DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 CE# OE# WE# WP#/ACC RESET# BYTE# RY/BY# VCC VIO VSS N.C

I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I I I I I I O — O — —

Pin Function 15 Data inputs/outputs

Chip Enable input Output Enable input Write Enable input Hardware Write Protect input/Programming Acceleration input Hardware Reset Pin input Selects 8-bit or 16-bit mode Ready/Busy output 3.0 volt-only single power supply Output Buffer power. Device Ground Pin not Connected Internally.

2.14. IC8702 (RH-iXC0150WJQZY) 2.14.1 Block Diagram

2.14.2 Pin Connections and short description Pin No. 1 2 3 4 5 6 7 8

Pin Name VIN S0 S1 VDD CLK1 CLK2 GND X1

I/O I I I — O O — I

Pin Function Voltage input to VCXO. Zero to 3.3V signal which controls the VCXO frequency. Select pin 0. Internal pull-up resistor. Select pin 1. Internal pull-up resistor. Connect to +3.3 V. Output clock 1. Weak internal pull-down when tri-state. Output clock 2. Weak internal pull-down when tri-state. Connect to ground. Crystal input. Connect this pin to a crystal.

7 – 31

LC65RX1M Pin No. 9 10 11 12 13 14 15 16

Pin Name X2 VDD CLK3 CLK4 GND PDTS VDD S2

I/O O — O O — I — I

Pin Function Crystal Output. Connect this pin to a crystal. Connect to +3.3 V. Output clock 3. Weak internal pull-down when tri-state. Output clock 4. Weak internal pull-down when tri-state. Connect to ground. Power-down tri-state. Powers down entire chip and tri-states clock outputs when low. Internal pull-up resistor. Connect to +3.3 V. Select pin 2. Internal pull-up resistor.

2.15. IC9101 (RH-iXC121WJN8Q) 2.15.1 Pin Connections and short description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

Pin Name D3.3V N_CPLD_CS0 XERE ROM_CE N_CPLD_CS1 XEWE NC D3.3V FRDA_0 FRDA_1 FRDA_2 FRDA_3 FRDA_4 FRDA_5 FRDA_6 FRDA_7 FRAA_0 GND_B FRAA_1 FRAA_2 FRAA_3 FRAA_4 FRAA_5 N_CPLD2_CNF_DONE FRAA_6 FRAA_22 FRAA_23 FRAA_24 GND_B SBCLK_27M 3.3V_DPOW_DETECT NACE_N CODEC_RST N_VCCH_RST N_COLD_RST GND_B D3.3V CPLD_33M N_FLS_RST N_EXT_RST N_EXT_BOOT D3.3V ROM_ADD22 ROM_ADD23 ROM_ADD24 N_ROM_OE GND_B N_ROM_WE N_EXT_CE N_FLS_CS0

I/O — I I I I I O — I/O I/O I/O I/O I/O I/O I/O I/O I — I I I I I I I I I I — I I I O O O — — I O O I — O O O O — O O O

Pin Function Power supply(+3.3V) HiDTV CS0 ⋅⋅⋅ Flash HiDTV PCI_BUS OE# BOOT ROM CE input HiDTV CS1 ⋅⋅⋅ CPLD HiDTV PCI_BUS WE# HiDTV PCI_BUS ACK# Power supply (+3.3V) For HiDTV PCI_BUS DATA0/CPLD control For HiDTV PCI_BUS DATA1/CPLD control For HiDTV PCI_BUS DATA2/CPLD control For HiDTV PCI_BUS DATA3/CPLD control For HiDTV PCI_BUS DATA4/CPLD control For HiDTV PCI_BUS DATA5/CPLD control For HiDTV PCI_BUS DATA6/CPLD control For HiDTV PCI_BUS DATA7/CPLD control HiDTV PCI_BUS ADDRESS0 Ground For HiDTV PCI_BUS ADDRESS1/CPLD control For HiDTV PCI_BUS ADDRESS2/CPLD control For HiDTV PCI_BUS ADDRESS3/CPLD control For HiDTV PCI_BUS ADDRESS4/CPLD control For HiDTV PCI_BUS ADDRESS5/CPLD control FPGA Config For HiDTV PCI_BUS ADDRESS6/CPLD control HiDTV PCI_BUS ADDRESS22 HiDTV PCI_BUS ADDRESS23 HiDTV PCI_BUS ADDRESS24 Ground HiDTV PCI_BUS CLOCK (27MHz) DPOW system 3.3V detection NAND-FLASH CE output CODEC reset HiDTV standby reset HiDTV main reset Ground Power supply (+3.3V) System clock (33MHz) On-Board Flash reset External Flash reset Flash start-up discrimination (H = On-Board, L = External) Power supply(+3.3V) On-Board/External Flash ADDRESS22 On-Board/External Flash ADDRESS23 On-Board/External Flash ADDRESS24 On-Board/External Flash OE# Ground On-Board/External Flash WE# External Flash CE# On-Board Flash CE0#

7 – 32

LC65RX1M Pin No. 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114

Pin Name N_CPLD_INT0 N_CPLD_INT1 DSP_RST N_TUNER_INT D3.3V VON PE A_MUTE_ADIF BUS_SPLIT I2C_EXT STB GND_B CPLD_TDI PNL_WP CPLD_TMS FE_RST CPLD_TCK FEPG0_COMP FEPG1_LOCK FERR_UNCOR N_TS1_DEMORST GND_B D3.3V EXTRG DRSTMSK N_IRS_INT CLON_RC DTM_RST N_IRS_RST DTM_GPIO0 DTM_GPIO1 DTM_UART_INT DTM_UART_RST D3.3V AGC_SEL HP_MUTE HP_PLUG CION GND_B GND_B SC2_MUTE SPDIF_MUTE SC_MUTE S_STBY DU_LINK_ACK0 SIF_SW DU_LINK_IRQ CNVSS GND_B N_PCI_RST RS_BUF_CNT PNL_I2C_EN AUDIO_SEL2 PCHD_AUDIO_SEL N_DVOUT_EN MSP_RESET HDMI_RESET GND_B D3.3V SVP_RESET N_PHY_RESET N_LINK_RESET FL_VPP0 GND_B

I/O O O O INT — O O I O O O — I O O O O O I I O — — O O I O O O I O I O — O O I O — — O O O O I O I O — O O O O O O O O — — O O O O —

Pin Function HiDTV (Level interrupt, Active Low) SVP_WX (Level interrupt, Active Low) DSP reset CE6353 (Level interrupt, Active Low) Power supply (+3.3V) Inverter ON/OFF control PANEL controller control signal HDMI_MUTE control signal Slow bus/video bus enable (Isplation supported) I2C bus enable (Isolation supported) Inverter ON/OFF control Ground VCOM Write Protect control signal CE6353 reset Sleep signal Signal LOCK detection Error flag TS1 demodulator reset Ground Power supply (+3.3V) Partner Partner IrSS interrupt request For controlling clone remote control Reset signal for DTM IrSS reset signal Control signal for DTM (GPIO0) Control signal for DTM (GPIO1) Interrupt request of UART-I2C conversion IC for DTM Reset of UART-I2C conversion IC for DTM Power supply (+3.3V) Digital/Analog AGC switching control HP audio mute control HP connection detection VCC/ON signal for PCMCIA Ground Ground SCART2 audio mute control SPDIF audio mute control SCART1 audio mute control Audio AMP shutdown control ACK from IEEE1394 chip I2C line SW control of sound multiplex decoder IEEE1394 chip interrupt request Monitor microprocessor write mode control Ground PCI reset Monitor microprocessor UART mode switching VCOM/I2C switch control DTV/HDMI analog audio switching control 2 PC/HDMI external audio input switching DTV/AD YPbPr switching MSP reset HDMI-TMDS_SW reset Ground Power supply(+3.3V) SVP_WX reset i.Link PHY reset i.Link LINK reset Flash WP Ground

7 – 33

LC65RX1M Pin No. 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144

Pin Name AREA_4 DIG_AD HDMI_SEL1 HDMI_SEL2 HDMI_SEL3 HDMI_HPG1 HDMI_HPG2 CPLD_TDO GND_B HDMI_HPG3 HDMI_SW_EMP HDMI_PLG_EN D3.3V MUTE_HDMI HPLUGOUT_A HDMIKEY_WP N_CPLD2_RST PNL_POW HDMI_SW_INT HDELAY_DOUT N_MICOM_FLSW N_MICOM_RST SMPOWHOLD PM_REQ N_DBOOTS CBOOTS D3.3V N_DBG_RST N_SRESET GND_B

I/O I I O O O I I O — I O O — O I O O O INT O O O O INT I I — I I —

Pin Function Destination setting (L: Europe/H: Asia) DTV add-on Unit presence/absence setting HDMI_Select_1 HDMI_Select_2 HDMI_Select_3 HDMI_HotPlug_1 HDMI_HotPlug_2 Ground HDMI_HotPlug_3 (for temporary insertion) HDMI output waveform adjustment HDMI output control Power supply(+3.3V) HDMI_MUTE initial value Low HDMI Plug Out detection EDIT_Write Protect CPLD2 reset Panel power control HDMI SW IC interrupt request HDMI Data Delay Serial_Data_OUTPUT Monitor microprocessor write control Monitor microprocessor reset control Power holding signal Panel Maicon REQ Microprocessor write request SD card activation detection Power supply(+3.3V) Debugger (Partner) reset System reset Ground

2.16. IC9601, 9603, 9604, 9606 (VHiTPS40055-1Y) 2.16.1 Block Diagram

7 – 34

LC65RX1M 2.16.2 Pin Connections and short description Pin No. 14

Pin Name BOOST

I/O O

BP5

BP10

COMP

HDRV

ILIM

KFF

LDRV

PGND

—

2 5 6

RT SGND SS/SD

I — I

12 4

SW SYNC

I I

VFB

VIN

Pin Function Gate drive voltage for the high side N-channel MOSFET. The BOOST voltage is 9 V greater than the input voltage. A 0.1-µF ceramic capacitor should be connected from this pin to the drain of the lower MOSFET. 5-V reference. This pin should be bypassed to ground with a 0.1-µF ceramic capacitor. This pin may be used with an external DC load of 1 mA or less. 10-V reference used for gate drive of the N-channel synchronous rectifier. This pin should be bypassed by a 1-µf ceramic capacitor. This pin may be used with an external DC load of 1 mA or less. Output of the error amplifier, input to the PWM comparator. A feedback network is connected from this pin to the VFB pin to compensate the overall loop. The comp pin is internally clamped above the peak of the ramp to improve large signal transient response. Floating gate drive for the high-side N-channel MOSFET. This pin switches from BOOST (MOSFET on) to SW (MOSFET off). Current limit pin, used to set the overcurrent threshold. An internal current sink from this pin to ground sets a voltage drop across an external resistor connected from this pin to VCC. The voltage on this pin is compared to the voltage drop (VIN-SW) across the high side MOSFET during conduction. A resistor is connected from this pin to VIN to program the amount of voltage feed-forward. The current fed into this pin is internally divided and used to control the slope of the PWM ramp. Gate drive for the N-channel synchronous rectifier. This pin switches from BP10 (MOSFET on) to ground (MOSFET off). Power ground reference for the device. There should be a low-impedance path from this pin to the source (s) of the lower MOSFET (s). A resistor is connected from this pin to ground to set the internal oscillator and switching frequency. Signal ground reference for the device. Soft-start programming pin. A capacitor connected from this pin to ground programs the soft-start time. The capacitor is charged with an internal current source of 2.3 µA. The resulting voltage ramp on the SS pin is used as a second non-inverting input to the error amplifier. The output voltage begins to rise when VSS/SD is approximately 0.85 V. The output continues to rise and reaches regulation when VSS/SD is approximately 1.55 V. The controller is considered shut down when VSS/SD is 125 mV or less. All internal circuitry is inactive. The internal circuitry is enabled when VSS/SD is 210 mV or greater. When VSS/SD is less than approximately 0.85 V, the outputs cease switching and the output voltage (VOUT) decays while the internal circuitry remains active. This pin is connected to the switched node of the converter and used for overcurrent sensing. Syncronization input for the device. This pin can be used to synchronize the oscillator to an external master frequency. If synchronization is not used, connect this pin to SGND. Inverting input to the error amplifier. In normal operation the voltage on this pin is equal to the internal reference voltage, 0.7 V. Supply voltage for the device.

7 – 35

LC65RX1M 2.17. IC9602 (VHiMP2367DE-1Y) 2.17.1 Block Diagram

2.17.2 Pin Connections and short description Pin No. 1

Pin Name BS

2 3

IN SW

4 5

GND FB

COMP

I/O I I

Pin Function High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel MOSFET switch. Connect a 0.01ÂľF or greater capacitor from SW to BS to power the high side switch. Power Input. IN supplies the power to the IC, as well as the step-down converter switches. Drive IN with a 4.45V to 28V power source. Bypass IN to GND with a suitably large capacitor to eliminate noise on the input to the IC. Ground. Feedback Input. FB senses the output voltage to regulate that voltage. Drive FB with a resistive voltage divider from the output voltage. The feedback reference voltage is 0.8V. Compensation Node. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to GND to compensate the regulation control loop. In same cases, an additional capacitor from COMP to GND is required. Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator, drive it low to turn it off. Soft-start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND to set the softstart period.

7 â&#x20AC;&#x201C; 36

LC65RX1M

- MEMO -

7 – 37

LC-65RX1M

Service Manual

LC65RX1M

CHAPTER 8. BLOCK DIAGRAM/OVERALL WIRING DIAGRAM [1] SYSTEM BLOCK DIAGRAM USB

SCART_G(V6㧕 SCART_B(W9) SCART_R(Y8)

Y2 (W6) Pb2(Y9) Pr2(W8)

HDMI_SPDIF

SPDIF(W12) WS,SD0,SCK,AUDIOCLK Rev.C (U12)(V12)(Y11)(W11)

+9V_A

IN3 PC/HDMI/DTM_L/R IN5 ANALOG L/R IN6

+3.3V +1.5V IC1402

SIF DEC

DTV_SPDIF SP_OUT1

P2401 EJTAG Connector

DTV_SPDIF

HP_OUT1

RxD,TxD

OPT OUT

OPT_OUT

DTV_CVBS DTV_I2S

UART_3(AV)D_OUT (B㩘㩩㨺㩎) I2C_1 TS(S)

USER

8051BUS

IC8704 EEPROM 64kbit DTCP

+3.3V

X'tal 32KHz

XTLI XTLO UART-1 RxD,TxD IC2008 RxD,TxD 3State UART-2

IC9101 CPLD IXC121WJ

R/C

L/R

HDMI_L/R

+9V_A

PC Audio

PC_L/R

(Mini Plug)

INPUT HDMI 1 5

WP EEPROM

IC1504 Audio-SW NJM2750

From

CPLD

To mini AV FFC SC1503 IC1507 +3.3V HDMI-SW +1.8V (Correspondence Ver1.3) RX_x8 SII9185A In2 TMDS CK,HD,VD,DE

RX_x8 WP EEPROM

INPUT 7

D-SUB 15pin

CEC

SEL0/1/2 To MONITOR MICON

H,V ANALOG-RGB

D_POW,RS_ON,LINK_POW,EU_POW,SMPOW MUTE_A_ALL

I/O

SC9301 Software Witting Connector

SYNC_DET I/O DVIA_DET

IC IR_SW SET08 CLONE_RC RS_TXD,RXD

Q2404

P1101(13PIN) USB

OPT+3.3V

To mini AV

BU+3.3V

8–1

OP C

SLE EP

KEY OPC

UR+15V

POWER PWB

BU+3.3V

LED

BU+5V

MAIN Faction ˴A9V(From SUB㧕 ˴D5V D5V_USB ˴D3.3V ˴D2.5V ˴D1.8V ˴D1.2V D1.3V ˴DTM_10V

‫ޣ‬KM‫ޤ‬ (P2002 4p) NA338WJ

‫ޣ‬RA‫ޤ‬P2003(15p) NA335WJ

BackUp Faction ˴BU+5V BU+3.3V

INT

RS_TXD,RXD IC2404,5 TC4W66 In1 USB_UP,USB_DN

INPUT HDMI 2 6

CEC USB_PPON,USB_OC

WP EEPROM

IC8701 FLASH 128Mbit

PNL_POW_MAIN

From CPLD

LNBSHORT

I/O

UART

IC9106 IC8702 27MHz INVERTER CLOCK 27MHz X'tal 74VHC04T IXC150WJQZ 27MHz

RX_x8

In0

RX_x8

+3.3V

P9101 CPLD Writting Connector

PS_ON

PNL_POW,PM_REQ I/O N_SRESET I/O IR_PASS AGC/AFT I/O A/D

FLASH & PCI BUS

+60V

Thermister

ANT_POW

RS_BUF_CNT

PCI CLK (33MHz㧕

‫ޣ‬PG‫ޤ‬ (12p)

POWER

I/O I/O I/O

I/O

HP_L/R

INPUT 7

HDIM Audio

IC2004 EEPROM BR24L08F

DET_PNL5V,DET_10V,DET_6V, DET_D3V3,DET_3V3 RxD,TxD

PNL_POW_MAIN

(Mini Plug)

+3.3V

AC_DET

FLASH BUS

27MHz

INPUT 6

GPIO

33MHz

RS-232C

QSTEMP

TxD/RxD

IC2403 RS232C TxRx ISL83220

4or5-Wavelength

INT

UART(Witting)

24MHz

+3.3V +3.3V

I2C1_SCL I2C1_SDA

A/D

CEC_I

HP_PLUG

P1302

X'tal 24MHz

㪠㪥㪭㪜㪩㪫㪜㪩 PWB

I/O

PSIZ_L PSIZ_H AREA1 AREA3 PNLTYPE

P8101 Debug Connector

SI2C1_SDA/SCL SI2C2_SDA/SCL

CK32 CK32E

3-5V BUF

BU+3.3V W_PROT_M

I/O INT/I

P2004 Connector for distinction

RESET 32KHz

IF to MAIN I/F (80PIN) WA673WJ

I2C

CEC_O

From HDMI

Rev.C

USB

DET_PANL12V

O INT/I

EXE_LED2

46㧦24 52㧦26

I/O

INT/I

GPIO

GP11

LRCK,BCKOUT,SDOUT4 DAC AK4341ET

INV_VON(STB)

INV_ERR(ERR_PNL)

WAKE_UP

Digital AV decode & Main CPU

+3.3V IC1951 +9V_A

LCH

+5V

I/O

IC8101 IXC011WJ

AMP+15VIC1901 Audio AMP YDA147SZ

I/O

BU+3.3V +3.3V

I/O

㧮㧸

I/O

I/O EXE_LED

0.1ch

32.728KHz

IC8703 EEPROM 64kbit

+1.3V +3.3V +5V

HiDTV-Pro LX66

20MHz

+3.3V

INVERTER

20MHz 32KHz Xtal Xtal

IC2002 CPU M16C-28

INT

(TUER)

L,RCH

IC2001 Reset

VSYNC

I2CEXT

AMP+15V IC1301 Audio AMP YDA147SZ

䇼SP䇽

80 FFC 80 FFC

IC8301-4 DDR2 256Mbit x 4

I2C_0

DTV_I2S DTV_SPDIF

PNL+12V_ON

P2001 Software witting /Emulator Connactor

+2.5V

HDMI_SPDIF

TS(SERIAL )

OPTICAL OUT

‫ޣ‬LB‫ޤ‬ P2603 (9pin )

BU+3.3V

100KHz

DTV_I2S

VCOM_WP

From CPLD

64bit TX

R2A15505

8051BUS

D-IN

‫ޣ‬LB‫ޤ‬ (8pin )

IC1404 I2S_B CODEC AK4683EQ HDMI_SPDIF

IN2

IN3_L/R

From CPLD

Reset(F18)

‫ޣ‬LA‫ޤ‬ (14pin )

IN1

PNL_I2C_EN

To CPLD

Power Input select Channnel select Volume

UR+15V

IN2_L/R

MON_OUT

IC2601 BUS SW SCL,SDA 7W66U

400KHz

Y3 (Y6㧕 Pb3(Y10) Pr3(V8)

Y,Pb,Pr

PNL+12V

SIF

I2S_A

Von

AMP+15V

+5V +3.3V

IN1_L/R

LRCK,BCKOUT,SDOUT4

SDOUT1,2,3

PC_RGB

I/O

I2S DSP

IC2602 VBRT DAC M62334FP

PC_RGB HD(V10),VD(U10) PC_R(U8) PC_G(Y7) PC_B(W10)

A/D(x2)

IC1403 DSP TAS3108

HD,VD

HS (M18) VS (M19) DPB_CLK(R20)

HDMI

INT

+3.3V

CK,HD,VD,EN SCL,SDA

POW_SW

+31V +5V

CVBS TU7501 +5V Tuner IC7503 IF WSEC VT1Y5CD501 IF-DEMOD TDA9886

Chip Debug Connector

STBY_POW

RF IN

R/L,U/D TEMP[3:0],O/S_SET,ROMSEL,FRAME

KEY1,KEY2

IC1401 EEPROM

IF to MAIN I/F (80PIN) WA673WJ

IC7508 VCA BA7655AF

P3301

SCL(H18) SDA(H17)

TMDS Rx

IC1405 AMP NJM4565

TU_P_GAIN

Video Processer SVP-WX78

I/O(x4)

CVBS L/R

From CPLD IC3301 IXC010WJ

Y,Pb,Pr

DTM_CVBS MONITOR MONITOR OUT OUT

10 Pear

A/D

Digital (V6)

+2.5V

74.25MHz

LVDS OUT

FB1(Y5)

TV Main YPbPr Out (OUT1) MONITOR OUT(V)

1920㬍 1080

‫ޣ‬LW‫ޤ‬P2601 (41p Coaxial)

DTM_RS

GPIO_1,2

DTM_TXD,RXD

IC4501 SC16IS740 UART-I2C

COMP1,2 S3

COMP2_PLUG

DTM_SPDIF

+3.3V +2.5V +1.2V

LED_YOYAKU,LED_OPC,LED_R,LED_G LED(x4)

PLUG DET

Tuner (V5)

IC3501-2 DDR (EM6A9320BI) 128Mbit

32bit C(V9)

V1,V2,V3

(YC3)

250MHz

XTLI XTLO

CVBS1(Y4)

I/O

L/R

Main C

INT0

YPbPr

Main C

+2.5V

OPC

YPbPr

Video3 (V4)

Main Y/V

R/C

CVBS/LR

CVBS

LCD PANEL

24MHz Xtal

CPLD

OPC

V2_PLUG

INPUT 2

TV Main Out (OUT2)

Video2 (V2) (YPbPr2)

COMP1_PLUG

SCL,SDA SCL,SDA

24MHz

YPbPr

DTM I/F P4502(13PIN)

R/C

INPUT 1

Inducing distinction setting

L33

Video1 (V1) (YPbPr1)

CVBS L/R

DTM_L/R

V1_PLUG

DTM_CVBS

IC506 +5V+9V_A Video SWITCH L13 MM3151XQ |

YPbPr

DTM I/F P4501(12PIN)

INPUT3 I/F P501(15PIN)

TERMINAL

LCD CONT

DET_PNL12V

USB TO MAIN

HDMI FFC TO MAIN

CVBS/LR

MAIN

IC804 R5523N1B ‫ޣ‬LP‫ޤ‬P2602 (11p)

IC802 TMDS141

+10V

H.264/DMB-T +5V

‫ޣ‬PD‫ޤ‬POWER˴CONT˴ P9601(12PIN)

+3.3V

DIGITAL UNIT VBUS

I2C

USB_UP,USB_DN

INPUT 3

HDMI 3 RX_x8

V3 L/R V3_PLUG CVBS

S(Y/C)

S3_PLUG

CVBS/LR

CEC

S Video

MINI AV

‫ޣ‬PA‫ޤ‬To Terminal (9p)

‫ޣ‬AC‫ޤ‬ (3p)

‫ޣ‬AC‫ޤ‬ (3p) AC IN

AC INLET

LC-65RX1M

[2] OVERALL WIRING DIAGRAM

8–2

LC-65RX1M

Service Manual

LC65RX1M

CHAPTER 9. PRINTED WIRING BOARD [1] MAIN UNIT Wiring Side-A J

9–1

LC-65RX1M Chip Parts Side-A P1101

C1141

R1144

C1140 C1139

R2612

R1166

FL2615

R2617

FL2617

R2613

FL2616

P9602

R2621

R2618 R2611 R2013

FL2613

P9601 C2605 R2620 R2619 C2604

LUG1103

LUG1106

P2603

P2602

R9669 LUG1102

R9651

R9650 R9670 IC9607 P2001

P2005

C9667

C1810

C1811

D1804

D1803

R1113

Q1109 R1112

SC1101 R9625 R2432 R2415

R2436 X8701

R9133 R9129 R9144

R9189 R9190

R9143 R9132 R9131 R9136

R4518

R1504 C1502

C1515

C1512 D1528 D1526 C1513

C1506

IC2403

FB1505

D1527

C1511 R1533 R1526 R1532

C1514

R1548 R1552

R1553

R1554 D1508

D1507

D1506

D1504

R1549

R1534 R1529 FB1506 R1528 C1510 C1505 D1525

C1509

D1518

D1501

R1543

R1541 C1521

C1523

FB1507 R1536

R1518

FB1508 R1538

R1544

R1566 C1533

C1527

VA1516

VA1514 VA1515

L1513

L1512

L1510

R1565

D1509

R4512 R4511

IC1507

R1622

VA1509

R1537

R1505

C1540

Q1517 Q1506

D1502

D1510

IC1502

VA1508

R1523

C1524

C1516 R1540

P4501

IC1503

R1550

R1594

L1509

VA1506 VA1507

VA1504 VA1505

L1508

L1507

VA1502 VA1503

VA1501

L1506

D2403

R1134

P4502 D1512

R1593

C2405

Q2407

R2414

R2430 P9101 SC1503

C4503

R1545

IC1501

R1511

Q1519

C1530

Q1504

LUG1105

R1501

C1503

LUG1104

C2403

D2404

Q1110

L1103 R9139

R9337

SC9301

R2425 R9161 R9178 R9176 R9174 R9179 R1576 R1604

C1520

C8121

C8140

C8139

R1577

P1102

X8101

FB8112

FB8110

C8110

C8108

FB2402

C8181 C8117

IC4501

X4501

R1502 R1519

FB2403

D2401

C2408 C2407 C2406

FB2404

IC8304

D2402

R2408

R2410

R2409

C8380

C8397

FB8102

C8149

C8302 R8304 R8303

C8109 C8111 C8176 C8179 C8180 FB8101 C8146 C8135 C8136

FB8109

R8149

FB8107

R9306

FB1510

C4502

C8105

R9307

R1575

X8102

VA1512 VA1513

IC8303

C8104 R8116

Q9103

R4513 C4501

C8232 C8233 R8110 R8134 R1135 R8132

VA1510 VA1511

C8106 R8117 C8107

C8379

R9336

R9318

R8135

L1511

R8310

IC8101

R8332

C8704

R9183 R9125 R9181 R9182 R9180 R9127

R8118

R8311

R8175 R8169 R8154 R8148 R8101 R8131

R9121

R9193

R2427

R2428

R2426

R8136 TP8102 TP8101 R8140 R2429

C8346 IC8302

R8333

R8710 C8705

IC8702

R9112 R9113 R9194 R9149 IC9101

R9312

C8345 IC8301 C8301 R8302 R8301

D8102 R8167

D8101 R8147 R8141 R8137 R2421 R8105 R1133 R8173 R8172

IC2405

R9116

R9120

C3357

R9335

R9327 R9316 R9326 R9314 R9315 R9328 R9313 R9317 R9311 R9325 R9329 R9319 R9320 R9321 R9330 R9322

P2401

C8120

R8152

R2442

IC2404 C9116 R9103 R2423 R9117

C3388

R9323

Q2404

R9195 C8707

FB3313

C8150

R8120

R8145 R8139 R8143 R8144 R8138 R8142 FB8105

R2405 C2410

Q1106 Q1105 Q1103

R9111

C8706 R8714 R8729

D8701

R9324

R8153

R1126 IC9602 FB9702

R9162

R2424

R9138

R8705 R8704

C3389

R8119

P8102

R1125

Q1801 Q1804 C9628

C9671

Q8701

FB3303

R3506

FB3314

R3502 R3501

C8151

R8123

C9607

L9602

C8702

R3512

R3557

C9673

R8701

FB3304

R8703

FB3306 Q8702

R3543 R3542

L3301

R3576 R3558

C3378 R3352 R3351 R3348 R3347 R8111 R8112

R3345 R3344

R8124

LUG1101

Q1104

IC9601

C1128

C9611 IC9606

IC9603

C9664

C9606

L9605

C3374

R3354

C1102

IC3301

L9603

C9672

R3555

L3302

LUG3503

R3342

L1101

C1103

R3306

R3554

L3303

R3503

R3560 R3577

R3546 R3575

FB3305

R4467

R3556

L1102

R1802

R3308

IC3502

R4479 R4477 R4478 R4476

L9604

L3305 L3304

L1105

L1106

Q1805

Q1117

C9657 IC9604

C9625

R3521

L9601

R3524 R3544 R3574

R3540

L1104

L1801

Q1119

R1164

Q1121 Q1122

R1154 FL2611

FL2607

R2614

FL2603

FL2605

R2610

R3578 R3509

IC3501 R3530 R3573

R3541

R4471 R4469

R4481 R4480

R2608

R2615

FL2601

L2605

L2604

L2603

L2608

R2606

L2612

R2604

L2610

L2611

L2609

L2602

L2601 L2607

L2606 R3514 R3570

C3539

C8709 R8718

R3525

R3539 R3532

R4456 R4457

R4458 R4459 R4460 R4461

R4474

C9660

R1804

R3307

R3526

C3518

R4473 R4472 R4465 R4464 R4482 R4483

FL2001

R2048

R4475

C9656

C9622

C1112 C1127

R3572 R3528

R2006

X2001

C9620

C9608

R3311

P3301

R2069

C2009 R2027 R2028 R2034 C2011

C9618

C9662

R3516 R3571

R2036

R2051 R2012

C2019

C9617

R2601

R3507

IC2401

D2003 R2041 R2003 R2082 R2054 R2055 R2056

R1114

FB9603 R2602

R3341

IC8703

R2022 R2031

R3527

R1805 R1814

R1158

R1115 R1161 R1157 R1160

C3377

R2603

R2407

C2027 IC2402

IC2002

L9606

C8708

R2009

IC8704

C2402

C2020

R2005 R2053 R2045

R2011 R2058 R2059 R2038 R2077 R2075 R2062 R2063 R2057 R2044

R2076

TH2001 R2019

C3548

IC2602

C2001

C2609

IC2011

R2002 R2020

R9667

IC9605 FB3501

FB2016

D1102

R1159 R1165 R1142

C9649

C9674

FB2015

R1155 C1126

C9675

P2004

FB2014

P2601

IC1801

D1101

R1101

R9607

C1808

C9642

R2096 R2095

R1807 R1809 R1808 R1810 C1805 R1806 R1812 C1806

R1813 C1807

Q2002

P2003

FB2001 FB2007 FB2008 FB2009 FB2010 FB2011

C1809

D2601

C2003

R2007

Q2001

FB2012

IC2001 FB2002 FB2006

R2017 FB2013

C2002

C2404

SC1501

SC1502

J1502

J1501

SC1504

R2435 SC2401

9–2

LC-65RX1M Wiring Side-B J

9â&#x20AC;&#x201C;3

LC-65RX1M Chip Parts Side-B TL2650 TL2649

TL2648

TL2621 TL2622 TL2611 TL2613 TL2619 TL2620 TL2612

C2607

R2622

IC2601

TL9610

TL9608

TL9616

TL9615

TL9614

TL9602

TL9627

TL9604

TL9605

TL9603

C1135 C1134

FB1105

C2608

C2606

TL1167

TL1168 TL1170 FB1104

TL2638

TL2607 TL2605 TL2604 TL2606 TL2608 TL2609 TL2601 TL2603

TL1171 TL1169 TL1161

TL1184

TL1163 TL1164 TL1162 TL1166 TL1165

TL2618

R2632 R2633

Q2408

R2437

R2441

TL2045 TL2029 TL2030 TL2032 TL2034

R2440

Q2409 R2439

TL2624

TL2625

R2624 TL2626

TL2627

TL9626

TL2024

TL2035

R9308 R1819

Q1809

IC9301

C9301

Q1808

R2010 R2008

C2005

R2026 R2029

C2012

C2026

R2052 TL2041 C2021

R2018

TL1801

R2068 R2023 R2015 R2024

C2401

R2042

R2404

R2086

R2035 R2025 R2049 C2016 R2046 R2047

R2050

C2023 R2033

C2018

R2039 R2061 R2074

TL2043

TP2002

C2033

TL2042

R2406

R2402

R8730

IC2008

R2070

C2008 C2013 R2030

R2014 R2021 C2004

R2094 R2093

C2034 R2081 R2001

C3531

C3525

IC2010

R4463

R2079

R4454

FB3311

FB3312

R3513

C3520

C3521

C3526 C3522

C3384

C3533

R4455

R4462

R2080

Q2004

C3547

C3365 C3353

C3544 C3532

C3382

C3545 C3535

LUG3501

C3363

R2071

C3537

R4470

R4466

R3511

R4485 R4484

R4453 R4452

R3579

R4468

LUG3502

C8314

C8354 C8338

C8320

R8305

C8395 R8306

C8318

C8303

C8304

C8315

R8308 R8307 C8361

C8365

C8184

C8366

C8375 C8376

C8316

C8169

C8381 C8382 C8387 C8385 C8386

C8389

C8388

R9301

C8337

C8333

R8309

C8321 C8373 C8364

R8160 R8146 R8165 R8166 R8163 R8164

R8104

C8359

C8362 C8363

R9302

C8374

C8377

C8322

C8370

C8371

C8367

FB8111

C8372

C8368 C8369

FB8106 FB8108

TL1548 R1527

C8131

R8162 R8174

C8360

C8356 C8357

R8115

R8161

C8349 C8350 C8358

C8168

C8175

C8230

C8226 C8227 C8228 C8229

TL8104

C8178 C8145

R8126

C8336 C8343

C8344

C8102

C8203 C8202

R8156

C8173

C8166 C8170 C8171 C8172

C8167

C8118

FB8121

C8112

TL8101TL8102

C8130

C8126

C8355

C8340

C8103

C8148

C8331

C8327

R8114 R8113

C8348 C8353

C8334 C8335

TL8103

C8125

D1505 D1503

C8347

C8101 C8188 C8187 C8186

C8185

C8164

C8199 C8198 C8197

D8103

TL8109TL8105

R8129

C8182 C8113

TL1546

Q1505

C1508

C8214 C8213

R8109 R8155

FB8103

R1535 TL1547 R1522

C1501

R1579

C1538

Q1509

FB1515

TL1504

TL1502

D1515

R1520

C8209 C8210 C8211 C8212

C8115

FB8104

R1539

D1520

C1544 C1543

C1517

C1545 C1546 R1580 C1547 C1548 C1532 C1531

Q1510

TL1505

FB1503

FB1501

FB1504

FB1502

Q1516

C8342

C8177

D1513

R1521

C8114

Q1502

R1517

C8174

C8165 C8152

C8215 C8221 C8216 C8222 C8217 C8223 C8218 C8224 C8219

C8204

C8194 C8200 C8201

FB8114 TL8107

C8189 C8190 C8191 C8192 C8193 C8220

C8205 C8206 C8207 C8208

D8104

C8122

R8102

FB8113

C8127

C8132

R8103 R8151

TL8108

C8195 C8196

R8107 C8234 R8106 C8235

C8143

C8332

C8341

R3343

C8351 C8352

C8163 C8162 C8161 C8160 C8159 C8158 C8157 C8156 C8155

C8142

TL8111

C8141 TL8110

FB8115

R8168

C8137 R8133 C8237 C8236

C8330

C8225

C8154 C8153

R8108 C8183

TL8106

C8119

C8123

R1516

R1568

R3353

R3328 R3320

R8150 R8128 R1605

C1579 C1578 C1587 C1586

R1558

C1551

R3350

C8116

C8128 FB8116

C8133

R8125

C1613 C1614

C1596

IC1506

C1589 C1591

R1595

R1601 R1515 R1514 R1506

R1563 R1562

R1509 R1510

C8317

TL2417

TL2420

TL2421

TL2418

C8383

C8384 C8392

C8390 C8391

C8394

C8393

D2405

TL1518

TL1510

TL2427

TL1509

TL1508

TL1514

TL1511 TL1517

TL1519

TL1516

TL1544

R2417

9–4

R2433

Q2405

TL2414

TL2416

TL2415

TL2419

TL1543

TL1515 TL1513

TL1501

TL1503

TL1174

TL1173 TL1172 R1148 R1149

R1606 R1570

C1592 C1597

C1507

R1559 R1542

R3349

R8159

C1534 C1599

R1508 R1524

C1616 C1615

R1512

R3321 R3322 C8134

FB8118

C8144

TL2411

C8138

C8147

TL2423

TL2425

R9303

R1607

R8130

R3346

C8124

TL2424

R9333

TL2412 TL2413

R8157 R8158

FB8119

FB8120

R2420 R2419 R2418 R2422

R9304

C8129 TL2409 TL2410

R1609

R1571 R1507

R8127

R8122

TL2426

R9334

TL2402 TL2404 TL2406 TL2401 TL2403 TL2405 TL2407 TL2408

C8339

C8328 C8329

R8121

C8378

TL1545

R2040 C2014 C2015

C8319

TL9331 TL9333

FB1509 TL1535TL1533 TL1536 TL1531TL1530 TL1524 TL1537 TL1532 TL1529TL1526 TL1522

TL1527 TL1523 TL1525 TL1528

D1519

R1503

TL1506

TL1507

TL1520

C3546

C3523

TL1538

TL1539 TL1534

R4514

FL1501

FL1502

FL1503

TL1521

C2007 C2006

R2037

TP2001

R2004 R2043 R2032 R2066 R2067 C2030

R4487 R4486

C1504

TL1512

R2088 R2089 R2091 TP2005 R2092

TL9358 R8706

TL9329 TL9330 R9310 TL9332

C1583 C1582

Q1501

TL1542 TL1540

C3504

C3505 C3506

SLD3501

C3366 C3364 C3372 C3375 C3373

C3524 C3534

C3399

R9305

C9113 R9165 R9177 R9175 R9173

C9111 R9107 R9160 R9154

TL4514 TL4513 TL4512

R1136 TL4516 TL4517

TL4515

TL4511

D1531

C1526

R1561

C1522

D1530

R1560

C1525

TL1541

C3513

C3502

C3376

C3390

FB3315

TL9303

R9332

TL9104

TL9101

TL9102

R9172

C9115 C9117 R9155

R9147 R9145 R4508

R4507 TL4510

TL4509

TL4501

TL4504

TL4503

TL4502

IC1504

C3543 C3542 C3515

C3344 R3319

TP3301

C3349 C3350

C3385

TL9301 TL9305TL9308 TL9307

C1608

R1513

C3503

R2016

R3302 C3306 R3355

C3328

C3329

TL9304

TL9335 TL9334 TL9336 TL9310 TL9338 TL9337 TL9311 TL9312 TL9340 TL9313 TL9339 TL9341 TL9314TL9317 TL9342 TL9343 TL9315 TL9344 TL9345 TL9316 TL9348 TL9347 TL9346 TL9320 TL9319 TL9318 TL9349 TL9322 TL9350 TL9351 TL9323 TL9321 TL9352 TL9354 TL9324 TL9325 TL9353 TL9357 TL9355 TL9327 TL9326 TL9356 TL9328

R9188 TL9106

TL9302 TL9306

TL9309

R9105

TL9105TL9103

R9164

R9157 R9158 R9151 R9101

R9331

R9106

R9163

IC9106

R9148 R9146

R9186 R9185 R9130 R9135 R9134 R9128 R9140

R9126

TL4508

TL4505

TL4506

R4509

R1817

Q2402

C8711

C2017

TL8705

C9112

R9191 R9187 R9192 R9122 R9123

TL4507

R4515

C8714

R2401 R2403

C3362 C3361 C3360 C3359 C3358 C3354 R3303 C3321

IC2006

R1820 Q2401

C3538

FB8117 R8171 R8170

IC2009

C3507

C3516

R3327

C3394

C3325

C3540 C3514

C3340

FB3309

C3508

C3342 R3316

IC2004 R8713 C8713

Q2601

C8712 C3541 C3517

R3304 R3305

TP3303

TP3305

C3341

TL8701

R9168 R9169 R9171

R9170

R9118

C9114

TL11

TL1175TL1176 TL1141

R9137 R9159 C9109

C3345

FB3307

R9141 R9142 R9150 C9110

R9124 IC9105

TL2050 C2022 C2024 C2025

R9119

IC9104

TL12

R8712

TL1142TL1143

C9108 R9184

IC8701

Q9101

R9152

R9108 R9109

TL14 R8702

C8718

R9167 C9107 R9110 R9114 R9156 R9166

TL8703 C8701

C9106 C9104

R9115 R9153

C9101

TL13

FB8701

C9105

Q2410

R2443

Q2406

R2431

R9104 R9102

C3392

X3301

R8728

Q2411

C3327

R3315

C3313

C3323

R3314 C3314

TL2422

TL1140 R2413

Q2403

R8722 R8723 C8717 C8715

C3330

C3331

C8703

Q8703

C3309

C3333

C3346

C3347

C3371 C3370 C3369 C3356 C3355 C3352 C3351

C3335

C3338 C3336

D3302

R9635

D9610 R9643

D9602

D9607

TL9622 TL9611

C3337

C3348

C3343

FB3308 TP3304

R3335 R3332 R3333 R3336 R3309 C3368 C3367 R3330 R3329 R3331 C3397 R3334 C3302 C3398 C3380 C3315 C3319 L3306 C3320 C3395 C3381 C3311 C3318 C3396 C3334 C3316 C3308 C3332 R3323 C3393 C3307 C3301 C3379 R3340 R3339 R3338 C3386 C3324 C3387 C3391 C3322 C3383 C3312 C3310

C3339

C3326

D9101

TP3307TP3306TP3302

TL3302

C9637

C3304

TL8702 C2409

TL2049

R2609

D3303

C3317

C3303 C9636

R9612

D9601

R9645

TL9623

D9608

D9609

TL9618

R9613

R9632

TL9619

TL1138

R9608

FL2614 TL3303

D3301

C3305

C9639 TL9612

C9629

C9645

C9646

C9644

D9611

R9615

TP3308

R3325 R3337 R3317 R3318

Q9606

R9611

D9612 D9604

TL9617

C9619

Q9605

TL2628

TL2623

FB3310

R9630 C9626 R9631

C9630

Q9609

Q9610

C9634 TL9625

C9638

Q9603

C9635 C9632

R9644

R2628

TL3304

TL3301

R3312

R3310 R3301

C9633

R9633 R9614

TL2040 TL2038 TL2022 TL2020 TL2048 TL2018 TL2001 TL2039 TL2037 TL2021 TL2044 TL2019 TL2016 TL2017

Q2602

C9627

C9666 Q9604

R2625

R2072 R2631 R2630

IC1805

D1802

C9663

R9661 C9658 R9660

TL9609 R9621 C9614

R9666 C9616 R9623

TL9606

R9649 C9648

C9665

C9668

R9665 C9659 R9664

R2626 R2627

C1816

C9612

R9620 R9618 C9613 R9624 C9615 R9629 R9626

FL2608

TL1802

R2623 R2629

R1162 R9659 C9653 R9658

TL9613

R9638 C9652

TL9607 C9647

R9647 R9648 C9643 R9654 C9650 R9653 R9657

R9634

C9621

C9641

C9669 Q9608

R9646

C9623

D9606

R2416 R2434

TL1144

R9641 C9655 R9640

D1801

R9639

C9624

R9601 R9602

C9640

R9636 R9637 C9651 R9662 C9654 R9642 R9663

Q9607

C1804 C1803

Q1107

Q9601

R9609

C1813

Q1803

R1801 C1802

C9661 R9619 C9610 R9628

R1803

R9652 R9622

D9605

C9609 R9627 R9617

C1801

Q1802

C9631

R1137 C1109 R1108 C1105 C1107 R1105 R1103

Q1116

Q1118

TL9601 R9603 C9603

R9668

Q1108

C1110 R1111 C1108 R1104

R1153 C1124

TL1139

TL1127 TL1129 TL1131 TL1133 TL1135TL1137

R1163

TL1147 TL1146 TL1145

TL1126 TL1128 TL1130 TL1132 TL1134 TL1136

C1106

TL1118

R1139 TL1124 R1147 R1141 TL1125 R1146 R1138 R1145 R1150 R1167 R1143 R1168 R1169 R1170

R9616 C9605 R9610

R1109 R1106

R1121 R1102 R1107 C1104 C1131 R1110

TL1119 TL1122

TL1113 TL1115 TL1117 TL1120 TL1121 TL1123

TL1116

R1151

C9601

R9656 R9655 C9602 R9605 C9604 R9604 R9606

R1117 C1115

C1125 R1156

R1123

TL1106 TL1108 TL1110 TL1112 TL1114

TL1107 TL1109

R1140 TL1154 TL1153 TL1152 TL1151 TL1150 TL1149 TL1148

R1122

R1127

TL1105

TL1159 TL1158 TL1157 TL1156 TL1155

R1118 C1121

C1132

TL1104

TL1111

C1113 R1124

R1120

TL1102

Q1115

Q1120

R1119 C1122 C1118

R1129 C1116 R1130

TL1160 R1131

C1133

TL1103

R1152

C1119

TL1101

TL2639 TL2640 R2616 TL2641 TL2610 FL2602 TL2642 R2605 TL2643 TL2644 FL2604 TL2645 TL2646 R2607 TL2602 TL2647 TL2651 FL2606

TL1177 R1116 R1128 R1132 C1123 C1129 C1130 C1117 C1120

TL2028 TL2025 TL2031 TL2033 TL2027 TL2023 TL2026 TL2036

Q9102

TL2051

TL2046

TL2007

TL2011

TL2009

TL2013

TL2047

TL2006

TL2008

TL2010

TL2012

TL2014 TL2015

R2438

LC-65RX1M

[2] SUB UNIT Wiring Side-A J

9–5

LC-65RX1M

LUG1304

LUG505 R445

FB404

IC404

R1321

R502

D1904

C1321

D1903

L1305 C1330

C1329

L1306

C1320

C409 FB403 R405

C1318

C1319

IC401

C432 IC405

L1303

R407 R406 C410 C412

R1919 R1920 R1916 R1928 R1914 R1917

C1306

C1904

R1331

C420 C417

Q1901

C1901

C1918

C1915

C1303

C1914 D1302

Q1303

R1307 R1304

R1309

R1313 R1308

Q1301 R1339 C1302 C1301

R1338

R1302

C1327 Q1302 R1322 R1335 C1316 R1311 R1334 R1312 C1332 C1307 C1309 C1305 C1312 C1315

L1304

C1917 L402 D410

R1905

R1306

R1314

LUG1302

C588 R566

R565

C7543

Q7509 R7568

C1438 C1436 C1430 C1428

R538 R539

R619 C602 C601 R670 R660 R649

FB7503 C7578 C7535 R7548

FB7502

R7569 R7567

L502

FB519 R540 C615 R614 C610 R615 C603 R628 C604

R621 R625 C611 R622 C632 R673 C608 R623

LUG1301

D7502 D7504

D1405 R1418

C1402 R1409 R1402 R1408 R1403 IC1406

Q7508

R7540 C7521 L7504

Q1402 Q1401

C1443 C1444

R612

C7539 R7553

R1417 C1469 R1406

R1470 R1466

C1455 C1453

R1411 R1959 C1450

R1465

P501

C1462

IC1405

C1456

C1452 D1403 D1404

R1421 R1420

R1438 R1414

IC1402

X1401

D536

R1413 R1416 C1408 C1411

R599

X7501

C7533 R7541

R1460

R1454

C1429

X1403

R1445 C1437 R1442 R1439 R1440

R1954 C1425 C1424

C1413 C1412

D537

C7537 C7531 SLD7501

R586

R646

C578 C577

D535 R570 R572 D533

FB1401

R575

R574

R569

C574 D531 D532

D530 C571

C580

R7542 R7543

Q7505

IC7503

R7534 R7537 C7526

R7525 C7519 L7502

C1415 C1416

R1433 C1426

C1420

C579

C572

R7550 C7530 R7539

R1424 C1955 C1953

C1433

IC1403

C1406

R1410

R7566

Q7506 R7527 R7526

L7503

P1401

P1701

IC1951

R1443

IC1401

C7509 C7505

R1956 R1957 R1958 R1953 C1956

FB7501

LUG506

C1707 R1706

C1742 R1720 C1713

C1722 R1724 C1741

C1728 R1731 C1740

R1715 C1715

C1701 R1704

C1705 C1723 R1714 R1721 R1732 C1737 C1738 C1729 R1733 R1725 R1716 C1710

R1707 C1706 C1736 R1719 C1712

C1721 R1723 C1735

C1727 R1730 C1734

R1713 C1716

C1702 R1703

C1731 R1722 R1734 C1724 R1711 C1704

R1708 C1708 R1718

R1702

R1701

C1732 C1730 R1735 R1726 R1712 C1709

C1703

D1701 R1705

C1717

D1702 Q1701 R1729

R1741 R1736 Q1702 R1709 C1714 R1717

R1737 R1738 R1728

LUG504

LUG501

R1924 R1923

D1303

C1924

R1328 C1328 R1337 R1327 R1326 C1331 R1336 R1325 R1320

R1323

R442 C435 C436

R423

R408 R402 R438

Q402

C424 C423

C422 R430 R431

R1333

R1332

R1324

R440 FB402 C407 IC402 R420 C408 R409 C402

R7545

R7524

R7512 D7503

D7505

Q7502

9–6

R1902 R1315

L1901 L1902

21 20 19 18 17 16 15 14 13 12 11 10 9 8 7

J1704

J1705 J1703 J1702 J1701

C1739 C1733 C1720

C7577 C7572 C7573

C7518 C7513 R7532

C7503 R7508 C7502 R7504

C7501

R7502 R7506 R7505 R7503 R7509 D7501 R7501

C1711 FB1701

R1955

C1954 C1952 C1951 R1951

C1743 FB1704 R1450

R1407 R1404

C1435 R1401

C1418 X1402 R7554

R1435 C1434

R1427 R1430 R1428 R1436 R1434 C1432 C7528

C1460 FB1403 FB1404 C1419 C7536 R7520 C7516 R7519 R7515 C7514 R7522 R7514 C7510 R7523 R7518 C7517 R7521 R7517 Q7504 C7520 R7530 C7512 D7507

R1742

C1726

6 5

R1710 Q1704 Q1703

C1719

C1718 R1727 C1725 LUG1702

R7533

FB1703 C1744 FB1702 C1746 Q1403 R1952 C7508 C7504

L7506

C1421 C1422 C7511 R7516

R1446 FL7502

C1431 C506 L503 C503 R501 C505

R652 R582 R580 D529 R571 C575 R7546 C7540 Q7503

IC406

R410

L7501

FB509 C623 FB518 C624 C1461 R1463 R1469 R1467 R1473 C1457 D1401 D1402 R535 R7529

C434 R1744 R1745 R1746

P1702

R7513

TU7501

Q521 R534 IC502

FL7501

C7542

IC1404 R1423 R1412

R1303

R1461 C1458 R1415

R1462 R1464 R1405

C1446 C1454 R1419 C1410 C1409 R7528 D7506

IC506 R537 R644 C589 R536 R643 R7535

R7538 C7525 R7536 L7505 C7527

C1907

FB524 C629 FB523 C628 FB522 C627 FB521 C626 FB520 C625 D542 D534

C1441

R1472 R1468 C1459 R1453 C1447 C1445 C1448 C1449 R1455 R1456 C1404

C1403 C1401 C1405 C1407 D544 R616

C1440

D1301

C1463 R1431 R1429 R1426 R1422 C1417 C1414 C1451

C1442 R1437 C1423 D548 R613 R609 R606 R608 R600 R604 R596 R598 R592 R591 R589 R587 R656 R657 D550 C600 R610 D546 D545 D543 C593 R595 D541

R671 R661

C1427 R618

R7544 R7555

Q520 R7551

R650

Q518 Q516 C7534

C1439 Q7507 C7541 R7552 R7549

C587 Q7501

C617 C1745

R7510 C7507

R7571

D411 R432

LUG1305 C7575 R7572 C7576 R7570 C7523 R7531 R7511

C7506 C7522

IC7508 C7574 R7579 IC7501

L7507 R7507 C7515 D7508

C403 D412 R433

FB401 C401 IC403 R401 R403 C404 C518

D409 C502

C1304 R1330

IC1901 R1305

C1922 C1921

C1919 R1929 C1920 R1921 R1922 R1907 R1906 R1301

R1918

R439 KAME2

C1923 R441

R1319 R1317

R1901 R1908 R1927 Q1902 C501

R1739

D1305

D1304 D1306

C1916 C1317 C429 C430

C1324 C1323 D405

IC1301

C1326

C1322

R443

C1314 L501

KAME5 KAME1

D402 KU2 KU3

LUG1303 C411 C406 R415 C405 C1747

C1313 C1308 C1311 R404 D521 C525

D501

Q407 VA1701 J1706

L1701

C414 R1743 C1748 IC1702

R1329 FB406 LUG502

P1302 P401

C1911 C1909 C1913 C1910 C1902 R1911 R1910 R1925 R503

LUG503

LUG1701

VA1702

R1740 C1749

FB405

IC1701

4 3 2 1

SC501

Chip Parts Side-A

LUG1306

R1310

R1903

C3752

LC-65RX1M Wiring Side-B J

9â&#x20AC;&#x201C;7

LC-65RX1M

[3] FRC UNIT Wiring Side-A J

9–8

LC-65RX1M Chip Parts Side-A J

C6120

C6121

R6092

C6014

C6019

C6013

IC6002

FB4802 FB4806

L4803

TL5810

FB4805

FB6003

R6027

P4801

FB5802

R6052

R6050

C4805

TL5813

R4815 R4816

C4807

FB6008

R6033 R6040

R6048 R6130

C6002

R6046

R4814

C5890

C6001

C6003

TL6003

TL6006

FB6348

FB6001

TL6002

L6223

R6359

TL5820

R6349

R6348

R6347

R6346

R6345

R6343

TL6023

TL6361

TL6362

R6360

R5802 R5859

R5890 R5906

R5869

TL5819

R5880 R5881

R5898 R5899

FB6347 P4802

R6358

R6342

TL6356

L6341

R6220 R6222 R6224

R6352

TL6020

R6374 R6373

R6253

R5865

TL6211

R6230

C4819

L4801 R6029

R6053

R4831

Q4803

L4802

TL5814

R6031

TL6014

FB5803

C5892

R6061 R6062

TL6001

L6224

C4806

C4818

R4826

R6135 R6133

R6044

L6225

C6021

R6119 TL6007

C6237 C6238

L6226

C4804

C4817

R5917 R5932 R5931

R6063

TL6004

R6132 R6131

R6059 R6066

SC6212

L6227

R5930

R6064

C6016

R6095

R6042

R6078

TL4802 LUG4803

TL6005 R6076 R6074 R6136

L6228

R5916

R5913 R5914 R5915

FB6005

R6087

TL6013 R6072

TL4803

TL5811 C6097 C6096

R6139 R6140 R6055

C6235 C6236

R6035

R6057

IC6003 R6070

L6231 L6229

C6133 C6132

R6037

R6038

TL4801

P5802

P5801

R6103 TL6015

R6137 R6138

L6232 L6230

C6130

R6085 C6131

R6104

R6068

C6233 C6234

L6233

R6108

R6036

TL6012

L6234 H

R6121

FB6007

C6099 C6098

R6101 R6102

FB6006

C6011

C6012

C6118

C6116

C6018

C6117

C6020

C6015

C6119

LUG4801

X6341 FB4803

C6341

FB4804

R6341

R6356

IC6341

C6342

R6357

C6268

TL6360

TL6354

TL5818 R6355

TL6357

R6354

L6221

R6284

R6353

C6262 C6261

L6222

IC5801

TL6021

TL6352

TL6353

L6218 L6217

R6020

C6266 C6265

SC6211

L6214

R6289 R6293 R6295 R6331

R6116

R6005

R6115

IC6281 R6299

R6001

R6003

R6079 R6114 TL5829

R6321 R6307

R6126 R6125

TL5828

R6287 R6291 R6297 R6301 R6303 R6305

R6285

R6026

R5820

R6014 R6007

R5841 R5842

R5819

R5888 R5887

R6251

R5823

TL5822

R6240 R6243 R6245

R6117

IC6001 TL5821 R5826

R6129 R6118

L6211 TL6212

R6308 R6326

R6122 R6022

R5803

R6024

C6239 C6240

L6212

IC6282

R6311

R6310

R6309 R6315

1 TL5812

C5894

LUG4802

FB5801

C6376

TL5809

SC6281

R5811

L6213

C6009

C6095 C6094 TL5830

R6016

R6290 R6294 R6296 R6332 R6300

R6018

L6215

R6124 R6123

TL5827

L6216

FB6004

C6264 C6263

R6383 R6382

L6219

R6288 R6292 R6298 R6302 R6304 R6306

R6286

R6361 R6362 R6363 R6364

L6220

R6283

TL6022

LUG4804

P6341

9–9

LC-65RX1M Wiring Side-B J

9 â&#x20AC;&#x201C; 10

LC-65RX1M Chip Parts Side-B J

TL5804 TL5816 TL5815

FB6286

C6287

FB6214

FB6212

R6009

R6006

C6269 C6270 C6217 C6218 R5879

R5809

R5818

R5813 R5815

R6004

C6255

R5852

C6256

IC6342

C6251 C6252 C6249 C6250 C6247 C6248 C6271 C6272 C6245 C6246

R5829

C6243 R6238 R6237 R6236 R6235

R5816 R5817

R6239 R6241 R6242 R6244

C6244

R5828

C6242

TL6224 TL6219

TL6222 TL6221 R6252 R6250TL6223 TL6220 R6249 R6246 R6247 R6248

C6374

C6216

R5850 R5837 R5835 R5834

IC6212

R5830

R5839

R5821

TL5833

C6253 C6254

R5851

C6258

R5833

R5848 R5847 R5846 R5845 R5844 R5843

C6259 C6260

R6232 R6233 R6234 C6241

R5814

R5812

FB6215

R5831

R5857

R5886 R5885

R5810

TL5825

FB6211

R5832

R5825

R5824

R5840

R5838

C5837 C5834 C5835

R5805

TL5826 R5822

R5925 R5927 R5926 R5928

R5853

R5849 R5895 R5896 R5897

C5849 C5859

C5842 C5840 C5875 C5876 C5874

C5872

C5829

C5832 C5833 C5831

C5855 C5850 C5853

FB5815

R5884 R5808

R5921 R5923 R5922 R5924

R6231 TL6218 TL6217 R6229 TL6216 R6228 TL6215 R6227 TL6213 TL6214

FB6216

TL5823 R5871

C5857 C5854 C5856

C5844

R6213 C6213

C6211

R6212 R6211

R6218 R6219 R6221 R6223 R6225 R6226

C6257

R5900 R5901 C5879 C5877

C5838

C5841 C5843 C5845

C5813 C5818

C5823

C5851 C5852 C5858 C5846 C5847 C5860 C5848

C5878

FB5814

FB5813 C5882 C5880 C5881

C5866 C5868 C5867 C5811 C5827 C5885 C5820 C5883 C5825 C5884

R5882 C5824 C5819 C5814

C5871 C5873 C5804 C5806 C5805 C5817 C5826 C5822 C5830 C5828

R5827

R5804

R5918 R5801

C5839 C5836

C6215 R6217 R6216 R6215 R6214

TL5832

FB5808

FB5807

FB5805

TL6341 TL6343 TL6345 TL6347 TL6348 TL6349

FB5806

2 C5893

TL6350 TL6342 TL6344 TL6346

C6219 C6220

C6196 C6197

C6221 C6222

R6069

C6223 C6224

FB6217

R6067

C6086 C6087

C6074 C6073

R5903 R5902

R5878

R5874 R5876

R5905 R5863

R5862 R5861 C5801 C5803 C5886 C5802 C5888 C5887

R5920

R5911

C5808 C5816

C6159

C6034 C6033

R6094 C6110 R6021 C6026 C6111 C6044 C6027 C6160 C6161 C6045 C6029 C6112 C6022 C6113 R6093 R6090 C6142 C6143

R5806

R6011 R6010

C6290

C6288 C6289

C6157 C6156

C6038 C6105 C6037 C6104 C6036 C6158

TL5831

R5807

C6107

R6012

C6294 C6295

R6080 R6091 C6147

C6106

R6017

R5875

R5873

C6214

R5894 R5893 R5892 R5891

FB6283

C6284

R6327

C6282

FB6282

R6328

R6329 R6281

C6281

TL6281

R6282

C6293

C6102

FB6287 FB6281

R6317

C6103 R6083

R6015

R6023

C6007

R6025

C6010

R6314

C5821 C5812

R6002

R6313

C6291 C6292 R6319 R6320 R6318 R6330

TL6282

C6283

C5810 C5815

FB6002 C6149 C6151 C6148 C6035 C6039 C6150 C6040 R6097 C6100 C6108 R6096 R6008 C6101 C6032 C6031 C6042 C6041 C6109 R6013 C6144 C6023 C6030 C6043 C6024 C6154 C6145 C6155 C6028 C6025

R6312

C6225 C6226

IC6211

C6212

R5867

R5836 C5861 C5863 C5862 C5807 C5809

R6019

C6017 C6008

TL5834

TL6295

R5929 R5933

R5919

FB6346

C6366

C6153 R6081 C6152 R6082

R6316

C6286

FB6285

TL6284 TL6283

R5908 R5907

R5855

TL6025

C6367

TL6286 TL6285

TL6017

R6071

R5868 R5872

R5889

C6354

C6369

C6296

TL6287

R6075

R5877

FB6342

TL6288

R6077

R5910 R5909

R5854

FB5804

X5802 C6356 C6355

R5866

FB5809

R6324

R6322 R6323

C6350

C6298 C6297

C6285

R6336 FB6284

TL6290 TL6289

C6349

C6352

R6366 R6365

X5801

C6372

TL6294

C6351

R6376 R6375

R6325

R6333 R6334

R6335

C6373 TL6026

C5870 C5869

C5864

FB4801 E

R6381 R6380

R5858

R5912

C6357

C6361 C6363

R5856

R5864

R5883

C5865

C6368

R6367

C6345

C6359 C6365

R6350 R6351 R6368

C6344

R6377

R4830

C6375

C6358

R6344

R6369 R6372 R6371 R6370

C6364

TL5824

FB6345

FB6344

TL4826

C6343 C6353

C6370

TL4828

TL6292

R6073 C6139 R6141 C6138 C6072

R6054

C6192

R6056

TL6018

C6227 C6228

C6229 C6230

FB6011

R6379 C6347 R6378 C6348 C6362

C6371

TL4830 TL4829

TL6291

C6183 C6182 R6034 C6141 C6070 R6111 C6140 C6077 C6078 C6193 C6076

C6170

TL6009 C6171

R6045

R5860

TL6024

C6360

TL4831

TL6293

C6189 C6128 C6187 C6083 C6186 C6188 R6088 R6089 C6081 C6085 C6084

R6120 R6058

R6041

R6107 R6039

R5904

C6346

TL4825

FB6213 C6231 C6232

C6191 C6082 C6190 C6199 C6129 C6088 C6198 R6143 C6200 C6136 R6142 R6060 C6201 C6080 C6079 C6090 C6089 C6137 R6065 C6075 C6092 C6091 C6184 C6071 C6194 C6185 C6093 C6195

TL6008

R6384

Q6341

FB6343

TL6027

TL4824

TL6016

R6113 R6112

R6043

C6063 C6064

C6048 C6050

C6174 C6175

R6134

C6060

C6059 C6058 C6057

R6032

R6030

FB6009

C6062

R6049

TL6019

R5870

TL4834 TL4832

R6051

R6086 R6084

C6135 C6134

D4804

TL4833

R6028

TL6010

R4817 R4818

D4801

C5889

FB6341

IC4804

C4809

C4824

IC4805

R4813 R4829

IC6004

R6105 C6125 R6106 C6124

C4808

FB5816

R6144

R6047 C6127 C6046 R6098 C6126 C6047 C6169 C6069 C6168 C6051 C6068

C4825

TL4812 TL4810

TL4827

C4821 C4822

R6100 R6099 C6179 C6172 C6178 C6061 C6173 C6167 C6123 R6110 C6166 C6122 R6109 C6114 C6055 C6056 C6066 C6065 C6180 C6115 C6054 C6053 C6067 C6181 C6164 C6176 C6052 C6049 C6165 C6177 C6163 C6162

TL4822

C6006 C6005

FB5812

R6127 R6128

TL4813

C4820

C4810 R4804

TL4818 TL4820

TL4823

R4821 C4812

C6146

TL4821

C5891

C6004

TL4816 TL4819

TL6011 FB5810

R4827 R4828 R4832 R4820

Q4801

TL4814

TL4815 TL4817

FB5811

C4813

R4805

IC4801

C4803

R4825 R4824 R4823

TL4808 TL4806 TL4805 TL4809

FB5817 C4814

C4823 R4819

Q4802

IC4802

IC4803

C4826

TL4804 TL4811

TL4807

R4822 C4815

R4808 R4809 R4806 R4807

R4801 R4802 C4801 R4803 C4802

C4811

TL5806 TL5807 TL5808 TL5817

C6267

C4816

D4802

R4812 R4810 R4811

D4803

TL5805 TL5803 TL5802 TL5801

9 – 11

LC-65RX1M

[4] MINI-AV UNIT Side-A J

Side-B

9 – 12

LC-65RX1M

[5] R/C, LED/KEY UNIT R/C, LED UNIT Wiring Side-A J

R/C, LED UNIT Chip Parts Side-A

C107

R122 3

R127

D115

J101

R114

R124

C112 R121

R113

R111

C114

Q106

R112

Q103

R138

R126 R123

C104

R107 R104 R106

Q105 R105 R110

R132

R109

R135 D101

D114

D113

Q102

D103

R108

Q104

IC101 R136

SLD101

C105

R101

RMC101

R137

P101

Q107

R117

C102

R102

C106 C111 C113

R115

R/C, LED UNIT Wiring Side-B

KEY UNIT Wiring Side

D155

S155

R153

D152

S154

S152

R151

D151

S151

P151

S157

S153

KEY UNIT Chip Parts Side

R152

9 – 13

LC-65RX1M

Service Manual

LC65RX1M

CHAPTER 10. SCHEMATIC DIAGRAM [1] SCHEMATIC DIAGRAM 1. DESCRIPTION OF SCHEMATIC DIAGRAM

10 – 1

LC-65RX1M 2. MAIN UNIT-1

10 – 2

LC-65RX1M 3. MAIN UNIT-2

10 – 3

LC-65RX1M 4. MAIN UNIT-3

10 – 4

LC-65RX1M 5. MAIN UNIT-4

10 – 5

LC-65RX1M 6. MAIN UNIT-5

10 – 6

LC-65RX1M 7. MAIN UNIT-6

10 – 7

LC-65RX1M 8. MAIN UNIT-7

10 – 8

LC-65RX1M 9. MAIN UNIT-8

10 – 9

LC-65RX1M 10. MAIN UNIT-9

10 – 10

LC-65RX1M 11. MAIN UNIT-10

10 – 11

LC-65RX1M 12. MAIN UNIT-11

10 – 12

LC-65RX1M 13. MAIN UNIT-12

10 – 13

LC-65RX1M 14. MAIN UNIT-13

*MAIN UNIT-14 is not used in this model.

10 â&#x20AC;&#x201C; 14

LC-65RX1M 15. MAIN UNIT-15

10 – 15

LC-65RX1M 16. MAIN UNIT-16

10 – 16

LC-65RX1M 17. MAIN UNIT-17

10 – 17

LC-65RX1M 18. SUB UNIT-1

10 – 18

LC-65RX1M 19. SUB UNIT-2

10 – 19

LC-65RX1M 20. SUB UNIT-3

10 – 20

LC-65RX1M 21. SUB UNIT-4

10 – 21

LC-65RX1M 22. SUB UNIT-5

10 – 22

LC-65RX1M 23. SUB UNIT-6

10 – 23

LC-65RX1M 24. FRC UNIT-1

10 – 24

LC-65RX1M 25. FRC UNIT-2

10 – 25

LC-65RX1M 26. FRC UNIT-3

10 – 26

LC-65RX1M 27. FRC UNIT-4

*FRC UNIT-5 is not used in this model.

10 â&#x20AC;&#x201C; 27

LC-65RX1M 28. FRC UNIT-6

10 – 28

LC-65RX1M 29. MINI-AV UNIT

10 – 29

LC-65RX1M 30. KEY UNIT

10 – 30

LC-65RX1M 31. R/C, LED UNIT

10 – 31