Colour Television
Chassis
QFU1.2E LA
Contents 1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
Page
Revision List 2 Technical Specs, Diversity, and Connections 2 Precautions, Notes, and Abbreviation List 7 Mechanical Instructions 11 Service Modes, Error Codes, and Fault Finding 20 Alignments 40 Circuit Descriptions 45 IC Data Sheets 47 Block Diagrams 49 Circuit Diagrams and PWB Layouts Drawing 59 310431366124 SSB 310431366185 SSB 101 310431366186 SSB 143 C 310431366652 Amplifier panel 185 272217190763, 272217190764, 272217190766 Keyboard Control Module 187 282206502664, 282206502665, 820400159661 Wireless LAN USB module, light sensor, IR/LED195 282206502668, 282206502669 Wireless LAN USB module, light sensor, IR/LED 195 272217190759, 272217190761 Sensor Module 202 310431366033 AmbiLight 203 310431366043 AmbiLight 205 310431366053 AmbiLight 207 310431366063 AmbiLight 209 310431366292 AmbiLight 213 310431366302 AmbiLight 215 310431366312 AmbiLight 217 310431366372 AmbiLight 219 11. Styling Sheets 6000 series 42"/47" 222 7000 series 42"/47" 223 8000 series 40"/46" 224 8000 Design series 46" 225 6000 series 55"/60" 226 7000 series 55" 227 8000 series 55" 228 8000 Design series 55" 229 8000 series 60" 230 9000 series 65" 231 9000 series 84" 232
Published by PvH/EL 1402 TV Quality
PWB 99-100 141-142 183-184
Printed in the Netherlands
Subject to modification
EN 3122 785 19374 2014-Jan-10
2014
Š
TP Vision Netherlands B.V.
All rights reserved. Specifications are subject to change without notice. Trademarks are the property of Koninklijke Philips Electronics N.V. or their respective owners. TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjust earlier supplies accordingly. PHILIPS and the PHILIPS’ Shield Emblem are used under license from Koninklijke Philips Electronics N.V.
EN 2
1.
Revision List
QFU1.2E LA
1. Revision List Manual xxxx xxx xxxx.3 • Chapter 2: Table 2-1 updated (added CTNs). • Chapter 6: added white tone values; see section 6.3.1.
Manual xxxx xxx xxxx.0 • First release. Manual xxxx xxx xxxx.1 • Chapter 2: Table 2-1 updated (added CTNs). • Chapter 4: added additional Ambilight unit handling info; see section 4.3.2.
Manual xxxx xxx xxxx.4 • Chapter 2: Table 2-1 updated (added CTNs). • Chapter 4: updated and added cable wiring (added CTNs). • Chapter 6: added white tone values (added CTNs). • Chapter 9: added wiring diagrams (added CTNs). • Chapter 10: added schematics (AL). • Chapter 11: added styling sheets (added CTNs).
Manual xxxx xxx xxxx.2 • Chapter 2: Table 2-1 updated (added CTNs).
2. Technical Specs, Diversity, and Connections Index of this chapter: 2.1 Technical Specifications 2.2 Directions for Use 2.3 Connections 2.4 Chassis Overview
2.1
Technical Specifications For on-line product support please use the CTN links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers.
Notes: • Figures can deviate due to the different set executions. • Specifications are indicative (subject to change). Table 2-1 Described Model Numbers and Diversity
Styling
Sheet
(AmbiLight)
(Sensor Module)
(Keyboard Control Module)
Amplifier control module
SSB
Supply lines
I2C
Audio
(Wireless LAN USB, Light Sensor, IR/LED Module)
Block Diagrams
Power Supply
11
Control & Clock
10 Schem atics
General Power Architecture
Descr.
Assembly Removal
CTN
Wire Dressing
Connection Overview
Mechanics
9
Video
7
Wiring Diagram
4
Power Supply
2
40PFL8008K/12
2.3
4-1
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.1
-
10.5
10.7
10.9
10.11
11.3
40PFL8008S/12
2.3
4-1
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.1
-
10.5
10.7
10.9
10.11
11.3
40PFL8008S/60
2.3
4-1
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.1
-
10.5
10.7
10.9
10.11
11.3
42PFL6008H/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
42PFL6008K/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
42PFL6008S/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
42PFL6008S/60
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
42PFL6158K/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
42PFL6158S/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
42PFL6188K/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
42PFL6188S/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
42PFL6198K/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
42PFL6678K/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
42PFL6678S/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
42PFL7008H/12
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.11 10.12
11.2
42PFL7008K/12
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.11 10.12
11.2
42PFL7008S/12
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.11 10.12
11.2
42PFL7008S/60
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.11 10.12
11.2
42PFL7008T/12
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.11 10.12
11.2
42PFL7108H/12
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.11 10.12
11.2
2014-Jan-10
back to div. table
Technical Specs, Diversity, and Connections
EN 3
Styling
Sheet
(AmbiLight)
(Sensor Module)
(Keyboard Control Module)
Amplifier control module
SSB
Supply lines
I2C
Audio
(Wireless LAN USB, Light Sensor, IR/LED Module)
Block Diagrams
Power Supply
11
Schem atics
Control & Clock
10
General Power Architecture
Descr.
Assembly Removal
CTN
Wire Dressing
Connection Overview
Mechanics
2.
9
Video
7
Wiring Diagram
4
Power Supply
2
QFU1.2E LA
42PFL7108K/12
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.11 10.12
11.2
42PFL7108S/12
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.11 10.12
11.2
42PFL7108S/60
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.11 10.12
11.2
42PFL7108T/12
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.11 10.12
11.2
46PDL8908S/12
2.3
4-7
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.1
-
10.5
10.8
10.9
10.12
11.4
46PDL8908S/60
2.3
4-7
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.1
-
10.5
10.8
10.9
10.12
11.4
46PFL8008K/12
2.3
4-5
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.1
-
10.5
10.7
10.9
10.15
11.3
46PFL8008S/12
2.3
4-5
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.1
-
10.5
10.7
10.9
10.15
11.3
46PFL8008S/60
2.3
4-5
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.1
-
10.5
10.7
10.9
10.15
11.3
46PFL8008S/98
2.3
4-5
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.1
-
10.5
10.7
10.9
10.15
11.3
47PFL6008H/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
47PFL6008K/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
47PFL6008S/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
47PFL6008S/60
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
47PFL6158K/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
47PFL6158S/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
47PFL6188K/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
47PFL6188S/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
47PFL6198K/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
47PFL6678K/12
2.3
4-3
4.3
7.2
7.3
9.2
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
47PFL6678S/12
2.3
4-3
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.15
11.1
47PFL7008H/12
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.12 10.13
11.2
47PFL7008K/12
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.12 10.13
11.2
47PFL7008S/12
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.12 10.13
11.2
47PFL7008S/60
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.12 10.13
11.2
47PFL7108H/12
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.12 10.13
11.2
47PFL7108K/12
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.12 10.13
11.2
47PFL7108S/12
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.12 10.13
11.2
47PFL7108S/60
2.3
4-4
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.12 10.13
11.2
55PDL8908D/78
2.3
4-7
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.3
-
10.5
-
10.9
10.11 10.12 10.14
11.8
55PDL8908S/12
2.3
4-7
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.1
-
10.5
10.7
10.9
10.13 10.10 10.11
11.8
55PDL8908S/60
2.3
4-7
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.1
-
10.5
10.7
10.9
10.13 10.10 10.11
11.8
55PDL8908S/98
2.3
4-7
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.1
-
10.5
10.7
10.9
10.13 10.10 10.11
11.8
55PFL6008H/12
2.3
4-3
4.3
7.2
7.3
9.3
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.16
11.5
55PFL6008K/12
2.3
4-3
4.3
7.2
7.3
9.3
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.16
11.5
55PFL6008S/12
2.3
4-3
4.3
7.2
7.3
9.3
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.16
11.5
55PFL6008S/60
2.3
4-3
4.3
7.2
7.3
9.3
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.16
11.5
55PFL6008T/12
2.3
4-3
4.3
7.2
7.3
9.3
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.16
11.5
55PFL6158K/12
2.3
4-3
4.3
7.2
7.3
9.3
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.16
11.5
55PFL6158S/12
2.3
4-3
4.3
7.2
7.3
9.3
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.16
11.5
55PFL6188K/12
2.3
4-3
4.3
7.2
7.3
9.3
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.16
11.5
back to div. table
2014-Jan-10
Block Diagrams
Styling
Sheet
(AmbiLight)
(Sensor Module)
(Keyboard Control Module)
Amplifier control module
SSB
Supply lines
I2C
(Wireless LAN USB, Light Sensor, IR/LED Module)
11
Power Supply
10 Schem atics
Control & Clock
Descr.
Assembly Removal
CTN
Wire Dressing
Connection Overview
Mechanics
9
Audio
7
Video
4
Wiring Diagram
2
2.2
Technical Specs, Diversity, and Connections
QFU1.2E LA
General Power Architecture
2.
Power Supply
EN 4
55PFL6188S/12
2.3
4-3
4.3
7.2
7.3
9.3
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.16
11.5
55PFL6198K/12
2.3
4-3
4.3
7.2
7.3
9.3
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.16
11.5
55PFL6678K/12
2.3
4-3
4.3
7.2
7.3
9.3
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.16
11.5
55PFL6678S/12
2.3
4-3
4.3
7.2
7.3
9.3
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.16
11.5
55PFL7008H/12
2.3
4-8
4.3
7.2
7.3
9.4
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.13 10.10 10.11
11.6
55PFL7008K/12
2.3
4-8
4.3
7.2
7.3
9.4
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.13 10.10 10.11
11.6
55PFL7008S/12
2.3
4-8
4.3
7.2
7.3
9.4
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.13 10.10 10.11
11.6
55PFL7008S/60
2.3
4-8
4.3
7.2
7.3
9.4
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.13 10.10 10.11
11.6
55PFL7108H/12
2.3
4-8
4.3
7.2
7.3
9.4
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.13 10.10 10.11
11.6
55PFL7108K/12
2.3
4-8
4.3
7.2
7.3
9.4
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.13 10.10 10.11
11.6
55PFL7108S/12
2.3
4-8
4.3
7.2
7.3
9.4
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.13 10.10 10.11
11.6
55PFL7108S/60
2.3
4-8
4.3
7.2
7.3
9.4
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.13 10.10 10.11
11.6
55PFL8008K/12
2.3
4-9
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.15
11.7
55PFL8008S/12
2.3
4-9
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.15
11.7
55PFL8008S/60
2.3
4-9
4.3
7.2
7.3
-
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.8
10.9
10.15
11.7
60PFL6008H/12
2.3
4-3
4.3
7.2
7.3
9.5
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.17
11.5
60PFL6008K/12
2.3
4-3
4.3
7.2
7.3
9.5
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.17
11.5
60PFL6008S/12
2.3
4-3
4.3
7.2
7.3
9.5
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.17
11.5
60PFL6008S/60
2.3
4-3
4.3
7.2
7.3
9.5
9.9
9.9
-
-
9.10
-
10.2
-
10.5
10.7
10.9
10.17
11.5
60PFL8708S/12
2.3
4-11
4.3
7.2
7.3
9.6
9.9
9.9
-
-
9.10
-
10.3
-
10.5
-
10.9
10.18
11.9
60PFL8708S/60
2.3
4-11
4.3
7.2
7.3
9.6
9.9
9.9
-
-
9.10
-
10.3
-
10.5
-
10.9
10.18
11.9
65PFL9708S/12
2.3
4-12
4.3
7.2
7.3
9.7
9.9
9.9
-
-
9.10
-
10.3
-
-
-
10.9
10.11 10.12 10.14
11.10
65PFL9708S/60
2.3
4-12
4.3
7.2
7.3
9.7
9.9
9.9
-
-
9.10
-
10.3
-
-
-
10.9
10.11 10.12 10.14
11.10
84PFL9708S/12
2.3
4-14
4.3
7.2
7.3
9.8
9.9
9.9
-
-
9.10
-
10.3
10.4
-
-
10.9
10.11 10.12 10.14
11.11
84PFL9708/78
2.3
4-14
4.3
7.2
7.3
9.8
9.9
9.9
-
-
9.10
-
10.3
10.4
-
-
10.9
10.11 10.12 10.14
11.11
Directions for Use You can download this information from the following websites: http://www.philips.com/support http://www.p4c.philips.com
2014-Jan-10
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Technical Specs, Diversity, and Connections 2.3
QFU1.2E LA
2.
EN 5
Connections
Connections Side
Rear HDMI 4
HDMI 1
HDMI 2
HDMI 3
ARC
ARC
ARC
ARC
1
SCART
NETWORK
3
4
2
USB
USB
USB Y Pb Pr - L R
5
AUDIO OUT
AUDIO IN ANTENNA SATELLITE
OPTICAL
L/R
7
8
6
11
9
(optional)
COMMON INTERFACE
10
19370_062_130201.eps 130404
Figure 2-1 Connection overview Note: The following connector colour abbreviations are used (acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.
20 - Ground
3 - Video RGB - In, CVBS - In/Out, Audio - In/Out 20
2.3.1
H
Gnd
2
Connections 1 - Head phone (Output) Bk - Head phone 32 - 600 ohm / 10 mW
21
ot
Figure 2-3 SCART connector
2 - HDMI 1, 2, 3, 4: Digital Video - In, Digital Audio with ARC - In/Out 19 18
1 2
10000_017_090121.eps 090428
Figure 2-2 HDMI (type A) connector 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
- D2+ - Shield - D2- D1+ - Shield - D1- D0+ - Shield - D0- CLK+ - Shield - CLK- Easylink/CEC - ARC - DDC_SCL - DDC_SDA - Ground - +5V - HPD
Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel Control channel Audio Return Channel DDC clock DDC data Gnd Hot Plug Detect
1
10000_001_090121.eps 090121
j H j j H j j H j j H j jk k j jk H j j back to div. table
1 2 3 4 5 6 7 8
- n.c. - Audio R - n.c. - Ground Audio - Ground Blue - Audio L - Video Blue - Function Select
9 10 11 12 13 14 15 16
- Ground Green - n.c. - Video Green - n.c. - Ground Red - Ground P50 - Video Red - Status/FBL
17 18 19 20 21
- Ground Video - Ground FBL - n.c. - Video CVBS - Shield
0.5 VRMS / 10 kohm
j
Gnd Gnd 0.5 VRMS / 10 kohm 0.7 VPP / 75 ohm 0 - 2 V: INT 4.5 - 7 V: EXT 16:9 9.5 - 12 V: EXT 4:3 Gnd
H H j jk j H
0.7 VPP / 75 ohm
j
Gnd Gnd 0.7 VPP / 75 ohm 0 - 0.4 V: INT 1 - 3 V: EXT / 75 ohm Gnd Gnd
H H j
1 VPP / 75 ohm Gnd
j H
j H H
2014-Jan-10
EN 6
2.
QFU1.2E LA
Technical Specs, Diversity, and Connections
4 - RJ45: Ethernet
1 2 3 4
10000_025_090121.eps 120320
Figure 2-4 Ethernet connector 1 2 3 4 5 6 7 8
- TD+ - TD- RD+ - CT - CT - RD- GND - GND
Transmit signal Transmit signal Receive signal Centre Tap: DC level fixation Centre Tap: DC level fixation Receive signal Gnd Gnd
k k j j H H
5 - USB2.0
- +5V - Data (-) - Data (+) - Ground
6 - Cinch: Video YPbPr - In, Audio - In Gn - Video Y 1 VPP / 75 ohm Bu - Video Pb 0.7 VPP / 75 ohm Rd - Video Pr 0.7 VPP / 75 ohm Rd - Audio - R 0.5 VRMS / 10 kohm Wh - Audio - L 0.5 VRMS / 10 kohm
jq jq jq jq jq
7 - Cinch: S/PDIF - Out Bk - Coaxial 0.4 - 0.6VPP / 75 ohm
kq
8 - Cinch: Audio - In (VGA/DVI) Rd - Audio R 0.5 VRMS / 10 kohm Wh - Audio L 0.5 VRMS / 10 kohm
jq jq
9 - Aerial - In - - IEC-type (EU) 1
2
3
Gnd
k jk jk H
Coax, 75 ohm
D
4
10000_022_090121.eps 090121
10 - Common Interface 68p - See Figure 10-1-35 B06I, CI conditional access
jk
Figure 2-5 USB (type A) 11 - SAT - In (optional) - - F-type Coax, 75 ohm
2.4
Chassis Overview Refer to chapter 9. Block Diagrams for PWB/CBA locations.
2014-Jan-10
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D
Precautions, Notes, and Abbreviation List
QFU1.2E LA
3.
EN 7
3. Precautions, Notes, and Abbreviation List Index of this chapter: 3.1 Safety Instructions 3.2 Warnings 3.3 Notes 3.4 Abbreviation List
3.3.2
Schematic Notes •
•
3.1
Safety Instructions Safety regulations require the following during a repair: • Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA). • Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard.
• • • •
Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points: • Route the wire trees correctly and fix them with the mounted cable clamps. • Check the insulation of the Mains/AC Power lead for external damage. • Check the strain relief of the Mains/AC Power cord for proper function. • Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply): 1. Unplug the Mains/AC Power cord and connect a wire between the two pins of the Mains/AC Power plug. 2. Set the Mains/AC Power switch to the “on” position (keep the Mains/AC Power cord unplugged!). 3. Measure the resistance value between the pins of the Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 M and 12 M. 4. Switch “off” the set, and remove the wire between the two pins of the Mains/AC Power plug. • Check the cabinet for defects, to prevent touching of any inner parts by the customer.
3.2
3.3.3
• • •
3.3.4
Notes
3.3.1
General •
•
BGA (Ball Grid Array) ICs Introduction For more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com. Select “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs. BGA Temperature Profiles For BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.
3.3.5
Lead-free Soldering Due to lead-free technology some rules have to be respected by the workshop during a repair: • Use only lead-free soldering tin. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle. • Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: – To reach a solder-tip temperature of at least 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications. • Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat. • Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.
All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential. Be careful during measurements in the high voltage section. Never replace modules or other components while the unit is switched “on”. When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.
3.3
Spare Parts For the latest spare part overview, consult your Philips Spare Part web portal.
Warnings •
All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 k). Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 ). All capacitor values are given in micro-farads ( 10-6), nano-farads (n 10-9), or pico-farads (p 10-12). Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF). An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values. The correct component values are listed on the Philips Spare Parts Web Portal.
Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3). Where necessary, measure the waveforms and voltages with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.
3.3.6
Alternative BOM identification It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”. The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then
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2014-Jan-10
EN 8
3.
QFU1.2E LA
Precautions, Notes, and Abbreviation List
result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.
AARA
ACI
ADC AFC
AGC Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2010 week 10 / 2010 week 17). The 6 last digits contain the serial number.
AM AP AR ASF
ATSC
ATV Auto TV
AV AVC AVIP B/G BDS BLR BTSC
10000_053_110228.eps 110228
B-TXT C CEC
Figure 3-1 Serial number (example) 3.3.7
Board Level Repair (BLR) or Component Level Repair (CLR)
CL CLR ComPair CP CSM CTI
If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging! 3.3.8
•
•
3.4
CVBS
Practical Service Precautions
DAC DBE
It makes sense to avoid exposure to electrical shock. While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard. Always respect voltages. While some may not be dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.
DCM
DDC D/K DFI DFU DMR DMSD DNM
Abbreviation List 0/6/12
2014-Jan-10
SCART switch control signal on A/V board. 0 = loop through (AUX to TV),
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6 = play 16 : 9 format, 12 = play 4 : 3 format Automatic Aspect Ratio Adaptation: algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio Automatic Channel Installation: algorithm that installs TV channels directly from a cable network by means of a predefined TXT page Analogue to Digital Converter Automatic Frequency Control: control signal used to tune to the correct frequency Automatic Gain Control: algorithm that controls the video input of the feature box Amplitude Modulation Asia Pacific Aspect Ratio: 4 by 3 or 16 by 9 Auto Screen Fit: algorithm that adapts aspect ratio to remove horizontal black bars without discarding video information Advanced Television Systems Committee, the digital TV standard in the USA See Auto TV A hardware and software control system that measures picture content, and adapts image parameters in a dynamic way External Audio Video Audio Video Controller Audio Video Input Processor Monochrome TV system. Sound carrier distance is 5.5 MHz Business Display Solutions (iTV) Board-Level Repair Broadcast Television Standard Committee. Multiplex FM stereo sound system, originating from the USA and used e.g. in LATAM and AP-NTSC countries Blue TeleteXT Centre channel (audio) Consumer Electronics Control bus: remote control bus on HDMI connections Constant Level: audio output to connect with an external amplifier Component Level Repair Computer aided rePair Connected Planet / Copy Protection Customer Service Mode Color Transient Improvement: manipulates steepness of chroma transients Composite Video Blanking and Synchronization Digital to Analogue Converter Dynamic Bass Enhancement: extra low frequency amplification Data Communication Module. Also referred to as System Card or Smartcard (for iTV). See “E-DDC” Monochrome TV system. Sound carrier distance is 6.5 MHz Dynamic Frame Insertion Directions For Use: owner's manual Digital Media Reader: card reader Digital Multi Standard Decoding Digital Natural Motion
Precautions, Notes, and Abbreviation List DNR DRAM DRM DSP DST
DTCP
DVB-C DVB-T DVD DVI(-d) E-DDC
EDID EEPROM EMI EPG EPLD EU EXT FDS FDW FLASH FM FPGA FTV Gb/s G-TXT H HD HDD HDCP
HDMI HP I I 2C I2D I2S IF IR IRQ ITU-656
Digital Noise Reduction: noise reduction feature of the set Dynamic RAM Digital Rights Management Digital Signal Processing Dealer Service Tool: special remote control designed for service technicians Digital Transmission Content Protection; A protocol for protecting digital audio/video content that is traversing a high speed serial bus, such as IEEE-1394 Digital Video Broadcast - Cable Digital Video Broadcast - Terrestrial Digital Versatile Disc Digital Visual Interface (d= digital only) Enhanced Display Data Channel (VESA standard for communication channel and display). Using E-DDC, the video source can read the EDID information form the display. Extended Display Identification Data (VESA standard) Electrically Erasable and Programmable Read Only Memory Electro Magnetic Interference Electronic Program Guide Erasable Programmable Logic Device Europe EXTernal (source), entering the set by SCART or by cinches (jacks) Full Dual Screen (same as FDW) Full Dual Window (same as FDS) FLASH memory Field Memory or Frequency Modulation Field-Programmable Gate Array Flat TeleVision Giga bits per second Green TeleteXT H_sync to the module High Definition Hard Disk Drive High-bandwidth Digital Content Protection: A “key” encoded into the HDMI/DVI signal that prevents video data piracy. If a source is HDCP coded and connected via HDMI/DVI without the proper HDCP decoding, the picture is put into a “snow vision” mode or changed to a low resolution. For normal content distribution the source and the display device must be enabled for HDCP “software key” decoding. High Definition Multimedia Interface HeadPhone Monochrome TV system. Sound carrier distance is 6.0 MHz Inter IC bus Inter IC Data bus Inter IC Sound bus Intermediate Frequency Infra Red Interrupt Request The ITU Radio communication Sector (ITU-R) is a standards body subcommittee of the International Telecommunication Union relating to radio communication. ITU-656 (a.k.a. SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used.
iTV LS
LATAM LCD LED L/L'
LPL LS LVDS Mbps M/N MHEG
MIPS
MOP MOSFET MPEG MPIF MUTE MTV NC NICAM
NTC NTSC
NVM O/C OSD OAD
OTC P50 PAL
PCB PCM back to div. table
QFU1.2E LA
3.
EN 9
The SDI signal is self-synchronizing, uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz. Institutional TeleVision; TV sets for hotels, hospitals etc. Last Status; The settings last chosen by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's preferences Latin America Liquid Crystal Display Light Emitting Diode Monochrome TV system. Sound carrier distance is 6.5 MHz. L' is Band I, L is all bands except for Band I LG.Philips LCD (supplier) Loudspeaker Low Voltage Differential Signalling Mega bits per second Monochrome TV system. Sound carrier distance is 4.5 MHz Part of a set of international standards related to the presentation of multimedia information, standardised by the Multimedia and Hypermedia Experts Group. It is commonly used as a language to describe interactive television services Microprocessor without Interlocked Pipeline-Stages; A RISC-based microprocessor Matrix Output Processor Metal Oxide Silicon Field Effect Transistor, switching device Motion Pictures Experts Group Multi Platform InterFace MUTE Line Mainstream TV: TV-mode with Consumer TV features enabled (iTV) Not Connected Near Instantaneous Compounded Audio Multiplexing. This is a digital sound system, mainly used in Europe. Negative Temperature Coefficient, non-linear resistor National Television Standard Committee. Color system mainly used in North America and Japan. Color carrier NTSC M/N= 3.579545 MHz, NTSC 4.43= 4.433619 MHz (this is a VCR norm, it is not transmitted off-air) Non-Volatile Memory: IC containing TV related data such as alignments Open Circuit On Screen Display Over the Air Download. Method of software upgrade via RF transmission. Upgrade software is broadcasted in TS with TV channels. On screen display Teletext and Control; also called Artistic (SAA5800) Project 50: communication protocol between TV and peripherals Phase Alternating Line. Color system mainly used in West Europe (colour carrier = 4.433619 MHz) and South America (colour carrier PAL M = 3.575612 MHz and PAL N = 3.582056 MHz) Printed Circuit Board (same as “PWB”) Pulse Code Modulation 2014-Jan-10
EN 10
3.
PDP PFC PIP PLL
POD
POR PSDL PSL PSLS
PTC PWB PWM QRC QTNR QVCP RAM RGB
RC RC5 / RC6 RESET ROM RSDS R-TXT SAM S/C SCART
SCL SCL-F SD SDA SDA-F SDI SDRAM SECAM
SIF SMPS SoC SOG SOPS SPI
S/PDIF SRAM SRP SSB SSC STB STBY SVGA SVHS SW
2014-Jan-10
QFU1.2E LA
Precautions, Notes, and Abbreviation List
Plasma Display Panel Power Factor Corrector (or Preconditioner) Picture In Picture Phase Locked Loop. Used for e.g. FST tuning systems. The customer can give directly the desired frequency Point Of Deployment: a removable CAM module, implementing the CA system for a host (e.g. a TV-set) Power On Reset, signal to reset the uP Power Supply for Direct view LED backlight with 2D-dimming Power Supply with integrated LED drivers Power Supply with integrated LED drivers with added Scanning functionality Positive Temperature Coefficient, non-linear resistor Printed Wiring Board (same as “PCB”) Pulse Width Modulation Quasi Resonant Converter Quality Temporal Noise Reduction Quality Video Composition Processor Random Access Memory Red, Green, and Blue. The primary color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are reproduced. Remote Control Signal protocol from the remote control receiver RESET signal Read Only Memory Reduced Swing Differential Signalling data interface Red TeleteXT Service Alignment Mode Short Circuit Syndicat des Constructeurs d'Appareils Radiorécepteurs et Téléviseurs Serial Clock I2C CLock Signal on Fast I2C bus Standard Definition Serial Data I2C DAta Signal on Fast I2C bus Serial Digital Interface, see “ITU-656” Synchronous DRAM SEequence Couleur Avec Mémoire. Colour system mainly used in France and East Europe. Colour carriers = 4.406250 MHz and 4.250000 MHz Sound Intermediate Frequency Switched Mode Power Supply System on Chip Sync On Green Self Oscillating Power Supply Serial Peripheral Interface bus; a 4wire synchronous serial data link standard Sony Philips Digital InterFace Static RAM Service Reference Protocol Small Signal Board Spread Spectrum Clocking, used to reduce the effects of EMI Set Top Box STand-BY 800 × 600 (4:3) Super Video Home System Software
SWAN SXGA TFT THD TMDS TS TXT TXT-DW UI uP UXGA V VESA VGA VL VSB WYSIWYR
WXGA XTAL XGA Y Y/C YPbPr
YUV
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Spatial temporal Weighted Averaging Noise reduction 1280 × 1024 Thin Film Transistor Total Harmonic Distortion Transmission Minimized Differential Signalling Transport Stream TeleteXT Dual Window with TeleteXT User Interface Microprocessor 1600 × 1200 (4:3) V-sync to the module Video Electronics Standards Association 640 × 480 (4:3) Variable Level out: processed audio output toward external amplifier Vestigial Side Band; modulation method What You See Is What You Record: record selection that follows main picture and sound 1280 × 768 (15:9) Quartz crystal 1024 × 768 (4:3) Luminance signal Luminance (Y) and Chrominance (C) signal Component video. Luminance and scaled color difference signals (B-Y and R-Y) Component video
Mechanical Instructions
QFU1.2E LA
4.
EN 11
4. Mechanical Instructions Index of this chapter: 4.1 Cable Dressing4.2 Service Positions 4.3 Assy/Panel Removal 4.4 Set Re-assembly Notes: • Figures below can deviate slightly from the actual situation, due to the different set executions.
4.1
Cable Dressing-
Figure 4-1 Cable dressing 40" 8000 series
Figure 4-2 Back cover 40" 8000 series back to div. table
2014-Jan-10
EN 12
4.
QFU1.2E LA
Mechanical Instructions
e l b a l
i a v a t
No
19210_104_120516.eps 120516
Figure 4-3 Cable dressing 42" - 47" - 55" - 60" 6000 series
e l b a l
i a v a t
No
19210_104_120516.eps 120516
Figure 4-4 Cable dressing 42" - 47� 7000 series
2014-Jan-10
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Mechanical Instructions
QFU1.2E LA
4.
EN 13
Figure 4-5 Cable dressing 46" 8000 series
Figure 4-6 Back cover 46" 8000 series
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2014-Jan-10
EN 14
4.
QFU1.2E LA
Mechanical Instructions
e l b a l
i a v a t
No
19210_104_120516.eps 120516
Figure 4-7 Cable dressing 46" - 55" 8000 Design series
19370_082_130208.eps 130208
Figure 4-8 Cable dressing 55" 7000 series
2014-Jan-10
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Mechanical Instructions
QFU1.2E LA
4.
EN 15
Figure 4-9 Cable dressing 55" 8000 series
Figure 4-10 Back cover 55" 8000 series
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2014-Jan-10
EN 16
4.
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Mechanical Instructions
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Figure 4-11 Cable dressing 60" 8000 series
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Figure 4-12 Cable dressing 65" 9000 series
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Figure 4-13 Cable dressing 65" 9000 series - Back cover
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Figure 4-14 Cable dressing 84" 9000 series
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4.
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Mechanical Instructions
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Figure 4-15 Cable dressing 84" 9000 series - Back cover
4.2
Service Positions
Caution: Failure to follow these guidelines can seriously damage the display! Ensure that ESD safe measures are taken.
For easy servicing of a TV set, the set should be put face down on a soft flat surface, foam buffers or other specific workshop tools. Ensure that a stable situation is created to perform measurements and alignments. When using foam bars take care that these always support the cabinet and never only the display. 4.3.1
4.3
Assy/Panel Removal
Rear Cover Warning: Disconnect the mains power cord before removing the rear cover. Attention: For Ambilight sets, the leading edge cover has to be removed.
1 3
It is mandatory to remove the leading edge cover and disconnect the cables prior to removal of the rear cover! See Figure 4-16 and Figure 4-17 for details. 1. For sets equipped with Ambilight: remove the stand and swivel block [1]. 2. Remove the leading edge hatch that covers the Ambilight connector [2]. 3. Unplug the Ambilight connectors located underneath the hatch [3]. 4. Lift the rear cover from the TV. Make sure that wires and flat foils are not damaged while lifting the rear cover from the set.
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2
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Figure 4-16 Rear cover removal Ambilight models -1-
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Click!
3
3
19370_081_130208.eps 130208
LVDS flat foil
Figure 4-17 Rear cover removal Ambilight models -24.3.2
Click!
Ambilight units in Rear Cover The Ambilight units are affixed in the rear cover and will selfdestruct upon removal.
19222_001_120626.eps 120626
Attention: it is of the utmost importance to remove all remains of any adhesive that might be left on the inside of the rear cover.
Figure 4-19 SSB LVDS connector catches (optional) -2-
4.4
4.3.3
Set Re-assembly
The new units come with double-sided adhesive tape. Ensure a correct mounting to avoid uneven light emission of the units.
To re-assemble the whole set, execute all processes in reverse order.
SSB
Notes: • While re-assembling, make sure that all cables are placed and connected in their original position. • Pay special attention not to damage the EMC foams in the set. Ensure that EMC foams are mounted correctly.
Refer to Figure 4-18 and Figure 4-19 for details. Some SSBs have a dedicated LVDS connector, requiring pressing two catches as indicated in the figure, before removing the LVDS cable.
19054_001_111010.eps 111010
Figure 4-18 SSB LVDS connector catches (optional) -1Upon re-connecting the LVDS cable, ensure the catches are locked after having inserted the LVDS cable.
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Service Modes, Error Codes, and Fault Finding
5. Service Modes, Error Codes, and Fault Finding •
Index of this chapter: 5.1 Test Points 5.2 Service Modes 5.3 Start-up 5.4 Service Tools 5.5 Error Codes 5.6 The Blinking LED Procedure 5.7 Protections 5.8 Fault Finding and Repair Tips 5.9 Software Upgrading
5.1
Digital SDM: use the RC-transmitter and key in the code “062593”, directly followed by the “MENU” (or "HOME") button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or "HOME") button again.
Test Points As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective.
SDM
Perform measurements under the following conditions: • Service Default Mode. • Video: Colour bar signal. • Audio: 3 kHz left, 1 kHz right.
5.2
Service Modes Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer.
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Figure 5-1 Service mode pad
Note: For the new model range, a new remote control (RC) is used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old “MENU” button is now called “HOME” (or is indicated by a “house” icon). 5.2.1
After activating this mode, “SDM” will appear in the upper right corner of the screen (when a picture is available). How to Exit SDM Use one of the following methods: • Switch the set to STANDBY via the RC-transmitter. • Via a standard customer RC-transmitter: key in “00”sequence.
Service Default Mode (SDM) Purpose • To create a pre-defined setting, to get the same measurement results as given in this manual. • To override SW protections detected by the standby processor and make the TV start up to the step just before protection. See section “5.3 Start-up”. • To start the blinking LED procedure where only LAYER 2 errors are displayed. (see also section “5.5 Error Codes”).
5.2.2
Purpose • To perform (software) alignments. • To change option settings. • To easily identify the used software version. • To view operation hours. • To display (or clear) the error code buffer.
Specifications Table 5-1 SDM default settings Region
Freq. (MHz)
Default system
Europe, AP(PAL/Multi)
475.25
PAL B/G
Europe, AP DVB-T
546.00 PID Video: 0B DVB-T 06 PID PCR: 0B 06 PID Audio: 0B 07
• •
How to Activate SAM Via a standard RC transmitter: Key in the code “062596” directly followed by the “INFO” or “OK” button. After activating SAM with this method a service warning will appear on the screen, continue by pressing the “OK” button on the RC. Contents of SAM • Hardware Info. – A. SW Version. Displays the software version of the main software (example: QF2XX_1.2.3.4 = AAABB_X.Y.W.Z). • AAA= the chassis name. • BB= Product ID. • X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always compatible with a lower number). – B. Standby processor version. Displays the software version of the standby processor. – C. Production Code. Displays the production code of the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to
All picture settings at 50% (brightness, colour, contrast). Sound volume at 25%.
How to Activate SDM For this chassis there are two kinds of SDM: an analogue SDM and a digital SDM. Tuning will happen according Table 5-1. • Analogue SDM: use the RC-transmitter and key in the code “062596”, directly followed by the “MENU” (or “HOME”) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch the main menu “off”, push the “MENU” (or "HOME") button again. Analogue SDM can also be activated by grounding the solder path on the SSB, with the indication “SDM” (see figure Service mode pad).
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Service Alignment Mode (SAM)
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Service Modes, Error Codes, and Fault Finding
•
•
•
• •
•
be re-written to NVM. The update can be done via the NVM editor available in SAM. Operation hours. Displays the accumulated total of operation hours (not the standby hours). Every time the TV is switched “on/off”, 0.5 hours is added to this number. Errors (followed by maximum 10 errors). The most recent error is displayed at the upper left (for an error explanation see section “5.5 Error Codes”). Reset Error Buffer. When “cursor right” (or “OK” button) pressed here, followed by the “OK” button, the error buffer is reset. Alignments. This will activate the “ALIGNMENTS” submenu. See Chapter 6. Alignments. Options numbers. Extra features for Service. For more info regarding option codes, see chapter 6. Alignments. Note that if the option code numbers are changed, these have to be confirmed with pressing the “OK” button before the options are stored, otherwise changes will be lost. Initialise NVM. The moment the processor recognizes a corrupted NVM, the “initialise NVM” line will be highlighted. Now, two things can be done (dependent of the service instructions at that moment): – Save the content of the NVM via ComPair for development analysis, before initializing. This will give the service department an extra possibility for diagnosis (e.g. when Development asks for this). – Initialise the NVM.
• •
•
•
•
Note: When the NVM is corrupted, or replaced, there is a high possibility that no picture appears because the display code is not correct. So, before initializing the NVM via the SAM, a picture is necessary and therefore the correct display option has to be entered. Refer to Chapter 6. Alignments for details. To adapt this option, it’s advised to use ComPair (the correct values for the options can be found in Chapter 6. Alignments) or a method via a standard RC (described below). Changing the display option via a standard RC: Key in the code “062598” directly followed by the “MENU” (or "HOME") button and “XXX” (where XXX is the 3 digit decimal display code as mentioned on the sticker in the set). Make sure to key in all three digits, also the leading zero’s. If the above action is successful, the front LED will go out as an indication that the RC sequence was correct. After the display option is changed in the NVM, the TV will go to the standby mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.
•
•
Display Option Code
27mm
040
MODEL: 32PF9968/10 PROD.SERIAL NO: AG 1A0620 000001
(CTN Sticker)
10000_038_090121.eps 090819
Figure 5-2 Location of Display Option Code sticker • •
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Test settings. For development purposes only. RF4CE pairing tables. Clear paired remote control. Repairing (coldboot of platform possibly needed) can be done by pressing the red/blue hot keys simultaneously for a few seconds.(be sure the distance between the remote control and TV set RF4CE receiver is less then 30cm). Message like “Pairing successful”, confirms the match-make. Development 1 file versions. Not useful for Service purposes, this information is mainly used by the development department. Development 2 file versions. Not useful for Service purposes, this information is mainly used by the development department. Upload to USB. To upload several settings from the TV to an USB stick, which is connected to the SSB. The items are “Personal settings”, “Option codes”, “Alignments”, “Identification data” (includes the set type and prod code + all 12NC like SSB, display, boards), “History list”. The “All” item supports the upload of all several items at once. A directory “repair\” will be created in the root of the USB stick. To upload the settings, select each item separately, press “cursor right” (or the “OK” button), confirm with “OK” and wait until the message “Done” appears. In case the download to the USB stick was not successful, “Failure” will be displayed. In this case, check if the USB stick is connected properly and if the directory “repair” is present in the root of the USB stick. Now the settings are stored onto the USB stick and can be used to download into another TV or other SSB. Uploading is of course only possible if the software is running and preferably a picture is available. This method is created to be able to save the customer’s TV settings and to store them into another SSB. Important remark : to upload the “channel list”, select “Home” => “Setup” => “TV settings” => “General settings” => “Channel list copy” => “Copy to USB”.The procedure is also described in the (electronic) user manual. Download from USB. To download several settings from the USB stick to the TV, same way of working needs to be followed as described in “Upload to USB”. The “All” item supports to download all several items at once. Important remark : to download the “channel list”, select “Home” => “Setup” => “TV settings” => “General settings” => “Channel list copy” => “Copy to TV”. The procedure is also described in the (electronic) user manual. NVM editor. For Smart TV the set “Type number” must be entered correctly. Also the “Production code” (factory location code), “12NC SSB”, “12NC display” and “12NC supply” can be entered here via the RC-transmitter.Be sure the cursor is put fully to the left (use back key) of the dialog box before enter the new data. Correct data can be found on the side/rear sticker.
How to Navigate • In SAM, the menu items can be selected with the “CURSOR UP/DOWN” key on the RC-transmitter. The selected item will be highlighted. When not all menu items fit on the screen, move the “CURSOR UP/DOWN” key to display the next/previous menu items. • With the “CURSOR LEFT/RIGHT” keys, it is possible to: – (De) activate the selected menu item. – (De) activate the selected sub menu. • With the “OK” key, it is possible to activate the selected action.
39mm
PHILIPS
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Store (go right). All options and alignments are stored when pressing “cursor right” or the “OK” button. Software maintenance. – SW Events. In case of specific software problems, the development department can ask for this info. – HW Events. In case of specific software problems, the development department can ask for this info : - Event 26: refers to a power dip, this is logged after the TV set reboots due to a power dip.
How to Exit SAM Use one of the following methods: • Switch the TV set to STANDBY via the RC-transmitter. • Via a standard RC-transmitter, key in “00” sequence, or select the “BACK” key.
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Service Modes, Error Codes, and Fault Finding
Customer Service Mode (CSM)
•
Purpose When a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer. The CSM is a read only mode, therefore modifications in this mode are not possible.
• • • •
Provided CSM is activated, every menu from CSM can be used as check for the back end chain video.So for all CSM content displayed, it could be determined that the back end video chain is working. • When CSM is activated and there is a USB stick connected to the TV set, the software will dump the CSM content to the USB stick.The file (CSM_model number_serial number.xml) will be saved in the root of the USB stick. This info can be handy if no information is displayed.
•
Additional in CSM mode (with USB stick connected), pressing “OK” will create an extended CSM dump file on the USB stick. This file (Extended_CSM_model number_serial number.xml) contains: • The normal CSM dump information, • All items (from SAM “load to USB”, but in readable format), • Operating hours, • Error codes, • SW/HW event logs.
•
Software versions • Current main software. Displays the build-in main software version. In case of field problems related to software, upgrade can be done. As this software is consumer upgradeable, it will also be published on the Internet. Example: QF2xx-1.2.3.4 • Standby software. Displays the build-in standby processor software version. Upgrading this software will be possible via USB (see section 5.9 Software Upgrading). Example: STDBY_77.3.11.16 • e-UM version. Displays the electronic user manual SWversion (12NC version number). Most significant number here is the last digit. • Strings database version. Reflects the latest embedded string database version. • PQ back-end version.Displays the Scan/backlight microProcessor software version.Device processes the backlight + boost pwm control, scanning, 3D drive. • NT 72314 software.Software version Novatek 72314 (Frame Rate Convertor) device, located on Quad full HD Bolt-on board. • NT 68361 software.Software version Novatek 68361 (4K HDMI to LVDS) device, located on Quad full HD Bolt-on board. • RF4CE software.Software version for the RF4CE board.
To have fast feedback from the field, a flashdump can be requested by development. When in CSM, push the “red” button and key in serial digits ‘2679’ (same keys to form the word ‘COPY’ with a cellphone). A file “Dump_model number_serial number.bin” will be written on the connected USB device. This can take 1/2 minute, depending on the quantity of data that needs to be dumped. Attention: for every dump which imply data tranfers to USB, preferably execute without connected devices like HDD, camera, etc.linked via USB port.This to avoid any possible data corruption. Also when CSM is activated, the LAYER 1 error is displayed via blinking LED. (see also section 5.5 Error Codes). How to Activate CSM Key in the code “123654” via the standard RC transmitter. Note: Activation of the CSM is only possible if there is no (user) menu on the screen!
Quality items • Signal quality. Bad / average /good (not for DVB-S). • Ethernet MAC address. Displays the MAC address present in the SSB. • Wireless MAC address. Displays the wireless MAC address to support the Wi-Fi functionality. • ESN-Netflix. Netflix electronic serial number. • CI module. Displays status if the common interface module is detected. • CI + protected service. Yes/No. • Event counter : S : 000X 0000(number of software recoveries : SW EVENT-LOG #(reboots) S : 0000 000X (number of software events : SW EVENTLOG #(events) H : 000X 0000(number of hardware errors) H : 0000 000X (number of hardware events : SW EVENTLOG #(events).
How to Navigate By means of the “CURSOR-DOWN/UP” knob on the RCtransmitter, can be navigated through the menus. Contents of CSM The contents are reduced to 3 pages: General, Software versions and Quality items. The group names itself are not shown anywhere in the CSM menu. General • Set type. This information is very helpful for a helpdesk/ workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV set. Note that if an NVM is replaced or is initialized after corruption, the set type content has to be re-written to NVM.The update can be done via the NVM editor available in SAM.
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Production code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, the production code content has to be re-written to NVM. The update can be done via the NVM editor available in SAM. Installed date. Indicates the date of the first installation of the TV. This date is acquired by time extraction. Options 1. Displays the option codes numbers of option group 1 as set in SAM (Service Alignment Mode). Options 2. Displays the option codes numbers of option group 2 as set in SAM (Service Alignment Mode). 12NC SSB. Gives an identification of the SSB as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. The update can be done via the NVM editor available in SAM. This identification number is the 12nc number of the SSB. 12NC display. Shows the 12NC of the display. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. The update can be done via the NVM editor available in SAM. 12NC supply. Shows the 12NC of the power supply. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. The update can be done via the NVM editor available in SAM. 12NC sensor board. Shows the 12NC of the sensor board.
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Service Modes, Error Codes, and Fault Finding 5.3
How to Exit CSM Press “MENU” (or "HOME") / “Back” key on the RC-transmitter.
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Start-up As described, the start-up diagrams below, documents which supplies are present at any certain moment.
Off Mains off
Mains on
WakeUp requested
- WakeUp requested - Acquisition needed
St by
Semi St by
- stby requested and no data Acquisition required
GoToProtection (triggered during startup by standby µP)
Active St by requested
WakeUp requested (SDM) GoToProtection GoToProtection
Protection
On
19210_076_120504.eps 120504
Figure 5-3 Transition diagram
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Service Modes, Error Codes, and Fault Finding
Off Stand by or Protection
AC~ Mains is applied
Standby Supply starts running. All standby supply voltages become available.
st-by µP resets, resulting in a high impedant output stage of the I/O ports.
Initialise I/O pins of the st-by µP - Keep AVC system in reset (internal signal) - Switch RESET-FUSION-OUTn LOW - Switch RESET-HDMI-MUXn LOW - Switch RESET-ETHERNETn LOW - Switch AUDIO-MUTEn LOW - Switch SPLASH-ON LOW - Switch LCD-PWR-ONn High
If the protection state was left by short circuiting the SDM pins, detection of a protection condition during startup shall stall the startup. Protection conditions occuring in a playing set shall be ignored. The protection mode shall not be entered.
Switch ENABLE-WOLAN high to power Ethernet PHY and Wifi dongle
Switch ENABLE-WOLANn high to power Ethernet PHY and internal Wifi dongle if Networked Standby was Off in the Standby mode.
start keyboard scanning, RC detection. Wake up reasons are off.
Switch ON Platform supply by switching High the STANDBYn line. Startup shall continue from the moment a valid detection is received.
12V platform is turned on, automatically enabling the low voltage DCDC converter outputs
Detect2 high received within 2 seconds?
No
Yes
12V error: Layer1: 3 Layer2: 16
Enter protection
Wait 300ms
Enable the supply detection algorithm
All display related I/O lines should be LOW as long as the Tcon is not powered to avoid leakage current and tcon startup problems. These lines will furtheron be dynamically controlled by the mainSW.
Start AVC system No Switch following lines asap:(part of preBOOT) (GPIO2): LOW CTRL-DISP2 (GPIO3): LOW CTRL-DISP3 (GPIO8): LOW CTRL-DISP4 (BKLGON): LOW 3D-LR (PWM0): LOW BL-SPI-CS_BL-I-CTRL (PWM1): LOW BL-DIM (BOOST): LOW
Small delay between AVC boot and other platform ICs is preferred to limit rush-in current on Platform.
Wait 10ms
Switch RESET-FUSION-OUTn, RESETHDMI-MUXn , RESET-ETHERNETn High
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Figure 5-4 “Off” to “Semi Standby” flowchart (part 1)
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No
5.
EN 25
Wake up reason coldboot to Active mode?
yes
No
AUDIO-MUTEn is switched by MIPS code later on in the startup process when audio needs to be released
Standby µP monitors boot process and will init a restart if Boot process hampers
No
Startup screen cfg file present?
MIPS boots
yes
Reset-lines are switched
MIPS sends out startup screen
TV application starts
MIPS starts up the display.
Boot is failing
Set was started with SDM pin?
Startup screen visible
Wait 4 seconds before restarting No Yes
No
Switch AVC in reset
Switch RESET-FUSION-OUTn, RESETHDMI-MUXn , RESET-ETHERNETn Low
Semi-Standby
3-th try?Switch Standby I/O line LOW
Yes Blink error code Layer 1 error 2
Ignore boot failure: Stall the startup process. Blink Layer2 error 53. Enter protection without turning off the supplies
Enter protection 19210_081_120504.eps 120504
Figure 5-5 “Off” to “Semi Standby” flowchart (part 2)
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5.
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Service Modes, Error Codes, and Fault Finding
Semi Standby The assumption here is that a fast toggle (<2s) can only happen during ON->SEMI ->ON. In these states, the AVC is still active and can provide the 2s delay. A transition ON->SEMI->STB Y->SEMI->ON cannot be made in less than 2s, because the standby state will be maintained for at least 4s.
Wait until previous on-state is left more than 2 seconds ago. (to prevent LCD display problems)
Assert RGB video blanking and audio mute
Display already on? (cold boot with splash screen)
Yes Initialize audio and video processing IC's and functions according needed use case.
No
Startup display (see separate tab)
Start POWER-OK line detection algorithm as defined in the CHS service.
Wait until valid and stable audio and video, corresponding to the requested output is delivered AND the backlight has been switched on for at least the time which is indicated in the display file as preheat time
return Release audio mute
unblank the video
Set the Ambilight functionality according the last status settings
Display cfg file present and up to date, according correct display option? No Yes Prepare Start screen Display config file and copy to Flash
Active 19210_079_120504.eps 120504
Figure 5-6 “Semi Standby” to “Active” flowchart
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EN 27
Active Mute all sound outputs according information in the FMS AUDIO
Wait 100ms
Switch off POK line detection algorithm (see CHS service)
Switch Off LCD backlight
Mute all video outputs
switch off Ambilight (see CHS ambilight)
Shut down the display (see separate sheet)
Wait until Ambilight has faded out: Output power Observer should be zero
Semi Standby 19210_077_120504.eps 120504
Figure 5-7 “Active” to “Semi Standby” flowchart
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5.
Service Modes, Error Codes, and Fault Finding
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Semi Stand by
If ambientlight functionality was used in semi-standby (lampadaire mode), switch off ambient light (see CHS ambilight)
*) If this is not performed and the set is switched to standby when the switch off of the ambilights is still ongoing, the lights will switch off abruptly when the supply is cut.
Delay transition until ramping down of ambient light is finished. *)
transfer Wake up reasons to the Stand by µP.
transfer specific Firmware and Wake up reasons to the Wifi dongle to allow networked standby
Switch AVC system in reset state Switch reset-USB, Reset-Ethernet and Reset-DVBs LOW
Switch RESET-FUSION-OUTn, RESET-HDMI-MUXn , RESET-ETHERNETn Low
Wait 10ms
Disable all supply related protections and switch off the DC/DC converters (ENABLE-3V3n)
Switch OFF all supplies by switching HIGH the Standby I/O line
Important remarks: release reset audio 10 sec after entering standby to save power
Networked Standby required?
No
Switch ENABLE-WOLAN Low to power off the Ethernet PHY and Internal Wifi dongle.
Also here, the standby state has to be maintained for at least 4s before starting another state transition. Yes
Stand by 19210_078_120504.eps 120504
Figure 5-8 “Semi Standby” to “Standby” flowchart
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Service Modes, Error Codes, and Fault Finding 5.4
Service Tools
5.4.1
ComPair
•
The ComPair Tool is no longer supported.
5.5
Error Codes
5.5.1
Introduction
•
The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained). To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them.
•
• •
•
•
•
•
•
5.5.3
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EN 29
On screen via the SAM (only when a picture is visible). E.g.: – 00 00 00 00 00: No errors detected – 23 00 00 00 00: Error code 23 is the last and only detected error. – 37 23 00 00 00: Error code 23 was first detected and error code 37 is the last detected error. – Note that no protection errors can be logged in the error buffer. Via the blinking LED procedure. See section 5.5.3 How to Clear the Error Buffer. Via ComPair.
How to Clear the Error Buffer Use one of the following methods: • By activation of the “RESET ERROR BUFFER” command in the SAM menu. • If the content of the error buffer has not changed for 50+ hours, it resets automatically.
5.5.4
Error Buffer In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the content, as this history can give significant information). This to ensure that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause.(e.g. a fault in the protection detection circuitry can also lead to a protection) There are several mechanisms of error detection: • Via error bits in the status registers of ICs. • Via polling on I/O pins going to the standby processor. • Via sensing of analog values on the standby processor or the Mips. • Via a “not acknowledge” of an I2C communication.
If no errors are there, the LED should not blink at all in CSM or SDM. No spacer must be displayed as well. There is a simple blinking LED procedure for board level repair (home repair) so called LAYER 1 errors next to the existing errors which are LAYER 2 errors (see Table 5-2). – LAYER 1 errors are one digit errors. – LAYER 2 errors are 2 digit errors. In protection mode. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2. Fatal errors, if I2C bus is blocked and the set reboots, CSM and SAM are not selectable. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2. In CSM mode. – When entering CSM: error(s) LAYER 1 will be displayed via blinking LED.(attention: any new remote control press will disable the error blinking LED sequence, recovery by exit and invoke CSM again for re-enabling the error blinking). In SDM mode. – When SDM is entered via Remote Control code or the hardware pins, LAYER 2 is displayed via blinking LED. Error display on screen. – In CSM no error codes are displayed on screen. – In SAM the complete error list is shown.
Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.
Basically there are three kinds of errors: • Errors detected by the Standby software which lead to protection. These errors will always lead to protection and an automatic start of the blinking LED LAYER 1 error. (see section “5.6 The Blinking LED Procedure”). • Errors detected by the Standby software which not lead to protection. In this case the front LED should blink the involved error. See also section “5.5 Error Codes, 5.5.4 Error Buffer”. Note that it can take up several minutes before the TV starts blinking the error (e.g. LAYER 1 error = 2, LAYER 2 error = 15 or 53). • Errors detected by main software (MIPS). In this case the error will be logged into the error buffer and can be read out via ComPair, via blinking LED method LAYER 1-2 error, or in case picture is visible, via SAM. 5.5.2
How to Read the Error Buffer Use one of the following methods:
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5.
Service Modes, Error Codes, and Fault Finding
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Table 5-2 Error code overview
Description
Layer 1
Layer 2
Monitored by
Error/ Prot
Error Buffer/ Blinking LED
Device
Defective Board
I2CM3 (SSB + SRF bus)
2
13
MIPS
E
BL / EB
SSB
SSB
I2CM2 (BE bus)
2
14
MIPS
E
BL / EB
SSB
SSB
I2CM1(FE bus)
2
18
MIPS
E
BL / EB
SSB
SSB
PNX (Fusion) doesn’t boot
2
15
Stby µP
P
BL
Fusion
SSB
12V
3
16
Stby µP
P
BL
/
Supply
HDMI mux
2
23
MIPS
E
EB
SII9287
SSB
I2C switch
2
24
MIPS
E
EB
PCA9540
SSB
Channel dec DVB-T2
2
27
MIPS
E
EB
CXD2834
SSB
Channel dec DVB-S2
2
28
MIPS
E
EB
SI2169
SSB
Lnb controller
2
31
MIPS
E
EB
LNBH25
SSB
Hybrid Tuner
2
34
MIPS
E
EB
SUT-RE214Z
SSB
Main NVM
2
35
MIPS
E
EB
M24C64
SSB
Tuner DVB-S2
2
36
MIPS
E
EB
STV611X
SSB
Class-D
2
37
MIPS
E
EB
TAS 5731 PHP
SSB
µProcessor PQ
2
38
MIPS
E
EB
LPC1114
SSB
IO Expander
2
41
MIPS
E
EB
PCA9554
SSB
T° sensor SSB/set
2
42
MIPS
E
EB
LM75
T° sensor/SSB
Light sensor
6
43
MIPS
E
EB
TSL2571
Set
µP touch control
6
44
MIPS
E
EB
/
Set
RF4CE
6
46
MIPS
E
EB
/
Set
MIPS doesn’t boot (SW cause)
2
53
Stby µP
P
BL
FUSION
SSB
NT72314
9
61
MIPS
E
EB
NT72314/
QFHD
NT68361
9
62
MIPS
E
EB
NT68361/
QFHD
NT72314 not alive
9
63
MIPS
E
EB
NT72314/
QFHD
NT68361 not alive
9
64
MIPS
E
EB
NT68361/
QFHD
Extra Info • Rebooting. When a TV is constantly rebooting due to internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section “5.8 Fault Finding and Repair Tips, 5.8.6 Logging). It’s shown that the loggings which are generated by the main software keep continuing. • Error 13 (I2C bus M3, SSB + SRF bus blocked). Current situation: when this error occurs, the TV can reboot due to the blocked bus. The best way for further diagnosis here, is to check the logging output. • Error 14 (I2C bus M2, BE bus blocked). Current situation: when this error occurs. The best way for further diagnosis here, is to check the logging output. • Error 18 (I2C bus M1, FE bus blocked). Current situation: when this error occurs. The best way for further diagnosis here, is to check the logging output. • Error 15 (Fusion doesn’t boot). Indicates that the main processor was not able to read his bootscript. This error will point to a hardware problem around the Fusion (supplies not OK, Fusion device completely dead, link between Mips and Standby Processor broken, etc...) Other root causes for this error can be due to hardware problems regarding the DDR’s and the bootscript reading from the Fusion device. • Error 16 (12V). This voltage is made in the power supply and results in protection (LAYER 1 error = 3) in case of absence. When SDM (maintain grounding continuously) is activated we see blinking LED LAYER 2 error = 16. • Error 17 (Display Supply). “Power OK” not applicable. • Error 23 (HDMI mux). When there is no I2C communication towards the HDMI mux after start-up, LAYER 2 error = 23 will be logged and displayed via the blinking LED procedure if SDM is switched on. • Error 24 (I2C switch). When there is no I2C communication towards the I2C switch, LAYER 2 error = 24 will be logged and displayed via the blinking LED procedure when SDM is switched on. • Error 27 (Channel dec DVB-T2). When there is no I2C communication towards the DVB-T channel decoder, LAYER 2 error = 27 will be logged and displayed via the blinking LED procedure if SDM is switched on. • Error 28 (Channel dec DVB-S2). When there is no I2C communication towards the DVB-S channel decoder, 2014-Jan-10
•
•
•
•
•
•
•
• •
•
back to div. table
LAYER 2 error = 28 will be logged and displayed via the blinking LED procedure if SDM is switched on. Error 31 (Lnb controller). When there is no I2C communication towards this device, LAYER 2 error = 31 will be logged and displayed via the blinking LED procedure if SDM is activated. Error 34 (Tuner). When there is no I2C communication towards the tuner during start-up, LAYER 2 error = 34 will be logged and displayed via the blinking LED procedure when SDM is switched on. Error 35 (main NVM). When there is no I2C communication towards the main NVM during start-up, LAYER 2 error = 35 will be displayed via the blinking LED procedure when SDM is switched “on”. All service modes (CSM, SAM and SDM) are accessible during this failure, observed in the Uart logging as follows: "<< ERROR >>> PFPOW_.C: First Error (id19, Layer_1= 2 Layer_= 35)". Error 36 (Tuner DVB-S). When there is no I2C communication towards the DVB-S tuner during start-up, LAYER 2 error = 36 will be logged and displayed via the blinking LED procedure when SDM is switched “on”. Error 37 (Class-D). When there is no I2C communication towards the Class-D amplifier during start-up, LAYER 2 error = 37 will be logged and displayed via the blinking LED procedure when SDM is switched “on”. Error 38 (microProcessor PQ). When there is no I2C communication towards this processor device during startup, LAYER 2 error = 38 will be logged and displayed via the blinking LED procedure when SDM is switched “on”. This device supports the backlight + boost pwm control, scanning, 3D drive. Error 41 (I/O Expander). When there is no I2C communication towards this processor device during startup, LAYER 2 error = 41 will be logged and displayed via the blinking LED procedure when SDM is switched “on”. Error 42 (Temp sensor). Only applicable for TV sets equipped/stuffed with temperature devices. Error 43 (Light sensor). When there is no I2C communication towards the light sensor device during start-up, LAYER 2 error = 43 will be logged and displayed via the blinking LED procedure when SDM is switched “on”. Error 44 (Touch control). When there is no I2C communication towards the touch control micro processor during start-up, LAYER 2 error = 44 will be logged and
Service Modes, Error Codes, and Fault Finding
•
•
•
•
•
•
displayed via the blinking LED procedure when SDM is switched “on”. Error 46 (RF4CE). When there is no I2C communication towards the RF4CE driver during start-up, LAYER 2 error = 46 will be logged and displayed via the blinking LED procedure when SDM is switched “on”. Error 53. This error will indicate that the Fusion device has read his bootscript (when this would have failed, error 15 would blink) but initialization was never completed because of hardware problems (NAND flash, DDR...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take a few minutes before the TV starts blinking LAYER 1 error = 2 or in SDM (maintain grounding continuously), LAYER 2 error = 53. Error 61 (NT72314). When there is no I2C acknowledge from the Novatek device (Quad full HD Bolt-on board) towards the MIPS during start-up, LAYER 2 error = 61 will be logged.Here, the Novatek device operates as frame rate convertor. Error 62 (NT68361). When there is no I2C acknowledge from the Novatek device (Quad full HD Bolt-on board) towards the MIPS during start-up, LAYER 2 error = 62 will be logged.Here, the Novatek device supports the 4K HDMI to LVDS conversion. Error 63 (NT72314 not alive).Error generated via I2C by the device itself, although acknowledge passed and confirmed. Error 64 (NT68361 not alive).Error generated via I2C by the device itself, although acknowledge passed and confirmed.
5.6
The Blinking LED Procedure
5.6.1
Introduction
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5. One long blink of 3 s to finish the sequence (spacer). 6. The sequence starts again. 5.6.2
How to Activate Use one of the following methods: • Activate the CSM. The blinking front LED will show the layer 1 error(s), this works in “normal operation” mode or automatically when the error/protection is monitored by the standby processor. In case no picture is shown and there is no LED blinking, read the logging to detect whether “error devices” are mentioned. (see section “5.8 Fault Finding and Repair Tips, 5.8.6 Logging”). • Activate the SDM. The blinking front LED will show the entire content of the LAYER 2 error buffer, this works in “normal operation” mode or when SDM (via hardware pins) is activated when the tv set is in protection.
5.7
Protections
5.7.1
Software Protections Most of the protections and errors use either the standby microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections. There are several types of software related protections, solving a variety of fault conditions: • Related to supplies: presence of the +5V, +3V3, +2V5, +1V2 and +1V1 needs to be measured, no protection triggered here. • Protections related to breakdown of the safety check mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more.
The blinking LED procedure can be split up into two situations: • Blinking LED procedure LAYER 1 error. In this case the error is automatically blinked when the TV is put in CSM. This will be only one digit error, namely the one that is referring to the defective board (see table “5-2 Error code overview”) which causes the failure of the TV. This approach will especially be used for home repair and call centres. The aim here is to have service diagnosis from a distance. • Blinking LED procedure LAYER 2 error. Via this procedure, the contents of the error buffer can be made visible via the front LED. In this case the error contains 2 digits (see table “5-2 Error code overview”) and will be displayed when SDM (hardware pins) is activated. This is especially useful for fault finding and gives more details regarding the root cause of the defective board. Important remark: For an empty error buffer, the LED should not blink at all in CSM or SDM. No spacer will be displayed.
Remark on the Supply Errors The detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection. Protections during Start-up During TV start-up, some voltages and IC observers are actively monitored to be able to optimize the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start-up, they are described in the start-up flow in detail (see section “5.3 Start-up”).
5.8
Fault Finding and Repair Tips Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra Info”.
When one of the blinking LED procedures is activated, the front LED will show (blink) the contents of the error buffer. Error codes greater then 10 are shown as follows: 1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit 2. A pause of 1.5 s 3. “n” short blinks (where “n”= 1 to 9) 4. A pause of approximately 3 s, 5. When all the error codes are displayed, the sequence finishes with a LED blink of 3 s (spacer). 6. The sequence starts again.
5.8.1
Ambilight Due to the aging process on the LED’s fitted on the Ambilight module, there can be a difference in the colour and/or light output of the spare ambilight modules in comparison with the originals ones contained in the TV set. Via SAM => alignments => ambilight, the spare module can be fine-tuned. Other possibility: the original values can also be recovered via SAM, Upload to USB => alignments. Now the original settings are on the USB stick and can be reloaded into another SSB (NVM).
Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show: 1. One long blink of 750 ms (which is an indication of the decimal digit) followed by a pause of 1.5 s 2. Two short blinks of 250 ms followed by a pause of 3 s 3. Eight short blinks followed by a pause of 3 s 4. Six short blinks followed by a pause of 3 s back to div. table
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5.
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Service Modes, Error Codes, and Fault Finding
CSM
Start-up of switching converters is triggered by DETECT12V signal that becomes high when +12V rises above 10V and stays above 9V (1V hysteresis).DETECT12V is used as enable signal by the +12V to +5V switching converter;+12V to +1V1FD and +12V to +1V5(and +1V2-MIPS) will start at the same time with +5V due to ENABLE+1V5+1V1 that is set high by DETECT12V signal.Tuners are supplied from their respective linear voltage regulators when +5V starts.The rest of the supply voltages (+3V3, +2V5, +1V2-FA, +1V2-FE and +1V1-FA) are switched on a few milliseconds later by signal ENABLE+3V3.
When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.xml) will be saved in the root of the USB stick. If this mechanism works it can be concluded that a large part of the operating system is already working (MIPS, USB...) 5.8.3
Power conversion and distribution.
In case of TV sets having ambilight consumption from +12V higher than 1A, the electronic protection circuit (7UAC or 7UAD and surrounding components) is used instead of fuse 1UA2. AMBI-POWER should be available shortly (100 ms) after +12V starts if there is no load on it. The over-current trigger level is around 4.1A for 7UAC and 3.5A for 7UAD. Once the overcurrent protection is triggered, it can be reset by removing the shortcircuit cause and keeping it under no load condition for about 100 ms.
Description Input power for the TV platform comes from the main power supply that delivers +3V5-STANDBY (pin 9 of connector 1M90) and +12V (pins 11,12 and 25,26 of the same connector). +3V5STANDBY (3.5V nominal) is the permanent voltage while +12V is started by the STANDBY signal (connector 1M90, pin 10) when going from high to low. +12V is split in few branches via fuses 1UA0 (+12Va), 1UA1 (+12Vb) and 1UP1(+12-DVBS): • +12Va serves as input voltage for the switching voltage regulators that deliver +1V1-FD and +1V5. • +12Vb is used as input voltage for the switching voltage regulators that deliver +3V3 and +5V. • +12V-DVBS (if DVB-S functionality is present) goes to 12V and +V-LNB switching regulators.
Important remark: for tests, GND-AL must be connected to platform GND. +V-LNB value is set via the I2C bus: around 13V for vertical polarized satellite channels and around 18V for the horizontal ones. Maximum output current is limited to 400mA
The on board power supply consists of 4 switching voltage regulators (5 in case of DVB-S version), 8 linear voltage regulators (9 in case of DVB-S version) and an over-current protection circuit for 12V (AMBI-POWER) ambilight boards.
Debugging The best way to find a failure in the DC/DC converters is to check their start-up sequence at power “on”, presuming that the external supply is operational. Take the STANDBY signal "high"-to-"low" transition as trigger reference and check the power start-up sequence as described above.
All switching voltage regulators have 12V input voltage and deliver: • +1V1-FD Fusion main core supply voltage (0.95V...1.2V depending on DVS1 signal), stabilized close to the point of load by means of SENSE+1V1-FD signal. • +1V5 supply voltage (1.53V nominal), for the DDR3 memories and DDR3 interface of the Fusion chip and +1V5 to +1V2-MIPS and +1V5 to +1V2-FE linear voltage regulators. • +3V3 supply voltage (3.32V nominal): overall 3.3V for on board IC’s and external ambientlight panels, also used as input voltage for linear voltage regulators delivering +1V1FA, +1V2-FA and +2V5. • +5V (5.15V nominal) for USB ports, Conditional Access Module and via linear voltage regulators, the DVB-T and DVB-S tuner supplies. • +V-LNB (13V or 18V) supply for outdoor satellite reception equipment.
Tips • Behaviour comparison with a working Fusion R3 platform can be a fast way to locate failures. • Check first the integrity of fuses 1UA0, 1UA1 and (if present) 1UA2 and 1UP1. • If a fuse is found interrupted: check the respective +12Va (or +12Vb or +12V-DVBS) short circuit with all of the derived supply voltages, for example: a +12Va ->+1V5 short circuit will probably be caused by a defective 7UB5 integrated circuit. • Switching frequency should be around 400KHz for 7UP2, 500KHz for 7UC0 and 7URA, 650KHz for 7UB5 and 800KHz for 7UR6. • When a short circuit to GND is found on one of the supply voltage delivered by a switching voltage regulator, then try first removing the power coil(s) from the output filter of the converter, this to point the location of the short circuit (at converter side or at load side).
The linear voltage regulators are providing: • +1V1-FA supply voltage (1.10V nominal, from +3V3) for low power analog (PLL) blocks inside Fusion chip. • +1V2-MIPS supply voltage (1.05...1.3V depending on DVS2 signal, input voltage: +1V5) for Fusion auxiliary core. • +1V2-FE supply voltage (1.20V nominal, from +1V5) for (if present) DVB-T2 and DVB-S2 demodulator IC devices. • +1V2-FA supply voltage (1.20V nominal, from +3V3) for higher power analog Fusion internal blocks (mainly video ADC’s). • +2V5 supply voltage (2.5V nominal, from +3V3) for LVDS or Vx1 interface and various other internal blocks of Fusion. • +3V3 supply voltages (3.3V nominal, from +5V) for RF tuners, separate linear regulator per tuner. • +3V3-STANDBY supply voltage(3.3V nominal, from +3V5STANDBY) for Fusion standby controller and IR/RF remote-control receivers. • +3V3-LAN supply voltage (3.37V nominal, from +3V5STANDBY) for WiFi module and LAN interface of Fusion, this supply voltage is present when ENABLE-WOLAN is high.
2014-Jan-10
5.8.4
Power Supply Unit For fault finding tips, refer to section 7.2.1.
5.8.5
Exit “Factory Mode” This mode can be recognized as state of no respons on any random remote control request, this mode manifest by flashing LED, visualized in front of the TV. To exit this mode, push the “VOLUME minus” button on the TV’s local keyboard for 10 seconds (this disables the continuous mode). Then push the “SOURCE” button for 10 seconds until to exit the “Factory mode”.
5.8.6
Logging When something is wrong with the TV set (f.i. the set is rebooting) you can check for more information via the logging
back to div. table
Service Modes, Error Codes, and Fault Finding in Hyperterminal. The Hyperterminal is available in every Windows application via Programs, Accessories, Communications, Hyperterminal. Connect a “ComPair UART”cable (3138 188 75051) from the service connector in the TV to the “multi function” jack at the front of ComPair II box. Required settings in ComPair before starting to log: - Start up the ComPair application. - Select the correct database (open file “QFUX.X”, this will set the ComPair interface in the appropriate mode). - Close ComPair After start-up of the Hyperterminal, fill in a name (f.i. “logging”) in the “Connection Description” box, then apply the following settings: 1. COMx 2. Bits per second = 115200 3. Data bits = 8 4. Parity = none 5. Stop bits = 1 6. Flow control = none During the start-up of the TV set, the logging will be displayed. This is also the case during rebooting of the TV set (the same logging appears over and over). Also available in the logging is the “Display Option Code” (useful when there is no picture), look for item “display number xxx” in the beginning of the logging. Tip: when there is no picture available during rebooting you are able to check for “error devices” in the logging (LAYER 2 error) which can be very helpful to determine the failure cause of the reboot. For protection state, there is no logging. 5.8.7
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Startup in Jett Mode: Check Uart logging in Jet mode mentioned as : “JETT UART READY”. 5.8.8
Memory test The memory test is running in the background of the main TV software.It allocates a memory pool used to write and read back predefined data, as reference to detect possible memory corruption.The memory test is enabled by dial-in of sequence “6636” while the remote control (dedicated) is in DVD mode and the TV in CSM.Once the red LED in the front of the TV set starts blinking, exit CSM in order to display video.As long as the memory test is running and no error is detected, the standby LED is blinking.Upon detection of errors, the standby LED stays continuous ON and details will be shown in the prints of the Uart logging.It is not possible to stop the memory test once launched unless the TV is restarted, also increase/decrease the frequency of the memory interface can not be set. Startup procedure: • Switch ON the TV set. • Set TV use case (preferably DVBT H264 or HDMI1080p). • Invoke CSM (dial-in “123654”on the remote control). • Set the remote control in DVD mode, and enter sequence “6636”. • Check the loggings coming from the service connector (Mips Uart prints) : “**MemoryTest No errors found so far (loop xx)” xx : number of tests done. • As long as the memory test is running and no error is detected, the standby LED is blinking continuously, upon detection of errors, the standby LED stays ON. • Get out of CSM in order to see video.
Guidelines Uart logging Description possible cases: Uart loggings are displayed: • When Uart loggings are coming out, the first conclusion we can make is that the TV set is starting up and communication with the flash RAM seems to be supported. The Fusion processor is able to read and write in the DRAMs. • We can not yet conclude: Flash RAM and DRAMs are fully operational/reliable.There still can be errors in the data transfers, DRAM errors, read/write speed and timing control.
COM port settings: • Baud rate: 115200 • Data: 8 bits • Parity: none • Stop: 1 bit • Flow control: none
No Uart logging at all: • No startup will end up in a blinking LED status: error LAYER 1 = “2”, error LAYER 2 = “53” (startup with SDM solder paths continuous short). • Error LAYER 2 = “15” (hardware cause) is more related to a supply issue while error LAYER 2 = “53” (software cause) refers more to boot issues.
Error detection : In case some errors are detected, the standby LED will stop blinking and following logs can be retrieved in the Uart prints: • Error: offset [address] (READ/WRITE) xxxxxxxx/yyyyyyyy/ zzzzzzzz should be nnnnnnnn. with: • Offset: offset address where error is detected from start of buffer. • Address: physical address where error is detected from start of buffer. • READ/WRITE: indicates if error occurred during read or write memory access. • xxxxxxxx/yyyyyyyy/zzzzzzzz: the 3 data reads from the memory location where the error(s) occurred. • nnnnnnnn: correct data (expected content).
Uart loggings reporting fault conditions, error messages, error codes, fatal errors: • Some failures are indicated by error codes in the logging, check with error codes table (see Table “5-2 Error code overview”). e.g. => <<<ERROR>>>PLFPOW_MERR.C : First Error (id=10,Layer_1=2,Layer_2=23). • I2C bus errors. • Not all failures or error messages should be interpreted as fault. For instance root cause can be due to wrong option codes settings => e.g. “FpgaDimmingPresent: False/True”. In the Uart log startup script we can observe and check the enabled loaded option codes.
In some cases the TV software can crash before an error is detected.Thus, symptoms of software crash (reboot, picture freeze, no picture) should also be considered as test failure.
Defective sectors (bad blocks) in the Nand Flash can also be reported in the logging.
5.8.9
Loudspeakers Make sure that the volume is set to minimum during disconnecting the speakers in the ON-state of the TV. The audio amplifier can be damaged by disconnecting the speakers during ON-state of the set!
Startup in the SW upgrade application and observe the Uart logging: Starting up the TV set in the Manual Software Upgrade mode will show access to USB, meant to copy software content from USB to the DRAM. Progress feedback can be found in the logging. back to div. table
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Service Modes, Error Codes, and Fault Finding
5.8.10 Power Supply In case of no picture when CSM (test pattern) is activated and backlight doesn’t light up, it’s recommended first to check the LED drivers on the PSL(S). Attention point for cable handling: (dis)connection for power cable (power supply <=> SSB) should always be executed without any bending or mechanical stress on the outisdes of the connector 1M90.Risk of double pins inside the connector should be avoid in this way. 5.8.11 Display option code Attention: In case the SSB is replaced, always check the display option code number (group 2, first option number e.g. “44855”) in SAM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions. Also supported in this chassis: The display option code can be changed by “062598 HOME XXX” special SAM command (XXX=display option in 3 digits).
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Service Modes, Error Codes, and Fault Finding 5.8.12 SSB Replacement
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For a more general overview of steps to follow, refer to figure 5-11 SSB replacement flowchart.
Follow the instructions in the flowchart in case a SSB has to be exchanged. See table 5-3 SSB replacement instructions.
Table 5-3 SSB replacement instructions
Step #
Action to do
Advise / Attention points / Remarks
1
Ensure ESD protection by using a wristband
-
2
If SSB is still functional: Go via SAM to “upload to USB” and copy Personal Upload to USB: a directory “repair” will be created on the USB, and all data will be copied in this settings - Option codes - Alignments (Presets) - Set Identification. directory. In case of issues by copying the program map table, it is advised to reinstall the Advice: because of differences in memory allocation, it is advised to upgrade programs from Virgin mode instead of using copy via USB. main SW before copying data from existing SSB. Copy of Preset list is possible from normal user interface.
3
Disconnect set from mains and from antenna.
Safety and ESD!
4
Open the set and disconnect LVDS flat cable. Disconnect other cables / connections.
Always take care for ESD! Be extra careful when removing connectors!
5
Dismount the (defective) SSB from the set.
Do not damage SSB copper tracks with your tools! Do not scratch bottom of SSB (be very careful by moving SSB over SSB supports). See Figure 5-9 and Figure 5-10.
6
Place new SSB in the set, and fixate/mount carefully.
Do not damage SSB copper tracks with your tools! Do not scratch bottom of SSB (be very careful by moving SSB over SSB supports). See Figure 5-9 and Figure 5-10.
7
Connect PSU and other connectors. Insert the optional WiFi module.
Make sure that the connectors are correctly plugged-in and locked (click). Special attention for the optional WiFi module: a defective WiFi module can give reboots or no start-up of the SSB. In this case do a trial without WiFi module.
8
Connect LVDS connector(s).
Be very careful: wrong or bad connection can damage the TCON part on the SSB and damage the LCD display. Check if flat cables are fitted correctly before closing the connector lock.
9
Connect set to mains and switch TV “On”.
Check start-up of the set, backlight switching “On”.
10
If the set does not start (or reboots) check: - The connectors from the power supply, - The power supply cable and connection pins, - LVDS cable connection.
Power supply connector must “snap” into the socket.
11
Before programming the new SSB, upgrade to latest software. If set is starting Some SSB’s will start-up in software upgrade mode, and software needs to be installed before you up in software upgrade mode, then first install new software via software can program the Display Option codes. It’s adviced to use an autorun.upg file for software Upgrade Menu or via the autorun.upg file. upgrade, this in case you have no OSD on the screen.
12
If set is starting up without picture or menu (OSD), first program the correct Display Option codes.
13
Go to SAM and program “Set type” and “Serial number”. This is possible via Programming “Set type” and “Serial number” is mandatory to have all functionality of the set, like the NVM editor and virtual keyboard. In case personal settings were DLNA, Net TV… For certain sets you may need to use ComPair for this. recovered from the defective SSB, you can use an “Upload from USB”.
14
Check if option codes are correct, and keys are present. SSBs with integrated Validity of HDCP, CI+, Marlin, and WDRM keys can be checked via ComPair. TCON needs TCON alignment in SAM.
15
Update to latest software (Standby and main software). This step is necessary Even when the SSB already has the latest software, it is mandatory to upgrade again the software to make sure that the (optional) 200 Hz T-CON board has the latest software. to update the 200 Hz T-CON part. At the end of the main software update process, a dedicated software is loaded, from the main processor via the LVDS connection, to upgrade the 200 Hz T-CON part. For certain LCD displays, a dedicated Display software patch (autoscript) is available. See General Service info GSC_85590.
16
Once the set is playing, check cable connection between PSU and SSB, by moving the cable if there are no bad connections.
17
Fill in the Electronic DDF (Defect Description Form): Fault symptom, TV type It is mandatory to fill in the E-DDF form (see the “At Your Service” web portal). and TV serial number.
18
Install presets or check if all presets are OK. Check in CSM if Type number, Serial number, Main and Standby software are correct.
19
Check connectivity to Net TV and DLNA. Check AmbiLight functionality.
Only for sets having these functionalities.
20
Inform customer about Memory Card, USB, or Hard drive PVR (Personal Video Recording) recordings.
Inform customer that previous recordings made on Memory Card (movie download), USB, or Hard drive will be lost. USB or Hard drive needs to be re-formatted and matched with new SSB (WDRM Keys!).
Use blind service mode “062598” + “Home” button, directly followed by the Display Option code (3 digits). Set will switch to Standby after Display Option code is entered.
Check the two power connectors on 1M90. Bad contact or bad connection here can give reboots.
Special attention for Standby software: check if Standby software ID is matching with the D-RAM’s mounted on the SSB (2 × Elpida = 73, 4 × Elpida = 64, 2 × Hynix = 72, 4 × Hynix = 63).
SSB fixation points
Significant risk of damaging the board by the fixation point Blue arrows: traces of friction Red arrows: damaged components
19070_201_110728.eps 110804
19070_202_110728.eps 110804
Figure 5-9 Mounting attention points [1/2]
Figure 5-10 Mounting attention points [2/2]
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5.
Service Modes, Error Codes, and Fault Finding
QFU1.2E LA
In st ru ct io n n o t e SSB rep lacem en t Q55x.x
ST AR T
Before starting: - prepare a USB memory stick with the latest software - download the latest Main Software (Fus) from www.p4c.philips.com - unzip this file - create a folder ”upgrades” in the root of a USB stick (size > 50 MB) and save the autorun.upg file in this "upgrades" folder. Note: it is possible to rename this file, e.g."Q54x_SW_version.upg"; this in case there are more than one "autorun.upg" files on the USB stick.
Set is still oper ating? No Yes
C onnect the U SB stick to the set, go to SAM and save the current TV settings via “Upload to USB”
1. D ismount the defective SSB. 2. Replace the SSB by a Service SSB.
Start-up the set Due to a possible wrong display option code in the received Service SSB (NVM), it’s possible that no picture is displayed. Due to this the download application will not be shown either. This tree enables you to load the main software step-by-step via the UART logging on the PC (this for visual feedback). No pictur e displayed
1) Start up the TV set, equiped with the Service SSB, and enable the UART logging on the PC.
Set behaviour?
Pictur e displayed Set is starting up without software upgrade menu appearing on screen
Pictur e displayed Set is starting up with software upgrade menu appearing on screen
2) The TV set will start-up automatically in the download application if main TV software is not loaded. 1) Plug the USB stick into the TV set and select the “autorun .upg” file in the displayed browser.
3) Plug the prepared USB stick into the TV set. Follow the instructions in the UART log file, press “Right” cursor key to enter the list. Navigate to the “autorun.upg” file in the UART logging printout via the cursor keys on the remote control. When the correct file is selected, press “Ok”.
2) Now the main software will be loaded automatically, supported by a progress bar. 4) Press "Down" cursor and “Ok” to start flashing the main TV software. Printouts like: “L: 1-100%, V: 1-100% and P: 1-100%” should be visible now in the UART logging. 3) Wait until the message “Operation successful !” is displayed and remove all inserted media. Restart the TV set.
5) Wait until the message “Operation successful !” is logged in the UART log and remove all inserted media. Restart the TV set.
Set the correct “Display code” via “062598 -HOME- xxx” where “xxx” is the 3 digit display panel code (see sticker on the side or bottom of the cabinet)
After entering the “Display Option” code, the set is going to Standby (= validation of code) Restart the set
No
Connect PC via the ComPair interface to Service connector.
Saved settings on USB stick?
Yes
Start TV in Jett mode (DVD I + (OSD)) Open ComPair browser Q54x
Go to SAM and reload settings via “Download from USB” function.
In case of settings reloaded from USB, the set type, serial number, display 12 NC, are automatically stored when entering display options.
Program set type number, serial number, and display 12 NC Program E - DFU if needed. If not already done: Check latest software on Service website. Update main and Stand-by software via USB.
Attention point for Net TV: If the set type and serial number are not filled in, the Net TV functionality will not work. It will not be possible to connect to the internet.
- Check if correct “display option” code is programmed. - Verify “option codes” according to sticker inside the set. - Default settings for “white drive” > see Service Manual.
Check and perform alignments in SAM according to the Service Manual. Option codes, colour temperature, etc.
Final check of all menus in CSM. Special attention for HDMI Keys and Mac address. Check if E - D F U is present.
End
Q55x.E SSB Board swap – ER on behalf of VDS Updated 28-07-2011
19070_200_110728.eps 111103
Figure 5-11 SSB replacement flowchart
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Set is st art in g u p in F act o ry m o d e
Set is starting up in F actory m ode?
Noisy picture with bands/lines is visible and the RED LED is continuous on.
An “F” is displayed (and the HDMI 1 input is displayed).
- Press the “volume minus” button on the TVs local keyboard for 5 ~10 seconds - Press the “SOURCE” button for 10 seconds until the “F” disappears from the screen or the noise on the screen is replaced by “blue mute”
The noise on the screen is replaced with the blue mute or the “F” is disappeared!
Unplug the mains cord to verify the correct disabling of the Factory mode.
Program display option code via “062598 MENU”, followed by the 3 digits code of the display (this code can be found on a sticker on - or inside - the set).
After entering “display option” code, the set is going in stand-by mode (= validation of code)
R estart the set
H_16771_007b.eps 100322
Figure 5-12 SSB replacement flowchart - Factory mode
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5.
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Service Modes, Error Codes, and Fault Finding
18753_211_100811.eps 110810
Figure 5-13 SSB start-up
5.9
Software Upgrading
Automatic Software Upgrade In “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “AUTORUN.UPG” (part of the one-zip file: e.g. QF2EU_0.88.0.0.zip). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see eUM). The “autorun.upg” file must be placed in the root of the USB stick. How to upgrade: 1. Copy “AUTORUN.UPG” to the root of the USB stick. 2. Insert USB stick in the set while the set is operational. The set will restart and the upgrading will start automatically. As soon as the programming is finished, a message is shown to remove the USB stick and restart the set.
Always check for the latest software version on the service website in relation to the correct CTN!!! 5.9.1
Introduction The set software and security keys are stored in a NANDFlash, which is connected to the Fusion processor. It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the electronic User Manual.
Manual Software Upgrade In case that the software upgrade application does not start automatically, it can also be started manually. How to start the software upgrade application manually: 1. Disconnect the TV from the Mains/AC Power. 2. Press the “OK” button on a Philips TV remote control or a Philips DVD RC-6 remote control (attention : not supported by use of RF4CE remote due to the fact this application is not running yet at the time of the “OK” request). Keep the “OK” button pressed while reconnecting the TV to the Mains/AC Power. 3. The software upgrade application will start.
Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys! (CI +, MAC address, ...). Perform the following actions after SSB replacement: 1. Set the correct option numbers (see rearcover sticker). 2. Update the TV software => see the eUM (electronic User Manual) for instructions. 3. Perform the alignments as described in chapter 6 (section 6.5 Reset of Repaired SSB). 4. Check in CSM if Set type, MAC address are valid. For the correct order number of a new SSB, always refer to the Spare Parts list! 5.9.2
Attention! In case the download application has been started manually, the “autorun.upg” will maybe not be recognized. What to do in this case:
Main Software Upgrade •
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1. Create a directory “UPGRADES” on the USB stick. 2. Rename the “autorun.upg” to something else, e.g. to “software.upg”. Do not use long or complicated names, keep it simple. Make sure that “AUTORUN.UPG” is no longer present in the root of the USB stick. 3. Copy the renamed “upg” file into this directory. 4. Insert USB stick into the TV. 5. The renamed “upg” file will be visible and selectable in the upgrade application. Back-up Software Upgrade Application If the default software upgrade application does not start (could be due to a corrupted boot sector) via the above described method, try activating the “back-up software upgrade application”. How to start the “back-up software upgrade application” manually: 1. Disconnect the TV from the Mains/AC Power. 2. Press the “CURSOR DOWN”-button on a Philips TV remote control while reconnecting the TV to the Mains/AC Power.(attention : not supported by use of RF4CE remote due to the fact this application is not running yet at the time of the “CURSOR-DOWN” request). 3. The back-up software upgrade application will start. 5.9.3
Standby Software Upgrade via USB In this chassis it is possible to upgrade the Standby software via a USB stick. The method is similar as upgrading the main software via USB. Use the following steps: 1. Create a directory “UPGRADES” on the USB stick. 2. Copy the Standby software (one-zip file StandbyUpgrade, e.g. StandbyFactory_77.03.12.00_16.00.00.upg) into this directory. 3. Insert the USB stick into the TV. 4. Start the download application manually (see section “ Manual Software Upgrade”. 5. Select the appropriate file and press the “OK” button to upgrade.
5.9.4
Content and Usage of the One-Zip Software File Below the content of the One-Zip file is explained, and instructions on how and when to use it. • BLCtrlµP_QF2EU_x.x.x.x.zip. Contains the BLCtrlµP software in “upg” format.SW version available in CSM 2.5 PQ back-end software version.Attention : no power interruption allowed during the upgrade process (upgrade not full proof). • FullUpgrade_QF2EU_x.x.x.x.zip. Contains the “upg” file which is needed to upgrade the TV main software and the standby software at once. • ProcessNVM_QF2EU_x.x.x.x.zip. Default NVM content. Must be programmed via ComPair or can be loaded via USB, be aware that all alignments stored in NVM are overwritten here. • NovatekAfterburner314_QF2EU_x.x.x.x.zip. Contains the software in “upg” format to drive the Novatek 72314 (Frame Rate Convertor) device, located on Quad full HD Bolt-on board. • NovatekQfhdHDMI_QF2EU_x.x.x.x.zip.Contains the software in “upg” format to drive the Novatek 68361 (4K HDMI to LVDS) device, located on Quad full HD Bolt-on board.
5.9.5
UART logging 2K13 (see section “5.8 Fault Finding and Repair Tips, 5.8.6 Logging).
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6.
QFU1.2E LA
Alignments
6. Alignments Index of this chapter: 6.1 General Alignment Conditions 6.2 Hardware Alignments 6.3 Software Alignments 6.4 Option Settings 6.5 Reset of Repaired SSB 6.6 Total Overview SAM modes
6.1
•
6.3.1
•
•
6.2
100
Brightness
50
Colour
0
Light Sensor
Off
Picture format
Unscaled
In menu “Picture”, choose “Pixel Precise HD” and set picture settings as follows:
Picture Setting Dynamic Contrast
Off
Dynamic Backlight
Off
Colour Enhancement
Off
Gamma (advanced)
0
•
Go to the SAM and select “Alignments”-> “White point”.
White point alignment LCD screens: • Use a 100% white screen (format: 720p50) to the HDMI input and set the following values: – “Colour temperature”: “Cool”. – All “White point” values to: “127”.
First, set the correct options: – In SAM, select “Option numbers”. – Fill in the option settings for “Group 1” and “Group 2” according to the set sticker (see also paragraph 6.4 Option Settings). – Press OK on the remote control before the cursor is moved to the left. – In submenu “Option numbers” select “Store” and press OK on the RC. OR: – In main menu, select “Store” again and press OK on the RC. – Switch the set to standby. Warming up (>15 minutes).
In case you have a colour analyser: • Measure, in a dark environment, with a calibrated contactless color analyser (e.g.Minolta CA-210) in the centre of the screen and note the x, y value. • Apply a 90% full white screen to the HDMI input and select this input.Format : 720p50.If a Quantum Data generator is used, it’s recommended to select the “FLAT” predefined setting from the device. • Adjust the correct x, y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x, y coordinates (see Table 6-1 White D alignment values : 40/46/55(8000 series) displays.6-2 White D alignment values : 42/47/55(6000-7000 series) displays.). Tolerance: dx: 0.002, dy: 0.002. • Repeat this step for the other colour temperatures that need to be aligned. • When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM. • Restore the initial picture settings after the alignments.
Hardware Alignments Not applicable.
6.3
Contrast
•
Alignment Sequence •
Choose “Home”, “Setup”, “TV Settings” and then “Picture” and set picture settings as follows:
Picture Setting
Perform all electrical adjustments under the following conditions: • Power supply voltage (depends on region): – AP-NTSC: 120 VAC or 230 VAC / 50 Hz ( 10%). – AP-PAL-multi: 120 - 230 VAC / 50 Hz ( 10%). – EU: 230 VAC / 50 Hz ( 10%). – US: 120 VAC / 60 Hz ( 10%). – LATAM-NTSC: 120 - 230 VAC / 50 Hz ( 10%). • Connect the set to the mains via an isolation transformer with low internal resistance. • Allow the set to warm up for approximately 15 minutes. • Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground. • Test probe: Ri > 10 M, Ci < 20 pF. • Use an isolated trimmer/screwdriver to perform alignments. 6.1.1
White Point •
General Alignment Conditions
LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).
Software Alignments Put the set in SAM mode (see Chapter 5. Service Modes, Error Codes, and Fault Finding). The SAM menu will now appear on the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below. The following items can be aligned: • White point • Ambilight.
Table 6-1 White D alignment values : 40/46/55(8000 series) displays.
To store the data: • Press OK on the RC before the cursor is moved to the left • In main menu select “Store” and press OK on the RC • Switch the set to standby mode.
Value
Cool (11000K)
Normal (9000K)
Warm (6500K)
x
0.280
0.292
0.320
y
0.295
0.310
0.345
Table 6-2 White D alignment values : 42/47/55(6000-7000 series) displays.
For the next alignments, supply the following test signals via a video generator to the RF input: • EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz • US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).
2014-Jan-10
Value
Cool (11000K)
Normal (9000K)
Warm (6500K)
x
0.277
0.289
0.317
y
0.299
0.313
0.348
If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production(statistics). back to div. table
Alignments • • • •
Select a COLOUR TEMPERATURE (e.g. COOL, NORMAL, or WARM). Set the RED, GREEN and BLUE default values according to the values in Table 6-5. When finished press OK on the RC, then press STORE (in the SAM root menu) to store the aligned values to the NVM. Restore the initial picture settings after the alignments.
White Tone
6.
EN 41
55PFL8008/x
Colour Temp
R
G
B
Normal
127
103
113
Cool
122
103
127
Warm
127
90
74
Table 6-9 White tone default settings 55" PDL series
Table 6-3 White tone default settings 40" PFL series White Tone
QFU1.2E LA
White Tone
40PFL8008/x
55PDL8908/x
Colour Temp
R
G
B
Normal
127
96
98
Colour Temp
R
G
B
Cool
127
100
116
Normal
127
110
110
Warm
127
88
59
Cool
123
115
127
Warm
127
99
72
Table 6-10 White tone default settings 60" PFL series
Table 6-4 White tone default settings 42" PFL series White Tone
White Tone
42PFLxxx8/x
60PFL6008/x
Colour Temp
R
G
B
Normal
127
108
103
Colour Temp
R
G
B
Cool
127
115
121
Normal
127
118
116
Warm
127
96
63
Cool
120
120
127
Warm
127
108
74
White Tone
60PFL8708/x
Table 6-5 White tone default settings 46" PFL series White Tone
46PFL8008/x
Colour Temp
R
G
B
Normal
127
99
108
Cool
124
102
125
Warm
127
87
71
R
G
Normal
127
92
92
Cool
127
98
110
Warm
127
84
58
B
123
91
Cool
124
125
111
Warm
127
118
51
65PFL9708/x
Colour Temp
R
G
B
Normal
125
123
125
Cool
113
115
127
Warm
127
113
89
B
Table 6-12 White tone default settings 84" PFL series White Tone
Table 6-7 White tone default settings 47" PFL series White Tone
47PFL6xx8/x
Colour Temp
R
G
B
Normal
127
105
98
Cool
126
112
124
Warm
127
95
58
White Tone
47PFL7xx8/x
Colour Temp
R
G
B
Normal
127
109
110
Cool
123
112
127
Warm
127
96
63
6.3.2
55PFL6xx8/x
Colour Temp
R
G
Normal
127
99
97
Cool
127
107
118
Warm
127
87
54
White Tone
B
55PFL7xx8/x
Colour Temp
R
G
B
Normal
127
97
101
Cool
127
102
122
Warm
127
85
58
84PFL9708/x
Colour Temp
R
G
B
Normal
127
112
118
Cool
120
111
127
Warm
127
104
79
Ambilight Each ambient light module is aligned by a matrix and by the brightness. After replacement of a spare module, the brightness/color can be adjust/fine-tuned according the neighbouring modules. 1. Go to SAM. 2. Select “Alignments”. 3. Select “Ambilight”. A white test pattern shall be displayed by the ambilight modules. 4. Select the number of the module that have to be aligned. Module 1 is the first one which will come across according the wiring path, starting at the small signal panel, proceeding towards the ambient light modules one by one after the other. The first module will be attached to the next module 2. Module number 2 to number 3 etc. Herewith the way to define the ambilight module numbering. 5. Align the brightness, use as reference the neighbouring modules output. Adjust now by eye side, the brightness is automatically stored. 6. Select one of 10 matrixes which color matches most with the neighbouring modules. (see table “6-13 Overview matrix correction table). 7. The alignment is stored automatically (tip: don’t switch off the set immediately after the alignment is done, automatic storage can require a time frame of 10 seconds).
Table 6-8 White tone default settings 55" PFL series White Tone
G
127
White Tone
46PDL8908/x
Colour Temp
R
Normal
Table 6-11 White tone default settings 65" PFL series
Table 6-6 White tone default settings 46" PDL series White Tone
Colour Temp
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6.
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Alignments
Table 6-13 Overview matrix correction table Matrix #
fR
fG
fB
Matrix 0
1
1
1
Matrix 1
1
0.9
0.9
Matrix 2
0.9
1
0.9
Matrix 3
0.9
0.9
1
Matrix 4
0.9
1
1
Matrix 5
1
0.9
1
Matrix 6
1
1
0.9
Matrix 7
0.95
1
1
Matrix 8
1
0.95
1
Matrix 9
1
1
0.95
6.4
Option Settings
6.4.1
Introduction
Diversity Not all sets with the same Commercial Type Number (CTN) necessarily have the same option code! Use of Alternative BOM => an alternative BOM number usually indicates the use of an alternative display or power supply. This results in another display code thus in another Option code. Refer to Chapter 2. Technical Specs, Diversity, and Connections.
6.5
A very important issue towards a repaired SSB from a Service repair shop (SSB repair on component level) implies the reset of the NVM on the SSB. A repaired SSB in Service should get the service Set type “00PF0000000000” and Production code “00000000000000”. Also the virgin bit needs to be set. To set all this, you can use the ComPair tool or use the “NVM editor” and “Setup => TV settings => General settings => Reinstall TV” (virgin mode).
The microprocessor communicates with a large number of I2C ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address.
After a repaired SSB has been mounted in the set (set repair on board level), the type number (CTN) and production code + 12NC’s (SSB, display and supply) of the TV has to be set according the type plate of the set (no info on 12NC’s here). For this, you can use the NVM editor in SAM. This action also ensures the correct functioning of the “Smart TV” feature and access to the Smart TV portals. The loading of the CTN and production code can also be done via ComPair (Model number programming).
Notes: • After changing the option number(s), save them by pressing the “OK” button on the RC before the cursor is moved to the left, select “STORE” in the SAM root menu and press “OK” on the RC. • The new option setting is only active after the TV is switched “off” / “standby” and “on” again with the mains switch (the NVM is then read again). 6.4.2
After a SSB repair, the original channel map can be restored, provided that the original channel map was stored on a USB stick before repair was commenced and that basic functionality of the TV, needed for this procedure, was not hampered as a result of the defect. The procedure of “channel map cloning” is clearly described in the (electronic) user manual.
(Service) Options From 2011 onwards, it is not longer possible to change individual option settings in SAM. Options can only be changed all at once by using the option codes as described in section 6.4.4.
6.4.3
Option Code Overview Refer to the rearcover sticker in the set for the correct option codes. Important: after having edited the option numbers as described above, you must press OK on the remote control before the cursor is moved to the left!
6.4.4
Opt. No. (Option numbers) Select this sub menu to set all options at once (expressed in two long strings of numbers). An option number (or “option byte”) represents a number of different options. When you change these numbers directly, you can set all options very quickly. All options are controlled via eight option numbers. When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on the rearcover sticker from the TV set. Example: The options sticker gives the following option numbers: • Group 1 : 08192 00133 01387 45160 • Group 2 : 12232 04256 00164 00000 The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicate software options 5 to 8. Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set). When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number.
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Reset of Repaired SSB
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Alignments 6.5.1
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6.
EN 43
SSB identification Whenever ordering a new SSB, it should be noted that the correct ordering number (12nc) of a SSB is located on a sticker on the SSB. The format is <12nc SSB><serial number>. The ordering number of the correct “Service” SSB is the one preceded by the letter “S” in case 2 or more ordering numbers are present on the bar code sticker.
18310_221_090318.eps 090319
Figure 6-1 SSB identification
6.6
Total Overview SAM modes Table 6-14 SAM mode overview Main Menu
Sub-menu 1
Sub-menu 2
Hardware Info
A. SW version
e.g. “QF2EU_0.49.1.0
Sub-menu 3
B. Standby processor version e.g. “STDBY_77.3.11.16” C. Production code
Description Display TV & Standby SW version and CTN serial number
e.g. “see type plate”
Operation hours
Displays the accumulated total of operation hours.TV switched “on/off” & every 0.5 hours is increase one
Errors
Displays the most recent errors
Reset error buffer Alignment
Clears all content in the error buffer White point
Colour temperature
Normal Warn
3 different modes of colour temperature can be selected
Cool White point red
LCD White Point Alignment. For values, see Table 6-5 White tone default settings 46" PFL series to 6-8 White tone default settings 55" PFL series
White point green White point blue Ambilight
Select module Brightness Select matrix
Option numbers
Group 1
e.g. “00008.00001.15421.02239”
The first line (group 1) indicates hardware options 1 to 4
Group 2
e.g. “44816.34311.33024.00000”
The second line (group 2) indicates software options 5 to 8
Store
Store after changing
Initialise NVM
N.A.
Store
Select Store in the SAM root menu after making any changes
Software maintenance
Software events
Display
Display information is for development purposes
Clear Test reboot Test kernel crash Test application crash Hardware events
Display
Display information is for development purposes
Clear Test setting
Digital info
Current frequency: 538 QAM modulation: 64-qam
Display information is for development purposes
Symbol rate: Original network ID: 12871 Network ID: 12871 Transport stream ID: 2 Service ID: 3 Hierarchical modulation: 0 Selected video PID: 35 Selected main audio PID: 99 Selected 2nd audio PID: 8191 Install start frequency
000
Install start frequency from “0” MHz
Install end frequency
999
Install end frequency as “999” MHz
Digital only
Select Digital only or Digital + Analogue before installation
Default install frequency Installation
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2014-Jan-10
EN 44
6.
Main Menu
QFU1.2E LA Sub-menu 1
Alignments Sub-menu 2
Sub-menu 3
RF4CE pairing tables Development file versions
Description Clear paired remote control
Development 1 file version
Display parameters DISPT5.0.9.29
Display information is for development purposes
Acoustics parameters SNDPR 5.0.6.20 PQ parameters FUSIO 1.0.27.22 Ambilight parameters PRFAM 5.0.5.2 Temp comp parameters 1.3 Development 2 file version
12NC one zip software
Display information is for development purposes
Initial main software NVM version QF2EU_0.4.5.0 e-Sticker software Upload to USB
Channel list (not)
Item “Channel list” removed from the user interface
Personal settings Option codes Alignments Identification data History list All (options included) Download from USB
Channel list (not)
Item “Channel list” removed from the user interface
Personal settings Option codes Alignments Identification data All (options included) NVM editor
2014-Jan-10
Type number
see type plate
Production code
see type plate
NVM editor; re key-in type number and production code after SSB replacement
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Circuit Descriptions
QFU1.2E LA
7.
EN 45
7. Circuit Descriptions 7.1
Index of this chapter: 7.1 Introduction 7.2 Power Supply 7.3 General Power Architecture
Introduction The QFU1.2E LA chassis is part of the FUSION platform and covers sets in the 6xxx, 7xxx, 8xxx and 9xxx range. It uses the same chipset as the earlier QFU1.1E LA chassis.
Notes: • Only new circuits (circuits that are not published recently) are described. • Figures can deviate slightly from the actual situation, due to different set executions. • For a good understanding of the following circuit descriptions, please use the wiring-, block- (see chapter 9. Block Diagrams) and circuit diagrams (see chapter 10. Circuit Diagrams and PWB Layouts). Where necessary, you will find a separate drawing for clarification.
FUSION 2013 Architecture Overview For details about the chassis block diagrams refer to chapter 9. Block Diagrams. An overview of the FUSION 2013 architecture can be found in Figure 7-1.
1GB DDR
1GB FLASH
32
16/32
VByOne OR LVDS DVB-T2 GPIO
Tuner
7.1.1
DVB-S2
Fusion
CI+
#mapping +I2C
AL
Hybrid Tuner
Only circuits that differ from this chassis are described in this manual. For all other info, refer to the QFU1.1E LA manual.
BL uP
HDMI #Hub architecture
+WOLAN
Wifi
ETH
USB
Class-D 19370_083_130208.eps 130208
Figure 7-1 Architecture of FUSION platform 2013
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2014-Jan-10
EN 46
7.
Circuit Descriptions
QFU1.2E LA
7.2
Power Supply
7.2.1
Power Supply Unit
fuse with one with the correct specifications! This part is available in the regular market. Consult the Philips Service web portal for the order codes of the boards.
All power supplies are a black box for Service. When any of these power supplies is defective, a new board must be ordered and the defective one must be returned, unless the main fuse of the board is broken. Always replace a defective
7.3
General Power Architecture For the power architecture, refer to figure 7-2
Fully integrated PSLS 1M09 Display interfacing 1316, 1319
Display-power
Ambient Light
Platform - Power Control + Power 1M90
With 16 DRV
Basic-SSBPlatform
Low Stby power PFC
Ac-input + Mainsfilter AC-IN 1308
1 power-PCB
19370_084_130208.eps 130208
Figure 7-2 High level power architecture
2014-Jan-10
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IC Data Sheets
QFU1.2E LA
8.
EN 47
8. IC Data Sheets This chapter shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the
8.1
electrical diagrams (with the exception of “memory” and “logic” ICs).
Diagram 10-1-8 B02C, DVBT2 channel decoder B02C, CXD2834 (IC7KC0)
Block diagram MPEG Decoder
TUNER IF+ IF-
(RFAGC-MON)
TAINP (IF) TAINM (IF)
RFAIN
12-bit ADC
10-bit ADC
DVB-T2 Demodulator
LDPC/BCH Decoder
Stream Processor
TSCLK TSCLK TSVALID TSIF
(RFAGC)
GPIO1 (PWM)
TSSYNC
GPIO DVB-T Demodulator
IFAGC
SCL SDA
TIFAGC
TSDATA7-0 RS Decoder
AGC
DVB-C Demodulator
TSDATA7-0
TS Smoothing
SCL
TTUSCL I2C IF
TTUSDA
41MHz or 20.5 MHz
TSVALID TSSYNC
SDA
SCL SDA
OSC PLL XTALI XTALO
Pinning information
19220_025_120227.eps 120227
Figure 8-1 Internal block diagram and pin configuration
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2014-Jan-10
EN 48
8.
QFU1.2E LA
IC Data Sheets
Personal Notes:
10000_012_090121 110
2014-Jan-10
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Block Diagrams
QFU1.2E LA
9.
EN 49
9. Block Diagrams 9.1
Wiring Diagram Series 40"
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Block Diagrams 9.2
QFU1.2E LA
9.
EN 50
Wiring Diagram 42" - 47" 6xxx series
Wiring diagram 42"- 47" 6xxx series
v19374_025_140110.epsvv 140110
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Block Diagrams 9.3
QFU1.2E LA
9.
EN 51
Wiring Diagram 55" 6xxx series
Wiring diagram 55" 6xxx series
19374_024_140110.eps 140110
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Block Diagrams 9.4
QFU1.2E LA
9.
EN 52
Wiring Diagram 55" 7xxx series
Wiring diagram 55" 7xx8 series
v19374_026_140110.epsvv 140110
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Block Diagrams 9.5
QFU1.2E LA
9.
EN 53
Wiring Diagram 60" 6xxx series
Wiring diagram 60" 6xxx series
19374_023_140110.eps 140110
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Block Diagrams 9.6
QFU1.2E LA
9.
EN 54
Wiring Diagram 60" 8xxx series
Wiring diagram 60" 8xxx series
8C27
8M09
8016
PSU
RF4CE 8M90
8015
8G50
8G51 8C31
SSB
8C28 8T51
8C29
19374_022_140110.eps 140110
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Block Diagrams 9.7
QFU1.2E LA
9.
EN 55
Wiring Diagram 65" 9xxx series
Wiring diagram 65" 9xxx series
1020 RF4CE
8C27 8319 8316
FRC 8702
8M90 809A
1050 PSU 809B 8M01
8G50
SSB 8G51
8C20
8G52 8G53 TCON 8803
1012 LED-RECEIVER PANEL
19374_021_140110.eps 140110
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Block Diagrams
9.
EN 56
Wiring Diagram 84" 9xx8 Series
Wiring diagram 84" 9xx8 series
8L25
1020 RF4CE
8P43 8L26 LED driver
LED driver
8L25
8P42
8C27
1051 Standby Board
8L32
8L21
8L33
8P41 1052 PFC-board
8L11
8L24
8P40
8G50
8G52
1006 FRC Board
TCON 8G53 8M90
8702
8G51
8803 8S00
8P50
8S01
8M11 8M01
1050 EMI-board I
1111 SSB
Amplifier board 1174
8D01 8D02 8C20
1073 Keyboard
9.8
QFU1.2E LA
5220
5219
5212
1043 WiFi module
5212
1012 LED board
19374_015_131126.eps 131126
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Block Diagrams
9.
EN 57
Block Diagram Skype module
USB 1
camera & mic
USB-HDD-DM
USB-CAM-DM
USB HUB
USB 2 USB-PORTA-DM
USB HUB
Wi-Fi Module
GPIO for WoWLAN
BCM43235 / MIMO 2x2 11n
USB 3 USB-PORTB-DM
UART for factory/Service
Ethernet RF4CE module Ti CC2533
L I2S
Class D
LNB DVB-S2 LNBH25
Sat In
R Analogue Stereo
TS-DVBS
CH DEC SI2169
8K×8 EEPROM
/2
HP
1GB 8 bit SLC NAND Flash Memory
NVM
Ethernet PHY Atheros AR8030 10/100Mbit WoLAN
DVB-S + S2 STV 6111B
PHY
TS-DVBT2
CH DEC CXD2834ER
SUTRE214
SCART L/R Audio YPbPr L/R Audio VGA L/R Audio
Analog Audio AFE 12bit 54MHz
S/PDIF-OUT
Optical S/PDIF
USB MAC
Audio Postprocessing
PHY
G1
7 6
9 8
13 12
Status 1
R
I2C
STANDBY MCU - RTC - IR decode - Key pad - CEC
PLF
CA TS In/ Out
Audio-Video Decoder CPU
15 14
19
17 16
18
Standby NVM 512KB flash
GPIO ADC in IR in
APP CPU
Graphics Engine
MIPS 74Kf @ 700MHz 2D
3D
1GB DDR3
21
2 × Channel Memory Bus
20
64/48bit
Display CPU
FBL
YPbPr
L Pr
CEC SPI interface
- Slow ADC
MIPS 74kc @700MHz
YPbPr audio L/R
VIF/SIF, ATSC, DVBT/C, ISDB-B/QAM DEMODULATOR
MIPS 24Ke @ 400MHz
MULTI VIDEO ENCODER DECODER
MAIN
MAIN
[...PQ processing...]
[...PQ processing...]
YPBPR-DETECTn
PCA9554BS I²C driven
Y
SCART RGB Automatic association with: - HDMI 1/2/3/4 with DVI video
SCART CVBS
Analog Video Mux AFE: 108MHz 10bit
M U X
10bit 3D comb filter
Video Decoder
H&V
Backlight Meter 2D Dimming Ambilight Fingerprint detection
S E L E C T
OR
PIP
PIP
PIP
1080p@60Hz
[...PQ processing...]
[...PQ processing...]
3D BLENDER - Gamma - White balance - 12bit resolution - RGB processing - xvYCC for main channel - 2x programmable colour matrix - Bitmask Video Source Select Support for 3D
Halo Free ME/MC FRC
A L n
Backlight μP
BACKEND cf. backend requirements L/R + V-sync
3D IR
Watermark Insertion
Quad LVDS I/F
2/4 LVDS 10 bit RGB 1080p
Vx1 I/F
8× V×1 10 bit RGB 1080p
VBI Slicer Analog Video Mux
A L 1
PWM SPI
IDP I/F
Main
SC1-DETECTn
Pb
H&V
1080p@60Hz
MIPS 4KEc CPU
YPbPr
YPbPr
DVI audio L/R
UART
Registers
R1
11 10
PFLASH
OSD Scalers
5 4
UART
(8051)
TRANSPORT DEMUX
SCART
3
STANDBY POWER ISLAND I2C
MIPS @ 1GHz
CA slot (CI+)
2
SDIO (2)
EJTAG
SmartCard
1
10/100/ 1000 Ethernet MAC
USB MAC
HDMI0_ARC
B1
PWM (3)
DVB-T2
RGMI
RF In
AFE 12bit 54MHz
9.9
QFU1.2E LA
Component / PC RGB
HDMI Audio Return Channel (ARC)
HDMI #1
S2
S1
S0
Y4 Y0
HDMI ARC
Y1
74HCT4051 1:8 demux
HDMI #2
CVBS Out Scaler
Y2
HDMI-Rx
Y3
TV Encoder
Video DAC
Mux & 6dB Gain
CVBS
Not used
EDID
HDMI #3
HDMI ARC 0 1 2 HDMI ARC
HDMI #4
3
HDMI mux SiI9287B (4 inputs)
CEC
19370_059_130201.eps 130201
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Block Diagrams
9.
EN 58
Block Diagram Supplylines
+3V5-STANDBY
+12V-AUDIO
+12V-AUDIO
+12V
(Class-D)
pin 9 T 4A 32V +12V
TCON switch
+VDISP
(TCON)
+3V3-LAN
((W)LAN)
ENABLE-WOLAN
3,5V to 3,37V linear regulator
LCD-PWR-ONn
RT9187GSP (RICHTE)
pins 11, 12, 25 and 26
3,5V to 3,3V linear regulator
+3V5-STANDBY
+3V3-STANDBY (Fusion, RC,...)
+12V-AUDIO
RT9193+33GB (RICHTE)
over-current protection 1A (2A fuse) or 2,8A
+12VAL
pins 13 and 14
AMBI-POWER (ambilight)
+3V3
+3V3AL
(ambilight)
+1V1-FA
(Fusion)
+12VAL
+12V detector, power-up and power-down sequencer
pins 21 and 22
DETECT12V ENABLE+1V5+1V1 ENABLE+2V5 ENABLE+3V3
+3V3
DVS2
+1V1-FD +1V5
RT8228DGQW (7UC0)+ ext mosfet
ENABLE+1V5+1V1
pins 23 and 24
T 3A 32V
+12Va
12V to 1,5V switching converter
3,3V to 1,1V linear regulator RT9187BGB (RICHTE)
DVS1
12V to 1,1V switching converter
GND-AL
1,5V to 1,2V linear regulator
(Fusion 2nd core voltage)
+1V2-MIPS
TI TPS7A7001DDA (TI00)
+3V3 +1V5
1UA0
3,3V to 1,2V linear regulator
+1V2-FA
(Fusion)
NX1117C12Z (NXP0)
TI TPS54527DDA
ENABLE+1V5+1V1 +3V3
pins 7, 8, 15, 12V to 3,3V switching converter
16, 27 and 28
ENABLE+2V5
+3V3
3,3V to 2,5V linear regulator
Reserved
T 3A 32V +12Vb
(Fusion, PLL)
+2V5
RT9025-12GSP (RICHTE)
RT7297CHZSP
+12V
+1V5
ENABLE+3V3
1,5V to 1,1V linear regulator
+1V1-DVBT2
1UA1 STANDBY
1M90
+T
GND
9.10
QFU1.2E LA
RT9025-12GSP (RICHTE)
pin 10 12V to 5V switching converter
+5V +1V5
RT8288AZSP
1,5V to 1,2V linear regulator
+1V2-FE
(DVB-T2, DVB-S2) (chanel decoder)
RT9025-12GSP (RICHTE)
DETECT12V T 3A 32V 1UP1
12V to +V-LNB switching converter
+5V
+V-LNB
LNBH25LPQ (ST00)
5V to 3,3V linear regulator
VCC-TUNER
(DVB-T/T2)
+3V3-DVBS
(DVB-S2)
NX1117C33Z (NXP0)
(I2C) 5V to 3,3V linear regulator NX1117C33Z (NXP0)
+5V-PORTA,B, C
+5V
(USB )
+T 1.5A (0.5A per USB)
19370_060_130201.eps 130201
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Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 59
10. Circuit Diagrams and PWB Layouts 310431366124 SSB B01A, Power connector
Power connector
B01A
B01A
+12V
+12V DETECTION
3 5
RES 3UG3
3
1K0
22K
7 6
FUAN
IUAD
POWER-OK
3UG4-3
1
100n
BC857BS(COL) 7UF9-2
+3V3-STANDBY 3UG4-2
100R
GND-AL
IUF7 100K
22K
22K
+3V3-STANDBY
3GYB
1M0
7UF9-1 BC857BS(COL)
8
+12VAL
BL-ON BL-I-CTRL BL-DIM1 BL-DIM2
100R 100R 100R 100R
3UG8
3UAF-1
3GY7 3GY8 3GY9 3GYA
2UAJ
FUA8 FUAA FUAK FUAL
3UD0
4K7
FUAD
3UAG RES
3UAE
FUA7
1u0 RES
1
+12V-AUDIO
100K
DETECT12V
2
FUAC
IUFQ
3UG4-4
2
7UA0-1 BC847BPN(COL)
IUAB
+12V
IUF8 100K
IUAC
22K
STANDBY
100R
FUAM FUA5
4
IUAF 3UAF-2
3UA4
FUA2
3UAF-4
FUAB
IUAA
4
FUA6 FUA9
7UA0-2 BC847BPN(COL)
5 100K 1%
FUA3
3UD1
FUA4
BL-DIM3 BL-DIM4 BL-DIM5 BL-DIM6 BL-DIM7 BL-DIM8
1% 68K
ENABLE+3V3 100K
+12V
FUAE 3UG4-1
30 29
FUAV
+12V-AUDIO SMAW200-H28S2
10n
1n0 2GYA
RES 2UA5
1n0 2GY9
1n0
1n0 2GY7
2GY8
1n0
1n0 2GY5
2GY6
10n 2GY4
1n0
1n0 2GY3
10n 2GY2
100n
2GY1
1u0 2UA3 RES
100p
2UA2
16V
2UA4
100u
100n
2UAT
1u0 2UAB RES
2UAA
100n
2UAU RES
FUAH
FUAF
AMBI-POWER
100p
5
100p
2UAL
10K
3UAS
+12V
4K7
4K7
RES 4 3UAP-4 5
RES 3 3UAP-3 6
4K7
4K7 RES 3UAP-2 2 7
RES 3UAP-1 1 8
4K7
4K7 RES 3UAN-4 5 4
4K7
RES 3UAN-3 3 6
10K
3UAT-3
10K
1u0
5 6 7 8 6UAC
PDZ15B(COL)
1 2 3
3u0
AMBILIGHT 3-SIDED PROTECTION
2UA1
2UAP
22K
22K
3UG0-1
RES
+3V3-STANDBY
3UG0-2
+3V3-STANDBY
AMBI-POWER
5UAA IUAT
+3V3
FUAT
S1D
IUAS
+12Vb
T 3.0A 32V
6UAB
22u 16V
IUA1
7UAB BC847BW 2
1u0
1UA1
1
6UAD
+3V3-WIFI
330u 6.3V
RES 2UAV
9UA1-1 9UA1-2 9UA1-3 9UA1-4
FUAG
7UAC SI4778DY-GE3
PDZ15B(COL)
3 IUAR
10K
T 3.0A 32V +12V
3UAT-2
+12Va
4
12K 1%
IUA0
+3V3-WIFI B230LA-M3
3UAT-4
GND-AL
IUAN 100R
3UAV-2
1UA0
0R1
3UAW
3UAY
IUAP
REF 6UAF
2UAM
100p
IUAV
3UAV-4
2UAK
240R 1%
12K 1%
2UAN
3
T 2.0A 63V FOR DUAL SIDE AL ONLY
1u0
2UF8
22n
2UF7
2UF6
3UAR
1UA2 +12VAL
FUAP
12K 1%
IUFR
4
IUAJ
10K
BP
COM
6 3UAT-1
OUT
EN
3K3 1%
IN
+3V3-STANDBY
+12VAL 4 BC857BS(COL) 7UAA-2
1 BC857BS(COL) 7UAA-1
2
3UAV-1
3
FUAU
5
AMBI-POWER
IUAL
IUAK
1%
12K 1%
FUA0
4K7 3UA6
1
3UAV-3
R
3UA5
7UF8 RT9193-33GB
4K7
1 RES RES RES RES
2 A
7UAF TS2431
9UA2-1 9UA2-2 9UA2-3 9UA2-4
RES
1u0
3
6.3V 330u 2UA0
K
2UA9 RES
RES 2 3UAN-2 7
+12VAL
+22V
+12VAL
+12VAL
RES 3UAN-1 1 8
GND-AL
+3V5-STANDBY
IUF0
3UA8
5
7UA2 RES PMV31XN
IUA2 RES
3 IUF6
100K
CUA0
ENABLE+1V5+1V1 3UAH
1 2
+12VAL
IUFP
IUFS
4 IUFT
5
6
22K
IUFU DETECT12V
3UG9
3
GND-AL
VIN
VOUT
EN FLG RSET PG
9 10
AMBI-POWER
8 7
CSS GND
+3V3 10K
100n
3UG2
2UAW
IUF3
1K8
2
3UGA
7UF7-1 BC847BPN(COL) 1
100n
STANDBY
2UAS
1X15 REF EMC HOLE
GND-AL
7UAD SIP32429DN-GE4
optional 2UAR
22K
3UG0-4
22K
3UG0-3
1R0
RES 3UAC
220K
100n RES 3UAB
7UA3 BC847BW
RES
10K 10K
3UAK
STANDBYn
2UAD
IUA3 3UA9
GND-AL
1u0
IUAM
47K
RES 9UA0
4 BC847BPN(COL) 7UF7-2
10K
3UA7 10K
RES
3UAL
IUF1
6 11
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
7 100R 6 100R 8 100R 5 100R 100R 100R
2 3GY1-2 3GY1-3 3 1 3GY1-1 3GY1-4 4 3GY5 3GY6
22K
3UAF-3
6
BL-I-CTRL
FUA1
2UF9
CUA1
BL-SPI-CS_BL-I-CTRL 1M90
2
10-1-1
1u0
10.1
GND-AL GND-AL
GND-AL
GND-AL
4
Power connector
2012-11-22
3104 313 6612 19370_127_130227.eps 130227
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Circuit Diagrams and PWB Layouts
10.
EN 60
B01B, Fusion supply
B01B
Fusion supply
B01B
5UC1
IUC0
+12Va 2 3 4 10 5 6 7 8
22u
2UCC
+12Va
IUC1
IUC2
3UC0
1
7UC2 SI4778DY-GE3 RES
4
9
1 2 3
22u
2UCA
30R 22u 2UCB
10R
7UC4 AON7932 5 6 7
10u
2K2
2UCE
7UC0 RT8228DGQW
2UCF
1%
EN
MODE
2u0 5UC0
IUC8
4
10R
10R
FUC0 +1V1-FD
2u0
2 8
22u
3
22u 2UCY
FB
3R3
100n
4
2UCW
CS
1n0
1n0
5UC2
220u 2.5V
LGATE
IUCB
3UC8
2UCL
TON PGOOD
IUC7
22u
PHASE
2UCH
2UCK RES
UGATE
IUC6
22u
13 11
10
GND GND_HS 15
150K
3UCA
ENABLE+1V5+1V1
IUCA
LTST-C190CKT
1n0
2K2
NC
5
17
+5V
BOOT
2UCJ RES
IUCP 14 12
6UC0 DBG
3UC3-4
2UC1
7
VCC 1 6 9 16 3UC9 DBG
5
6 3
10R
3UC3-3
2 3UC3-2 7
10R
7UC3 SI4172DY-GE3 RES
4
1 3UC3-1 8
IUC5
B340A-M3
5 6 7 8
6UC2
220p
PDZ5.6B(COL)
6UC1 10u
2UCD IUC3
1 2 3
270K 5%
3UC7
3UC2
1R0 IUC4
2UCP
RES 3UC4
7UC1 BC847BW
3R3
3UC1
8 +5V
2UCR RES
GND-1V1F
CORE VOLTAGE SUPPLY FUSION GND-1V1F
GND-1V1F RES 2UCM
GND-1V1F
3UCG
DVS1
22p 3UCB
IUC9
22K 1% 22K 1%
120K 1% 3UCF
3UCE
220K 1%
1M0
3UCN
3UCR RES
12K 1%
180K 1% 3UCP
10-1-2
QFU1.2E LA
3UCC 10R 3UCD RES
FUC1
SENSE+1V1-FD
+1V1-FD
10R 2UCN 1u0
GND-1V1F
GND-1V1F
GND-1V1F
4
Fusion supply
2012-11-22
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Circuit Diagrams and PWB Layouts
10.
EN 61
B01C, LNB supply
LNB supply
B01C
+12V
1UP1 T
+12V-DVBS
3.0A 32V
30R
100n 5UP6
+12V-DVBS
2UPL RES
10u
10u 25V
10u RES 2UPM
10u 2UPE
5UP5
7UP2 LNBH25LPQ
100n 2UPD
2UPC
IUPJ
17 VCC IUPF
3UPE
IUP2 9
VIA
ISEL
GND_HS
RS1D 47u 25V
IUPE
25
GND
PGND
22K
6UP5
DSQIN
2UPG
NC 22
F22-DISECQ-TX
1 5 10 11 12 13 14 24 26 27 28 29 30 31 32 33
B230LA-M3
DSQ
1u0
47R
SDA
+V-LNB
6UP6
8
FUPA
2UPH
47R
SCL
20
470n
47u 25V
3UPD
VOUT
21
2UPF
SDA-FE
7
ADDR
16
B230LA-M3
SCL-FE
3UPB
VUP
2UPJ
6UP4
VBYP 6
IUP4 +V-LNB
3
220n
LX
2UPK
Φ
4
B01C
2 15 18 19 23
10-1-3
QFU1.2E LA
4
LNB supply
2012-11-22
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Circuit Diagrams and PWB Layouts
10.
EN 62
B01D, USB internal
USB internal
B01D
9EHE-1 RES 9EHE-2 RES 9EHE-3 RES 9EHE-4 RES
10u
2EHL
B01D
7EH2 RT9187GSP
IEH3
9
6
10
100u 6.3V
RES 2EHY
3EHY
1M0 1M0
10u
2EHM
NC VIA GND GND HS
5 7
3EM1
BP|ADJ
33K 1%
EN
+3V3-LAN
10K 1%
8
3 4
VOUT
3EHW
+3V5-STANDBY
VIN
3EM0
1 2
ENABLE-WOLAN
7EH4 RES TPS61200DRCG4
10K 6 7 24
3EM7 10K
12 13 20
3EM8 10K
15 16 19
3EM9 10K
RESET-FUSION-OUTn 3EM3 3EM4
10K
IEM2
680R
3EM5
DD4DD4+ OVR4 VREG RESET SELFPWR GANG RREF
22u
22u 2EHT RES
RES 2EHS
9EM3 120K 1%
+3V3
18
100K
RES 3EHP
IEHJ 47K
2EHN RES 9EH8-1 RES 9EH8-2 RES 9EH8-3 RES 9EH8-4
3EHV
3EHJ
10n
cEH0
3EHT RES
21 VCC_D
27
5 VCC_A_1 9 VCC_A_2 14 VCC_A_3
TEST|SCL
IEH6
100n
+3V3-LAN
26
RES
100n
1C31 VIA1 VIA2 VIA3 VIA4
30 31 32 33
FEH1 FEH2 FEH3 FEH4 FEH5
USB-WIFI-DM USB-WIFI-DP IRQ-WOLANn
8
7
1 2 3 4 5 6
A1253WRA RES 3EHN +3V3-LAN
100n
2EM2
+3V3
DD3DD3+ OVR3
USB1-DM USB1-DP
2EHJ
29
+3V3
28 17 IEM1 22 23 8
SDA
DD2DD2+ OVR2
1 2
7EHJ BC847BW
22K
IEH5
DD+
DD1DD1+ OVR1
RES
RES
3EM6
USB-CAM-DM USB-CAM-DP
XOUT
3EHU
2EHW
3 4 25
USB-WIFI-DM USB-WIFI-DP
XIN
GND_HS
11
18p
VCC
10
IEH4
100K
1EM0
7EM1 CY7C65632-28LTXCT
2EM1
+3V3
12 13
47n
18p
+3V3
L
2EHV
100n IEH1
10
2EH9
2EM0
+3V3
FB
UVLO
IEH0
1
+3V5-STANDBY
100n
100n 2EM7
100n 2EM6
100n 2EM5
2EM4
100n
2EM3
+3V3
+3V3
EN
9
4u7
3
VAUX
22K 1%
IEH2
PS
2
330K 3EHR
RES 5EH0 1n0
2EHU RES
7
VOUT
RES
6
VIN
3EHS
22u
RES 2EHR
8
RES
5
+3V3-WIFI
22K
USB-WIFI-DP
GND_HS VIA
9EM2
PGND
USB1-DP
11
USB-WIFI-DM
GND
USB1-DM
4
reserved 9EM1
12M
10-1-4
QFU1.2E LA
10K RES 2EHP 100n 1C30 USB-CAM-DM USB-CAM-DP
+5V
FEH6 FEH7 FEH8 FEH9 7
6
1 2 3 4 5
A1253WRA
4
USB internal
2012-11-22
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Circuit Diagrams and PWB Layouts
10.
EN 63
B01E, Miscellaneous
Miscellaneous
B01E
3TA2
RES
10R
FTA4
FTA6
RES 2TA1
10R
10p
FTA3
SDA-SRF
FTA2
3TA1 RES
RES 1T71
10p RES 2TA2
FTA1
SCL-SRF
1 2 3 4
A1253WRA
RES 5TA1 FTA5
RES 5TA2 +12V
ITA1
30R
TEMPERATURE SENSOR
5TA3 +3V3-STANDBY
1u0
30R
RES 2TA3
+3V3
T 1.0A 63V
B01E
RES 1TA1
10-1-5
QFU1.2E LA
30R
4
Miscellaneous
2012-11-22
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Circuit Diagrams and PWB Layouts
10.
EN 64
B02A, Hybrid T/C tuner
B02A
Hybrid T/C tuner
B02A
22u 16V
30R
2FA5
5FA1
VCC-TUNER
100n
100R 30R
2FA9
100R
10p 5FA4 330n
3FA4 47R
5FA5
14
A3.3V IF1_P IF1_N AGC1 NC1 NC2 IF2_P IF2_N AGC2 I2C_SCL I2C_SDA 12
330n
10p
3FA3 47R
FFA3
2FAB
SOC-IF-N SOC-IF-P
1 2 3 4 5 6 7 8 9 10 11
FFA2
10p 3FA2
10p 2FAC
30R 5FA6
FFA9
2FAA
3FA1
5FA7
FFA6 FFA7
TUNER
BM03B-SRSS-TBT SDA-FE SCL-FE
16
10p
2FA7
1F00 SUT-RE214Z 15
4
13
5
1 2 3
2FA8
1FA0 DBG
FFAA
FFA8
FFA4
1n0
2FA3
1 FFAD
3KA3
IF-AGC-DVBT2
10p
3KA5
22K
3FAD
2K7
10p
6K8 IFA6
2FAE
100R
3FA9
FFAC
7KA0 PDTA114EU RES VCC-TUNER
6
3
IFA3 5
2
7FA1-2 BC857BS(COL) 4 IFA4 3FAC
10K
3FAB
IFA5
470R
7FA1-1 BC857BS(COL) 1
3FAA
AGC-SWITCH
RES 3FA7
FFA5
100R
SOC-IF-AGC
22n
RES 3KA4
2FAF FFAB
RES 3FA8
IF-AGC-DVBT2
2FAD
100R
RES 3KA2
100n
10u 2FA2
10p
VCC-TUNER
2FAH
OUT
2K7
IN
COM 2FA1
RES
2FA0
30R
5KA0 330n
47R
470R
+5V
FFAE
330n
3KA1
6K8
3
5KA1
3KA0 47R
2FAG
IFAA
5FAA
IF-N-DVBT2 IF-P-DVBT2 2 4
10p
7FAA LD1117S33
330u 6.3V
10-1-6
QFU1.2E LA
VCC-TUNER
4
Hybrid T/C tuner
2012-11-22
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Circuit Diagrams and PWB Layouts
10.
EN 65
B02B, Satellite tuner
Satellite tuner
B02B
IRB1
3RB3 4R7
*
*
*
68p
*
10u 2RBV
2RBU
100n
100n 2RB6
1n0 2RB5
1n0 2RB4
1n0 2RB3
2RB2
10n
2RBK
22u
2RBL
IRB0 9RB9
2RB7
*
+3V3-DVBS
4n7
B02B
2RBE
7
33N
9RB6
25
JUMP
9RB7
25
JUMP
2RB7
27
10U
2RBU
27
4N7
X
X X
-
2RBV
27
68P
X -
9RB9
27
JUMP
X
-
3RB3
27
4R7
X
2K2
X
X X
FRB0
+V-LNB
NC
VIA
RF_IN
* *
2RB1
GND RF LNA LT MIX DIG BB VCO 5 3 9 10 15 17 25 26
27p
*
*
DVBS-QP DVBS-QN 10p
34 35 36 37 38 39 40 41 42
8 100R
10p
7
DVBS-IP DVBS-IN
10p
2 3RB1-2
5 100R
2RBS
AS
21 20
4 6 3RB1-4 100R 1 7 3RB1-1 100R
2RBR
RF_OUT
3 3RB1-3
10p
I2C-ADDRESS : C6
AGC
XTAL
2RBP
QP QN
1K0
2RBN
SATELLITE TUNER
3RB0
100p
10p
SCL SDA
18 19
2RB8
10p
XTAL_CMD
IP IN
Φ
32
10p
XTAL_OUT
SYN HS 2 9 33
9RB7
2RBW
-
SYN
XTAL_IN
9RB6
27P
4
28
27p 2RBY
4,5
*
1 2 3 4 5
6 7 8 9 10
2RBM
9RB8
2RB1
X
1R01
0p56
27P
-
27n
4,5
23 24
+3V3-DVBS
RES 2RBG
2RBM
X
100p
X
5RB0
-
1n0 2RBH
100P JUMP
SM15T 2RBJ
4,5 4,5
47p 6RB0
2RBY 9RB8
16
9RB0 RES
VCO
2RBC
Position Nr Affected Pin Default Value STV6110 STV6111
2
27
2RBB
2RBD 3n3
22
10p
RES 10p
14
MIX DIG BB VSS
2RBA
12 13
11
33n
2RK1 DVBS-AGC
1
100p
Diversity Matrix (Satellite Tuner dependant)
31
10p
RES 10p
8
2RB9
2RK0 SCL-S-TUNER SDA-S-TUNER
1
6
LNA LT 30
2RBW
1RB0 16M 2RBF
7RB0 STV6110AT 2 NC 4 NX3225JB
3
10p
RES 2RBT
10-1-7
QFU1.2E LA
* * +3V3-DVBS
4
Satellite tuner
2012-11-22
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Circuit Diagrams and PWB Layouts
10.
EN 66
B02C, DVBT2 channel decoder
B02C
DVBT2 channel decoder
B02C
+3V3-DVBT2-D
+1V2-DVBT2-P
DKC0 IKC4 3KC7 2KCJ 100n 3KC8 3K3
TAINP TAINM
48
10K IKC5 3KC9
1 47 2
IKC6
46 45
RFAIN
GPIO0 GPIO1 GPIO2
I2C ADDRESS = 0XD8
SCL SDA
TIFAGC
TTUSCL TTUSDA
3K3
25
DKC1
26
29
RESET-FUSION-OUTn
30 5KC8
+3V3-DVBT2-D IKCB
30R
33 40
SLVADR0
VIA
OSCEN_X
RST_X
SLVADR3
NC1 NC2
100n
100n
TS-CHDEC-CLK TS-CHDEC-VALID TS-CHDEC-SOP
3 3KC0-3 47R
TS-CHDEC-DATA
SENSE+1V1-DVBT2
+1V2-DVBT2-C
5KCA
IKC8
+1V2-FE RES 5KC5 VCC-TUNER 3KC2 47R
SCL-FE SDA-FE
3KC3 47R
50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74
+1V2-DVBT2-C 30R RES 5KC7
IKC7 +3V3-DVBT2-D
+1V1-DVBT2 30R
30R 5KC6 +3V3 30R
+1V2-DVBT2-C
3KCE
IKC9 +1V2-DVBT2-P
22R
7KC0
GND_HS
+1V1-DVBT2
FKC1
CXD2834
+1V2
GAIA3
+1V1
RES
2KCL
VSS 6 11 18 23 27 31 36 39 43
RES
TESTMODE
1 3KC0-1 47R
49
24
7
8 9 12 13 14 15 16 17 20 21
6p8 47R 8 2 3KC0-2 47R 6
1u0
41
IF-AGC-DVBT2
0 1 2 3 TSDATA 4 5 6 7
5 4 3
2KCR
38 37
2KC0
100n
30R 2KC1 32
100n 7 19 42
100n 2KC2
100n
2KC3
2KC5
3KCB
1K0
10n
XTALO
47R
3KC6 RES
34
3KC1
10u
47R IKC3
2KCG
+3V3-DVBT2-D
100n 2KC4
2KC6
100n
3KCA
47p
4u7
35
1K0 IKC2
47p 2KCF 100n
IKC1
RES 2KCK
DVDD PVDD TSCLK TSVALID TSSYNC
CVDD XTALI
2KCS
100n
12p
NC 2 1KC0 3KC4
IKC0
2KCD 2KCE
9KC0 9KC1 5KC1
AGC-SWITCH
4
7KC0 CXD2834ER
1u0
4u7 IF-P-DVBT2 IF-N-DVBT2
1
2KCP
5KC0
3
IKCA
10 22 28 44
41M
2KCB
12p
2KCC
100n
2KC7
5KC9
+1V2-DVBT2-C
2KCH
10-1-8
QFU1.2E LA
4
DVBT2 channel decoder
2012-11-22
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Circuit Diagrams and PWB Layouts
10.
EN 67
B02D, DVBS/S2 channel decoder
DVBS/S2 channel decoder
B02D
+3V3-DEMOD
2RDR
1
100n 10K
+3V3-DEMOD
31 3
RESET-FUSION-OUTn 9RD3
AGC-SWITCH
DVBS-QP DVBS-QN DVBS-IN DVBS-IP 5RDB
2RD7 100n 2RDA 100n 3RD2
9RD2
IF-AGC-DVBT2
IRDB
2RDH 100n
+3V3-DEMOD
9RD0 9RD1
IF-P-DVBT2 IF-N-DVBT2
DRD1
3RD3 10K
2RDF 100n
SDA-S-TUNER SCL-S-TUNER
1 2 29 30
DRD0
10K
DVBS-AGC 22u
2RDS
30R
43 37 38 39 40
2RD8 100n 2RD9 100n
41 42
2RDG 100n
3RD4
3RD5
47R
IRD5 IRD6
45 46
IRD3
4 5 6
47R +V-LNB
4K7
4K7
3RD9 1K0
8 21 27 47
RESETB GPIO_0|JTAG_TMS ADDR
TS_SYNC TS_VAL TS_ERR|GPIO_1 TS_CLK TS_DATA0|TS_SER TS_DATA1 TS_DATA2 TS_DATA3 TS_DATA4 TS_DATA5 TS_DATA6 TS_DATA7
RSSI_ADC S_ADC_IP S_ADC_IN S_ADC_QP S_ADC_QN MP_A MP_B MP_C MP_D
100n
2RD6
36 VDD_VANA
2RD4 7 20 28 48
CLK_IN_OUT
SDA_HOST SCL_HOST
TC_ADC_P TC_ADC_N VIA
SDA_MAST SCL_MAST DISEQC_CMD DISEQC_IN DISEQC_OUT
13 12 26 14
3RD0-2 2 3RD0-1 1
15 16 17 18 19 23 24 25
3RD0-3 3
11 10
3RD1
7 8 47R
TS-DVBS-SOP TS-DVBS-VALID
6
TS-DVBS-DATA
47R 47R
TS-DVBS-CLK
47R
IRD0 3RD8 IRD1 47R
3RD7
SDA-FE SCL-FE
47R 50 51 52 53 54 55 56 57 58
GND1|JTAG_TCLK GND2|JTAG_TDI GND3|JTAG_TDO GND4|JTAG_TRSTB GND5 35
10n
2RDN
2RDM
30R
3RDB RES
+3V3-ANA
+3V3-DVBS
2RDT 100p
F22-DISECQ-TX
IRDC
3RDA RES
5RDC
XTA_O
2RD5
100n
2RDB 3RD6
XTAL
VDD_VCORE XTA_I|CLK_IN
9 VDD_VIO 22
10p
44
34
+3V3-DVBS
100n
100n 2RD3
100n 2RD2
100n 2RD1
22u 2RD0
22u 2RDL
RES 2RDJ
32
+3V3-DVBS
COM 100n
RES 2RDD
FRDA
33
6p8
30R
2 4
OUT
7RD0 SI2169-A10-GM
GND_HS 49
IN
16V
3
22u
IRDA
22u
5RDA +5V
4 3
16M
RES 2RDE
7RDA LD1117S33
NC
10p
2 1
22u RES 2RDK
30R 1RD0 NX3225JB
100n
+3V3-ANA
IRD2
5RDD +1V2-FE
RES 2RDC
B02D
2RDP
10-1-9
QFU1.2E LA
+3V3-DEMOD
4
DVBS/S2 channel decoder
2012-11-22
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Circuit Diagrams and PWB Layouts
10.
EN 68
B03A, Fusion
B03A
Fusion
B03A
7J00-6 FUSION240
FRA5 FRA6 FRA7 FRA8 CA-OEn
FRA10 FRA11 FRA12 NAND-CLE NAND-ALE
FRD0_PODD0 FRD1_PODD1 FRD2_PODD2 FRD3_PODD3 FRD4_PODD4 FRD5_PODD5 FRD6_PODD6 FRD7_PODD7 FRD8_PODA0 FRD9_PODA1 FRD10_PODA2 FRD11_PODA3 FRD12_PODA10 FRD13_PODA11 FRD14_PODA12 FRD15_PODA13
PODA4 PODA5 POD_A7 POD_A8 POD_A9 PODIREQ PODRST PODVS1 PODWAIT POD_DIR PODCE1 PODCE2 PODCD1 POD_CD2
POD_VCC_EN POD_VPP_EN FRA0_AD0 FRA1_PODWE FRA2_PODIORD HPD FRA3_PODIOWR FRA4_PODREG FRA5_AD1 GPIO0 FRA6_AD2 GPIO1 FRA7_AD3 GPIO2 FRA8_AD4 GPIO3 FRA9_PODOE GPIO4 FRA10_AD5 GPIO5 FRA11_AD6 GPIO6 FRA12_AD7 GPIO7 GPIO8 FRA13_CLE GPIO9 FRA14_ALE GPIO10 FRA15_PODA14 GPIO11
7J00-7 FUSION240 AJ22 AH22 AF22 AJ23 AH23
CA-A04 CA-A05 CA-A07 CA-A08 CA-A09
AE27 AG30 AF30 AE28 AE30
CA-RDY CA-RST CA-VS1n CA-WAITn
FJ16
AD28 AD27 AF29 AD30
CA-CE1n CA-CE2n CA-CD1n CA-CD2n
TS_TSB_MCU
CA-MDO0 CA-MDO1 CA-MDO2 CA-MDO3 CA-MDO4 CA-MDO5 CA-MDO6 CA-MDO7
AG20 AH20 AJ20 AK20 AE21 AF21 AG21 AH21
CA-MOCLK CA-MOSTRT CA-MOVAL
AJ21 AK21 AE22
TS-CHDEC-DATA TS-CHDEC-CLK TS-CHDEC-SOP TS-CHDEC-VALID IF-IN-P
U28 U29 U30 T26
AE29 AD29
R30 B7 B10 C10 C9 B9 B8 A7 B11 A11 A10 C11 A9
GPIO0 GPIO1 GPIO2 GPIO3
IF-IN-N
2FZ1
F-OEn F-WEn F-CEn TS-DVBS-DATA TS-DVBS-VALID TS-DVBS-SOP TS-DVBS-CLK CA-A06
F-RDY
AK29 AK24 AJ24 AE26 AF23 AK28 AH24 AG22 AG23
FOE FWE BOOTCS FCE2N FINT1 FINT2 FCLK FAVD_PODA6 FREADY
GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24
A13 C12 D12 C13 E10 D11 E11 B12 A12 B13 D10
2FZ2
GPIO5 GPIO6 GPIO7 GPIO8
2J10
3FZ1
GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24
100n 2FZ3
100n
E28 E27
2FZ4
18p
GPIO11
33R
F30 F29
10p
H30
2 4
2J11 18p
RESET-STANDBYn
H29
J26
TEST-CON TEST-MOD
P30 P29
ENABLE-STANDBY
H25
SPI-EN SF-SDI SF-SDO SF-WP SF-HOLDn SF-CS SF-CLK
K28 L28 L26 K30 L27 L29 L30
0 1 2 3 TS2OD 4 5 6 7
0 1 2 3 TS1D 4 5 6 7
TS2OCLK TS2OSYNC TS2ODEN
TS1CLK TS1SYNC TS1DEN
TAGCO_IF TAGCO_RF
AH18 AJ18 AK18 AE19 AF19 AG19 AH19 AJ19
MDI0 MDI1 MDI2 MDI3 MDI4 MDI5 MDI6 MDI7
AK19 AE20 AF20
MICLK MISTRT MIVAL
2FZ5
TSSDI TSSCLK TSSSYNC TSSDEN
10p
RES 2FZ6 47p
1
CA-A14
AG29 AD26 AH29 AJ29 AF28 AH30 AG28 AJ30 AJ28 AJ27 AF27 AG27 AG24 AE23 AK22 AJ26
FLASH_CI_GPIO
3
FRA0 CA-WEn CA-IORDn CA-IOWRn CA-REGn
AK23 AF26 AE24 AK25 AH25 AH27 AK27 AJ25 AF25 AG26 AK26 AG25 AE25 AH26 AH28 AF24
24M
CA-D00 CA-D01 CA-D02 CA-D03 CA-D04 CA-D05 CA-D06 CA-D07 CA-A00 CA-A01 CA-A02 CA-A03 CA-A10 CA-A11 CA-A12 CA-A13
1J00
10-1-10
QFU1.2E LA
P IN N P PD N
XTLI24M XTLO24M
RSTN
TESTCON TESTMOD STB_EN
SPI_EN SFSI SFSO SFWPN SFHOLDN SFCES SFSCK
DGPIO1 DGPIO2
0 1 2 3 4 STB_GP 5 6 7 8 9 10 STB_RXD STB_TXD STB_SDA STB_SCL LED IR KYBRD LGSEN CEC PWRON AVLINK
1 2
PCVS PCHS STB_RSTO HP_DETECT MUTE
F27 G26
3FZ0
4n7
SOC-IF-AGC
100R
FJ10
T28 T29
M27 M26 M25 N30 N29 N28 N27 N26 N25 P25 P26
STB-GP0 STB-GP1 STB-GP2 STB-GP3 STB-GP4 STB-GP5 STB-GP6 STB-GP7 STB-GP8 STB-GP9 STB-GP10
R28 R27 P27 P28
STB-RXD STB-TXD STB-SDA STB-SCL
J25 M29 J30 M30 M28 R29
LED IR KYBRD LGSEN HDMI-CEC PWRON
K25 K26
AVLINK1 AMBI-TEMP-FUS
J27 J28 J29
STB-RSTO
K27
HP-DETECT
H26
AUDIO-MUTEn
4
Fusion
2012-11-22
3104 313 6612 19370_136_130227.eps 130227
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 69
B03B, Fusion Umac controller
Fusion Umac controller
240R 3J00
FJ01
MM0ANA
AE11 AE12 AE7 AD18
0 MM0VREF 1 MZQ0 MM0ANA_TEST
MM1CK
P N
0 1 MZQ1 MM1ANA_TEST DDR_RETN MM1VREF
L2 F2 H1 H3 F3 H5 F5 H2 G3 F4 K5 G1 L1 G5 F1 K2
M1-MA0 M1-MA1 M1-MA2 M1-MA3 M1-MA4 M1-MA5 M1-MA6 M1-MA7 M1-MA8 M1-MA9 M1-MA10 M1-MA11 M1-MA12 M1-MA13 M1-MA14 M1-MA15
M1 J5 K1 L3 M3 N2 K3 N1 H4 J4
M1-BA0 M1-BA1 M1-BA2 M1-CAS# M1-RAS# M1-WE# M1-CKE M1-ODT M1-RESET# M1-CS#
J1 J2
M1-MCLK0 M1-MCLK0#
U7 U6 T7 E1 AA7
M1-MVREF1 240R
FJ04
M1-MVREF1
1% 3J01
MM1ANA
MM0ANA
+1V5-M1
2J04
2J05
100n
1K0
3J06
1%
P MM0CK N
0 MM1BA 1 2 MM1CASN MM1RASN MM1WEN MM1CKE MM1ODT MM1RESETN MM1CSN
M1-DQS0 M1-DQS#0 M1-DQS1 M1-DQS#1 M1-DQS2 M1-DQS#2 M1-DQS3 M1-DQS#3
100n
M0-MVREF0
0 1 MM0BA 2 MM0CASN MM0RASN MM0WEN MM0CKE MM0ODT MM0RESETN MM0CSN
0 1 2 3 4 5 6 7 MM1A 8 9 10 11 12 13 14 15
DB46 DB47
2J03
AK14 AJ14
0 1 2 3 4 5 6 7 MM0A 8 9 10 11 12 13 14 15
T2 T3 N3 N4 AA3 AA2 V4 V3
100n
M0-MCLK0 M0-MCLK0#
MM0DQS3
M1-DQM0 M1-DQM1 M1-DQM2 M1-DQM3
1K0
AG12 AF14 AK13 AH12 AF12 AF11 AH13 AG11 AG15 AG14
MM0DQS2
T1 P3 AA1 W3
3J03
M0-BA0 M0-BA1 M0-BA2 M0-CAS# M0-RAS# M0-WE# M0-CKE M0-ODT M0-RESET# M0-CS#
MM0DQS1
P N P MM1DQS1 N P MM1DQS2 N P MM1DQS3 N MM1DQS0
DB75
1K0
M0-MVREF0
AJ12 AJ17 AK15 AH15 AH17 AF15 AF17 AJ15 AH16 AG17 AF13 AK16 AK12 AF16 AK17 AJ13
MM0DQS0
DB76
3J04
FJ05
M0-MA0 M0-MA1 M0-MA2 M0-MA3 M0-MA4 M0-MA5 M0-MA6 M0-MA7 M0-MA8 M0-MA9 M0-MA10 M0-MA11 M0-MA12 M0-MA13 M0-MA14 M0-MA15
P N P N P N P N
0 1 2 3
DB77
MM1ANA
FJ02
DB73
FJ03
2J02
1K0
3J05
2J06
+1V5-M0
AK7 AK6 AJ10 AK10 AF2 AF1 AH4 AG4
DB14 DB16
MM1DM
DB78
100n
M0-DQS0 M0-DQS#0 M0-DQS1 M0-DQS#1 M0-DQS2 M0-DQS#2 M0-DQS3 M0-DQS#3
0 1 MM0DM 2 3
DB79
M1-MD0 M1-MD1 M1-MD2 M1-MD3 M1-MD4 M1-MD5 M1-MD6 M1-MD7 M1-MD8 M1-MD9 M1-MD10 M1-MD11 M1-MD12 M1-MD13 M1-MD14 M1-MD15 M1-MD16 M1-MD17 M1-MD18 M1-MD19 M1-MD20 M1-MD21 M1-MD22 M1-MD23 M1-MD24 M1-MD25 M1-MD26 M1-MD27 M1-MD28 M1-MD29 M1-MD30 M1-MD31
DB80
DB85
DB81
DB86
DB82
DB87
+1V5-M1
1K0
AJ6 AK9 AE1 AH3
P2 V2 R1 V1 R3 U1 P1 U3 L5 R4 L4 P5 M5 R5 M4 P4 W1 AB1 Y3 AB3 Y1 AC2 Y2 AC1 U5 AA4 T5 Y5 U4 W5 V5 Y4
3J02
DB74
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 MM1DQ 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
2J00
DB72
DDR3 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 MM0DQ 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
100p
AH8 AH5 AH7 AJ5 AK8 AH6 AJ8 AK5 AK11 AF9 AJ11 AG9 AF10 AG8 AH10 AH9 AG1 AF3 AE3 AH1 AH2 AD3 AD1 AD2 AK4 AG3 AJ3 AK2 AK3 AJ2 AG5 AJ1
DB71
M0-DQM0 M0-DQM1 M0-DQM2 M0-DQM3
100n
B03B
7J00-8 FUSION240 M0-MD0 M0-MD1 M0-MD2 M0-MD3 M0-MD4 M0-MD5 M0-MD6 M0-MD7 M0-MD8 M0-MD9 M0-MD10 M0-MD11 M0-MD12 M0-MD13 M0-MD14 M0-MD15 M0-MD16 M0-MD17 M0-MD18 M0-MD19 M0-MD20 M0-MD21 M0-MD22 M0-MD23 M0-MD24 M0-MD25 M0-MD26 M0-MD27 M0-MD28 M0-MD29 M0-MD30 M0-MD31
2J07
B03B
100n
10-1-11
QFU1.2E LA
DDR-RTN
DB83
DB88 DB89
4
Fusion Umac controller
2012-11-22
3104 313 6612 19370_137_130227.eps 130227
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts 10-1-12
QFU1.2E LA
10.
EN 70
B03C, Umac 1 DDR3
B03C
Umac 1 DDR3
B03C +1V5-M1
3J1K
3J1J 100R
3J1R
3J1Y 100R
100R
3J2D
3J2C
3J2H
3J2G
100n
240R
DB48
100R
DB49 DB50
DB51 DB52
RAS ODT CAS CK CK CKE CS WE RESET DML DMU
H1 M8
DDR-MVREF12
DB63
NC
VSS
VSSQ
J1 J9 L1 L9
L8
DB54
DB55
J3 K1 K3 J7 K7 K9 L2 L3 T2 E7 D3
A1 A8 C1 C9 D2 E9 F1 H2 H9 VDDQ
0 1 2 3 4 5 A 6 7 8 9 10 11 12 13 14 15 BC AP
0 1 2 3 DQU 4 5 6 7 DQSU DQSU DQSL DQSL 0 1 2 3 DQL 4 5 6 7
VREFDQ VREFCA ZQ BA0 BA1 BA2
D7 C3 C8 C2 A7 A2 B8 A3
M1-MD21 M1-MD22 M1-MD23 M1-MD16 M1-MD17 M1-MD18 M1-MD19 M1-MD20
DB56
DB57
C7 B7 F3 G3
M1-DQS2 M1-DQS#2
DB58 DB59
M1-DQS3 M1-DQS#3
E3 F7 F2 F8 H3 H8 G2 H7
M1-MD28 M1-MD31 M1-MD30 M1-MD27 M1-MD26 M1-MD25 M1-MD24 M1-MD29
DB65 RAS ODT CAS CK CK CKE CS WE RESET DML DMU
NC
J1 J9 L1 L9
VSSQ
VSS
M1-MCLK0#
3J2R
M1-DQM3 M1-DQM2
100R 3J2T 100R
2J1A
100n
1K0
2J1B
1K0 10n
10n 2J1J
10n 2J1G
10n 2J1E
100n 2J1C
100n 2J21
100n 2J1Z
2J1V
DB93
DB98
DBA3
DB94
DB99
DBA4
DB95
DB01
DBA5
DB96
DBA1
DBA6
DB97
DBA2
DBA7
10n 2J1H
10n 2J1F
100n 2J1D
100n 2J20
100n 2J1W
2J1U
10n
+1V5-M1
10n 2J1K
10n
+1V5-M1
+1V5-M1
10n
DB66
FJ09
DDR-MVREF12
+1V5-M1
3J14
+1V5-M1
100n
3J2S
M2 N8 M3 DB64 DB53
M1-BA0 M1-BA1 M1-BA2 M1-RAS# M1-ODT M1-CAS# M1-MCLK0 M1-MCLK0#
3J2P
3J2Q
100R
BA0 BA1 BA2
M1-MD14 M1-MD15 M1-MD12 M1-MD11 M1-MD8 M1-MD9 M1-MD10 M1-MD13
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
DBA8
10n 2J84
100R
ZQ
E3 F7 F2 F8 H3 H8 G2 H7
VDD M1-MA0 M1-MA1 M1-MA2 M1-MA3 M1-MA4 M1-MA5 M1-MA6 M1-MA7 M1-MA8 M1-MA9 M1-MA10 M1-MA11 M1-MA12 M1-MA13 M1-MA14 M1-MA15
M1-CKE M1-CS# M1-WE# M1-RESET#
10n 2J88
100R
M1-RESET#
0 1 2 3 DQL 4 5 6 7
M1-DQS1 M1-DQS#1
100R 3J2N
M1-CKE
VREFDQ VREFCA
M1-DQS0 M1-DQS#0
DB44 DB45
3J2M
3J2L
10n 2J83
100R
E7 D3
DQSL DQSL
DB42 DB43
F3 G3
M1-DQM1 M1-DQM0
10n 2J87
M1-ODT
3J2K 100R
10n 2J82
M1-CS#
100R 3J2J
10n 2J86
100R 100R
DB92
100n 2J81
M1-WE#
3J10
100R
DQSU DQSU
DB41
C7 B7
DB40
3J15
100R
M1-CKE M1-CS# M1-WE# M1-RESET#
3J2F
100n 2J85
M1-CAS#
RES
100R 3J2E
DB91 DB39
100n 2J1T
100R
3J2B 100R
100n 2J1S
M1-RAS#
100R 3J2A
J3 K1 K3 J7 K7 K9 L2 L3 T2
DB90 DB35 DB36 DB38
100n 2J1R
100R 100R
+1V5-M1 3J29
3J28
M1-BA2
M1-BA0 M1-BA1 M1-BA2 M1-RAS# M1-ODT M1-CAS# M1-MCLK0 M1-MCLK0#
M1-MCLK0
3J27
3J26
M1-BA1
2J14
3J25 100R
100n 2J1P
100R
100R 3J24
100n 2J1Q
M1-BA0
DB62
100n 2J1N
100R
M2 N8 M3
3J23
10u 2J1M
100R
M1-MA15
L8
100R
2J22
M1-MA14
100n 2J15
3J21
3J20 3J22
10u 2J1L
100R
3J1Z 100R
10u 2J25
M1-MA13
100R 3J1W
2J24
100R
H1 M8
DDR-MVREF11
3J1V
2J27
100R
M1-MA12
DDR-MVREF11
100R
47u 16V
M1-MA11
FJ08
3J1T
3J1S 3J1U
75R
100R
DB33 DB34
100R
75R
M1-MA10
3J11
100R
3J1P
DB32
1K0
M1-MA9
100R 3J1N
3J12
M1-MA8
100R
3J16
100R
3J17
M1-MA7
1K0
3J1M
3J1L
DB31
10n
100R
10n
M1-MA6
100R
2J16
100R
100n
M1-MA5
M1-MD1 M1-MD4 M1-MD3 M1-MD6 M1-MD5 M1-MD0 M1-MD7 M1-MD2
B1 B9 D1 D8 E2 E8 F9 G1 G9
3J1H
D7 C3 C8 C2 A7 A2 B8 A3
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
100R
7J02 H5TQ2G63BFR-PBC 0 1 2 3 DQU 4 5 6 7
240R
3J1F
3J1E 3J1G
2J17
100R
100n
M1-MA4
100R
2J12
100R
2J89
M1-MA3
+1V5-M1
100n
3J1D
3J1C
3J13
100R
100R
0 1 2 3 4 5 A 6 7 8 9 10 11 12 13 14 15 BC AP
2J18
3J1A M1-MA2
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
100n 2J19
3J1B
B1 B9 D1 D8 E2 E8 F9 G1 G9
100R
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
100R
M1-MA0 M1-MA1 M1-MA2 M1-MA3 M1-MA4 M1-MA5 M1-MA6 M1-MA7 M1-MA8 M1-MA9 M1-MA10 M1-MA11 M1-MA12 M1-MA13 M1-MA14 M1-MA15
3J19
3J18 M1-MA1
VDDQ
B2 D9 G7 K2 K8 N1 N9 R1 R9
VDD M1-MA0
+1V5-M1
A1 A8 C1 C9 D2 E9 F1 H2 H9
7J01 H5TQ2G63BFR-PBC
B2 D9 G7 K2 K8 N1 N9 R1 R9
+1V5-M1
4
Umac 1 DDR3
2012-11-22
3104 313 6612 19370_138_130227.eps 130227
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts 10-1-13
QFU1.2E LA
10.
EN 71
B03D, Umac 0 DDR3
B03D
Umac 0 DDR3
B03D +1V5-M0
100R
100R 3J47
3J46 100R
3J49
3J48
3J4B
3J4A 100R
3J4D
3J4C 100R
3J4F
3J4E 100R
100R
100n
240R 1%
100n 2J29
E3 F7 F2 F8 DB69 H3 H8 DB17 G2 H7
M0-MD15 M0-MD12 M0-MD9 M0-MD10 M0-MD11 M0-MD14 M0-MD13 M0-MD8
NC
VSS
VSSQ
J1 J9 L1 L9
DB19
DB20 DB21
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
H1 M8
DDR-MVREF02
L8
DB67
DB22
M0-BA0 M0-BA1 M0-BA2 M0-RAS# M0-ODT M0-CAS# M0-MCLK0 M0-MCLK0#
DB23
M2 N8 M3 J3 K1 K3 J7 K7 K9 L2 DB24 L3 T2 E7 D3
A1 A8 C1 C9 D2 E9 F1 H2 H9 VDDQ
0 1 2 3 4 5 A 6 7 8 9 10 11 12 13 14 15 BC AP
0 1 2 3 DQU 4 5 6 7 DQSU DQSU DQSL DQSL 0 1 2 3 DQL 4 5 6 7
VREFDQ VREFCA ZQ BA0 BA1 BA2 RAS ODT CAS CK CK CKE CS WE RESET DML DMU
NC
D7 C3 C8 C2 A7 A2 B8 A3
M0-MD16 M0-MD18 M0-MD20 M0-MD23 M0-MD17 M0-MD21 M0-MD19 M0-MD22
DB25
DB26
C7 B7 F3 G3 E3 F7 F2 F8 H3 H8 G2 H7
M0-DQS2 M0-DQS#2 DB27 DB29
M0-DQS3 M0-DQS#3 M0-MD29 M0-MD28 M0-MD25 M0-MD26 M0-MD27 M0-MD30 M0-MD31 M0-MD24
DB30
DB70
J1 J9 L1 L9
VSSQ
VSS
M0-MCLK0#
3J4M
3J4L
M0-DQM3 M0-DQM2
100R 3J4P
2J2F
1K0 DBB3
DBB8
DBB4
DBB9
DBC3 DBC4
DBB5
DBC0
DBC5
DBB6
DBC1
DBC6
DBB7
DBC2
DBC7
10n
10n 2J2W
10n 2J2U
100n 2J2S
100n 2J3D
100n 2J3B
2J39
10n 2J30
+1V5-M0
+1V5-M0
10n
10n
10n 2J2V
10n 2J2T
100n 2J2R
100n 2J3E
100n 2J3C
2J3A
10n
10n 2J2P
10n 2J2Z
+1V5-M0
+1V5-M0
10n 2J2Y
3J30
1K0
FJ0B
DDR-MVREF02
10n 2J2M
2J2E
+1V5-M0
100R
100n
3J4N 100R
M0-DQS1 M0-DQS#1
DB18
M0-CKE M0-CS# M0-WE# M0-RESET#
10n 2J2K
100R 100R
DB13 DB15
3J4K
3J4J M0-CKE
M0-DQS0 M0-DQS#0
100R
100R
M0-RESET#
DML DMU
DB11 DB12
F3 G3
M0-DQM1 M0-DQM0
10n 2J2N
M0-ODT
RAS ODT CAS CK CK CKE CS WE RESET
E7 D3
C7 B7
3J4H
3J4G
10n 2J2L
M0-CS#
100n 2J2H
100R 100R
100n 2J2J
M0-WE#
DBB2
M0-CKE M0-CS# M0-WE# M0-RESET#
100n 2J38
100R
100R
100n 2J37
M0-CAS#
DB08 DBB1
100n 2J36
100R
RES
100n 2J35
M0-RAS#
3J2U
3J45
100n 2J34
100R
BA0 BA1 BA2
J3 K1 K3 J7 K7 K9 L2 L3 T2
DBA9 DB04 DB05 DB07 DBB0
100n 2J33
M0-BA2
+1V5-M0
100R
M0-BA0 M0-BA1 M0-BA2 M0-RAS# M0-ODT M0-CAS# M0-MCLK0 M0-MCLK0#
10u 2J32
100R
2J28
3J43
3J42 3J44 M0-BA1
M0-MCLK0
10u 2J31
100R
3J41 100R
10u 2J3G
M0-BA0
100R 3J40
2J3F
100R
0 1 2 3 DQL 4 5 6 7
ZQ
M2 N8 M3
3J3Z
10u 2J3J
100R
M0-MA15
L8 DB68
100R
2J3H
M0-MA14
1K0
3J3V
3J3U 3J3W
2J3K
100R
3J3T 100R
47u 16V
M0-MA13
100R 3J3S
75R
100R
DQSL DQSL
VREFDQ VREFCA
3J3R
75R
100R
M0-MA12
H1 M8
DDR-MVREF01
100R 3J3Y
M0-MA11
DDR-MVREF01
DQSU DQSU
DB10
3J31
100R
FJ0A
3J3P
1K0
M0-MA10
DB02 DB03
3J3M
3J3L 3J3N
3J32
100R
3J3K 100R
3J33
M0-MA9
100R 3J3J
3J2W
M0-MA8
100R
DB00
10n
100R
100n
3J3G M0-MA7
3J2V
3J3H
VDD M0-MA0 M0-MA1 M0-MA2 M0-MA3 M0-MA4 M0-MA5 M0-MA6 M0-MA7 M0-MA8 M0-MA9 M0-MA10 M0-MA11 M0-MA12 M0-MA13 M0-MA14 M0-MA15
B1 B9 D1 D8 E2 E8 F9 G1 G9
100R
DB61
DB09
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
3J3F
3J3E
10n
100R
3J3D 100R
2J2A
M0-MA6
100R 3J3C
100n
100R
2J2B
100R
M0-MA5
2J01
M0-MA4
M0-MD0 M0-MD5 M0-MD4 M0-MD7 M0-MD2 M0-MD1 M0-MD6 M0-MD3
240R 1%
3J3B
D7 C3 C8 C2 A7 A2 B8 A3
100n
100R 3J3A
7J04 H5TQ2G63BFR-PBC 0 1 2 3 DQU 4 5 6 7
100n
100R
2J2G
M0-MA3
+1V5-M0
3J2Z
3J39
3J38
100n 2J2D
100R
100R
0 1 2 3 4 5 A 6 7 8 9 10 11 12 13 14 15 BC AP
2J2C
3J37
3J36 M0-MA2
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
B1 B9 D1 D8 E2 E8 F9 G1 G9
100R
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
100R
M0-MA0 M0-MA1 M0-MA2 M0-MA3 M0-MA4 M0-MA5 M0-MA6 M0-MA7 M0-MA8 M0-MA9 M0-MA10 M0-MA11 M0-MA12 M0-MA13 M0-MA14 M0-MA15
3J35
3J34 M0-MA1
VDDQ
B2 D9 G7 K2 K8 N1 N9 R1 R9
VDD M0-MA0
+1V5-M0
A1 A8 C1 C9 D2 E9 F1 H2 H9
7J03 H5TQ2G63BFR-PBC
B2 D9 G7 K2 K8 N1 N9 R1 R9
+1V5-M0
4
Umac 0 DDR3
2012-11-22
3104 313 6612 19370_139_130227.eps 130227
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts 10-1-14
QFU1.2E LA
10.
EN 72
B03E, Fusion
Fusion
B03E
B03E
7J00-4 FUSION240 A22 B22 E22 D22 A23 B23 E23 D23 A24 B24 E24 D24
AR-1 AL-1
AR-3 AL-3 AR-4 AL-4
D26
SPDIFIN 3J53
SCKIN WSI2SIN SDI2SIN
10R 3J55 10R
3J54 10R
IJ10
C26 B26 A26
AC28
C15 A15 B16 A16
CVBS CVBS3
C16 Y-G1 PB-B1 PR-R1
A20 A19 A18
Y-G2 PB-B2 PR-R2
B20 B19 B18
Y-G3 PB-B3 PR-R3
C20 C19 C18
IJ12 IJ13 SC1-STATUS FB1
D20 D19 D18 C17 B17 D17 A17
AV_IN_OUT AR_1 AL_1 AR_2 AL_2 AR_3 AL_3 AR_4 AL_4 AR_5 AL_5 AR_6 AL_6
HPHOL HPHOR SUBO SPK_AOR1 SPK_AOL1 AOR2 AOL2
SPDIFIN
SPDIFO
SCKIN WSI2SIN SDI2SIN
SCKI2SOUT WSI2SOUT 1 SDI2SOUT 2 3 I2SCLK
B21 A21
HPHOL HPHOR
C21 7J00-5 FUSION240
A25 B25 D25 C25
AUD-L AUD-R
USB1-RREF
E26 Y26 Y27 AA30 AA29 AB28 Y25
GPANA1
SPDIFO 3J07 3J08 3J09 3J50 3J51 3J52
10R 10R 10R 10R 10R 10R
SCKI2SOUT WSI2SOUT SDI2SOUT1 SDI2SOUT2 SDI2SOUT3 I2SCLK
CVBS CVBS2 CVBS3 CVBS4 C Y_G1 PB_B1 PR_R1 Y_G2 PB_B2 PR_R2 Y_G3 PB_B3 PR_R3 Y_G4 PB_B4 PR_R4 FS1 FB1 FS2 FB2
1 CVBS_OUT 2
AB30 AB29 AB26 AB27
USB1-DP USB1-DM
A14 B14
CVBS-OUT1 CVBS-OUT2
USB2-RREF
AC30 AC29 AB25 AC27
EN-RXD0 EN-TXD0 EN-RXD1 EN-TXD1 FJ0F FJ0G FJ0H FJ0J
W29 V29 W28 V28 W27 V27 W26 V26
EN-RXC EN-TXC
V25 U25
USB2-DP USB2-DM
EN-RXEN EN-TXEN
W30 V30
EN-MDC EN-MDIO CVBS-OUT2
W25 Y30
PANEL_USB D1_P LAN_IO D1_N USBPPON1 TXRTUNE1 D2_P D2_N USBPPON2 TXRTUNE2
GBE_RXD0 GBE_TXD0 GBE_RXD1 GBE_TXD1 GBE_RXD2 GBE_TXD2 GBE_RXD3 GBE_TXD3 GBE_RXC GBE_TXC GBE_RXEN GBE_TXEN GBE_MDC GBE_MDIO
IJ11
HDMIF-RX0+ HDMIF-RX0HDMIF-RX1+ HDMIF-RX1HDMIF-RX2+ HDMIF-RX2HDMIF-RXC+ HDMIF-RXC-
A29 B29 A28 B28 A27 B27 B30 C30
HEAC
T27
PWR5V
T30
RREF
C29
RX0_P RX0_N RX1_P RX1_N RX2_P RX2_N RXC_P RXC_N
TX0_P TX0_N TX1_P TX1_N TX2_P TX2_N TX3_P TX3_N TX4_P TX4_N TX5_P TX5_N TX6_P TX6_N TX7_P TX7_N HTPDN LOCKN IDP_HPD
H_BK_LITE PWM0 PWM1 BOOST BKLGON TCON_ON
A2 B2
V1-TX0P V1-TX0N
C3 C2
V1-TX1P V1-TX1N
B3 A3
V1-TX2P V1-TX2N
A4 B4
V1-TX3P V1-TX3N
C5 C4
V1-TX4P V1-TX4N
B5 A5
V1-TX5P V1-TX5N
A6 B6
V1-TX6P V1-TX6N
C7 C6
V1-TX7P V1-TX7N
D4 E5 D5
A8 E4 D2 E3 D3 C8
7J00-9 FUSION240
RXD-SERVICE TXD-SERVICE
Y29 Y28
EJT-TCK EJT-TMS EJT-TDO EJT-TDI EJT-TRSTN
D14 D13 E12 E13 C14
UART_JTAG I2C SCLS RXD TXD
TCK TMS TDO TDI TRSTN
SDAS
SCLM1 SDAM1 SCLM2 SDAM2 SCLM3 SDAM3
U26 U27
AA28 AA27
SCL-M1 SDA-M1
D1 E2
SCL-M2 SDA-M2
AA26 AA25
SCL-M3 SDA-M3
V1-HTPDn V1-LOCKn 9GA2
BL-SPI-CLK-FUS 3D-LR-FUS BL-SPI-CS_BL-I-CTRL-FUS BL-DIM-FUS BL-SPI-SDO-FUS
HEAC PWR5V RREF
4
Fusion
2012-11-22
3104 313 6612 19370_140_130227.eps 130227
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 73
B03F, Fusion power supply
Fusion power supply
IJ14
IJ0L
2J7E
2J7H 10u
2J7K 10u
2J7G 10u
2J7J 10u
2J79
2J7A 100n
2J7B 100n
2J7C 100n
2J7D 100n
100n
10n
2J4G 2J96
1u0 10n
10n
2J6W
2J6Z 100n
2J70 100n
2J71 100n
2J72 100n
2J73 100n
2J74 100n
2J75 100n
2J76 100n 10n 10n
100n
10n
2J99
10n
2J77 100n
2J6N 10n
2J6M 10n
2J6Y 10n
2J6R 10n
2J6S
2J6E 10n
2J6D 10n
2J6G 10n
2J6H 10n
2J6J
2J66 10n
2J68 10n
2J69 10n
2J6A 10n
2J6P 10n
2J65 10n
2J6U 10n
K11 L11
2J6L 10n
GNDA1V1
2J6F 10n
G12 F12
2J67 10n
VDDA1V1
+2V5-F
2J6C 10n
K12 L12
IJ0P
VSS11A_3
10n
VDD33A
2J4N
GNDA2V5
VSS11A_2
5J0F 120R
5J0G
+1V1-FA
120R
2J58
2J6B
K29
VDDF1 F6 F7 2J5R
2J5S 100n
2J5T 100n
2J5U 100n
2J5V 100n
2J5W 100n
2J5Z 100n
2J60 100n
2J61 100n
2J62 100n
2J64 100n
+3V3 10u
LDO11_CAP
2J4R
1n0
10u
2J4H
IJ0N VDDA2V5
2J63 10u
10n 10u
2J54
2J53
D28
AVDD25_HDMI
+2V5-F
5J0E 120R
N24
G13 F13
IJ0K
5J0N 120R
2J55
D30 100n
120R
+3V3
IJ0J
5J0M
2J56
+2V5
C27
VQPS VSS11A_1
2J4M 10u
D27 D29
VDD11A
2J4P 10u
2J52
10n 10u
2J51
2J50
120R
100n
C28
IJ0M
2J6V 10n
IJ0H
5J0L
R11 U11 R10 U10
2J98
GNDE2V5 VSS_M1P
+1V1-FA
AC3 AD4 AD5 1u0
VDD2V5_M1P
2J4Y
F14 G14
VDDE2V5
4n7
2J4Z
100n
B1 C1
120R
VSSAC_2
IJ0G
5J0K 120R
10u 2J4W
+2V5
VSS_M0P VDD33
2J4L
AB24
VSSAC_1
2J4J
10u
100n
AC24
5J0D +2V5-F
100n
AC25 2J4V
120R
Y12 Y13 Y14 AA13 AA14
2J4F
IJ0F
5J0J
2J4U
+3V3
VDD25
100n
AC26
AD6 AD7 100n
VDD2V5_M0P
2J97
SUPPLY_2
100n
2J4T
100n
2J4S
7J00-2 FUSION240
2J7L 10u
IJ0E
5J0H 120R
10u
+2V5
10u
+1V1-FD
100n
22u
2J78
2J26
2J13
10u
100u 2.0V
VDDM0
VDDM0
VDD_1V2
10n
10n
2J93
2J5A 2J80 2J5L 10n
2J59 10u
2J5M
2J5B 10u
2J5C 100n 2J5F
10n
2J5D 100n 2J5G 10n
2J5K 10n
100n 2J5H 10n
10n
2J5N 10n
+1V5
+3V3-STANDBY 2J5Y
2J4C
2J4B 10u
+2V5-F
K15 L15
10u
2J7V
2J7P 10n
2J7Y 10n
2J23 10n
5J0C 120R
9J04
VSSA_LPLL
IJ0D E14
2J5P 10n
9J03
VDD25_LPLL
K16 L16
120R
2J4E
AVSSH AVSSH
5J0B +3V3
E15
2J4D 10u
AVDDH DAC2
VSS
2J44
2J43 10u
IJ0C
2 3 INN 4
VDDM1
2J42
2J41 10u
+3V3
INN16
100n
2J91
K17 L17
100n
E18 E19 E20
100n
2J90
2J40
10u 2J3Z
100n
E17
AVSSH AVSSH
VSS
IJ06
5J06
5J0A 120R
VSS
DAC1
5J0P 120R
VDDF_STB
VDD33_XTAL
D15 2J4A
AVDDH
2J49 10u
H28
AVSS_STB
100n
100n
IJ0B J24
100n
2J3W
AVDD33_STB
+3V3
AA19 AA18 AA17 AA16 N10 K20 K19 K18 K14 K13 AK30 A30 W24 V24 U24 P24 AD21 AD20 Y19 U19 R19 N19 L19 Y18 U18 R18 N18 L18 AE17 AD17 Y17 U17 R17 N17 AJ16 AG16 AE16 AD16 Y16 U16 R16 N16 AE15 AD15 U15 R15 N15 AH14 U14 R14 N14 L14 AG13 U13 R13 N13 L13 U12 R12 N12 AH11 N11 AG10 AJ9 AJ7 Y7 W7 V7 L7 K7 J7 Y6 W6 V6 L6 K6 J6 AA5 N5 AJ4 W4 T4 G4 J3 AG2 AE2 AB2 W2 U2 R2 M2 G2 AK1 A1
R24 R25 R26
AVSS
E21 F21
5J09 120R
VDDC
VDDF2
G22 G23
T10 AA20 AA21 Y21 W21 V21 U21 T21 R21 P21 N21 L21 K21 M21 M10 L10 K10 P14 L25 M24 L24 G21 Y20 W20 V20 U20 T20 R20 P20 N20 M20 L20 W19 V19 T19 P19 M19 W18 V18 T18 P18 M18 W17 V17 T17 P17 M17 V16 T16 P16 M16 V15 T15 P15 M15 V14 T14 M14 W13 V13 T13 P13 M13 W12 T12 M12 M11 G11 F11 G10 F10 G9 F9 E9 D9 G8 F8 E8 D8 E7 D7 E6 D6
PWR_GND
K24
120R
120R
AVDD
IJ00 SENSE+1V1-FD
T11
IJ0A
AVSSH_CH516
IJ05
5J04
100n
100n
AVDDH_CH516
+3V3
VDDF2
G15 G16
5J08 RES 120R
VDDF2
100n
10u 2J3T
2J3U
120R
IJ09 2J46
100n
10u 2J3R
B15
C22 C23 C24 E25 F22 F23 F24
2J45 10u
AVSSL_CH516
SGNDAU
120R
D21
2J48
AVDDL_CH516
+1V2-FA
100n
D16 E16
5J07
E29 F28
2J47 10u
100n
10u 2J3P
2J3Y
AVSSH_CH234
IJ04
5J03
+3V3-STANDBY
IJ08 AVDDL_DRX
F18 G18
F15 F16
+3V3
AE18 AF18 AG18 AD19 AD22 AD23 G24 H24 T24 Y24 AA24 AD24 F25 G25 T25 AD25 F26
AVDDH_CH234
E30 G27 G28 H27
120R
+1V5-M0 IJ0R
VDDC
F17 G17
AVSSH_DRX
5J05
G29 G30
100n
100n
2J3N
AVSSL_CH234
VREFAU
2J3S
120R
+3V3-STANDBY
F20 G20
IJ03
5J02
+3V3
AVDDH_DRX AVDDL_CH234
IJ02
5J01 120R
+1V2-FA
10u 2J3M
F19 G19
10u 2J3V
+3V3
IJ07
IJ01
5J00 120R
2J09 10n
SUPPLY_1 +1V2-FA
100n
7J00-1 FUSION240
B03F
SENSE+1V2-MIPS
VDDC
2J7W 100n 2J7T 10n
2J7U
2J7Z 100n 2J7S 10n
10u
2J92 100n
10n
2J94
10n
2J95
2J08
220u 2V0
120R
2J7R 10n
IJ0S
5J0R
Y10 W10 V10 P10 V12 P12 V11 P11 AC7 AB7 R7 P7 N7 M7 H7 G7 AC6 AB6 AA6 T6 R6 P6 N6 M6 H6 G6 AC5 AB5 AC4 AB4 K4
VDDC
+1V5-M1
+1V5
VDDM0
VDDM0
FUSION240
2J7F
10n
7J00-3
2J6T
+1V2-MIPS W14 W15 W16 Y15 AA15
B03F
AE4 AF4 AE5 AF5 AE6 AF6 AG6 AF7 AG7 AD8 AE8 AF8 AD9 AE9 AD10 AE10 W11 Y11 AD11 AD12 AD13 AE13 AD14 AE14 AA10 AA11 AA12
10-1-15
QFU1.2E LA
4
Fusion power supply
2012-11-22
3104 313 6612 19370_141_130227.eps 130227
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 74
B04A, Control
Control
B04A
B04A
+3V3
SDA-BE
7GM1 RES PCA9540BGD
VDD 2 1
+3V3
100K
100K
SDA-BL SCL-BL
3GM1
3GM2
3GM3 100K
3GM4 100K
6 5
3CY3-3
SDA-BE
RES 9GM1
SDA-DISP
SCL-DISP
SCL-BE
RES 9GM2
SCL-DISP
SDA-DISP
EJT-TRSTN 5
6
1
8
3CY3-2 47R 3CY3-1
47R
4
BM03B-SRSS-TBT 7
8
EJT-TDO
EJT-TCK
SDA-BE
RES 9GM3
SDA-BL
SCL-BL
SCL-BE
RES 9GM4
SCL-BL
SDA-BL
1CV3 DBG
FCVC FCVD FCVE
5
47R 3CY4
BM06B-SRSS-TBT
DBG 1 2 3
EJT-TMS
47R 2
FCY6 7
SDA-BL SCL-BL
RES
4K7
3CY2
4K7
3CY1-4 5
3 FCY1 FCY2 FCY3 FCY4 FCY5
7 8
SD1 SC1
RES
SDA-DISP SCL-DISP
1CV2 3CY3-4 47R
1 2 3 4 5 6
SCL
SDA-DISP SCL-DISP
VSS
4
DBG
4 5
SD0 SC0
SDA
4
3 4K7
4K7
4K7
3CY1-2 2
3CY1-3 6
8
3CY1-1 1
SCL-BE
1CY1
3
4K7
4K7 RES 3GM6
+3V3
RES 3GM5
+3V3
7
4
1 2 3
BM03B-SRSS-TBT
EJT-TDI 3CVF
SCL-M2
SCL-BE
FCV2 FCV1
3CVG
SDA-M2
1CV1 DBG
SCL-BE
47R SDA-BE
SDA-BE
FCV3 5
47R 3CV2
3D-LR-FUS
FCVB
4
1 2 3
BM03B-SRSS-TBT
3D-LR
47R 1CV6 1 2 3
FCY7 FCY8
4
FCY9
TXD-STANDBY RXD-STANDBY
BL-SPI-CS_BL-I-CTRL-FUS
5
3GD5
BL-SPI-CS_BL-I-CTRL
10R
BM03B-SRSS-TBT BL-DIM RESET-RF4CEn TXD-RF4CE
47R 3GM7 RES
RXD-RF4CE
+3V3 3
1
RC_IRQ-RF4CEn 3D-LED_3D-RF 7GM2 RES PDTC114EU
3CVE
10R
10R
3CVW
FCVH FCVJ
10R
3CVY
FCVK
10R
9 10
SCL-FE TXD-SERVICE SDA-FE RXD-SERVICE
10p
2
3CV8
BL-SPI-CLK-FUS
AMBI-SPI-CCLK
2CV8
4K7
FCVG
2CV9 10p
SCL-M3 TXD-STANDBY SDA-M3 RXD-STANDBY
3CVD
2CVA 10p
1CV5 DBG 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
1C27
FCVF
3CVC 10R
2CVB 10p
FCVN
3CV3
BL-DIM-FUS
2CVC 10p
10-1-16
QFU1.2E LA
1 2 3 4 5 6 7 8
FH52-8S-0.5SH
+3V3-STANDBY
10R STANDBYn TXD-RF4CE DETECT12V RXD-RF4CE LCD-PWR-ONn BL-ON RC_IRQ-RF4CEn
3CV9
BL-SPI-SDO-FUS
10R 3CVM
GPIO0
AMBI-SPI-MOSI 1CV4 DBG TXD-RF4CE
GPIO1
FCVL FCVA
47R 3CVP
TXD-RF4CE RXD-RF4CE
FCVM
RXD-RF4CE
5
47R
21 22 GPIO5
BM20B-SRDS-G-TF GPIO6
DC02
3CYC DC03
POWER-OK
POWER-OK
4
1 2 3
BM03B-SRSS-TBT
3CVU +3V3
47R
10K 3CVA
3CYB
3CVN
+3V3 10K
GPIO7
IRQ-EXPANDERn
TXD-RF4CE
47R GPIO11 GPIO15
DC06
RES
3CV4
AMBI-SPI-CCLK
RXD-RF4CE
10R RES
GPIO16
3CV5
GPIO20
+3V3-STANDBY
3CVR 10K 3CVB RES
AMBI-SPI-MOSI
10R 3CV7
RES
10K
+3V3
10K POWER-OK
47R GPIO21
GPIO23
DC07 3CVS
IRQ-EXPANDERn
47R
3D-LR
IRQ-EXPANDERn
3CVT +3V3 10K
9GM5 RES
3D-LED_3D-RF
9GM6 RES
3D-LR-DISP 4
Control
2012-11-22
3104 313 6612 19370_142_130227.eps 130227
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 75
B04B, V-by-One out
V-by-One out
B04B
V1-TX2N V1-TX2P 2GW9 100n V1-TX3N V1-TX3P 2GWB 100n V1-TX4N V1-TX4P 2GWD 100n V1-TX5N V1-TX5P 2GWF 100n V1-TX6N V1-TX6P
2GW8 100n
2GWA 100n
2GWC 100n
2GWE 100n
2GWG 100n
2GWH 100n V1-TX7N V1-TX7P
SAMSUNG
SCL-DISP
2GWJ 100n
2GR5 100n
2GR7 100n
2GR9 100n
2GRB 100n
2GRD 100n
2GRF 100n
2GRH 100n
SAMSUNG
BGV3 2GR4 100n
BGV4 BGV5
2GR6 100n
BGV6 BGV7
2GR8 100n
BGV8 BGV9
2GRA 100n
BGVA BGVB
2GRC 100n
BGVC BGVD
2GRE 100n
BGVE BGVF
2GRG 100n
BGVG
IGR3
BGVH 2GRJ 100n
BGVK
2GWM 3GW9 2GWN 3GWA
SHARP
SDA-DISP 2GWY 3GWN
GPIO2 GPIO3
RES 2GW2 1n0
GPIO8
(CTRL-DISP3)
SPLASH-ON BL-ON
3GWB 2GWP
FGR1 FGR2
RES 100R
3GWD FGR3 FGR4 FGR5 FGR6
FGR9
TO DISPLAY IGR5 IGR6
SAMSUNG
RES 3GWE 100R SHARP 3GWG 10R
IGR7
3GWF SAMSUNG 100R 3GWH 10R SHARP 3GWJ RES 100R
3D-LR-DISP
IGR4
SAMSUNG
100R
FGR7
3D-LED_3D-RF
FGR8
100R 1n0
3GWC RES
GPIO2 GPIO3 SCL-DISP SDA-DISP
GPIO8
1n0 100R
SAMSUNG
3GWP 100R
9GW2 (CTRL-DISP1) (CTRL-DISP2)
10p 10R RES 10p RES 10R RES
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
RES 3GWK 100R
SAMSUNG
IGR8 IGR9 IGRA 2GWW
2GW7 100n
2GW6 100n
9GW1
100R 2GR3 100n
BGVN BGV1 BGV2
3GW8
100n
2GW5 100n V1-TX1N V1-TX1P
2GW4 100n
9GW3-2 9GW3-3 9GW3-4
100n 100R
V1-TX0N V1-TX0P
(CTRL-DISP3)
2GWK
3GW7 2GW3 100n
(CTRL-DISP1) (CTRL-DISP2)
IGR2
SHARP
SHARP
V1-HTPDn V1-LOCKn
FGWT FGWU FGWV FGWW FGWY FGWZ
SHARP
1u0
9GW4
IGR1
SAMSUNG
BGVL BGVM
RES 2GWV 100n
FGU2 FGU3 FGU4 FGU5
100R 100R
2GWU
FGU0 FGU1
3GW4 3GW5
2GWT 10p
FGVU FGVV FGVW FGVY
100R
60 61 58 59 56 57 54 55 52 53
IGR0
9GW0 3GW3 RES
2GWS 10p
FGVS FGVT
BGVJ
2GWR 100p
FGVL FGVM FGVN FGVP FGVQ FGVR
1K0 RES
SAMSUNG
+3V3
FGU7 FGVZ FGW0 FGVE FGU9 FGUF FGWA FGU6 FGWE FGWB FGWC FGWD FGWF FGWG FGWH FGWJ FGWK FGWL FGWM FGWN FGWP FGWQ FGWR FGWS
100R RES
9GW5
10K
FGVF FGVG FGVH FGVJ FGVK
3GW1 3GW2
10K
FGVC FGVD
IGV7 IGV5 IGW1 IGW2 IGW3 IGW4 IGW5 IGW6 IGU8 IGW7 IGW8 IGW9
1G55 20519-051E
+VDISP
2GWL RES
FGV5 FGV0 FGV6 FGV7 FGV8 FGV9 FGVA FGVB
BL-DIM GPIO8 3D-LR
100p
(CTRL-DISP3)
3GW6
B04B
3GWM
10-1-17
QFU1.2E LA
3GWL 100R
4
V-by-One out
2012-11-22
3104 313 6612 19370_143_130227.eps 130227
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 76
B04C, Output Vdisp
Output Vdisp
B04C
1 9GS1-1 RES 2 9GS1-2 RES 3 9GS1-3 RES 4 9GS1-4 RES 1 9GS2-1 RES 2 9GS2-2 RES 3 9GS2-3 RES 4 9GS2-4 RES
8 7 6 FGS1
5
5
2GS5
3GS4 IGS2
47K
IGS1
3GS5 4K7
27K
7GS3-1 PUMD12 1
3GS6
6 2
100n RES
2GS2
100n
IGS5
LCD-PWR-ONn
22u
3GS1 7GS3-2 PUMD12 3
IGS4
+VDISP
3
4
2GS3 RES
FGS2
6 5 2 1
2GS1
7GS2 SI3443CDV 4
T 4.0A 32V
22n
5
RES
+12V +3V3
7 6
47R
4
1GS1
8
8 7 6 5
3 2 7GS1 1 SI4835DDY-GE3 RES
4K7
B04C
3GS3
10-1-18
QFU1.2E LA
DBG
6GS1 DBG LTST-C190KGKT
4
Output Vdisp
2012-11-22
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 77
B04D, Tuner CVBS debug
Tuner CVBS debug
B04D
470R
3FW4 RES
IFW5
RES
33p IFW3 5FW3 RES
3FW8 RES 75R
DFW1
1u8
2FW5
150R
RES
150R
RES 3FW7
IFW4
3
2FW3
270p
7FW1-1 BC847BPN(COL) RES 3FW5 RES 1
2 IFW2
RES
47u
3K3
CVBS-OUT1
2FW4
5
4 7FW1-2 BC847BPN(COL) RES
RES 2FW6
IFW1
6
100p
10K
3FW3
RES
+12V
3FW6
B04D
RES
10-1-19
QFU1.2E LA
DFW2
4
Tuner CVBS debug
2012-11-22
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2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 78
B04E, Audio - video
Audio - video
B04E 2VW1
CVBS1
150R
100n 2VW2
150R
100n 2VW3
3VWM SC1-CVBS 3VWN 3VWP 150R
CVBS
CVBS3
Y-G1
100n 2VW4
3VWR 150R
PB-B1
100n 2VW5
3VWS 150R
PR-R1
100n 2VW6
Y1-IN
150R
PB1-IN
150R
150R
100n 2VW9
150R
100n 2VWA
3VWV SC1-G 3VWB SC1-B
150R
Y-G3
PB-B3
PR-R3
100n
3VWD 150R
3VWW
SC1-BLK 3VW3
YPBPR-RIN
PR-R2
100n 2VWB
3VWC SC1-R
PB-B2
100n 2VW8
3VWU PR1-IN
Y-G2
100n 2VW7
3VWT
10K IVW1
FB1 2VWC
8K2 33K
3VW4 3VW5
YPBPR-LIN
IVW2
2VWD
8K2 33K
IVW3
2VWE
8K2 33K
IVW4
2VWF
8K2
DVW4
AUD-R
DVW5
AUD-L
DVW6
+3V3
4K7
SCKIN
3VWF
DVW3
4K7
DVW2
SPDIFIN
33K
3VWA
DVW1
WSI2SIN
AL-4
1u0
3VWG
SDI2SIN
AR-4
1u0 3VW8
3VW9
SC-LIN
AL-1
1u0 3VW6
3VW7
SC-RIN
AR-1
1u0
RES
AUDIO-MUTEn
VGA-LIN
3VWH
2VWJ
IVW7
8K2
3VWK
33K
RES 3VWJ VGA-RIN
AL-3
1u0
IVW8
2VWK
8K2
AR-3
1u0 33K
B04E
3VWL
10-1-20
QFU1.2E LA
4
Audio - video
2012-11-22
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 79
B04F, Fusion supply
Fusion supply
B04F
3
7UB1 TPS7A7001DDA
10u
2UB0
+1V5
IN
6 7
FB
3UB3
3UB4
22K 1%
220K 1% 3UB8
47K 1%
3UB7
RES 3UB6
3UB5
100K 1%
1K0
100p
3UBF
IUB4
FUB1 SENSE+1V2-MIPS
CORE VOLTAGE SUPPLY MIPS FUSION 1M0
10K 1% 3UBA RES
3UB9
+1V2-MIPS
12K 1%
DVS2 IUB5
FUB0
RES
27K 1% IUB3 2UB3
10u
9
8
GND
NC
10 11 VIA
GND_HS
OUT
1 4 5
100n
2UB6
Φ
EN
2UB4
2
5UB0
IUB6
+12Va
+1V5
2 4
SS
SW
EN VREG5
5
9
GND_HS GND
VIA
6
2UBD
22u
2UBB
1 3UBE-1 8 10R
100n 2
3
22u
RES
IUB8 7
22u 2UBA
2UBC VBST
1n0
10n 2UBH
1
VFB
3UBE-2
7
IUBC
10R
IUBA 3
3UBE-3
2UBJ
2UBK
1n0
1n0
6
10R
1u0
22K 1% 2UBE RES
IUBB
Φ
2UBF
IUB9
STEP DOWN
10 11
3UBB
470K RES 2UBG
FUB2
5UB1
8 VIN
22p
IUB7
2u0 7UB5 TPS54527DDA
+1V5
100n
2UB7
10u
10u 2UB9
2UB8
30R
22K 1% 3UBD
B04F
3UBC
10-1-21
QFU1.2E LA
4
3UBE-4
5
10R GND-1V5 GND-1V5 GND-1V5 GND-1V5
CUB0
DDR3 SUPPLY FUSION GND-1V5
ENABLE+1V5+1V1
4
Fusion supply
2012-11-22
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 80
B04G, Backlight microcontroller
B04G
Backlight microcontroller
B04G +3V3
+3V3
3GE0
3GE1
4K7
4K7
100n
100n
2GE2
1u0
RES
2GE0
+3V3 2GE1
1GE0 FGE0
TXD-LPC +3V3
RXD-LPC
RES 1K0 100n
RES
100R
FGE2
5
3GE2
3GEK
FGE1 4
1 2 DBG 3
BM03B-SRSS-TBT
+3V3
2GE3
RESET-FUSION-OUTn
LPC-RESETn
LPC-LED3
9GE2
AMBI-SPI-CCLK
AMBI-SPI-OUT-CCLK
3 4 100n
1 2
330R LTST-C190KGKT
3GEF DBG DBG
330R
3GEE DBG DBG
330R
3GEC DBG DBG
+3V3
6GE3
AMBI-SPI-CCLK-OUT
6GE2
cGE1
6GE1
+3V3 BL-DIM7
+3V3
+3V3
LTST-C190KGKT
+3V3
LTST-C190KGKT
BL-DIM5 BL-DIM6 BL-DIM8 3D-LR-DISP
330R
10R
DBG
FGE5
LPC-LED4 AMBI-SPI-OUT-CCLK
3GEA
RES
2GE5
DBG
1GE2 SKHUBHE010
3D-LR LPC-LED1 LPC-LED2
3 4
AMBI-SPI-CCLK AMBI-SPI-MOSI 3D-LED_3D-RF
9GE1 RES
DBG
3GEN
RES 100K
RES 100K
1u0 3GEM
10K
2GE6
3GEL
9GE0 RES
36 37 43 48 18 21
PIO3_0|DTR_|CT16B0_MAT0|TXD PIO1_0|R|AD1|CT32B1_CAP0 PIO3_1|DSR_|CT16B0_MAT1|RXD PIO1_1|R|AD2|CT32B1_MAT0 PIO3_2|DCD_|CT16B0_MAT2|SCK1 PIO1_2|R|AD3|CT32B1_MAT1 PIO3_3|RI_|CT16B0_CAP0 PIO1_3|SWDIO|AD4|CT32B1_MAT2 PIO3_4|CT16B0_CAP1|RXD PIO1_4|AD5|CT32B1_MAT3|WAKEUP PIO3_5|CT16B1_CAP1|TXD PIO1_5|RTS_|CT32B0_CAP0 PIO1_6|RXD|CT32B0_MAT0 PIO1_7|TXD|CT32B0_MAT1 PIO1_8|CT16B1_CAP0 PIO1_9|CT16B1_MAT0|MOSI1 PIO1_10|AD6|CT16B1_MAT1|MISO1 PIO1_11|AD7|CT32B1_CAP1 VSS
100R DBG
LTST-C190KGKT
BL-DIM RXD-LPC TXD-LPC BL-SPI-CS_BL-I-CTRL
2 13 26 38 19 20 1 11 12 24 25 31
PIO2_0|DTR_|SSEL1 PIO2_1|DSR_|SCK1 PIO2_2|DCD_|MISO1 PIO2_3|RI_|MOSI1 PIO2_4|CT16B1_MAT1|SSEL1 PIO2_5|CT32B0_MAT0 PIO2_6|CT32B0_MAT1 PIO2_7|CT32B0_MAT2|RXD PIO2_8|CT32B0_MAT3|TXD PIO2_9|CT32B0_CAP0 PIO2_10 PIO2_11|SCK0|CT32B0_CAP1
DBG 3GE4 100R
3GE5
3GEB DBG
33 34 35 39 40 45 46 47 9 17 30 42
BL-DIM2 BL-DIM3 BL-DIM4 LPC-SWDIO
PIO0_0|RESET_ PIO0_1|CLKOUT|CT32B0_MAT2 PIO0_2|SSEL0|CT16B0_CAP0 PIO0_3 PIO0_4|SCL PIO0_5|SDA PIO0_6|SCK0 PIO0_7|CTS_ PIO0_8|MISO0|CT16B0_MAT0 PIO0_9|MOSI0|CT16B0_MAT PIO0_10|SWCLK|SCK0|CT16B0_MAT2 PIO0_11|R|AD0|CT32B0_MAT3
FGE4
6GE0
RES 3GE9 10R
AMBI-SPI-OUT-MOSI LPC-SWCLK BL-DIM1
10R
LPC-ISPn
1GE1 SKHUBHE010
3GE8
XTALOUT
FGE3
1 2
10R
LPC-RESETn
100n
3GE7
3 4 10 14 15 16 22 23 27 28 29 32
VDD XTALIN
2GE4
7
LPC-ISPn
SCL-SSB SDA-SSB
6
5 41
IGE1
RES
3GE6
3GE3 100R
8 44
7GE0 LPC1114FBD48/301
+3V3
1K0
LPC-LED1 LPC-LED2
cGE2
AMBI-SPI-MOSI-OUT LPC-LED3
9GE3
AMBI-SPI-MOSI
AMBI-SPI-OUT-MOSI LPC-LED4
9GE4
BL-DIM
BL-DIM1
+3V3
ROW_1 1GE3-1 RES 3GEJ 1K0
1 3 5 DEBUG 7 9
ROW_2 1GE3-2
10K
+3V3 3GEG
10-1-22
QFU1.2E LA
2 4 DEBUG 6 8 10
FGE6 FGE7 FGE8
3GEH RES
LPC-SWDIO LPC-SWCLK AMBI-SPI-OUT-MOSI
100R LPC-RESETn
FTSH-105-01-L-DV FTSH-105-01-L-DV
4
Backlight microcontroller
2012-11-22
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 81
B04H, eMMC
eMMC
B04H
100n
100n 2EJ6
2EJ5
+3V3
100n
100n 2EJ4
100n 2EJ3
100n 2EJ2
2EJ1
+3V3
SDIO2-CLK
SDIO2-CMD
FEJ2 M5
SDIO2-CLK
FEJ1 M6
33R 3EJ5
GPIO15
SDIO2-CMD +3V3
33R GPIO16
2
3EJ6-2
7
SDIO2-D0
3EJ0
FEJ0 K5 10K
SDIO2-RESETn VDDI
C2
VCCQ CMD CLK
GPIO18
1
RST VDDI
6
8
SDIO2-D1
VSS G5 E7 K8 H10
33R 3EJ6-1
100n
3EJ6-3
2EJ7
3
VCC 0 1 2 3 DATA 4 5 6 7 VSSQ
MAIN
33R GPIO17
+3V3
E6 F5 K9 J10
C6 M4 N4 P3 P5
7EJ0-1 H26M21001ECR
A3 A4 A5 B2 B3 B4 B5 B6
FEJ3 FEJ4 FEJ5 FEJ6 FEJ7 FEJ8 FEJ9 FEJA
SDIO2-D0 SDIO2-D1 SDIO2-D2 SDIO2-D3 SDIO2-D4 SDIO2-D5 SDIO2-D6 SDIO2-D7
SDIO2-D0
2 3EJ2-2 7
SDIO2-D1
3
47K
SDIO2-D2
SDIO2-D4
33R
3EJ2-4
5
1
2
3EJ2-1 47K 3EJ3-2
8
7
SDIO2-D5
1 3EJ3-1 8
SDIO2-D6
4 3EJ3-4 5
33R
47K
4 3EJ7-4 5
SDIO2-D7
3 3EJ3-3 6
GPIO20
1 3EJ7-1 8
GPIO21
SDIO2-D2
33R
SDIO2-CLK SDIO2-CMD
47K +3V3
SDIO2-D5
3EJ7-3
7EJ0-2 H26M21001ECR 6
GPIO23
SDIO2-RESETn
33R 2
3EJ7-2
SDIO2-D3 SDIO2-D6 SDIO2-D7 +3V3
7
47K
NC
SDIO2-D7
33R 3EJ8
+3V3
SDIO2-D6
33R 3
+3V3
M3 M7 M8 M9 M10 M11 M12 M13 M14 N1 N3 N6 N7 N8 N9 N10 N11 N12 N13 N14 P1 P2 P7 P8 P9 P10 P11 P12 P13 P14
4 3EJ6-4 5
GPIO24
4
47K
GPIO19
GPIO22
6
47K SDIO2-D3
FEJB
SDIO2-D3
3EJ2-3 47K
C4 N2 N5 P4 P6
3EJ4
GPIO14
4K7
+3V3
SDIO2-D4
33R
+3V3
VDDI SDIO2-D4 SDIO2-D5
A1 A2 A6 A7 A8 A9 A10 A11 A12 A13 A14 B1 B7 B8 B9 B10 B11 B12 B13 B14 C1 C3 C5 C7 C8 C9 C10 C11 C12 C13 C14
NC
NC
NC
H1 H2 H3 H5 H12 H13 H14 J1 J2 J3 J5 J12 J13 J14 K1 K2 K3 K6 K7 K10 K12 K13 K14 L1 L2 L3 L12 L13 L14 M1 M2
+3V3
SDIO2-RESETn
NC D1 D2 D3 D4 D12 D13 D14 E1 E2 E3 E5 E8 E9 E10 E12 E13 E14 F1 F2 F3 F10 F12 F13 F14 G1 G2 G3 G10 G12 G13 G14
B04H
3EJ1
10-1-23
QFU1.2E LA
SDIO2-D4 SDIO2-D5
+3V3
4
eMMC
2012-11-22
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 82
B05A, Class-D amplifier
Class-D amplifier
3D60
A-STBY
+3V3D
+12V-AUDIO 10K
+12V-AUDIO
3
1
30R
220n 5D51
220n 2D65
2D64
10u
10u 2D59
10u 2D58
10u 2D57
10u
2D66
30R 2D63
220n 5D50
220n 2D62
10u 2D61
10u 2D92
2
10u 2D60
7D70 PDTC144EU 2D97 2D49
2D48
10K
3D82
100u 16V
2D5C
1u0
2D67 1u0
100n 2D93 RES
100n 2D69
+3V3 30R
STEST
VIA
3D83
100u 16V
10K
10n
10n 2D78
2D99
220n
5D81
10n 2D70
2D98
10n
1D51
1D50
1D52
SPEAKER-R-
30R
10n
ID99
2D87
SPEAKER-R+
330p
10u
2041145-3
FD70 ID96
2D95
5D79
1 2 3
ID57
2 3 4
ID98
5D80
10n
ID53
1D02
1
2041145-4
5D01
10u
22K
30R
3D73 3D71
FD33
FD32
330p
5D76
3D70 RES
18K2 1%
Left+ LeftRight+ Right-
SPEAKER-R-
30R
5D77 30R
GND_HS 49
47 48
37 38
17
PGND AB CD
18R
2D94
1D01
FD30 FD31
SPEAKER-LSPEAKER-R+
CD00
28
A 9
GND 29
30
AGND
VSS D DO
50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69
3D74 ID52
ID83 ID84
SPEAKER-L-
10n 2D73
SSTIMER
7 16
10u
33n
33n
36
5D74
2D81
OC_ADJ OSC_RES
PBTL
33
2D85
ID94
30R
ID51
2D82
1D56
BST_D
2n2 26
ID62 ID63
ID70 6
39 42
1D55
2D54
FD69 30R 5D75
1D54
8
5D71
1D53
ID97
9D51
33n
10n
4n7
BST_C
VR_ANA PLL_FLTP PLL_FLTM
OUT_D ID69
2D80
ID91
SPEAKER-L+
2D76
47n
33n
ID93
470R 2D52
470R 2D53
ID82
220n 2D55
3D52
43
100n
46
SPEAKER-L+ 30R
2D83
12 11 10
2D79
5D00
ID88
10u
220n
ID66
ID81
1
5D70
30R
OUT_B RESET PDN
4
ID50
100n
2D89
25 19
2D77
5D83
BST_B
3D77
ID80
220n 2D71
34 35
BST_A A_SEL
31
2D56
40 41
OUT_A
ID79
18R
44 45
SDA SCL
10u 2D74
18
330p
2 3
VR_DIG
2D75
14
2D5D
9D50 RES 5 32
13
AUDIO AMPLIFIER
18R
ID90
4n7 3D51 47n
AUDIO-MUTE
5D85 +3V3D
2D72
OUT_C
2D51
ID61
23 24 3D76 RES
15K
2D50
ID65
A-STBY
D
3D75
ID56 D-RESET
7D50-2 PUMH2
ID58
C PVDD
18R
10K
3D50
ID89
47K
3D54
+3V3D SDI2SOUT3
B
3D72
3D55 47R 47R 10K 9D55
3D56
BM04B-SRSS-TBT
A
OUT GVDD
VREG
RES
7D50-1 PUMH2
LRCLK SCLK MCLK SDIN
FD50
6
D-RESET
AVDD DVDD 20 21 15 22
330p
5
FD64 FD66
7D60 TAS5711PHP
2D88
+3V3D
SCKI2SOUT WSI2SOUT
RES 9D53 9D54
TAS5731P1
ID76 ID75
ID77
3D57
27
+3V3D
1R0
FD67 FD63 FD65
WSI2SOUT I2SCLK SCKI2SOUT SDI2SOUT1
ID78
1R0
9D52 SDI2SOUT1
SDA-SSB SCL-SSB
DETECT12V
10u 2D68
2D86
10K
3D79
2D5B
10R
1 2 3 4
3D58
+3V3D
DBG 1D03
RES 3D63
ID87
16V 100u
SPEAKER-R-
2
+3V3-STANDBY
ID55
SPEAKER-L7D71 RES PDTC144EU
100u 16V
1
ID54
10n 2D91
3
3D78
AUDIO-MUTE
10K AUDIO-MUTEn
2D5A
10R 3D62 +3V3D
100u 16V
100u 16V
10K
3D61
220n
RESET-FUSION-OUTn
B05A
10u 2D84
B05A
10u 2D96
10-1-24
QFU1.2E LA
1X02 REF EMC HOLE
4
Class-D amplifier
2012-11-22
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 83
B05B, Analogue externals
Analogue externals
B05B FVA9
1VAG
6n8
2VA9
6VA8
100p
2VA8
1K0
CDS4C12GTA 12V
3VA7
SC-RIN
RES
FVAA
6n8
SCART
1VAH
6VA9
100p
2VAA
1K0
2VAB
RES
3VA8
SC-LIN
CDS4C12GTA 12V
B05B
49045-0011 25 26 FVA1
24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
FVAB
IVA0
1VAJ
75R
3VAG
CDS4C12GTA 12V
FVAC
1VAK
CDS4C12GTA 12V
RES
100p
6VAC
2VAE
1K5
1u0 3VAA
12K 2VAD
PDZ2.4B(COL)
FVA2
3VA9
SC1-STATUS 6VAB
RES 6VAA
100p
2VAC
SC1-B
+3V3 FVA4
1VAL
75R
3VAB
CDS4C12GTA 12V
RES 6VAD
100p
1R0
FD90
1
SPDIFO
1VAM
75R
3VAC
CDS4C12GTA 12V
RES
100p
6VAE
1VAN
CDS4C12GTA 12V
RES 6VAG
6VAF
FVAE
100p
100R 75R 2VAH
3VAD
SC1-BLK
3VAE
IVA1 PDZ2.4B(COL)
2VAG
CDS4C12GTA 12V
FVAF
SC1-DETECTn
1VAP
150R
3VAF
CDS4C12GTA 12V
RES 6VAH
100p
2VAJ
SC1-CVBS
FVAG
3VAK
100p
47R 2VAK
RES 6D0A
V_NOM
100p 1D0A
1VA1
FVAD
SC1-R 3
RES 2D0B
GND MT 5 4
ID95
100n
VIN
2VAF
1J50 3150-831-030-H1 2 VCC
3D90
SC1-G
2D0A
10-1-25
QFU1.2E LA
4
Analogue externals
2012-11-22
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 84
B05C, Sensor board and AmbiLight
Sensor board and AmbiLight
B05C
FAA0
FH52-11S-0.5SH
FH52-25S-0.5SH
13 12
27 26
FH52-40S-0.5SH FAA1 42 41
3CAF
SDA-SRF 10R
FAA2 3CAE IAA0
3CAG FAA3
0R3
+T
SCL-SRF
3CAD
KEYBOARD_IRQ-SRFn 10R
FAA5 3CAB 3CAA 3AAA
FAA6 FAA7 FAA8
LED2-OUT 3D-LED_3D-RF AMBI-TEMP
100R 100R 100R
3AAB 3AAC
AMBI-SPI-CCLK-OUT 1u0
10p
470p 2CAD
470p 2AAV
10p
10p 2AAC
2CAA
2CAB
100p
100p
2CAR
100p
1u0
100p
47R
2CAP
2CAS
AMBI-SPI-MOSI-OUT 47R
+3V3-STANDBY
2CAN
AMBI-POWER IAA1 1u0
SDA-MC
2AAW
FAA9
GND-AL
9CAA 9CAB
+3V3-STANDBY
LED2-OUT
3CAC
GND-AL
3CAH 10K
RC_IRQ-RF4CEn 10R
FAA4
GND-AL
LED2-OUT
10R
+5V
AMBI-POWER +3V3AL AMBI-POWER
2CAT 2CAU
100n RES 10u GND-AL
2CAL
RES 3AAD
100n
+3V3
FAAZ +3V3AL
10u
2AAE
GND-AL
1C26
10u
+T 0R3 2AAD
1C25
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
2CAJ
1C20
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
2CAM
11 10 9 8 7 6 5 4 3 2 1
1u0
B05C
2CAK
10-1-26
QFU1.2E LA
GND-AL
4
Sensor board and AmbiLight
2012-11-22
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 85
B06A, HDMI
HDMI
1 2
BRX0BRX0+
3 4
FHB1
2HA2
6
10R
FHAN FHAP
CIN-5V CRX-HOTPLUG 21 20 23 22
47K
3
CRX-DDC-SCL CRX-DDC-SDA
5 6
BRX2BRX2+
7 8 41 42
FHB9
CRX-DDC-SDA CRX-DDC-SCL
39 40
CRXCCRXC+
11 12
CRX0CRX0+
13 14
CRX1CRX1+
15 16 17 18
CRX2CRX2+
BRX2+
FHB2
DRX-HOTPLUG
3HA4
2HA1
DDRXCDDRXC+
19 20
DDRX0DDRX0+
21 22
FHAR FHAS
DDRX1DDRX1+
23 24
1 3HAB-1 8
BIN-5V BRX-HOTPLUG 21 20 23 22
DDRX2DDRX2+
25 26
47K
BRX-DDC-SCL BRX-DDC-SDA
45 46 43 44
DRX-DDC-SDA DRX-DDC-SCL
4
BRX0BRXC+
FHBA
47K
BIN-5V
5
10R
BRX1BRX0+
100K
DIN-5V
1u0 3HA1-4
BRX2BRX1+
BRXCPCEC-HDMI HARC0 BRX-DDC-SCL BRX-DDC-SDA
BRX1BRX1+
CRX-HOTPLUG
3HA3
100K
CIN-5V
1u0 3HA1-3
CRXCPCEC-HDMI HARC1 CRX-DDC-SCL CRX-DDC-SDA
3 3HAA-3 6
CRX0CRXC+
47K
CIN-5V
100n
100n 2HAP
100n 2HAN
10u
2HAM
100n
2HAG
10u
2
37
38 SBVCC33
10u
10K
51
N R0X1 P N R0X2 P (CBUS) HPD1 R1PWR5V DSDA1 DSCL1 N R1XC P N R1X0 P N R1X1 P
TX2
N P
TX1
N P
TX0
N P
TXC
N P
TPWR_CI2CA
57 56
HDMIF-RX2HDMIF-RX2+
59 58
HDMIF-RX1HDMIF-RX1+
61 60
HDMIF-RX0HDMIF-RX0+
63 62
HDMIF-RXCHDMIF-RXC+
3HB0 4K7
55
MICOM-VCC33
3HB1 RES
FHA4
4K7
N R1X2 P
CEC_A
50 3HAS
(CBUS) HPD2 R2PWR5V
INT
52
3HAY
4K7
FHA3
RES
CSCL CSDA
N R2X0 P
54 53
3HAV 3HAW
47R 47R
SCL-SSB SDA-SSB +1V5
RSVDL
N R2X1 P
R4PWR5V
10R
DSDA2 DSCL2 N R2XC P
pin (49)
FHA6
+5V +3V3
+5V
+3V3
2HAB
10 28 7HA1-1 RT9025-12GSP
N R2X2 P
1u0 VDD
3
(CBUS) HPD3 R3PWR5V DSDA3 DSCL3 N R3XC P VIA
N R3X0 P N R3X1 P N R3X2 P
2
74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89
VIN
VOUT
EN
ADJ
FHB5
6 7 1
PGOOD
+1V2-FE
5
NC GND GND HS
22 23 24 25 26
BRXCBRXC+
3HBQ
7HA1-2 RT9025-12GSP
VIA 18 19 20 21
VIA
VIA
10 11 12 13
VIA 14 15 16 17
33 34
10K
100K
35 36
R4PWR5V 3HBP
10u
FHB8
CEC_D
48 47
1u0
71 72
N R0X0 P
49
3HAR
ARX2ARX2+
DSCL4 DSDA4
2HAA
CRX1CRX0+
7 3HAB-2 2
FHAG
69 70
R4PWR5V
N R0XC P
2HAD
2 CRX2CRX1+
1H02
HDMI CONNECTOR 2
ARX1ARX1+
BRX-DDC-SDA BRX-DDC-SCL
CIN-5V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
67 68
CRX2+
5 3HAA-4 4
FHAF
ARX0ARX0+
DSDA0 DSCL0
4
10R
1H03
HDMI CONNECTOR 3
65 66
IHB1
SBVCC33 RES
9
3HA2
DIN-5V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
29 30
ARXCARXC+
(CBUS) HPD0 R0PWR5V
8
FHB0
100K
BIN-5V
7
21 20 23 22
ARX-DDC-SDA ARX-DDC-SCL
BRX-HOTPLUG
2HA4
DIN-5V DRX-HOTPLUG
31 32
FHA7
30R
10u
FHAL FHAM
DRX-DDC-SCL DRX-DDC-SDA
1u0 3HA1-2
DDRXCPCEC-HDMI HARC2 DRX-DDC-SCL DRX-DDC-SDA
7 3HAA-2 2
DDRX0DDRXC+
47K
DIN-5V
FHB7
pin (38)
RES 5HA6
RES
2HA9
1
DDRX1DDRX0+
100K
2HA5
10R
MICOM_VCC33
ARX-HOTPLUG
3HA0
FHAY
1u0 3HA1-1 8
AIN-5V DDRX2DDRX1+
47K
FHAE
DDRX2+
1 3HAA-1 8
HDMI CONNECTOR 4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
9 27 64 VCC33
1H04
2HAJ
1
VOUT
2HAL
EN EN
VCC33
3
FLG
100n RES 2HAK
4
VIN
2HAF
30R
3HA5 RES
PDZ2.4B(COL) 5HA9
5
GND 7HA0 SII9287B
FHA8
30R RES
IHB0
1u0
2HB5
FHBC
pins (9,27,64)
5HA5 +3V3 7HA5 RT9715EGB
10K
I2C ADDRESS SII9287B=OXB2
1u0 3HAP
2HB4
SBVCC33
VCC33
MICOM-VCC33
3K3 6HA1
FHB4
B06A
+3V3
+5V
2K2
B06A
3HA6
10-1-27
QFU1.2E LA
73
EPAD BIN-5V 1H01
ARX1ARX0+ AIN-5V
RES
+3V3-STANDBY
IHB3
IHB4 IHB5
3HB3
PCEC-HDMI FHB6
9HA0
1M0
BC847BW 7HA3
AIN-5V
HDMI-CEC
100R
IHB6
27K
9HA1
RES
3HBS
PCEC-QHDMI
3HAL
21 20 23 22
FHAV FHAW
ARX-DDC-SCL ARX-DDC-SDA
3HB2 22K
7HA2 BC847BW
RES
AIN-5V ARX-HOTPLUG
IHB2
47K
ARXCPCEC-HDMI HARC4 ARX-DDC-SCL ARX-DDC-SDA
3 3HAB-3 6
ARX0ARXC+
47K
FHAH
1V2 DVB-T2 and DVB-S2
ARX2ARX1+
5 3HAB-4 4
HDMI CONNECTOR 1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
ARX2+
3HB4 +3V3-STANDBY 22K
1X01 REF EMC HOLE
1X07 EMC HOLE
1X08 EMC HOLE
1X09 EMC HOLE
1X14 REF EMC HOLE
4
HDMI
2012-11-22
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Circuit Diagrams and PWB Layouts
10.
EN 86
B06B, HDMI-ARC
HDMI-ARC
B06B IHD1
HARC1
HARC2
FHD4
5HD0
FHD5
30R 5HD1
FHD6
30R 5HD2
IHDF
ARC0
IHDG
ARC1
IHDH
ARC2
IHDM
ARC3
IHDK
ARC4
RES 9HD2
ARC4
100R
9HD4
3HD4 HARC0
ARC0
ARC1
ARC2
30R IHD8
9HD5
5HD4
FHD8
3HD9 +5V-ARC
10p
5HD5
FHD3
+5V
100n
1u0
16
7HD0 74HC4051PW
2HDD
2HD6
30R
IHD7
9HD6
ARC-SEL2
FHD2
9
9HD0
6
0 8X
MDX
0
0 7
1
2
2
G8
3 4
3
5 6 7 VEE
GND 8
15 FHD7
12
9HD9
1 5 2 4
IHD4
9HD8 3HDS
IHDL
3HDT
HDMI-ARC
RES
HDMI-ARC
14
100R
10
3HDE
FHD1
100R
ARC-SEL1
13
3HDU
11
100R
FHD0
100R
VCC ARC-SEL0
7
2HD5
10p
100R
ARC4 30R
10p 2HD3
HARC4
10p 2HD1
B06B
2HD0
10-1-28
QFU1.2E LA
4
HDMI-ARC
2012-11-22
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Circuit Diagrams and PWB Layouts 10-1-29
QFU1.2E LA
10.
EN 87
B06C, USB external
B06C
USB external
B06C +3V3
3EA7 +5V +T 0R3 3EA8-1 +5V-PORTA 3EA8-2 100K
100n
100n 2EA7
100n 2EA6
2EA4
100n 2EA5
USB-PORTA-OC 100n
2EA3
100K FEAD
3EA8-3 100K
2EA0
18p USB-PORTB-DM USB-PORTB-DP USB-PORTB-OC
3 4 25
USB-PORTA-DM USB-PORTA-DP USB-PORTA-OC
6 7 24
USB-PORTC-DM USB-PORTC-DP USB-PORTC-OC
12 13 20 15 16 19
3EA1
+3V3
10K 28 17 22 23 8
RESET-FUSION-OUTn IEA1
3EA3 3EA4
10K IEA2
680R
100K
+3V3
100n
XOUT
21 VCC_D DD+
DD1DD1+ OVR1
1 2
IEA3 USB2-DM IEA4 USB2-DP
3EAC +5V +T 0R3
DD2DD2+ OVR2
SDA
3EAD-1
26
+5V-PORTB 100K USB-PORTB-OC
DD3DD3+ OVR3
TEST|SCL
FEAE
3EAD-2 100K
18
3EAD-3 100K
DD4DD4+ OVR4 VREG RESET SELFPWR GANG RREF
3EAD-4
VIA1 VIA2 VIA3 VIA4
30 31 32 33
IEE0
USB1-RREF
1
3EE2-1 12K
2 IEE1
USB2-RREF
3
3EE2-2
100K
1% 8 1% 7
3EAG
12K 1% 3EE2-3 6
+5V +T 0R3
12K 1% 4 3EE2-4 5
3EA5
2EA2
+3V3
XIN
5 VCC_A_1 9 VCC_A_2 14 VCC_A_3
11
GND_HS
10
2EA1
100K
29
7EA0 CY7C65632-28LTXCT
VCC
12M
1EA0
18p
27
3EA8-4
12K
3EAH-1 +5V-PORTC 100K USB-PORTC-OC
FEAH
3EAH-2 100K 3EAH-3 100K 3EAH-4 100K
6
5401
USB-PORTB-DM USB-PORTB-DP FEA4
1E02
FEAA +5V-PORTB
FEAB
5 100n
100n
5
FEA9 1 2 3 4
6
5401
1 2 3 4
USB-PORTC-DM USB-PORTC-DP FEAC
FEA8
+5V-PORTC FEA5
FEA6
1E03
5
2EAA
100n
1E01
2EAB
FEA3 2EA9
USB-PORTA-DM USB-PORTA-DP
FEA1
+5V-PORTA FEA2
6
1 2 3 4
FEA7
5401
4
USB external
2012-11-22
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Circuit Diagrams and PWB Layouts
10.
EN 88
B06D, Ethernet
Ethernet 5EF5
10n
2EFT
B06D 10n
30R
RES 5EF0 +3V3-STANDBY 30R 5EF4
VDD33-PHY
FEF9
VDD33-PHY
IEF1
100n
100n 2EFH
2EF2
100n
1u0
2EF0
30R
2EF1
AVDDL-1V1
+3V3-LAN
10u 2EF3
2EFS
B06D
6
3EFS 2
7EF1-1 PUMH2 1
3 5
7EF1-2 PUMH2
100n
2EFJ
100n
10u 2EFA
2EF9
100n 2EFV
2EFZ
1u0
22u
15p
4 5 6 IEF2
RX+ RX-
7
8
100n
RES 2EFN
4 5
CDA5C16GTH 16V
RES 6EF2-4
15p
RES 2EFM
21 22 24
3
EN-TXD0 EN-TXD1 LED-RES LED-ACT
6
34 35
FEFE
CDA5C16GTH 16V
EN-TXEN
TX+ TX-
FEFC
15p
32
FEFB
RES 6EF2-3
LED_ACT LED_RES LED_10_100
RX-ER
1E00 5450-327-194-H3
1 2 3
FEFA
TXP TXN RXP RXN
RES 2EFL
TXD0 TXD1
FEF7
IEF3
100n
2
NC
4u7
5EF1
38 DVDDL
3 VDD33
14
TX_EN
25
EN-RXD0 EN-RXD1
2EFP
2EFU
FEF6
10K
10K
3EFT
50 51 52 53 54 55 56 57 58
RX_ER
29 28
CLK-RMII EN-RXEN
7
VDD33-PHY
VDD33-PHY
10K
3EF4
VDDH-2V5
RXD0 RXD1
22R
CDA5C16GTH 16V
15 16 18 19 36 37
MDC MDIO INT
33 3EF5 30
RES 6EF2-2
FEF5
CLK_RMII CRS_DV
15p
VDD33-PHY
1% 1K5
RES0 RES1
RES 2EFK
40 39 20
EN-MDC
RBBIAS
TXP TXN RXP RXN
1
26 31
RES0 RES1
3EF3
7
9 10 12 13
8
2K37
FEF4
TRXP0 TRXN0 TRXP1 TRXN1
FEF8
27
CDA5C16GTH 16V
1%
VDDIO_REG
RST
8
1u0 2EFG
3EF2
CLK_25M
VDDH_REG
2
RES 6EF2-1
1
FEF3
RESET-ETHERNETn
23
XTLO
LX
VDDH-2V5
2EFF
FEF2 FEFD
AVDD33
1M0
4
22p
EN-MDIO IRQ-WOLANn
5
AVDDL XTLI
VIA 41 GND_HS 42 43 44 45 46 47 48 49
2EFC
3EFY
25M
1EF0
22p
6 11 17
30R
7EF0 AR8030-AL1A-R
FEF1
2EFB
5EF6
100n
100n 2EF8
100n 2EF7
100n 2EF6
2EF5
FEF0
RES
10-1-30
QFU1.2E LA
VIA
DEF0
4
CLK-RMII
EN-TXC
EN-RXC
VDDH-2V5
3EFH
RES0
EN-RXD0
RES1
EN-RXD1
10K 3EFJ
3EFN 10K
10K EN-RXEN
3EFP 10K 3EFR 10K
3EFL
LED-RES
10K 3EFM 10K
LED-ACT
RX-ER
3EFU 10K
4
Ethernet
2012-11-22
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Circuit Diagrams and PWB Layouts
10.
EN 89
B06E, NAND flash, serial flash and EEPROM
B06E
NAND flash, serial flash and EEPROM
B06E +3V3
DJA1 DJA2 DJA3 DJA4 DJA5 DJA6 DJA7 3JA6
DJA8
F-RDY
10K
0 1 2 3 IO 4 5 6 7
7
R B
33R
+3V3 DJA9
F-OEn F-CEn NAND-ALE NAND-CLE F-WEn
3JA5
8 9 17 16 18 19
DJAA DJAB DJAC DJAD
DNU1 DNU2
4K7
3JA0
4K7 RES 3JA1
DJAE
RE CE ALE CLE WE WP
1 2 3 4 5 6 10 11 14 15 20 21 22 23 24 26 27 28 33 35 40 45 46
4K7 FCT2
SF-SDO
3CTH 47R +3V3-STANDBY
8
29 30 31 32 41 42 43 44
1 2 3 4 5 6 7 8 9 10 11 NC 12 13 14 15 16 17 18 19 20 21 22 23
7CT3 M25P05-AVMN6 ICT1
3CTR
+3V3-STANDBY 3CTJ
SF-SDI
4K7
4K7
3CTK
SF-CLK
SF-CLK
SF-CS
SF-CS
SF-WP
SF-WP
4K7
3CT3 4K7
SF-SDI
ICT2 3CTB
ICT3 SF-HOLDn
SF-HOLDn
3CT0
SFB-SI
270R
3CTU
3CTZ
270R
270R
3CT2
SFB-SCK SFB-CS SFB-WPn
FCT3
SFB-SI SFB-SCK
FCT5
SFB-CS SFB-WPn
47R
3CT9
SFB-HOLDn
FCT4
SFB-HOLDn
FCT6 FCT7
47R
4K7
VCC 5 6 1 3 7
D C
Φ
512K FLASH
2
Q
S W HOLD VSS 4
DJA0
100n
3CT1
VCC
FRA0 FRA5 FRA6 FRA7 FRA8 FRA10 FRA11 FRA12
100n 2JA2
100n 2JA1
12 34 37 39
7JA0 MT29F8G08ABACAWP:C
9JA3
9JA4
2JA0
+3V3-STANDBY
FCT8
38 47 1CTZ
13 25 36
48 9JA6
+3V3
9JA5
VSS RESET-STANDBYn SF-SDO SFB-SI SFB-CS SFB-SCK
8
7
1 2 3 4 5 6
1734260-6
+3V3
+3V3
8
100n
Φ (8K × 8) EEPROM
10K
3JA4
7JA2 M24C64-WDW6
IJA0 1 2 3
2JA4
IJA1
0 1 2
WC SCL
ADR SDA
7 6 5
3JA2 47R
SCL-SSB 3JA3
SDA-SSB
47R
4
10-1-31
QFU1.2E LA
FJA0
4
NAND flash, serial flash and EEPROM
2012-11-22
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 90
B06F, Analogue externals
Analogue externals
B06F FVC1
AUDIO VGA/DVI
1VC7
1n0
2VC9
6VC6 RES
100p
2VC8
1K0
CDS4C12GTA 12V
3VC6
VGA-LIN
5 4 3
FVC2
1VC8
1n0
2VCB
6VC7 RES
100p
2VCA
1K0
CDS4C12GTA 12V
3VC7
VGA-RIN
1VA6
2 1 MSJ-035-75C-BL-RF-PBT-BRF
FVCB
FVC3
3VC8
YPBPR-DETECTn
100p
2VCC
47R
FVC4
1VC1
150R
3VC0
CDS4C12GTA 12V
RES 6VC0
47p
2VC0
Y1-IN
YPBPR 5 4 3
FVC5
1VC2
150R
3VC1
CDS4C12GTA 12V
RES 6VC1
47p
2VC1
PB1-IN
FVCC
1VA8
2 1 MSJ-035-75C-G-RF-PBT-BRF
FVC6
1VC3
150R
3VC2
CDS4C12GTA 12V
RES 6VC2
47p
2VC2
PR1-IN
FVC7
3VC9
CVBS-DETECTn
FVC8
1VC4
1n0
2VC6
CDS4C12GTA 12V
6VC3
100p
2VC3
1K0
RES
3VC3
YPBPR-RIN
FVC9
FVCD
1VC5
1n0
2VC7
CDS4C12GTA 12V
RES 6VC4
100p
1K0
CVBS + AUDIO CVBS / YPBPR 5 4 3
3VC4
YPBPR-LIN
100p
2VCD
47R
2VC4
1VA4
2 1 MSJ-035-75C-Y-RF-PBT-BRF
FVCA
1VC6
150R
3VC5
CDS4C12GTA 12V
6VC5
RES
CVBS1
100p
B06F
2VC5
10-1-32
QFU1.2E LA
4
Analogue externals
2012-11-22
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Circuit Diagrams and PWB Layouts
10.
EN 91
B06G, DC-DC
DC-DC
B06G
B06G
5UR3
IUR0
IUR2
3UR3-1 +12Vb
100n
100n
100n
2UY5 BAV99 COL
10R
10R 3UWJ-4
+22V
33R RES 33R RES 33R RES
RES 2URL
3URG-3
1n0
1n0
3URG-4
33R
VIN
IURF
1n0
3URF
1M0
3URC
22K 1%
3URB
3n3
100p
CUR5
+3V3
68K 1%
IURK
6
10 11
4
9 1n0
2URJ
COMP VIA
3URA
5
2URG
FB
6K8 5% RES 2URH
EN
GND_HS GND
GND-3V3r
GND-3V3r
GND-3V3r
6 3
100R RES 3UWK-4 4 5 RES 100R
7 100R RES
3UWK-3
3UWK-2
2
8 100R RES
3UWK-1
1
22u
1
3UWL
+3V3
IUWE ENABLE+2V5 2UWY RES
9
100n
47K
5
NC GND GND HS
3UWF
220K 1%
IUWF
3UWC
1% 470K 3UWD
2UWW
22K
1n0
22 23 24 25 26
8
7
GND-3V3r
4 ADJ
100n
3
+2V5
7
PGOOD
100n
2UWU
EN
2URE
+2V5
FUW3
6
VOUT
2UWV
2
ENABLE+2V5
7UW2-2 RT9025-12GSP
VIA 18 19 20 21
VIA
VIA
10 11 12 13
+2V5
+2V5-F
VIA
470R
470R
3UWH-4 RES
470R
3UWH-2
3UWH-3 RES
RES
470R
3UWH-1 RES
470R
470R
3UWG-4 RES
470R
3UWG-3 RES
470R
3UWG-2 RES
3UWG-1
14 15 16 17
+3V3
RES
2UWT
VIN
SW
GND-3V3r
VDD 3
+3V3
SS
GND-3V3r
RES 2UWS
1u0
7UW2-1 RT9025-12GSP
GND-3V3r
330R
6UW1 2UWR
8
1
IURE
10n
ENABLE+3V3
LTST-C190CKT
3UWB DBG DBG
1R0
3UWM
4K7 RES
4K7 RES
3UWA-4
4K7 RES
3UWA-3
4K7 RES
3UWA-1
3UWA-2
PDZ5.1B(COL)
RES 6UW0
FUW2
IURC
BOOT IURD
FURA +3V3
3u6
Φ
STEP DOWN 2URF
5UR6
2
7UR6 RT7297CHZSP
IURB
22u
RES 2URK
22u 2URD
3URG-2
2URC
100n
2URB
22u
2URA
30R
RES
3URG-1
RES
IURn IURA
B230LA-M3
220K 1%
22K 1%
3UR7
3UR6
100p
+3V3
10 11 12 13
FUW4
5UR5
+5V
VIA
VIA
+5V +5V
120K 1% 2UY8
+12Vb
+12Vb
VIA
14 15 16 17
1M0 3UR5
6
9
8
1n0
IURM
RES 6UW3
2 3
GND GND HS 2UR2
100n
2UY3
FB
2UY2
100n
VIA 18 19 20 21
3UR4
IUR4
EN
2UY1
2UR1
22u
SW
IUR3 4
22u 2UY7
VCC BOOT
10R
7 VIN
5
DETECT12V
100n
2UY6
1
IURL
10R
33R
3UWJ-1
IUR9
7URA-2 RT8288AZSP
FUR1 +5V
4u7
3UR3-4
2UR3 7URA-1 RT8288AZSP
5UR2
IUR8
33R
3UWJ-3
33R 3UR3-3
3UWJ-2
1n0
22u
2UR4
1n0
22u 2UR9
2UR0
22 23 24 25 26
3UR3-2
2UR8
10u
2UR5
10u
2UR7
2UR6
33R
30R
6UW2
+12Vb
1u0
30R 5UR1
10u
10-1-33
QFU1.2E LA
4
DC-DC
2012-11-22
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 92
B06H, DC-DC
DC-DC VDD
3UU1
8
IUU3
5
NC GND GND HS
82K 1%
1
1n0
ADJ PGOOD
2UUA
EN
+1V1-DVBT2
9
1R0
1u0
+5V
7
22K
2 IUU7 2UU1
2UU0
3UU2
IUU2
6
VOUT
22u
VIN
2UU5
3
+1V5
B06H
7UU1-1 RT9025-12GSP
3UU7 RES
4
B06H
10u
IUU8
3UU6
FUU1
SENSE+1V1-DVBT2
VIA 18 19 20 21
VIA
VIA
220K 1%
3UU4
* 3UU5
7UU1-2 RT9025-12GSP
680K
82K 1% 22 23 24 25 26
10 11 12 13
14 15 16 17
VIA
7UV0 NX1117C12Z 3
+3V3
IN
2 4
OUT
FUV1
+1V2-FA
2UV7
22u 16V
1
2UV6
COM 100n
Optional 7UV2 RT9030-11GU5
4
10u
10u
2UVC
NC
+1V1-FA
OUT
EN
ADJ
FUV2
5 4
GND
+1V1-FA 100R
(*) 3UU5
IN
3UV6 RES
1 3
+1V1-DVBT2
EN
5
GND
10u
10u +3V3
3
VOUT
2
2UV9
2UVB
IUV1
7UV1 RT9187GB
VIN
2UVD
1
+3V3
2
3UV1 120K 1%
RES
IUV3
1.20 V
68K 1%
1.10 V
3UV5
10-1-34
QFU1.2E LA
3UV2 33K 1%
680 k立
4
DC-DC
2012-11-22
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2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 93
B06I, CI conditional access
CI conditional access
B06I
+3V3
CA-CD1n CA-CD2n CA-VS1n CA-WAITn
3PA1 +5VCA
10K
3PAD
3PAE
10K
10K
3PAF 10K +3V3
2PA2 100n
CA-RST
3PAM 100K
19 3PA3
CA-MOVAL CA-MOSTRT CA-MDO0 CA-MDO1 CA-MDO2
8
3PA8-1 100R 1
3PA8-2 100R 2
7
3PA8-3 100R 3
6 5
3PA8-4 100R 4
VCC 3EN2 3EN1 G3
3PAL +3V3
1
2 3 4 5 6 7 8 9
100R
CA-RDY
20
7PA1 74LVC245ABQ 1
B06I
3PAC
+3V3
+T 0R3
18 17 16 15 14 13 12 11
2
MOVAL MOSTRT MDO0 MDO1 MDO2
MOVAL MOSTRT MDO0 MDO1 MDO2
10K CA-CE1n CA-IORDn
3PA6 3PAA-1 1
CE2n REGn
33R
+3V3
3PAP
10K
10K 8 3PAA-2 2
CA-IOWRn 10K 7 3PAA-3 3
10K 6 3PAA-4 4
CE2n 10K 5 REGn
RES 9PAA
CA-CE2n RES 9PAB
CA-OEn CA-WEn
RES 3PAS 10K RES 3PAU 10K
CA-REGn
3PAN 10K 3PAR RES 10K 3PAT RES 10K 3PAV RES 10K
21
10
GND GND_HS CA-WP
3PAW RES 10K
CA-INPACKn
3PAY RES 10K
+3V3 2PA3
19 3PA2
CA-MOCLK
100R
3PA9-1 8 100R
3PA9-2 7
3PA9-3 100R 6 2 100R
3PA9-4 5 100R
3PA4
3
1
+3V3
1
2 3 4 5 6 7 8 9
100R
4
1P00
VCC 3EN2 3EN1 G3
2
18 17 16 15 14 13 12 11
MOCLK MDO7 MDO6 MDO5 MDO4 MDO3
MOCLK MDO7 MDO6 MDO5 MDO4 MDO3
3PA5
10K
3PA7 10K 3PAB-3 3
10K
3PAB-2 2
10K 7
6
GND GND_HS 21
CA-MDO7 CA-MDO6 CA-MDO5 CA-MDO4 CA-MDO3
100n
20
7PA2 74LVC245ABQ 1
10
2PA1
+5V 22u 16V
10-1-35
QFU1.2E LA
3PAB-1 1
10K 8
3PAB-4 4
10K 5
CA-D03 CA-D04 CA-D05 CA-D06 CA-D07 CA-CE1n CA-A10 CA-OEn CA-A11 CA-A09 CA-A08 CA-A13 CA-A14 CA-WEn CA-RDY +5VCA
MDI0
1 3PW2-1 8
CA-MIVAL CA-MICLK CA-A12 CA-A07 CA-A06 CA-A05 CA-A04 CA-A03 CA-A02 CA-A01 CA-A00 CA-D00 CA-D01 CA-D02 CA-WP
CA-MDI0
33R 3PW3
MDI1
CA-CD1n MDO3 MDO4 MDO5 MDO6 MDO7 CE2n CA-VS1n CA-IORDn CA-IOWRn CA-MISTRT CA-MDI0 CA-MDI1 CA-MDI2 CA-MDI3
CA-MDI1
33R 3PW4
MDI2
CA-MDI2
33R MDI3
1
3PW1-1
8
CA-MDI3
5
CA-MDI4
33R MDI4
4
3PW2-4 33R 3PW1-2
MDI5
2
7
CA-MDI5
MDI6
3 3PW2-3 6
CA-MDI6
MDI7
2 3PW2-2 7
33R
+5VCA
33R
CA-MDI4 CA-MDI5 CA-MDI6 CA-MDI7 MOCLK CA-RST CA-WAITn CA-INPACKn REGn MOVAL MOSTRT MDO0 MDO1 MDO2 CA-CD2n
CA-MDI7
33R 3PW5
MICLK
CA-MICLK
33R MIVAL
4
MISTRT
3
3PW1-4
5
CA-MIVAL
6
CA-MISTRT
33R 3PW1-3 33R
71 69 72 70
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
92789-055LF
4
CI conditional access
2012-11-22
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Circuit Diagrams and PWB Layouts 10-1-36
QFU1.2E LA
10.
EN 94
B06J, FE
B06J
FE
B06J
+3V3
3KW1 560R 3KW3
TS-CHDEC-DATA
TS-CHDEC-CLK
TS-CHDEC-DATA
TS-CHDEC-CLK
TS-CHDEC-VALID
TS-CHDEC-VALID
3KW6 470R
560R 3KW7
470R 3KW4 470R
560R 3KW5
3KW2
TS-CHDEC-SOP
TS-CHDEC-SOP
3KW8 470R
560R
RES 2FS3 10p SOC-IF-P
SOC-IF-N
2FS1
5FS1
100n 2FS2
4u7 5FS2
100n
4u7
IF-IN-P
IF-IN-N
2FS4 RES 10p
+3V3
3RW1
TS-DVBS-DATA
TS-DVBS-DATA
3RW2
560R
470R
3RW3
3RW4
TS-DVBS-CLK
TS-DVBS-CLK
560R 3RW5 560R 3RW7 560R
470R TS-DVBS-VALID
TS-DVBS-SOP
TS-DVBS-VALID
TS-DVBS-SOP
3RW6 470R 3RW8 470R
4
FE
2012-11-22
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 95
B06K, HDMI
HDMI
B06K
RES 3HW6 390R 3HW1
FHW0 +5V
IHW3 HEAC
56R 1%
680R
RES 3HW2
HDMI-ARC
IHW1
3HW3
PWR5V
10n
27K 2HW1
10K
3HW4
3HW5
+3V3
12K
IHW2 RREF
1%
100n
B06K
2HW2
10-1-37
QFU1.2E LA
4
HDMI
2012-11-22
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 96
B06L, Control, temperature sensor and service
Control, temperature sensor and service
+3V3 7CW0 PCA9540BGD
B06L
VDD 3CW0 +3V3
3CW1
SDA-M3
SDA-M3
2
SCL-M3
SCL-M3
1
SD0 SC0
SDA
4K7
SCL
4K7
SD1 SC1
1CW4 FCWT
SCL-M3
FCWV
SDA-M3
SDA-SSB SCL-SSB
3CWV
7 8
SDA-SRF SCL-SRF
SDA-SRF SCL-SRF
3CWY
2K2 2K2
+3V3
3CWW 4K7
4K7
VSS
FCWU 4
SDA-SSB SCL-SSB
6
1 2 3
3CWU
4 5
5
3CWJ
SCL-M1 BM03B-SRSS-TBT SDA-M1
SCL-FE
3CR6
SCL-FE
+3V3
47R
2K2
3CWF
3CR7
SDA-FE
SDA-FE
BM03B-SRSS-TBT 1CW7
+3V3
47R SCL-SRF
FCWB
SDA-SRF
FCWC
2K2 FCW4
5 1CWG
1CW6
+3V3-STANDBY
FCW3
SCL-SSB DCW5 FCWR DCW6 FCWS
6
1 2 3
FCW2
TEST-MOD TEST-CON F-OEn
FCW1
SDA-SSB
5
4
1 2 3
+3V3-STANDBY
BM03B-SRSS-TBT
7
4K7
1 2 3 4 5
4
BM05B-SRSS-TBT 3CU3
EJTAG-MCU-TDO
47R 3CU4 47R
DVS2
STB-GP4
3CU5
STB-GP1
22K
47R
3CWC
3CWD
STB-GP5
STB-GP2
100n
100n 2CW3
FCWH
EJTAG-MCU-TCK
8
7
1 2 3 4 5 6
47R
22K 2CW2
FCWG FCWE
EJTAG-MCU-TMS 1K0
3CWB
DVS1
1CW5 BM06B-SRSS-TBT
FCWD FCWF
EJTAG-MCU-TMS EJTAG-MCU-TDO EJTAG-MCU-TCK EJTAG-MCU-TDI
EJTAG-MCU-TDI
3CWS
STB-GP0
3CWT 1K0
LED
3CWR
B06L
3
10-1-38
QFU1.2E LA
3CU2
STB-GP3
3CR8
ENABLE-WOLAN
ENABLE-WOLAN
+3V3-STANDBY
47R
10K
3CWK
HP-DETECT
3EW0
IRQ-WOLANn
IRQ-WOLANn
+3V3-STANDBY
47R
10K
3CWG
STB-GP6
SPLASH-ON
47R 3CUA
STB-GP7 +3V3
RESET-ETHERNETn
100R 3CWM
STB-GP8
RESET-RF4CEn
3CU0 10K
RESET-RF4CEn
47R
FCW0 DCW4
3CWP
STB-GP10
+3V3-STANDBY
SDM
LCD-PWR-ONn
47R
10K
10K
3CS1
3CS0
DCW1
3CWN
STB-GP9
3CWE
SDMn
SDMn
+3V3-STANDBY 10K
AMBI-TEMP-FUS
10R
6CS0
1CS1
1CS0
3
3CS4-3
3CS3
6
47R
TXD-SERVICE
47R
47R
3CU1
AVLINK1
DETECT12V
10K
47R
1
47R
+3V3-STANDBY
RXD-SERVICE
10K
3CS4-1
3CS2
7
3CRA
8
3CS4-2
3CR9
47R
2 1 MSJ-035-75C-B-RF-PBT-BRF
2
4
6CS1
3CS4-4
PDZ5.1B(COL)
5
1u0
FCS1
FCS0
PDZ5.1B(COL)
5 4 3
2AW0
FCS2 1E06
AMBI-TEMP
100n
3AW0
2CW1
47R
47R 3CU6
STB-TXD
TXD-STANDBY
TXD-STANDBY
47R RXD-STANDBY
3CU7
STB-RXD
RXD-STANDBY
47R FCW8
STB-SCL
3CU9
STB-SDA
SDA-MC
47R +3V3
3CUC
STB-RSTO +3V3
47R KYBRD
100n
+3V3-STANDBY
KEYBOARD_IRQ-SRFn
100n
2CW5
DCW2
1CT7 SKHUBHE010
IRQ-EXPANDERn 1 2
3 3 4
3TW0
SDA-SSB SCL-SSB
DBG
3TW1 47R
47R
1 2
OS
17
100n
9TW0 RES 9TW1 RES 9TW2
2TW0
1n0
8
100R
+VS
FCW7
ARC-SEL0 ARC-SEL1 ARC-SEL2
3CR1
VSS GND_HS 6
100n
10K
3CR2 100R 3CR0 100R
7TW0 LM75BGD A0
SDA
A1
SCL
A2
7 6 5
9TW5 RES
VIA
RESET-STANDBYn
9TW4
VIA
11 22 23 24 25
GND
9TW3
INT 18 19 20 21
FCT9
GND
SCL SDA
+3V3-STANDBY 10K
+3V3
4
12 47R 13
47R
SC1-DETECTn YPBPR-DETECTn CVBS-DETECTn
3CW2
RC_IRQ-RF4CEn
1
3CUW
2
RESET
2 3 4 5 7 FCW5 8 9 FCW6 10
10K
IO0 IO1 IO2 IO3 IO4 IO5 IO6 IO7
RC_IRQ-RF4CEn
10R VCC
3CR3
A0 A1 A2
3CW5
IR
10K
2CW4
10K 3CUS
10K
3CUP
7CT4 NCP803
2CT4
14
3CUR
RES 3CUN
10K
3CTY
VDD
3CUY
LGSEN
3
2CW6
10K
10K
3CUV
RES 3CUU
10K
3CUT
7CW1 PCA9554BS 15 16 1
SCL-SSB SDA-SSB
STANDBYn 3CW3 10R
10K
10K
RES 3CUM
10K
3CUL
RES 3CUK
+3V3
RESET-FUSION-OUTn
3CTD 47R
PWRON
4
Control, temperature sensor and service
2012-11-22
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Circuit Diagrams and PWB Layouts 10-1-39
QFU1.2E LA
10.
EN 97
B06M, Strap options
B06M
Strap options
B06M
+3V3-STANDBY 10K
SPI-EN
SPI-EN
ICW1
3CUE RES
3CUD
ICA1
3CL0
+3V3-STANDBY
CA-IOWRn
CA-IOWRn
10K
3CL1 RES 10K
ICA2
3CL2
+3V3-STANDBY
10K
CA-WEn
CA-WEn
10K
3CL3 RES 10K
ICA3 CA-OEn
3CL4 10K
ICA4
3CL5
+3V3-STANDBY
CA-IORDn
CA-IORDn
10K 3CL7
+3V3-STANDBY
3CL6 RES 10K
RES
ICA5 CA-A14
CA-A14
3CL8 10K
10K
ICA6 NAND-CLE
3CP5 10K
3CP8
+3V3-STANDBY
RES
F-OEn
F-OEn
FCP6
10K
+3V3-STANDBY
3CT6 10K 3CT7 RES
+3V3-STANDBY
+3V3-STANDBY
10K 3CT8
3CP6 10K
TEST-CON
TEST-CON
TEST-MOD
TEST-MOD
ENABLE-STANDBY
ENABLE-STANDBY
10K
RES
3CTA 10K 3CTC
RES
10K 3CTF 10K
4
Strap options
2012-11-22
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Circuit Diagrams and PWB Layouts
10.
EN 98
B06N, Headphone
Headphone
B06N
1
3DH3-1
8
68R IDHM
22n
FDH2 22n 2DH9
CDS4C12GTA 12V 2DH8
6DH2 RES
6
CDS4C12GTA 12V 1DH3
3
3DH3-3
6DH1
68R
4V 100u
RES
4 3DH3-4 5
1DH2
IDHL
8
2DH7
1K0
IDHP
2 1DH4 3 1 MSJ-035-12D-B-AG-PBT-BRF
68R
4V 100u HPHOR
FDH1
2 3DH3-2 7
1
2DH6
5
IDHN
1K0 3DH4-1
HPHOL
3DH4-4
B06N
4
10-1-40
QFU1.2E LA
FDH3
68R
4
Headphone
2012-11-22
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 99
Layout top
3UA8
3UAB 3UAC
2UAD
2EHY
9EHE
6UAF
2EHR
2UPH
5UC2 7UC2
1T71 1C31 1C30
3EM8
2UPK
2UCK
2UCW
2UCJ
5UC0
1CV5
7UC3
6UC2
3EJ8
7UF8
2UF7
7EHJ 2EHV
3EHS
3EHR 9EM3
7EH4
5EH0
9GM6
9GM5
3CY1
1CY1
2UA9
2UF6
2UAT
2UAA
2UAM
2UAB 3GEM
3UAW
9GE1
3GE9
3GEL
3GEN
9GE2 2GE2 3GE0
3EJ3 2VW3
3VWP
2VWJ
2PA1
1P00
3CT1
3CTH
2UVC
7UV2 2UVD
7UV0
1E03
2URC
3UR6
2UR0
3UR3
2UR1
5UR2
2UR4
3UR7
2UR2
3UR4
3UR5
2UR3
7URA
2UR6
2UR5
2UR7 5UR1
5UR3
2URB
2URA
6UW3
2URJ
3URF
3URB
3URC
2URH
2URG
3URA
5UR6
2DH6 2DH8 2DH9
1DH2
6DH2 3DH3 6DH1
7EA0
1DH3
1DH4
3CWT
1CW5 3CWS
3EAH
3EAG
2EAA
3EAD 2EAB
2URE
1CW6
3CWW
1VA6
3CWY
1CT7
1CW7
3VC6 2VC8
7UR6
2UV7
3CUE 3CUD
2VC9
6VC6
1CW4
3VC7
2URF
DCW4
2DH7
3CWE 2CW1
2VC5
1E02
3UC9
6UC0 5UC1
3CP6 3CP8
3CW0
1VA4
1VC6 6VC5
2UPG
2UV6
3CW1
1VC8
3CY3
3VWD
3VWS
3VWR 2VW4
2VWK 3CTK
7CT3
3CT2
1CWG
1VC7
1VC4
6VC7 2VCB
2UPC
2UWS
2VC4 3VC4
7UP2 2UPJ
2UWY
2VCA
2VC7
6VC4
2UPL
3VW9
3CWK
6UW1
1VC5
2VC6
2UPE 2UPD
2UPF
6UP6
2VWE3VW8
3CTF
6UW0 3UWL
2UWU
3UWB
7UW2
5UP5
1UA0
3VWH
2FZ3 2FZ5
5FS1 5FS2
2FS4
3CT3 3EW0
2UPM
3VW7
3VWL
2FZ6 3FZ0
3VWK
2J42 5J05
3VW4
3UV6
3CT0
3CTR
3CTJ
3VW6
1UA1 1UP1
5UP6
3CTZ
3UWM
3UWA 3UWK
3UWD 2UWW
3UWF 3UWC
2UWV
2UWR
2EFA
3EF5
6VC0 6VC3
1VC1
3CVT
3VWN
2VW2 3VW5 3VW3
7UC4
7UA2
9EH8
2UCC 2UCA 2UCB
3CW2
3JA6
2VC0 2VCD
3CY4
3CT8
2UWT
5EF1 2EF9
3EF2 3VC2
2VW5
3CY2
2UAV
2VWF3VWA
3CTU
3CTD 3CUA
3CR6
2J41
2FS3
3J09
3J50
3EE2 3CR7
3EAC
3EA8
2EJ2 3EJ0
2EHU
3VWJ
3KW6
3UU7
7UU1 2UU1
1J00 2J10 2J11
3VC5
2VC2
1E01
2EJ6 3EJ4 3EJ5 3EJ1 2EJ5 2EJ3
3EM9
2CV8 2CV9 2CVB
2EJ1
3EJ2
2GRH 2GRJ
2GRB 2GRC 2GWD 2GWE 2GRD 2GRE 2GWF 2GWG 2GRG 2GRF 2GWH 2GWJ
2GR7 2GR8 2GW9 2GWA 2GR9 2GRA 2GWB 2GWC
2GR3
2GR5
2GW7 2GR6
2GW8
2GW3
2GW5 2GR4
2VW8
2VWD
3VC0 3VC9
1VA8
3VWM
3VWV
2FS2
2FS1
1H04
2GW6
3GW7
3VWW
2VWB
2VWC
9HA1
3EA7
2EA9
3GE1
1GE0
3CVF
3CVG
DB71
3CYB 3CVS 3CV4
3J2U 3KW8
3KW2
3KW4
3RW2
3RW8
3RW6
2VCC 3VC8
2VC1 3VC1
1VC2
1CV6
DB11
3UG9
3GD5
3CV9
3CV8
2J24
2GW4
DB26
2J31 DB12
3CR3
3CUN
3CUP
3CUS
3CUK
3CUR
9TW0
9TW1
9TW2
2TW0
3CUT
7EJ0 2EJ7
2UU0
3UU2
2HAB 3CS1
3CS0
1CS1
3CUW
7TW03TW1 3TW0 9TW4
9TW3
3CUL
9HD9 3HDU
5HD5
2J25
3CV2
3CUU
7HD0 2HDD
2EJ4
9UA1
2UF8
2EHS
2UA1
1GE2 1GE1
2J3H
2VC3
6VC2
6GE1 6GE0 2GE1
2J1G
7J00
3VC3
1E06
9GE0
3GW3
DB41
DB79
DB76
3EFU
6VC1
3CUV
3GE7
2UCY
DB43 DB42
3CS3
1VC3
3GE8
2UCL
2J1J
3CS2
1CS0
7CW1
2CW6 3CUM
3CVR
3GEJ
2J21
2VW1
3EFP
6CS1 6CS0 3CS4
3HA1
2HA43HA2 3CUY
9TW5
2EFZ
7HA1
3HA3
2HA13HA4
1H02
2HA5
1H03
3EF3
2EFJ
3EFH
3HA0
2HD6
2EFH
7EF0
2HA9
7GE0
9GW4
DB40 DB56 DB66
DB17
3HAR
2HA2
2J1E 2J1M 2J14 2J1P 2J20 2J1V DB90
7J01
DB48 DBA5
3J2Z
2J59 3UU1 3UU5
2UUA 3UU4
6EF2
2EFL 2EFK
3EFY
3HBQ
3CVN 3GM3
2J7S 2J1N 2J82 2J1H 2J1B 2J1R 2J7T
DB53
3CTA
2EFB 2EFC
7HA0
9GM2
9GM1
2GW2
3GWP
3GWN
2GWV
7J02
3J10
DBA2
3HW4
3HBP
3GEH 3GEG
DB49
1EF0
3HAV
3GM2
3GM1
3GM6
3GM5
3GWD 3GWE
3VWG
3VWF
BGVK
2GWW
3GWC
BGVH9GW2
BGVF
BGV4
DB32
3J55 3J54 3J53
3UU6
3HAW
3GM4
BGV3
BGVG
BGV5
BGV6
2UBF
2UBD
2GWY
BGV2
3GW1
7UB1
DB31
7UAC 5UAA
6GE2
7EM1
2UA0
1UA2
2J3J
2J3F
1FA0
2FA0
2EFN 2EFM
3J20 3J2R 3J21 3J2Q 3J2E 3J2F
DB93
DB50
3CV5
3UWG 3UWH
1H01
2UB7
2UB8
2UB9 3J3V 3J3Y 3J43 3J42 3J3R
DB00
3RW4
3KC1
3KC7
2KCK
3FA1 5FA7 5FA1
DB61
2J3K
2KC5 2KC3
5KC9 2KCH
2KCJ
2KCP
2KC2 2KC4
3FA4
1E00
3J13
3J1B 3J1A
6GE3
DB34 DB52
DB09
5KC55KC6
2FA5
3J1Z
9GE3
1GE3
DB25
7J03
DB03
3KC2
3FA3
3FA2 5FA6
3J1W
2UB6
2J27
2J92
2GE6
DB10
3KC3
3KC6
3KC0
2UB0
3GEA
DB22
3KC8
5FA4 5FA5
2J08
2J35
2KC0 2KC6
7KC0
2KC1 2KC7 3KC9
1F00
3J3U
3J36 3J3S 3J37 3J3T 3J3D
3J3C
5KC8
2KCD
3J24 3J25 3J1R 3J1Y
2J95
2J3D 2J30 2J29 2J2T 2J2V 2J2Z
2J39 5KC7
3RD8
3KCA
5KC0
3CVC
1CV3
2J26
DB21
3KCB
9KC0 2KCE
3J48 3J49
3CVE 2CVA
BGV8
2J13
7J04
2KCG
9KC1 2KCF
1CV4
3GWG
1M90
3CVW
2J2W 2J33 2J2U 2J2D 2J2J 2J37
DB19
2KCR3KCE
3KC4
1KC0
2KCC
2KCB
3RD5
3RD4
9RD3
5KC1
3J47 3J46
3J3H
1CV2
2CVC
5J0R
5D51
2D63
3D63
3J3G
3GWH
2UBA
7UB5
3J44 3J4E 3J45 3J4F
2GWU
3CVD
3J1H
3J3A 3J3B
1CV1
3CVY
3J3L
3RD7
3RDA
BGV7
BGVC
3J1G
3J3M
2RDP
DRD0
5KA1 3KA0 5KA0 3KA1
BGV1
5UB1
BGVB
2UB4
1D03
3RD1
2GWN
BGVE
2GWR
DB57
3D56
3D55
9D53
9D52
2D72
2D74
3D71
9D54
3D77
2RDC
3RD0
9RD12RDG
9RD02RDF
2RBL
BGVN
3D54
2KCS
2RBP
3RB12RBN
2RDJ
7RD0
2RD9
2RBS
2RBR
2RD8
3RDB
6RB0
2RBK
2RB4
2RB2
2RD7 2RDA
2RK02RK1
2RBA
2RBB 2RB9
2RBW
2RBC
7RB0
3GW5
BGVA
7D50
3D50 3D60 3D61
2D59 2D58 2D57
BGVD
3GWA
BGVL
5D71
2D55
2D83
3D72
2D95
2D65 2D77
2D67
3D62
7D71 7D70
3D57
2RDR
DRD1
3RD3
9GW3
5D77
2D78
5D00
2AAD
5D74 2D94
2D61
2D69
2D89
7RDA
2RDE
9RB6
9RB7
1RD0
2RB5
2RB3 2RBT
2D53 3D52 2D52 2D51
BGVM
1C27 2GWT
BGV9
BGVJ
3J40 3J41
9RB0
2RBJ
9RB8 2RBY
2RBG
5RB0
2RBH
7D60
9D51
2RB7
2RBD
2RB1
2D85
2D54 3D70
2D68
9RB9
1RB0 2RBM
2D79
5D01
3RB0 2RBE2RBU 3RB3 2RBV 2RB6
2RB8 2RBF
2D5A
2D97 2D96 2D84
3D76
3D78
6GS1 3GS5
5D79
2D66 2D88
2D86
3D79 2VA8
9D50
2VAA
2D93
2VAC
2D62 2D64
2D75
3D73
2D5B 2D60
2D49
1VAG
3VAA
3D75
2D50
2VAF
3D51
1VAL 1VAK 1VAJ 1VAH
5D76
2D80 2D82
3D74
2D92
3D58
2VAG
5D50
1VAM
2D87
9GW0
2D56
6VAF
3VAD
6VAB
1VA1
1VAP 1VAN
2GWK
2D70
3GW4
9D55
2D48
2VAK 3VAK
2D73
5D83 5D80
2D71
3D83
2RDD
1J50
3D82
1G55
2D98
2D99
2D81
2D91
5D70
2D5C
2D76
2D5D
6D0A 3D90
2CAL
9CAB
2D0B
2D0A
5D85
9CAA 2CAS
2CAU
2AAC
2CAT
3CAB
2CAK
3AAB
2CAN
3CAG
2CAJ
1D0A
3CAH
3CAF 2CAB
1D02
1D56 1D55 1D54 1D53 1D51 1D50 1D52
2UBC
1D01
1C20 1C251C26
1R01
10-1-41
QFU1.2E LA
2URD
2UR8
2UR9
4
SSB layout bottom
2012-11-22
3104 313 6612 19370_167_130228.eps 130228
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 100
IGRA
IGR9
FGWJ
FGWC
FGWD
3GWL
FGWK
IGR2 IGW7
FGUF
FGR5
3GWB
IGR1
FD69 ID57
IGW6
FGR7
IGW5
FGR8
3J14 2J1A
DB01
2J1W DB65
2J1L
DB58 DB59
5TA1
IUB9
2UBJ
3UBE IUB7 IUB6
5UB0
3VA7
2VA9
ID83 FVA2
ID69
IUB4 FUB1
IUB3
3UB4 2UB3
3UB5 3UB6
ID66
ID58 ID56 ID65
ID54
FD50
ID90 ID87
FUB0
FD64 ID79
FD66
ID84
ID78 FD65
3J2G
DB99
ID89
FD63
3J2H
FD67
3J2N 3J2P
FUC0
FVA9
2J93 5J0P
DC07
3J34 3J35
3J4D 2J01 3J4L 2J2G 3J4M 3J4C
2J80 IJ0R
DB73
3J4A 3J4J 3J4B 3J4K
3J4G
3J4H
3J3W
2J1C
2J1K
ID97 ID77
3J2M
2J12 3J17 3J16
3VA8 2VAB ID76
ID70 ID80
FVA1
3J4N
DB97
3VAG
FVAA
ID81
ID75
3J3F 3J38 3J3E 3J39 3J3J 3J3P 3J3K 3J3N 3J4P 3J3Z
DB92
3VA9 2VAE
2VAD
ID61
3J32 3J33
2J1S
DB63
2J1Q
2J85 3J11 2J16
2J86
DB98
2J84
DB95
DB44
2J1Z
FGE5
FTA6
DBA6
2J17 3J12
DB45
FJ08
3CV3
FCVB
DB54
2J18 3J15
3GM7
3CVP 3CVM
7GM2
3CVU
3CV7
IGE1
3UAL
FTA4
FTA32TA2
2UBK
2UBG
DB38 DB36 DB35
FVAC
IVA0 IUB8
ID55
3J2K 3J2J 3J2L
3UB7
FGE0
3VAB
FVAB
3UB8
DB55
FVA4
IUB5
2J19 DB62
3VAC
FVAD
ID53
2UBH
3UB9
2J1D
DBA3
3VAE 2VAH
FVAE
ID63
3UBA
2J15DBA7
FJ09
DB64 DB39
DB91
2J7U
DBA4
FGE2
FGE1
3GE3
FTA5
2J83 2J7P
2GE3 3GEK
6VAH 6VAG 6VAE 6VAD 6VAC 6VAA 6VA9 6VA8
3VAF
FVAF2VAJ
IVA1
3UBC
3J28 3J29
DB51
DB94
3J1F 3J1E 3J2A 3J2B 3J2D 3J2C 3J1U 3J26 3J1V 3J27
FVAG
ID50
ID82
ID62
IUBC
3UBD IUBA
3UB3 3UBF
9GE4 3GEB
DB33
FGE8
2GE5 3GE4 FGE4
ID95
ID93
DFW2
5FW3
2FW3
FGE3
DBA1
2GE4 3GE5
FUAH
IUA3
3UBB IJ0S
3J1L
3GE2
ID98
FD32
2UBB
IUBB
2UBE
3J18 3J19 3J1K 3J1J
3J1M
FCVN
7UAA
2GE0
3UAT
FGVE
ID51
3J1S 3J1C 3J1T 3J1D
3J22 3J1N 3J23 3J1P
DBA8
3GE6
FD90
FD31
ID96
ID52
3J2S 3J2T
2J1F 2J1U 2J81
3UA6
3UAS
2UAL
3UAP 3UAN
FUB2
FGE7
FUAP
IAA0
IGW2
IFW3
FGE6
2UAN
FAA1 FAA8
FGV0
3FW8 2FW5 IFW5
3GEE
3GEC FUAF
7FW1
2J89
IFW2
3FW4
3FW6
FAA0
ID88
3GEF
7UAF
2UAK
IFW4
3FW3 3FW5
IGS1
IGS2
FAA7
FAA5
IGW3
FGU6
3GS1
3GS6
3AAA
IAA1
FGR1
2FW6
3FW7 IGS52GS5
ID94
IGW1
FGR6
IGR4 2GWP
FAA3
2CAR
FAA9
IGW4
FGU9
DFW1 IFW1
2FW4
3GS4
ID91
FD70
FAA4
FAA6 FAAZ
FD33 ID99
IGW9 FGWE
3GWK
3AAD
IGR0
9GW5
IGW8
FGR3
IGR5
2GWM
2GWS
FGWF
FGWG
FD30
FGWM
2GWL
IGR3
3GW9
3CVA
3CVB
FGWH
FGWL
FGWP
FGWQ
3CAE
FGWS
FGWA
FCVF
7GS3
3CYC
2UAS
IEH2
3UAR
3UGA
2UAW
3TA1
IUAK3UA5
IUAV
FUAT
IUFT
IUFS
IUA2
IUAT
IUAS
IUFU
FTA2
2TA3
FGWR
FGWU
3GWJ IGV5
FGR2
FCVM
FCVG
7GS1
7GS2 3GS3
2GS3
IGS4
2EHT
FTA1
FGWT
FGWW
3GWM
FCV2
FJ03
IUAJ
IEH1
IEH0
IEH3
2TA1
2GY2
IUAP
3UAY
IEH5
3UAV
6UAB
IEHJ
6UAC
3EHP 3EHT
IEH4
2EH93EHU
6UAD
3EHV
FUAU
IUAL
IUAR
IUAN
ITA1 5TA2
3TA2
2GY1
3UAK
7UAB
2UAP
3EM0
FGWV
FGWZ
IGR6
FGWB
FCVL
1GS1
IEH62EHJ
7UAD
3EM1
3EHY
1TA1
3GY9
2UA4
3GY7
3GY5
2GY6
3EM6
3EM7
9UA0
3UA7
FUAG
3EHW
FGWY
FGU1
3GW6 3GW8 9GW1
9GM4
FUAK
FUA8
IUFR
FEH1
5TA3
FUAD
2UAR
FEH5
3UA9
2EHW
3EHN
7UA3
9UA2
FEH3
FUA7
FUA0 FUAE
IUAM
7EH2
2EHL
FEH2
FUA9
FUA3
2EM7
FEH4
2EHN
3GY1
9EM1
9EM2
2EM0
2EM2
2EHM
FEH9
2GY8
2GYA
FUA1
3EM4
FGU0
FGR9
2EM3
2EM6
FGU3
FCV3
9GM3
FCVH
3EHJ
1EM0
FEH8
IEM1
FGVZ
7GM1
FCVE
FCVA
2EM4 3EM5
IEM2
2EHP
2GS1
9GS1 9GS2
3EM3 2EM5
2EM1
FGR4
FGW0
FCVC
3GWF
FGWN
IGV7 FGV5
FGVK
FGS22GS2 FGS1
FEH7
FGU2
FGU5
IGR8
FCVK
FCVJ
FGU4
IGR7
FAA22CAA
FGV7
3CAA FGV6
FGV9
2CAP
FGV8
3CAD
FGVB
3CAC
FGVA
FGVD
2CAD
FGVC
2CAM
FGVF
FGVG
2AAV
FGVH
FGVM
3AAC
FGVL
FGVP
2AAW
FGVN
FGVR
2AAE
FGVQ
FGVT
5D75 5D81
FGVS
FGU7
FGVV
3GW2
FGVU
FGVY
FCVD
IGU8
FGVW
FGVJ
FUAL
FCV1
2GY4
2UA3
FUAA
3GYA
FUA5
2UAU
FUAM
3UA4
3GY8
FUAB
2GY3
FUA6
3GYB
3GY6
2GY5
2GY7
2GY9
FUA4
2UA2
Layout bottom
2UA5
10-1-42
QFU1.2E LA
IUA1 FJ0BDBC3 DBA9
2J5A
IRB1
DBB5
IRB0
DB16
FFA9
DBB0
2FA8
IKC6
2FAG
IKC7
FFA82FAF
IFA4 FFAD
FFA7
3FAA
3KA2 3FA8
FFA6 IFAA
5FAA
7FAA
2FAA
FFA2 FFAA
3J51
2FA2
FFA4
2FA3
FFAB 3KA4 FFA5
2FA9
FFA3
3FAB
3FAD
FFAE
7FA1 3FA9
3FA7
IFA3
2FAC
IFA5
IFA6
5KCA
2FAB
2FA1
FJ16
5RDD
2RDL
3KW1
3RW5
3RW1
3RW3
3RW7
3KW7
3KW3
3PW5
3KW5
3PW2
5J0H
2J4S
2J4T
3PW4 3PW3
3FAC
FJ02
IJ0E
3KA5
7KA0
FFAC
2J61
2FAH
DKC0
IKC4
3KA3
2J5W
IJ10
IUU2
2UU5 IEF3
IEA3
2EFP FEFA
2HD5
DEF0
3CWD
3CU5
FCT2
IEE1
3HDS
IUU3 FEFB
3CWN
3CU4
ICT1
3CU3
3CTY
2CW4 ICT3 2AW0
3CTB
3CU0
IHDK IUU7
9HD8
FEFC
3CWF
DCW1
IHD4
3CWJ
FEFE
FCWD
FEA4
2EFU
2HW1
3CWB
IHW1
FHW0
IEF2
FEF2
3HW3
FCWS
3CU2
FEF02EF6
2HAA
FEF8
5EF5 2EF5
DJAD
FVCC
FHBC
3HAB
IHB1
5HD0
7HA5
FHA7
3HA6
FVC7
IURD
5HA9
FVC5 FCW4
5HA6
5HA5
2HB4 FHAP
FVC2
2HAN
2HAF
2HAK
FHA8
2HAG
6HA1
FHB4
FHB2
FCS0
3HA5
3HAA
FHAM
3CUC
FEF5
3EF4
3HD4 IHDF
9HD4
2HAL
2HB5
2HAJ
2HD0
2HAM
3HAP
FEF6
2HAD
7EF1
3EFJ
IUWF
FVC8
FHD4
FHA3
FHA6
3EFT 3EFS
FEFD
DJA9
IURF
3HAY
2EF0
3EFM
DJAA
DJA7
9JA6
2EFG FEF7
3EFR
2JA0
3JA5
FEF9
2EF7
3HAS
2EF1
FUW3
3EFL
7JA0
9JA3
3HB0 FHA4
ICA6
DJAC
FHAG
FHBA
2HAP
2EFF
FEF4
3HB1
3JA1 DJAB
DJA3 DJA1
DJAE
9JA4
DJA6
DJA5 IDHP
2EF2
9JA5
FEF1
2EF8
FEF3
DCW6
FEA7 FHB5
5EF6
IEF1 2EF3
FUW2
2EFT
2JA2 3JA0
DJA8
FCWE
5EF0
5EF4 FCP6 IUWE
3CT6
3CWP
2EFS
ICW1 FCW8
DCW5
FCT9
2EFV 3EFN
3CWG
3CWC
3CU9
FCWR
3CP5
FCT8
7CT4
3PAA
3PA6
IEE0
5HD4
FHD8
IUU8 IEA4
DJA4
FHAH FHB7
FHAY
IHB0
FHAV
FHB8 FHAN
IURE
FCWC
3CWU
7CW0
FCWV
FHAR
FHAW
FHB1
IUR9
FHB0
2UY8
2RDT
IKC2 IKCA
DB08
FJ0F
2JA1
IURK
2RD2
IRDB5RDB
2RDK
DBB8
2J2S 2J3B
2FAE
DBC4
IKC3
2CW3
ICT2
2CT4
3CL4
3PAR
3PAC
3PAU
3CL6
3PAP
9PAA
3CL5
3PAS
FCT4
FCWF
2CW5
2CW2
FCT6
FCT3
3CT9 3CW5
IHW2
FCW0
IUR4
3RD9
IKC0 IKC1
2FA7
DB69
2J3A 2J3C2J3E
DJA2 DJA0
ICA3 ICA4
3PAE
2UV9
IKCB
DKC1 DB67
2FAD
DBC5
DBC1
2J07
3J05 2J06
2J2Y
3J06
FJ05
2RDH
IKC8
DBB6
2J2R 3J2V 2J2A
3CWM
3CR8
9PAB
3CU6 3CRA
3CR9
3PAF
3PAY
3PAM
3PAL
3PA4
2PA3
3PAT
3CL1
7PA1
3PA8
3PA3
3AW0
3CU1 3CU7
2UVB FUV2 3CL0
3CL8
3CL7
3CL2
FCT5
2PA2
3CL3
3PAV
ICA1
3PAN
FCT7
FUV1
3PA2
2JA4
7PA2
IUV33UV1
ICA5
9RD2 3RD2
DBB1
DB02
2J2B
FRB0
IRD6
IRD5
FUU1
3CW3
3UV5 3UV2 ICA2
IRD3
DB15 DBB2
2J28
DB14
2HW2 3HW5
3PA9
2RDS
2J2C DB68
DBB3 DB13
DB82
2KCL
2J2P
DB04
3J2W
DB87
2J5M
8001 8002
7UV1
2RD0 2RD5
DB27
DB29
2J38 2J36
2J4H
2J96
2J98 2J4L
IRD2
IRD1
DB18
2J2N
IKC5
FJ0J
3PAB
2RD6
2RD1
2RD4 2RD3
IRD0
IKC9 DBB7
2J2M
3PW1
FJ0G
5J06
2J4F 2J4J 3J00
2J4G
5J0D 2J5N
IJ0F
IRDA
3RD6
FKC1
2J5R
2J4V
5RDA
2J2L 2J32
2J34
2RDB
DB30
2J5G
2J5L
FRDA
FJ0ADBC2
2J5B 2J05
2J3G 2J7F FJ01
FJ0H
2J5S
DBC6
IRDC
DB20
DBC0
2J62
5J0C 2J64
IJ0L
2RDN
DBB9
DB05DB07
DB85 DB74
2J5F 2J5C 2J5H
2J5Z
2J7G
2J4U
2J7E
2J3W
IJ0M
DB72
2J60
2J6B
DB96
5J0J
2J7C
2J70
2J7D 2J79
2J5P
2FZ4
IJ07
5J0E
2J87
2J88
IJ0N
2J7R
2J6Y
5J0M
2J3Z 2FZ1
5J0N 2J55 2J53 5J07IJ08 2J56 2J58
2J77
2J6T
2J6J 2J6N
IJ0J
2J44
DVW1
FJ10
2J6V 2J6H
2J71
2J78
3J08 3J07 3J52
3PA7
3PA5
3PA1
3PAW
3PAD
IVW7
DVW4 DVW2
IVW8
2J6G 2J67
2J6D 2J47 2J5V 2J5T 2J3V 2J6E 2J43
2FZ2
DVW5
DVW6
IVW1
IJ06
IVW3
2J7W
2J94 2J73
2J75 2J7A
5J08 2J63 5J04
IJ05
5J0L IJ0H 2J52 2J51 2J50 IJ0K 2J54
2J6W 2J99
2J76
2J5Y
IJ0A
2J40
DVW3
2J7V
2J03
2J22 5J0F
2J97
2J45
IVW2 IVW4
2J1T
2J4E
5J00 2J3M
3J01
2J7K
2J6P 2J69
2J3N 5J09 2J48 2J46 IJ09
2J3Y
9J04 2J91
IJ01
2J68
2J4R
3VWU
IUAD
IJ12
2VW7
3VWB
FCY4
FCY6
2J3R 9J03 2J90
DB89
2J6C 2J6R
5J03 2J4D 5J0A 2J4B 2J3P 5J0B 5J02 5J01 2J66
IJ0C
FCY2
FUC1
2VW9
3UCC
2J49
IJ03
2J3S IJ13
3UCD 2UCN
IJ0D
DB88
2J7H 2J6Z 2J7J
IJ02
FCY3
3UG2
IJ0B
3VWC IUC0
IUF6
2J3T
2J4A 2J4C
FCY1
2VWA
IUCA
3UCB
2J4M
2J7Y
2J6M
2J6F
2J4P
2J6L
2J6A
3FZ1
2J3U
IJ04
IUCP
2VW6
3UCA
2J4N 2J7L
2J6U
FCY8
7UC0
2J23
2J6S 2J65 2J72
2J7B
5J0G
IJ11
DC02
DC06
3UC0
2UCH
2UC1
FCY7
3UC4
2J4Y
DC03
FCY9
3UCE 2UCM
3UC7
3UCP
IJ0P
3UC8
DB75
DB47
DB83
2J74 2J5U 2J09
2J00 2J7Z
DB86
DB46 DB78
IUC5
2UCR
9GA2
3VWT
FHAS FHAF
FCW1
3JA4
3UWJ
3JA2
3CWV
FVCD
FHD5 FHD2 FCW7
3CR1
FEA1
FCWU
3HBS 9HA0
FCW5
IHD8
IHB2 FCS2
IHB3 IEA2
3HDT
IHD7 IHB6
9HD6
7HA3
3HAL
FHD7
IHDL
FHD65HD2 3HDE
2HD3
IHDH FHAL
3HW1
FEA2
3HW6
FEA3
3HW2
FEA9
3HB3
FEAA
2EA5 2EA0
IDHM
FHD3
IHW3
1EA0
IUV1
2EA1 2EA7
3EA4
FHB6 FDH1
2UY7
FEAB
7HA2
2EA4
FURA FVCB
IHDG9HD5
FHD0
IHD19HD2
IHDM FEAC
3HB4
3EA3
FEAH
IHB5
FEAD
2EA3
3HB2
3EA1
2EA2
FEA5
FDH2
IDHL
FHD1
3CR2
FEAE
3EA5 FEA6
FUW4
9HD0
FEA8
IEA1
2UY2
6UW2
3CTC
3CT7
2UY1
3CWR
IHB4
FJA0
2UY3
3HD9
FCW6
FCWG
2UY5
2UY6
FVCA
IJA0
IURM
FUR1
DCW2
FCS1
FVC3
2HD1
IURA
FVC4
5HD1
IDHN
5UR5
IURL
FVC9
FVC1 FCW2
3CR0
IURN IUR2
FHB9
FCW3
FVC6
IUR8
IURC
FCWH
2URL
3URG
IURB
2URK
IUR0 IUR3
7JA2
FCWT
3JA3
FCWB
3DH4
3UAF IUAC
7UF7
IUCB
3J02
IJ00
DB23
2J2H 3J30 2J2E
DB70
DB77
IJ14
FCY5
IUFP
IUC4
3UC2 IUF3
2UCF
IUC1
IUC93UCR
3UCG
IUF0
2UCP
3UCF
IUF1
3UG0
3UCN
7UA0
IUFQ IUF7
3UD1
IUC6
7UC1
3UAH
FUAV
FUAC
3UAE
IUAA
7UF9 2UF9
FUAN
3UG4
3UG3
3UD0 3UG8
2UAJ
IUPF
IUAF
IUF8
IUC7
6UC1
IUPJ
IUAB
IUP23UPE
FUPA
2J02
DB80
3UC3
2UCE
2J04 3J03 3J04
2J4W
FEJ8
2UCD 3UC1
3UPD
3UAG
6UP4 6UP5
FUA2
3EJ7
FEJ3
FEJ7
IUC2
IUC3
3UPB
FEJ0
IUC8
IUA0 IUP4
5J0K 2J4Z
2J2F DBB4 3J31
DB81
FEJ6
FEJB
2J5K 2J5D
3EJ6
FEJ5 FEJ4
IUPE
FJ04
IJ0G
FEJA
FEJ1 FEJ2
5RDC
DB24
FEJ9
FEH6
2RDM
2J2K DBC7
FHAE
IJA1
2EA6
FDH3
4
SSB layout top
2012-11-22
3104 313 6612 19370_168_130228.eps 130228
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 101
310431366185 SSB B01A, Power connector
Power connector
B01A +12V
+12V DETECTION
3 5
1K0
22K
7 7UA0-1 BC847BPN(COL)
FUAN
22K 1 8
22K
3UAF-1
IUAD
POWER-OK
BC857BS(COL) 7UF9-2
+3V3-STANDBY 3UG4-2
100R
GND-AL
7UF9-1 BC857BS(COL) IUF7 100K
1M0
+3V3-STANDBY
3GYB
3UG8
4K7
+12VAL
BL-ON BL-I-CTRL BL-DIM1 BL-DIM2
100R 100R 100R 100R
2UAJ
3GY7 3GY8 3GY9 3GYA
FUA8 FUAA FUAK FUAL
3UD0
3UAG RES
FUAD
1u0 RES
3UAE
FUA7
3UG4-3
1
+12V-AUDIO
100K
DETECT12V
2
FUAC
IUFQ
3UG4-4
100n
IUAB
+12V
IUF8 100K
IUAC 6
2
FUAM
RES 3UG3
3
22K
STANDBY
100R
FUA5
4
IUAF 3UAF-2
3UA4
FUA2
3UAF-4
FUAB
IUAA
4
FUA6 FUA9
7UA0-2 BC847BPN(COL)
5 100K 1%
FUA3
BL-DIM3 BL-DIM4 BL-DIM5 BL-DIM6 BL-DIM7 BL-DIM8
3UD1
FUA4
7 100R 6 100R 8 100R 5 100R 100R 100R
1% 68K
ENABLE+3V3 100K
+12V
30 29
FUAV
FUAE 3UG4-1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
2 3GY1-2 3GY1-3 3 1 3GY1-1 3GY1-4 4 3GY5 3GY6
22K
3UAF-3
6
BL-I-CTRL
FUA1
2UF9
CUA1
BL-SPI-CS_BL-I-CTRL 1M90
+12V-AUDIO SMAW200-H28S2
10n
1n0
RES 2UA5
1n0
1n0
1n0 2GYA
2GY9
2GY8
1n0
1n0 2GY7
1n0 2GY5
2GY6
1n0
10n 2GY4
10n 2GY2
2GY3
100n
2GY1
1u0 2UA3 RES
2UA2
16V
100p
2UA4
100u
100n
2UAT
100n
2UAA
1u0 2UAB RES
FUAH 2UAU RES
FUAF
AMBI-POWER
100p
100p
2UAL
10K
3UAS
+12V
4K7
4K7
RES 4 3UAP-4 5
RES 3 3UAP-3 6
4K7
4K7 RES 2 3UAP-2 7
4K7
RES 1 3UAP-1 8
4K7 RES 3UAN-4 4 5
3UAT-3
10K
10K
AMBI-POWER
5UAA
AMBILIGHT 3-SIDED PROTECTION
22u 16V
3u0 2UAP
22K
22K
3UG0-1
3UG0-2
+3V3
RES
FUAT
S1D
IUAT +3V3-STANDBY
4K7 RES 3UAN-3 3 6
1 2 3
6UAB
IUAS
+12Vb
T 3.0A 32V
+3V3-STANDBY
1u0
5 6 7 8 6UAC
7UAB BC847BW 2
PDZ15B(COL)
1
2UA1
IUA1
1u0
1UA1
6UAD
+3V3-WIFI
330u 6.3V
RES 2UAV
9UA1-1 9UA1-2 9UA1-3 9UA1-4
7UAC SI4778DY-GE3
PDZ15B(COL)
IUAR +12V FUAG
10K
T 3.0A 32V
3
3UAT-2
+12Va
4
12K 1%
IUA0
+3V3-WIFI B230LA-M3
3UAT-4
GND-AL
IUAN 100R
3UAV-2
1UA0
0R1
3UAY
IUAP
REF 6UAF
2UAM
100p
3UAW
240R 1% 2UAK
12K 1%
2UAN
3 IUAV
T 2.0A 63V FOR DUAL SIDE AL ONLY
1u0
2UF8
22n
2UF7
IUAJ
FUAP 5
3UAV-4
1UA2 +12VAL
COM
6
4 BC857BS(COL) 7UAA-2
12K 1%
+3V3-STANDBY
IUFR
4
1 BC857BS(COL) 7UAA-1
2
10K
BP
+12VAL
3UAT-1
OUT
EN
3UA6
IN
FUAU
5
AMBI-POWER
IUAL
IUAK
1%
3UAV-1
3
4K7
12K 1%
FUA0
3UAR 3UA5
7UF8 RT9193-33GB 1
3UAV-3
K R 2
4K7
1 RES RES RES RES
3K3 1%
9UA2-1 9UA2-2 9UA2-3 9UA2-4
RES
1u0
A
6.3V 330u 2UA0
3
7UAF TS2431
2UA9 RES
RES 2 3UAN-2 7
+12VAL
+22V
+12VAL
+12VAL
RES 3UAN-1 1 8
GND-AL
+3V5-STANDBY
2
IUF0
5
7UA2 RES PMV31XN
IUA2 RES
3 IUF6
100K
CUA0
ENABLE+1V5+1V1 3UAH
1 2
+12VAL
IUFP
IUFS
4 IUFT
5
6 IUFU DETECT12V
3UG9
3
GND-AL
VOUT
VIN EN
FLG RSET PG
9 10
AMBI-POWER
8 7
CSS GND
+3V3 10K
100n
22K
2UAW
3UG2
1K8
IUF3
2UAS
1X15 REF EMC HOLE
2
3UGA
7UF7-1 BC847BPN(COL) 1
100n
STANDBY
GND-AL
7UAD SIP32429DN-GE4
optional 2UAR
3UG0-4
22K
22K
3UG0-3
1R0
RES 3UAC
220K
100n RES 3UAB
7UA3 BC847BW
RES
10K 10K
3UAK
STANDBYn
2UAD
IUA3 3UA9
GND-AL
6 11
3UA8
1u0
IUAM
47K
RES 9UA0
4 BC847BPN(COL) 7UF7-2
10K
3UA7 10K
3UAL
IUF1
RES
B01A
1u0
10-2-1
2UF6
10.2
QFU1.2E LA
GND-AL GND-AL
GND-AL
GND-AL
5
Power connector
2012-11-08
3104 313 6618 19370_001_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 102
B01B, Fusion supply
Fusion supply
B01B
5UC1
IUC0
+12Va 2 3 4 10 5 6 7 8
22u
2UCC
+12Va
IUC1
IUC2
3UC0
1
7UC2 SI4778DY-GE3 RES
4
9
1 2 3
22u
30R 22u 2UCB
10R
7UC4 AON7932 5 6 7
10u
2K2
2UCE
7UC0 RT8228DGQW
2UCF
1%
EN
MODE
10R
3R3
100n
2u0 5UC0
IUC8
3
FUC0 +1V1-FD
2u0
2 8
22u
4
22u 2UCY
FB
1n0
1n0
5UC2
2UCW
CS
3UC8
220u 2.5V
LGATE
IUC7
2UCL
TON PGOOD
2UCH
22u
PHASE
IUC6
2UCK RES
13 11
10
17
GND GND_HS 150K
3UCA
ENABLE+1V5+1V1
IUCA
LTST-C190CKT
1n0
2K2
UGATE
15
+5V
NC
5
22u
IUCP 14 12
BOOT
IUCB
2UCJ RES
1 6 9 16 6UC0 DBG
10R
2UC1
7
VCC
3UC9 DBG
4 3UC3-4 5
10R
3 3UC3-3 6
2
3UC3-2
7
8 10R
3UC3-1
7UC3 SI4172DY-GE3 RES
4
1
IUC5
B340A-M3
5 6 7 8
6UC2
220p
PDZ5.6B(COL)
6UC1 10u
2UCD IUC3
1 2 3
270K 5%
3UC7
3UC2
1R0 IUC4
2UCP
RES 3UC4
7UC1 BC847BW
3R3
3UC1
8 +5V
2UCR RES
GND-1V1F
CORE VOLTAGE SUPPLY FUSION GND-1V1F
GND-1V1F
RES 2UCM
GND-1V1F
3UCG
DVS1
IUC9
22p 3UCB
3UCC
22K 1%
10R
22K 1%
120K 1% 3UCF
220K 1%
3UCE
3UCN
1M0
3UCR RES
12K 1%
180K 1% 3UCP
B01B
2UCA
10-2-2
QFU1.2E LA
3UCD RES
FUC1
SENSE+1V1-FD
+1V1-FD
10R 2UCN 1u0
GND-1V1F
GND-1V1F
GND-1V1F
5
Fusion supply
2012-11-08
3104 313 6618 19370_002_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 103
B01C, LNB supply
LNB supply
B01C
+12V
1UP1 T
+12V-DVBS
3.0A 32V
30R
100n 5UP6
+12V-DVBS
2UPL RES
10u
10u 25V
10u RES 2UPM
10u 2UPE
5UP5
7UP2 LNBH25LPQ
100n 2UPD
2UPC
IUPJ
17 VCC IUPF
3UPE
IUP2 9
VIA
ISEL
GND_HS
RS1D
IUPE
25
GND
PGND
22K
47u 25V
DSQIN
6UP5
NC 22
F22-DISECQ-TX
2UPG
DSQ
+V-LNB
B230LA-M3
SDA
1 5 10 11 12 13 14 24 26 27 28 29 30 31 32 33
FUPA
1u0
SCL
20
6UP6
8 47R
VOUT
2UPH
47R
ADDR
470n
47u 25V
3UPD
7
21
2UPF
SDA-FE
3UPB
16
B230LA-M3
SCL-FE
VUP
2UPJ
6UP4
VBYP 6
IUP4 +V-LNB
3
220n
LX
2UPK
Φ
4
B01C
2 15 18 19 23
10-2-3
QFU1.2E LA
5
LNB supply
2012-11-08
3104 313 6618 19370_003_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 104
B01D, USB internal
USB internal 9EHE-1 9EHE-2 9EHE-3 9EHE-4
B01D
RES RES RES RES
10u
2EHL
B01D
7EH2 RT9187GSP
IEH3
100u 6.3V
RES 2EHY
3EHY
1M0 1M0
7 10
9
6
VIA GND GND HS
5
3EM1
10u
2EHM
NC
33K 1%
BP|ADJ
10K 1%
EN
+3V3-LAN 3EHW
8
3 4
VOUT
VIN
3EM0
1 2 +3V5-STANDBY
ENABLE-WOLAN
7EH4 RES TPS61200DRCG4
reserved 9EM1
USB-WIFI-DM
3EM6 10K
6 7 24
USB-CAM-DM USB-CAM-DP 3EM7 10K
12 13 20
3EM8 10K
15 16 19
3EM9 10K
RESET-FUSION-OUTn 3EM3 3EM4
10K
28 17 IEM1 22 23 8 IEM2
680R
3EM5
TEST|SCL
DD4DD4+ OVR4 VREG RESET SELFPWR GANG RREF
22u
22u 2EHT RES
RES 2EHS
9EM3
22K 1%
RES 3EHR
120K 1%
IEHJ
2EHN
+3V3
18
RES 9EH8-1 RES 9EH8-2 RES 9EH8-3 RES 9EH8-4
3EHV 47K
100n
+3V3-LAN
26
IEH6
100K
RES 3EHP
2EHJ
3EHJ
10n
2EHW
USB1-DM USB1-DP
cEH0
3EHT RES
21 VCC_D
27 DD3DD3+ OVR3
1 2
7EHJ BC847BW
22K
RES
100n
1C31 VIA1 VIA2 VIA3 VIA4
30 31 32 33
FEH1 FEH2 FEH3 FEH4 FEH5
USB-WIFI-DM USB-WIFI-DP IRQ-WOLANn
8
7
1 2 3 4 5 6
A1253WRA RES 3EHN +3V3-LAN
100n
2EM2
+3V3
SDA
DD2DD2+ OVR2
3EHU
IEH5
DD+
DD1DD1+ OVR1
330K
IEH4
29
+3V3
2EH9
RES
3 4 25
USB-WIFI-DM USB-WIFI-DP
XOUT
5 VCC_A_1 9 VCC_A_2 14 VCC_A_3
18p
XIN
GND_HS
11
VCC
10
2EM1
+3V3
12 13
100K
1EM0
7EM1 CY7C65632-28LTXCT
RES
100n IEH1
10
47n
18p
+3V3
L
2EHV
22K
2EM0
+3V3
UVLO
IEH0
1
+3V5-STANDBY
100n
100n 2EM7
100n 2EM6
100n 2EM5
2EM4
100n
2EM3
+3V3
+3V3
FB
2
RES 3EHS
4u7
3
EN
9
1n0
IEH2
VAUX
GND_HS VIA
7 RES 5EH0
PS
PGND
6
VOUT
11
8
2EHU RES
RES
2EHR
USB-WIFI-DP
22u
9EM2
USB1-DP
VIN
GND
5
+3V3-WIFI
4
USB1-DM
12M
10-2-4
QFU1.2E LA
10K RES 2EHP 100n 1C30 USB-CAM-DM USB-CAM-DP
+5V
FEH6 FEH7 FEH8 FEH9 7
6
1 2 3 4 5
A1253WRA
5
USB internal
2012-11-08
3104 313 6618 19370_004_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 105
B01E, Miscellaneous
Miscellaneous
B01E
RES
3TA2
RES
10R
FTA4
FTA6
RES 2TA1
10R 10p
SDA-SRF
FTA2
3TA1
FTA3
RES 1T71
10p RES 2TA2
FTA1
SCL-SRF
1 2 3 4
A1253WRA
RES 5TA1 FTA5
RES 5TA2 +12V
ITA1
30R
TEMPERATURE SENSOR
5TA3 +3V3-STANDBY
1u0
30R RES 2TA3
+3V3
T 1.0A 63V
B01E
RES 1TA1
10-2-5
QFU1.2E LA
30R
5
Miscellaneous
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts 10-2-6
QFU1.2E LA
10.
EN 106
B02A, Hybrid T/C tuner
B02A
Hybrid T/C tuner
B02A
FFAE VCC-TUNER 5
4
1 2 3
22u 16V 100n
OUT
1F00 SUT-RE214Z
30R
FFA3 2FA9
100R
10p 5FA4 330n
3FA4 47R
5FA5
12
10p
10p 2FAC
2FAB
330n
A3.3V IF1_P IF1_N AGC1 NC1 NC2 IF2_P IF2_N AGC2 I2C_SCL I2C_SDA
16
3FA2
TUNER
30R 3FA3 47R
SOC-IF-N SOC-IF-P
1 2 3 4 5 6 7 8 9 10 11
FFA2
10p
14
15 100R
30R 5FA6
FFA9
2FAA
3FA1
5FA7
13
BM03B-SRSS-TBT FFA6 FFA7
SDA-FE SCL-FE
FFAA 5KA1
3KA0
330n
3KA1
5KA0 330n 10p
2FAG
47R
10p
47R
2FAH
IF-N-DVBT2 IF-P-DVBT2
FFA8
FFA4
3KA3
IF-AGC-DVBT2
2FAF
10p
3KA5
22K
3FAD
2K7
RES 3FA7
FFA5
10p
6K8
6K8 IFA6
2FAE
100R
100R
SOC-IF-AGC
7KA0 PDTA114EU RES
2K7
FFAC 3FA9
AGC-SWITCH
RES 3KA4
22n
FFAB
RES 3FA8
IF-AGC-DVBT2
2FAD
100R
RES 3KA2
VCC-TUNER 6
3
IFA3 5
2
7FA1-2 BC857BS(COL) 4
3FAC
10K
IFA4 3FAB
470R
IFA5
470R
7FA1-1 BC857BS(COL) 1
3FAA
FFAD
1n0
2FA3
1
100n
10u 2FA2
COM 2FA1
2FA0
RES
330u 6.3V
30R
IN
10p
3
2FA7
IFAA
5FAA
2 4
2FA8
1FA0 DBG
7FAA LD1117S33 +5V
2FA5
5FA1
VCC-TUNER
VCC-TUNER
5
Hybrid T/C tuner
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 107
B02B, Satellite tuner
Satellite tuner
B02B IRB1
3RB3
*
*
*
68p
4R7 10u 2RBV
*
2RB7
2RBU
100n
100n 2RB6
1n0 2RB5
1n0 2RB4
1n0 2RB3
2RB2
10n
2RBK
22u
2RBL
IRB0 9RB9
4n7
*
+3V3-DVBS
2RBE
1R01
*
1 2 3 4 5
AS NC
VIA
RF_IN
9RB8
27p
*
2 3RB1-2
7 34 35 36 37 38 39 40 41 42
*
8 100R
DVBS-QP DVBS-QN 10p
21 20
DVBS-IP DVBS-IN
10p
3 3RB1-3
5 100R
SYN HS 29 33
9RB7
2RB1
GND RF LNA LT MIX DIG BB VCO 5 3 9 10 15 17 25 26
XTAL 4 6 3RB1-4 100R 1 7 3RB1-1 100R
2RBS
RF_OUT
1K0
10p
I2C-ADDRESS: C6
AGC
100p
10p
QP QN
3RB0
10p
SATELLITE TUNER
18 19
2RB8
10p
SCL SDA
9RB6
*
0p56
RES 2RBG
*
100p
2RBY 27n 100p
1n0 2RBH
SM15T 2RBJ
FRB0
+V-LNB
4
XTAL_CMD
IP IN
Φ
27p
5RB0
6 7 8 9 10
2RBM
XTAL_IN
32
2RBR
23 24
+3V3-DVBS
XTAL_OUT
2RBP
16
SYN
2RBN
9RB0 RES
28
2RBC
2
VCO
10p
2RBD 3n3
RES 10p
27
2RBB
12 13
22
10p
1
14
MIX DIG BB VSS
2RBA
2RK1 DVBS-AGC
31
11
33n
SCL-S-TUNER SDA-S-TUNER
30
10p
RES 10p
8
2RB9
2RK0
1
6
LNA LT
2RBW
1RB0 16M 2RBF
7RB0 STV6110AT 2 NC 4 NX3225JB
3
10p
47p 6RB0
B02B
RES 2RBT
10-2-7
QFU1.2E LA
* * +3V3-DVBS
Diversity Matrix (Satellite Tuner dependant) Position Nr Affected Pin Default Value STV6110 STV6111 2RBY
4,5
100P
-
9RB8
4,5
JUMP
X
2RBM
4,5
27P
X
X
-
27
10U
2RBU
27
4N7
2RBV
27
68P
X X -
9RB9
27
JUMP
X
-
3RB3
27
4R7
X
2K2
2RB1
4,5
27P
2RBW
7
33N
9RB6
25
JUMP
9RB7
25
JUMP
2RB7
X X
-
X X
X
5
Satellite tuner
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 108
B02C, DVBT2 channel decoder
B02C
DVBT2 channel decoder
B02C
+3V3-DVBT2-D
+1V2-DVBT2-C
RES 2KCH
1K0 DKC0 IKC4 3KC7 2KCJ
48
10K IKC5
100n 3KC8 3K3
3KC9
1 47 2
IKC6
46 45
SCL SDA
TIFAGC
TTUSCL TTUSDA
3K3
25
DKC1
26
29
RESET-FUSION-OUTn
30 5KC8
+3V3-DVBT2-D IKCB
30R
33 40
SLVADR0
VIA
OSCEN_X
RST_X
SLVADR3
NC1 NC2
100n
100n
TS-CHDEC-DATA
SENSE+1V1-DVBT2
+1V2-DVBT2-C
5KCA
IKC8 +1V2-DVBT2-C
+1V2-FE RES 5KC5
IKC7 +3V3-DVBT2-D
VCC-TUNER 3KC2
SCL-FE SDA-FE
3KC3
47R 47R
50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74
30R RES 5KC7 +1V1-DVBT2
30R 5KC6
30R
+3V3 30R
+1V2-DVBT2-C
3KCE
IKC9 +1V2-DVBT2-P
22R
7KC0
GND_HS
+1V1-DVBT2
FKC1
CXD2834
+1V2
GAIA3
+1V1
RES
2KCL
VSS 6 11 18 23 27 31 36 39 43
RES
TESTMODE
20 21
3 3KC0-3 47R
49
24
2KC0
100n
2KC1 32
7 19 42
100n
100n 2KC2
2KC3
100n
10 22 28 44
GPIO0 GPIO1 GPIO2
IC ADDRESS = 0XD8
TS-CHDEC-CLK TS-CHDEC-VALID TS-CHDEC-SOP
1u0
3KC6
RFAIN
2
8 9 12 13 14 15 16 17
1 3KC0-1 47R
2KCR
41
IF-AGC-DVBT2
TAINP TAINM
47R
0 1 2 3 TSDATA 4 5 6 7
6p8 47R 8 2 3KC0-2 47R 6
7
10u
3KCB
38 37
3KC1
5 4 3
2KCS
47R IKC3
2KCG
+3V3-DVBT2-D
100n 2KC4
2KC6 12p
3KCA
47p
4u7
XTALO
1K0 IKC2
47p 2KCF 100n
34
RES 2KCK
DVDD PVDD TSCLK TSVALID TSSYNC
CVDD XTALI
1u0
100n
IKC1
35
2KCP
2KCE
5KC1 AGC-SWITCH
NC 2 1KC0 3KC4
IKCA
7KC0 CXD2834ER IKC0
30R
+1V2-DVBT2-P 5KC9
9KC0 9KC1
1
2KCD
4u7 IF-P-DVBT2 IF-N-DVBT2
100n 2KC5
2KC7
100n 4
5KC0
2KCB
12p
2KCC
41M 3
10n
10-2-8
QFU1.2E LA
5
DVBT2 channel decoder
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 109
B02D, DVBS/S2 channel decoder
DVBS/S2 channel decoder
B02D
+3V3-DEMOD
FRDA
2RDR
1
100n 10K
+3V3-DEMOD
31 3
RESET-FUSION-OUTn 9RD3
AGC-SWITCH
DVBS-QP DVBS-QN DVBS-IN DVBS-IP 5RDB
2RD7 100n 2RDA 100n 3RD2
9RD2
IF-AGC-DVBT2
IRDB
2RDH 100n
+3V3-DEMOD
9RD0 9RD1
IF-P-DVBT2 IF-N-DVBT2
2RD8 100n 2RD9 100n
3RD3 2RDF 100n
SDA-S-TUNER SCL-S-TUNER
1 2 29 30
DRD0 DRD1
10K
DVBS-AGC 22u
2RDS
30R
43 37 38 39 40
10K
41 42
2RDG 100n
3RD4
3RD5
47R
IRD5 IRD6
45 46
IRD3
4 5 6
47R +V-LNB
4K7
4K7
3RD9 1K0
8 21 27 47
RESETB GPIO_0|JTAG_TMS ADDR
TS_SYNC TS_VAL TS_ERR|GPIO_1 TS_CLK TS_DATA0|TS_SER TS_DATA1 TS_DATA2 TS_DATA3 TS_DATA4 TS_DATA5 TS_DATA6 TS_DATA7
RSSI_ADC S_ADC_IP S_ADC_IN S_ADC_QP S_ADC_QN MP_A MP_B MP_C MP_D
100n
2RD6
36 VDD_VANA
2RD4 9 VDD_VIO 22
7 20 28 48 XTA_O CLK_IN_OUT
SDA_HOST SCL_HOST
TC_ADC_P TC_ADC_N VIA
SDA_MAST SCL_MAST DISEQC_CMD DISEQC_IN DISEQC_OUT
13 12 26 14
3RD0-2 2 3RD0-1 1
15 16 17 18 19 23 24 25
3RD0-3 3
11 10
3RD1
7 8 47R
TS-DVBS-SOP TS-DVBS-VALID
6
TS-DVBS-DATA
47R 47R
TS-DVBS-CLK
47R
IRD0 3RD8 IRD1 47R
3RD7
SDA-FE SCL-FE
47R 50 51 52 53 54 55 56 57 58
GND1|JTAG_TCLK GND2|JTAG_TDI GND3|JTAG_TDO GND4|JTAG_TRSTB GND5 35
10n
2RDN
2RDM
30R
3RDB RES
+3V3-ANA
2RDT 100p
F22-DISECQ-TX
IRDC
3RDA RES
5RDC +3V3-DVBS
VDD_VCORE XTA_I|CLK_IN
2RD5
100n
2RDB 3RD6
XTAL
34
+3V3-DVBS
100n
100n 2RD3
100n 2RD2
100n 2RD1
22u 2RD0
22u 2RDL
RES 2RDJ 10p
32 44
+3V3-DVBS
COM 100n
33
6p8
30R
2 4
OUT
7RD0 SI2169-A10-GM
16M
GND_HS 49
IN
16V
3
22u
IRDA
22u
5RDA +5V
4 3 RES 2RDD
7RDA LD1117S33
NC
10p
RES 2RDE
2 1
22u RES 2RDK
30R 1RD0 NX3225JB
100n
+3V3-ANA
IRD2
5RDD +1V2-FE
RES 2RDC
B02D
2RDP
10-2-9
QFU1.2E LA
+3V3-DEMOD
5
DVBS/S2 channel decoder
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 110
B03A, Fusion
B03A
Fusion
B03A
7J00-6 FUSION120
AG29 AD26 AH29 AJ29 AF28 AH30 AG28 AJ30 AJ28 AJ27 AF27 AG27 AG24 AE23 AK22 AJ26
FRA5 FRA6 FRA7 FRA8 CA-OEn
FRA10 FRA11 FRA12 NAND-CLE NAND-ALE CA-A14
F-OEn F-WEn
AK29 AK24
F-CEn TS-DVBS-DATA TS-DVBS-VALID TS-DVBS-SOP TS-DVBS-CLK
AJ24 AE26 AF23 AK28 AH24 AG22 AG23
CA-A06
F-RDY
PODA4 PODA5 POD_A7 POD_A8 POD_A9 PODIREQ PODRST PODVS1 PODWAIT POD_DIR PODCE1 PODCE2 PODCD1 POD_CD2
POD_VCC_EN FRA0_AD0 POD_VPP_EN FRA1_PODWE HPD FRA2_PODIORD FRA3_PODIOWR FRA4_PODREG GPIO0 FRA5_AD1 GPIO1 FRA6_AD2 GPIO2 FRA7_AD3 GPIO3 FRA8_AD4 GPIO4 FRA9_PODOE GPIO5 FRA10_AD5 GPIO6 FRA11_AD6 GPIO7 FRA12_AD7 GPIO8 FRA13_CLE GPIO9 FRA14_ALE GPIO10 FRA15_PODA14 GPIO11
FOE FWE BOOTCS FCE2N FINT1 FINT2 FCLK FAVD_PODA6 FREADY
GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24
TS_TSB_MCU
AJ22 AH22 AF22 AJ23 AH23
CA-A04 CA-A05 CA-A07 CA-A08 CA-A09
AE27 AG30 AF30 AE28 AE30
CA-RDY CA-RST CA-VS1n CA-WAITn
FJ16
AD28 AD27 AF29 AD30
CA-CE1n CA-CE2n CA-CD1n CA-CD2n
AE29 AD29 R30 E1 F3 F4 F2 F1 G6 G5 G4 G3 G2 G1 H6 J6 J5 J4 J3 J2 J1 H1 H2 H3 H4 H5
GPIO0 GPIO1 GPIO2 GPIO3
CA-MDO0 CA-MDO1 CA-MDO2 CA-MDO3 CA-MDO4 CA-MDO5 CA-MDO6 CA-MDO7
AG20 AH20 AJ20 AK20 AE21 AF21 AG21 AH21
CA-MOCLK CA-MOSTRT CA-MOVAL
AJ21 AK21 AE22
TS-CHDEC-DATA TS-CHDEC-CLK TS-CHDEC-SOP TS-CHDEC-VALID IF-IN-P
U28 U29 U30 T26
IF-IN-N
2FZ1
F30 F29
10p 2FZ2
GPIO5 GPIO6 GPIO7 GPIO8
33R
GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24
E28 E27
2FZ4 2J10
GPIO11 3FZ1
100n 2FZ3
100n
18p
0 1 2 3 TS1D 4 5 6 7
H30
2 4
H29
TSSDI TSSCLK TSSSYNC TSSDEN
IN_P IN_N P PD N
XTLI24M XTLO24M
2J11 18p
RESET-STANDBYn
J26
TEST-CON TEST-MOD
P30 P29
ENABLE-STANDBY
H25
SPI-EN SF-SDI SF-SDO SF-WP SF-HOLDn SF-CS SF-CLK
K28 L28 L26 K30 L27 L29 L30
0 1 2 3 TS2OD 4 5 6 7 TS2OCLK TS2OSYNC TS2ODEN
AH18 AJ18 AK18 AE19 AF19 AG19 AH19 AJ19
MDI0 MDI1 MDI2 MDI3 MDI4 MDI5 MDI6 MDI7
AK19 AE20 AF20
MICLK MISTRT MIVAL
2FZ5 TS1CLK TS1SYNC TS1DEN
10p
RES 2FZ6 47p
3
FRA0 CA-WEn CA-IORDn CA-IOWRn CA-REGn
FRD0_PODD0 FRD1_PODD1 FRD2_PODD2 FRD3_PODD3 FRD4_PODD4 FRD5_PODD5 FRD6_PODD6 FRD7_PODD7 FRD8_PODA0 FRD9_PODA1 FRD10_PODA2 FRD11_PODA3 FRD12_PODA10 FRD13_PODA11 FRD14_PODA12 FRD15_PODA13
24M
AK23 AF26 AE24 AK25 AH25 AH27 AK27 AJ25 AF25 AG26 AK26 AG25 AE25 AH26 AH28 AF24
1J00
CA-D00 CA-D01 CA-D02 CA-D03 CA-D04 CA-D05 CA-D06 CA-D07 CA-A00 CA-A01 CA-A02 CA-A03 CA-A10 CA-A11 CA-A12 CA-A13
7J00-7 FUSION120
FLASH_CI_GPIO
1
10-2-10
QFU1.2E LA
RSTN
TESTCON TESTMOD STB_EN
SPI_EN SFSI SFSO SFWPN SFHOLDN SFCES SFSCK
TAGCO
IF RF
DGPIO
1 2
0 1 2 3 4 STB_GP 5 6 7 8 9 10 TXD RXD STB SDA SCL LED IR KYBRD LGSEN CEC PWRON AVLINK
1 2
PCVS PCHS STB_RSTO HP_DETECT MUTE
F27 G26
3FZ0
4n7
SOC-IF-AGC
100R
FJ10
T28 T29
M27 M26 M25 N30 N29 N28 N27 N26 N25 P25 P26
STB-GP0 STB-GP1 STB-GP2 STB-GP3 STB-GP4 STB-GP5 STB-GP6 STB-GP7 STB-GP8 STB-GP9 STB-GP10
R27 R28 P27 P28
STB-TXD STB-RXD STB-SDA STB-SCL
J25 M29 J30 M30 M28 R29
LED IR KYBRD LGSEN HDMI-CEC PWRON
K25 K26
AVLINK1 AMBI-TEMP-FUS
J27 J28 J29
STB-RSTO
K27
HP-DETECT
H26
AUDIO-MUTEn
5
Fusion
2012-11-08
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2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 111
B03B, Fusion Umac controller
Fusion Umac controller
B03B 7J00-8 FUSION120
2J05
100n
1K0
3J06
3J00 MM0ANA
FJ01
240R 1%
AE11 AE12 AE7 AD18
P1 P2
M1-MCLK0 M1-MCLK0#
U7 U6 AA5 K6 AB4
M1-MVREF1
3J01
240R 1% MM1ANA
+1V5-M1
P MM0CK N DDR-RTN
0 MM0VREF 1 MZQ0 MM0ANA_TEST
MM0ANA
+1V5-M1
2J04
M0-MVREF0
M1-BA0 M1-BA1 M1-BA2 M1-CAS# M1-RAS# M1-WE# M1-CKE M1-ODT M1-RESET# M1-CS#
100n
AK14 AJ14
P MM1CK N 0 1 MM0BA 0 2 MM1VREF 1 MM0CASN MZQ1 MM0RASN MM0WEN MM1ANA_TEST MM0CKE DDR_RETN MM0ODT MM0RESETN MM0CSN
U1 P5 R1 T3 V2 U3 R3 V1 N4 P4
2J03
M0-MCLK0 M0-MCLK0#
M0-MVREF0
0 MM1BA 1 2 MM1CASN MM1RASN MM1WEN MM1CKE MM1ODT MM1RESETN MM1CSN
M1-MA0 M1-MA1 M1-MA2 M1-MA3 M1-MA4 M1-MA5 M1-MA6 M1-MA7 M1-MA8 M1-MA9 M1-MA10 M1-MA11 M1-MA12 M1-MA13 M1-MA14 M1-MA15
100n
1K0
3J05
2J06
100n
FJ05
MM0DQS3
0 1 2 3 4 5 6 7 MM0A 8 9 10 11 12 13 14 15
DB47
T2 L2 N1 N3 L3 N5 L5 N2 M3 L4 R5 M1 T1 M5 L1 R2
1K0
AG12 AF14 AK13 AH12 AF12 AF11 AH13 AG11 AG15 AG14
MM0DQS2
M1-DQS0 M1-DQS#0 M1-DQS1 M1-DQS#1
3J03
M0-BA0 M0-BA1 M0-BA2 M0-CAS# M0-RAS# M0-WE# M0-CKE M0-ODT M0-RESET# M0-CS#
+1V5-M0
MM0DQS1
AA2 AA3 V3 V4
M1-DQM0 M1-DQM1
1K0
AJ12 AJ17 AK15 AH15 AH17 AF15 AF17 AJ15 AH16 AG17 AF13 AK16 AK12 AF16 AK17 AJ13
MM0DQS0
DB78 DB75
3J04
M0-MA0 M0-MA1 M0-MA2 M0-MA3 M0-MA4 M0-MA5 M0-MA6 M0-MA7 M0-MA8 M0-MA9 M0-MA10 M0-MA11 M0-MA12 M0-MA13 M0-MA14 M0-MA15
P N P N P N P N
0 1 2 3 4 5 6 7 MM1A 8 9 10 11 12 13 14 15
DB76
FJ04
M1-MVREF1
MM1ANA
DB73
FJ03
2J02
AK7 AK6 AJ10 AK10 AF2 AF1 AH4 AG4
DB14 DB16
P N P MM1DQS1 N MM1DQS0
AA1 W3
DB79 DB77
100n
M0-DQS0 M0-DQS#0 M0-DQS1 M0-DQS#1 M0-DQS2 M0-DQS#2 M0-DQS3 M0-DQS#3
0 1 MM0DM 2 3
0 1
M1-MD0 M1-MD1 M1-MD2 M1-MD3 M1-MD4 M1-MD5 M1-MD6 M1-MD7 M1-MD8 M1-MD9 M1-MD10 M1-MD11 M1-MD12 M1-MD13 M1-MD14 M1-MD15
1K0
AJ6 AK9 AE1 AH3
M0-DQM0 M0-DQM1 M0-DQM2 M0-DQM3
MM1DM
W2 AC2 Y1 AC1 Y3 AB1 W1 AB3 T5 Y4 T4 W5 U5 Y5 U4 W4
3J02
DB74
0 1 2 3 4 5 6 7 MM1DQ 8 9 10 11 12 13 14 15
2J00
DB72
DDR3 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 MM0DQ 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
100p
AH8 AH5 AH7 AJ5 AK8 AH6 AJ8 AK5 AK11 AF9 AJ11 AG9 AF10 AG8 AH10 AH9 AG1 AF3 AE3 AH1 AH2 AD3 AD1 AD2 AK4 AG3 AJ3 AK2 AK3 AJ2 AG5 AJ1
DB71
M0-MD0 M0-MD1 M0-MD2 M0-MD3 M0-MD4 M0-MD5 M0-MD6 M0-MD7 M0-MD8 M0-MD9 M0-MD10 M0-MD11 M0-MD12 M0-MD13 M0-MD14 M0-MD15 M0-MD16 M0-MD17 M0-MD18 M0-MD19 M0-MD20 M0-MD21 M0-MD22 M0-MD23 M0-MD24 M0-MD25 M0-MD26 M0-MD27 M0-MD28 M0-MD29 M0-MD30 M0-MD31
2J07
B03B
100n
10-2-11
QFU1.2E LA
FJ02
DB80
DB85
DB81
DB86
DB82
DB87
DB83
DB88 DB89
5
Fusion Umac controller
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 112
B03C, Umac 1 DDR3
B03C
Umac 1 DDR3
B03C +1V5-M1
+1V5-M1
100R
3J25 100R 3J27
3J26
3J29
3J28
3J2B
100R
100R 3J2D
3J2C
3J2F 3J2H
3J2G
100n
240R
DB49
DB52
DB51
K4 L8 L4 K3 L9 L3 M9 M3 N9 M4 H8 M8 K8 N4 N8
RAS ODT CAS CK CK CKE CS WE RESET
NC
E2 J9
DDR-MVREF12
DB57
H9
M1-MA15
DB06
DB64 DB53
M1-BA0 M1-BA1 M1-BA2 M1-RAS# M1-ODT M1-CAS# M1-MCLK0 M1-MCLK0#
VSSQ
DB54
DB55
J3 K9 J4 F4 G2 G4 F8 G8 G10 H3 H4 N3
B10 C2 E3 E10
VDD
VDDQ
0 1 2 3 4 5 6 7 A 8 9 10 11 12 13 14 BC AP
TDQS TDQS DM DQS DQS
0 1 2 3 DQ 4 5 6 7
VREFDQ VREFCA
A8 B8
DB58
M1-DQM1
C4 D4
DB90 DB91
M1-DQS1 M1-DQS#1
B4 C8 C3 C9 E4 E9 D3 E8
M1-MD14 M1-MD15 M1-MD10 M1-MD11 M1-MD12 M1-MD13 M1-MD8 M1-MD9
ZQ BA0 BA1 BA2 RAS ODT CAS CK CK CKE CS WE RESET
NC
VSS
A1 A4 A11 F2 F10 H2 H10 J8 N1 N11
M1-MA15
A2 A9 B2 D9 F3 F9 J2 J10 L2 L10 N2 N10
VSSQ
100R 3J2R 100R
M1-MCLK0#
3J2T 100R
2J1A
100n
1K0
2J1B
1K0
3J15
FJ09
DDR-MVREF12
+1V5-M1
3J14
+1V5-M1
100n
3J2S
+1V5-M1
10n
10n 2J1J
10n 2J1G
10n 2J1E
100n 2J1C
100n 2J21
100n 2J1Z
2J1V
+1V5-M1
DB93
DB98
DBA3
DB94
DB99
DBA4
DB95
DB59
DBA5
DB96
DBA1
DBA6
DB97
DBA2
DBA7
10n
10n 2J1K
10n 2J1H
10n 2J1F
100n 2J1D
100n 2J20
100n 2J1W
+1V5-M1
2J1U
100R 100R
A1 A4 A11 F2 F10 H2 H10 J8 N1 N11
BA0 BA1 BA2
3J2P
3J2N 3J2Q M1-RESET#
DB41
M1-MD0 M1-MD5 M1-MD6 M1-MD1 M1-MD2 M1-MD7 M1-MD4 M1-MD3
DB50
M1-CKE M1-CS# M1-WE# M1-RESET#
10n
100R
DB40
100R
10n
M1-CKE
3J2M
3J2L
10n 2J84
100R
10n 2J88
M1-ODT
3J2K 100R
10n 2J83
M1-CS#
M1-DQS0 M1-DQS#0
100R 3J2J
10n 2J87
100R 100R
10n 2J82
M1-WE#
DB42 DB43
M1-MA0 M1-MA1 M1-MA2 M1-MA3 M1-MA4 M1-MA5 M1-MA6 M1-MA7 M1-MA8 M1-MA9 M1-MA10 M1-MA11 M1-MA12 M1-MA13 M1-MA14
ZQ
VSS
M1-CKE M1-CS# M1-WE# M1-RESET#
100R
100n 2J81
M1-CAS#
100R 3J2E
10n 2J86
100R 100R
100n 2J85
M1-RAS#
DB01 DB39
100n 2J1T
M1-BA2
+1V5-M1
100R 3J2A
10u 2J1S
100R
10u 2J1R
M1-BA1
M1-MCLK0
100R
F4 G2 G4 F8 G8 G10 H3 H4 N3
DB35 DB36 DB38
2J22
100R
M1-BA0 M1-BA1 M1-BA2 M1-RAS# M1-ODT M1-CAS# M1-MCLK0 M1-MCLK0#
VREFDQ VREFCA
C4 D4
B4 C8 C3 C9 E4 E9 D3 E8
0 1 2 3 DQ 4 5 6 7
A2 A9 B2 D9 F3 F9 J2 J10 L2 L10 N2 N10
3J24
M1-BA0
1K0
100R
10u 2J25
100R
J3 K9 J4
DB62 3J23
2J24
M1-MA15
3J11
3J21 100R
3J22 100R
H9 3J10
100R 3J20
M1-MA14
2J14
3J1Z
3J1W
100n 2J15
100R
3J1V 100R
2J27
100R
M1-MA13
100R 3J1U
47u 16V
M1-MA12
E2 J9
DDR-MVREF11
75R
100R
DDR-MVREF11
DQS DQS
M1-DQM0
75R
100R
M1-MA11
FJ08
3J1T
3J1S M1-MA10
DB33 DB34
3J1R
3J1Y
1K0
100R
DB32
100R
3J12
M1-MA9
3J1P
3J1N
3J16
100R
100R
3J17
M1-MA8
3J1M
3J1L
2J16
100R
3J1K 100R 100n
M1-MA7
100R 3J1J
2J17
100R
100n
100R
M1-MA6
RES
M1-MA5
DB31
DB56
B3 B9 C10 D2 D10
3J1H
A8 B8
240R
100R 3J1G
7J02 H5TQ2G83BFR TDQS TDQS DM
100n
100R
10n
M1-MA4
+1V5-M1
3J1F
3J13
3J1D 100R
3J1E
VDDQ
VDD 0 1 2 3 4 5 6 7 A 8 9 10 11 12 13 14 BC AP
2J18
100R 3J1C
2J12
100R
10n
100R
M1-MA3
K4 L8 L4 K3 L9 L3 M9 M3 N9 M4 H8 M8 K8 N4 N8
100n 2J19
3J1B
3J1A M1-MA2
M1-MA0 M1-MA1 M1-MA2 M1-MA3 M1-MA4 M1-MA5 M1-MA6 M1-MA7 M1-MA8 M1-MA9 M1-MA10 M1-MA11 M1-MA12 M1-MA13 M1-MA14
100R
100R
B3 B9 C10 D2 D10
3J19
3J18 M1-MA1
A3 A10 D8 G3 G9 K2 K10 M2 M10
M1-MA0
B10 C2 E3 E10
A3 A10 D8 G3 G9 K2 K10 M2 M10
+1V5-M1 7J01 H5TQ2G83BFR
2J89
10-2-12
QFU1.2E LA
5
Umac 1 DDR3
2012-11-08
3104 313 6618 19370_012_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 113
B03D, Umac 0 DDR3
B03D
Umac 0 DDR3
B03D +1V5-M0
3J3D 100R 3J3F
3J3E
3J3K 3J3M
3J3L 100R
3J41
3J40 100R
3J43
3J42 100R
100R
3J45
3J44
3J47
3J46 100R
3J49
3J48
3J4B
3J4A 100R
3J4D
3J4C
3J4F 3J4H
3J4G
100n
240R 1%
DB13 DB15
M0-DQS1 M0-DQS#1
E3 F7 F2 DB69 F8 H3 H8 DB17 G2 H7
M0-MD15 M0-MD12 M0-MD9 M0-MD10 M0-MD11 M0-MD14 M0-MD13 M0-MD8
NC
VSS
VSSQ
J1 J9 L1 L9
DB18 DB19
DB20 DB21
H1 M8
DDR-MVREF02
L8 M2 N8 M3
DB67
DB22
M0-BA0 M0-BA1 M0-BA2 M0-RAS# M0-ODT M0-CAS# M0-MCLK0 M0-MCLK0#
3J4M
3J4L 100R
DB23
J3 K1 K3 J7 K7 K9 L2 DB24 L3 T2 E7 D3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9 VDDQ
0 1 2 3 4 5 A 6 7 8 9 10 11 12 13 14 15 BC AP
0 1 2 3 DQU 4 5 6 7 DQSU DQSU DQSL DQSL 0 1 2 3 DQL 4 5 6 7
VREFDQ VREFCA ZQ BA0 BA1 BA2 RAS ODT CAS CK CK CKE CS WE RESET DML DMU
NC
VSS
VSSQ
D7 C3 C8 C2 A7 A2 B8 A3
DB25
DB26
C7 B7
M0-MD16 M0-MD18 M0-MD20 M0-MD23 M0-MD17 M0-MD21 M0-MD19 M0-MD22 M0-DQS2 M0-DQS#2
F3 G3
DB27 DB29
E3 F7 F2 F8 H3 H8 G2 H7
DB30
DB70
M0-DQS3 M0-DQS#3 M0-MD29 M0-MD28 M0-MD25 M0-MD26 M0-MD27 M0-MD30 M0-MD31 M0-MD24
J1 J9 L1 L9
M0-DQM3 M0-DQM2
M0-MCLK0#
3J4P 100R
2J2E
100n
1K0
2J2F
1K0 10n
10n 2J2V
10n 2J2T
100n 2J2R
100n 2J3E
100n 2J3C
2J3A
10n 2J2Z
+1V5-M0
+1V5-M0
DBC3
DBB3
DBB8
DBB4
DBB9
DBC4
DBB5
DBC0
DBC5
+1V5-M0 DBB6
DBC1
DBC6
DBB7
DBC2
DBC7
10n
10n 2J2W
10n 2J2U
100n 2J2S
100n 2J3D
100n 2J3B
2J39
+1V5-M0
10n 2J30
10n
3J31
FJ0B
DDR-MVREF02
10n
3J30
+1V5-M0
100n
3J4N 100R
F3 G3
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
100R
10n 2J2P
100R
M0-DQS0 M0-DQS#0
VDD M0-MA0 M0-MA1 M0-MA2 M0-MA3 M0-MA4 M0-MA5 M0-MA6 M0-MA7 M0-MA8 M0-MA9 M0-MA10 M0-MA11 M0-MA12 M0-MA13 M0-MA14 M0-MA15
M0-CKE M0-CS# M0-WE# M0-RESET#
10n 2J2M
M0-RESET#
DB11 DB12
M0-DQM1 M0-DQM0
10n 2J2Y
100R
DML DMU
C7 B7
3J4K
3J4J M0-CKE
E7 D3
DB10
DB09
100R
10n 2J2N
100R
100R
10n 2J2K
M0-ODT
RAS ODT CAS CK CK CKE CS WE RESET
100R 3J4E
10n 2J2L
100R
100n 2J2H
100R
M0-CS#
100n 2J38
M0-WE#
DB66
M0-CKE M0-CS# M0-WE# M0-RESET#
100n 2J37
100R
RES
100n 2J2J
M0-CAS#
100R
100n 2J36
100R
100n 2J35
M0-RAS#
DB65 DB08
100n 2J34
100R
+1V5-M0
100n 2J33
M0-BA2
100R
10u 2J32
100R
10u 2J31
M0-BA1
J3 K1 K3 J7 K7 K9 L2 L3 T2
DB60 DB04 DB05 DB07
10u 2J3G
M0-BA0
M0-MCLK0
10u 2J3J
100R
2J3F
M0-MA15
M0-BA0 M0-BA1 M0-BA2 M0-RAS# M0-ODT M0-CAS# M0-MCLK0 M0-MCLK0#
0 1 2 3 DQL 4 5 6 7
BA0 BA1 BA2
3J3Z 100R
DQSL DQSL
ZQ
M2 N8 M3
DB68
100R 3J3W
2J3H
100R
2J3K
100R
M0-MA14
L8 3J2U
3J3V
3J3U M0-MA13
2J28
3J3T 100R
100n 2J29
100R 3J3S
47u 16V
100R 100R
DQSU DQSU
VREFDQ VREFCA
3J3R
3J3Y
M0-MA12
H1 M8
DDR-MVREF01
100R
100R
M0-MA11
DDR-MVREF01
1K0
M0-MA10
FJ0A
3J3P
3J3N
75R
100R
3J32
M0-MA9
DB02 DB03
100R
75R
100R
3J33
M0-MA8
1K0
100R 3J3J
100n
3J3H
3J3G
3J2V
100R
3J2W
M0-MA7
100R 2J2A
100R
100n
M0-MA6
DB61
DB00
M0-MD0 M0-MD5 M0-MD4 M0-MD7 M0-MD2 M0-MD1 M0-MD6 M0-MD3
B1 B9 D1 D8 E2 E8 F9 G1 G9
100R 3J3C
2J2B
100R
10n
100R
M0-MA5
2J01
M0-MA4
D7 C3 C8 C2 A7 A2 B8 A3
240R 1%
3J3B
3J3A
7J04 H5TQ2G63BFR-PBC 0 1 2 3 DQU 4 5 6 7
100n
100R
100R
10n
M0-MA3
+1V5-M0
3J2Z
3J39
100n 2J2D
100R 3J38
0 1 2 3 4 5 A 6 7 8 9 10 11 12 13 14 15 BC AP
2J2C
100R
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
B1 B9 D1 D8 E2 E8 F9 G1 G9
3J37
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
100R
100R 3J36
M0-MA2
M0-MA0 M0-MA1 M0-MA2 M0-MA3 M0-MA4 M0-MA5 M0-MA6 M0-MA7 M0-MA8 M0-MA9 M0-MA10 M0-MA11 M0-MA12 M0-MA13 M0-MA14 M0-MA15
3J35
3J34 M0-MA1
VDDQ
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
VDD M0-MA0
+1V5-M0
A1 A8 C1 C9 D2 E9 F1 H2 H9
7J03 H5TQ2G63BFR-PBC
B2 D9 G7 K2 K8 N1 N9 R1 R9
+1V5-M0
2J2G
10-2-13
QFU1.2E LA
5
Umac 0 DDR3
2012-11-08
3104 313 6618 19370_013_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts 10-2-14
QFU1.2E LA
10.
EN 114
B03E, Fusion
B03E
Fusion
B03E 7J00-5 FUSION120
PANEL_USB LAN_IO TA1_P
7J00-4 FUSION120 A22 B22 E22 D22 A23 B23 E23 D23 A24 B24 E24 D24
AR-1 AL-1
AR-3 AL-3 AR-4 AL-4
D26
SPDIFIN 3J53
SCKIN WSI2SIN SDI2SIN
3J54 10R
10R 3J55 10R IJ11
C26 B26 A26
AC28 C15 A15 B16 A16
CVBS CVBS3
C16 Y-G1 PB-B1 PR-R1
A20 A19 A18
Y-G2 PB-B2 PR-R2
B20 B19 B18
Y-G3 PB-B3 PR-R3
C20 C19 C18
IJ12 IJ13 SC1-STATUS FB1
D20 D19 D18 C17 B17 D17 A17
AV_IN_OUT AR_1 AL_1 AR_2 AL_2 AR_3 AL_3 AR_4 AL_4 AR_5 AL_5 AR_6 AL_6
HPHOL HPHOR SUBO SPK_AOR1 SPK_AOL1 AOR2 AOL2
SPDIFIN
SPDIFO
SCKIN WSI2SIN SDI2SIN
SCKI2SOUT WSI2SOUT 1 SDI2SOUT 2 3 I2SCLK
B21 A21
HPHOL HPHOR
C21 A25 B25 D25 C25
AUD-L AUD-R
USB1-RREF
E26 Y26 Y27 AA30 AA29 AB28 Y25
SPDIFO 3J07 3J08 3J09 3J50 3J51 3J52
GPANA1
10R 10R 10R 10R 10R 10R
SCKI2SOUT WSI2SOUT SDI2SOUT1 SDI2SOUT2 SDI2SOUT3 I2SCLK
1 2 CVBS 3 4 C Y_G1 PB_B1 PR_R1 Y_G2 PB_B2 PR_R2 Y_G3 PB_B3 PR_R3 Y_G4 PB_B4 PR_R4 FS1 FB1 FS2 FB2
1 CVBS_OUT 2
USB1-DP USB1-DM
A14 A13
AB30 AB29 AB26 AB27
USB2-RREF
AC30 AC29 AB25 AC27
EN-RXD0 EN-TXD0 EN-RXD1 EN-TXD1 FJ0F FJ0G FJ0H FJ0J
W29 V29 W28 V28 W27 V27 W26 V26
EN-RXC EN-TXC
V25 U25
EN-RXEN EN-TXEN
W30 V30
EN-MDC EN-MDIO
W25 Y30
HDMIF-RX0+ HDMIF-RX0HDMIF-RX1+ HDMIF-RX1HDMIF-RX2+ HDMIF-RX2HDMIF-RXC+ HDMIF-RXC-
A29 B29 A28 B28 A27 B27 B30 C30
HEAC
T27
PWR5V
T30
RREF
C29
USB2-DP USB2-DM
CVBS-OUT1 IJ10
D1_P D1_N USBPPON1 TXRTUNE1 D2_P D2_N USBPPON2 TXRTUNE2
GBE_RXD0 GBE_TXD0 GBE_RXD1 GBE_TXD1 GBE_RXD2 GBE_TXD2 GBE_RXD3 GBE_TXD3 GBE_RXC GBE_TXC GBE_RXEN GBE_TXEN GBE_MDC GBE_MDIO
RX0_P RX0_N RX1_P RX1_N RX2_P RX2_N RXC_P RXC_N HEAC PWR5V
TA1_N TB1_P TB1_N TC1_P TC1_N TCLK1_P TCLK1_N TD1_P TD1_N TE1_P TE1_N TA2_P TA2_N TB2_P TB2_N TC2_P TC2_N TCLK2_P TCLK2_N TD2_P TD2_N TE2_P TE2_N TA3_P TA3_N TB3_P TB3_N TC3_P TC3_N TCLK3_P TCLK3_N TD3_P TD3_N TE3_P TE3_N TA4_P TA4_N TB4_P TB4_N TC4_P TC4_N TCLK4_P TCLK4_N TD4_P TD4_N TE4_P TE4_N
RREF H_BK_LITE PWM0 PWM1 BOOST BKLGON TCON_ON NC_IDP_HPD NC_LOCKN NC_HTPDN
B3 A3 C3 C4 A4 B4 B5 A5 C5 C6 A6 B6
TX1-ATX1-A+ TX1-BTX1-B+ TX1-CTX1-C+ TX1-CLKTX1-CLK+ TX1-DTX1-D+ TX1-ETX1-E+
B9 A9 C9 C10 A10 B10 B11 A11 C11 C12 A12 B12
TX2-ATX2-A+ TX2-BTX2-B+ TX2-CTX2-C+ TX2-CLKTX2-CLK+ TX2-DTX2-D+ TX2-ETX2-E+
E3 D3 E4 D4 F5 F6 D5 E5 D6 E6 D7 E7
TX3-ATX3-A+ TX3-BTX3-B+ TX3-CTX3-C+ TX3-CLKTX3-CLK+ TX3-DTX3-D+ TX3-ETX3-E+
E10 D10 F10 F11 D11 E11 E12 D12 F12 F13 D13 E13
TX4-ATX4-A+ TX4-BTX4-B+ TX4-CTX4-C+ TX4-CLKTX4-CLK+ TX4-DTX4-D+ TX4-ETX4-E+
D2 B2 C1 B1 A2 C2 E9 F9 G9
BL-SPI-CLK-FUS 3D-LR-FUS BL-SPI-CS_BL-I-CTRL-FUS BL-DIM-FUS
7J00-9 FUSION120
RXD-SERVICE TXD-SERVICE
Y29 Y28
EJT-TCK EJT-TMS EJT-TDO EJT-TDI EJT-TRSTN
K2 K3 K1 K5 K4
JTAG_I2C UART SCLS RXD TXD
TCK TMS TDO TDI TRSTN
SDAS
SCLM1 SDAM1 SCLM2 SDAM2 SCLM3 SDAM3
U26 U27
AA28 AA27
SCL-M1 SDA-M1
E2 D1
SCL-M2 SDA-M2
AA26 AA25
SCL-M3 SDA-M3
BL-SPI-SDO-FUS 9GA2 RES IJ0T IJ0U
5
Fusion
2012-11-08
3104 313 6618 19370_014_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 115
B03F, Fusion power supply
Fusion power supply 10u
10u 2J63
100n 2J64
100n 2J62
100n 2J61
100n 2J5Z
100n 2J5W
100n 2J5V
100n 2J5U
100n 2J60
10u
10u 2J7L
100n 2J77
10n
100n
100n 2J76
100n 2J75 10n 2J6V
10n
10n 2J6U 10n 2J6L 10n 2J67
10n
10n 2J6F 10n 2J66
10n 2J6C
100n 2J74
100n 100n 2J73
10n 2J6E 10n 2J65
10n 2J6P
10u 2J7K
10u 2J7J 100n 2J7D
100n 2J7C 100n 2J71
100n 2J72
10n 2J6D 10n 2J68
10n 2J6N
100n 2J70 10n 2J6Y 10n 2J6G 10n 2J69
10n 2J6M
10u 2J7G 100n 2J7B
10u 2J7H
2J7E 2J79
100n 2J7A 10n 2J6R 10n 2J6H 10n 2J6A
100n 2J6Z
2J6W 2J6S 2J6J 2J6B 2J95
2J08
220u 2V0 100n
10n 10n 2J09
10n 2J23
2J5A 2J80
10n
2J5L 10n
2J5M
+1V5
10n
2J59 10u
120R
2J93
2J5B 10u 10n
2J5C 100n 2J5F
5J0P
2J5K 10n
100n
2J5D 100n
2J5H 10n
VDDC
10n
AA15 Y15 W15 W16 W14
+1V5-M0 IJ0R
2J5G 10n
2J78
+1V2-MIPS
120R
2J5N 10n
100n
2J6T
SENSE+1V2-MIPS
+1V5 5J0R
10n
10n
10n
2J98
K29
+1V5-M1 IJ0S
2J94
100n
2J4N 120R
10u
LDO11_CAP
5J0G +1V1-FA
K13 L13
2J7F 10n
GNDP
G11
22u
1n0
2J58
10u
IJ0P VDDP
2J26
IJ0K
5J0N +3V3
A8 B8 C8 D9 K11 L11
100u 2.0V
LVDSGND
120R
2J13
VSS11A_3
5J0F +2V5-F
2J4M 10u
VDD33A
IJ0N
2J4Y
2J55
10n 10u
2J54
2J53
100n
D30 D28
LVDSVDD
VSS11A_1
2J4P 10u
+2V5
AVDD25_HDMI
A7 B7 C7 D8 E8 F8 G8
100n
D29 C27
IJ0J
5J0M
VSS11A_2
4n7
2J52
10n 10u
2J51
2J50
100n
D27
VDD11A
2J4R
C28
R4 AB5 AC5 M6 N6 V6 W6 Y6 AA6 AB6 AC6 M7 N7 V7 W7 Y7 AA7 AB7 AC7 P11 V11 P12 V12 P10 V10 W10 Y10
10n 2J7Y
VQPS
N24
10u
AVSS25 AVSS25
10n 2J7P
10n
10n
2J4G 2J96
1u0 10n
2J4H
2J4F
REF_BG
IJ0H
5J0L +1V1-FA
120R
+2V5-F
R10 R11 U10 U11
120R
100n 2J92
100n
10u 2J4W
2J4Z
K12 L12
AVDD25
5J0E
AC3 AC4
10n 2J7R
VSS_M1P G10
120R
120R
VSSAC_1
IJ0G
5J0K +2V5
120R
VDD2V5_M1P
VDD33
1u0
AB24
IJ0M
VSSAC_2
2J4J
AC24
VDD25
2J4L
10u
100n
2J4U
AC25 2J4V
120R
100n
AC26
IJ0F
5J0J +3V3
Y12 Y13 Y14 AA13 AA14
120R
2J99
VSS_M0P
+2V5-F 100n
10u
2J4S
100n
2J4T
120R
5J0D
AG6 AG7
SENSE+1V1-FD
100n 2J7Z
IJ0L
VDD2V5_M0P
2J97
SUPPLY_2 IJ0E
5J0H +2V5
+1V1-FD
IJ00
10n 2J7S
9J04
9J03
7J00-2 FUSION120
100n 2J7W
+2V5-F
2J7V
5J0C 120R
10n 2J7T
IJ0D
2J7U
K16 L16
VDDC
+3V3
G15
VDDC
5J0B 120R
VSS
2J44
IJ0C
IJ14
VDDM0
VDD25_LPLL VSSA_LPLL
B13 C13
100n
2J91
AVSSH
2 3 INN 4
100n
100n
DAC2
+3V3
C14
2J4C
100n
E18 E19 E20
AVDDH
INN16
5J0A 120R
2J4A
DAC1
2J4B 10u
VDD33_XTAL
B14
2J4E
AVDDH
2J4D 10u
AVSS_STB
100n
E17
2J90
120R
VDDM1
E21 F21
AVSSH
+3V3-STANDBY 10u 2J3Z
AVSS
5J09 +3V3
2J49 10u
100n
10u 2J3V
2J3W IJ06
2J40
G22 G23
IJ0B J24 H28
5J06
AVDD33_STB
AVDD
PWR_GND
K24
120R
AVSSH_CH516
VDDM0
IJ05
+3V3-STANDBY
IJ0A
AVDDH_CH516
M11 G12 M12 T12 W12 G13 M13 P13 T13 V13 W13 D14 E14 F14 G14 M14 P14 T14 V14 D15 E15 F15 M15 P15 T15 V15 M16 P16 T16 V16 M17 P17 T17 V17 W17 M18 P18 T18 V18 W18 M19 P19 T19 V19 W19 L20 M20 N20 P20 R20 T20 U20 V20 W20 Y20 G21 L24 M24 L25 T11 K10 K21 L10 L21 M10 M21 N21 P21 R21 T10 T21 U21 V21 W21 Y21 AA20 AA21
AA12 AA11 AA10 AE14 AD14 AE13 AD13 AD12 AD11 Y11 W11 AE10 AD10 AE9 AD9 AF8 AE8 AD8 AF7 AD7 AF6 AE6 AD6 AF5 AE5 AD5 AF4 AE4 AD4
100n
G16
IJ09
100n
5J04
10u 2J3T
2J3U
120R
D21 C22 F22 C23 F23 C24 F24 E25
VDD_1V2
B15
+3V3
2J43 10u
100n SGNDAU
AVSSL_CH516
IJ04
5J03
120R
VREFAU
VSS
F16
AVDDL_CH516
+1V2-FA 120R
VSS
D16 E16
100n
2J3S
120R
10u 2J3R
+1V2-FA
2J42
AVSSH_CH234
IJ03
5J02
5J07
E29 F28
2J46
F18 G18
IJ08 AVDDL_DRX
2J45 10u
100n
10u 2J3P
2J3Y
120R
120R
2J48
AVDDH_CH234
IJ02
5J01 +3V3
2J41 10u
F17 G17
AVSSH_DRX
100n
AVSSL_CH234
100n
AVDDL_CH234
F20 G20
A1 AK1 M2 U2 Y2 AB2 AE2 AG2 P3 M4 AA4 AJ4 V5 L6 P6 R6 T6 K7 L7 P7 R7 T7 AJ7 AJ9 AG10 N11 AH11 N12 R12 U12 N13 R13 U13 AG13 L14 N14 R14 U14 AH14 L15 N15 R15 U15 AD15 AE15 N16 R16 U16 Y16 AD16 AE16 AG16 AJ16 L17 N17 R17 U17 Y17 AD17 AE17 L18 N18 R18 U18 Y18 L19 N19 R19 U19 Y19 AD20 AD21 P24 U24 V24 W24 A30 AK30 K14 K15 K17 K18 K19 K20 N10 AA16 AA17 AA18 AA19
5J05 +3V3
2J47 10u
F19 G19
G29 G30 E30 G27 G28 H27
100n
100n
2J3N
10u 2J3M
+1V2-FA 120R
IJ07
AVDDH_DRX
VSS
SUPPLY_1 IJ01
VDDC
7J00-1 FUSION120
5J00
100n 2J5T
2J5R
J7 H7 G7 F7 VDDF1
VDDF2
F26 AD25 T25 G25 F25 AD24 AA24 Y24 T24 H24 G24 AD23 AD22 AD19 AG18 AF18 AE18
R26 R25 R24 VDDF_STB
7J00-3 FUSION120
100n 2J5S
+3V3
10u
+3V3-STANDBY
2J5Y
B03F 10n 2J5P
B03F
2J56
10-2-15
QFU1.2E LA
5
Fusion power supply
2012-11-08
3104 313 6618 19370_015_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 116
B04A, Control
Control
B04A +3V3
1 2 3 4 5 6
3
4K7
SCL-BE
1
4 5
SD0 SC0
SDA SCL
SDA-DISP SCL-DISP
7 8
SD1 SC1
SDA-BL SCL-BL
RES
SDA-DISP SCL-DISP
RES
+3V3
100K
100K
SDA-BL SCL-BL
3GM1
3GM2
3GM3 3GM4
100K
100K
6 4K7
4K7 3CY2
4K7
3CY1-4 4
4K7 3CY1-3 3 6
3 3CY3-3 6
SDA-BE
RES 9GM1
SDA-DISP
SCL-DISP
SCL-BE
RES 9GM2
SCL-DISP
SDA-DISP 5
BM03B-SRSS-TBT
2 3CY3-2 7
1
8
47R 3CY3-1
EJT-TDO RES 9GM3
SDA-BE 8
EJT-TCK
SDA-BL
RES 9GM4
SCL-BE
SCL-BL
1CV3 DBG
FCVC
SCL-BL
FCVD FCVE
SDA-BL
5
47R 3CY4
BM06B-SRSS-TBT
47R
4
1 2 3
EJT-TMS
47R
FCY6 7
SDA-BE
EJT-TRSTN
47R FCY1 FCY2 FCY3 FCY4 FCY5
VDD 2
1CV2 DBG 4 3CY3-4 5
1CY1 DBG
7GM1 PCA9540BGD
VSS
5
3CY1-2 2 7
4K7
1
+3V3
4K7 3GM6
3GM5
+3V3
3CY1-1
4
1 2 3
BM03B-SRSS-TBT
EJT-TDI 3CVF
SCL-M2
SDA-M2
1CV1 DBG
SCL-BE SCL-BE
47R 3CVG
FCV2 FCV1
SDA-BE
SDA-BE
FCV3 5
47R 3CV2
3D-LR-FUS
FCVB
4
1 2 3
BM03B-SRSS-TBT
3D-LR
47R 1CV6 1 2 3
FCY7 FCY8
4
FCY9
TXD-STANDBY RXD-STANDBY
BL-SPI-CS_BL-I-CTRL-FUS
5
3GD5
BL-SPI-CS_BL-I-CTRL
10R
BM03B-SRSS-TBT BL-DIM RESET-RF4CEn TXD-RF4CE
47R 3GM7 RES 3 7GM2 RES PDTC114EU
10R
3CVW
FCVJ
10R
3CVY
FCVK
10R
9 10
2 SCL-FE TXD-SERVICE SDA-FE RXD-SERVICE
STANDBYn TXD-RF4CE DETECT12V RXD-RF4CE LCD-PWR-ONn BL-ON RC_IRQ-RF4CEn
3CV8
BL-SPI-CLK-FUS
10R 3CV9
BL-SPI-SDO-FUS
AMBI-SPI-CCLK
3CVM 47R 3CVP
GPIO1
GPIO5 BM20B-SRDS-G-TF GPIO6
DC02
3CYC
1CV4 DBG TXD-RF4CE
TXD-RF4CE
FCVL FCVA
RXD-RF4CE
FCVM
RXD-RF4CE
5
POWER-OK
POWER-OK
4
1 2 3
BM03B-SRSS-TBT
3CVU +3V3 10K 3CVA
47R
DC03
FH52-8S-0.5SH
AMBI-SPI-MOSI
47R
21 22
1 2 3 4 5 6 7 8
+3V3-STANDBY
10R GPIO0
2CV8
1
RC_IRQ-RF4CEn 3D-LED_3D-RF
FCVH
2CV9 10p
4K7
10R
3CVE
RXD-RF4CE
+3V3 SCL-M3 TXD-STANDBY SDA-M3 RXD-STANDBY
FCVG
10p
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
3CVD
2CVA 10p
1CV5 DBG
1C27
FCVF
3CVC 10R
2CVB 10p
FCVN
3CV3
BL-DIM-FUS
2CVC 10p
B04A
8
10-2-16
QFU1.2E LA
+3V3 10K 3CYB
GPIO7 GPIO11 GPIO15
DC06
RES
47R 3CV4
IRQ-EXPANDERn
AMBI-SPI-CCLK
TXD-RF4CE
RXD-RF4CE
RES
3CV5 10R 3CV7
GPIO20
RES
+3V3-STANDBY
10K 3CVR 10K
10R GPIO16
3CVN
3CVB RES
AMBI-SPI-MOSI
+3V3
10K POWER-OK
47R GPIO21
GPIO23
DC07 3CVS
IRQ-EXPANDERn
47R
3D-LR
IRQ-EXPANDERn
3CVT +3V3 10K
9GM5 RES
3D-LED_3D-RF
9GM6 RES
3D-LR-DISP
5
Control
2012-11-08
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2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 117
B04B, LVDS
LVDS 10p
10p
2GVT
2GVS
10p
10p
IGV6 100R
FGR1 FGR2 FGR3 FGR4 FGR5 FGR6 FGR7 FGR8 FGR9 IGR0 IGR1 IGR2 IGR3 IGR4 IGR5 IGR6 IGR7 IGR8 IGR9 IGRA
9GV6 IGV2
3GVN PCEC-QHDMI 3GVP AMBI-TEMP 3GVR BL-SPI-CS_BL-I-CTRL
IGV1
100R 100R 100R
IGV0 FGV5
TX3-ATX3-A+ TX3-BTX3-B+ TX3-CTX3-C+
FGV6 FGV7 FGV8 FGV9 FGVA FGVB
TX3-CLKTX3-CLK+
FGVC FGVD
TX3-DTX3-D+ TX3-ETX3-E+
FGVF FGVG FGVH FGVJ FGVK
TX4-ATX4-A+ TX4-BTX4-B+ TX4-CTX4-C+
FGVL FGVM FGVN FGVP FGVQ FGVR
TX4-CLKTX4-CLK+
FGVS FGVT
TX4-DTX4-D+ TX4-ETX4-E+
FGVU FGVV FGVW FGVY +3V3
AMBI-SPI-OUT-MOSI AMBI-SPI-DO-QFHD
5
GPIO2
4
3GVF
GPIO2
41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
RES
100R 3GVG
GPIO2
SPLASH-ON
9GV1
GPIO8 SDA-DISP SCL-DISP BL-ON BL-DIM GPIO3 3D-LED_3D-RF
FGU7 RES FGVZ RES FGW0 RES FGVE RES RES RES FGU9 RES FGUF RES FGWA RES FGU6 RES FGWE RES
3D-LR-DISP GPIO3 SPLASH-ON GPIO2 TX1-ATX1-A+ TX1-BTX1-B+ TX1-CTX1-C+
RES
100R
BL-ON
3GV0 3GVE 3GVD 3GV3 3GV4 3GV5 3GV6 3GV7 3GV8 3GV9 3GVA
100R 10R 10R 10R 100R 100R 100R 100R 100R 100R 100R
TX2-CLKTX2-CLK+
FGU0 FGU1
TX2-DTX2-D+ TX2-ETX2-E+
FGU2 FGU3 FGU4 FGU5
1 Y1 Z
3
AMBI-SPI-MOSI-OUT
Y0
1 2 3 4
S 6
3GVH-1 3GVH-2 3GVH-3 3GVH-4
GPIO2
9GVC
8
9GV7
AMBI-SPI-DO-QFHD
9GV8
AMBI-SPI-OUT-MOSI
8 7 6 5 IGV5
+VDISP
Z
9
9GVB
AMBI-SPI-CCLK-OUT
Y0 7GV0-3 NX3L4684TK
S GND
AMBI-SPI-CCLK-OUT
9GV9
AMBI-SPI-CLK-QFHD
9GVA
1M01 AMBI-SPI-OUT-CCLK
1 2 3
KEYBOARD_IRQ-SRFn 4
5
100n
Y1
11
7
AMBI-SPI-MOSI-OUT
2GV2
VCC
AMBI-SPI-CLK-QFHD
IGV3 IGV4
RES 9GV3
+3V3-STANDBY +3V3
7GV0-2 NX3L4684TK 10
10p 10p
VCC
GND
AMBI-SPI-OUT-CCLK
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
FGWB
TX2-ATX2-A+ TX2-BTX2-B+ TX2-CTX2-C+
TX1-DTX1-D+ TX1-ETX1-E+
1G51 20519-051E 60 61 58 59 56 57 54 55 52 53
IGW1 IGW2 IGW3 IGW4 IGW5 IGW6 FGU8 IGW7 FGW8 IGW9 FGWC FGWD FGWF FGWG FGWH FGWJ FGWK FGWL FGWM FGWN FGWP FGWQ FGWR FGWS RES 2GVJ RES 2GVM FGWT FGWU FGWV FGWW FGWY FGWZ
TX1-CLKTX1-CLK+
TO DISPLAY
100n
+3V3
RES
100R
RES 2GVU
7GV0-1 NX3L4684TK 2 9GVD
3GVK
AMBI-SPI-CLK-QFHD
1K0
100R
9GV4 IGV7 9GV5
RES
100R
3GVC RES
3GVM
ARC3
100R RES
3GVJ
AMBI-SPI-DO-QFHD
10p 10p 10p 10p 1n0 1n0 1n0 10p 10p 1n0
3GVB
GPIO8
FGV0
1G50 20519-041E 50 51 48 49 46 47 44 45 42 43
RES 2GV9 RES 2GVA RES 2GVB RES 2GVC RES 2GVD RES 2GVF RES 2GVG RES 2GVL RES 2GVK RES 2GVH
SPDIFIN
2GVP
3GVL
2GVR
2GVN
10p
B04B
1
B04B
TO DISPLAY
A1253WVA
GND_HS
6
10-2-17
QFU1.2E LA
1X03 EMC HOLE
1X05 REF EMC HOLE
5
LVDS
2012-11-08
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2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 118
B04C, Output Vdisp
Output Vdisp
B04C
1 9GS1-1 RES 2 9GS1-2 RES 3 9GS1-3 RES 4 9GS1-4 RES 1 9GS2-1 RES 2 9GS2-2 RES 3 9GS2-3 RES 4 9GS2-4 RES
8 7 6 FGS1
5
5
3
2GS5
3GS4 IGS2
47K
IGS1
3GS5
DBG
4K7
27K
7GS3-1 PUMD12 1
3GS6
6 2
100n RES
22u
100n
IGS5
LCD-PWR-ONn
2GS2
+VDISP
3GS1 7GS3-2 PUMD12 3
IGS4
FGS2
6 5 2 1 2GS1
7GS2 SI3443CDV
4
2GS3 RES 3GS3
5
4
T 4.0A 32V
22n
6
RES
4
+12V +3V3
7
8 7 6 5
3 2 7GS1 1 SI4835DDY-GE3 RES 1GS1
8
47R
B04C
4K7
10-2-18
QFU1.2E LA
6GS1 DBG LTST-C190KGKT
5
Output Vdisp
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 119
B04D, Tuner CVBS debug
Tuner CVBS debug
B04D
470R
3FW4 RES
IFW5
3FW8
IFW3 5FW3 RES
RES
75R
DFW1
1u8 2FW5
150R
RES
150R
RES 3FW7
IFW4
3
RES
33p
270p
47u
2FW3
2FW6
7FW1-1 BC847BPN(COL) RES 3FW5 RES 1
2 IFW2
RES
3K3
CVBS-OUT1
2FW4
5
4 7FW1-2 BC847BPN(COL) RES
RES
IFW1
6
100p
10K
3FW3
RES
+12V
3FW6
B04D
RES
10-2-19
QFU1.2E LA
DFW2
5
Tuner CVBS debug
2012-11-08
3104 313 6618 19370_019_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 120
B04E, Audio - video
Audio - video
B04E 2VW1
CVBS1
150R
100n 2VW2
150R
100n 2VW3
3VWM SC1-CVBS 3VWN 3VWP 150R
CVBS
CVBS3
Y-G1
100n 2VW4
3VWR 150R
PB-B1
100n 2VW5
3VWS 150R
PR-R1
100n 2VW6
Y1-IN
150R
PB1-IN
150R
100n 2VW8
150R
100n 2VW9
150R
100n 2VWA
150R
100n 2VWB
3VWU PR1-IN 3VWV SC1-G 3VWB SC1-B 3VWC SC1-R
150R
3VW3
10K IVW1
8K2
FVW0
SCKIN
DVW4
AUD-R
DVW5
AUD-L
DVW6
2VWE
AR-4
2VWF
AL-4
33K
3VWA
+3V3
4K7
SPDIFIN
AL-1
1u0
3VWF
DVW1
2VWD
33K
IVW4
8K2
DVW2
AR-1
1u0 3VW8
3VW9
FB1 2VWC
33K
IVW3
8K2
WSI2SIN
PR-R3
1u0 3VW6
3VW7
SDI2SIN
PB-B3
33K
IVW2
8K2
SC-LIN
Y-G3
1u0 3VW4
3VW5
SC-RIN
PR-R2
3VWW
SC1-BLK
YPBPR-LIN
PB-B2
100n
3VWD
YPBPR-RIN
Y-G2
100n 2VW7
3VWT
VGA-LIN
3VWH
4K7
RES 3VWG
AUDIO-MUTEn
IVW7
8K2
3VWK
AL-3
33K
1u0 RES 3VWJ
VGA-RIN
2VWJ
IVW8
8K2
2VWK
AR-3
1u0 33K
B04E
3VWL
10-2-20
QFU1.2E LA
5
Audio - video
2012-11-08
3104 313 6618 19370_020_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 121
B04F, Fusion supply
Fusion supply
B04F
3
7UB1 TPS7A7001DDA
10u
2UB0
+1V5
IN
Φ
6 7
FB
3UB3
3UB4
22K 1%
3UB8
220K 1%
47K 1% 3UB7
RES 3UB6
3UB5
100K 1%
1K0
100p
3UBF
IUB4
FUB1 SENSE+1V2-MIPS
CORE VOLTAGE SUPPLY MIPS FUSION 1M0
10K 1% 3UBA RES
3UB9
+1V2-MIPS
27K 1%
DVS2 IUB5
FUB0
RES
27K 1% IUB3 2UB3
10u
9
8
GND
NC
10 11 VIA
GND_HS
OUT
2UB4
EN
1 4 5
100n
2UB6
2
5UB0
IUB6
+1V5
4
SW
SS EN
VREG5
5
9
GND_HS GND
VIA
IUB8 7 6
3
2UBD
2UBB RES
22u
22u 2UBA
2UBC VBST
1n0
10n 2UBH
1
VFB
1 3UBE-1 8 10R
100n
2 3UBE-2 7 IUBA 3
10R 3UBE-3
IUBC
2UBJ
2UBK
1n0
1n0
6
10R
1u0
2
+1V5
2UBF
22K 1% 2UBE RES
IUBB
Φ
STEP DOWN
10 11
3UBB
IUB9
470K RES 2UBG
FUB2
5UB1
8 VIN
22K 1%
IUB7
2u0 7UB5 TPS54527DDA
22p
100n
2UB7
10u
10u 2UB9
2UB8
30R
22u
+12Va
3UBD
B04F
3UBC
10-2-21
QFU1.2E LA
4 3UBE-4 5 10R
GND-1V5 GND-1V5 GND-1V5 GND-1V5
CUB0
DDR3 SUPPLY FUSION GND-1V5
ENABLE+1V5+1V1
5
Fusion supply
2012-11-08
3104 313 6618 19370_021_130129.eps 130129
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 122
B04G, Backlight microcontroller
B04G
Backlight microcontroller
B04G +3V3
+3V3
3GE0
3GE1
4K7
4K7
100n
100n
2GE2
1u0
RES 2GE0
+3V3 2GE1
1GE0 FGE0
TXD-LPC +3V3
RXD-LPC
4
1 2 DBG 3
BM03B-SRSS-TBT
1K0
100R
FGE2
5
RES 3GEK RES
3GE2
RESET-FUSION-OUTn
FGE1
+3V3
LPC-RESETn
LPC-LED3
9GE2
AMBI-SPI-CCLK
AMBI-SPI-OUT-CCLK
1GE2 SKHUBHE010
100n
2GE5
330R
3GEF DBG DBG 6GE3
LTST-C190KGKT
330R
3GEE DBG DBG
LTST-C190KGKT
330R
6GE2
DBG
6GE0
+3V3 BL-DIM7
+3V3
+3V3
+3V3
3GEC DBG
+3V3
LTST-C190KGKT
BL-DIM5 BL-DIM6 BL-DIM8 3D-LR-DISP
330R
10R
DBG
FGE5
LPC-LED4 AMBI-SPI-OUT-CCLK
3GEA
RES
3 4
3 4 DBG
1 2
3D-LR LPC-LED1 LPC-LED2
36 37 43 48 18 21
PIO1_0|R|AD1|CT32B1_CAP0 PIO3_0|DTR_|CT16B0_MAT0|TXD PIO1_1|R|AD2|CT32B1_MAT0 PIO3_1|DSR_|CT16B0_MAT1|RXD PIO1_2|R|AD3|CT32B1_MAT1 PIO3_2|DCD_|CT16B0_MAT2|SCK1 PIO1_3|SWDIO|AD4|CT32B1_MAT2 PIO3_3|RI_|CT16B0_CAP0 PIO1_4|AD5|CT32B1_MAT3|WAKEUP PIO3_4|CT16B0_CAP1|RXD PIO1_5|RTS_|CT32B0_CAP0 PIO3_5|CT16B1_CAP1|TXD PIO1_6|RXD|CT32B0_MAT0 PIO1_7|TXD|CT32B0_MAT1 PIO1_8|CT16B1_CAP0 PIO1_9|CT16B1_MAT0|MOSI1 PIO1_10|AD6|CT16B1_MAT1|MISO1 PIO1_11|AD7|CT32B1_CAP1 VSS
AMBI-SPI-CCLK AMBI-SPI-MOSI 3D-LED_3D-RF
9GE1 RES
1GE1 SKHUBHE010
9GE0 RES
100R DBG
6GE1
RES 100K
RES 100K 3GEN
1u0 3GEM
10K
2GE6
3GEL
2 13 26 38 19 20 1 11 12 24 25 31
PIO2_0|DTR_|SSEL1 PIO2_1|DSR_|SCK1 PIO2_2|DCD_|MISO1 PIO2_3|RI_|MOSI1 PIO2_4|CT16B1_MAT1|SSEL1 PIO2_5|CT32B0_MAT0 PIO2_6|CT32B0_MAT1 PIO2_7|CT32B0_MAT2|RXD PIO2_8|CT32B0_MAT3|TXD PIO2_9|CT32B0_CAP0 PIO2_10 PIO2_11|SCK0|CT32B0_CAP1
DBG 3GE4 100R
3GE5
LTST-C190KGKT
BL-DIM RXD-LPC TXD-LPC BL-SPI-CS_BL-I-CTRL
PIO0_0|RESET_ PIO0_1|CLKOUT|CT32B0_MAT2 PIO0_2|SSEL0|CT16B0_CAP0 PIO0_3 PIO0_4|SCL PIO0_5|SDA PIO0_6|SCK0 PIO0_7|CTS_ PIO0_8|MISO0|CT16B0_MAT0 PIO0_9|MOSI0|CT16B0_MAT PIO0_10|SWCLK|SCK0|CT16B0_MAT2 PIO0_11|R|AD0|CT32B0_MAT3
FGE4
3GEB DBG
33 34 35 39 40 45 46 47 9 17 30 42
BL-DIM2 BL-DIM3 BL-DIM4 LPC-SWDIO
LPC-ISPn
DBG
RES 3GE9 10R
AMBI-SPI-OUT-MOSI LPC-SWCLK BL-DIM1
10R
XTALOUT
FGE3
1 2
3GE8
LPC-RESETn
100n
3GE7
10R
3 4 10 14 15 16 22 23 27 28 29 32
VDD XTALIN
2GE4
3GE6
7
LPC-ISPn
SCL-SSB SDA-SSB
6
5 41
100n
2GE3
IGE1
RES
3GE3 100R
8 44
7GE0 LPC1114FBD48/301
+3V3
1K0
LPC-LED1 LPC-LED2 LPC-LED3
9GE3
AMBI-SPI-MOSI
AMBI-SPI-OUT-MOSI LPC-LED4
9GE4
BL-DIM
BL-DIM1
+3V3
ROW_1 1GE3-1 RES 3GEJ 1K0
1 3 5 DEBUG 7 9
ROW_2 1GE3-2
10K
+3V3 3GEG
10-2-22
QFU1.2E LA
2 4 DEBUG 6 8 10
FGE6 FGE7 FGE8
3GEH RES
LPC-SWDIO LPC-SWCLK AMBI-SPI-OUT-MOSI
100R LPC-RESETn
FTSH-105-01-L-DV FTSH-105-01-L-DV
5
Backlight microcontroller
2012-11-08
3104 313 6618 19370_022_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 123
B04H, eMMC
100n
2EJ5
100n
100n 2EJ4
100n 2EJ3
100n 2EJ2
2EJ1
B04H
+3V3
+3V3
100n 2EJ6
eMMC
SDIO2-CLK
33R
2
3EJ6-2
FEJ1 M6
SDIO2-CMD +3V3
33R GPIO16
FEJ2 M5
SDIO2-CMD SDIO2-CLK
3EJ5
GPIO15
7
SDIO2-D0
3EJ0
FEJ0 K5 10K
SDIO2-RESETn VDDI
C2
VCCQ CMD CLK RST VDDI
SDIO2-D1
33R GPIO18
1
3EJ6-1
8
VSS G5 E7 K8 H10
6
100n
3EJ6-3
2EJ7
3
VCC 0 1 2 3 DATA 4 5 6 7 VSSQ
MAIN
33R GPIO17
+3V3
E6 F5 K9 J10
C6 M4 N4 P3 P5
7EJ0-1 H26M21001ECR
A3 A4 A5 B2 B3 B4 B5 B6
FEJ3 FEJ4 FEJ5 FEJ6 FEJ7 FEJ8 FEJ9 FEJA
SDIO2-D0 SDIO2-D1 SDIO2-D2 SDIO2-D3 SDIO2-D4 SDIO2-D5 SDIO2-D6 SDIO2-D7
SDIO2-D0
2
SDIO2-D1
3
SDIO2-D2
4
4
3EJ6-4
1
3EJ7-1
1
SDIO2-D4
5
SDIO2-D2
8
SDIO2-D5
SDIO2-CLK SDIO2-CMD
3EJ7-4
+3V3
SDIO2-D5
3
3EJ7-3
5
+3V3
+3V3
SDIO2-D6
SDIO2-D7
SDIO2-D6 7EJ0-2 H26M21001ECR
6
3EJ8
SDIO2-RESETn
33R GPIO24
2
3EJ7-2
8
2
3EJ3-2
7
1
3EJ3-1
8
4
3EJ3-4
5
SDIO2-D3 SDIO2-D6 SDIO2-D7 +3V3
7
3
3EJ3-3
6
47K
NC
SDIO2-D7
33R GPIO23
3EJ2-1
47K
33R GPIO22
5
47K
M3 M7 M8 M9 M10 M11 M12 M13 M14 N1 N3 N6 N7 N8 N9 N10 N11 N12 N13 N14 P1 P2 P7 P8 P9 P10 P11 P12 P13 P14
4
3EJ2-4
47K
33R GPIO21
6
47K
33R GPIO20
3EJ2-3
47K
33R GPIO19
7
47K
SDIO2-D3
FEJB
SDIO2-D3
3EJ2-2 47K
C4 N2 N5 P4 P6
3EJ4
GPIO14
4K7
+3V3
SDIO2-D4
33R
+3V3
VDDI SDIO2-D4 SDIO2-D5
A1 A2 A6 A7 A8 A9 A10 A11 A12 A13 A14 B1 B7 B8 B9 B10 B11 B12 B13 B14 C1 C3 C5 C7 C8 C9 C10 C11 C12 C13 C14
NC
NC
NC
H1 H2 H3 H5 H12 H13 H14 J1 J2 J3 J5 J12 J13 J14 K1 K2 K3 K6 K7 K10 K12 K13 K14 L1 L2 L3 L12 L13 L14 M1 M2
+3V3
SDIO2-RESETn
NC D1 D2 D3 D4 D12 D13 D14 E1 E2 E3 E5 E8 E9 E10 E12 E13 E14 F1 F2 F3 F10 F12 F13 F14 G1 G2 G3 G10 G12 G13 G14
B04H
3EJ1
10-2-23
QFU1.2E LA
SDIO2-D4 SDIO2-D5
+3V3
5
eMMC
2012-11-08
3104 313 6618 19370_023_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 124
B05A, Class-D amplifier
Class-D amplifier
B05A
3D60
A-STBY
+3V3D
+12V-AUDIO 10K 1
+12V-AUDIO
30R
220n 5D51
220n 2D65
2D64
10u
10u 2D59
10u 2D58
10u 2D57
10u
2D66
30R 2D63
220n 5D50
220n 2D62
10u 2D61
10u 2D60
10u 2D84
2
10u 2D92
7D70 PDTC144EU 2D97 2D49
2D48
5D85
10K
3D82
100u 16V
2D67
2D5C
1u0
1u0
100n 2D93 RES
100n 2D69
10u 2D68
2D86
+3V3
+3V3D 30R
SSTIMER
2n2 26
STEST
VIA
10K
3D83
100u 16V
10n
10n 2D78
2D99
220n
ID53
330p
10u
10n 2D70
2D98
10n
1D51
SPEAKER-R-
2D95
5D79
1D50
ID99
30R
1D52
SPEAKER-R+
10n
10u
22K
2041145-3
FD70 ID96
2D87
3D71
1 2 3
ID57
2041145-4
5D01
3D70 RES
18K2 1%
1D02
1 2 3 4
ID98
5D80
SPEAKER-R-
30R
5D77 30R
GND_HS 49
37 38
47 48
17
PGND AB CD
50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69
Left+ LeftRight+ Right-
FD33
FD32
18R 330p 5D76
ID52 ID83 ID84
2D94
1D01
FD30 FD31
SPEAKER-LSPEAKER-R+
CD00
28
A 9
GND 29
30
AGND
VSS D DO
7 16
3D74
33n
36
SPEAKER-L-
10n
OC_ADJ OSC_RES
PBTL
33
10u
33n
ID94
10n 2D73
BST_D
2D85
5D74
5D81
ID63
ID70 6
42
5D75 30R
ID51
2D82
2D81
2D54
39
1D56
8
FD69 30R
1D55
ID97
9D51
5D71
1D53
4n7
BST_C
VR_ANA PLL_FLTP PLL_FLTM
OUT_D ID69
33n
2D76
47n
2D80
ID93
470R 2D52
470R 2D53
33n
220n
47n
ID82
46
220n 2D55
12 11 10
4n7 3D51
2D51
ID81 2D79
ID62
ID66
ID91
SPEAKER-L+
1D54
RESET PDN OUT_C
2D50
SPEAKER-L+
30R
10n
OUT_B
5D00
ID88
2D83
25 19
43
5D70 10u
100n
1 4
ID50
30R
BST_B
3D77
100n
30R
BST_A A_SEL
ID80 2D77
3D73
OUT_A
ID79
31
220n
14
SDA SCL
18
220n 2D71
34 35
VR_DIG
2D56
40 41
AUDIO AMPLIFIER
330p
44 45
2D72 10u 2D74
18R
2 3
5 32
D
2D75
ID90
2D5D
9D50 RES
27
13
23 24 3D76 RES
15K
D-RESET
3D52
ID61
C PVDD
2D89
ID56
7D50-2 PUMH2
ID58
B
18R
ID89
SDI2SOUT3
A
OUT GVDD
3D75
10K
3D50 3D54
47R 47R 10K 9D55
+3V3D
BM04B-SRSS-TBT
ID65
AUDIO-MUTE
10K
3D55 3D56
RES
7D50-1 PUMH2
LRCLK SCLK MCLK SDIN
VREG
6
D-RESET
AVDD DVDD 20 21 15 22
FD50 SDA-SSB SCL-SSB
A-STBY
FD64 FD66
18R
5
RES 9D53 9D54
7D60 TAS5711PHP
3D72
SCKI2SOUT WSI2SOUT
FD67 FD63 FD65
WSI2SOUT I2SCLK SCKI2SOUT SDI2SOUT1
TAS5731P1
ID76 ID75
ID77
3D57 1R0
330p
+3V3D
+3V3D
9D52 SDI2SOUT1
ID78
1R0
2D88
10R
1 2 3 4
3D58
+3V3D 3D79
100u 16V
2D5B DBG 1D03
RES 3D63
DETECT12V
16V 100u
SPEAKER-R-
2
ID87
ID55
SPEAKER-L7D71 RES PDTC144EU
+3V3-STANDBY
ID54
10n 2D91
3
1
10K
AUDIO-MUTE
10K AUDIO-MUTEn
2D5A
10R 3D62 +3V3D
100u 16V
100u 16V
3D78
3D61
5D83
RESET-FUSION-OUTn
3
10u 2D96
B05A
47K
10-2-24
QFU1.2E LA
1X02 REF EMC HOLE
5
Class-D amplifier
2012-11-08
3104 313 6618 19370_024_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 125
B05B, Analogue externals
Analogue externals
B05B FVA9
1VAG
6n8
2VA9
6VA8
100p
2VA8
1K0
CDS4C12GTA 12V
3VA7
SC-RIN
RES
FVAA
6n8
SCART
1VAH
6VA9
100p
2VAA
1K0
2VAB
RES
3VA8
SC-LIN
CDS4C12GTA 12V
B05B
49045-0011 25 26 FVA1
24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
FVAB
IVA0
1VAJ
75R
3VAG
CDS4C12GTA 12V
RES
FVAC
1VAK
CDS4C12GTA 12V
RES
100p
6VAC
2VAE
1K5
1u0 3VAA
12K 2VAD
PDZ2.4B(COL)
FVA2
3VA9
SC1-STATUS 6VAB
6VAA
100p
2VAC
SC1-B
+3V3 FVA4
1VAL
75R
3VAB
CDS4C12GTA 12V
RES 6VAD
100p
1R0
FD90
1
SPDIFO
1VAM
75R
3VAC
CDS4C12GTA 12V
RES
100p
6VAE
1VAN
CDS4C12GTA 12V
RES 6VAG
6VAF
100p
100R
FVAE
75R 2VAH
3VAD
SC1-BLK
3VAE
IVA1 PDZ2.4B(COL)
2VAG
CDS4C12GTA 12V
FVAF
1VAP
150R
3VAF
CDS4C12GTA 12V
RES
FVAG
3VAK
SC1-DETECTn
6VAH
100p
2VAJ
SC1-CVBS
100p
47R 2VAK
RES 6D0A
V_NOM
100p 1D0A
1VA1
FVAD
SC1-R 3
100n
GND MT 5 4
ID95
RES 2D0B
VIN
2VAF
1J50 3150-831-030-H1 2 VCC
3D90
SC1-G
2D0A
10-2-25
QFU1.2E LA
5
Analogue externals
2012-11-08
3104 313 6618 19370_025_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 126
B05C, Sensor board and AmbiLight
Sensor board and AmbiLight
B05C
FAA0
FH52-11S-0.5SH
FH52-25S-0.5SH
FH52-40S-0.5SH FAA1 42 41
3CAF
SDA-SRF 10R
FAA2 3CAE IAA0
3CAG FAA3 FAA4
+5V
0R3
+T
SCL-SRF
3CAD 10R
3CAB 3CAA 3AAA
FAA6 FAA7 FAA8
LED2-OUT KEYBOARD_IRQ-SRFn LED2-OUT 3D-LED_3D-RF AMBI-TEMP
100R 100R 100R
3AAB 3AAC
AMBI-SPI-CCLK-OUT 1u0
10p
470p 2CAD
470p 2AAV
2AAC
10p
10p 2CAB
100p 2CAA
100p
100p
100p
47R
2CAR
2CAS
AMBI-SPI-MOSI-OUT 47R
+3V3-STANDBY
2CAP
AMBI-POWER IAA1 1u0
SDA-MC
2AAW
FAA9
GND-AL
9CAA 9CAB
+3V3-STANDBY
10R
FAA5
GND-AL
3CAH 10K
RC_IRQ-RF4CEn
3CAC
GND-AL
LED2-OUT
10R
AMBI-POWER +3V3AL AMBI-POWER
2CAT 2CAU
100n RES 10u GND-AL
2CAL
RES 3AAD
100n
+3V3
FAAZ +3V3AL
10u
2AAE
GND-AL
1C26
10u
+T 0R3 2AAD
1C25
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
2CAN
27 26
1u0
1C20
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
2CAJ
13 12
2CAM
11 10 9 8 7 6 5 4 3 2 1
1u0
B05C
2CAK
10-2-26
QFU1.2E LA
GND-AL
5
Sensor board and AmbiLight
2012-11-08
3104 313 6618 19370_026_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 127
B06A, HDMI +3V3
1 2 3 4
BRX1BRX1+
5 6
BRX2BRX2+
7 8
CRX-HOTPLUG
100K
1u0
10R
3 3HA1-3 6
3HA3
41 42
FHB9
CRX-DDC-SDA CRX-DDC-SCL
39 40
CRXCCRXC+
11 12
CRX0CRX0+
13 14
CRX1CRX1+
15 16 17 18
CRX2CRX2+
BRX2+
FHB2
DRX-HOTPLUG
3HA4
BRX1BRX0+
1 3HAB-1 8 BRX-DDC-SCL BRX-DDC-SDA
BIN-5V BRX-HOTPLUG 21 20 23 22
45 46 43 44
DRX-DDC-SDA DRX-DDC-SCL DDRXCDDRXC+
19 20
DDRX0DDRX0+
21 22
FHAR FHAS
DDRX1DDRX1+
23 24
DDRX2DDRX2+
25 26
47K
BRX0BRXC+
FHBA
47K
BIN-5V
2HA1
10R
100K
DIN-5V
1u0 4 3HA1-4 5
BRX2BRX1+
BRXCPCEC-HDMI HARC0 BRX-DDC-SCL BRX-DDC-SDA
BRX0BRX0+
100n
100n 2HAN
10u
2HAM
2HAJ
100n 2HAP
100n
2HAG
2
37
38 SBVCC33
N R0X1 P N R0X2 P TX2
(CBUS) HPD1 R1PWR5V DSDA1 DSCL1 N R1XC P
TX1
N P
TX0
N P
TXC
N R1X0 P
N P
N P
N R1X1 P
TPWR_CI2CA
N R1X2 P
CEC_A
57 56
HDMIF-RX2HDMIF-RX2+
59 58
HDMIF-RX1HDMIF-RX1+
61 60
HDMIF-RX0HDMIF-RX0+
63 62
HDMIF-RXCHDMIF-RXC+
3HB0 4K7
MICOM-VCC33
3HB1 RES
FHA4
55
4K7 50 3HAS
(CBUS) HPD2 R2PWR5V
INT
52
4K7
3HAY FHA3
RES
CSCL CSDA
N R2X0 P
54 53
3HAV 3HAW
47R 47R
SCL-SSB SDA-SSB +1V5
RSVDL
N R2X1 P
R4PWR5V
10R
DSDA2 DSCL2 N R2XC P
pin (49)
FHA6
+5V +3V3
+5V
+3V3
2HAB
10 28 7HA1-1 RT9025-12GSP
N R2X2 P
1u0 VDD
3
(CBUS) HPD3 R3PWR5V DSDA3 DSCL3 N R3XC P VIA
N R3X0 P N R3X1 P N R3X2 P
74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89
2
VIN
VOUT
EN
ADJ
FHB5
6 7 1
PGOOD
+1V2-FE
5
NC GND GND HS
22 23 24 25 26
BRXCBRXC+
10K
51
7HA1-2 RT9025-12GSP
VIA 18 19 20 21
VIA
VIA
10 11 12 13
VIA 14 15 16 17
33 34
3HBQ
100K
BRX-DDC-SDA BRX-DDC-SCL
10K
1u0
35 36
R4PWR5V 3HBP
3HAR
FHB8
CEC_D
48 47
10u
CIN-5V CRX-HOTPLUG
FHB1
FHAN FHAP
CRX-DDC-SCL CRX-DDC-SDA
21 20 23 22
CIN-5V
2HA2
3 3HAA-3 6
CRXCPCEC-HDMI HARC1 CRX-DDC-SCL CRX-DDC-SDA
47K
CRX0CRXC+
47K
CIN-5V
7 3HAB-2 2
FHAG
71 72
N R0X0 P
49
2HAA
CRX1CRX0+
1H02
HDMI CONNECTOR 2
69 70
ARX2ARX2+
DSCL4 DSDA4
2HAD
CRX2CRX1+
CIN-5V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
ARX1ARX1+
CRX2+
5 3HAA-4 4
FHAF
67 68
R4PWR5V
N R0XC P
4
DIN-5V
HDMI CONNECTOR 3
ARX0ARX0+
DSDA0 DSCL0
SBVCC33 RES
9
10R
1H03 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
65 66
(CBUS) HPD0 R0PWR5V
RES IHB1
8
FHB0
100K
BIN-5V
1u0
21 20 23 22
ARXCARXC+
BRX-HOTPLUG
3HA2 2 3HA1-2 7
DIN-5V DRX-HOTPLUG
29 30
FHA7
30R
10u
FHAL FHAM
DRX-DDC-SCL DRX-DDC-SDA
2HA4
DDRXCPCEC-HDMI HARC2 DRX-DDC-SCL DRX-DDC-SDA
7 3HAA-2 2
DDRX0DDRXC+
47K
DIN-5V
31 32
ARX-DDC-SDA ARX-DDC-SCL
pin (38)
RES 5HA6
10u
VOUT
2HA9
1u0
DDRX1DDRX0+
100K
2HA5
10R
FHB7
MICOM_VCC33
ARX-HOTPLUG
3HA0
FHAY
1 3HA1-1 8
AIN-5V
DDRX2DDRX1+
47K
FHAE
DDRX2+
1 3HAA-1 8
HDMI CONNECTOR 4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
9 27 64 VCC33
1H04
B06A
1
2HAF
EN EN
VCC33
3
FLG
10u
VIN
2HAL
4
100n RES 2HAK
PDZ2.4B(COL) 5HA9
5
GND 7HA0 SII9287B
FHA8
30R RES
IHB0
1u0
2HB5
2K2
FHBC
pins (9,27,64)
5HA5 +3V3 7HA5 RT9715EGB
10K
2HB4
I2C ADDRESS SII9287B=OXB2
1u0 3HAP
MICOM-VCC33
3K3 6HA1
FHB4 SBVCC33
VCC33
3HA5 RES
+5V
30R
HDMI
3HA6
B06A
73
EPAD BIN-5V 1H01
1V2 DVB-T2 and DVB-S2
ARX2ARX1+ ARX1ARX0+ AIN-5V
RES
+3V3-STANDBY
IHB3
RES
IHB4 IHB5
3HB3
PCEC-HDMI FHB6
9HA0
BC847BW 7HA3
AIN-5V
HDMI-CEC
100R
IHB6
27K
9HA1
3HBS
PCEC-QHDMI
1M0
21 20 23 22
FHAV FHAW
ARX-DDC-SCL ARX-DDC-SDA
3HB2 22K
7HA2 BC847BW
3HAL
AIN-5V ARX-HOTPLUG
IHB2
47K
ARXCPCEC-HDMI HARC4 ARX-DDC-SCL ARX-DDC-SDA
3 3HAB-3 6
ARX0ARXC+
RES
FHAH
ARX2+
47K
HDMI CONNECTOR 1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
5 3HAB-4 4
10-2-27
QFU1.2E LA
3HB4 +3V3-STANDBY 22K
1X01 REF EMC HOLE
1X07 EMC HOLE
1X08 EMC HOLE
1X09 EMC HOLE
1X14 REF EMC HOLE
5
HDMI
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 128
B06B, HDMI-ARC
HDMI-ARC
B06B IHD1
3HD4
9HD4
HARC0
HARC1
HARC2
FHD4
5HD0
FHD5
30R 5HD1
FHD6
30R 5HD2
IHDF
ARC0
IHDG
ARC1
IHDH
ARC2
IHDM
ARC3
IHDK
ARC4
RES 9HD2
ARC4
100R
B06B
ARC0
ARC1
ARC2
30R IHD8
9HD5
3HD9 +5V-ARC
10p
5HD5
FHD3
+5V
100n
1u0
16
7HD0 74HC4051PW
2HDD
2HD6
30R
IHD7
9HD6
9
9HD0
6
MDX
0
0 7
1
2
2
G8
3 4
3
5 6 7 VEE
GND 8
HDMI-ARC
14 15 FHD7
12
9HD9
1 5 2 4
IHD4
9HD8
IHDL
HDMI-ARC
100R
FHD2
8X
3HDT
ARC-SEL2
0
RES
10
3HDE
FHD1
100R
ARC-SEL1
13
3HDU
11
3HDS
FHD0
100R
VCC ARC-SEL0
7
2HD5
10p
10p 2HD3
100R
ARC4
30R
100R
FHD8
10p 2HD1
HARC4
5HD4
2HD0
10-2-28
QFU1.2E LA
5
HDMI-ARC
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 129
B06C, USB external
B06C
USB external
B06C +3V3
3EA7 +5V +T
0R3
3EA8-1 100K 3EA8-2
FEAD
100K
100n
100n 2EA7
100n 2EA6
2EA4
100n 2EA5
USB-PORTA-OC 100n
2EA3
+5V-PORTA
3EA8-3 100K 3EA8-4
18p
3 4 25
USB-PORTB-DM USB-PORTB-DP USB-PORTB-OC USB-PORTA-DM USB-PORTA-DP USB-PORTA-OC
6 7 24
USB-PORTC-DM USB-PORTC-DP USB-PORTC-OC
12 13 20 15 16 19
3EA1
+3V3
10K 28 17 22 23 8
RESET-FUSION-OUTn IEA1
3EA3 3EA4
10K
680R
IEA2
100K
+3V3
+3V3
XOUT
21 VCC_D
XIN
5 VCC_A_1 9 VCC_A_2 14 VCC_A_3
11
DD+
DD1DD1+ OVR1
IEA3 USB2-DM IEA4 USB2-DP
3EAC +5V +T
DD2DD2+ OVR2
SDA
TEST|SCL
26
+5V-PORTB 100K 3EAD-2
FEAE
100K
18
3EAD-3 100K 3EAD-4
DD4DD4+ OVR4 VIA1 VIA2 VIA3 VIA4
30 31 32 33
IEE0
USB1-RREF
100K
1% 1 3EE2-1 8 12K 1% 2 3EE2-2 7
IEE1
USB2-RREF
3
3EAG
12K 1% 3EE2-3 6
+5V +T
12K
100n
3EA5
12K
0R3
3EAH-1
1% 4 3EE2-4 5 2EA2
0R3
3EAD-1
USB-PORTB-OC
DD3DD3+ OVR3
VREG RESET SELFPWR GANG RREF
1 2
GND_HS
10
2EA1
100K
29
7EA0 CY7C65632-28LTXCT
VCC
12M
1EA0
18p
27
2EA0
+5V-PORTC 100K USB-PORTC-OC
FEAH
3EAH-2 100K 3EAH-3 100K 3EAH-4 100K
6
5401
USB-PORTB-DM USB-PORTB-DP FEA4
1E02
FEAA +5V-PORTB
FEAB
5
6
5401
1 2 3 4
USB-PORTC-DM USB-PORTC-DP FEAC
FEA8
+5V-PORTC FEA5
FEA6 2EAA
1E03
5 100n
5
FEA9 1 2 3 4
100n
FEA3
1E01
2EAB
FEA1
+5V-PORTA FEA2
100n
USB-PORTA-DM USB-PORTA-DP
2EA9
10-2-29
QFU1.2E LA
6
1 2 3 4
FEA7
5401
5
USB external
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 130
B06D, Ethernet
Ethernet
5EF5
10n
2EFT
B06D
10n
30R
RES 5EF0 30R 5EF4
VDD33-PHY
FEF9
VDD33-PHY
+3V3-STANDBY
IEF1
100n
100n 2EFH
2EF2
100n
1u0
2EF0
30R
2EF1
AVDDL-1V1
+3V3-LAN
10u 2EF3
2EFS
B06D
6
3EFS 2
7EF1-1 PUMH2 1
3 5
7EF1-2 PUMH2
100n
100n
2EFJ
2EF9
10u 2EFA
100n 2EFV
2EFZ
1u0
22u
15p
4 5 6 IEF2
RX+ RX-
7
8
100n
RES 2EFN
CDA5C16GTH 16V
4 5
RES 6EF2-4
21 22 24
15p
EN-TXD0 EN-TXD1 LED-RES LED-ACT
RES 2EFM
34 35
FEFE
3
EN-TXEN
TX+ TX-
FEFC
6
32
FEFB
CDA5C16GTH 16V
RX-ER
RES 6EF2-3
LED_ACT LED_RES LED_10_100
FEF7
1E00 5450-327-194-H3
1 2 3
FEFA
TXP TXN RXP RXN
15p
TXD0 TXD1
4u7
5EF1
38 DVDDL
VDD33
3
14
TX_EN
NC
25
EN-RXD0 EN-RXD1
IEF3
100n
2EFU
FEF6
10K
10K
3EFT
50 51 52 53 54 55 56 57 58
RX_ER
29 28
2EFP
RES 2EFL
VDD33-PHY
10K
VDD33-PHY
3EF4
VDDH-2V5
RXD0 RXD1
CLK-RMII EN-RXEN
22R
2
15 16 18 19 36 37
MDC MDIO INT
33 3EF5 30
7
FEF5
CLK_RMII CRS_DV
CDA5C16GTH 16V
VDD33-PHY
1% 1K5
RES0 RES1
TXP TXN RXP RXN
RES 6EF2-2
40 39 20
RBBIAS
9 10 12 13
15p
26 31
EN-MDC 3EF3
7
TRXP0 TRXN0 TRXP1 TRXN1
27
RES 2EFK
2K37
RES0 RES1
FEF4
RST
FEF8
CDA5C16GTH 16V
1%
VDDIO_REG
8
1u0 2EFG
3EF2
CLK_25M
VDDH_REG
2
RES 6EF2-1 8 1
RESET-ETHERNETn
23 1
FEF3
XTLO
LX
2EFF
FEF2 FEFD
AVDDL XTLI
AVDD33
4
22p
EN-MDIO IRQ-WOLANn
5
VDDH-2V5
VIA 41 GND_HS 42 43 44 45 46 47 48 49
1M0
1EF0
25M
2EFC
3EFY
22p
6 11 17
30R
7EF0 AR8030-AL1A-R
FEF1
2EFB
5EF6
100n
100n 2EF8
100n 2EF7
100n 2EF6
2EF5
FEF0
RES
10-2-30
QFU1.2E LA
VIA
DEF0
4
CLK-RMII
EN-TXC
EN-RXC
VDDH-2V5
3EFH
RES0
EN-RXD0
RES1
EN-RXD1
10K 3EFJ
3EFN 10K
10K EN-RXEN
3EFP 10K 3EFR 10K
3EFL 10K 3EFM
LED-RES
LED-ACT
RX-ER
10K
3EFU 10K
5
Ethernet
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 131
B06E, NAND flash, serial flash and EEPROM
NAND flash, serial flash and EEPROM
B06E
B06E +3V3
DJA2 DJA3 DJA4 DJA5 DJA6 DJA7 3JA6
DJA8
F-RDY
10K
0 1 2 3 IO 4 5 6 7
7
R B
33R
+3V3 DJA9
F-OEn F-CEn NAND-ALE NAND-CLE F-WEn
3JA5
8 9 17 16 18 19
DJAA DJAB DJAC DJAD
DNU1 DNU2
4K7
3JA0
4K7 RES 3JA1
DJAE
RE CE ALE CLE WE WP
1 2 3 4 5 6 10 11 14 15 20 21 22 23 24 26 27 28 33 35 40 45 46
SF-SDO
4K7 FCT2
3CTH 47R +3V3-STANDBY
7CT3 M25P05-AVMN6 ICT1
3CTR
+3V3-STANDBY 3CTJ
4K7
4K7
3CTK
ICT2 3CTB 4K7
SF-SDI
SF-CLK
SF-CLK
SF-CS
SF-CS
SF-WP
SF-WP
4K7
3CT3 4K7
SF-SDI
ICT3 SF-HOLDn
SF-HOLDn
3CT0
SFB-SI
270R
3CTU
3CTZ
270R
270R
3CT2
SFB-SCK SFB-CS SFB-WPn
SFB-SI SFB-SCK SFB-CS SFB-WPn
47R
3CT9
SFB-HOLDn
SFB-HOLDn
FCT3 FCT4 FCT5 FCT6 FCT7
VCC 5 6 1 3 7
47R
C
Φ
512K FLASH
Q
2
S W HOLD
FCT8
38 47
48
1CTZ RESET-STANDBYn SF-SDO SFB-SI SFB-CS SFB-SCK
9JA6
13 25 36 9JA5
D
VSS
VSS
+3V3
8
29 30 31 32 41 42 43 44
DJA1
1 2 3 4 5 6 7 8 9 10 11 NC 12 13 14 15 16 17 18 19 20 21 22 23
4
DJA0
100n
3CT1
VCC
FRA0 FRA5 FRA6 FRA7 FRA8 FRA10 FRA11 FRA12
100n 2JA2
100n 2JA1
12 34 37 39
7JA0 MT29F8G08ABACAWP:C
9JA3
9JA4
2JA0
+3V3-STANDBY
8
7
1 2 3 4 5 6
1734260-6
+3V3
+3V3
8
100n
Φ (8K × 8) EEPROM
10K
3JA4
7JA2 M24C64-WDW6
IJA0 1 2 3
2JA4
IJA1
0 1 2
WC SCL
ADR SDA
7 6 5
3JA2 47R
SCL-SSB 3JA3
SDA-SSB
47R
4
10-2-31
QFU1.2E LA
FJA0
5
NAND flash, serial flash and EEPROM
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 132
B06F, Analogue externals
Analogue externals
B06F FVC1
1n0
AUDIO VGA/DVI
1VC7
2VC9
6VC6 RES
100p
2VC8
1K0
CDS4C12GTA 12V
3VC6
VGA-LIN
5 4 3
FVC2
1VC8
1n0
2VCB
6VC7 RES
100p
2VCA
1K0
CDS4C12GTA 12V
3VC7
VGA-RIN
1VA6
2 1 MSJ-035-75C-BL-RF-PBT-BRF
FVCB
FVC3
3VC8
YPBPR-DETECTn
100p
2VCC
47R
FVC4
1VC1
150R
3VC0
CDS4C12GTA 12V
RES 6VC0
47p
2VC0
Y1-IN
YPBPR
1VC2
150R
3VC1
CDS4C12GTA 12V
RES 6VC1
47p
2VC1
1VA8
5 4 3
FVC5
PB1-IN
FVCC
2 1 MSJ-035-75C-G-RF-PBT-BRF
FVC6
1VC3
150R
3VC2
CDS4C12GTA 12V
RES 6VC2
47p
2VC2
PR1-IN
FVC7
3VC9
CVBS-DETECTn
FVC8
1VC4
1n0
2VC6
CDS4C12GTA 12V
6VC3
100p
2VC3
1K0
RES
3VC3
YPBPR-RIN
FVC9
FVCD
1VC5
1n0
2VC7
CDS4C12GTA 12V
RES 6VC4
100p
2VC4
1K0
CVBS + AUDIO CVBS / YPBPR 5 4 3
3VC4
YPBPR-LIN
100p
2VCD
47R
1VA4
2 1 MSJ-035-75C-Y-RF-PBT-BRF
FVCA
1VC6
150R
3VC5
CDS4C12GTA 12V
6VC5
RES
CVBS1
100p
B06F
2VC5
10-2-32
QFU1.2E LA
5
Analogue externals
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 133
B06G, DC-DC
DC-DC
B06G
5UR3
IUR0
IUR2
3UR3-1 +12Vb
33R 100n
100n
100n
2UY5 6UW2
BAV99 COL
10R
10R
33R RES 33R RES 33R RES
RES 2URL
3URG-3
1n0
1n0
3URG-4
33R
VIN
1
1n0
1M0
3URC
22K 1%
3URB 100p
3n3
2URG 3URF
6K8 5% RES 2URH
10 11
4
9 1n0
2URJ
IURF
GND-3V3r
GND-3V3r
GND-3V3r
3 3UWK-3 6 100R RES
2 3UWK-2 7 100R RES
4 3UWK-4 5 100R RES
3UWL
+3V3
IUWE ENABLE+2V5 RES 2UWY
9
220K 1%
100n
47K
IUWF
3UWC
1% 470K 3UWD
2UWW
22K
1n0
22 23 24 25 26
3UWF
6
+3V3
68K 1%
IURK
CUR5
5
NC GND GND HS 8
22u
ADJ
GND_HS GND
COMP VIA
3URA
5
+2V5
7
PGOOD
100n
2UWU
10u
EN
FB
EN
GND-3V3r
FUW3
6
VOUT
2UWV
2
ENABLE+2V5
VIN
100n
+2V5
4 VDD
3
+3V3
7
GND-3V3r
1 3UWK-1 8 100R RES
1u0
SW
SS
2URE
3
GND-3V3r
RES 2UWS
2UWR 7UW2-1 RT9025-12GSP
GND-3V3r
330R
6UW1
PDZ5.1B(COL)
RES 6UW0
FUW2
8
1
IURE
10n
ENABLE+3V3
LTST-C190CKT
3UWB DBG DBG
1R0
3UWM
4K7 RES
4K7 RES 3UWA-4
4K7 RES
3UWA-3
4K7 RES 3UWA-2
3UWA-1
+3V3
IURC
BOOT IURD
FURA +3V3
3u6
Φ
STEP DOWN 2URF
5UR6
2
7UR6 RT7297CHZSP
IURB
22u
RES 2URK
22u 2URD
3URG-2
RES 2URC
100n
2URB
22u
2URA
30R
RES
3URG-1
B230LA-M3
IURn IURA
RES 6UW3
220K 1%
22K 1%
3UR7
3UR6
100p
2UY3
+22V
5UR5
+5V
10 11 12 13
FUW4
+12Vb
+12Vb
VIA
VIA
+5V +5V
120K 1% 2UY8
9
8
1n0
IURM
VIA
14 15 16 17
1M0 3UR5
6
GND GND HS 2UR2
100n
22u
2 3 IUR4
FB
2UY2
100n
VIA 18 19 20 21
3UR4
22u 2UY7
SW EN
2UY1
2UR1
4
2UY6
BOOT
10R
100n
7 VIN
5
DETECT12V
IURL
3UWJ-4
33R
10R 3UWJ-3
3UR3-4
IUR3
VCC
1
4u7
3UWJ-1
IUR9
7URA-2 RT8288AZSP
FUR1 +5V
33R
2UR3 7URA-1 RT8288AZSP
IUR8
3UR3-3
3UWJ-2
1n0
22u
2UR4
1n0
5UR2 22u 2UR9
2UR0
33R
22 23 24 25 26
3UR3-2
2UR8
10u
2UR5
10u
2UR7
30R
1u0
30R 5UR1 +12Vb
2UR6
B06G
7UW2-2 RT9025-12GSP
VIA 18 19 20 21
VIA
VIA
10 11 12 13
+2V5
+2V5-F
VIA
470R
470R
3UWH-4 RES
470R 3UWH-3 RES
3UWH-2 RES
470R
3UWH-1 RES
470R
470R 3UWG-4 RES
470R
3UWG-3 RES
470R 3UWG-2 RES
3UWG-1
14 15 16 17
+3V3
RES
2UWT
10-2-33
QFU1.2E LA
5
DC-DC
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 134
B06H, DC-DC
DC-DC
VDD
IUU3
5
NC GND GND HS
82K 1%
1
PGOOD
+1V1-DVBT2
1n0
7
2UUA
ADJ
8
3UU1
22K
1u0
2UU1
1R0
EN
IUU2
6
22u
2 IUU7
VOUT
9
3UU2 +5V
VIN
2UU5
3
+1V5
7UU1-1 RT9025-12GSP
3UU7 RES
4
B06H 10u
IUU8
3UU6
FUU1
SENSE+1V1-DVBT2
VIA 18 19 20 21
VIA
VIA
220K 1%
3UU4
* 3UU5
22 23 24 25 26
7UU1-2 RT9025-12GSP
680K
82K 1%
10 11 12 13
VIA 14 15 16 17
7UV0 NX1117C12Z 3
+3V3
IN
2 4
OUT
FUV1
+1V2-FA
22u 16V
2UV7
1
100n
COM 2UV6
Optional 7UV2 RT9030-11GU5
NC
4
+1V1-FA
10u
10u
2UVC
EN
5
2 OUT
EN
ADJ
FUV2
5 4
GND
+1V1-FA 100R
3
IN
10u
1
3UV6 RES
10u +3V3
3
VOUT
GND
2UVB
IUV1
7UV1 RT9187GB
2UV9
VIN
2UVD
1
+3V3
2
3UV1 120K 1%
+1V1-DVBT2
(*) 3UU5
1.10 V
RES
1.20 V
680 k立
68K 1%
IUV3
3UV5
B06H
2UU0
10-2-34
QFU1.2E LA
3UV2 33K 1%
5
DC-DC
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 135
B06I, CI conditional access
CI conditional access
B06I
+3V3
CA-CD1n CA-CD2n CA-VS1n
10K
3PAD
3PAE
10K
10K
3PAF 10K
+3V3
+3V3
2PA2 100n
CA-RST
3PAM 100K
19
CA-MOSTRT CA-MDO0 CA-MDO1 CA-MDO2
VCC 3EN2 3EN1 G3
3PA3
CA-MOVAL
3PA8-2 100R 2
7
3PA8-3 100R 3
3PA8-1 100R 1
8
3PA8-4 100R 4
5
6
3PAL
18 17 16 15 14 13 12 11
2
MOVAL MOSTRT MDO0 MDO1 MDO2
MOVAL MOSTRT MDO0 MDO1 MDO2
3PAA-1 1
3PA6 10K 8 3PAA-2 2
3PAP
CE2n REGn
10K CA-CE1n
33R
+3V3
+3V3
1
2 3 4 5 6 7 8 9
100R
CA-RDY
20
7PA1 74LVC245ABQ 1
CA-IORDn 10K
RES 3PAS 10K
CA-IOWRn 10K 7 3PAA-3 3
10K 6 3PAA-4 4
CE2n 10K 5 REGn
RES 9PAA
CA-CE2n RES 9PAB
CA-OEn
RES 3PAU 10K
CA-WEn CA-REGn
3PAN 10K 3PAR RES 10K 3PAT RES 10K 3PAV RES 10K
21
10
GND GND_HS CA-WP
3PAW RES 10K
CA-INPACKn
3PAY RES 10K
+3V3 2PA3 7PA2 74LVC245ABQ 1 19
100R
3PA9-1 100R 8
3PA9-2 7
3PA9-3 100R 6 2 100R
3PA9-4 5 100R
3PA4 4
1
2 3 4 5 6 7 8 9
100R
3
1
+3V3 2
18 17 16 15 14 13 12 11
MOCLK MDO7 MDO6 MDO5 MDO4 MDO3
MOCLK MDO7 MDO6 MDO5 MDO4 MDO3
3PA5
10K
3PA7 10K 3PAB-3 3
10K 6
3PAB-2 2
10K 7
3PAB-1 1
10K 8
3PAB-4 4
10K
GND GND_HS 21
CA-MDO7 CA-MDO6 CA-MDO5 CA-MDO4 CA-MDO3
1P00
VCC 3EN2 3EN1 G3
3PA2
CA-MOCLK
100n
20
2PA1
22u 16V
+5VCA +T 0R3
B06I
3PAC
CA-WAITn
3PA1 +5V
10
10-2-35
QFU1.2E LA
5
CA-D03 CA-D04 CA-D05 CA-D06 CA-D07 CA-CE1n CA-A10 CA-OEn CA-A11 CA-A09 CA-A08 CA-A13 CA-A14 CA-WEn CA-RDY +5VCA
MDI0
1 3PW2-1 8
CA-MIVAL CA-MICLK CA-A12 CA-A07 CA-A06 CA-A05 CA-A04 CA-A03 CA-A02 CA-A01 CA-A00 CA-D00 CA-D01 CA-D02 CA-WP
CA-MDI0
33R 3PW3
MDI1
CA-MDI1
33R 3PW4
MDI2
CA-CD1n MDO3 MDO4 MDO5 MDO6 MDO7 CE2n CA-VS1n CA-IORDn CA-IOWRn CA-MISTRT CA-MDI0 CA-MDI1 CA-MDI2 CA-MDI3
CA-MDI2
33R MDI3
1 3PW1-1 8
CA-MDI3
5
CA-MDI4
MDI5
2 3PW1-2 7
CA-MDI5
MDI6
33R 3 3PW2-3 6
CA-MDI6
MDI4
4
33R 3PW2-4 33R
+5VCA
33R MDI7
2 3PW2-2 7
CA-MDI4 CA-MDI5 CA-MDI6 CA-MDI7 MOCLK CA-RST CA-WAITn CA-INPACKn REGn MOVAL MOSTRT MDO0 MDO1 MDO2 CA-CD2n
CA-MDI7
33R 3PW5
MICLK
33R 3PW1-4
CA-MICLK
MIVAL
4
5
CA-MIVAL
MISTRT
3 3PW1-3 6
CA-MISTRT
33R
33R
71 69 72 70
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
92789-055LF
5
CI conditional access
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts 10-2-36
QFU1.2E LA
10.
EN 136
B06J, FE
B06J
FE
B06J
+3V3
3KW1
TS-CHDEC-DATA
TS-CHDEC-DATA
3KW3
TS-CHDEC-CLK
TS-CHDEC-CLK
560R 3KW5
3KW4 470R
TS-CHDEC-VALID
TS-CHDEC-VALID
560R 3KW7
3KW2 470R
560R
3KW6 470R
TS-CHDEC-SOP
TS-CHDEC-SOP
560R
3KW8 470R
RES 2FS3 10p SOC-IF-P
SOC-IF-N
2FS1
5FS1
100n 2FS2
4u7 5FS2
100n
4u7
IF-IN-P
IF-IN-N
2FS4 RES 10p
+3V3
3RW1
TS-DVBS-DATA
TS-DVBS-DATA
560R 3RW3
470R TS-DVBS-CLK
TS-DVBS-CLK
TS-DVBS-VALID
TS-DVBS-VALID
560R
3RW6 470R
560R 3RW7
3RW4 470R
560R 3RW5
3RW2
TS-DVBS-SOP
TS-DVBS-SOP
3RW8 470R
5
FE
2012-11-08
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2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 137
B06K, HDMI
HDMI
B06K
RES 3HW6 390R 3HW1
FHW0 +5V
IHW3 HEAC
56R 1%
680R
RES 3HW2
HDMI-ARC
IHW1
3HW3
PWR5V
10n
27K 2HW1
10K 3HW4
3HW5
+3V3
12K
IHW2 RREF
1%
100n
B06K
2HW2
10-2-37
QFU1.2E LA
5
HDMI
2012-11-08
3104 313 6618 19370_037_130129.eps 130129
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 138
B06L, Control, temperature sensor and service
Control, temperature sensor and service
B06L
B06L
+3V3 3
7CW0 PCA9540BGD
VDD 3CW0 +3V3
3CW1
SDA-M3
2
SDA-M3
SCL-M3
1
SCL-M3
SD0 SC0
SDA
4K7
SCL
4K7
SD1 SC1
1CW4 FCWT
SCL-M3
FCWV
SDA-M3
SDA-SSB SCL-SSB
7 8
3CWU
SDA-SSB SCL-SSB
SDA-SRF SCL-SRF
2K2
3CWV 2K2
SDA-SRF SCL-SRF
+3V3
3CWW 4K7
3CWY 4K7
VSS
FCWU 5
3CWJ
SCL-M1 BM03B-SRSS-TBT
47R 3CWF
SDA-M1
SCL-FE
SCL-FE
SDA-FE
SDA-FE
47R
3CR6 +3V3 2K2 3CR7
BM03B-SRSS-TBT 1CW7
+3V3
SCL-SRF
FCWB
SDA-SRF
FCWC
2K2 FCW4
5 1CWG
1CW6
+3V3-STANDBY
FCW3
SCL-SSB
DCW5 FCWR DCW6 FCWS
6
1 2 3
FCW2
TEST-MOD TEST-CON F-OEn
FCW1
SDA-SSB
5
4
1 2 3
+3V3-STANDBY
BM03B-SRSS-TBT
7
4K7
1 2 3 4 5
4
BM05B-SRSS-TBT 3CU3
EJTAG-MCU-TDO
47R 3CU4
STB-GP1
47R 3CWD
STB-GP5
STB-GP2
EJTAG-MCU-TCK
8
7
1 2 3 4 5 6
47R
100n
100n 2CW3
2CW2
22K
FCWH
EJTAG-MCU-TMS 1K0
DVS2
STB-GP4
22K 3CWC
FCWG FCWE 3CWS
3CWB
DVS1
EJTAG-MCU-TDI
47R 3CU5
1K0
STB-GP0
1CW5 BM06B-SRSS-TBT
FCWD FCWF
EJTAG-MCU-TMS EJTAG-MCU-TDO EJTAG-MCU-TCK EJTAG-MCU-TDI
3CWT
LED
3CWR
4
4 5
6
1 2 3
3CU2
STB-GP3
+3V3-STANDBY 10K 3EW0
IRQ-WOLANn
IRQ-WOLANn
+3V3-STANDBY
47R
10K
3CWG
STB-GP6
3CR8
ENABLE-WOLAN
ENABLE-WOLAN
47R 3CWK
HP-DETECT
SPLASH-ON
47R 3CUA
STB-GP7 +3V3
RESET-ETHERNETn
100R 3CWM
STB-GP8
RESET-RF4CEn
3CU0 10K
RESET-RF4CEn
47R
10K
10K
3CS1
3CS0
DCW1
3CWN
STB-GP9
LCD-PWR-ONn
47R 3CWP
STB-GP10
+3V3-STANDBY
SDM FCW0 DCW4
3CWE
SDMn
SDMn
+3V3-STANDBY
47R
6CS1
3CS3
47R
47R
+3V3-STANDBY
RXD-SERVICE
47R
TXD-SERVICE 3CU1
AVLINK1
DETECT12V
10K
PDZ5.1B(COL)
6CS0
1CS1
47R
3CS2
3 3CS4-3 6
10K
47R
8 3CS4-1 1
3CR9
2 3CS4-2 7
47R
3CRA
5 3CS4-4 4
1u0
FCS1
2 1 MSJ-035-75C-B-RF-PBT-BRF 1CS0
2AW0
FCS0
PDZ5.1B(COL)
5 4 3
100n
AMBI-TEMP
10R
FCS2 1E06
2CW1
10K 3AW0
AMBI-TEMP-FUS
47R 3CU6
STB-TXD
TXD-STANDBY
47R 3CU7
STB-RXD
TXD-STANDBY RXD-STANDBY
RXD-STANDBY
47R FCW8
STB-SCL
3CU9
STB-SDA +3V3
47R KYBRD
100n
+3V3-STANDBY
100n
2CW5
8
IRQ-EXPANDERn 1 2
3 4
3TW0
SDA-SSB SCL-SSB
DBG
3TW1 47R
2
17
100n
7TW0 LM75BGD A0
SDA
A1
SCL
A2
4
VSS GND_HS
47R
1
OS
+VS
3
1CT7 SKHUBHE010
DCW2
9TW0 RES 9TW1 RES 9TW2
2TW0
1n0
1
GND
RESET-STANDBYn
7 6 5
9TW4
VIA
22 23 24 25
FCT9
9TW5 RES
VIA
11
+3V3-STANDBY 10K
+3V3
9TW3
INT 18 19 20 21
3CW2
RC_IRQ-RF4CEn
GND
SCL SDA
47R
10K
3CUY
12 47R 13
3CR3
3CUW
2
RESET
100n
VCC
2 SC1-DETECTn 3 YPBPR-DETECTn 4 CVBS-DETECTn 5 3CR2 100R 7 FCW5 ARC-SEL0 3CR0 8 ARC-SEL1 3CR1 9 FCW6 100R ARC-SEL2 10 100R FCW7
RC_IRQ-RF4CEn
10R
VDD IO0 IO1 IO2 IO3 IO4 IO5 IO6 IO7
3CW5
IR
10K
2CW4
10K
10K
10K 3CUS
3CUP
7CT4 NCP803
2CT4
14
3CUR
RES 3CUN
10K
3CTY
A0 A1 A2
6
10K
7CW1 PCA9554BS
10K
3CUV
KEYBOARD_IRQ-SRFn
LGSEN
3
2CW6
10K
10K
RES 3CUM
10K 3CUL
RES 3CUK 3CUT
STANDBYn 3CW3 10R
15 16 1
SCL-SSB SDA-SSB
RESET-FUSION-OUTn
3CTD 47R
PWRON +3V3
SDA-MC
47R 3CUC
STB-RSTO +3V3
10K RES 3CUU
10-2-38
QFU1.2E LA
5
Control, temperature sensor and service
2012-11-08
3104 313 6618 19370_038_130129.eps 130129
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div. table
Circuit Diagrams and PWB Layouts 10-2-39
QFU1.2E LA
10.
EN 139
B06M, Strap options
B06M
Strap options
B06M
+3V3-STANDBY 10K
SPI-EN
SPI-EN
ICW1
3CUD
ICA1
3CL0
+3V3-STANDBY
CA-IOWRn
CA-IOWRn
10K
3CL1 RES 10K
ICA2
3CL2
+3V3-STANDBY
10K 3CUE RES
CA-WEn
CA-WEn
10K
3CL3 RES 10K
ICA3 CA-OEn
3CL4 10K
ICA4
3CL5
+3V3-STANDBY
CA-IORDn
CA-IORDn
3CL7
+3V3-STANDBY
3CL6 RES 10K
10K RES
ICA5 CA-A14
CA-A14
10K
3CL8 10K
ICA6 NAND-CLE
3CP5 10K
3CP8
+3V3-STANDBY
RES
F-OEn
F-OEn
FCP6
10K
+3V3-STANDBY
3CT6 10K 3CT7 RES
+3V3-STANDBY
+3V3-STANDBY
10K 3CT8
3CP6 10K
TEST-CON
TEST-CON
RES
3CTA 10K
TEST-MOD
ENABLE-STANDBY
3CTC
TEST-MOD
ENABLE-STANDBY
10K
RES
10K 3CTF 10K
5
Strap options
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 140
B06N, Headphone
Headphone
B06N
1
3DH3-1
8
68R IDHM
22n
FDH2 22n 2DH9
CDS4C12GTA 12V 2DH8
6DH2 RES
CDS4C12GTA 12V 1DH3
3 3DH3-3 6
6DH1
68R
RES
4 3DH3-4 5
1DH2
4V 100u
IDHL
8
2DH7
1K0
IDHP
2 1DH4 3 1 MSJ-035-12D-B-AG-PBT-BRF
68R
4V 100u HPHOR
FDH1
2 3DH3-2 7
1
2DH6
5
IDHN
1K0 3DH4-1
HPHOL
3DH4-4
B06N
4
10-2-40
QFU1.2E LA
FDH3
68R
5
Headphone
2012-11-08
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 141
Layout top
3UA8
3UAB
2UAD
2EHR
2EHY
9EHE
2UPH
5UC2 7UC2
3UAC
7UF8
2UF7
7EHJ 3EHS
7EH4
6UAF 2UPC
2UPK
2UCK
2UCW
2UCJ
5UC0
2UCY
2UCL
1CV5
7UC3
6UC2
3EJ8
1T71 1C31 1C30
3EM8
2UA9
2UF6
2UAT
2UAA
2UAM
2EHV
2GE2
3EHR 9EM3
3GEM
3UAW
9GE1
3GE9
9GE2 9GM6
9GM5
3CY1
3EM9
2CV8
3GE0
3EJ3
1CV6 3CY3
3VWD
2VW3
2UPG
3UC9
6UC0 5UC1
2PA1
1P00
2UVC
2URC
2UR0
3UR3
2UR1
5UR2
2UR4
2UR2
3UR6
3UR7
3UR4
3UR5
2UR3
7URA
2UR6
2UR5
2UR7 5UR1
5UR3
2URA
6UW3
3URF
3URB
3URC
2URH
2URG
7UR6
3URA
5UR6
2URB
2URE
2DH6 2DH9
2DH8
6DH2 3DH3 6DH1
2URJ
2URF
2DH7
1CW7 3CWY
3CWW
1CW6 1DH2 1DH3
3CWT
3CWS
3EAH
3EAG
2EAA
1CW5
1E03
7UP2 2UPJ
3VWP
3CT1
3CTH
1CW4
2VCA
3EAD
3EAC
3EA8
3EA7
3CW1
1CT7
1DH4
1H04
3CVT
2VW2 3VWK
3CTF
2UV7
2VC5
1E02
2UPL
1CTZ
3CUE 3CUD
7EA0
1E01
7UV2 2UVD
3VC6 2VC8
2EAB
5UP6
3VWH
3CTK
7CT3
DCW4
1VA6
2UPE 2UPD
2UPF
6UP6
7UV0
3CP6 3CP8
2VC9
5UP5
1UA0
2UV6
3CWE 2CW1
6VC6
2UPM
3VW9
3CWK
3CW0
1VA4
1VC6 6VC5
3VWS
3VWR 2VW4
2VWJ
3VWL
1VC8
3VC7
1UA1 1UP1
2FZ3 2FZ5
2FZ6 3FZ0
2J42 5J05 5FS1 5FS2
2FS4
1VC5
1VC4
6VC7 2VCB
7UC4
7UA2
9EH8
2UCC 2UCA 2UCB
3UV6
3CT0
3CTR
3CTJ
3CTD 3CUA
3CTU
3EW0
3CT2
2UWS
2VC4 3VC4
2UAV
3VW7
3CR3
3CUN
3CUP
3CUS
3CUK
3CUR
9TW0
9TW1
9TW2
2EA9
2EJ2 3EJ0
3CTZ
3UWM
6UW0
2UWT
3UWL
2UWV
2UWR
3UWK
3UWD 2UWW
2VC7
6VC4
3UG9
2VWE3VW8
1CWG
3UWB
3UWA
2EFA
3EF5
6VC0 6VC3
1VC1
2VC1 3VC1
2VCC 3VC8
1CS1
2VC6
3VC5 3VC2
3VW6 3VW4
3VW3
2UWY
1VC7
3CS1
3CS0
3UWF 3UWC
2HAB
2EF9
3EF2
2EFZ
7HA1
3HA3 3CUW
6VC2
2EJ6 3EJ4 3EJ5 3EJ1 2EJ5 2EJ3
3CW2
3CT3 2FS3
3J09
3J50
3EE2
2J41
6UW1
9HA1
5HD5
7UW2
2UWU
2EHS
2UA1
5EH0
3CT8
3VC0 3VC9
2VC2
3CY4
2EHU
2VWF3VWA
2VWK
2FS2
2FS1 3UU7
7UU1 2UU1
3UU2
1J00
3CR6
2UU0
3UU1 3UU5
2UUA 3UU4
6EF2
2EFL 2EFK
3VW5
2VWD
3JA6
2VC0 2VCD
2VW5
3CY2
9UA1
2UF8
3VWJ
3KW6
3KW4
3KW8
3KW2
3RW8
3RW4
3RW6
2VW8
3CV5
2VWC
3CR7
2VC3
1VA8
3VWM
3VWV
2J10 2J11
3VC3
1VC3
3CYB 3CVS 3CV4
3J2U
DB17
2VW1 3VWW
2VWB
3CS3
1VC2
3VWN
DB71
1CY1
DB11
3CUU
9HD9 3HDU
2UAB
2J31
3J2Z
DB12
3CS2
3CUV
3CUT
6GE1 6GE0 2GE1
7EJ0 2EJ7
3EFU
6VC1
7HD0 2HDD
7EF0
1E06
3CUL
3GE1
1GE0 3EJ2
DB78
DB79
2J3H
3EFP
1CS0
7CW1
2CW6 3CUM
2TW0
9TW3
9TW4
9TW5
7TW03TW1 3TW0
1H03
3CUY
2HD6
3EF3
6CS1 6CS0 3CS4
3HA1
2HA43HA2
3HA0
2CVB
3GEJ 3CVG
3CVF
2EJ1
DB26
5EF1
2EFH
3EFH
2HA5
3GM4
3GM3
2J35
3CV2
DB25
3CTA
2EFJ
2HA9
2HA2
9GE0
2EJ4
7J00
3HAR
2HA13HA4
1H02
3HBP
3GE7
3GD5
DB40 DB43DB42
3J55 3J54 3J53
3EFY
3HBQ
3GE8
1GE2 1GE1
3CV9
3CV8
DB41
2EFB 2EFC
7HA0
7GE0
2J24
DB56
DBA5
2J21
3CV7
3CYC
7J01
2J7S 2J1H 2J1B 2J1R 2J7T
7J02
DB53
2J1E 2J14 2J82 2J20 2J1V
7UB1
3J20 3J2R 3J21 3J2Q 3J2E 3J2F
DBA2
3HW4
3HAV
3CVR
3CVN
2GVP
2GVN
3GM2
2J25
2UBF
3J1B 3J1A
3J10
1EF0
3HAW
2CV9
9GM2
3GM1
3GM6
9GM1
3VWG
3VWF
3GVH
6GS13GS5
2GVC
2GVA
3GVA
2GVK
2GVH
2GVL
2GVF
3GV0
3GV9
2UBC
3GEH 3GEG
DB32
7UAC 5UAA
6GE2
7EM1
2UA0
1UA2
2J3J
2J3F
1FA0
2FA0
2EFN 2EFM
3GV4
3GVE 2UBD
3J3V 3J3Y 3J43 3J3R 3J42 DB00
3UU6
1H01
3J13
DB31
DB09
3UWG 3UWH
1E00
2UB7
2UB8
2UB9 5D51
2J59
2KCK
3FA1 5FA7 5FA1
DB61
2J3K
2KC5 3KC1
3KC7
2KCH
2KCJ
2KCP
2KC2 2KC4
3FA4
2FA5
DB93
6GE3
2J26
7J03
DB03
3KC2
3FA3
3FA2 5FA6
3J1Z
9GE3
DB10
5KC55KC6
3KC0
3J1W
2UB6
3GEL
1GE3
DB22
3KC3
3KC6
5FA4 5FA5
2UB0
2J27
2J92
2GE6
3GEN
3GEA
2J3D 2J30 2J29 2J2T 2J2V 2J2Z
2J39
3KC8
1F00
3J3U
3J36 3J3S 3J37 3J3T 3J3D
3J47 3J46
3J3C
2KC0 2KC6
2KC3
5KC9
3KC9
3J48 3J49
5KC7
5KC8
7KC0
2KC7
2J08
2J13
3J44 3J4E 3J45 3J4F
3J3A 3J3B
3J24 3J25 3J1R 3J1Y
2J95
5J0R
DB34
DB21
3RD8
2KCD
2KC1
7UB5
7J04
DB19
2RDP
3KCA
5KC0
2UBA
2J2W 2J33 2J2U 2J2D 2J2J 2J37
3KCB
9KC0 2KCE
1M01
1CV3
3J3L
2KCR3KCE
3KC4
1KC0
3CVE 2CVA
3J1H
2KCG
9KC1 2KCF
3GVD
9GV9
7GV0
5UB1
3RW2
5KC1
2KCC
2KCB
3RD4
3RDA
5KA1 3KA0 5KA0 3KA1
1CV4
3CVC
3J3M
3RD7
9RD3
3RD5
3RD0
3RD1
1M90
3CVW
3CVD
3J1G
3J3H
2GVT 2GVS
1CV2
3GVC
2UB4
3J3G
1CV1
2CVC
2D63
2D59 2D58 2D57
1D03
2RDC
DRD0
3RDB
9RD02RDF
9RD12RDG
2RBL
3GV8
3D54
2KCS
7RD0
2RD9
3GVG
7D50 3D56
3D55
9D53
9D52
2D72
2D74
9D55
3D71
2RDJ
2RD8
2RBS
3RB1
2RBP
2RBN 2RBR
2RD7 2RDA
2RK02RK1
6RB0
2RBK
2RB4
2RB2
3GVJ
2GV9
1C27 3CVY
9GV7
2D83
7RDA
2RDE
9RB7
9RB6 2RBA
2RBB 2RB9
2RBW
2RDR
DRD1
2GVU
5D71
2D55
3D50 3D60 3D61
3D63
2D65
7D70
3D57
3RD3
2RBC
7RB0
9GVC
3D72
2D95
2D89
3D62
2D67
2D77
2D69
5D01
7D71
3D52 2D52 2D51
1G50 9GV3 2GV2
9GV8
5D77
2D78
5D00
2AAD
5D74 2D94
2D61
7D60
2D53
1RD0
2RB5
2RB3 2RBT
9GVB
3J40 3J41
9RB0
2RBJ
9RB8 2RBY
2RBG
5RB0
2RBH
2D85
2D54 3D70 9D51
2RB7
2RBD
2RB1
2D79
2D68
9RB9
1RB0 2RBM
2D87
3RB0 2RBE2RBU 3RB3 2RBV 2RB6
2RB8 2RBF
2D5A
2D97 2D96 2D84
3D77
2D49
3D78
3D76
3D79 2VA8
2D88
2D86
2VAA
9D50
2VAC
9GVA 3GVK
5D79
2D66
2D75
3D73
2D5B 2D60
2D93
3VAA
2D62 2D64
2D50
2VAF
3D75
3D51
1VAL 1VAK 1VAJ 1VAH
5D76
2D80 2D82
3D74
2D92
3D58
2VAG
5D50
1VAM
1VAG
6VAF
3VAD
6VAB
1VA1
1VAP 1VAN
9D54
2D48
2D56 2D71
3D83
2VAK 3VAK
2D73
5D83 5D80
2D70
9GVD
3D82
2RDD
1J50
1G51
2D98
2D99
2D81
2D91
5D70
2D5C
2D76
2D5D
6D0A 3D90
2CAL
9CAB
2D0B
2D0A
5D85
9CAA 2CAS
2CAU
2AAC
2CAT
3CAB
2CAK
3AAB
2CAN
3CAG
2CAJ
1D0A
3CAH
3CAF 2CAB
1D02
1D56 1D55 1D54 1D53 1D51 1D50 1D52
3GM5
1D01
1C20 1C251C26
1R01
10-2-41
QFU1.2E LA
2URD
2UR8
2UR9
5
SSB layout top
2012-11-08
3104 313 6618 19370_041_130130.eps 130130
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 142
3CAA FCV1
2GVR
FCVK
IGV1
3GVN
IGW5
3GV6
FGW8
3CAE
2CAA
3CAD
3CAC
2CAM
2AAV
3AAC
FAA7
FAA2
FAA0 FAA1
FAA8
IAA0
FAA5
IAA1
FD90
IGW2
FD31 FGU7
FGU8
FGR83GV5
IGW3
ID96
FGU69GV1 FGVE
FD32
ID95
ID93
2UBB
3J14 2J1A
2J1Z
2UBJ
3UBE IUB8
5UB0
3VA7
ID97
2VA9
FVA2
ID69
3UB4 2UB3
3UB5 3UB6
3UB7
ID58
IUB4 FUB1
IUB3
ID66 ID56 ID65
ID54
FD50
IUB5
ID90 ID87
FUB0
FD64 ID79
FD66
ID84
ID78 FD65
IJ0R
3J4A 3J4J 3J4B 3J4K
3J4G
3J4H FJ0B
IUA1
2J5A
3J3W
3J34 3J35
3J4D 2J01 3J4L 2J2G 3J4M 3J4C
2J80
3J4N
2J93 5J0P
3J3K 3J3N 3J4P 3J3Z
FD67
3J2N 3J2P
FUC0
ID89
FD63
3J2H
2J1J
DC07
FVA9
ID80
3J2G
2J1F
2J1W
2J12 3J17 3J16
3VA8 2VAB ID76
ID70
ID61
3J3F 3J38 3J3E 3J39 3J3J 3J3P
DB58
DB99
3VAG
FVAA
ID75
IUB6
3J32 3J33
DB59
2J1C
2J1U 2J81
2J1S
3J15 2J18
DB36
2J85 3J11 2J16
2J17 3J12
2J86
DB98
3VA9 2VAE
2VAD ID81
FVA1
ID77
3J2M
DB54
DB97
2J1G
2J1K
DB95
IVA0
ID53
ID55
3UB8
DB52
3VAB
FVAB
3UB9
DBA3
2J19
DB55
3VAC
FVAD FVA4
ID63
3J2K 3J2J 3J2L
DB38
2J84
3GM7
7GM2
FTA6
DB06 DB62
DB35
FJ08
3CV3
FCVB FGE5
FJ09
DBA6
DB01
3CVP 3CVM
3UAL
2J15
DB39
2J7U 2J1D
3CVU
DB50
2J83 2J7P
DBA7 DB57
3VAE 2VAH
FVAE
3UBC
IUB9
3J28 3J29 DB94
IVA1
FVAC
2UBH
3J1F 3J1E 3J2A 3J2B 3J2D 3J2C 3J1U 3J26 3J1V 3J27
6VAH 6VAG 6VAE 6VAD 6VAC 6VAA 6VA9 6VA8
3VAF
FVAF2VAJ
IUB7
3UBD IUBA
DB51
DB64
2UBK
2UBG
3UBB IJ0S
FVAG
ID50
ID51
ID62
IUBC
ID83
5FW3
FGE2
IUBB
2UBE
3J18 3J19 3J1K 3J1J
DBA1
IGE1
5TA1
FGR7
3UBA
3J1S 3J1C 3J1T 3J1D
3J22 3J1N 3J23 3J1P
3J1M
FTA4
2TA3
FAA9
IGW1
FGU9
2FW3
3FW4
3J2S 3J2T
3GE3
FTA5
FD70
ID52
3GEK
FTA32TA2
FD69 ID57
3AAA
FGV0
FGE0
FUAH
IGR1
FAA3
2CAR
IGW4
FUB2
DBA4
FGE1
2GE3
FD33 ID99
3GV3
IGW6
IFW3
FGE8
2GE5 3GE4 FGE4
FGR5
3GV7
FAA4
FAA6 FAAZ
IGW9
3FW8 2FW5 IFW5
DB49
3GE2
2GE4 3GE5
FGWE
IGR5
3UB3 3UBF
3UA6
7FW1
3J1L
9GE4
IUAV
IFW4
DB33
3GEB
IGR2 FGUF
ID82
3CVA
3CVB
IFW2
2FW4
IGS5
IGS1
2GS3
7GS2 3GS3
3FW7
3FW3 3FW5
3AAD
ID88
FCVN
3UAT
FGWD
FGWA
FGE3
3GEC
3UAP 3UAN
FGWC
FGR6
FGE6
3GE6
IGV4
IGR4
FGE7
IUAJ FUAF
FGR3
3GEE
2GE0
2GVM IGR3
FGR2
FJ03
FUAP
FGWF
FGWG
FGR1
3FW6
IGS2
2UAN
FGWJ
FGR9
3GEF
7UAF
2UAL
3UAS
6UAB
2UAK
7UAA
6UAC
6UAD
3UAR
3UGA
2UAS
IUAK3UA5
IUA3
IEH2
FTA1
3GVL
FUAK
2GY2
FUA8
2UAP
3EHV
FTA2
3TA1
3UAV
FUAT
IUFT
IUFU
2UAW
2TA1
IUAT
IUAS
IUFS
IUA2
ITA1 5TA2
3GY9
2GY1
3GY7
2UA4
FUA7
FUAD
FUA0
FUA9
IEH1
2EHT
1TA1 3TA2
3GY5
3EM6
IEH3
5TA3
IUAP
3UAY
IEH5
7UAD
3EM0
IEHJ
2EH93EHU
IEH0
3EM1
3EHY
3EHP 3EHT
IEH4 FUAG
IUAL
IUAR
IUAN
2UAR
9UA0
3UAK FUAU
FEH1
3EHW
7UAB
IEH62EHJ
FGWH
FGWM
2FW6 DFW2
IFW1
2GS5 3GS1
3GS6
FGWL
FGWQ
DFW1 FCVF
7GS3 3GS4
FCV2
FCVM
FCVG
7GS1
IUFR
2EHW
FEH5
3UA9
3UA7
3EHJ
3EHN
7UA3
9UA2
FEH3
1GS1
IUAM
7EH2
2EHL
FEH2
FUAE
FUA3
IGS4
FEH4
2EHN
3GY1
2EM7
2EM2
9EM2
IEM2
9EM1
3EM4
3EM7
FUA1
2EM3
2EM6
2EM0
FGWP
FGWS
IGV5
9GM4
IGV7
FGWR
FGWU
FGWK
FGWB
9GM3
FCVL
FGWT
FGWW
IGR8
7GM1
3GVM IGV6
FCVH
2GY8
2GYA
2EHM
FEH9
FEH8
IEM1
3EM5
FGWV
FGWZ
FD30
IGR9
FGVZ
IGV2
FCVE
FCVA
2EM4
2GY6
1EM0
2EHP
2GS1
9GS1 9GS2
3EM3 2EM5
2EM1 FEH7
FCVC
FGWY
FGU1
FGR4
3GVP FGW0
IGV0
FGU0
ID98
3GVR
FGU3
IGRA
FGWN
FGV5
FGVK
FGS22GS2
FGU2
FGU5
2J89
FCVJ
FGS1
FGU4
IGR7
2AAW
FGV79GV5
2AAE
FGV6
FGV9
ID91
FGV8
ID94
FGVJ
FGVB
5D75 5D81
FGVA
FGVD
IGR0
FGVC
2GVG
FGVF
FGVG
2GVB
FGVH
2GVD
FGVM
IGW7
FGVL
FGVP
IGV32GVJ
FGVN
FGVR
3GVF
FGVQ
FGVT
IGR6
FGVS
FCV3
FGVV
9GV6
FGVU
FGVY
9GV4
FGVW
FCVD
3GVB
FUAL
2UA2
2GY4
2UA3
FUAA
2UAU
FUA5
3GYA
3GY8
FUAM
3UA4
2GY3
FUAB
3GYB
2UA5
2GY5
FUA6
3GY6
2GY9
2GY7
FUA4
2CAP
Layout bottom
2CAD
10-2-42
QFU1.2E LA
DBC3
IRB1
DBB5
IRB0
2FA8
IKC5
2FAG
FKC1
IFA4
IFA3
2FAC FFAE
7FA1 3FAB
3FA7
3FAC
2FAB
FFAD
FFA7
3FA9 IFA5 3FAA 3KA2 3FA8
FFA6 IFAA
5FAA 2FA2
7FAA
2FA9
FFA3
2FAA
FFA2
FFA4
FFAA
2FA3
FFAB 3KA4 FFA5
IJ11
2FA1
5RDD
5KCA
IFA6
2RDL
3RW5
3RW3
3RW7
3KW7
3KW1
3KW3
3PW5
3RW1
3PW2
3PW3
3PW1
5J0H
3PW4
3KA3
FJ02
IJ0E
3KA5
7KA0
FFAC
2J61
FFA82FAF
IKC4
DB81
3FAD
2J5Z
2FAH DKC0
IKC7
2J5W
3J51
2UU5 2EFP
IEE0
FHD8
FCT2
FEFA
3HDS
IUU3 FEFB
3CWN 3CWD
3CU5
FCWF
2CW5
IEE1
IHDK IUU7
9HD8
FEFC
3CWF
DCW1
IHD4
3CWJ
FEFE
FCWD
FEA4
3HW3
IHW1
FCWS
FHW0
IEF2
3CU2
3HB1
2HAP
2EFF FVC5
FHBC
FHAP
3HAB
IHB1
FHB8
IURD
2HAK
IHDF
9HD4
2HAL
FHAH FHAY
IHB0
FHAV
FHAN
IURE
FHB7
FHAR
FHAW
IUR9
2UY8
IURK
FVC7
2HD0
5HD0
3HA6
FCW4
3HD4
2HB5
2HAN
FHA7
5HA5
FVC2
IURF
5HA6
7HA5
FHA8
2HAG
5HA9
FHB4
2HAF FCS0
3HA5
3HAS
2HAD
3HAA
FHAM
3CUC
FEF5
3EF4
3HAP
FEF6
2HAJ
2HB4
FEF7
7EF1
IUWF
FVC8
FHD4
2HAM
FHA6
3EFT 3EFS
DJA9
2EFG
DJAA
DJA7
9JA6
3EFL
3EFR
FEFD
FHA3
6HA1
3HAY
2EF0
2JA0
3JA5
FEF9
2EF7
3EFM
3CP5
FVCC
2EF1
FUW3
3EFJ
DJA5
9JA3
3HB0
2EF5
DJAB
7JA0
DJA4
DJAC
FHAG
FHBA
FEF8
5EF5
DJAD ICA6
9JA4
DJA6
FEF02EF6
2HAA
FHA4
3JA1
FEF4
FHB2
DJA2 DJA0
FEF3
DJAE
2JA1
IDHP
2EF2
9JA5
FEF1
2EF8
2EFV 3EFN
DCW6
FEA7 FHB5
5EF6
IEF1 2EF3
FUW2
2EFT
2JA2 3JA0
DJA8
FCWE
2EFS
DCW5
FCP6 IUWE
3CT6
3CWP
5EF0
FCWR
ICW1
3CWG
5EF4
FEF2
FCW8
3CU9
FCT9
2EFU
2HW1
3CWB
FCW0
IUR4
2HD5
3CU4
DEF0
5HD4
ICT1
3CU3
ICT3
3CTY
2AW0 2CW4
3CTB
3CU0
3CT9 3CW5
IHW2
IEF3
FUU1
IUU2
IEA3 IUU8
DJA3 DJA1
7CT4
3CU1
3AW0
3CWC
2CT4
3CL4
3PAU
3PAP
9PAA
3PAC
3PAR
3PAE
3CL6
3CL5
3PAS
3PAT 3PA6
FRB0
FFA9 IKC6
IEA4
2CW3
ICT2
FCT8
3PAA
7PA1
3PA8
3PA3
IKCA
DB08
8001 8002
2CW2
FCT6
ICA4 FCT3
IKC2
2J2S 2J3B
2J3A 2J3C2J3E
3CWM
3CR8
ICA3
3CU6 3CRA
9PAB
3CR9
3PAF
3PAY
3PAM
3CU7
2UVB FUV2 3CL0
3CL1
FCT5
2PA2
ICA1
3CL8
3CL7
3CL2
3CL3
3PAV
ICA5
3PAL
2JA4
3PA4
2PA3
IUV3
3UV1
3UV5 3UV2 ICA2
FCT7
FUV1
3PA2
2UV9
3CW3
3PAN
IKC3
2RDK
DBB8
DBC1
2FAE
DBC4
IKC0 IKC1
DB67
IRD6
IRD5
2FAD
3J06
DBC5
DB69
DKC1
2J2R 3J2V 2J2A
2J28
DB15
DB66
DB16
2J07
2J2Y
IKCB
DBB6 DB02
2J2B
DB13
3J05 2J06
FJ05
2RDH
2KCL
3J2W DBB3 DB82 DB14
FJ0F
8004
3PA9
5RDB
DBB7 DB68
2HW2 3HW5
7UV1
2RDS
FRDA
2J2C DB04
IKC8
DB87
2J5F 2J5C 2J5H
FJ0J
3PAB
7PA2
IRD3
IRD1
9RD2 3RD2
2J2P
2J2N
2FA7
DB27
DB29
DBC7
2J38 2J36
IJ0L
2J4F
FJ16
FJ0G
5J06
2J4J
DB89
2J7V
2J7W
5J0D
2J96 2J4G 2J5B 2J05
2J5N
2J6T
2J3G 2J7F IJ0F
IRD2
2RD4 2RD3
IRD0
DB18
DB72
2J5R
2J4V
IRDB
IKC9
2J2M
2J4T
2J5Y
FJ01
FJ0H
2J5S
2J5P
2J3Z IJ07
2J4U
2J7E
5J0C 2J64 2J97
5J0M
2J7G
2J79 2J6B
IRDA
DB60
2J5L 3J00 2J5M
2J60
2J7C
2J70
2J77
2J7D
2J63 5J04 2J3W
2J6D 2J47 2J5V 2J5T 2J3V 2J6E 2J43
5J0E
2J6S
2J6F
2J7R
2J6P 2J69
2J66
2J71
2J78
2J5G
5RDA
2J2L 2J32
2J34
2RD6
2RD1
DB30
FJ0ADBC2
DB96
5J0J
2J88
2J1T
2J87
2J09 2J23
2J4N
2J6M
2J7L
2J4W
IJ0G
2J6U
2J6L 2J65
IJ0H
IJ08
2J75 2J7A
2J6J 2J6N
2J4R
2J44
DVW1
DVW2
2J94 2J76 2J73
3J08 3J07 3J52
3PA7
5J0N 2J55 2J53 5J07 2J56 2J58
2J22 5J0F
2J6W 2J99
2J7Y
DBC6
DB74 DB85
DBC0
DVW4
IVW7
3PA5
FJ10
IJ06
2J6Y 2J74
IJ0J
2J54
IVW3 IVW8
5J0L 2J52 2J51 2J50 IJ0K
2J40
FVW0
3PAW
2J45
IJ05
DVW5
DVW6
IVW2 IVW1
3PAD
5J00 2J3M
IJ0A
IVW4
3PA1
2J7B
2J3T
2J49
IJ03
9J04 2J91
2J3N 5J09 2J48 2J46 IJ09
2FZ4
2VW9
IUAD
IJ12
2J4B
2FZ2
3VWU
FCY5
IJ01
FCY6
IJ02
3J01 2J03
IJ0N
5J0K 2J68 2J4Z 2J6C 2J6R 5J03 2J7K 5J0A 2J6G 2J67 2J3P 5J0B IJ14 5J02 5J01 2J6V 2J6H
2J4P 2J72 2J6A
2FZ1
3VWB
FCY4 FUC1
2J3R 9J03 2J90
2J7H
2J6Z 2J7J
2J3Y
2J4E
2J4D
2J4Y
FCY2
2UCN 3UCC
2J3S
IJ0C
IJ13
FCY3
IJ04
DB83
2J4L 2J98
DC02
IJ0P
5J0G
3VWC
3UCD
3UG2
DB76
2J4H
DB20 DB05DB07
3RD6
2RDT
IRDC
DBB9
DB65
2J62
IJ00
3EJ7
2UC1
FCY1
IUC0
IUF6
IJ0U
IJ10
2J3U 2J4A 2J4C
IUCP
2VWA
IUCA
3UCB
3UC7
2UCM
2J4M
9GA2
3UC0
2UCH
3UC3
FCY8
3UC4
3UCG
3UCP
IJ0B
2VW7 FCWC
FHAS
FHB1
3CWU
7CW0
FCWV
FHB0
FHAF
FCW1
3JA4
3UWJ
3JA2
FVCD
FVC6 FCW7
FEA2
FEA1
3HBS 9HA0
FHD1
IHDG9HD5
FHD0
IHB2
2EA0
IEA2
2EA5
IDHM
IHD19HD2
IHB3
3HDT
IHD7 IHB6
9HD6
7HA3
3HAL FCS2
FHD7
IHDL
FHD65HD2 3HDE
2HD3
IHDH FHAL
3HW6
FEA3
3HW1
FEA9
3HW2
FEAA
3HB3
FEAB
7HA2
FEAC FCWU
3HB4
2EA4
IHB5 IHDM
2EA3
3HB2
3EA3
FEAH
2EA2
3EA1
IEA1
FEA5
FURA
FHD3
IHW3
1EA0
IUV1
2EA1 2EA7
3EA4
FHB6 FDH1
2UY7
FEAD
FEAE
3EA5 FEA6
FVCB
3HD9
FCW53CR2
FEA8
FDH2
2UY2
6UW2
IHB4
3CT7
2UY1
3CTC
2UY3
IDHL
9HD0
FJA0 3CWR
FUW4
FHD5
3CR1 FCW6
FCWG
2UY5
2UY6
FVCA
FCWH
IJA0
IURM
FUR1
DCW2
FCS1 FVC3
2HD1
IURA
FVC4
5HD1
IDHN
5UR5
IURL
FVC9
FVC1 FCW2
IHD8
IURN IUR2
FHB9
FCW3
FHD2
IUR8
IURC
3CR0
2URL
3URG
IURB
2URK
IUR0 IUR3
3CWV
FCWT
3JA3
FCWB
3DH4
FUAN
7UC0
2J5U
IJ0T
IJ0D FCY7
2VW6
IUF7
7UF7
3UC8
IUC5
3UCA
IJ0M
DB77
FCY9
3UCE
DB75
DB88
IUC1
2UCR
2J00 3J02 2J7Z
DB86
3VWT
IUFP
3UAF IUAC
IUCB
DB91
DB23
2J2H 3J30 2J2E
DB70
2J02
DB80
FCT4
IUFQ
2UCF
3FZ1
DC03
7JA2
IUAA
FUAV
IUC4
3UC2 FUAC
IUF3
2UCP
IUC93UCR
3UCF
IUF1
3UG0 IUF0
IUC6
7UC1
3UAH
7UF9 2UF9
7UA0
3UG8
3UD1
3UAG
3UG4
3UG3
IUF8
3UD0
IUAB
2UAJ
IUPF
IUAF
FUPA
3UAE
IUC7
6UC1
IUP23UPE
IUPJ
DC06
FEJ8
2UCD 3UC1
3UPD
3UCN
6UP4 6UP5
FUA2
FEJ7
IUC2
IUC3
2UCE
3UPB
FEJ0
IUC8
IUA0 IUP4
IUPE
2J04 3J03 3J04
DB47
DB90
FEJ6
FEJ3
2J4S
FEH6
FEJ4 FEJB
2J5K 2J5D
3EJ6
FEJ5
FEJ2
2J2F DBB4 3J31
3KW5
DB73
FEJA
FEJ1
FJ04
2RD2
FEJ9
2RDB
3RD9
2RDN
DB24
2RD0 2RD5
5RDC
2RDM
2J2K
FHAE
IJA1
2EA6
FDH3
5
SSB layout bottom
2012-11-08
3104 313 6618 19370_042_130130.eps 130130
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 143
310431366186 SSB B01A, Power connector
Power connector
B01A +12V
+12V DETECTION
3 5
7 6
7UA0-1 BC847BPN(COL)
FUAN
IUAD
1 22K
BC857BS(COL) 7UF9-2
+3V3-STANDBY 3UG4-2
100R
GND-AL
IUF7
8
POWER-OK
3UG4-3
22K
7UF9-1 BC857BS(COL)
100K
1M0
3UAF-1
+3V3-STANDBY
3GYB
3UG8
4K7
+12VAL
BL-ON BL-I-CTRL BL-DIM1 BL-DIM2
100R 100R 100R 100R
2UAJ
3GY7 3GY8 3GY9 3GYA
FUA8 FUAA FUAK FUAL
3UD0
3UAG RES
3UAE
FUA7 FUAD
1u0 RES
1
+12V-AUDIO
100K
DETECT12V
2
FUAC
IUFQ
3UG4-4
100n
IUAB
+12V
IUF8 100K
IUAC
2
FUAM
1K0
22K
STANDBY
100R
FUA5
RES 3UG3
3 IUAF 3UAF-2
3UA4
FUA2
4 5
22K
FUAB
IUAA
3UAF-4
FUA6 FUA9
7UA0-2 BC847BPN(COL)
4
FUA3
BL-DIM3 BL-DIM4 BL-DIM5 BL-DIM6 BL-DIM7 BL-DIM8
100K 1%
FUA4
7 100R 6 100R 8 100R 5 100R 100R 100R
3UD1
2 3GY1-2 3GY1-3 3 1 3GY1-1 3GY1-4 4 3GY5 3GY6
1% 68K
ENABLE+3V3 100K
+12V
30 29
FUAV
FUAE 3UG4-1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
FUA1
22K
3UAF-3
6
BL-I-CTRL
2UF9
CUA1
BL-SPI-CS_BL-I-CTRL 1M90
+12V-AUDIO SMAW200-H28S2
10n
1n0
1n0 RES 2UA5
2GYA
1n0
1n0 2GY8
2GY9
1n0 2GY6
2GY7
1n0
1n0 2GY5
10n 2GY3
2GY4
10n
1n0 2GY2
100n
2GY1
1u0 2UA3 RES
100p
2UA2
16V
2UA4
100u
100n
2UAT
100n
2UAA
1u0 2UAB RES
FUAH 2UAU RES
FUAF
AMBI-POWER
100p
100p
10K
2UAL
+12V
4K7
4K7
RES 4 3UAP-4 5
RES 3 3UAP-3 6
4K7
4K7 RES 2 3UAP-2 7
4K7
RES 1 3UAP-1 8 10K
3UAT-3
10K
1 2 3
AMBI-POWER
5UAA
2UA1
AMBILIGHT 3-SIDED PROTECTION
22u 16V
3u0 2UAP
22K
3UG0-1
22K
3UG0-2
+3V3
RES
+3V3-STANDBY
FUAT
S1D
IUAT +3V3-STANDBY
1u0
5 6 7 8 6UAC
6UAB
IUAS
+12Vb
T 3.0A 32V
PDZ15B(COL)
7UAB BC847BW 2
1u0
IUA1
3UAS
RES 2UAV
330u 6.3V
1UA1
1
6UAD
+3V3-WIFI
7UAC SI4778DY-GE3
PDZ15B(COL)
IUAR FUAG
10K
T 3.0A 32V
3
3UAT-2
+12Va
4
12K 1%
IUA0
+12V 9UA1-1 9UA1-2 9UA1-3 9UA1-4
3UAT-4
GND-AL
IUAN 100R
+3V3-WIFI B230LA-M3
0R1
3UAW
3UAV-4 3UAY
3UAV-2
1UA0
2UAM
100p
IUAP
REF 6UAF
4K7 RES 3UAN-4 4 5
12K 1%
2UAN
3 IUAV
T 2.0A 63V FOR DUAL SIDE AL ONLY
1u0
2UF8
22n
2UF7
240R 1% 2UAK
3UAR
1UA2 +12VAL
IUAJ
FUAP 5
12K 1%
IUFR
4
COM
6
10K
BP
+3V3-STANDBY
4 BC857BS(COL) 7UAA-2
1 BC857BS(COL) 7UAA-1
3UAT-1
EN
FUAU
5
+12VAL
2
3UAV-1
3
OUT
AMBI-POWER
IUAL
IUAK
1%
12K 1%
FUA0
IN
4K7 3UA6
1
3UAV-3
K R
3UA5
7UF8 RT9193-33GB
4K7
1 RES RES RES RES
2
3K3 1%
9UA2-1 9UA2-2 9UA2-3 9UA2-4
RES
1u0
A
6.3V 330u 2UA0
3
7UAF TS2431
2UA9 RES
4K7 RES 3UAN-3 3 6
+12VAL
+22V
+12VAL
RES 2 3UAN-2 7
+12VAL
RES 3UAN-1 1 8
GND-AL
+3V5-STANDBY
2
IUF0
5
7UA2 RES PMV31XN
IUA2 RES
3 IUF6
100K
CUA0
ENABLE+1V5+1V1 3UAH
1 2
+12VAL
IUFP
IUFS
4 IUFT
5
6 3UG9
3
GND-AL
VOUT
VIN EN
FLG RSET PG
9 10
AMBI-POWER
8 7
CSS GND
+3V3 10K
100n
22K
IUFU DETECT12V
2UAW
3UG2
1K8
IUF3
3UGA
2
2UAS
7UF7-1 BC847BPN(COL) 1
100n
STANDBY 1X15 REF EMC HOLE
GND-AL
7UAD SIP32429DN-GE4
optional 2UAR
22K
3UG0-4
22K
3UG0-3
1R0
RES 3UAC
220K
100n RES 3UAB
10K
10K
7UA3 BC847BW
RES
3UA9
2UAD
IUA3 STANDBYn
GND-AL
6 11
3UA8
1u0
IUAM
47K
RES 9UA0
4 BC847BPN(COL) 7UF7-2
10K
3UA7 10K
RES
3UAL
IUF1
3UAK
B01A
1u0
10-3-1
2UF6
10.3
QFU1.2E LA
GND-AL GND-AL
GND-AL
GND-AL
Power connector
6
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 144
B01B, Fusion supply
Fusion supply
B01B
5UC1
IUC0
+12Va 2 3 4 10 5 6 7 8
22u
2UCC
+12Va
IUC1
IUC2
3UC0
1
7UC2 SI4778DY-GE3 RES
4
9
1 2 3
22u
30R 22u 2UCB
10R
7UC4 AON7932 5 6 7
10u
2UCE
2K2
3UC2
7UC0 RT8228DGQW
2UCF
1%
MODE
2u0 5UC0
IUC8
10R
FUC0 +1V1-FD
2u0
2 8
22u
3
22u 2UCY
EN
3R3
100n
4
2UCW
FB
1n0
1n0
5UC2
220u 2.5V
CS
3UC8
2UCL
LGATE
IUCB
22u
PHASE
IUC7
2UCK RES
13 11
10
17
GND GND_HS 150K
3UCA
ENABLE+1V5+1V1
IUCA
LTST-C190CKT
1n0
2K2
UGATE
TON PGOOD
15
+5V
NC
5
2UCH
22u
IUCP 14 12
BOOT
IUC6
2UCJ RES
1 6 9 16 6UC0 DBG
10R
2UC1
7
VCC
3UC9 DBG
4 3UC3-4 5
3 3UC3-3 6
10R
7 2
3UC3-2
8 10R
3UC3-1
7UC3 SI4172DY-GE3 RES
4
1
IUC5
B340A-M3
6UC2
6UC1 10u
5 6 7 8
PDZ5.6B(COL)
1R0
220p
1 2 3
270K 5%
3UC7
2UCD IUC3
IUC4
2UCP
RES 3UC4
7UC1 BC847BW
3R3
3UC1
8 +5V
2UCR RES
GND-1V1F
CORE VOLTAGE SUPPLY FUSION GND-1V1F
GND-1V1F RES 2UCM
GND-1V1F
3UCG
DVS1
IUC9
22p 3UCB
3UCC
22K 1%
10R
22K 1%
120K 1% 3UCF
3UCE
220K 1%
1M0
3UCN
3UCR RES
12K 1%
180K 1% 3UCP
B01B
2UCA
10-3-2
QFU1.2E LA
3UCD RES
FUC1
SENSE+1V1-FD
+1V1-FD
10R 2UCN 1u0
GND-1V1F
GND-1V1F
GND-1V1F
Fusion supply
6
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 145
B01C, LNB supply
LNB supply
B01C
+12V
1UP1 T
+12V-DVBS
3.0A 32V
30R
100n 5UP6
+12V-DVBS
2UPL RES
10u
10u 25V
10u RES 2UPM
10u 2UPE
5UP5
7UP2 LNBH25LPQ
100n 2UPD
2UPC
IUPJ
17 VCC
3UPE
IUP2 9
VIA
ISEL
GND_HS
6UP5
RS1D
2UPG
IUPE
25
GND
PGND
22K
47u 25V
DSQIN
6UP6
NC 22
F22-DISECQ-TX
+V-LNB
B230LA-M3
DSQ
1 5 10 11 12 13 14 24 26 27 28 29 30 31 32 33
1u0
SDA
FUPA
20
2UPH
8 47R
VOUT
47u 25V
47R
ADDR SCL
2UPF
3UPD
7
470n
21
B230LA-M3
SDA-FE
3UPB
VUP
2UPK
SCL-FE
2UPJ
IUPF VBYP
6
IUP4 +V-LNB
3 16
220n
LX
6UP4
Φ
4
B01C
2 15 18 19 23
10-3-3
QFU1.2E LA
LNB supply
6
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2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 146
B01D, USB internal
USB internal
B01D RES RES RES RES
10u
2EHL
9EHE-1 9EHE-2 9EHE-3 9EHE-4
7EH2 RT9187GSP
IEH3
9
6
10
100u 6.3V
RES 2EHY
3EHY
1M0 1M0
10u
2EHM
NC VIA GND GND HS
5 7
3EM1
BP|ADJ
33K 1%
EN
+3V3-LAN
10K 1%
8
3 4
VOUT
3EHW
+3V5-STANDBY
VIN
3EM0
1 2
ENABLE-WOLAN
7EH4 RES TPS61200DRCG4
IEH2
3EM6 10K
6 7 24
USB-CAM-DM USB-CAM-DP 3EM7 10K
12 13 20
3EM8 10K
15 16 19
3EM9 10K
RESET-FUSION-OUTn
IEH4
3EM3 10K
IEM2
680R
3EM5
DD2DD2+ OVR2 DD3DD3+ OVR3
TEST|SCL
DD4DD4+ OVR4 VREG RESET SELFPWR GANG RREF
22u
22u 2EHT
120K 1%
IEHJ
2EHN
+3V3
18
RES 9EH8-1 RES 9EH8-2 RES 9EH8-3 RES 9EH8-4
3EHV 47K
100n
+3V3-LAN
26
IEH6
100K
RES 3EHP
2EHJ
3EHJ
10n
cEH0
3EHT RES
21 VCC_D SDA
USB1-DM USB1-DP
7EHJ BC847BW
22K
RES
100n
1C31 VIA1 VIA2 VIA3 VIA4
30 31 32 33
FEH1 FEH2 FEH3 FEH4 FEH5
USB-WIFI-DM USB-WIFI-DP IRQ-WOLANn
8
7
1 2 3 4 5 6
A1253WRA RES 3EHN +3V3-LAN
100n
2EM2
+3V3
DD1DD1+ OVR1
3EHU
29
3EM4
DD+
RES
2EH9
IEH5 1 2
RES 2EHS
12 13
100K
+3V3
28 17 IEM1 22 23 8
XOUT
RES
RES
3 4 25
USB-WIFI-DM USB-WIFI-DP
+3V3
L
2EHW
18p
XIN
5 VCC_A_1 9 VCC_A_2 14 VCC_A_3
11
GND_HS
10
2EM1
27
7EM1 CY7C65632-28LTXCT
VCC
18p
+3V3
UVLO
2EHV
100n IEH1
10
47n
2EM0
+3V3
FB
EN
IEH0
1
+3V5-STANDBY
100n
100n 2EM7
100n 2EM6
100n 2EM5
2EM4
100n
2EM3
+3V3
+3V3
VAUX
9
4u7
3
PS
2
9EM3
RES 5EH0 1n0
2EHU RES
7
VOUT
22K 1%
6
VIN
RES 3EHR
22u
2EHR RES
8
330K
5
+3V3-WIFI
RES 3EHS
USB-WIFI-DP
22K
9EM2
GND_HS VIA
USB1-DP
PGND
USB-WIFI-DM
11
9EM1
GND
USB1-DM
4
reserved
12M
B01D
1EM0
10-3-4
QFU1.2E LA
10K RES 2EHP 100n 1C30 USB-CAM-DM USB-CAM-DP
+5V
FEH6 FEH7 FEH8 FEH9 7
6
1 2 3 4 5
A1253WRA
USB internal
6
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 147
B01E, Miscellaneous
Miscellaneous
B01E
RES
FTA3
SDA-SRF
3TA2
RES
10R
FTA4
FTA6
RES 2TA1
10R 10p
SCL-SRF
RES 1T71
FTA2
3TA1
10p RES 2TA2
FTA1
1 2 3 4
A1253WRA
RES 5TA1 FTA5
RES 5TA2 +12V
ITA1
30R
TEMPERATURE SENSOR
5TA3 +3V3-STANDBY
1u0
30R RES 2TA3
+3V3
T 1.0A 63V
B01E
RES 1TA1
10-3-5
QFU1.2E LA
30R
Miscellaneous
6
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 148
B02A, Hybrid T/C tuner
B02A
Hybrid T/C tuner
B02A 22u 16V
30R
2FA5
5FA1
VCC-TUNER
100n
2FA9
100R
10p 5FA4 330n
3FA4 47R
5FA5
14
A3.3V IF1_P IF1_N AGC1 NC1 NC2 IF2_P IF2_N AGC2 I2C_SCL I2C_SDA 12
10p
2FAB
330n
10p 2FAC
3FA3 47R
FFA3
TUNER
30R SOC-IF-N SOC-IF-P
1 2 3 4 5 6 7 8 9 10 11
FFA2
10p 3FA2
13
100R
30R 5FA6
FFA9
2FAA
3FA1
5FA7
FFAA 5KA1
3KA0
330n
3KA1
5KA0 330n 10p
2FAG
47R
2FAH
47R
10p
IF-N-DVBT2 IF-P-DVBT2
FFA8
FFA4
3KA3
IF-AGC-DVBT2
10p
3KA5
22K
22n
3FAD
2K7
IFA6
10p
2FAE
100R
7KA0 PDTA114EU RES
2K7
FFAC
VCC-TUNER 6
3
IFA3 5
2
7FA1-2 BC857BS(COL) 4
3FAC
10K
IFA4 3FAB
470R
IFA5
470R
7FA1-1 BC857BS(COL) 1
3FAA
AGC-SWITCH
RES 3FA7
FFA5
100R
SOC-IF-AGC
2FAF RES 3KA4
FFAB
6K8
IF-AGC-DVBT2
2FAD
100R
RES 3KA2
1n0
SDA-FE SCL-FE
FFA6 FFA7
16
10p
2FA7
1F00 SUT-RE214Z
BM03B-SRSS-TBT 2FA3
100n
10u 2FA2
1 FFAD
4
15
5
VCC-TUNER
1 2 3
RES 3FA8
OUT COM
2FA1
RES
2FA0
30R
IN
FFAE
3FA9
3
+5V
2 4
6K8
IFAA
5FAA
2FA8
1FA0 DBG 7FAA LD1117S33
330u 6.3V
10-3-6
QFU1.2E LA
VCC-TUNER
Hybrid T/C tuner
6
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Circuit Diagrams and PWB Layouts
10.
EN 149
B02B, Satellite tuner
Satellite tuner
B02B
IRB1
3RB3 4R7
*
*
*
68p
*
10u 2RBV
2RBU
100n
100n 2RB6
1n0 2RB5
1n0 2RB4
1n0 2RB3
2RB2
10n
22u
2RBK
2RBL
IRB0 9RB9
2RB7
*
+3V3-DVBS
4n7
B02B
2RBE
4,5
27P
2RBW
7
33N
9RB6
25
JUMP
9RB7
25
JUMP
2RB7
27
10U
2RBU
27
4N7
2RBV
27
68P
9RB9
27
JUMP
X
-
3RB3
27
4R7
X
2K2
X X
-
X
X X
4
NC
VIA
RF_IN
* *
2RB1
GND RF LNA LT MIX DIG BB VCO 5 3 9 10 15 17 25 26
27p
*
*
DVBS-QP DVBS-QN 10p
8 100R
10p
7 34 35 36 37 38 39 40 41 42
DVBS-IP DVBS-IN
10p
2 3RB1-2
5 100R
2RBS
AS
21 20
4 6 3RB1-4 100R 1 7 3RB1-1 100R
2RBR
RF_OUT
3 3RB1-3
10p
I2C-ADDRESS: C6
AGC
XTAL
2RBP
QP QN
1K0
2RBN
SATELLITE TUNER
3RB0
100p
10p
SCL SDA
18 19
2RB8
10p
XTAL_CMD
IP IN
Φ
32
10p
XTAL_OUT
27p
FRB0
+V-LNB
2RBM
SYN
SYN HS 29 33
9RB7
X X -
2RB1
*
1 2 3 4 5
6 7 8 9 10
28
XTAL_IN
9RB6
X
2RBY
27P
9RB8
4,5
1R01
0p56
2RBM
+3V3-DVBS
-
RES 2RBG
X
23 24
27n
JUMP
100p
4,5
5RB0
-
9RB8
16
9RB0 RES
X
1n0 2RBH
100P
SM15T 2RBJ
4,5
47p 6RB0
2RBY
VCO
2RBC
Position Nr Affected Pin Default Value STV6110 STV6111
2
27
2RBB
2RBD 3n3
RES 10p
22
10p
12 13
14
MIX DIG BB VSS
2RBA
1
11
33n
2RK1 DVBS-AGC
31
100p
Diversity Matrix (Satellite Tuner dependant)
30
10p
RES 10p
8
2RB9
2RK0 SCL-S-TUNER SDA-S-TUNER
1
6
LNA LT
2RBW
1RB0 16M 2RBF
7RB0 STV6110AT 2 NC 4 NX3225JB
3
10p
RES 2RBT
10-3-7
QFU1.2E LA
* * +3V3-DVBS
Satellite tuner
6
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Circuit Diagrams and PWB Layouts
10.
EN 150
B02C, DVBT2 channel decoder
B02C
DVBT2 channel decoder
B02C +3V3-DVBT2-D
+1V2-DVBT2-P
41
1K0 DKC0 IKC4 3KC7
IF-AGC-DVBT2 2KCJ
3K3
3KC9
1 47 2
48
10K IKC5
100n 3KC8
TAINP TAINM
IKC6
46 45
RFAIN
GPIO0 GPIO1 GPIO2
I2C ADDRESS = 0XD8
SCL SDA
TIFAGC
TTUSCL TTUSDA
3K3
25
DKC1
26
29
RESET-FUSION-OUTn
30 5KC8
+3V3-DVBT2-D IKCB
30R
33 40
SLVADR0
VIA
OSCEN_X
RST_X
SLVADR3
NC1 NC2
100n
100n
8 9 12 13 14 15 16 17 20 21
1 3KC0-1 47R
TS-CHDEC-CLK TS-CHDEC-VALID TS-CHDEC-SOP
3 3KC0-3 47R
TS-CHDEC-DATA
SENSE+1V1-DVBT2
+1V2-DVBT2-C
5KCA
IKC8
+1V2-FE RES 5KC5
IKC7 +3V3-DVBT2-D
VCC-TUNER 3KC2 47R
SCL-FE SDA-FE
3KC3 47R
50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74
+1V2-DVBT2-C 30R RES 5KC7
+1V1-DVBT2
30R 5KC6
30R
+3V3 30R
+1V2-DVBT2-C
3KCE
IKC9 +1V2-DVBT2-P
22R
7KC0
GND_HS
+1V1-DVBT2
FKC1
CXD2834
+1V2
GAIA3
+1V1
RES
2KCL
VSS 6 11 18 23 27 31 36 39 43
RES
TESTMODE
7
49
24
2KC0
100n
30R 2KC1 32
100n 7 19 42
2KC3
100n
100n 2KC2
0 1 2 3 TSDATA 4 5 6 7
6p8 47R 8 2 3KC0-2 47R 6
1u0
3KCB
38 37
47R
3KC6 RES 2KCH
XTALO
5 4 3
2KCR
47R IKC3
2KCG
+3V3-DVBT2-D
100n 2KC4
2KC6
100n 2KC5
12p
3KCA
47p
4u7
34
1K0 IKC2
47p 2KCF 100n
35
10u
100n
IKC1
3KC1
2KCS
2KCE
5KC1 AGC-SWITCH
NC 2 1KC0 3KC4
RES 2KCK
DVDD PVDD TSCLK TSVALID TSSYNC
CVDD XTALI
1u0
9KC0 9KC1
4
7KC0 CXD2834ER IKC0
2KCD
4u7 IF-P-DVBT2 IF-N-DVBT2
1
2KCP
5KC0
3
IKCA
10 22 28 44
41M
2KCB
12p
2KCC
100n
2KC7
5KC9
+1V2-DVBT2-C
10n
10-3-8
QFU1.2E LA
DVBT2 channel decoder
6
2013-01-11
5
2012-11-08
3104 313 6618 19370_092_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 151
B02D, DVBS/S2 channel decoder
DVBS/S2 channel decoder
B02D
+3V3-DEMOD
FRDA
2RDR
1
100n 10K
3RD6
XTAL +3V3-DEMOD
31 3
RESET-FUSION-OUTn 9RD3
AGC-SWITCH
DVBS-QP DVBS-QN DVBS-IN DVBS-IP 5RDB
2RD7 100n 2RDA 100n 3RD2
9RD2
IF-AGC-DVBT2
IRDB
2RDH 100n
+3V3-DEMOD
9RD0 9RD1
IF-P-DVBT2 IF-N-DVBT2
2RD8 100n 2RD9 100n
3RD3 2RDF 100n
SDA-S-TUNER SCL-S-TUNER
1 2 29 30
DRD0 DRD1
10K
DVBS-AGC 22u
2RDS
30R
43 37 38 39 40
10K
41 42
2RDG 100n
3RD4 47R
3RD5
IRD5 IRD6
45 46
IRD3
4 5 6
47R +V-LNB
4K7
3RDB RES
3RD9 1K0
8 21 27 47
RESETB GPIO_0|JTAG_TMS ADDR
TS_SYNC TS_VAL TS_ERR|GPIO_1 TS_CLK TS_DATA0|TS_SER TS_DATA1 TS_DATA2 TS_DATA3 TS_DATA4 TS_DATA5 TS_DATA6 TS_DATA7
RSSI_ADC S_ADC_IP S_ADC_IN S_ADC_QP S_ADC_QN MP_A MP_B MP_C MP_D
100n
2RD6
VDD_VANA
36
2RD4 7 20 28 48
CLK_IN_OUT
SDA_HOST SCL_HOST
TC_ADC_P TC_ADC_N SDA_MAST SCL_MAST
VIA
DISEQC_CMD DISEQC_IN DISEQC_OUT
13 12 26 14
3RD0-2 2 3RD0-1 1
15 16 17 18 19 23 24 25
3RD0-3 3
11 10
3RD1
7 8 47R
TS-DVBS-SOP TS-DVBS-VALID
6
TS-DVBS-DATA
47R 47R
TS-DVBS-CLK
47R
IRD0 3RD8 IRD1 47R
SDA-FE SCL-FE
3RD7 47R
50 51 52 53 54 55 56 57 58
GND1|JTAG_TCLK GND2|JTAG_TDI GND3|JTAG_TDO GND4|JTAG_TRSTB GND5 35
10n
2RDN
2RDM
30R
4K7
+3V3-ANA
+3V3-DVBS
2RDT 100p
F22-DISECQ-TX
IRDC
3RDA RES
5RDC
XTA_O
2RD5
100n
2RDB
VDD_VCORE XTA_I|CLK_IN
9 VDD_VIO 22
32 44
34
+3V3-DVBS
100n
100n 2RD3
100n 2RD2
100n 2RD1
22u 2RD0
22u 2RDL
RES 2RDJ 10p
33
+3V3-DVBS
COM 100n
2RDP
30R
2 4
OUT
7RD0 SI2169-A10-GM
16M
GND_HS 49
IN
16V
3
22u
IRDA
22u
5RDA +5V
4 3 RES 2RDD
7RDA LD1117S33
NC
10p
RES 2RDE
2 1
22u RES 2RDK
30R 1RD0 NX3225JB
100n
+3V3-ANA
IRD2
5RDD +1V2-FE
6p8
B02D
RES 2RDC
10-3-9
QFU1.2E LA
+3V3-DEMOD
DVBS/S2 channel decoder
6
2013-01-11
5
2012-11-08
3104 313 6618 19370_093_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts 10-3-10
QFU1.2E LA
10.
EN 152
B03A, Fusion
B03A
Fusion
B03A
7J00-6 FUSION120
FRA5 FRA6 FRA7 FRA8 CA-OEn
FRA10 FRA11 FRA12 NAND-CLE NAND-ALE CA-A14
F-OEn F-WEn
AK29 AK24
F-CEn TS-DVBS-DATA TS-DVBS-VALID TS-DVBS-SOP TS-DVBS-CLK
AJ24 AE26 AF23 AK28 AH24 AG22 AG23
CA-A06
F-RDY
PODIREQ PODRST PODVS1 PODWAIT POD_DIR PODCE1 PODCE2 PODCD1 POD_CD2
POD_VCC_EN FRA0_AD0 POD_VPP_EN FRA1_PODWE HPD FRA2_PODIORD FRA3_PODIOWR FRA4_PODREG GPIO0 FRA5_AD1 GPIO1 FRA6_AD2 GPIO2 FRA7_AD3 GPIO3 FRA8_AD4 GPIO4 FRA9_PODOE GPIO5 FRA10_AD5 GPIO6 FRA11_AD6 GPIO7 FRA12_AD7 GPIO8 FRA13_CLE GPIO9 FRA14_ALE GPIO10 FRA15_PODA14 GPIO11
FOE FWE BOOTCS FCE2N FINT1 FINT2 FCLK FAVD_PODA6 FREADY
GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24
TS_TSB_MCU
AJ22 AH22 AF22 AJ23 AH23
CA-A04 CA-A05 CA-A07 CA-A08 CA-A09
AE27 AG30 AF30 AE28 AE30
CA-RDY CA-RST CA-VS1n CA-WAITn
FJ16
AD28 AD27 AF29 AD30
CA-CE1n CA-CE2n CA-CD1n CA-CD2n
AE29 AD29 R30 E1 F3 F4 F2 F1 G6 G5 G4 G3 G2 G1 H6 J6 J5 J4 J3 J2 J1 H1 H2 H3 H4 H5
GPIO0 GPIO1 GPIO2 GPIO3
CA-MDO0 CA-MDO1 CA-MDO2 CA-MDO3 CA-MDO4 CA-MDO5 CA-MDO6 CA-MDO7
AG20 AH20 AJ20 AK20 AE21 AF21 AG21 AH21
CA-MOCLK CA-MOSTRT CA-MOVAL
AJ21 AK21 AE22
TS-CHDEC-DATA TS-CHDEC-CLK TS-CHDEC-SOP TS-CHDEC-VALID IF-IN-P
U28 U29 U30 T26
2FZ1
F30 F29
10p 2FZ2
GPIO5 GPIO6 GPIO7 GPIO8
3FZ1 33R
GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24
100n 2FZ3
100n
E28 E27
2FZ4 2J10 18p
GPIO11
0 1 2 3 TS1D 4 5 6 7
H30
2 4
H29
TSSDI TSSCLK TSSSYNC TSSDEN
IN_P IN_N P PD N
XTLI24M XTLO24M
2J11 18p
RESET-STANDBYn
J26
TEST-CON TEST-MOD
P30 P29
ENABLE-STANDBY
H25
SPI-EN SF-SDI SF-SDO SF-WP SF-HOLDn SF-CS SF-CLK
K28 L28 L26 K30 L27 L29 L30
0 1 2 3 TS2OD 4 5 6 7 TS2OCLK TS2OSYNC TS2ODEN
AH18 AJ18 AK18 AE19 AF19 AG19 AH19 AJ19
MDI0 MDI1 MDI2 MDI3 MDI4 MDI5 MDI6 MDI7
AK19 AE20 AF20
MICLK MISTRT MIVAL
2FZ5 TS1CLK TS1SYNC TS1DEN
10p
RES 2FZ6 47p
IF-IN-N
3
AG29 AD26 AH29 AJ29 AF28 AH30 AG28 AJ30 AJ28 AJ27 AF27 AG27 AG24 AE23 AK22 AJ26
PODA4 PODA5 POD_A7 POD_A8 POD_A9
24M
FRA0 CA-WEn CA-IORDn CA-IOWRn CA-REGn
FRD0_PODD0 FRD1_PODD1 FRD2_PODD2 FRD3_PODD3 FRD4_PODD4 FRD5_PODD5 FRD6_PODD6 FRD7_PODD7 FRD8_PODA0 FRD9_PODA1 FRD10_PODA2 FRD11_PODA3 FRD12_PODA10 FRD13_PODA11 FRD14_PODA12 FRD15_PODA13
1J00
AK23 AF26 AE24 AK25 AH25 AH27 AK27 AJ25 AF25 AG26 AK26 AG25 AE25 AH26 AH28 AF24
1
CA-D00 CA-D01 CA-D02 CA-D03 CA-D04 CA-D05 CA-D06 CA-D07 CA-A00 CA-A01 CA-A02 CA-A03 CA-A10 CA-A11 CA-A12 CA-A13
7J00-7 FUSION120
FLASH_CI_GPIO
RSTN
TESTCON TESTMOD STB_EN
SPI_EN SFSI SFSO SFWPN SFHOLDN SFCES SFSCK
TAGCO
IF RF
DGPIO
1 2
0 1 2 3 4 STB_GP 5 6 7 8 9 10 TXD RXD STB SDA SCL LED IR KYBRD LGSEN CEC PWRON AVLINK
1 2
PCVS PCHS STB_RSTO HP_DETECT MUTE
F27 G26
3FZ0
4n7
SOC-IF-AGC
100R
FJ10
T28 T29
M27 M26 M25 N30 N29 N28 N27 N26 N25 P25 P26
STB-GP0 STB-GP1 STB-GP2 STB-GP3 STB-GP4 STB-GP5 STB-GP6 STB-GP7 STB-GP8 STB-GP9 STB-GP10
R27 R28 P27 P28
STB-TXD STB-RXD STB-SDA STB-SCL
J25 M29 J30 M30 M28 R29
LED IR KYBRD LGSEN HDMI-CEC PWRON
K25 K26
AVLINK1 AMBI-TEMP-FUS
J27 J28 J29
STB-RSTO
K27
HP-DETECT
H26
AUDIO-MUTEn
Fusion
6
2013-01-11
5
2012-11-08
3104 313 6618 19370_094_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
B03B, Fusion Umac controller
Fusion Umac controller
1K0
3J05
2J06
100n
M0-MVREF0
2J05
100n
1K0
3J06
100n
3J00 MM0ANA
FJ01
240R 1%
AE11 AE12 AE7 AD18
P MM1CK N 0 1 MM0BA 0 2 MM1VREF 1 MM0CASN MM0RASN MZQ1 MM1ANA_TEST MM0WEN DDR_RETN MM0CKE MM0ODT MM0RESETN MM0CSN
M1-MA0 M1-MA1 M1-MA2 M1-MA3 M1-MA4 M1-MA5 M1-MA6 M1-MA7 M1-MA8 M1-MA9 M1-MA10 M1-MA11 M1-MA12 M1-MA13 M1-MA14 M1-MA15
U1 P5 R1 T3 V2 U3 R3 V1 N4 P4
M1-BA0 M1-BA1 M1-BA2 M1-CAS# M1-RAS# M1-WE# M1-CKE M1-ODT M1-RESET# M1-CS#
P1 P2
M1-MCLK0 M1-MCLK0#
U7 U6 AA5 K6 AB4
M1-MVREF1
3J01
240R 1% MM1ANA
+1V5-M1
P MM0CK N DDR-RTN
0 MM0VREF 1 MZQ0 MM0ANA_TEST
MM0ANA
+1V5-M1
2J04
AK14 AJ14
0 MM1BA 1 2 MM1CASN MM1RASN MM1WEN MM1CKE MM1ODT MM1RESETN MM1CSN
DB47
T2 L2 N1 N3 L3 N5 L5 N2 M3 L4 R5 M1 T1 M5 L1 R2
100n
M0-MCLK0 M0-MCLK0#
M0-MVREF0
0 1 2 3 4 5 6 7 MM0A 8 9 10 11 12 13 14 15
M1-DQS0 M1-DQS#0 M1-DQS1 M1-DQS#1
2J03
AG12 AF14 AK13 AH12 AF12 AF11 AH13 AG11 AG15 AG14
MM0DQS3
AA2 AA3 V3 V4
M1-DQM0 M1-DQM1
100n
M0-BA0 M0-BA1 M0-BA2 M0-CAS# M0-RAS# M0-WE# M0-CKE M0-ODT M0-RESET# M0-CS#
+1V5-M0
MM0DQS1 MM0DQS2
DB78 DB75
1K0
AJ12 AJ17 AK15 AH15 AH17 AF15 AF17 AJ15 AH16 AG17 AF13 AK16 AK12 AF16 AK17 AJ13
MM0DQS0
0 1 2 3 4 5 6 7 MM1A 8 9 10 11 12 13 14 15
DB76
3J03
M0-MA0 M0-MA1 M0-MA2 M0-MA3 M0-MA4 M0-MA5 M0-MA6 M0-MA7 M0-MA8 M0-MA9 M0-MA10 M0-MA11 M0-MA12 M0-MA13 M0-MA14 M0-MA15
P N P N P N P N
P N P MM1DQS1 N MM1DQS0
AA1 W3
DB79 DB77
1K0
AK7 AK6 AJ10 AK10 AF2 AF1 AH4 AG4
DB14 DB16
0 1
M1-MD0 M1-MD1 M1-MD2 M1-MD3 M1-MD4 M1-MD5 M1-MD6 M1-MD7 M1-MD8 M1-MD9 M1-MD10 M1-MD11 M1-MD12 M1-MD13 M1-MD14 M1-MD15
3J04
M0-DQS0 M0-DQS#0 M0-DQS1 M0-DQS#1 M0-DQS2 M0-DQS#2 M0-DQS3 M0-DQS#3
0 1 MM0DM 2 3
MM1DM
W2 AC2 Y1 AC1 Y3 AB1 W1 AB3 T5 Y4 T4 W5 U5 Y5 U4 W4
FJ04
M1-MVREF1
MM1ANA
DB73
FJ03
2J02
AJ6 AK9 AE1 AH3
M0-DQM0 M0-DQM1 M0-DQM2 M0-DQM3
0 1 2 3 4 5 6 7 MM1DQ 8 9 10 11 12 13 14 15
100n
DB74
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 MM0DQ 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
1K0
DB72
DDR3
3J02
AH8 AH5 AH7 AJ5 AK8 AH6 AJ8 AK5 AK11 AF9 AJ11 AG9 AF10 AG8 AH10 AH9 AG1 AF3 AE3 AH1 AH2 AD3 AD1 AD2 AK4 AG3 AJ3 AK2 AK3 AJ2 AG5 AJ1
DB71
M0-MD0 M0-MD1 M0-MD2 M0-MD3 M0-MD4 M0-MD5 M0-MD6 M0-MD7 M0-MD8 M0-MD9 M0-MD10 M0-MD11 M0-MD12 M0-MD13 M0-MD14 M0-MD15 M0-MD16 M0-MD17 M0-MD18 M0-MD19 M0-MD20 M0-MD21 M0-MD22 M0-MD23 M0-MD24 M0-MD25 M0-MD26 M0-MD27 M0-MD28 M0-MD29 M0-MD30 M0-MD31
FJ05
B03B
7J00-8 FUSION120
2J00
B03B
2J07
EN 153
100p
10-3-11
QFU1.2E LA
FJ02
DB80
DB85
DB81
DB86
DB82
DB87
DB83
DB88 DB89
Fusion Umac controller
6
2013-01-11
5
2012-11-08
3104 313 6618 19370_095_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts 10-3-12
QFU1.2E LA
10.
EN 154
B03C, Umac 1 DDR3
Umac 1 DDR3
B03C
B03C +1V5-M1
+1V5-M1
100R
3J1P 100R 3J1R
3J1Y 100R
100R 3J25 100R 3J27
3J26
3J29
3J28
3J2B 100R
100R
3J2D
3J2C
3J2H
3J2G
100n
DB41
M1-MD0 M1-MD5 M1-MD6 M1-MD1 M1-MD2 M1-MD7 M1-MD4 M1-MD3
DB49
DB52
DB51
RAS ODT CAS CK CK CKE CS WE RESET
NC
E2 J9
DDR-MVREF12
DB57
H9
M1-MA15
DB06
DB64 DB53
M1-BA0 M1-BA1 M1-BA2 M1-RAS# M1-ODT M1-CAS# M1-MCLK0 M1-MCLK0#
VSSQ
3J2P
3J2N
DB54
DB55
J3 K9 J4 F4 G2 G4 F8 G8 G10 H3 H4 N3
VDD
B10 C2 E3 E10 VDDQ
0 1 2 3 4 5 6 7 A 8 9 10 11 12 13 14 BC AP
TDQS TDQS DM DQS DQS
0 1 2 3 DQ 4 5 6 7
VREFDQ VREFCA
A8 B8
DB58
M1-DQM1
C4 D4
DB90 DB91
M1-DQS1 M1-DQS#1
B4 C8 C3 C9 E4 E9 D3 E8
M1-MD14 M1-MD15 M1-MD10 M1-MD11 M1-MD12 M1-MD13 M1-MD8 M1-MD9
ZQ BA0 BA1 BA2 RAS ODT CAS CK CK CKE CS WE RESET
NC
VSS
A1 A4 A11 F2 F10 H2 H10 J8 N1 N11
M1-MA15
VSSQ
100R 3J2R 100R
M1-MCLK0#
3J2T
2J1A
1K0
3J14
100n
+1V5-M1
100R
2J1B
1K0
3J15
FJ09
DDR-MVREF12
100n
3J2S
10n
10n 2J1G
10n 2J1E
100n 2J21
100n 2J1C
100n 2J1Z
+1V5-M1
10n 2J1J
+1V5-M1
+1V5-M1
2J1V
DB93
DB98
DBA3
DB94
DB99
DBA4
DB95
DB59
DBA5
DB96
DBA1
DBA6
DB97
DBA2
DBA7
10n
10n 2J1K
10n 2J1H
10n 2J1F
100n 2J20
+1V5-M1
100n 2J1D
100R 100R
DB40
100R
3J2Q M1-RESET#
A1 A4 A11 F2 F10 H2 H10 J8 N1 N11
BA0 BA1 BA2
100n 2J1W
100R
B4 C8 C3 C9 E4 E9 D3 E8
DB50
ZQ
2J1U
M1-CKE
3J2M
3J2L
10n
100R
M1-DQS0 M1-DQS#0
M1-CKE M1-CS# M1-WE# M1-RESET#
10n
M1-ODT
DB42 DB43
K4 L8 L4 K3 L9 L3 M9 M3 N9 M4 H8 M8 K8 N4 N8
A2 A9 B2 D9 F3 F9 J2 J10 L2 L10 N2 N10
3J2K 100R
10n 2J84
100R
C4 D4
M1-MA0 M1-MA1 M1-MA2 M1-MA3 M1-MA4 M1-MA5 M1-MA6 M1-MA7 M1-MA8 M1-MA9 M1-MA10 M1-MA11 M1-MA12 M1-MA13 M1-MA14
100R 3J2J
M1-CS#
M1-CKE M1-CS# M1-WE# M1-RESET#
10n 2J88
100R
3J2F 100R
10n 2J83
M1-WE#
100R 3J2E
10n 2J87
100R
10n 2J82
100R
M1-CAS#
VREFDQ VREFCA
VSS
10n 2J86
M1-RAS#
DB01 DB39
100n 2J81
M1-BA2
+1V5-M1
100R 3J2A
100n 2J1T
100R
100n 2J85
M1-BA1
100R
10u 2J1S
100R
DB35 DB36 DB38
10u 2J1R
M1-BA0
M1-MCLK0
F4 G2 G4 F8 G8 G10 H3 H4 N3
0 1 2 3 DQ 4 5 6 7
A2 A9 B2 D9 F3 F9 J2 J10 L2 L10 N2 N10
3J24
M1-BA0 M1-BA1 M1-BA2 M1-RAS# M1-ODT M1-CAS# M1-MCLK0 M1-MCLK0#
2J22
100R
3J10
3J23
10u 2J25
M1-MA15
J3 K9 J4
DB62
2J24
100R
2J14
3J21 100R
3J22 M1-MA14
H9 240R
100R 3J20
2J27
M1-MA13
100R
100n 2J15
3J1Z
47u 16V
100R
DDR-MVREF11
3J1V 100R
3J1W M1-MA12
DDR-MVREF11
100R 3J1U
1K0
100R
3J12
100R
M1-MA11
E2 J9
75R
M1-MA10
FJ08
3J1T
3J1S
3J16
100R
DB32 DB33 DB34
DQS DQS
M1-DQM0
75R
100R
M1-MA9
3J17
M1-MA8
1K0
100R
3J11
3J1M
3J1L 3J1N
2J16
100R
100n
100R
M1-MA7
2J17
M1-MA6
DB31
DB56
B3 B9 C10 D2 D10
3J1K
A8 B8
240R
100R 3J1J
7J02 H5TQ2G83BFR TDQS TDQS DM
100n
3J1H
3J1G
100n
100R
RES
M1-MA5
100R
10n
100R
2J12
M1-MA4
+1V5-M1
3J1F
3J1E
VDDQ
3J13
3J1D 100R
VDD 0 1 2 3 4 5 6 7 A 8 9 10 11 12 13 14 BC AP
2J18
100R 3J1C
10n
100R
2J89
100R
M1-MA3
K4 L8 L4 K3 L9 L3 M9 M3 N9 M4 H8 M8 K8 N4 N8
100n 2J19
3J1B
3J1A M1-MA2
M1-MA0 M1-MA1 M1-MA2 M1-MA3 M1-MA4 M1-MA5 M1-MA6 M1-MA7 M1-MA8 M1-MA9 M1-MA10 M1-MA11 M1-MA12 M1-MA13 M1-MA14
100R
100R
B3 B9 C10 D2 D10
3J19
3J18 M1-MA1
A3 A10 D8 G3 G9 K2 K10 M2 M10
M1-MA0
B10 C2 E3 E10
A3 A10 D8 G3 G9 K2 K10 M2 M10
+1V5-M1 7J01 H5TQ2G83BFR
Umac 1 DDR3
6
2013-01-11
5
2012-11-08
3104 313 6618 19370_096_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts 10-3-13
QFU1.2E LA
10.
EN 155
B03D, Umac 0 DDR3
B03D
Umac 0 DDR3
B03D +1V5-M0
3J45 3J47
3J46 100R
3J49
3J48
3J4F 100R
100R
3J4H
3J4G
100n
240R 1%
M0-DQS1 M0-DQS#1
E3 F7 F2 DB69 F8 H3 H8 DB17 G2 H7
M0-MD15 M0-MD12 M0-MD9 M0-MD10 M0-MD11 M0-MD14 M0-MD13 M0-MD8
VSSQ
J1 J9 L1 L9
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
DB18 DB19
DB20 DB21
H1 M8
DDR-MVREF02
L8
DB67
DB22
M0-BA0 M0-BA1 M0-BA2 M0-RAS# M0-ODT M0-CAS# M0-MCLK0 M0-MCLK0#
M2 N8 M3
DB23
J3 K1 K3 J7 K7 K9 L2 DB24 L3 T2 E7 D3
100R 3J4M
3J4L 100R
A1 A8 C1 C9 D2 E9 F1 H2 H9 VDDQ
0 1 2 3 4 5 A 6 7 8 9 10 11 12 13 14 15 BC AP
0 1 2 3 DQU 4 5 6 7 DQSU DQSU DQSL DQSL
VREFDQ VREFCA
0 1 2 3 DQL 4 5 6 7
ZQ BA0 BA1 BA2 RAS ODT CAS CK CK CKE CS WE RESET DML DMU
NC
D7 C3 C8 C2 A7 A2 B8 A3
M0-MD16 M0-MD18 M0-MD20 M0-MD23 M0-MD17 M0-MD21 M0-MD19 M0-MD22
DB25
DB26
C7 B7 F3 G3 E3 F7 F2 F8 H3 H8 G2 H7
M0-DQS2 M0-DQS#2 DB27 DB29
M0-DQS3 M0-DQS#3 M0-MD29 M0-MD28 M0-MD25 M0-MD26 M0-MD27 M0-MD30 M0-MD31 M0-MD24
DB30
DB70
J1 J9 L1 L9
VSSQ
VSS
M0-DQM3 M0-DQM2
M0-MCLK0#
3J4P 100R
2J2E
100n
1K0
2J2F
1K0 10n
10n 2J2Z
10n 2J2V
10n 2J2T
100n 2J2R
100n 2J3E
100n 2J3C
+1V5-M0
2J3A
DBB3
DBB8
DBC3
DBB4
DBB9
DBC4
DBB5
DBC0
DBC5
DBB6
DBC1
DBC6
DBB7
DBC2
DBC7
10n 2J2W
10n 2J2U
100n 2J2S
100n 2J3D
100n 2J3B
2J39
10n
+1V5-M0
+1V5-M0
10n 2J30
10n
10n 2J2P
3J31
FJ0B
DDR-MVREF02
+1V5-M0
3J30
+1V5-M0
100n
3J4N 100R
NC
VSS
10n
100R
DB13 DB15
3J4K
3J4J
10n 2J2Y
M0-RESET#
F3 G3
VDD M0-MA0 M0-MA1 M0-MA2 M0-MA3 M0-MA4 M0-MA5 M0-MA6 M0-MA7 M0-MA8 M0-MA9 M0-MA10 M0-MA11 M0-MA12 M0-MA13 M0-MA14 M0-MA15
M0-CKE M0-CS# M0-WE# M0-RESET#
10n 2J2M
100R
DML DMU
M0-DQS0 M0-DQS#0
M0-DQM1 M0-DQM0
10n 2J2N
M0-CKE
E7 D3
DB11 DB12
100R
10n 2J2K
M0-ODT
RAS ODT CAS CK CK CKE CS WE RESET
100R 3J4E
100R
DB66
M0-CKE M0-CS# M0-WE# M0-RESET#
3J4D
3J4C
M0-CS#
RES
10n 2J2L
100R
3J4B 100R
100n 2J2H
M0-WE#
100R 3J4A
100n 2J2J
100R
100n 2J38
100R
M0-CAS#
100n 2J37
M0-RAS#
DB65 DB08
100n 2J36
100R
+1V5-M0
100n 2J35
M0-BA2
100R
100n 2J34
100R
M0-MCLK0
100R
J3 K1 K3 J7 K7 K9 L2 L3 T2
DB60 DB04 DB05 DB07
100n 2J33
M0-BA1
BA0 BA1 BA2
C7 B7
DB09
B1 B9 D1 D8 E2 E8 F9 G1 G9
3J43
3J42 3J44
M0-BA0 M0-BA1 M0-BA2 M0-RAS# M0-ODT M0-CAS# M0-MCLK0 M0-MCLK0#
10u 2J32
100R
3J41 100R
10u 2J3G
M0-BA0
100R 3J40
10u 2J31
100R
10u 2J3J
100R
M0-MA15
0 1 2 3 DQL 4 5 6 7
ZQ
M2 N8 M3
3J3Z
3J3W M0-MA14
DB68
100R
100R
2J3F
M0-MA13
2J28
3J3V
DQSL DQSL
VREFDQ VREFCA
L8 3J2U
100R
100n 2J29
3J3T
3J3S 3J3U
2J3H
100R
DDR-MVREF01
3J3R 100R
2J3K
M0-MA12
DDR-MVREF01
H1 M8
100R 3J3Y
47u 16V
M0-MA11
100R
FJ0A
3J3P
DQSU DQSU
DB10
M0-MD0 M0-MD5 M0-MD4 M0-MD7 M0-MD2 M0-MD1 M0-MD6 M0-MD3
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
100R
1K0
100R
DB02 DB03
3J3M
3J3L 3J3N M0-MA10
DB00
75R
100R
3J32
M0-MA9
DB61
100R
75R
100R
3J33
M0-MA8
1K0
3J3K
100n
100R 3J3J
3J2V
3J3H
3J3G
3J2W
100R
100R 2J2A
M0-MA7
3J3F
3J3E
100n
100R
3J3D 100R
2J2B
M0-MA6
100R 3J3C
10n
100R
2J01
100R
M0-MA5
10n
M0-MA4
D7 C3 C8 C2 A7 A2 B8 A3
240R 1%
3J3B
3J3A
7J04 H5TQ2G63BFR-PBC 0 1 2 3 DQU 4 5 6 7
100n
100R
100R
2J2G
M0-MA3
+1V5-M0
3J2Z
3J39
100n 2J2D
100R 3J38
2J2C
100R
0 1 2 3 4 5 A 6 7 8 9 10 11 12 13 14 15 BC AP
B1 B9 D1 D8 E2 E8 F9 G1 G9
3J37
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
100R
100R 3J36
M0-MA2
M0-MA0 M0-MA1 M0-MA2 M0-MA3 M0-MA4 M0-MA5 M0-MA6 M0-MA7 M0-MA8 M0-MA9 M0-MA10 M0-MA11 M0-MA12 M0-MA13 M0-MA14 M0-MA15
3J35
3J34 M0-MA1
VDDQ
B2 D9 G7 K2 K8 N1 N9 R1 R9
VDD M0-MA0
+1V5-M0
A1 A8 C1 C9 D2 E9 F1 H2 H9
7J03 H5TQ2G63BFR-PBC
B2 D9 G7 K2 K8 N1 N9 R1 R9
+1V5-M0
Umac 0 DDR3
6
2013-01-11
5
2012-11-08
3104 313 6618 19370_097_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts 10-3-14
QFU1.2E LA
10.
EN 156
B03E, Fusion
B03E
Fusion
B03E
7J00-5 FUSION120
PANEL_USB LAN_IO TA1_P
7J00-4 FUSION120 A22 B22 E22 D22 A23 B23 E23 D23 A24 B24 E24 D24
AR-1 AL-1
AR-3 AL-3 AR-4 AL-4
D26
SPDIFIN 3J53
SCKIN WSI2SIN SDI2SIN
10R 3J55 10R
3J54 10R
IJ11
C26 B26 A26
AC28 C15 A15 B16 A16
CVBS CVBS3
C16 Y-G1 PB-B1 PR-R1
A20 A19 A18
Y-G2 PB-B2 PR-R2
B20 B19 B18
Y-G3 PB-B3 PR-R3
C20 C19 C18
IJ12 IJ13 SC1-STATUS FB1
D20 D19 D18 C17 B17 D17 A17
AV_IN_OUT AR_1 AL_1 AR_2 AL_2 AR_3 AL_3 AR_4 AL_4 AR_5 AL_5 AR_6 AL_6
HPHOL HPHOR SUBO SPK_AOR1 SPK_AOL1 AOR2 AOL2
SPDIFIN
SPDIFO
SCKIN WSI2SIN SDI2SIN
SCKI2SOUT WSI2SOUT 1 SDI2SOUT 2 3 I2SCLK
B21 A21
HPHOL HPHOR
C21 A25 B25 D25 C25
AUD-L AUD-R
USB1-RREF
E26 Y26 Y27 AA30 AA29 AB28 Y25
SPDIFO 3J07 3J08 3J09 3J50 3J51 3J52
GPANA1
10R 10R 10R 10R 10R 10R
SCKI2SOUT WSI2SOUT SDI2SOUT1 SDI2SOUT2 SDI2SOUT3 I2SCLK
1 2 CVBS 3 4 C Y_G1 PB_B1 PR_R1 Y_G2 PB_B2 PR_R2 Y_G3 PB_B3 PR_R3 Y_G4 PB_B4 PR_R4 FS1 FB1 FS2 FB2
1 CVBS_OUT 2
USB1-DP USB1-DM
A14 A13
AB30 AB29 AB26 AB27
USB2-RREF
AC30 AC29 AB25 AC27
EN-RXD0 EN-TXD0 EN-RXD1 EN-TXD1 FJ0F FJ0G FJ0H FJ0J
W29 V29 W28 V28 W27 V27 W26 V26
EN-RXC EN-TXC
V25 U25
EN-RXEN EN-TXEN
W30 V30
EN-MDC EN-MDIO
W25 Y30
HDMIF-RX0+ HDMIF-RX0HDMIF-RX1+ HDMIF-RX1HDMIF-RX2+ HDMIF-RX2HDMIF-RXC+ HDMIF-RXC-
A29 B29 A28 B28 A27 B27 B30 C30
HEAC
T27
PWR5V
T30
RREF
C29
USB2-DP USB2-DM
CVBS-OUT1 IJ10
D1_P D1_N USBPPON1 TXRTUNE1 D2_P D2_N USBPPON2 TXRTUNE2
GBE_RXD0 GBE_TXD0 GBE_RXD1 GBE_TXD1 GBE_RXD2 GBE_TXD2 GBE_RXD3 GBE_TXD3 GBE_RXC GBE_TXC GBE_RXEN GBE_TXEN GBE_MDC GBE_MDIO
RX0_P RX0_N RX1_P RX1_N RX2_P RX2_N RXC_P RXC_N HEAC PWR5V
TA1_N TB1_P TB1_N TC1_P TC1_N TCLK1_P TCLK1_N TD1_P TD1_N TE1_P TE1_N TA2_P TA2_N TB2_P TB2_N TC2_P TC2_N TCLK2_P TCLK2_N TD2_P TD2_N TE2_P TE2_N TA3_P TA3_N TB3_P TB3_N TC3_P TC3_N TCLK3_P TCLK3_N TD3_P TD3_N TE3_P TE3_N TA4_P TA4_N TB4_P TB4_N TC4_P TC4_N TCLK4_P TCLK4_N TD4_P TD4_N TE4_P TE4_N
RREF H_BK_LITE PWM0 PWM1 BOOST BKLGON TCON_ON NC_IDP_HPD NC_LOCKN NC_HTPDN
B3 A3 C3 C4 A4 B4 B5 A5 C5 C6 A6 B6
TX1-ATX1-A+ TX1-BTX1-B+ TX1-CTX1-C+ TX1-CLKTX1-CLK+ TX1-DTX1-D+ TX1-ETX1-E+
B9 A9 C9 C10 A10 B10 B11 A11 C11 C12 A12 B12
TX2-ATX2-A+ TX2-BTX2-B+ TX2-CTX2-C+ TX2-CLKTX2-CLK+ TX2-DTX2-D+ TX2-ETX2-E+
E3 D3 E4 D4 F5 F6 D5 E5 D6 E6 D7 E7
TX3-ATX3-A+ TX3-BTX3-B+ TX3-CTX3-C+ TX3-CLKTX3-CLK+ TX3-DTX3-D+ TX3-ETX3-E+
E10 D10 F10 F11 D11 E11 E12 D12 F12 F13 D13 E13
TX4-ATX4-A+ TX4-BTX4-B+ TX4-CTX4-C+ TX4-CLKTX4-CLK+ TX4-DTX4-D+ TX4-ETX4-E+
D2 B2 C1 B1 A2 C2 E9 F9 G9
BL-SPI-CLK-FUS 3D-LR-FUS BL-SPI-CS_BL-I-CTRL-FUS BL-DIM-FUS
7J00-9 FUSION120
RXD-SERVICE TXD-SERVICE
Y29 Y28
EJT-TCK EJT-TMS EJT-TDO EJT-TDI EJT-TRSTN
K2 K3 K1 K5 K4
JTAG_I2C UART SCLS RXD TXD
TCK TMS TDO TDI TRSTN
SDAS
SCLM1 SDAM1 SCLM2 SDAM2 SCLM3 SDAM3
U26 U27
AA28 AA27
SCL-M1 SDA-M1
E2 D1
SCL-M2 SDA-M2
AA26 AA25
SCL-M3 SDA-M3
BL-SPI-SDO-FUS 9GA2 RES IJ0T IJ0U
Fusion
6
2013-01-11
5
2012-11-08
3104 313 6618 19370_098_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 157
B03F, Fusion power supply
Fusion power supply 10u
10u 2J63
100n 2J64
100n 2J62
100n 2J61
100n 2J5Z
100n 2J5W
100n 2J5V
100n 2J5U
100n 2J60
10u
100n
100n 2J77
100n 2J76
100n 2J75
10n
10n 2J6V 10n
10n
10n 2J6C
100n 2J74 10n 2J6L 10n 2J67
10n 2J6U
10u 2J7J
10u 2J7L 100n
100n 2J7D 100n 2J72
100n 2J73 10n 2J6F 10n 2J66
10n 2J6P
10n 2J6E 10n 2J65
10n 2J6N
10u 2J7K 100n 2J7C 100n 2J71 10n 2J6D 10n 2J68
10n 2J6M
10u 2J7G
10u 2J7H
100n 2J7B
100n 2J7A 100n 2J6Z
100n 2J70
10n 2J6R
10n 2J6Y 10n 2J6G
10n 2J6H 10n 2J6A
10n 2J69
2J7E 2J79 2J6W 2J6S 2J6J 2J6B
2J08
220u 2V0
2J95 100n
10n 10n 2J09
10n
10n 2J5M
120R
+1V5
2J93
2J59 10u
2J5A 2J80 2J5L 10n
5J0P
2J5K 10n
2J5B 10u
2J5C 100n 2J5F
10n
2J5D 100n 2J5G 10n
VDDC
10n
AA15 Y15 W15 W16 W14
+1V2-MIPS
+1V5-M0 IJ0R 100n
2J78
SENSE+1V2-MIPS
120R
2J5H 10n
100n
K29
+1V5 5J0R
2J94
10n
2J99
10n
2J98
120R
2J6T
LDO11_CAP
5J0G +1V1-FA
K13 L13
10u
GNDP
G11
+1V5-M1 IJ0S
10n 2J23
2J4N
100n
2J4M 10u
IJ0P VDDP
2J7F 10n
2J58
1n0
10u
A8 B8 C8 D9 K11 L11
22u
LVDSGND IJ0K
5J0N +3V3
+2V5-F
2J26
VSS11A_3
5J0F 120R
100u 2.0V
D28
VDD33A
IJ0N
2J13
10n 10u
2J55
2J54
2J53
100n
D30
LVDSVDD
VSS11A_1
2J4Y
+2V5
AVDD25_HDMI
2J4P 10u
C27
A7 B7 C7 D8 E8 F8 G8
100n
D29 IJ0J
VSS11A_2
4n7
10n 10u
2J52
2J51
2J50
100n
D27
2J5N 10n
10n
10n
2J4G 2J96
N24
10n
VQPS
VDD11A
R4 AB5 AC5 M6 N6 V6 W6 Y6 AA6 AB6 AC6 M7 N7 V7 W7 Y7 AA7 AB7 AC7 P11 V11 P12 V12 P10 V10 W10 Y10
10n 2J7Y
AVSS25 AVSS25
2J4R
C28
5J0M
120R
1u0 10n
REF_BG
IJ0H
5J0L +1V1-FA
120R
AVDD25
10u
100n
10u 2J4W
2J4Z
K12 L12
+2V5-F
R10 R11 U10 U11
120R
10n 2J7P
VSS_M1P G10
120R
120R
VSSAC_1
IJ0G
5J0K +2V5
5J0E
AC3 AC4 1u0
AB24
VDD2V5_M1P
VDD33
120R
IJ0M
VSSAC_2
2J4J
AC24
2J4L
10u
100n
2J4U
AC25 2J4V
120R
100n
+3V3
VDD25
+2V5-F
Y12 Y13 Y14 AA13 AA14
2J4H
10u
2J4S
2J4T
100n
VSS_M0P AC26
IJ0F
5J0J
5J0D
AG6 AG7 2J4F
VDD2V5_M0P
120R
100n
IJ0E
5J0H +2V5
SENSE+1V1-FD
100n 2J92
IJ0L
2J97
SUPPLY_2
+1V1-FD
IJ00
10n 2J7R
100n 9J04
9J03
7J00-2 FUSION120
100n 2J7Z
+2V5-F
10n 2J7S
5J0C 120R
100n 2J7W
IJ0D
10n 2J7T
K16 L16
2J7V
2J4A
+3V3
G15
VSS
2J44
5J0B 120R
2J7U
VDD25_LPLL VSSA_LPLL
IJ0C
VDDC
AVSSH
B13 C13
VDDC
2 3 INN 4
+3V3
C14
2J4C
AVDDH DAC2
100n
2J91
100n
E18 E19 E20
INN16
5J0A 120R
2J4B 10u
DAC1
2J4E
VDD33_XTAL
B14
2J4D 10u
AVDDH
2J49 10u
AVSS_STB
100n
100n
E17
2J90
120R
VDDM1
E21 F21
AVSSH
+3V3-STANDBY 2J40
AVSS
5J09 +3V3
100n
IJ06 10u 2J3Z
G22 G23
IJ0B
H28 5J06
AVDD33_STB
AVDD
IJ14
VDDM0
100n 100n
K24
120R
AVSSH_CH516
PWR_GND
10u 2J3T 10u 2J3V
J24
IJ05
+3V3-STANDBY
IJ0A
AVDDH_CH516
VDDM0
2J3U 2J3W
5J04
G16
IJ09
M11 G12 M12 T12 W12 G13 M13 P13 T13 V13 W13 D14 E14 F14 G14 M14 P14 T14 V14 D15 E15 F15 M15 P15 T15 V15 M16 P16 T16 V16 M17 P17 T17 V17 W17 M18 P18 T18 V18 W18 M19 P19 T19 V19 W19 L20 M20 N20 P20 R20 T20 U20 V20 W20 Y20 G21 L24 M24 L25 T11 K10 K21 L10 L21 M10 M21 N21 P21 R21 T10 T21 U21 V21 W21 Y21 AA20 AA21
AA12 AA11 AA10 AE14 AD14 AE13 AD13 AD12 AD11 Y11 W11 AE10 AD10 AE9 AD9 AF8 AE8 AD8 AF7 AD7 AF6 AE6 AD6 AF5 AE5 AD5 AF4 AE4 AD4
B15
120R
2J43 10u
100n SGNDAU
D21 C22 F22 C23 F23 C24 F24 E25
VDD_1V2
AVDDL_CH516 AVSSL_CH516
IJ04
5J03 +3V3
120R
VREFAU
VSS
F16
+1V2-FA 120R
VSS
D16 E16
100n
2J3S
120R
10u 2J3R
+1V2-FA
2J42
AVSSH_CH234
IJ03
5J02
5J07
E29 F28
2J46
F18 G18
IJ08 AVDDL_DRX
2J45 10u
100n
10u 2J3P
2J3Y
120R
120R
2J48
AVDDH_CH234
IJ02
5J01 +3V3
2J41 10u
F17 G17
AVSSH_DRX
100n
AVSSL_CH234
100n
AVDDL_CH234
F20 G20
A1 AK1 M2 U2 Y2 AB2 AE2 AG2 P3 M4 AA4 AJ4 V5 L6 P6 R6 T6 K7 L7 P7 R7 T7 AJ7 AJ9 AG10 N11 AH11 N12 R12 U12 N13 R13 U13 AG13 L14 N14 R14 U14 AH14 L15 N15 R15 U15 AD15 AE15 N16 R16 U16 Y16 AD16 AE16 AG16 AJ16 L17 N17 R17 U17 Y17 AD17 AE17 L18 N18 R18 U18 Y18 L19 N19 R19 U19 Y19 AD20 AD21 P24 U24 V24 W24 A30 AK30 K14 K15 K17 K18 K19 K20 N10 AA16 AA17 AA18 AA19
5J05 +3V3
2J47 10u
F19 G19
G29 G30 E30 G27 G28 H27
100n
100n
2J3N
10u 2J3M
+1V2-FA 120R
IJ07
AVDDH_DRX
VSS
SUPPLY_1 IJ01
VDDC
7J00-1 FUSION120
5J00
100n 2J5T
2J5R
J7 H7 G7 F7
VDDF2
VDDF1
F26 AD25 T25 G25 F25 AD24 AA24 Y24 T24 H24 G24 AD23 AD22 AD19 AG18 AF18 AE18
R26 R25 R24 VDDF_STB
7J00-3 FUSION120
100n 2J5S
+3V3
10u
+3V3-STANDBY
2J5Y
B03F 10n 2J5P
B03F
2J56
10-3-15
QFU1.2E LA
Fusion power supply
6
2013-01-11
5
2012-11-08
3104 313 6618 19370_099_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 158
B04A, Control
Control
B04A
7GM1 PCA9540BGD
VDD 2
SDA-BE
SDA-BL SCL-BL
RES
+3V3
100K
100K
SDA-BL SCL-BL
3GM1
3GM2
3GM3 3GM4
100K
100K
6 4K7
4K7 3CY2
4K7
3CY1-4 4
4K7 3CY1-3 3 6
5
3CY1-2 2 7
1 3CY1-1 8
7 8
SD1 SC1
RES
SDA-DISP SCL-DISP
1CV2 DBG
3 3CY3-3 6
SDA-BE
RES 9GM1
SDA-DISP
SCL-DISP
SCL-BE
RES 9GM2
SCL-DISP
SDA-DISP
EJT-TRSTN
47R
5 EJT-TMS
47R
1
8
47R 3CY3-1
8
EJT-TDO
EJT-TCK
SDA-BE
RES 9GM3
SDA-BL
SCL-BL
SCL-BE
RES 9GM4
SCL-BL
SDA-BL
1CV3 DBG
FCVC FCVD FCVE
5
47R 3CY4
BM06B-SRSS-TBT
47R
4
1 2 3
BM03B-SRSS-TBT
2 3CY3-2 7
FCY6 7
SCL
SDA-DISP SCL-DISP
VSS
4 3CY3-4 5
FCY1 FCY2 FCY3 FCY4 FCY5
4 5
SD0 SC0
SDA
1
SCL-BE
1CY1 DBG
3
4K7
4K7 3GM6
3GM5
+3V3
+3V3
1 2 3 4 5 6
B04A
+3V3
4K7
4
1 2 3
BM03B-SRSS-TBT
EJT-TDI 3CVF
SCL-M2
SDA-M2
1CV1 DBG
SCL-BE
47R 3CVG
SCL-BE
FCV2
SDA-BE
FCV3
FCV1 SDA-BE
5
47R 3CV2
3D-LR-FUS
FCVB
4
1 2 3
BM03B-SRSS-TBT
3D-LR
47R 1CV6 1 2 3
FCY7 FCY8
4
FCY9
TXD-STANDBY RXD-STANDBY
BL-SPI-CS_BL-I-CTRL-FUS
5
3GD5
BL-SPI-CS_BL-I-CTRL
10R
BM03B-SRSS-TBT BL-DIM RESET-RF4CEn TXD-RF4CE
47R 3GM7 RES
RXD-RF4CE
+3V3 3
1
RC_IRQ-RF4CEn 3D-LED_3D-RF 7GM2 RES PDTC114EU
10R
10R
3CVW
3CVY
FCVH FCVJ
10R FCVK
10R
9 10
STANDBYn TXD-RF4CE DETECT12V RXD-RF4CE LCD-PWR-ONn BL-ON RC_IRQ-RF4CEn
10p
2 SCL-FE TXD-SERVICE SDA-FE RXD-SERVICE
3CV8
BL-SPI-CLK-FUS
10R 3CV9
BL-SPI-SDO-FUS
AMBI-SPI-CCLK
3CVM 47R 3CVP
GPIO1
GPIO5 BM20B-SRDS-G-TF GPIO6
3CYC
DC02
1CV4 DBG TXD-RF4CE
TXD-RF4CE
FCVL FCVA
RXD-RF4CE
FCVM
RXD-RF4CE
5
POWER-OK
POWER-OK
47R
DC03
FH52-8S-0.5SH
AMBI-SPI-MOSI
47R
21 22
1 2 3 4 5 6 7 8
+3V3-STANDBY
10R GPIO0
2CV8
4K7
FCVG
3CVE
2CV9 10p
SCL-M3 TXD-STANDBY SDA-M3 RXD-STANDBY
3CVD
2CVA 10p
1CV5 DBG 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
1C27
FCVF
3CVC 10R
2CVB 10p
FCVN
3CV3
BL-DIM-FUS
2CVC 10p
10-3-16
QFU1.2E LA
4
1 2 3
BM03B-SRSS-TBT
3CVU +3V3 10K 3CVA +3V3 10K
3CYB
GPIO7 GPIO11 GPIO15
DC06
RES
47R 3CV4
IRQ-EXPANDERn
AMBI-SPI-CCLK
TXD-RF4CE
RXD-RF4CE
RES
3CV5 10R 3CV7
GPIO20
RES
+3V3-STANDBY
10K 3CVR 10K
10R GPIO16
3CVN
3CVB RES
AMBI-SPI-MOSI
+3V3
10K POWER-OK
47R GPIO21
DC07 3CVS
GPIO23
IRQ-EXPANDERn
3D-LR
IRQ-EXPANDERn
3CVT +3V3 10K
47R
9GM5 RES
3D-LED_3D-RF
9GM6 RES
3D-LR-DISP
Control
6
2013-01-11
5
2012-11-08
3104 313 6618 19370_100_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 159
B04B, LVDS
LVDS
IGV6 100R
FGR1 FGR2 FGR3 FGR4 FGR5 FGR6 FGR7 FGR8 FGR9 IGR0 IGR1 IGR2 IGR3 IGR4 IGR5 IGR6 IGR7 IGR8 IGR9 IGRA
9GV6 IGV2
3GVN PCEC-QHDMI 3GVP AMBI-TEMP 3GVR BL-SPI-CS_BL-I-CTRL
IGV1
100R 100R 100R
IGV0 FGV5
TX3-ATX3-A+ TX3-BTX3-B+ TX3-CTX3-C+
FGV6 FGV7 FGV8 FGV9 FGVA FGVB
TX3-CLKTX3-CLK+
FGVC FGVD
TX3-DTX3-D+ TX3-ETX3-E+
FGVF FGVG FGVH FGVJ FGVK
TX4-ATX4-A+ TX4-BTX4-B+ TX4-CTX4-C+
FGVL FGVM FGVN FGVP FGVQ FGVR
TX4-CLKTX4-CLK+
FGVS FGVT
TX4-DTX4-D+ TX4-ETX4-E+
FGVU FGVV FGVW FGVY +3V3
41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
RES 2GVU
TO DISPLAY
AMBI-SPI-OUT-MOSI AMBI-SPI-DO-QFHD
5
GPIO2
4
1
100n 7GV0-1 NX3L4684TK 2 9GVD
3GVK
AMBI-SPI-CLK-QFHD
+3V3
RES
100R 3GVF
GPIO2
RES
100R 3GVG
GPIO2
RES
100R BL-ON SPLASH-ON SDA-DISP SCL-DISP GPIO8 SDA-DISP SCL-DISP BL-ON BL-DIM GPIO3 3D-LED_3D-RF 3D-LR-DISP GPIO3 SPLASH-ON GPIO2 TX1-ATX1-A+ TX1-BTX1-B+ TX1-CTX1-C+
9GV1
RES FGU7 FGVZ RES FGW0 RES RES FGVE RES RES RES FGU9 RES FGUF FGWA RES RES FGU6 RES FGWE
3GVS 3GVT 3GV0 3GVE 3GVD 3GV3 3GV4 3GV5 3GV6 3GV7 3GV8 3GV9 3GVA
47R 47R 100R 10R 10R 10R 100R 100R 100R 100R 100R 100R 100R
FGWB
TX2-ATX2-A+ TX2-BTX2-B+ TX2-CTX2-C+
FGWC FGWD FGWF FGWG FGWH FGWJ FGWK FGWL FGWM FGWN FGWP FGWQ FGWR FGWS RES 2GVJ RES 2GVM FGWT FGWU FGWV FGWW FGWY FGWZ
TX2-CLKTX2-CLK+
FGU0 FGU1
TX2-DTX2-D+ TX2-ETX2-E+
FGU2 FGU3 FGU4 FGU5
TX1-CLKTX1-CLK+ TX1-DTX1-D+ TX1-ETX1-E+
Z
3
AMBI-SPI-MOSI-OUT
Y0
1 2 3 4
S 6 +3V3
9GVC
8
IGV3 IGV4
9GV7
AMBI-SPI-DO-QFHD
9GV8
AMBI-SPI-OUT-MOSI
8 7 6 5
RES 9GV3
IGV5
+VDISP
Z
9
9GVB
AMBI-SPI-CCLK-OUT
Y0 7GV0-3 NX3L4684TK
S GND
AMBI-SPI-CCLK-OUT
9GV9
AMBI-SPI-CLK-QFHD
9GVA
1M01 AMBI-SPI-OUT-CCLK
1 2 3
KEYBOARD_IRQ-SRFn 4
5
100n
Y1
11
GPIO2
AMBI-SPI-MOSI-OUT
2GV2
VCC
7
10p 10p
3GVH-1 3GVH-2 3GVH-3 3GVH-4
+3V3-STANDBY
AMBI-SPI-CLK-QFHD
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
VCC Y1
7GV0-2 NX3L4684TK 10
1G51 20519-051E 60 61 58 59 56 57 54 55 52 53
IGW1 IGW2 IGW3 IGW4 IGW5 IGW6 FGU8 IGW7 FGW8 IGW9
GND
AMBI-SPI-OUT-CCLK
1K0
100R
9GV4 IGV7 9GV5
RES
100R
10p 10p 10p 10p 1n0 1n0 1n0 10p 10p 1n0
10p 2GVT
10p
10p 2GVS
10p
100R RES
3GVJ
AMBI-SPI-DO-QFHD
3GVC RES
3GVM
ARC3
FGV0
1G50 20519-041E 50 51 48 49 46 47 44 45 42 43
RES 2GV9 RES 2GVA RES 2GVB RES 2GVC RES 2GVD RES 2GVF RES 2GVG RES 2GVL RES 2GVK RES 2GVH
3GVB
GPIO8
2GVR
3GVL
SPDIFIN
2GVP
2GVN
10p
B04B
1
B04B
TO DISPLAY
A1253WVA
GND_HS
6
10-3-17
QFU1.2E LA
1X03 EMC HOLE
1X05 REF EMC HOLE
LVDS
6
2013-01-11
5
2012-11-08
3104 313 6618 19370_101_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 160
B04C, Output Vdisp
Output Vdisp
B04C
1 9GS1-1 RES 2 9GS1-2 RES 3 9GS1-3 RES 4 9GS1-4 RES 1 9GS2-1 RES 2 9GS2-2 RES 3 9GS2-3 RES 4 9GS2-4 RES
5 8 7 6 FGS1
5
5
2GS5
3GS4 IGS2
47K
IGS1
3GS5 4K7
27K
7GS3-1 PUMD12 1
3GS6
6 2
100n RES
2GS2
100n
IGS5
LCD-PWR-ONn
22u
3GS1 7GS3-2 PUMD12 3
IGS4
+VDISP
3
4
2GS3 RES
FGS2
6 5 2 1 2GS1
7GS2 SI3443CDV 4
T 4.0A 32V
22n
6
RES
+12V +3V3
7
47R
4
1GS1
8
8 7 6 5
3 2 7GS1 1 SI4835DDY-GE3 RES
4K7
B04C
3GS3
10-3-18
QFU1.2E LA
DBG
6GS1 DBG LTST-C190KGKT
Output Vdisp
6
2013-01-11
5
2012-11-08
3104 313 6618 19370_102_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 161
B04D, Tuner CVBS debug
Tuner CVBS debug
B04D
470R
3FW4 RES
IFW5
3FW8
IFW3 5FW3 RES
RES
75R
DFW1
1u8 2FW5
150R
RES
150R
RES 3FW7
IFW4
3
270p
2 IFW2
RES
47u
RES
33p
2FW6
7FW1-1 BC847BPN(COL) RES 3FW5 1 RES
2FW3
RES
5
3K3
CVBS-OUT1
2FW4
4 7FW1-2 BC847BPN(COL) RES
IFW1
6
100p
10K
3FW3
RES
+12V
3FW6
B04D
RES
10-3-19
QFU1.2E LA
DFW2
Tuner CVBS debug
6
2013-01-11
5
2012-11-08
3104 313 6618 19370_103_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 162
B04E, Audio - video
Audio - video 2VW1
CVBS1
150R
100n 2VW2
150R
100n 2VW3
3VWM SC1-CVBS 3VWN 3VWP 150R
CVBS3
Y-G1
100n 2VW4
3VWR 150R
PB-B1
100n 2VW5
3VWS 150R
PR-R1
100n 2VW6
Y1-IN
150R
PB1-IN
150R
100n 2VW8
150R
100n 2VW9
150R
100n 2VWA
150R
100n 2VWB
3VWU PR1-IN 3VWV SC1-G 3VWB SC1-B 3VWC SC1-R
150R
3VW3
10K IVW1
8K2
FVW0
SCKIN
DVW4
AUD-R
DVW5
AUD-L
DVW6
AL-1
2VWE
AR-4
2VWF
AL-4
33K
3VWA
+3V3
4K7
SPDIFIN
2VWD
1u0
3VWF
DVW1
AR-1
33K
IVW4
8K2
DVW2
2VWC
1u0 3VW8
3VW9
FB1
33K
IVW3
8K2
WSI2SIN
PR-R3
1u0 3VW6
3VW7
SDI2SIN
PB-B3
33K
IVW2
8K2
SC-LIN
Y-G3
1u0 3VW4
3VW5
SC-RIN
PR-R2
3VWW
SC1-BLK
YPBPR-LIN
PB-B2
100n
3VWD
YPBPR-RIN
Y-G2
100n 2VW7
3VWT
B04E
CVBS
VGA-LIN
3VWH
4K7
RES 3VWG
AUDIO-MUTEn
IVW7
8K2
3VWK
AL-3
33K
1u0 RES 3VWJ
VGA-RIN
2VWJ
IVW8
8K2
2VWK
AR-3
1u0 33K
B04E
3VWL
10-3-20
QFU1.2E LA
Audio - video
6
2013-01-11
5
2012-11-08
3104 313 6618 19370_104_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 163
B04F, Fusion supply
Fusion supply
B04F
3
7UB1 TPS7A7001DDA
10u
2UB0
+1V5
IN
Φ
6 7
FB
3UB3
3UB4
22K 1%
3UB8
220K 1%
47K 1% 3UB7
RES 3UB6
3UB5
100K 1%
1K0
100p
3UBF
IUB4
FUB1 SENSE+1V2-MIPS
CORE VOLTAGE SUPPLY MIPS FUSION 1M0
10K 1% 3UBA RES
3UB9
+1V2-MIPS
27K 1%
DVS2 IUB5
FUB0
RES
27K 1% IUB3 2UB3
10u
9
8
GND
NC
10 11 VIA
GND_HS
OUT
2UB4
EN
1 4 5
100n
2UB6
2
5UB0
IUB6
IUBB
2
+1V5
4
SW
SS EN
VREG5
5
9
GND_HS GND
VIA
IUB8 7 6
3
2UBD
2UBB RES
22u
22u 2UBA
2UBC VBST
1n0
10n 2UBH
1
VFB
1 3UBE-1 8 10R
100n
2 3UBE-2 7 IUBA 3 1u0
22K 1% 2UBE RES
Φ
2UBF
IUB9
STEP DOWN
10 11
3UBB
470K RES 2UBG
FUB2
5UB1
+1V5
8 VIN
22K 1%
IUB7
2u0 7UB5 TPS54527DDA
22p
100n
2UB7
10u
10u 2UB9
2UB8
30R
22u
+12Va
3UBD
B04F
3UBC
10-3-21
QFU1.2E LA
10R 3UBE-3
IUBC
2UBJ
2UBK
1n0
1n0
6
10R 4 3UBE-4 5 10R
GND-1V5 GND-1V5 GND-1V5 GND-1V5
CUB0
DDR3 SUPPLY FUSION GND-1V5
ENABLE+1V5+1V1
Fusion supply
6
2012-11-08
5
2013-01-11
3104 313 6618 19370_105_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 164
B04G, Backlight microcontroller
Backlight microcontroller
B04G
B04G +3V3
+3V3
3GE0
3GE1
4K7
4K7
100n
100n
2GE2
1u0
RES 2GE0
+3V3 2GE1
1GE0 FGE0
TXD-LPC +3V3
RXD-LPC
5
RES 100R
4
1 2 DBG 3
BM03B-SRSS-TBT
1K0
3GEK RES
3GE2
RESET-FUSION-OUTn
FGE1
FGE2
+3V3
LPC-RESETn
LPC-LED3
9GE2
AMBI-SPI-CCLK
AMBI-SPI-OUT-CCLK
3 4 1GE2 SKHUBHE010
100n
330R
3GEF DBG DBG 6GE3
LTST-C190KGKT
330R
3GEE DBG DBG
+3V3
LTST-C190KGKT
6GE2
3GEC DBG
330R LTST-C190KGKT
6GE0
+3V3 BL-DIM7
+3V3
+3V3
+3V3
DBG
BL-DIM5 BL-DIM6 BL-DIM8 3D-LR-DISP
330R
10R
DBG
FGE5
LPC-LED4 AMBI-SPI-OUT-CCLK
3GEA
RES
2GE5
3 4 DBG
1 2
3D-LR LPC-LED1 LPC-LED2
36 37 43 48 18 21
PIO1_0|R|AD1|CT32B1_CAP0 PIO3_0|DTR_|CT16B0_MAT0|TXD PIO1_1|R|AD2|CT32B1_MAT0 PIO3_1|DSR_|CT16B0_MAT1|RXD PIO1_2|R|AD3|CT32B1_MAT1 PIO3_2|DCD_|CT16B0_MAT2|SCK1 PIO1_3|SWDIO|AD4|CT32B1_MAT2 PIO3_3|RI_|CT16B0_CAP0 PIO1_4|AD5|CT32B1_MAT3|WAKEUP PIO3_4|CT16B0_CAP1|RXD PIO1_5|RTS_|CT32B0_CAP0 PIO3_5|CT16B1_CAP1|TXD PIO1_6|RXD|CT32B0_MAT0 PIO1_7|TXD|CT32B0_MAT1 PIO1_8|CT16B1_CAP0 PIO1_9|CT16B1_MAT0|MOSI1 PIO1_10|AD6|CT16B1_MAT1|MISO1 PIO1_11|AD7|CT32B1_CAP1 VSS
AMBI-SPI-CCLK AMBI-SPI-MOSI 3D-LED_3D-RF
9GE1 RES
6GE1
RES 100K
RES 100K 3GEN
1u0 3GEM
10K
2GE6
3GEL
9GE0 RES
100R DBG
LTST-C190KGKT
BL-DIM RXD-LPC TXD-LPC BL-SPI-CS_BL-I-CTRL
2 13 26 38 19 20 1 11 12 24 25 31
PIO2_0|DTR_|SSEL1 PIO2_1|DSR_|SCK1 PIO2_2|DCD_|MISO1 PIO2_3|RI_|MOSI1 PIO2_4|CT16B1_MAT1|SSEL1 PIO2_5|CT32B0_MAT0 PIO2_6|CT32B0_MAT1 PIO2_7|CT32B0_MAT2|RXD PIO2_8|CT32B0_MAT3|TXD PIO2_9|CT32B0_CAP0 PIO2_10 PIO2_11|SCK0|CT32B0_CAP1
DBG 3GE4 100R
3GE5
3GEB DBG
33 34 35 39 40 45 46 47 9 17 30 42
BL-DIM2 BL-DIM3 BL-DIM4 LPC-SWDIO
PIO0_0|RESET_ PIO0_1|CLKOUT|CT32B0_MAT2 PIO0_2|SSEL0|CT16B0_CAP0 PIO0_3 PIO0_4|SCL PIO0_5|SDA PIO0_6|SCK0 PIO0_7|CTS_ PIO0_8|MISO0|CT16B0_MAT0 PIO0_9|MOSI0|CT16B0_MAT PIO0_10|SWCLK|SCK0|CT16B0_MAT2 PIO0_11|R|AD0|CT32B0_MAT3
FGE4
DBG
RES 3GE9 10R
AMBI-SPI-OUT-MOSI LPC-SWCLK BL-DIM1
10R
LPC-ISPn
1GE1 SKHUBHE010
3GE8
XTALOUT
FGE3
1 2
10R
LPC-RESETn
100n
3GE7
3 4 10 14 15 16 22 23 27 28 29 32
VDD XTALIN
2GE4
3GE6
7
LPC-ISPn
SCL-SSB SDA-SSB
6
5 41
100n
2GE3
IGE1
RES
3GE3 100R
8 44
7GE0 LPC1114FBD48/301
+3V3
1K0
LPC-LED1 LPC-LED2 LPC-LED3
9GE3
AMBI-SPI-MOSI
AMBI-SPI-OUT-MOSI LPC-LED4
9GE4
BL-DIM
BL-DIM1
+3V3
ROW_1 1GE3-1 RES 3GEJ 1K0
1 3 5 DEBUG 7 9
ROW_2 1GE3-2
10K
+3V3 3GEG
10-3-22
QFU1.2E LA
2 4 DEBUG 6 8 10
FGE6 FGE7 FGE8
3GEH RES
LPC-SWDIO LPC-SWCLK AMBI-SPI-OUT-MOSI
100R LPC-RESETn
FTSH-105-01-L-DV FTSH-105-01-L-DV
Backlight microcontroller
6
2013-01-11
5
2012-11-08
3104 313 6618 19370_106_130222.eps 130222
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 165
B04H, eMMC
eMMC
B04H
100n
100n 2EJ6
2EJ5
+3V3
100n
100n 2EJ4
100n 2EJ3
100n 2EJ2
2EJ1
+3V3
SDIO2-CLK
SDIO2-CMD
FEJ2 M5
SDIO2-CLK
FEJ1 M6
33R 3EJ5
GPIO15
SDIO2-CMD +3V3
33R GPIO16
2
3EJ6-2
7
SDIO2-D0
3EJ0
FEJ0 K5 10K
SDIO2-RESETn VDDI
C2
VCCQ CMD CLK RST VDDI
SDIO2-D1
GPIO18
1
3EJ6-1
8
VSS G5 E7 K8 H10
6
33R
100n
3EJ6-3
2EJ7
3
VCC 0 1 2 3 DATA 4 5 6 7 VSSQ
MAIN
33R GPIO17
+3V3
E6 F5 K9 J10
C6 M4 N4 P3 P5
7EJ0-1 H26M21001ECR
A3 A4 A5 B2 B3 B4 B5 B6
FEJ3 FEJ4 FEJ5 FEJ6 FEJ7 FEJ8 FEJ9 FEJA
SDIO2-D0 SDIO2-D1 SDIO2-D2 SDIO2-D3 SDIO2-D4 SDIO2-D5 SDIO2-D6 SDIO2-D7
SDIO2-D0
2
SDIO2-D1
3
SDIO2-D2
4
4
3EJ6-4
1
3EJ7-1
1
SDIO2-D4
5
SDIO2-D2
8
SDIO2-CLK SDIO2-CMD
SDIO2-D5
3EJ7-4
+3V3
SDIO2-D5
3
3EJ7-3
5
+3V3
+3V3
SDIO2-D6
SDIO2-D6
SDIO2-D7 7EJ0-2 H26M21001ECR
6
3EJ8
SDIO2-RESETn
33R GPIO24
2
3EJ7-2
8
2
3EJ3-2
7
1
3EJ3-1
8
4
3EJ3-4
5
SDIO2-D3 SDIO2-D6 SDIO2-D7 +3V3
7
3
3EJ3-3
6
47K
NC
SDIO2-D7
33R GPIO23
3EJ2-1
47K
33R GPIO22
5
47K
M3 M7 M8 M9 M10 M11 M12 M13 M14 N1 N3 N6 N7 N8 N9 N10 N11 N12 N13 N14 P1 P2 P7 P8 P9 P10 P11 P12 P13 P14
4
3EJ2-4
47K
33R GPIO21
6
47K
33R GPIO20
3EJ2-3
47K
33R GPIO19
7
47K
SDIO2-D3
FEJB
SDIO2-D3
3EJ2-2 47K
C4 N2 N5 P4 P6
3EJ4
GPIO14
4K7
+3V3
SDIO2-D4
33R
+3V3
VDDI SDIO2-D4 SDIO2-D5
A1 A2 A6 A7 A8 A9 A10 A11 A12 A13 A14 B1 B7 B8 B9 B10 B11 B12 B13 B14 C1 C3 C5 C7 C8 C9 C10 C11 C12 C13 C14
NC
NC
NC
H1 H2 H3 H5 H12 H13 H14 J1 J2 J3 J5 J12 J13 J14 K1 K2 K3 K6 K7 K10 K12 K13 K14 L1 L2 L3 L12 L13 L14 M1 M2
+3V3
SDIO2-RESETn
NC D1 D2 D3 D4 D12 D13 D14 E1 E2 E3 E5 E8 E9 E10 E12 E13 E14 F1 F2 F3 F10 F12 F13 F14 G1 G2 G3 G10 G12 G13 G14
B04H
3EJ1
10-3-23
QFU1.2E LA
SDIO2-D4 SDIO2-D5
+3V3
eMMC
6
2013-01-11
5
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 166
B05A, Class-D amplifier
Class-D amplifier
B05A
3D60
A-STBY
+3V3D 3
1
30R
220n 5D51
220n 2D65
2D64
10u
10u 2D59
10u 2D58
10u 2D57
10u
2D66
30R 2D63
220n 5D50
220n 2D62
10u 2D60
10u 2D92
2
10u 2D61
7D70 PDTC144EU 2D97 2D49
2D48
10K
3D82
100u 16V
2D5C
1u0
2D67
1u0
100n 2D93 RES
100n 2D69
10u 2D68
5D85 30R
STEST
VIA
10K
3D83
10n
10n 2D78
2D99 5D81
330p
10u
10n 2D70
2D98
10n
2041145-3 1D51
1D52
1D50
SPEAKER-R-
2D95
5D79
10n
ID99
30R
ID98
5D80
10n
10n 2D73
ID53
SPEAKER-R+
2D87
10u
22K
1 2 3
ID57
2 3 4 FD70
ID96
2D81
3D71
1D02
1
2041145-4
5D01
3D70 RES
18K2 1%
Left+ LeftRight+ Right-
FD33
FD32
18R 330p 5D76
1D56
ID83 ID84
2D94
1D01
FD30 FD31
SPEAKER-LSPEAKER-R+
1D55
50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69
3D74 ID52
SPEAKER-L-
SPEAKER-R-
30R
5D77 30R
GND_HS 49
37 38
47 48
17
PGND AB CD
7 16
10u
33n
33n
36
5D74
CD00
28
A 9
29
30
GND
VSS D DO
33
2D85
ID94
30R
ID51
2D82
42
1D54
SSTIMER
AGND
100u 16V
39
1D53
OC_ADJ OSC_RES
PBTL
2n2 26
FD69 30R 5D75
10n
BST_D
ID70 6
5D71
30R
33n
2D76
8
220n
3D73 2D80
220n
ID97
9D51 2D54
33n
46
ID63
OUT_D ID69
ID82
ID91
SPEAKER-L+
2D79
220n 2D55
47n
43
SPEAKER-L+
30R
2D83
4n7
BST_C
VR_ANA PLL_FLTP PLL_FLTM
470R 2D52
470R 2D53
ID81
ID62 12 11 10
4n7 3D51
2D51
4
5D00
ID88
10u
100n
1
5D70
ID93 OUT_C
ID66
ID50
30R
OUT_B RESET PDN
100n
220n
25 19
ID80 2D77
220n 2D71
34 35
BST_B
3D77
31
2D56
40 41
BST_A A_SEL
10u 2D74
18R
44 45
5 32
OUT_A
ID79
330p
14
SDA SCL
18
2D75
ID90
2D5D
9D50 RES
27
13
23 24 3D76 RES
15K
2D50
3D52
ID61
VR_DIG
2D89
7D50-2 PUMH2
ID58
+3V3
+3V3D
2D72
18R
ID56 D-RESET
47n
AUDIO-MUTE
2D86 RES
7D50-1 PUMH2
D
3D75
10K
3D50 47K
3D54
ID89
ID65
A-STBY
47R 47R 10K 9D55
+3V3D
D-RESET
DETECT12V
10K
3D55 3D56
SDI2SOUT3
C PVDD
VREG
6
BM04B-SRSS-TBT
B
AUDIO AMPLIFIER
FD50 SDA-SSB SCL-SSB
A
OUT GVDD
18R
5
FD64 FD66
LRCLK SCLK MCLK SDIN
3D72
SDI2SOUT1 SCKI2SOUT WSI2SOUT
AVDD DVDD 20 21 15 22
330p
+3V3D
1 2 3 4
RES 9D53 9D54
TAS5731P1 7D60 TAS5711PHP
2D88
10R
1R0
ID76 ID75
ID77
3D57
9D52 FD67 FD63 FD65
WSI2SOUT I2SCLK SCKI2SOUT SDI2SOUT1
ID78
1R0
+3V3D
2 3
DBG 1D03
RES 3D63
3D58
+3V3D 3D79
2D5B
7D71 RES PDTC144EU
ID87
16V 100u
SPEAKER-R-
2
+3V3-STANDBY
ID55
SPEAKER-L100u 16V
1
ID54
10n 2D91
3
10K
AUDIO-MUTE
10K AUDIO-MUTEn
2D5A
10R 3D62 +3V3D
100u 16V
100u 16V
3D78
3D61
5D83
RESET-FUSION-OUTn
+12V-AUDIO
+12V-AUDIO 10K
10u 2D84
B05A
10u 2D96
10-3-24
QFU1.2E LA
1X02 REF EMC HOLE
Class-D amplifier
6
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Circuit Diagrams and PWB Layouts
10.
EN 167
B05B, Analogue externals
Analogue externals
B05B FVA9
1VAG
6n8
2VA9
6VA8
100p
2VA8
1K0
CDS4C12GTA 12V
RES
3VA7
SC-RIN
FVAA
SCART
1VAH
6n8
2VAB
6VA9
100p
2VAA
1K0
CDS4C12GTA 12V
RES
3VA8
SC-LIN
49045-0011 25 26 FVA1
24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
FVAB
IVA0
1VAJ
75R
3VAG
CDS4C12GTA 12V
RES
FVAC
1VAK
CDS4C12GTA 12V
RES 6VAC
100p
2VAE
1K5
1u0 3VAA
12K
2VAD
PDZ2.4B(COL)
FVA2
3VA9
SC1-STATUS
6VAB
6VAA
100p
2VAC
SC1-B
+3V3 FVA4
1VAL
75R
3VAB
CDS4C12GTA 12V
RES
100p
1R0
FD90
1
SPDIFO
1VAM
75R
3VAC
6VAE
CDS4C12GTA 12V
RES
100p
2VAG
1VAN
CDS4C12GTA 12V
6VAG
RES
100p
FVAE
75R 2VAH
100R
3VAE
3VAD
PDZ2.4B(COL)
6VAF
FVAF
1VAP
150R
3VAF
CDS4C12GTA 12V
6VAH
RES
100p
2VAJ
SC1-CVBS
FVAG
3VAK
100p
47R
2VAK
RES 6D0A
V_NOM
100p 1D0A
CDS4C12GTA 12V
IVA1 SC1-BLK
SC1-DETECTn
1VA1
FVAD
SC1-R 3
RES 2D0B
GND MT 5 4
ID95
100n
VIN
6VAD
1J50 3150-831-030-H1 2 VCC
2VAF
SC1-G
3D90
B05B
2D0A
10-3-25
QFU1.2E LA
Analogue externals
6
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Circuit Diagrams and PWB Layouts
10.
EN 168
B05C, Sensor board and AmbiLight
Sensor board and AmbiLight
B05C
FAA0
FH52-11S-0.5SH
FH52-25S-0.5SH
FH52-40S-0.5SH FAA1 42 41
3CAF
SDA-SRF 10R
FAA2 3CAE IAA0
3CAG FAA3 FAA4
+5V
0R3
+T
SCL-SRF
3CAD 10R
3CAB 3CAA 3AAA
FAA6 FAA7 FAA8
LED2-OUT KEYBOARD_IRQ-SRFn LED2-OUT 3D-LED_3D-RF AMBI-TEMP
100R 100R 100R
3AAB 3AAC
AMBI-SPI-CCLK-OUT
2AAV
1u0
10p
470p 2CAD
470p
10p
10p 2AAC
2CAA
2CAB
100p
100p
100p
100p
47R
2CAR
2CAS
AMBI-SPI-MOSI-OUT 47R
+3V3-STANDBY
2CAP
AMBI-POWER IAA1 1u0
SDA-MC
2AAW
FAA9
GND-AL
9CAA 9CAB
+3V3-STANDBY
10R
FAA5
GND-AL
3CAH 10K
RC_IRQ-RF4CEn
3CAC
GND-AL
LED2-OUT
10R
AMBI-POWER +3V3AL AMBI-POWER
2CAT 2CAU
100n RES 10u GND-AL
2CAL
RES 3AAD
100n
+3V3
FAAZ +3V3AL
10u
2AAE
GND-AL
1C26
10u
+T 0R3 2AAD
1C25
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
2CAN
27 26
1u0
1C20
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
2CAJ
13 12
2CAM
11 10 9 8 7 6 5 4 3 2 1
1u0
B05C
2CAK
10-3-26
QFU1.2E LA
GND-AL
Sensor board and AmbiLight
6
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Circuit Diagrams and PWB Layouts
10.
EN 169
B06A, HDMI
HDMI
B06A
1 2
BRX0BRX0+
3 4
21 20 23 22
100K
2HA2
10R
FHAN FHAP
CRX-DDC-SCL CRX-DDC-SDA
CIN-5V CRX-HOTPLUG
CIN-5V
BRX2+
DIN-5V
41 42
CRX-DDC-SDA CRX-DDC-SCL
39 40
CRXCCRXC+
11 12
CRX0CRX0+
13 14
CRX1CRX1+
15 16
CRX2CRX2+
17 18 45 46
FHBA
21 22
FHAR FHAS
DDRX1DDRX1+
23 24
DDRX2DDRX2+
25 26
100K
DDRX0DDRX0+
2HA1
DDRXCDDRXC+
19 20
47K
1 3HAB-1 8
BIN-5V BRX-HOTPLUG 21 20 23 22
FHB9
43 44
47K
BRX-DDC-SCL BRX-DDC-SDA
BRX2BRX2+
7 8
DRX-DDC-SDA DRX-DDC-SCL
BIN-5V BRX0BRXC+
5 6
DRX-HOTPLUG
3HA4 10R
BRX1BRX0+
BRXCPCEC-HDMI HARC0 BRX-DDC-SCL BRX-DDC-SDA
FHB2
1u0 4 3HA1-4 5
BRX2BRX1+
BRX1BRX1+
100n 2HAP
100n 2HAN
10u
100n 100n
2
38
37
(CBUS) HPD1 R1PWR5V DSDA1 DSCL1 N R1XC P N R1X0 P
TX2
N P
TX1
N P
TX0
N P
TXC
N P
TPWR_CI2CA
N R1X1 P
57 56
HDMIF-RX2HDMIF-RX2+
59 58
HDMIF-RX1HDMIF-RX1+
61 60
HDMIF-RX0HDMIF-RX0+
63 62
HDMIF-RXCHDMIF-RXC+
3HB0 4K7
FHA4
55
MICOM-VCC33
3HB1 RES 4K7
CEC_A
N R1X2 P
50 3HAS
(CBUS) HPD2 R2PWR5V
INT
52
3HAY
4K7
FHA3
RES
CSCL CSDA
N R2X0 P
54 53
3HAV 3HAW
47R 47R
SCL-SSB SDA-SSB +1V5
RSVDL
N R2X1 P
R4PWR5V
10R
DSDA2 DSCL2 N R2XC P
pin (49)
FHA6
+5V +3V3
+5V
+3V3
2HAB
10 28 7HA1-1 RT9025-12GSP
N R2X2 P
1u0 VDD
3
(CBUS) HPD3 R3PWR5V DSDA3 DSCL3 N R3XC P VIA
N R3X0 P N R3X1 P N R3X2 P
74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89
2
VIN
VOUT
EN
ADJ
FHB5
6 7 1
PGOOD
+1V2-FE
5
NC GND GND HS
22 23 24 25 26
BRXCBRXC+
N R0X2 P
7HA1-2 RT9025-12GSP
VIA 18 19 20 21
VIA
VIA
10 11 12 13
VIA 14 15 16 17
33 34
N R0X1 P
100K
BRX-DDC-SDA BRX-DDC-SCL
10K
51
10u
35 36
10K
3HBQ
1u0
FHB8
CEC_D
R4PWR5V 3HBP
3HAR
71 72
N R0X0 P
49 48 47
2HAA
ARX2ARX2+
CRX-HOTPLUG
3HA3 1u0 3 3HA1-3 6
3 3HAA-3 6
CRXCPCEC-HDMI HARC1 CRX-DDC-SCL CRX-DDC-SDA
FHB1
47K
CRX0CRXC+
47K
CIN-5V
7 3HAB-2 2
FHAG
69 70
DSCL4 DSDA4
2HAD
CRX1CRX0+
1H02
HDMI CONNECTOR 2
ARX1ARX1+
R4PWR5V
N R0XC P
4
CRX2CRX1+
CIN-5V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
67 68
CRX2+
5 3HAA-4 4
FHAF
ARX0ARX0+
DSDA0 DSCL0
SBVCC33 RES
9
1u0
10R
DIN-5V
HDMI CONNECTOR 3
ARXCARXC+
65 66
BRX-HOTPLUG
3HA2
1H03 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
29 30
IHB1
8
FHB0
100K
BIN-5V
2 3HA1-2 7
21 20 23 22
2HA4
DIN-5V DRX-HOTPLUG
ARX-DDC-SDA ARX-DDC-SCL
(CBUS) HPD0 R0PWR5V
FHA7
30R
10u
1u0
FHAL FHAM
DRX-DDC-SCL DRX-DDC-SDA
31 32
pin (38)
RES 5HA6
RES
2HA9
7 3HAA-2 2
DDRXCPCEC-HDMI HARC2 DRX-DDC-SCL DRX-DDC-SDA
47K
DIN-5V DDRX0DDRXC+
100K
2HA5
10R
DDRX1DDRX0+
FHB7
SBVCC33
ARX-HOTPLUG
3HA0
FHAY
1 3HA1-1 8
DDRX2DDRX1+
47K
FHAE
AIN-5V
1 3HAA-1 8
HDMI CONNECTOR 4
DDRX2+
MICOM_VCC33
1H04 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
9 27 64 VCC33
2HAM
1
2HAG
VOUT
10u
EN EN
3
2HAF
FLG
10u
4
VIN
100n RES 2HAK
5
VCC33 2HAJ
IHB0
GND 7HA0 SII9287B
FHA8
30R RES
2HAL
PDZ2.4B(COL) 5HA9 2HB5
2K2
3HA6
FHBC
pins (9,27,64)
5HA5 +3V3 7HA5 RT9715EGB
10K
I2C ADDRESS SII9287B=OXB2
1u0 3HAP
2HB4
SBVCC33
VCC33
MICOM-VCC33
+3V3
3K3 6HA1
FHB4
3HA5 RES
+5V
30R
B06A
1u0
10-3-27
QFU1.2E LA
73
EPAD BIN-5V 1H01
1V2 DVB-T2 and DVB-S2
ARX2ARX1+ ARX1ARX0+ AIN-5V
RES
+3V3-STANDBY
IHB3
IHB4 IHB5
3HB3
PCEC-HDMI FHB6
1M0
BC847BW 7HA3
AIN-5V
HDMI-CEC
9HA0
100R
IHB6
27K
9HA1
RES
3HBS
PCEC-QHDMI
3HAL
21 20 23 22
FHAV FHAW
ARX-DDC-SCL ARX-DDC-SDA
3HB2 22K
7HA2 BC847BW
RES
AIN-5V ARX-HOTPLUG
IHB2
47K
ARXCPCEC-HDMI HARC4 ARX-DDC-SCL ARX-DDC-SDA
3 3HAB-3 6
ARX0ARXC+
47K
FHAH
ARX2+
5 3HAB-4 4
HDMI CONNECTOR 1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
3HB4 +3V3-STANDBY 22K
HDMI
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Circuit Diagrams and PWB Layouts
10.
EN 170
B06B, HDMI-ARC
HDMI-ARC IHD1
HARC0
HARC1
HARC2
FHD4
5HD0
FHD5
30R 5HD1
FHD6
30R 5HD2
B06B
IHDF
ARC0
IHDG
ARC1
IHDH
ARC2
IHDM
ARC3
IHDK
ARC4
RES 9HD2
ARC4
100R
9HD4
3HD4
B06B
ARC0
ARC1
ARC2
30R IHD8
9HD5
3HD9 +5V-ARC
10p
5HD5
FHD3
+5V
100n
1u0
16
7HD0 74HC4051PW
2HDD
2HD6
30R
IHD7
9HD6
ARC-SEL2
FHD2
9
9HD0
6
0 8X
MDX
0
0 7
1
2
2
G8
3 4
3
5 6 7
9HD9
1 5 2 4
IHD4
9HD8
IHDL
3HDT
HDMI-ARC
RES
GND
FHD7
12
3HDS
VEE
8
HDMI-ARC
14 15
100R
10
3HDE
FHD1
100R
ARC-SEL1
13
3HDU
ARC-SEL0
11
100R
VCC FHD0
7
2HD5
10p
10p 2HD3
100R
ARC4
30R
100R
FHD8
10p 2HD1
HARC4
5HD4
2HD0
10-3-28
QFU1.2E LA
HDMI-ARC
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Circuit Diagrams and PWB Layouts
10.
EN 171
B06C, USB external
B06C
USB external
B06C +3V3
3EA7 +5V +T
0R3
3EA8-1 100K 3EA8-2
FEAD
100K
100n
100n 2EA7
100n 2EA6
2EA4
100n 2EA5
USB-PORTA-OC 100n
2EA3
+5V-PORTA
3EA8-3 100K 3EA8-4
18p
3 4 25
USB-PORTB-DM USB-PORTB-DP USB-PORTB-OC USB-PORTA-DM USB-PORTA-DP USB-PORTA-OC
6 7 24
USB-PORTC-DM USB-PORTC-DP USB-PORTC-OC
12 13 20 15 16 19
3EA1
+3V3
10K 28 17 22 23 8
RESET-FUSION-OUTn IEA1
3EA3 3EA4
10K
680R
IEA2
100K
+3V3
+3V3
XOUT
21 VCC_D
XIN
5 VCC_A_1 9 VCC_A_2 14 VCC_A_3
11
DD+
DD1DD1+ OVR1
IEA3 USB2-DM IEA4 USB2-DP
3EAC +5V +T
DD2DD2+ OVR2
SDA
TEST|SCL
26
+5V-PORTB 100K 3EAD-2
FEAE
100K
18
3EAD-3 100K 3EAD-4
DD4DD4+ OVR4 VIA1 VIA2 VIA3 VIA4
30 31 32 33
IEE0
USB1-RREF
100K
1% 1 3EE2-1 8 12K 1% 2 3EE2-2 7
IEE1
USB2-RREF
3
12K 1% 3EE2-3 6
3EAG +5V +T
12K
100n
3EA5
12K
0R3
3EAH-1
1% 4 3EE2-4 5 2EA2
0R3
3EAD-1
USB-PORTB-OC
DD3DD3+ OVR3
VREG RESET SELFPWR GANG RREF
1 2
GND_HS
10
2EA1
100K
29
7EA0 CY7C65632-28LTXCT
VCC
12M
1EA0
18p
27
2EA0
+5V-PORTC 100K USB-PORTC-OC
FEAH
3EAH-2 100K 3EAH-3 100K 3EAH-4 100K
6
5401
USB-PORTB-DM USB-PORTB-DP FEA4
1E02
FEAA +5V-PORTB
FEAB
5
6
5401
1 2 3 4
USB-PORTC-DM USB-PORTC-DP FEAC
FEA8
+5V-PORTC FEA5
FEA6 2EAA
1E03
5 100n
5
FEA9 1 2 3 4
100n
FEA3
1E01
2EAB
FEA1
+5V-PORTA FEA2
100n
USB-PORTA-DM USB-PORTA-DP
2EA9
10-3-29
QFU1.2E LA
6
1 2 3 4
FEA7
5401
USB external
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Circuit Diagrams and PWB Layouts
10.
EN 172
B06D, Ethernet
Ethernet
5EF5
10n
10n
2EFT
B06D 30R
RES 5EF0 VDD33-PHY
+3V3-STANDBY 30R 5EF4
VDD33-PHY
FEF9
IEF1
100n
100n 2EFH
2EF2
100n
1u0
2EF0
30R
2EF1
AVDDL-1V1
+3V3-LAN
10u 2EF3
2EFS
B06D
6
3EFS 2
7EF1-1 PUMH2 1
3 5
7EF1-2 PUMH2
100n
2EFJ
100n
10u 2EFA
2EF9
100n 2EFV
1u0
2EFZ
22u
15p
4 5 6 IEF2
RX+ RX-
7
8
100n
RES 2EFN
4 5
CDA5C16GTH 16V
RES 6EF2-4
15p
21 22 24
FEFE
RES 2EFM
EN-TXD0 EN-TXD1 LED-RES LED-ACT
TX+ TX-
FEFC
3
34 35
FEFB
6
LED_ACT LED_RES LED_10_100
RX-ER EN-TXEN
1E00 5450-327-194-H3
1 2 3
FEFA
TXP TXN RXP RXN
CDA5C16GTH 16V
TXD0 TXD1
FEF7
32
IEF3
100n
RES 6EF2-3
NC
25
EN-RXD0 EN-RXD1
2EFP
15p
TX_EN
4u7
5EF1
38 DVDDL
3 VDD33
14
RX_ER
29 28
CLK-RMII EN-RXEN
2EFU
FEF6
10K
10K
3EFT
50 51 52 53 54 55 56 57 58
RXD0 RXD1
22R
RES 2EFL
VDD33-PHY
10K
VDD33-PHY
3EF4
VDDH-2V5
MDC MDIO INT
33 3EF5 30
2
15 16 18 19 36 37
CLK_RMII CRS_DV
7
FEF5
RES0 RES1
TXP TXN RXP RXN
CDA5C16GTH 16V
VDD33-PHY
1% 1K5
RBBIAS
9 10 12 13
RES 6EF2-2
40 39 20
TRXP0 TRXN0 TRXP1 TRXN1
15p
26 31
EN-MDC 3EF3
7
FEF8
RES 2EFK
2K37
RES0 RES1
FEF4
VDDIO_REG
RST
8 27
CDA5C16GTH 16V
1%
CLK_25M
VDDH_REG
1u0 2EFG
3EF2
XTLO
2
RES 6EF2-1 8 1
1
FEF3
RESET-ETHERNETn
23
LX
VDDH-2V5
2EFF
FEF2 FEFD
AVDD33
1M0
4
22p
EN-MDIO IRQ-WOLANn
5
AVDDL XTLI
VIA 41 GND_HS 42 43 44 45 46 47 48 49
2EFC
3EFY
25M
1EF0
22p
6 11 17
30R
7EF0 AR8030-AL1A-R
FEF1
2EFB
5EF6
100n
100n 2EF8
100n 2EF7
100n 2EF6
2EF5
FEF0
RES
10-3-30
QFU1.2E LA
VIA
4
DEF0
CLK-RMII
EN-TXC
EN-RXC
VDDH-2V5
3EFH
RES0
EN-RXD0
RES1
EN-RXD1
10K 3EFJ
3EFN 10K
10K EN-RXEN
3EFP 10K 3EFR 10K
3EFL 10K 3EFM 10K
LED-RES
LED-ACT
RX-ER
3EFU 10K
Ethernet
6
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Circuit Diagrams and PWB Layouts
10.
EN 173
B06E, NAND flash, serial flash and EEPROM
B06E
NAND flash, serial flash and EEPROM
B06E +3V3
DJA2 DJA3 DJA4 DJA5 DJA6 DJA7 3JA6
DJA8
F-RDY
10K
0 1 2 3 IO 4 5 6 7
7
R B
33R
+3V3 DJA9
F-OEn F-CEn NAND-ALE NAND-CLE F-WEn
3JA5
8 9 17 16 18 19
DJAA DJAB DJAC DJAD
DNU1 DNU2
4K7
4K7 RES 3JA1
3JA0
DJAE
RE CE ALE CLE WE WP
1 2 3 4 5 6 10 11 14 15 20 21 22 23 24 26 27 28 33 35 40 45 46
4K7 FCT2
SF-SDO
3CTH 47R +3V3-STANDBY
7CT3 M25P05-AVMN6 ICT1
3CTR
+3V3-STANDBY 3CTJ
4K7
4K7
3CTK
ICT2 3CTB 4K7
SF-SDI
SF-CLK
SF-CLK
SF-CS
SF-CS
SF-WP
SF-WP
4K7
3CT3 4K7
SF-SDI
ICT3 SF-HOLDn
SF-HOLDn
3CT0
SFB-SI
270R
3CTU
3CTZ
270R
270R
3CT2
SFB-SCK SFB-CS SFB-WPn
FCT3
SFB-SI
FCT4
SFB-SCK
FCT5
SFB-CS
FCT6
SFB-WPn
47R
3CT9
SFB-HOLDn
SFB-HOLDn
FCT7
47R
6 1 3 7
D C
Φ
512K FLASH
Q
2
S W HOLD
FCT8
38 47
48
1CTZ RESET-STANDBYn SF-SDO SFB-SI SFB-CS SFB-SCK
9JA6
13 25 36 9JA5
VCC 5
VSS
VSS
+3V3
8
29 30 31 32 41 42 43 44
DJA1
1 2 3 4 5 6 7 8 9 10 11 NC 12 13 14 15 16 17 18 19 20 21 22 23
4
DJA0
100n
3CT1
VCC
FRA0 FRA5 FRA6 FRA7 FRA8 FRA10 FRA11 FRA12
100n 2JA2
100n 2JA1
12 34 37 39
7JA0 MT29F8G08ABACAWP:C
9JA3
9JA4
2JA0
+3V3-STANDBY
8
7
1 2 3 4 5 6
1734260-6
+3V3
+3V3
8
100n
Φ (8K × 8) EEPROM
10K
3JA4
7JA2 M24C64-WDW6
IJA0 1 2 3
2JA4
IJA1
0 1 2
WC SCL
ADR SDA
7 6 5
3JA2 47R
SCL-SSB 3JA3
SDA-SSB
47R
4
10-3-31
QFU1.2E LA
FJA0
NAND flash, serial flash and EEPROM
6
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Circuit Diagrams and PWB Layouts
10.
EN 174
B06F, Analogue externals
Analogue externals
B06F FVC1
1n0
AUDIO VGA/DVI
1VC7
2VC9
6VC6 RES
100p
2VC8
1K0
CDS4C12GTA 12V
3VC6
VGA-LIN
5 4 3
FVC2
1n0
1VC8
2VCB
6VC7 RES
100p
2VCA
1K0
CDS4C12GTA 12V
3VC7
VGA-RIN
1VA6
2 1 MSJ-035-75C-BL-RF-PBT-BRF
FVCB
FVC3
3VC8
YPBPR-DETECTn
100p
2VCC
47R
FVC4
1VC1
150R
3VC0
CDS4C12GTA 12V
RES 6VC0
47p
2VC0
Y1-IN
YPBPR 5 4 3
FVC5
1VC2
150R
3VC1
CDS4C12GTA 12V
RES 6VC1
47p
2VC1
PB1-IN
FVCC
1VA8
2 1 MSJ-035-75C-G-RF-PBT-BRF
FVC6
1VC3
150R
3VC2
CDS4C12GTA 12V
RES 6VC2
47p
2VC2
PR1-IN
FVC7
3VC9
CVBS-DETECTn
FVC8
1n0
1VC4
2VC6
CDS4C12GTA 12V
6VC3
100p
2VC3
1K0
RES
3VC3
YPBPR-RIN
FVC9
1n0
FVCD
1VC5
2VC7
CDS4C12GTA 12V
RES 6VC4
100p
1K0
CVBS + AUDIO CVBS / YPBPR 5 4 3
3VC4
YPBPR-LIN
100p
2VCD
47R
2VC4
1VA4
2 1 MSJ-035-75C-Y-RF-PBT-BRF
FVCA
1VC6
150R
3VC5
CDS4C12GTA 12V
6VC5
RES
CVBS1
100p
B06F
2VC5
10-3-32
QFU1.2E LA
Analogue externals
6
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Circuit Diagrams and PWB Layouts
10.
EN 175
B06G, DC-DC
DC-DC
B06G 5UR3
IUR0
IUR2
3UR3-1 +12Vb
100n
100n
100n
2UY5 6UW2
10R
10R
10R
+22V
33R RES 33R RES 33R RES
RES 2URK
RES 2URL
3URG-3
1n0
1n0
3URG-4
33R
VIN
1
1n0
3URF
1M0
3URC
22K 1%
3URB
3n3
100p
IURF
GND-3V3r
GND-3V3r
GND-3V3r
3 3UWK-3 6 100R RES
2 3UWK-2 7 100R RES
4 3UWK-4 5 100R RES
3UWL
+3V3
IUWE ENABLE+2V5 RES 2UWY
9
220K 1%
100n
47K
IUWF
3UWC
1% 470K 3UWD
2UWW
22K
1n0
22 23 24 25 26
3UWF
2URG
CUR5
+3V3
68K 1%
6K8 5% RES 2URH
COMP VIA
3URA
IURK
6
10 11
9 1n0
2URJ
4
GND_HS GND
5
NC GND GND HS 8
FB
+2V5
7
22u
ADJ
EN
GND-3V3r
4 EN
100n
+2V5
FUW3
6
PGOOD
100n
2UWU
VOUT
2UWV
2
ENABLE+2V5
VIN
2URE
5
GND-3V3r
VDD 3
+3V3
SW
SS
1 3
GND-3V3r
1 3UWK-1 8 100R RES
1u0
7
ENABLE+3V3
RES 2UWS
2UWR 7UW2-1 RT9025-12GSP
GND-3V3r
330R
6UW1
PDZ5.1B(COL)
RES 6UW0
FUW2
8
IURE
10n
LTST-C190CKT
3UWB DBG DBG
1R0
3UWM
4K7 RES
4K7 RES 3UWA-4
4K7 RES
3UWA-3
4K7 RES 3UWA-2
3UWA-1
+3V3
IURC
BOOT IURD
FURA +3V3
3u6
Φ
STEP DOWN 2URF
5UR6
2
7UR6 RT7297CHZSP
IURB
22u
3URG-2
22u 2URD
100n
2URB
22u
2URA
30R
RES
3URG-1
RES 2URC
IURn IURA
B230LA-M3
220K 1%
22K 1%
3UR7
3UR6
100p
5UR5
+5V
10 11 12 13
FUW4
9
8
1n0
+5V +5V
120K 1% 2UY8
+12Vb
+12Vb
VIA
14 15 16 17
1M0 3UR5
6
VIA
VIA
RES 6UW3
2 3
GND GND HS 2UR2
IURM
2UY3
FB
100n
VIA 18 19 20 21
3UR4
IUR4
EN
2UY2
100n
22u
SW 5
DETECT12V
2UY1
2UR1
4
22u 2UY7
BOOT
2UY6
VIN
BAV99 COL
IUR3
VCC
1
100n
7
7URA-1 RT8288AZSP
IURL
3UWJ-4
33R
3UWJ-1
IUR9
4u7
3UR3-4
10R 3UWJ-3
1n0 2UR3
7URA-2 RT8288AZSP
FUR1 +5V
33R
3UWJ-2
1n0
5UR2
IUR8
3UR3-3
22u
2UR4
2UR0
22u 2UR9
33R
22 23 24 25 26
3UR3-2
2UR8
10u
2UR5
10u
2UR7
2UR6
33R
30R
1u0
30R 5UR1 +12Vb
10u
7UW2-2 RT9025-12GSP
VIA 18 19 20 21
VIA
VIA
10 11 12 13
+2V5
+2V5-F
VIA
470R
470R
3UWH-4 RES
470R 3UWH-3 RES
3UWH-2 RES
470R
3UWH-1 RES
470R
470R 3UWG-4 RES
470R
3UWG-3 RES
470R 3UWG-2 RES
3UWG-1
14 15 16 17
+3V3
RES
B06G
2UWT
10-3-33
QFU1.2E LA
DC-DC
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Circuit Diagrams and PWB Layouts
10.
EN 176
B06H, DC-DC
DC-DC
IUU3
5
NC GND GND HS
3UU7 RES
1
PGOOD
+1V1-DVBT2
82K 1%
ADJ
2UUA
EN
3UU1
8
2UU1
1R0
1u0
+5V
7
22K
2 IUU7
9
3UU2
IUU2
6
VOUT
22u
VIN
2UU5
3
+1V5
7UU1-1 RT9025-12GSP
VDD
1n0
4
B06H
10u
IUU8
3UU6
FUU1
SENSE+1V1-DVBT2
3UU4
VIA 18 19 20 21
VIA
VIA
220K 1%
* 3UU5
22 23 24 25 26
7UU1-2 RT9025-12GSP
680K
82K 1%
10 11 12 13
VIA 14 15 16 17
7UV0 NX1117C12Z 3
+3V3
IN
2 4
OUT
FUV1
+1V2-FA
22u 16V
2UV7
1
100n
COM 2UV6
Optional 7UV2 RT9030-11GU5
NC
4
+1V1-FA
10u
10u
2UVC
EN
5
2 OUT
EN
ADJ
FUV2
5 4
GND
+1V1-FA 100R
3
IN
3UV6 RES
1
10u
10u +3V3
3
VOUT
GND
2UVB
IUV1
7UV1 RT9187GB
2UV9
VIN
2UVD
1
+3V3
2
+1V1-DVBT2
3UV1
(*) 3UU5
120K 1%
1.10 V
RES
1.20 V
680 k立
68K 1%
IUV3
3UV5
B06H
2UU0
10-3-34
QFU1.2E LA
3UV2 33K 1%
DC-DC
5
2012-11-08
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Circuit Diagrams and PWB Layouts
10.
EN 177
B06I, CI conditional access
CI conditional access +3V3
CA-CD1n
10K
CA-VS1n
+5VCA
10K
10K
3PAF 10K
+3V3
+T 0R3
3PAD
3PAE
CA-WAITn
3PA1 +5V
+3V3
2PA2 100n
CA-RST
3PAM 100K
19
CA-MOSTRT CA-MDO0 CA-MDO1 CA-MDO2
VCC 3EN2 3EN1 G3
3PA3
CA-MOVAL
3PA8-2 100R 2
7
3PA8-3 100R 3
3PA8-1 100R 1
8
3PA8-4 100R 4
5
6
3PAL
18 17 16 15 14 13 12 11
2
MOVAL MOSTRT MDO0 MDO1 MDO2
3PA6
MOVAL MOSTRT MDO0 MDO1 MDO2
3PAA-1 1
10K 8 3PAA-2 2
3PAP
CE2n REGn
10K CA-CE1n
33R
+3V3
+3V3
1
2 3 4 5 6 7 8 9
100R
CA-RDY
20
7PA1 74LVC245ABQ 1
B06I
3PAC
CA-CD2n
CA-IORDn 10K
RES 3PAS 10K
CA-IOWRn 10K 7 3PAA-3 3
10K 6 3PAA-4 4
CE2n 10K 5 REGn
RES 9PAA
CA-CE2n RES 9PAB
CA-OEn CA-WEn
RES 3PAU 10K
CA-REGn
3PAN 10K 3PAR RES 10K 3PAT RES 10K 3PAV RES 10K
21
10
GND GND_HS CA-WP
3PAW RES 10K
CA-INPACKn
3PAY RES 10K
+3V3 2PA3
19
100R 3PA9-3 100R 6 2 100R
3PA4 4
1
2 3 4 5 6 7 8 9
100R
3
1
+3V3 2
18 17 16 15 14 13 12 11
MOCLK MDO7 MDO6 MDO5 MDO4 MDO3
3PA5
MOCLK MDO7 MDO6 MDO5 MDO4 MDO3
10K
3PA7 10K 3PAB-3 3
10K
3PAB-2 2
6
GND GND_HS 21
3PA9-1 100R 8
3PA9-2 7
3PA9-4 5 100R
1P00
VCC 3EN2 3EN1 G3
3PA2
CA-MOCLK CA-MDO7 CA-MDO6 CA-MDO5 CA-MDO4 CA-MDO3
100n
20
7PA2 74LVC245ABQ 1
10
2PA1
B06I
22u 16V
10-3-35
QFU1.2E LA
10K 7
3PAB-1 1
10K 8
3PAB-4 4
10K 5
CA-D03 CA-D04 CA-D05 CA-D06 CA-D07 CA-CE1n CA-A10 CA-OEn CA-A11 CA-A09 CA-A08 CA-A13 CA-A14 CA-WEn CA-RDY +5VCA
MDI0
1 3PW2-1 8
CA-MIVAL CA-MICLK CA-A12 CA-A07 CA-A06 CA-A05 CA-A04 CA-A03 CA-A02 CA-A01 CA-A00 CA-D00 CA-D01 CA-D02 CA-WP
CA-MDI0
33R 3PW3
MDI1
MDI2
CA-CD1n MDO3 MDO4 MDO5 MDO6 MDO7 CE2n CA-VS1n CA-IORDn CA-IOWRn CA-MISTRT CA-MDI0 CA-MDI1 CA-MDI2 CA-MDI3
CA-MDI1
33R 3PW4
CA-MDI2
33R MDI3
1 3PW1-1 8
MDI4
4
5
CA-MDI4
MDI5
2 3PW1-2 7
CA-MDI5
MDI6
33R 3 3PW2-3 6
CA-MDI6
MDI7
2 3PW2-2 7
33R 3PW2-4
CA-MDI3
33R
+5VCA
33R CA-MDI4 CA-MDI5 CA-MDI6 CA-MDI7 MOCLK CA-RST CA-WAITn CA-INPACKn REGn MOVAL MOSTRT MDO0 MDO1 MDO2 CA-CD2n
CA-MDI7
33R 3PW5
MICLK
33R 3PW1-4
CA-MICLK
MIVAL
4
5
CA-MIVAL
MISTRT
3 3PW1-3 6
CA-MISTRT
33R
33R
71 69 72 70
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
92789-055LF
CI conditional access
6
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Circuit Diagrams and PWB Layouts 10-3-36
QFU1.2E LA
10.
EN 178
B06J, FE
B06J
FE
B06J
+3V3
3KW1
TS-CHDEC-DATA
TS-CHDEC-DATA
3KW3
TS-CHDEC-CLK
TS-CHDEC-CLK
560R 3KW5
3KW4 470R
TS-CHDEC-VALID
TS-CHDEC-VALID
560R 3KW7
3KW2 470R
560R
3KW6 470R
TS-CHDEC-SOP
TS-CHDEC-SOP
560R
3KW8 470R
RES 2FS3 10p SOC-IF-P
SOC-IF-N
2FS1
5FS1
100n 2FS2
4u7 5FS2
100n
4u7
IF-IN-P
IF-IN-N
2FS4 RES 10p
+3V3
3RW1
TS-DVBS-DATA
TS-DVBS-DATA
560R 3RW3
470R TS-DVBS-CLK
3RW4
TS-DVBS-CLK
470R
560R 3RW5
TS-DVBS-VALID
TS-DVBS-VALID
3RW6 470R
560R 3RW7
3RW2
TS-DVBS-SOP
3RW8
TS-DVBS-SOP
470R
560R
FE
6
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Circuit Diagrams and PWB Layouts
10.
EN 179
B06K, HDMI
HDMI
B06K
RES 3HW6 390R 3HW1
FHW0 +5V
IHW3 HEAC
56R 1%
680R
RES 3HW2
HDMI-ARC
IHW1
3HW3
PWR5V
10n
27K 2HW1
10K 3HW4
3HW5
+3V3
12K
IHW2 RREF
1%
100n
B06K
2HW2
10-3-37
QFU1.2E LA
HDMI
6
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Circuit Diagrams and PWB Layouts
10.
EN 180
B06L, Control, temperature sensor and service
Control, temperature sensor and service
B06L 3
7CW0 PCA9540BGD
VDD 3CW0 +3V3
3CW1
SDA-M3
2
SDA-M3
4K7 SCL-M3
1
SCL-M3
SD0 SC0
SDA SCL
4K7
SD1 SC1
1CW4 FCWT
SCL-M3
FCWV
SDA-M3
2K2
SDA-SRF SCL-SRF
SDA-SRF SCL-SRF
2K2
3CWV
+3V3
3CWW
3CWY
4K7 4K7
VSS
FCWU 4
7 8
3CWU
SDA-SSB SCL-SSB
SDA-SSB SCL-SSB
6
1 2 3
4 5
5
3CWJ
SCL-M1 BM03B-SRSS-TBT
47R 3CWF
SDA-M1
SCL-FE
SCL-FE
SDA-FE
SDA-FE
47R
3CR6 +3V3 2K2 3CR7
BM03B-SRSS-TBT 1CW7
+3V3
SCL-SRF
FCWB
SDA-SRF
FCWC
2K2 FCW4
5 1CWG
1CW6
+3V3-STANDBY DCW5 FCWR DCW6 FCWS
6
1 2 3
SCL-SSB
FCW3
SDA-SSB
FCW1
FCW2
TEST-MOD TEST-CON F-OEn
5
4
1 2 3
+3V3-STANDBY
BM03B-SRSS-TBT
7
4K7
1 2 3 4 5
4
BM05B-SRSS-TBT 3CU3
EJTAG-MCU-TDO
47R 3CU4
STB-GP1
47R 3CWD
STB-GP5
STB-GP2
EJTAG-MCU-TCK
8
7
1 2 3 4 5 6
47R
100n
100n 2CW3
2CW2
22K
FCWH
EJTAG-MCU-TMS 1K0
DVS2
STB-GP4
22K 3CWC
FCWG FCWE 3CWS
3CWB
DVS1
1CW5 BM06B-SRSS-TBT
FCWD FCWF
EJTAG-MCU-TMS EJTAG-MCU-TDO EJTAG-MCU-TCK EJTAG-MCU-TDI
EJTAG-MCU-TDI
47R 3CU5
1K0
STB-GP0
3CWT
LED
3CWR
B06L
3CU2
STB-GP3
ENABLE-WOLAN
47R 3CWK
HP-DETECT
3CR8
ENABLE-WOLAN
+3V3-STANDBY 10K 3EW0
IRQ-WOLANn
IRQ-WOLANn
+3V3-STANDBY
47R
10K
3CWG
STB-GP6
SPLASH-ON
47R 3CUA
STB-GP7 +3V3
RESET-ETHERNETn
100R 3CWM
STB-GP8
RESET-RF4CEn
3CU0 10K
RESET-RF4CEn
47R
10K
10K
3CS1
3CS0
DCW1
3CWN
STB-GP9
LCD-PWR-ONn
47R 3CWP
STB-GP10
+3V3-STANDBY
SDM FCW0 DCW4
3CWE
SDMn
SDMn
+3V3-STANDBY 10K
AMBI-TEMP-FUS
10R
6CS1
3CS3
47R
47R
47R
TXD-SERVICE 3CU1
AVLINK1
DETECT12V
10K
3 3CS4-3 6
10K
PDZ5.1B(COL)
6CS0
1CS1
47R
+3V3-STANDBY
RXD-SERVICE
3CRA
47R
8 3CS4-1 1 PDZ5.1B(COL)
47R
2 1 MSJ-035-75C-B-RF-PBT-BRF
3CS2
3CR9
2 3CS4-2 7
5 3CS4-4 4
1u0
FCS1
FCS0
1CS0
2AW0
FCS2 5 4 3
1E06
AMBI-TEMP
100n
3AW0
2CW1
47R
47R 3CU6
STB-TXD
TXD-STANDBY
47R 3CU7
STB-RXD
TXD-STANDBY RXD-STANDBY
RXD-STANDBY
47R FCW8
STB-SCL
3CU9
STB-SDA +3V3 +3V3
47R
100n
+3V3-STANDBY
22 23 24 25
100n
1 2
3 4
3TW0
SDA-SSB SCL-SSB
DBG
3TW1 47R
VSS GND_HS
47R
1 2
OS
17
9TW0 RES 9TW1 RES 9TW2
8
IRQ-EXPANDERn
100n
2TW0
1n0
2CT4
1
DCW2
3
7TW0 LM75BGD A0
SDA
A1
SCL
A2
7 6 5
9TW5 RES
VIA
1CT7 SKHUBHE010
9TW4
VIA
6
18 19 20 21
11
GND
RESET-STANDBYn
9TW3
INT
FCT9
+VS
SCL SDA
+3V3-STANDBY 10K
+3V3
GND
12 47R 13
3CW2
RC_IRQ-RF4CEn
4
3CUY 47R
10K
3CUW
2
RESET
2 SC1-DETECTn 3 YPBPR-DETECTn 4 CVBS-DETECTn 5 7 FCW5 3CR2 100R ARC-SEL0 3CR0 8 ARC-SEL1 3CR1 9 FCW6 100R ARC-SEL2 10 100R FCW7
2CW5
VCC
3CR3
IO0 IO1 IO2 IO3 IO4 IO5 IO6 IO7
RC_IRQ-RF4CEn
10R
VDD A0 A1 A2
3CW5
IR
10K
100n
10K
7CT4 NCP803
2CW4
10K 3CUS
3CUP
3CUR
10K 14
10K
3CTY
RES 3CUN
7CW1 PCA9554BS
10K
10K
KEYBOARD_IRQ-SRFn
LGSEN
3
2CW6
10K
10K
RES 3CUM
RES 3CUK
10K 3CUL 10K RES 3CUU
3CUT
STANDBYn 3CW3 10R
15 16 1
SCL-SSB SDA-SSB
RESET-FUSION-OUTn
3CTD 47R
PWRON KYBRD
+3V3
SDA-MC
47R 3CUC
STB-RSTO
3CUV
10-3-38
QFU1.2E LA
Control, temperature sensor and service
6
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div. table
Circuit Diagrams and PWB Layouts 10-3-39
QFU1.2E LA
10.
EN 181
B06M, Strap options
B06M
Strap options
B06M
+3V3-STANDBY 10K
SPI-EN
SPI-EN
ICW1
3CUD
3CUE RES
ICA1
3CL0
+3V3-STANDBY
CA-IOWRn
CA-IOWRn
10K
3CL1 RES 10K
ICA2
3CL2
+3V3-STANDBY
10K
CA-WEn
CA-WEn
10K
3CL3 RES 10K
ICA3 CA-OEn
3CL4 10K
ICA4
3CL5
+3V3-STANDBY
CA-IORDn
CA-IORDn
10K 3CL7
+3V3-STANDBY
3CL6 RES 10K
RES
ICA5 CA-A14
CA-A14
3CL8 10K
10K
ICA6 NAND-CLE
3CP5 10K
3CP8
+3V3-STANDBY
RES
F-OEn
F-OEn
FCP6
10K
+3V3-STANDBY
3CT6 10K 3CT7 RES
+3V3-STANDBY
+3V3-STANDBY
10K 3CT8
3CP6 10K
TEST-CON
TEST-CON
TEST-MOD
TEST-MOD
RES
3CTA 10K
ENABLE-STANDBY
ENABLE-STANDBY
10K
3CTC
RES
10K 3CTF 10K
Strap options
6
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Circuit Diagrams and PWB Layouts
10.
EN 182
B06N, Headphone
Headphone
B06N
1
3DH3-1
8
68R IDHM
2 1DH4 3 1 MSJ-035-12D-B-AG-PBT-BRF
22n
FDH2 22n 2DH9
CDS4C12GTA 12V 2DH8
6DH2 RES
3 3DH3-3 6
CDS4C12GTA 12V 1DH3
68R
6DH1
4 3DH3-4 5
RES
4V 100u
IDHL
1DH2
2DH7
8
IDHP
1K0
HPHOR
FDH1
2 3DH3-2 7 68R
4V 100u
1
2DH6
5
IDHN
1K0 3DH4-1
HPHOL
3DH4-4
B06N
4
10-3-40
QFU1.2E LA
FDH3
68R
Headphone
6
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2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 183
Layout top
7UC2
3UAB 3UAC
3UA8
2UAD
2EHY
9EHE
2EHR
6UAF
2UPH
5UC2
1T71 1C31 1C30
3EM9
3EM8
2UA9 7UF8
2UF7
7EHJ 3EHS 2EHV
2UPK
2UCK
2UCW
2UCJ
2UCY
2UCL
5UC0 7UC3
6UC2
1CV5
1CV6 3CY1
2UPG
3UC9
6UC0
2VW3
3VWP
1CY1
3CY3
7EH4
2UAA
2UAM
2UF6
2UAT
3EHR 9EM3
3GEM
3UAW
3GE9
9GE1
9GE2 2GE2 3GE0 3GE1
9GM6
9GM5
3EJ8
1E03
2PA1
1P00
2UVC
2URC
3UR6
3UR7
2UR2 2UR0
3UR3
5UR2
2UR4
3UR5
3UR4
2UR3
7URA
2UR6
2UR5
2UR7 5UR1
3URF
3URB
2URH
3URC
2UR1
5UR6
5UR3
2URE
2URB
2DH6
2URA
2DH8 2DH9
3URA
7UR6
2URG
2URJ
2URF
2DH7
1CW7 3CWW
3CWY
1CW4 3CW0
1CW6
1E02
1DH2
3CWT
1CW5 3CWS
3EAH
2EAB
3EAG
2EAA
3EAD
3EAC
3EA8
3EA7
3CW1
2VCA
2VC5
1DH4
1H04
3CT1
3CTH
3CTF
2UV7
3CUE 3CUD
1VA6
2UPC
1CTZ
3VC6 2VC8
7EA0
1E01
7UV2 2UVD
DCW4
1CT7
7UP2 2UPJ
5UC1
3VWH
3CTK
7CT3
1DH3
6VC5
3CVT
2VW2
2VWJ
3VWL
1VA4
1VC6 3VC5
3VC2
3CYB 3CVS 3CV4 3VWR 2VW4
2VWK 3VWK
3UWM
6UW0
2UWR
2UWT
3UWL
2UWV
3UWD 2UWW
3UWK
1VC5
1VC8
2UCC 2UCA 2UCB
2UPL
7UV0
3CP6 3CP8
2VC9
2UPE 2UPD
2UPF
6UP6
2UV6
3CWE 2CW1
6VC6
5UP5
1UA0
2FZ3 2FZ5
2FZ6 3FZ0
2FS3
2FS4
5FS1 5FS2
3EW0 3CWK
2UWS
3VC7
2UPM
3VW9
1CWG
3UWB
3UWA
2EFA
3EF5
6VC0 6VC3
1VC1
1VC4
6VC7 2VCB
1UA1 1UP1
5UP6
3CTZ
3CT2
2UWY
2VC4 3VC4
9EH8
2VWE3VW8
6DH2 3DH3 6DH1
2VCC 3VC8
2VC1 3VC1
1CS1
2VC7
6VC4
7UC4
7UA2
3VW7
3CR3
3CUN
3CUP
3CUR
3CUS
3CUK
9TW0
9TW1
9TW2
2EA9
2EJ2 3EJ0
3CT8
1VC7
3CS1
3CS0
3UWF 3UWC
2HAB
2EF9
3EF2
2EFZ
7HA1
3HA3
2HA43HA2
3HA1
6VC2
2EJ6 3EJ4 3EJ5 3EJ1 2EJ5 2EJ3
3CW2
3CT3
6UW1
9HA1
5HD5
2VC6
2UAV
5EH0
3UV6
3CT0
3CTR
3CTJ
3CUA
2J41
3VW6 3VW4
3VW3
3CUU
9HD9 3HDU
2HDD
7UW2
2UWU
3UG9
2VWF3VWA
3CTU
3CTD
3EE2 3CR6
2J42 5J05
3J09
3J50
1J00
3VC0 3VC9
2VC2
3CY4
3CY2
2EHU
3VWJ
3KW6
3KW8
3KW4
2FS2
2FS1 3UU7
7UU1 2UU1
3UU2
3VW5
2VWD
3JA6
2VC0 2VCD
2VW5
3CV5
2VWC
3CR7
2VC3
1VA8
3VWD
3VWV
2J10 2J11
3VC3
1VC3
3VWM
3VWS
3J2U
DB17
2VW1 3VWW
2VWB 2VW8
3CS3
1VC2
3VWN
DB71
9UA1
2UF8
2EHS
2UA1
3EJ3 DB11
3EFU
6VC1
7HD0
2UAB
2J31 DB12
3CS2
3CUV
3CUT
6GE1 6GE0 2GE1
7EJ0 2EJ7
2J3H
3EFP
1E06
3CUL
2CV8
1GE0 3EJ2
DB79
2UU0
3UU1 3UU5
2UUA 3UU4
6EF2
2EFL 2EFK
2EFJ
1CS0
7CW1
2CW6 3CUM
2TW0
9TW3
9TW4
9TW5
7TW03TW1 3TW0
1H03
3CUY
2HD6
3EF3
6CS1 6CS0 3CS4
3CUW
2HA5
2CVB
3GEJ 3CVF
2EJ1
DB26
5EF1
2EFH
3EFH
3HA0
9GE0
6UW3
2J35
3CV2 DB78
3CTA
7EF0
2HA9
2HA2
3GE7
2EJ4
7J00
3HAR
2HA13HA4
1H02
3HBP
3GM4
3GM3 DB40 DB43DB42
3J55 3J54 3J53
3EFY
3HBQ
3GE8
1GE2 1GE1
3CV9
3CV8
DB41
3HW4
7HA0
7GE0
3GD5
3CV7
3CYC
3CVG
2J1E 2J14 2J82 2J20 2J1V
7J01
2J7S
DB56
DBA5
2J21
2EFB 2EFC
3HAV
3CVR
3CVN
2GVP
2GVN
3GM2
2J25
2UBF
2UB7
7UB1
2J1H 2J1B 2J1R 2J7T
DB53
1EF0
3HAW
2CV9
9GM2
3GM1
3GM6
9GM1
3VWG
3VWF
3GVH
6GS13GS5
2GVC
2GVK
2GVF
2GVA
3GVA
3GV9
2UBC
DBA2
7UAC 5UAA
6GE2
2J24
3J3V 3J3Y 3J43 3J3R 3J42 3RW6
1FA0
2FA0
2EFN 2EFM
3J20 3J2R 3J21 3J2Q 3J2E 3J2F
3J10
6GE3
7EM1
2UA0
1UA2
2J3J
2J3F
3UU6
1H01
3GV4
2GVH
2GVL
3GV0
3GVE
3GVD 3GVT
2UB8
2UBD
2UB9 5D51 DB00
3UWG 3UWH
1E00
3GEH 3GEG
DB32
DB09
3RW2
2KCK
3FA1 5FA7 5FA1
DB61
3RW8
2KCP
2KC2 2KC4
3FA4
2FA5
3J1B 3J1A
DB25
7J03
DB03
2J3K
3KC1
3KC7
2KCJ
2KCH
5KC55KC6
3FA3
3FA2 5FA6
3J13
DB31
3J2Z
3KC3
3KC8
3KC0
DB93
9GE3
DB10
3KC2
3KC6
5FA4 5FA5
3J1Z
3GEL
1GE3
DB22
2J59
2KC5 2KC3
5KC9
3KC9
2UB6
2J27
2J92
2J3D 2J30 2J29 2J2T 2J2V 2J2Z
2J39
3KW2
2KC0 2KC6
7KC0
2KC7
1F00
3J3U
3J36 3J3S 3J37 3J3T 3J3D
3J3C
5KC8
2KCD
2KC1
3J1W
2GE6
3GEN
3GEA
2J26
5KC7
3RD8
3KCA
5KC0
3J48 3J49
3J47 3J46 DB19
3KCB
9KC0 2KCE
2J08 2UB0
2J13
3J44 3J4E 3J45 3J4F
3J3A 3J3B
3J24 3J25 3J1R 3J1Y
2J95
5J0R
DB34
DB21
2KCR3KCE
3KC4
1KC0
7UB5
7J04
2KCG
9KC1 2KCF
2UBA
2J2W 2J33 2J2U 2J2D 2J2J 2J37
3RW4
5KC1
2KCC
2KCB
3RD5
3RD4
3RDA
5KA1 3KA0 5KA0 3KA1
9GV8
9GV9
5D71
2D55
5UB1
3J3L
3RD7
9RD3
3RDB
2RBL
1M01
3CVC
3J3M
2RDP
DRD0
3CVE
1CV3
3J1H
1D03
2RDJ 3RD1
3RD0
9RD12RDG
9RD02RDF
2RDC
1CV4
2CVA
3J1G
3J3H
1M90
3CVW
3CVD
2UB4
3J3G
2GVT 2GVS
1CV2
2CVC
2D63
2D59 2D58 2D57
1C27 3CVY
3GVC
3GV8
3D54
2KCS
2RBP 2RBS
2RBA
3RB12RBN
2RBC
2RD8
7RD0
3GVG
1CV1
7J02
3D56
3D55
9D53
9D52
2D72
2D74
3D71
9D54
9D55
3D77
3D76
2RDR
2RDA
2RD9
3GVJ
2GV9
7D50
3D63
7D70
3D50 3D60 3D61
DRD1
1G50 9GV3 2GV2
9GV7
2D83
7RDA
9RB6
2RDE
1RD0
2GVU
3D72
2D95
2D65
2D67
2D69
2D89
3D62
3D57
2RD7
2RK02RK1
6RB0
2RBK
2RB4
9RB0
2RB2
7GV0
5D77
2D78
5D00
2AAD
5D74 2D94
2D61
2D77
9D50
7D60
2D53
2D51
5D01
7D71
3D52 2D52
3RD3
2RBR
2RBW
2RB3 2RBT
9RB7
7RB0
9GVC
3J40 3J41
2RB5 2RBB 2RB9
9RB8 2RBY
2RBG
5RB0
2RBJ
2D85
2D54 3D70 9D51
2RB7
2RBD
2RB1
2D79
2D68
9RB9
1RB0 2RBM
9GVB
3RB0 2RBE2RBU 3RB3 2RBV 2RB6
2RB8 2RBF
2D5A
2D97 2D96 2D84
2D66 2D88
2D86
2D49
3D78
2D93
3D79 2VA8
9GVA 3GVK
2D87
5D79
3D51
2VAA
3D73
2D5B 2D60
2D62 2D64
2D50
3VAA 2VAC
3D75
2D75
3D58
1VAL 1VAK 1VAJ 1VAH
2VAF
5D76
2D80 2D82
3D74
2D92
5D50
2VAG
1VAG
6VAF
3VAD
1VAM
2D56 2D71
2D48
6VAB
1VA1
1VAP 1VAN
2RBH
3D82 3D83
2VAK 3VAK
2D73
5D83 5D80
2D70
9GVD
2RDD
1J50
1G51
2D98
2D99
2D81
2D91
5D70
2D5C
2D76
2D5D
6D0A 3D90
2CAL
9CAB
2D0B
2D0A
5D85
2CAT
9CAA 2CAS
2CAU
2AAC
2CAK
3AAB
2CAN
3CAG
3CAB
2CAJ
1D0A
3CAH
3CAF 2CAB
1D02
1D56 1D55 1D54 1D53 1D51 1D50 1D52
3GM5
1D01
1C20 1C251C26
1R01
10-3-41
QFU1.2E LA
2URD
2UR8
2UR9
6
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Circuit Diagrams and PWB Layouts
10.
EN 184
IGV1
3GVR
3GVN
3CAE
FAA22CAA
3CAD
3CAC
2AAV
3AAC
2AAW
2CAM
FAA0
IGW5
FAA1
IAA0
IAA1
FD90
IGW2
FD31
IGW3
ID96 ID98
FD32
ID95
ID93
DFW2
5FW3
FAA7
FAA8
FAA5
2UBB ID82
3J14 2J1A DB99
3VAG
2UBJ
3UBE IUB7 IUB6
5UB0
FVAA
ID81
3VA8 2VAB
ID75
ID76
ID70
ID61
FVA9
3VA7
ID80 ID97
2VA9
FVA1
ID83 FVA2
ID69
ID77 IUB4 FUB1
IUB3
3UB4 2UB3
3UB5 3UB6
ID66
ID58 ID56 ID65
ID54
FD50
ID90 ID87
FUB0
FD64 ID79
FD66
ID84
ID78 FD65
3J2G
2J1Z
ID89
FD63
3J2H
2J80 IJ0R
3J4A 3J4J 3J4B 3J4K
3J4G
3J4H
3J4N
2J93 5J0P
3J34 3J35
3J4D 2J01 3J4L 2J2G 3J4M 3J4C
3J3W
FD67
3J2N 3J2P
FUC0
3J3K 3J3N 3J4P 3J3Z
DB58
2J1F
2J1J
DC07
FVAC
3J3F 3J38 3J3E 3J39 3J3J 3J3P
DB59
2J1C 2J1W
2J12 3J17 3J16
3VAB
3VA9 2VAE
2VAD
ID53
IUB8
3J32 3J33
2J1S
3J15 2J18
2J84
2J85 3J11 2J16
2J17 3J12
2J86
2J1G
2J1K
DB95
DB98
FVA4
ID55
3J2M
DB54
DB97
3VAC
FVAD
FVAB
3J2K 3J2J 3J2L
DB52
3VAE 2VAH
FVAE
IVA0
2UBH
3UB7
3GM7
7GM2 FGE5
FTA6
2J19
DB36DB38 DB35
FJ08
3CV3
FCVB
DB62 DB55
DB01
3CVP 3CVM
IGE1
3UAL
2J15
DB39
DB06
6VAH 6VAG 6VAE 6VAD 6VAC 6VAA 6VA9 6VA8
3VAF
IVA1
ID63
3UB8
3CVU
DBA3
DBA6
FJ09
DB57
2J7U 2J1D
DBA7
DB64
DB50
2J83 2J7P
DBA4
FGE2
IUBC
IUB5
DB94
ID62
3UBC
IUB9
3J1F 3J1E 3J2A 3J28 3J2B 3J29 3J2D 3J2C 3J1U 3J26 3J1V 3J27
DB49
2GE3
FVAF2VAJ
3UBD IUBA
DBA1
3GEK
2UBK
2UBG
3UBB IJ0S
DB51
DB33
IUBB
2UBE
3J18 3J19 3J1K 3J1J
3UB9
3J1S 3J1C 3J1T 3J1D
3J22 3J1N 3J23 3J1P
3UBA
3J2S 3J2T
FVAG
ID50
ID51
FTA4
5TA1
3AAA
FAA9
ID94
ID52
FGE0
FTA5
ID91
FD70
FAA3
2CAR
FGV0
FUB2
3GE3
IUA3
3GV6
FGR83GV5
3UB3 3UBF
9GE4 3GEB
FUAH
FD69 ID57
IGW1
FGU9
FGR7
FD33 ID99
IGR1
FAA4
FAA6 FAAZ
IGW4
3GVS
IFW3
3J1M
3GE2
3AAD
3GV3
IGW6
IGW9
3FW8 2FW5 IFW5
FGE8
FGE1
FGWE
IGR5 FGR5
3GV7
FGUF
IGV3
FGU69GV1 FGVE
2J1U 2J81
3UA6
7FW1
FGE3
2GE5 3GE4 FGE4
FGWD
ID88
3J1L
3GE6
FGWC
FGWA
FGE6
2GE4 3GE5
IGV4
2J89
IFW2
FCVN
6UAC
7UAF
6UAB
2GE0
3UAT
FGWF
FGWG
FGR6
FGE7
IUAJ
3UAS
2UAL
3UAP 3UAN
IGR2
FGWK
IGR4
3GEF
3GEC FUAF
IGR3
FGR2
3GEE
FUAP
FGWJ
FGR9
FJ03
2UAN
FGWH
FGWM
2FW3
3FW6
FTA32TA2
2TA3
3GVL
3CVA
3CVB
3FW3 3FW5
IGS1
IGS2
3FW4
7GS2 3GS3
2GS3
IGS4 IEH2
2UAS
2UAW
3TA1
2UAK
3UGA
IUFU IUA2
3UAR
FUAT
IUFT
IUFS
FTA2
IUAV
IFW4
3GS1
3GS6
FGWL
FGWQ
FGR1
2FW6 IFW1
3FW7 IGS52GS5
FGWP
FGWS
DFW1 FCVF
7GS3 3GS4
FGWR
FGWU
2GVM
FGR3
FCVM
FCVG
7GS1
2FW4
2GY2
2GY1
2EHT
IUAS
IUAK3UA5
3UAV
7UAA
IEH0
IEH3
FTA1
3TA2
3GY9
2UA4 IEH1
IUAT
6UAD
3EHV
IUAP
3UAY
IEH5
2UAP
3EM0
IEHJ
7UAD
3EM1
3EHY
3EHP 3EHT
IEH4
2EH93EHU
IUAL
IUAR
IUAN
2UAR
3EHW
7UAB
ITA1 5TA2
2TA1
1GS1
3UAK
9UA0
9UA2
FUAU
FUAG
1TA1
FUAK
FUA8
3GY7
3GY5
3EM6
3EM7
FUAD
IEH62EHJ
FEH1
5TA3
FUA7
IUFR
2EHW
FEH5
3UA9
3UA7
3EHJ
3EHN
7UA3 2EHM
2EHL
FEH3
FUA0 FUAE
FUA3
IUAM
7EH2
2EHN
3GY1
2EM7 9EM2
2EM0
2EM2
FGWT
FGWW
IGV5
9GM4
IGV7
FGWV
FGWZ
FCV3 FCV2
9GM3
FCVL
9EM1
3EM4
FEH4
FEH2
FUA9
FUA1
2EM3
2EM6
7GM1
3GVM IGV6
FCVH
2GY8
2GYA
2GY6
1EM0
FEH8
FEH9
IEM1
FGWY
FGU1
IGR6
FGWB
FGVZ
IGV2
FCVE
FCVA
2EM4 3EM5
IEM2
2EHP
2GS1
9GS1 9GS2
3EM3 2EM5
2EM1 FEH7
FCVC
FGU0
FD30
FGR4
3GVP FGW0
IGV0
FGU3
IGR9
FGWN
FGV5
FGVK
FGS22GS2
FGU2
FGU5
2AAE
2GVR
3GVB
FCVK
FCVJ
FGS1
FGU4
IGR7
5D75 5D81
FGV79GV5
IGR0
FGV6
FGV9
2GVG
FGV8
FGU7
FGVB
2GVB
FGVA
FGVD
2GVD
FGVC
IGW7
FGVF
FGVG
FGW8
FGVH
FGVM
FGU8
FGVL
FGVP
2GVJ
FGVN
FGVR
3GVF
FGVQ
FGVT
IGRA
FGVS
IGR8
FGVV
9GV6
FGVU
FGVY
FCVD
9GV4
FGVW
FGVJ
FUAL
FCV1
2GY4
2UA2
FUAA
2UA3
FUA5
2UAU
FUAM
3UA4
3GYA
FUAB
3GY8
FUA6
2GY3
3GY6
2GY5
2GY9
2GY7
FUA4
3GYB
2UA5
3CAA
2CAP
Layout bottom
2CAD
10-3-42
QFU1.2E LA
IUA1 FJ0BDBC3
2J5A
IRB1
DBB5
IRB0
IRDB5RDB
FFA9
2FA8
IKC5
2FAG
FKC1
IKC7
2FAC
3KA2 3FA8
FFA6 IFAA
5FAA 2FA2
7FAA
IUU2
2FAE
FFA2 FFAA
IEF3 IEA3
2EFP FEFA
2HD5
DEF0
3CWD
3CU5
IEE1
3HDS
IUU3 FEFB
3CWN
3CU4
ICT1
3CU3
3CTY FCT2
2CW4 ICT3 2AW0
3CTB
3CU0
IHDK IUU7
9HD8
FEFC
3CWF
DCW1
IHD4
3CWJ
FEFE
FCWD
FEA4
2EFU
2HW1
3CWB
IHW1
FCWS
FHW0
IEF2
FEF2
3HW3
3CU2
3JA1
2EF5
DJAD
2HAP
FVC5 FCW4
5HA6
3HAP
FHA7
FHBC
5HA5
2HB4 FHAP
FVC2
2HAN
2HAF
3HAB
IHB1
2HD0
5HD0
3HA6
FVC7
IURD
2HAK
FHA8
2HAG
5HA9
FHB4
FHB2
FCS0
7HA5
3HAA
FHAM
3CUC
FEF5
3EF4
3HD4 IHDF
9HD4
2HAL
2HB5
2HAJ
3HA5
3HAS
2HAD
7EF1
2HAM
FHA6
3EFT 3EFS
FEFD
FEF6
FHD4
FHA3
6HA1
3HAY
2EF0
3EFM
3EFJ
IUWF
FVC8
2EFG FEF7
3EFR
DJA9
2EFV 3EFN
DJA7
9JA6
IURF
FEF9
2EF7
2JA0 DJAA
3JA5
3HB0 FHA4
FVCC
2EF1
FUW3
3EFL
7JA0
9JA3
DJAC
FHAG
FHBA
FEF8
5EF5
ICA6
9JA4
DJA6
DJA5 IDHP
FEF4 FEF02EF6
2HAA
3HB1
DJAE
DJAB
DJA3 DJA1
DJA2 DJA0
9JA5
FEF1
2EF8
FEF3
DCW6
FEA7 FHB5
5EF6
IEF1 2EF3
FUW2
2EFF
2JA2 3JA0
DJA8
2EF2
FCP6 IUWE
2EFT
DCW5
3CT6 FCWE
2EFS
5EF4
ICW1 FCW8
3CWP
5EF0
FCWR
3CWG
3CWC
3CU9
FCT9
3CP5
FCT8
7CT4
3PAA
3PA6
IEE0
5HD4
FHD8
IUU8
2JA1
FHAH FHB7
FHAY
IHB0
FHAV
FHB8 FHAN
IURE
FCWC
3CWU
7CW0
FCWV
FHAR
FHAW
FHB1
IUR9
FHB0
2UY8
2FAA
FFA4
2UU5
IEA4
DJA4
IURK
2FA9
2FA3
FFAB 3KA4 FFA5
IJ11
3FAD
FFAD
FFA7
3FAA
FFA3
3FAB
3FA7
FFAE
7FA1 3FA9
IFA5
3FAC
7KA0 IFA6
IFA4
IFA3
3KA3
5KCA
2FAB
2FA1
FJ16
5RDD
2RDL
3RW5
3RW3
3RW7
3KW7
3KW1
3KW3
3RW1
3PW1
3PW5
3KW5
3PW2
3PW4 3PW3
3KA5
FJ02
IJ0E
FJ0F
FFA82FAF
IKC4
FFAC
2J61
2FAH DKC0
DB81
2J5W
2CW3
ICT2
2CT4
3CL4
3PAP
3PAU
3PAR
3PAC
3CL6
3CL5
9PAA
3PAE
3PAS
FCT4
FCWF
2CW5
FCW0
IUR4
9RD2 3RD2
2KCL
IKC2 IKCA IKC6
3CWM
ICA4 FCT3
3CT9 3CW5
IHW2
2CW2
FCT6
3CR8
ICA3
3CU6 3CRA
9PAB
3CR9
3PAF
3PAL
3PAY
2UV9
2PA3
3AW0
3CU1 3CU7
3PAM
3PA2
3PAT
3CL1
7PA1
3PA8
3PA3
FCT7
FCT5
2UVB FUV2 3CL0
3CL8
3CL7
3PA9
2PA2
3CL2
3CL3
3PAV
ICA1
3PAN FUV1
3PA4
2JA4
7PA2
IUV33UV1
ICA5
2RDK
DBB8
DB08
FUU1
3CW3
3UV5 3UV2 ICA2
IKC3
2J2S 2J3B
2J3A 2J3C2J3E
2HW2 3HW5
7UV1
2RDS
2J2C DBC4
IKC0 IKC1
2FAD
DB69
DBC1
DBC5
IKCB
DKC1 DB67
2J28
DB15
DB66
2J2Y
3J06
2J07
FJ05
2RDH
IKC8 DBB6 DB02
2J2B
2J2R 3J2V 2J2A
FRB0
IRD6
IRD5
2FA7
DB27
DB29
2J38 2J36 2J2P
DB68
3J2W DB16
3J05 2J06
2J4J
DB04
DBB3 DB13
DB82
2J5F 2J5C 2J5H
FJ0J
3PAB
2J2N
DB87
2J4S
2J5P
FJ0G
5J06
IRD3
IRD1
DB18
5J0H
2J7W
5J0D 2J5N
2J96 2J4G 2J5B 2J05
2J3G 2J7F IJ0F
IRD2
2RD4 2RD3
IRD0
IKC9 DBB7
2J2M
2J4F
DB14
2J5R
2J4V
FJ0H
2J5S
IRDA
DB60
2J4T
2J97
2J7G
2J7E
FJ01
5RDA
2J2L 2J32
2J34
2RD6
2RD1
DB30
DB72
2J5Z
2J79 2J6B
2J5G
DBC6
DB74
FRDA
DBC0
FJ0ADBC2
2J5L 3J00 2J5M
2J60
2J7D
2J4H IJ0LDB85
DB96
5J0J
2J7V
2J78 2J6T
2J70
2J77
2J7C
2J75 2J7A 2J71
DB05DB07
3RD6
3J51
2J5Y
5J0E
2J09 2J23
IJ0N
2J6S
2J6F
2J7R
IJ0G
2J4R
IJ07
2J4L 2J98
DB86 DB77
2J88
2J1T 2J6M
2J4W
2J6W 2J99 2J94 2J76 2J73
5J0C 2J64
2J3Z
2FZ4
5J0N 2J55 2J53 5J07IJ08 2J56 2J58
2FZ1
DVW1
FJ10
5J0M
2J6D 2J47 2J5V 2J5T 2J3V 2J6E 2J43
2J7Y
3J08 3J07 3J52
3PA7
3PA5
3PAW
3PAD
IVW7
DVW4 DVW2
IVW8
2J44
IJ06
IVW3
2J22 5J0F
2J6J 2J6N
IJ0J
2J54
2FZ2
DVW5
DVW6
IVW1
IJ05
5J0L IJ0H 2J52 2J51 2J50 IJ0K
2J40
2J03
2J63 5J04 2J3W
IJ0A IVW2
FVW0
2J87
2J4N
2J45
2J6Y 2J74
DB76 DB89
3J01
2J6U
2J6L 2J65
IJ02
2J7B
5J00 2J3M
2J6P 2J69
2J3N 5J09 2J48 2J46 IJ09
IVW4
3PA1
2J7L
9GA2
2J3T
9J04 2J91
IJ01
2J66
IUAD
IJ12
2J4B
5J0K 2J68 2J4Z 2J6C 2J6R 5J03 2J7K 5J0A 2J6G 2J67 2J3P 5J0B IJ14 5J02 5J01 2J6V 2J6H 2J3Y
2J4E
2J4D 3VWU 2VW6
FCY6
2VW7
3VWB
FCY4 FUC1
2J3R 9J03 2J90
IJ13
FCY2
2UCN 3UCC
2J3S
IJ0C
IJ04
2J7H
2J6Z 2J7J
2J4P 2J72 2J6A
IJ10
2J4Y
5J0G
2VWA
FCY3
3UCD
DB83
IJ0M
DB20
2RDT
IRDC
DBB9
DB65
2J62
FEJ6
2UC1
2J3U 2J4A IJ03 2J4C
3VWC
2J49
3UC0
2UCH
3UC3
IJ0B
FCY1
IUC0
3UG2
IJ0U
FCY8
IUCP
IUF6
2J4M
IJ0P
3VWT
IUCA
3UCB
2J5U
IJ0T
IJ0D FCY7
3UC4
3UC8
7UC0
3UCA
2J00 3J02 2J7Z
DB75
DB88
FCY9
3UCE 2UCM
3UC7
3UCP
DB80
DB23
2J2H 3J30 2J2E
DB70 DBC7
DC02
2VW9
FHAS FHAF
FCW1
3JA4
3UWJ
3JA2
FVCD
FHD5 FHD2 FCW7
3CR1
FEA1
FCWU
3HBS 9HA0
FCW5
IHD8
IHB2
IDHM
FCS2
IHB3 IEA2
3HDT
IHD7 IHB6
9HD6
7HA3
3HAL
FHD7
IHDL
FHD65HD2 3HDE
2HD3
IHDH FHAL
3HW6
FEA2
3HW1
FEA3
3HW2
FEA9
3HB3
FEAA
7HA2
FEAB
2EA5 2EA0
FHD3
IHW3
1EA0
IUV1
2EA1 2EA7
3EA4
FHB6 FDH1
2UY7
FEAC
3HB4
2EA4
FURA FVCB
IHDG9HD5
FHD0
IHD19HD2
IHDM
2EA3
3HB2
3EA3
FEAH
IHB5
FEAD
IEA1
3EA1
2EA2
FEA5
FDH2
IDHL
FHD1
3CR2
FEAE
3EA5 FEA6
FUW4
9HD0
FEA8
3DH4
2UY2
6UW2
3CTC
3CT7
2UY1
3CWR
IHB4
FJA0
2UY3
3HD9
FCW6
FCWG
2UY5
2UY6
FVCA
IJA0
IURM
FUR1
DCW2
FCS1
FVC3
2HD1
IURA
FVC4
5HD1
IDHN
5UR5
IURL
FVC9
FVC1 FCW2
3CR0
IURN IUR2
FHB9
FCW3
FVC6
IUR8
IURC
FCWH
2URL
3URG
IURB
2URK
IUR0 IUR3
3CWV
FCWT
3JA3
FCWB
7JA2
7UF7
IUCB
IUC5
2UCR
DC03
FCY5
IUFP
3UAF IUAC
IUC4
3UC2 IUF3
2UCF
IUC1
IUC93UCR
3UCG
IUF0
2UCP
3UCF
IUF1
3UG0
3UCN
7UA0
IUFQ IUF7
3UD1
3UAH
FUAV
FUAC
3UAE
IUAA
7UF9 2UF9
FUAN
3UG4
3UG3
3UD0 3UG8
2UAJ
IUPF
IUAF
IUF8
7UC1
6UC1
IUPJ
IUAB
IUP23UPE
FUPA
IUC7 IUC6
2J2F DBB4 3J31
2J02
DB91
DC06
FEJ8
2UCD 3UC1
3UPD
3UAG
6UP4 6UP5
FUA2
FEJ7
IUC2
IUC3
2UCE
3UPB
FEJ0
IUC8
IUA0 IUP4
IUPE
2J04 3J03 3J04
DB47
DB90
3FZ1
IJ00
3EJ7
FEJ3
2J5K 2J5D
3EJ6
FEJ5 FEJ4
FEJB
2J4U
FEJA
FEJ1 FEJ2
FEH6
FJ04
DB73
2RD2
FEJ9
2RDB
3RD9
2RDN
DB24
2RD0 2RD5
5RDC
2RDM
2J2K
FHAE
IJA1
2EA6
FDH3
6
SSB layout bottom
2013-01-11
3104 313 6618 19370_126_130226.eps 130226
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 185
10.4 C 310431366652 Amplifier panel Power
Power
C01 100nF C003A
R005A
16V
4.7K
+5V2
GND1 F006A
PS-ON
S011A 50m RES 3
U001A BC847BW(COL)
R006A
1
47K
F007A
STANDBY
2
GND1
I006A 5% 33
R007A 3
6 RES 5% 33
RES
2
U002A RT7297CHZSP
VIN
+5V2
SW
3
8
SS
FB
5
I003A
C021A
9
X001A
68K
+3V3STBY
BL-ON
220K
1%
S010A 50m
BL-DIM1
1%
22K 1% R002A
GND_HS
GND
COMP
GND-3V3STBY
4
R001A I004A
6
GND1
GND-SND GND-AL +12V +VSND +12V-AL +12V
TYPE
S012A 50m
X090
R003A
I001A
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
GND1
100nF GND1
S013A 50m
PS-ON
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 30
6.8K
100pF
I005A
C008A
GND1
GND-3V3STBY
+3V3-STANDBY-KEYB GND1 STANDBY
1K
R004A
GND-3V3STBY
GND-3V3STBY
50V
10nF
EN
16V
GND-3V3STBY
C002A
50V
C007A
7
3.3nF
50V
I002A
1
16V
1nF
+5V2
+3V3STBY
3.6uH
GND1 BOOT
C009A
BL-DIM1
F001A
L001A
22uF
8 5%
I008A
6.3V
R007A 1
GND1
X204
7 RES 5% 33
C004A
R007A 2
22uF
50V
RES
33 5 RES
6.3V
50V
RES
R007A 4
C006A
1nF
RES
C010A
RES
GND1
1nF
B230LA-M3
BAT54 COL
D002A
RES
100nF
GND1
16V
C001A
22uF
6.3V
C005A
C011A
D001A
F008A
S001A 50m
+5V2
GND-3V3STBY
+3V3STBY +12V
GND-3V3STBY
1 2 3 5
4
+VSND
R062A
X101
KEYBOARD +3V3-STANDBY-KEYB
GND-SND BL-ON BL-DIM1
TYPE
GND-KEYB
+12V-AL S018A
GND-AL
RES GND-KEYB
X102 1 2 3 5
4
S014A S009A S008A
RES
+3V3-STANDBY-KEYB
+12V
RES KEYBOARD
S015A S016A S017A
RES RES
GND1
GND1
2
5
3
2
1
5
4
2
3
1
6
5
EMC
4
EMC
3
EMC
2
EMC
1
X011
5
X010
4
GND1
2
X002A
X001
4
GND-KEYB
X000
29 TYPE
+3V3-STANDBY-KEYB
TYPE
3
C01
1
10-4-1
Power
2013-05-07
3104 313 6665 19374_006_131121.eps 131121
2014-Jan-10 back to
div. table
4 5 RINP RINN BSPR OUTPR 30 29
3 16 6 7 FAULTZ SYNC PLIMIT GVDD BSNR OUTNR 26 27
13 14 15 AM2 AM1 AM0
Slave 500KC
2014-Jan-10 back to
div. table 22uH L017A
50V
10nF 50V
50V
220nF 50V 1nF
C060A C019A
3.3
220nF 50V
22uH C061A
10nF R043A
50V 22uH L015A
10nF
220nF 50V
50V 10nF C087A
C048A
C085A
220nF 50V
220nF 50V
C049A
50V
1uF
220nF 50V
4.7uF
4.7uF
220nF 50V 1nF
C055A C018A
10nF
220nF 50V
C054A
R041A
50V
33pF 50V
C098A
50V
C110A
50V
C107A
50V
50V 10nF C090A
10nF
C059A
2.2uF 50V
C103A
10nF
1uF 50V
C115A
10
100nF 50V
C068A
50V
C073A
R053A
35V C058A 220nF 50V
C084A
C088A
50V
C089A
50V
220nF 50V 1nF
C053A C017A
10nF
10
18 19 31 32
50V
C074A
220nF 50V
3.3
C052A
R040A
22uH L013A
C063A
220nF 50V
1uF
C051A
35V C057A 220nF 50V
20 21
L012A
C097A
BSNL OUTNL
50V
220nF 50V 33pF R052A
C050A C099A
24 23
22uH
C086A
100K LINP LINN BSPL OUTPL
3.3
22uH L011A
50V
RES 10 11 PVCC_1 PVCC_2 PVCC_3 PVCC_4
PVCC
33pF 50V
C081A
3.3
10nF 50V
C092A
C091A
220nF 50V
35V 220nF 50V
1uF
10nF 50V
10nF 50V C093A
C047A
C041A
C083A
1nF
C012A
50V
220nF 50V
C046A
10nF
C071A
10
R051A
GND_1 GND_2 GND_3 GND_4
HS
10nF 50V
220nF 50V
50V
C072A
10
R050A
9 28 25 22
33
C040A
R038A
L008A
220nF 50V
16V
1K 1uF S007A 50m R019A 100K RES 50m S006A R020A 100K RES MODSEL SDZ MUTE GAIN/SLV 17
PVCC
33pF
3.3
1nF
220nF 50V
220nF 50V
50V
C015A
C044A
C045A
R039A
50V
C080A
22uH
1nF
C029A 4.7uF
Master 500KC
22uH L007A
C062A
47K 50V
X003 26 27 220nF 50V
PVCC_1 PVCC_2 PVCC_3 PVCC_4
AVCC
220nF 50V 1nF
C037A C013A
2.2uF
4.7uF
10nF
10
10nF 50V
R037A
1nF
220nF 50V
220nF 50V
33pF 50V
C078A
50V
C014A
C039A
C038A
35V 220nF 50V 220nF 50V
4.7uF 50V
C111A
1uF
4.7uF 50V
C108A
50V
2.2uF 50V
C104A
C069A
1uF 50V
C116A
50V
C067A
100nF
4.7uF 50V
C112A
50V
C106A
50V
C102A
10nF
1uF 50V
C114A
50V
100nF
100K C066A
50V 10nF C096A
C094A
C043A
C042A
C082A
50V
10nF
10
18 19 31 32
17
C070A
50V
C095A
50V
220nF 50V
3.3
C036A
R036A
R012A
3.3
10nF 50V
C077A R035A
R045A
100nF 50V
C064A
33pF R044A 50V
C079A
22uH L005A
220nF 50V
R048A 1 2 12 8 AVCC
U004A TPA3118D2DAP
BSNR OUTNR C032A
L004A
C016A
S005A R021A
100K
220nF 50V
22uH
C056A
1uF R008A
AM2 AM1 AM0
C033A
C075A
1uF
13 14 15
BSPR OUTPR 30 29
10nF
47K
FAULTZ SYNC PLIMIT GVDD
220nF 50V
3.3
22uH L003A
50V
50m
RES
3 16 6 7
C035A
C076A
PVCC
1K 50m S004A R014A RES 100K S003A R015A RES 100K
RINP RINN
20 21
220nF 50V
3.3
C028A 16V
RES BSNL OUTNL
C034A
R042A
R031A
1uF C031A 16V 1uF C027A 16V
4 5
C113A
100K LINP LINN
24 23
50V
C030A 16V
10 11
BSPL OUTPL
33pF
F002A
100K
5.1K
MODSEL SDZ MUTE GAIN/SLV
C100A
F003A R010A 4.7uF
R046A
50V
50m S002A R016A
C109A
R047A
R011A 1 2 12 8
10
100K
50m
2.2uF
PVCC
1uF
50V
F004A
R055A
R018A
1uF C026A 1uF 16V 1uF C022A 1uF 16V R009A
C105A
16V
1uF
C024A
50V
F012A
C117A
C023A 16V
50V
10K 10K
R023A R022A R025A R024A C025A 16V
C065A 100nF
R027A
X070 U003A TPA3118D2DAP
10
R030A
PVCC
33pF R054A
F016A R029A
10K
10K
220uF 25V
PVCC
C101A
2K12 100K
R028A R026A
100K
10.
GND_1 GND_2 GND_3 GND_4
TYPE R013A
10K
1 2 3 4 5 6 7 8 9 R034A
50V
470pF
50V
470pF
2K12 F005A
QFU1.2E LA
9 28 25 22
3.9K
C121A
C120A
C125A 220uF 25V C124A
R017A
HS
1 2 3 5
PVCC
100K
X172 50V
30H L019A
R033A
15K 3.9K
15K
R032A
F015A
50V
1 2 3 470pF
F014A 50V
10K
470pF
F009A 10K F010A 10K F011A 10K
C119A
X170 470pF
1 2 3 4 6 C118A
30H
C123A
1K
+24V RES
33
2K13 1K
30H L018A
R049A
4 R058A
L020A
50V
+ SUB 470pF
X072
C122A
+24V
1K
F013A
R061A
1K
2K13 R057A
C02
R060A
5
1K
R+ R1 2 3 4
1K
L+ L-
R059A
10-4-2
R056A
Circuit Diagrams and PWB Layouts EN 186
Amplifier
Amplifier L002A
C02
F021A
F024A
22uH F022A
L006A
Amplifier
6 4 3 2 1 TYPE
F023A
F019A
F020A
F017A
F018A
5
X004
22uH L009A
22uH L010A
1 2 3 5 X002
TYPE 4
22uH
L014A
1 2 3 5 X005
TYPE 4
L016A
22uH
2 2013-05-07
3104 313 6665 19374_007_131121.eps 131121
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 187
10.5 272217190763, 272217190764, 272217190766 Keyboard Control Module 10-5-1
E, Keyboard Control Module
E
Keyboard Control Module
E
J2 8 7 6 5 4 3 2 1
R6 6.8 kΩ (1 kΩ) C1 0.01 μF
VSS
CON8
R1
R2
R3
R4
R5
1.5 kΩ 3.9 kΩ 150 Ω 330 Ω 680 Ω (1.5 kΩ) (3.9 kΩ) (5.6 kΩ) (8.2 kΩ) (18 kΩ)
ZD1 5.6 V
VSS
VSS
VSS
CH+
CH-
VSS
VSS
SOURCE VOL-
VSS
VSS
VOL+
POWER
0.5
Keyboard Control Module
2012-09-27
2722 171 90763 2722 171 90764 2722 171 90766
19370_044_130131.eps 130417
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 188
10.6 J 272217190804 QFHD sensor board QFHD sensor board
QFHD sensor board
J
J
AMBILIGHT CONNECTOR
+3.3V-AMBI J4 C1 1uF
R2 J1
27
RES
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 28
C4 10pF
RES R3
C5 10pF
26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
TV-CONNECTOR AMBI-SPI-MOSI
RES
AMBI-SPI-CCLK R5 30R
AMBI-TEMP
C3 C6 100nF
RES
100nF
R4
J3 13
RES
12
GND-AMBI
11 10 9 8 7 6 5 4 3 2 1
RES +12V-AMBI +12V-AMBI
C2 1uF
R1 0R
GND-AMBI
FH52-11S-0.5
+3.3V-AMBI +3.3V-STANDBY
+12V-AMBI
R6 10K
R7 10K
GND-AMBI
AMBI-SPI-CCLK GND-AMBI
AMBI-SPI-MOSI AMBI-TEMP 3D-LED LED2
GND-AMBI
KEYBOARD_IRQ-CRP +3.3V-STANDBY
IR_IRQ-RF4CEn
+5V
SCL-SRF SDA-SRF
FH52-25S-0.5SH C7 1uF
27 GND-AMBI
C8 1uF
C9 10pF
C10 100pF
C11 10pF
C12 10pF
C13 10pF
FH34SRJ-26S-0.5SH(50)
R8 1 2 3 4 5 6 7 8
R28
100uF/6.3V
D2
C22
C21 ECAS D40J107M015
ECAS D40J107M VSMY3850 D3
10
+3.3V-STANDBY
EN
C14 1uF/6.3V
SI2304BDS Q3
4 C15 C16 1 18pF18pF
VDD
R27 10R
RES
1
GND R16 10K
GND TSOP75236
C20 10nF
74LVC1G126
+3.3V-STANDBY
+3.3V-STANDBY
LED2
R17 10K
R26 47K
2
SCL-SRF SDA-SRF
10R R20 10R
B Q1 BC857
R21 10K
U3 R19
C17 1nF
2 6
SCL
VDD
10R
R15 100R
D1
OUT
INT
SDA
GND
R25
3 2
+3.3V-STANDBY
C18 1uF
U2
19- 213
5
4 1
LIGHT SENSOR R18 47R
LDR
5
IRQ-SRFn (NOT CONNECTOR)
4 TSL25715
3
R23 10K
R14 10R
IR_IRQ-RF4CEn R30 4R7
2
100R
+3.3V-STANDBY
RED LED
9
3
R22
R29 4R7
C19 100nF
U4 3D-LED
+3.3V-STANDBY SCL-SRF R10 0R 0R SDA-SRF R11 0R 3D-LED R12 0R R13 +5V
IR
+5V
10K
KEYBOARD_IRQ-CRP
FH52-8S-0.5SH
VSMY3850
R24
LED2
0R
C
3D-IR
R9
E
4R7
0R
1
+5V
J2
3
10-6-1
1.0
QFHD sensor board
2013-04-25
2722 171 90804 19374_008_131121.eps 131121
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 189
10.7 282206502664, 282206502665, 820400159661 Wireless LAN USB module, light sensor, IR/LED 10-7-1
J01, USB & control lines
J01
USB & control lines
J01 Chip default Description
Pad
2 1
J7 PBC04SAAN DEPOP
mimophy_core1_ant0_tx
0
0 = SFlash not present / 1 = SFlash present
mimophy_core0_ant0_rx
0
0 = SFlash Type is ST / 1 = SFlash Type is Atmel
mimophy_core0_ant0_tx
1
0 = OTP not present / 1 = OTP present
mimophy_core0_ant1_tx
1
0 = HSIC mode / 1 = USBPhy mode
mimophy_core0_ant1_rx
1
0 = backplane at 96 (98.4) MHz / 1 = backplane at 120 (123) MHz
1
VDD5 VDD5 R12 0 0603
R6 2
1 U1A
DEPOP TCM1210H900-2P-T000 +3V3-WIFI USB-WIFI-DM USB-WIFI-DP
4
USB_DMNS USB_DPLS
1
1N1293
2
3
UART_TX UART_RX
71 70 68 75
USB_DMNS USB_DPLS USB_MONCDR USB_RREF
SFLASH_MISO SFLASH_MOSI SFLASH_CLK
5 3 4
SFLASH_SS_L
2
SFLASH_CS
HSIC_STRB HSIC_DATA
L2
74 73
1 R50 3.83K
R2
0
SI/SIO0 SCLK CS_N WP_N/ACC HOLD_N
VDD3_3
VCC
8
SO/SIO1 GND HS
2 4 H
SFLASH_MISO
2
C105 0.1UF
4Mbyte for self-install GND
100K 1N1341
C19 100PF
R58
BCM43234KMLG QFN88H-0.40P
2
1
DNP MX25L3205DZNI-12G
R59
1
2
2
5 6 1 3 7
1
1
GND
VDD3_3
2 100K VDD3_3 2
GND
R60 DNP 10K RXG_0 RXG_1
39 30 37 28
RF_2G_ANTENNA_CORE0 RF_2G_ANTENNA_CORE1 GND_37 GND_28
MIMOPHY_CORE0_ANT0_RX MIMOPHY_CORE0_ANT0_TX MIMOPHY_CORE1_ANT0_RX MIMOPHY_CORE1_ANT0_TX
7 6 10 9
C0A0RX = PD C0A0TX = PU (OTP) C1A0RX = NO PD/PU C1A0TX = PD
TXG_0 TXG_1
42 33 35 26
PA_2G_CORE0 PA_2G_CORE1 GND_35 GND_26
MIMOPHY_CORE0_ANT1_RX MIMOPHY_CORE0_ANT1_TX MIMOPHY_CORE1_ANT1_RX MIMOPHY_CORE1_ANT1_TX
87 86 65 64
C0A1RX C0A1TX = PU (USB Mode)
14 15 19 18 16
JTAG_TRST_L JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TCK
GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7
78 79 80 81 82 84 85 13
LED_WLAN
XTAL_BUF_OUT
51
PAREF GND_24
55 24
GPIAO_GPIO_PAD
43
2
XTAL_IN XTAL_OUT
1N582
50
I_XTAL_VDD2P5/O_XTAL_VDD2P5
54 53
PAREF_CTRL1 PAREF_CTRL2
2
C3 1UF
2
VDD3_3 R63 1
1K R61
GPIO_6 GPIO_7
PU PD
1
0 2
IRQ-WOLANn 2
DNP HSMQ-C191
2
R65 DNP 10K
VDD3_3
10K
GND R62 GPIO7/6 = 0/1 10K
0.1uF
C103 1
1
20MEGHZ CRITICAL
C2
ANALOG_WLAN_IQTEST_QP ANALOG_WLAN_IQTEST_QN ANALOG_WLAN_IQTEST_IP ANALOG_WLAN_IQTEST_IN
1
30PF CRITICAL
2
C1
GND1 2 GND2 4
A 1
1
20 21 23 22
GND
R7
D1 C
1
1N1191
1
1K
2
3
2
1
49 48
R1 221
Y1 1N850
1N1116
R5
2
1
GND JTAG_TRST_L JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TCK
C0A0RX C0A0TX C1A0RX C1A0TX
2
GND
1
U1B
1
+3V3-WIFI USB-WIFI-DM USB-WIFI-DP
61 62
SFLASH_MISO SFLASH_MOSI SFLASH_CLK
2
U2 UART_TX UART_RX
1
2
0
GND
GND
BCM43234KMLG QFN88H-0.40P GND 30PF CRITICAL GND
GND
GND
P210
Wireless LAN USB module, light sensor, IR/LED
2012-07-24
2822 065 02664 2822 065 02665 19370_063_130204.eps 130204
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 190
J02, Connectors, LED
J02
Connectors, LED
J02 TP9
+3V3-WIFI 1
WIFI CONNECTOR Xinya S1315-06RVB-SB3-KH
+3V3-AMBI
+3V3-WIFI
TP10 TP11
1C31
+12V-AMBI
AMBI-SPI-MOSI
AMBI-SPI-MOSI AMBI-SPI-CCLK
Bead 30ohm AMBI-TEMP
2A05 DNP 100n 9000
0
GND-AMBI
USB-WIFI-DM
IRQ-WOLANn
IRQ-WOLANn
3A17 10K
TP12
9A12 DNP 0
ANT1
9A13
1 2 3 4 5 6 7 8 9 10
1 2 3 4 5 6 7 8 9 10
0 KEYBOARD_IRQ-CRP
+3V3-STANDBY
9A09
DNP 0 SCL-SRF
9A10 9A08 9A11
DNP 0 SDA-SRF DNP 0 3D-LED DNP 0
SCL-SRF SDA-SRF 3D-LED +5V
ANT0
FH52-8S-0.5SH
1
U.FL-R-SMT-1(10) 3
10p
1A01
2A13
2A12
10p
2A14
GND-AMBI
1A00
2A11 1
2
DNP 10p 2A07
3
DNP 10p
1.5p 9A04 0
+3V3-STANDBY
AL1 1 2
47R
2A09 1u0
IR_IRQ-RF4CEn
7003
IR_IRQ-RF4CEn 10R
3A07 TP5 DNP 10K
IR
2A15 18p
3A13 1
3
DNP BC847BW 2
2A19 DNP 100p
3A12 100R
1
1n0
2A06
1 2
+3V3-STANDBY
2A20 DNP 100p
3A16 1
RED LED
1
3
DNP
2173487-2
7A02
TP4
AR1 1 2
2173487-1 LTST-S321KRKT-PH
6000 2 1
7A01 BC857BW
2 10K
3
2A18
1 2
DNP
6001 2
10K 3A06
LED2
LTST-S321KRKT-PH
1
47R
3A04
TP3
3
9A06 0
2A17
1
+3V3-STANDBY
1.5p
2A16 18p
+3V3-STANDBY
U.FL-R-SMT-1(10)
2
GND-AMBI
Everlight 12-21/R6C-AR1S2B/2C Liteon LTST-S321KRKT-PH
3A05
KEYBOARD_IRQ-CRP
DNP FH34SRJ-18S-0.5SH
2A08
TP2
USB-WIFI-DP
1C01
2A04 1u0
FH34SRJ-26S-0.5SH(50)
LED2
USB-WIFI-DP
1
1
1
USB-WIFI-DM
LED2
AMBI-TEMP
+12V-AMBI
9A02 0
1 2 3 4 5 6 7 8
+3V3-WIFI
AMBI-SPI-CCLK 5A00
1 2 3 4 5 6 7 8
10p
4A00 DNP
DNP 100n
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
2A01
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
2A03
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
2A02
9A01 0
1A03
1A02
S1315-06RVB-SB3-KH
2A00 1u0
10p
AMBILIGHT CONNECTOR
1
10-7-2
QFU1.2E LA
2 3 1 4
TSOP75236
VS OUT GND1 GND2
P210
Wireless LAN USB module, light sensor, IR/LED
2012-07-24
2822 065 02664 2822 065 02665 19370_064_130204.eps 130204
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 191
J03, Light sensor
Light sensor
J03 +3V3-STANDBY
LIGHT SENSOR
2B00 1u0
+3V3-STANDBY
3B02 10K
1
TP13 7103
VDD SCL SDA
INT NC
5 4
GND
TP15
3
TSL25715FN
3B03
VSMY2853SL
1 1
2
6104 2
2
3D-IR
1
6102
VSMY2853SL
+5V TP7
6103
1
4R7
VSMY2853SL
MURATA ECASD40J107M015K00
100u 6V3
+5V
2B01 2 1
TP14
IRQ-SRFn
2B02 1
2 6
2
10R 10R
100u 6V3
SCL-SRF SDA-SRF
3B00 3B01
1
SCL-SRF SDA-SRF
1 1
2B03 DNP 100n 3B04 4R7 TP6 7B01
5
3B06 DNP 10K
3D
3D-LED
2 3B09 DNP 10K
1
3B07 DNP 10R
2 4 EN
3B11
7B02
4 SI2304DDS
3
3D-LED
3B05 4R7
5
3B10 DNP 100R
3
J03
1
10-7-3
QFU1.2E LA
1G DNP 74LVC1G126GW 3B08 47K
2S 2B04 10n
10R
P210
Wireless LAN USB module, light sensor, IR/LED
2012-07-24
2822 065 02664 2822 065 02665 19370_065_130204.eps 130204
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 192
J04, Connectors
Connectors
J04
1C26
DNP FH52-11S-0.5SH
DNP FH52-25S-0.5SH
FH52-40S-0.5SH
GND AMBI PAD TV CONVERTER
+12V-AMBI
+3V3-STANDBY
3C11 DNP 10K
GND-AMBI
3C10
+12V-AMBI
DNP 10K
+3V3-AMBI
AMBI-SPI-CCLK
GND-AMBI
AMBI-SPI-MOSI
GND-AMBI
AMBI-TEMP 3D-LED LED2 KEYBOARD_IRQ-CRP +3V3-STANDBY
IR_IRQ-RF4CEn
+5V
SCL-SRF SDA-SRF
2C04 1u0
AMBI-SPI-CCLK AMBI-SPI-MOSI AMBI-TEMP 3D-LED LED2 KEYBOARD_IRQ-CRP IR_IRQ-RF4CEn SCL-SRF SDA-SRF
2C03 1u0
2C09 10p
13 12 11 10 9 8 7 6 5 4 3 2 1
TP8
2C08 10p
13 12 11 10 9 8 7 6 5 4 3 2 1
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
GND-AMBI
2C07 10p
1C20
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
2C06100p
1C25
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
2C05 10p
J04
1
10-7-4
QFU1.2E LA
P210
Wireless LAN USB module, light sensor, IR/LED
2012-07-24
2822 065 02664 2822 065 02665 19370_066_130204.eps 130204
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 193
J05, RF Front-end
RF Front-end
J05 2
C0A0TX
1
C12 9PF DEPOP
GND C4
1
C0A0RX
2 2
RXG_0
C11 1
9PF U3 C6
2
1
2
1
2
IN
9PF
2
2
R100 0 R102 0 DEPOP
OUT
5
GND1 GND2 GND3 GND4
1 3 4 6
J2 J3
V1 V2 J1 GND
J3
4 6 5 2
A0_ANT0
C16 1
2
ANT0_RF_A I G1 G2 G3 G4
9PF CRITICAL L11 600pH DEPOP
GND
GND
GND
OUT
O
ANT1
ANT1
GND1 GND2 GND3 GND4
MM8430-2610RA1
1
GND
GND
2
DEA162500LT-1217A1 CRITICAL
IN
SKY13343-92LF
1
1
R101 0 DEPOP
3 1
2
TXG_0
9PF DEPOP
GND FL2
1
C7 0.5PF DEPOP C1A0TX 2
GND
1
C10 9PF DEPOP
GND C102 RXG_1 1
C1A0RX 2
2
C9 1
9PF U4 C8
2
R103 0 R104 0 DEPOP
9PF
IN
OUT
5
GND1 GND2 GND3 GND4
1 3 4 6
J2
4 6 5 2
A0_ANT1
C13 1
2
ANT1_RF_A I G1 G2 G3 G4
9PF CRITICAL L10 600PH DEPOP
GND
GND
OUT
O
ANT0
ANT0
GND1 GND2 GND3 GND4
MM8430-2610RA1
1
GND
IN
SKY13343-92LF
2
DEA162500LT-1217A1 CRITICAL GND
V1 V2 J1 GND
1
R105 0 DEPOP
2
J2 J3
2
2
1
2
3 1
GND C5
1
TXG_1 1
9PF DEPOP
GND FL1
2
J05
1
10-7-5
QFU1.2E LA
0.5PF DEPOP
GND P210
Wireless LAN USB module, light sensor, IR/LED
2012-07-24
2822 065 02664 2822 065 02665 19370_067_130204.eps 130204
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts 10-7-6
QFU1.2E LA
10.
EN 194
J06, Power supply
Power supply
J06
J06 VDD3_3
VDD1_2
C88
C63 1
2
0.1UF
0.1UF
C85
C75 1
2
1
2
1
2
0.1UF
0.001UF
U1C VDD1_2A
GND BCM43234KMLG QFN88H-0.40P
2
0.1UF
0.1UF
C23
1
2
2
1
2
0.1UF
C26
VDD3_3
VDD1_2C
0.1UF
2 C69
2
GND
GND1 GND2 HS-GND
NC1 NC2
5 11
10K
GND
Ferrite Bead 120ohm R200 1 2
VDD1_2A
1
2 1
2.2UF
2 1
C54
10UF
2
0.1UF
2 1
C40
2
22PF
1
R30
1
3N325
GND C91 0.001UF
2 59K GND
GND
GND 0.1UF
2
C39
60.4K
2
VDD1_2
C31
2
GND
1
2.2UH CURRENT=1.31A CRITICAL L8 2 1
0.1UF
2 1
2
C25
2
0 C67
1
PA_CORE1_VDD3P3
2
1
2.2UF
2
4.7UF
VDD3_3
C92
2
0.1UF
C58
2 1
C43
2 C42
R20
0.1UF
FB1 FB2
0.1UF DEPOP
2 C64 1
2 150K
1
GND
PAM2306AYPAA DFN12 CRITICAL
C30
R24
2
1
1
R33
DNP 59K
1
2
1
2
1
EN1 EN2
4 10
GND
DNP 100K VDD3_3
8 2
R32
1
R29
3N330
1
3 9 H
LX1 LX2
DNP 22PF
2 R31
2
0.1UF
C18
0.1UF
2 1
C28
10UF
2 C27 1
6 12
R40 VDD5
C65
GND
GND
1
3N344 VIN1 VIN2
1
VDD3_3
1
2
U5
7 1
C83 2
0.1UF
GND
0.1UF
DNP 2.2UH CURRENT=1.4A CRITICAL L7 2 1 DNP 267K
R21
0.1UF
1UF
1
GND
0
GND
GND
GND
1
GND
0
1
2
1
C101 2
0.1UF
GND
C37 2.2UF
PA_CORE0_VDD3P3
2
GND
GND
VDD5
C24
GND
C44 1
1
1
0.1UF
2 C22
H
C34 1
1
1
C21
0.1UF
2
GND_SLUG
C32 0.1UF
GND
R49
VDD3_3 VREF
1
0.1UF
1
56
VDD1_2D 2
C78 GND
2
VREF
TX_2G_CORE0_VDD1P2_1 TX_2G_CORE0_VDD1P2_2
GND
2.2UF
EXT_POR_L
52
GND
C62 1
0.1UF
C70
67
GND VDD2P5_USB_OUT
15K
2
1
USBAVDD2P5
2
2
TX_2G_CORE1_VDD1P2_1 TX_2G_CORE1_VDD1P2_2
1
1
31 27
R35 3N938
1
USBLDO_2P5_OUT
58
SYNTH_VCO_VDD1P2 SYNTH_VDD1P2
C80
1UF
RCAL_RES_EXT_CORE
44
CORE_VDD1P2_1 CORE_VDD1P2_2
1
0.1UF
C81
USB_AVDD3P3
69
C77 VDD1_2B 2
0.1UF
2
57
GND 1
PA_CORE0_VDD3P3
0.1UF
LDO_3P3_IN
2
2
VDDPLL/RF_AVDD_1P2
GND
VDD1_2A
VREG3P3_VDD3P3
45
1
0.001UF
C79
PA_CORE1_VDD3P3
1
ANALOG_WLAN_IQTEST_VDD1P2
59
40 36 GND
25 32 34 41
C41
2 C46
17
46 47
1
2
VDD_66 VDD_60
29 38
0.001UF
1
0.1UF
2 C86 1
2 C87 1
0.1UF
VDD_PLL_LIN
PA_2G_CORE1_VDD3P3_1 PA_2G_CORE1_VDD3P3_2 PA_2G_CORE0_VDD3P3_1 PA_2G_CORE0_VDD3P3_2
2
0.1UF
10UF
0.001UF VDD_PLL_LIN 1
C51 0.1UF
USB_AVDD_1P2
C76 1
2
1
C53 2
72 66 60
VDD1_2D
GND
VDD_88 VDD_77
C84
VDD3_3
EXT_RST_L
4.7UF 2
88 77
VDD3_3
1
VDD1_2C
1 63 11 76 83
0.01UF
GND
C38 1
VDD1_2
0.1UF 1
VDDIO_1 VDDIO_63 VDDIO_11 VDDIO/OTP_VDD VDDIO_83
VDD_12 VDD_8
C90
GND
C71 2
12 8
2
VDD1_2B
GND
P210
Wireless LAN USB module, light sensor, IR/LED
2012-07-24
2822 065 02664 2822 065 02665 19370_066_130204.eps 130204
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 195
10.8 282206502668, 282206502669 Wireless LAN USB module, light sensor, IR/LED J01, Control lines
Control lines
J01 U4A Pad R1 10K 1% 1/16W R0402 1 2
VDD3_3
5
USB_DMNS
5
USB_DPLS
61
UART_TX
SFLASH_MISO
3
62
UART_RX
SFLASH_MOSI
5
SFLASH_CLK
4
SFLASH_SS_L
2
USB_DMNS
D-
71
USB_DMNS
USB_DPLS
D+
70
USB_DPLS
68
USB_MONCDR
HSIC_STRB
74
75
USB_RREF
HSIC_DATA
73
chip default
description
mimophy_core1_ant0_tx
0
0=SFLASH NOT PRESENT/ 1=SFLASH PRESENT
mimophy_core0_ant0_rx
0
1=SFLASH Type is Atmel/ 0=SFLASH Type is ST
mimophy_core0_ant0_tx
1
0=OTP NOT PRESENT/ 1=OTP PRESENT
1
0=HSIC mode/ 1=USBPhymode
1
mimophy_core0_ant1_tx 1
BCM43235 LCC88_10X10_0P4
C60 100PF 25V C0201
mimophy_core0_ant1_rx
2
2
R34 4.02K 1% 1/16W R0402
1
0=backplane at 96(98.4)MHz/ 1=backplane at 120(123)MHz
1
VDD3_3
R23 NP / 10K 1% 1/20W R0201
3
RXG_0
RXG_0
3
39
RXG_1
RXG_1
RF_2G_ANTENNA_CORE0
2
U4B
MIMOPHY_CORE0_ANT0_RX
7
C0A0RX=PD
C0A0RX
C0A0TX=PU(OTP)
C0A0TX
30
RF_2G_ANTENNA_CORE1
MIMOPHY_CORE0_ANT0_TX
6
37
RF_5G_ANTENNA_CORE0
MIMOPHY_CORE1_ANT0_RX
10
C1A0RX=NO PD/PU
C1A0RX
MIMOPHY_CORE1_ANT0_TX
9
C1A0TX=PD
C1A0TX
MIMOPHY_CORE0_ANT1_RX
87
C0A1RX C0A1TX=PU(USB Mode)
28
RF_5G_ANTENNA_CORE1
3
TXG_0
TXG_0
42
PA_2G_CORE0
3
TXG_1
TXG_1
33
PA_2G_CORE1
MIMOPHY_CORE0_ANT1_TX
86
35
PA_5G_CORE0
MIMOPHY_CORE1_ANT1_RX
65
26
PA_5G_CORE1
MIMOPHY_CORE1_ANT1_TX
64
14
JTAG_TRST_L
GPIO0
78
15
JTAG_TDI
GPIO1
79
19
JTAG_TDO
GPIO2
80
18
JTAG_TMS
GPIO3
81
16
JTAG_TCK
GPIO4
82
1
NC TP2 R62 NP / 10K 1% 1/16W 1 R0402 2 R24 NP / 10K 1% 1/16W 1 R0402 2
VDD3_3
NC
VDD3_3
NC
XTAL_IN
48
XTAL_OUT
50
3
3
C1A0RX
3
C1A0TX
3
R41 10K 1% 1/20W R0201 1
84
GPIO6
85
GPIO6
2
GPIO7
13
GPIO7
2
PAREF_CTRL1
53
PAREF_CTRL2
20
ANALOG_WLAN_IQTEST_QP
21
ANALOG_WLAN_IQTEST_QN
23
ANALOG_WLAN_IQTEST_IP
22
ANALOG_WLAN_IQTEST_IN
VDD3_3
1
R48 10K 1% 1/20W R0201 XTAL_BUF_OUT
51
PAREF
55
I_XTAL_VDD2P5/O_XTAL_VDD2P5
54
5
C1 PAREF
UNUSED
24
GPIAO_GPIO_PAD
43
1
2
1uF 6.3V C0402
1
1
C2 1uF 6.3V C0402
2
C48 33pF 50V C0402
2
1 2
C49 33pF 50V C0402
IRQ
GPIO5
2 4
1
3
C0A0TX
R14 NP / 1K 1% 1/20W R0201 2 1
IRQ
1
49
R28 221 1% 1/16W R0402
2
X1 20MHz-10PPM-18PF XTAL4_FA20H
C0A0RX
R47 1K 1% 1/16W R0402 2
R54 NP / 10K 1% 1/16W 1 R0402 2
VDD3_3
1
J01
2
10-8-1
C28 0.1UF 6.3V C0201
BCM43235 LCC88_10X10_0P4 2A
Wireless LAN USB module, light sensor, IR/LED
2012-09-21
2822 065 02668 2822 065 02669 19370_073_130207.eps 130207
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 196
J02, Antenna switches
Antenna switches
J02
J02 C0A0TX
2
C25 NP / 9pF 25V C0201 SW1 RF-SWITCH SW_MS_901 R2 0ohm 5% 1/16W R0402 1 2
GND3 GND4
10pF 50V C0402
L1 NP / 1.5pF 50V L0402 2
RXG_0
3 1
RX EN
4
RX EN
6
RX TX
ANT
5
GND
2
C96
C21 10pF 25V C0201 1 2
NP / 10pF 50V C0402
P2 GND IN GND
SOT_363
NC
GND
L2 1.2nH +-0.2nH/ NC L0402
L3 NP / 1.8nH 0.3nH 300mA L0402
NC
FEED
2
ANT1 ANT_PHILIPS_2K13_L
NC
1
RXG_0
U3 RTC6603
1
2
2
C20 10pF 25V C0201 1 2
ANT1
1
GND1 GND2
2
5 6
C18 NP / 9pF 25V C0201
1
1
2
ANTIN ANTOUT
3 4
1
2
1
2
C10
1
2
2
1
2
C0A0TX
C0A0RX
NC
3 1 2
NP / AYU1_1P_02676_120_TF ANTENNA_CON_IPEX_A
NC TXG_0
C17 10pF 25V C0201 1 2
Reserved for HTV
1
L8 10nH 5% 250mA L0402
L4 NP / 1N +/-0.3N 300mA L0201
1
2
2
1
C16 NP / 9pF 25V C0201
1 3 4 6
2
1
GND1 GND2 GND3 GND4
TXG_0
2
C13 NP / 1P 25V C0201
C1A0TX
2
1
2
C1A0TX
C74 NP / 9pF 25V C0201
C1A0RX
2
TX
GND
2
1
C80 10pF 25V C0201 2
C27 1
ANTIN ANTOUT
3 4
R4 0ohm 5% 1/16W R0402 1
ANT2
10pF 50V C0402 L5 NP / 1.5pF 50V L0402
1
FEED
2 L7 1.2nH +-0.2nH/ NC L0402
GND
L6 NP / 3.9nH 0.3N 300mA L0402
ANT2 ANT_PHILIPS_2K13_R
1 2 1 L14 10nH 5% 250mA L0402
1
GND IN GND
3 1 2
NP / 10pF 50V C0402
NC
NC
NC
NC
NP / AYU1_1P_02676_120_TF ANTENNA_CON_IPEX_A 2
L11 NP / 1N +/-0.3N 300mA L0201
2
NC
2
Reserved for HTV
1
C24 NP / 9pF 25V C0201
2
C97 P3
2
TXG_1
C36 10pF 25V C0201 2 1
GND1 GND2 GND3 GND4
TXG_1
U5 DEA162500LT-1217A1 BPF6_1608 2 IN OUT 5
1 3 4 6
2
R8 10pF 25V C0201 1 2
1
1
SOT_363
2
2
ANT
5
1
6
2
RX EN
RX
1
3 1
4
2
RXG_1
RX EN
GND3 GND4
RXG_1
SW2 RF-SWITCH SW_MS_901
U10 RTC6603
GND1 GND2
2
C77 10pF 25V C0201 1 2
C88 NP / 9pF 25V C0201
5 6
1
2
C1A0RX
2
2
U1 DEA162500LT-1217A 1 BPF6_1608 2 IN OUT 5
R5 10pF 25V C0201 1 2
1
10-8-2
QFU1.2E LA
C41 NP / 1P 25V C0201
2A
Wireless LAN USB module, light sensor, IR/LED
2012-09-21
2822 065 02668 2822 065 02669 19370_074_130204.eps 130204
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 197
J03, Micro processor
Micro processor
J03 VDD3_3
VDD1_2
C42 1
C86 2
0.1UF 6.3V C0201
C46 1
C85 2
1
0.1UF 6.3V C0201
1
2
1000pF 25V C0201
C87 U4C
2
1
0.1UF 6.3V C0201
C38 2
1
2
VDD3_3 0.1UF 6.3V C0201 VDD1_2B
12
VDD3_3
VDDIO_1
1
VDD_8
VDDIO_63
63
88
VDD_88
VDDIO_11
11
77
VDD_77
VDDIO/OTP_VDO
76
1
83
0.1UF 6.3V C0201
VDD_12
VDD1_2
1000pF 25V C0201
C69 1
8
C43 VDD1_2B
2
1
0.1UF 6.3V C0201
2 0.1UF 6.3V C0201
C76 VDD1_2A
VDD1_2C
C44 0.1UF 6.3V C0201 1 2
72
USB_AVDD_1P2
66
VDD_66
VDDIO_83
2
C4 VDD1_2D
2
VDD1_2D
60
VDD_60
1
C5 1000pF 25V C0201 1 2
17
59
PA_5G_CORE1_VDD3P3
25
PA_5G_CORE0_VDD3P3
34
PA_2G_CORE1_VDD3P3
32
PA_2G_CORE1_VDD3P3
41
PA_2G_CORE0_VDD3P3
C19 1
ANALOG_WLAN_IQTEST_VDD1P2
VDD3_3 VDD3_3
VDDPLL/RF_AVDD_1P2
29
CORE1_VDD1P2
38
CORE0_VDD1P2
C3 1
VREG3P3_VDD3P3
45
LDO_3P3_IN
57
USB_AVDD3P3
69
2 0.1UF 6.3V C0201
2 0.1UF 6.3V C0201
31
TX_2G_CORE1_VDD1P2
27
TX_5G_CORE1_VDD1P2
44
USBLDO_2P5_OUT
58
USBAVDD2P5
67
1
1
1 C55 1uF 6.3V C0402
C15
C9 0.1UF 6.3V C0201
1
VDD2P5_USB_OUT
VDD3_3
VDD2P5_USB
2
VREF
56
GND_SLUG
89
1 C12 0.1UF 6.3V C0201
C54 2.2UF X5R 6.3V 20% C0402
2
TX_5G_CORE0_VDD1P2
52
2
1 36
EXT_POR_L
2
TX_2G_CORE0_VDD1P2
PA_2G_CORE0_VDD3P3
1
R49 0ohm 5% 1/16W R0402
40
2
1uF 6.3V C0402
1
VDD1_2A_CORE1
RCAL_RES_EXT_CORE
C53 0.1UF 6.3V C0201
C79 2.2UF X5R 6.3V 20% C0402
2
C7 0.1UF 6.3V C0201
R3 15K 1% 1/16W R0402 1 2
1
SYNTH_VDD1P2
1 C8 1000pF 25V C0201
2
2
1
47
SYNTH_VCO_VDD1P2
2
46
2
SYNTH_1P2
2
C61 0.1UF 6.3V C0201
C72 0.1UF 6.3V C0201
VREF
1 2
C6 10NF 10V C0201
EXT_RST_L
1 2
C62 0.1UF 6.3V C0201
BCM43235 LCC88_10X10_0P4 VDD3_3
C56 1
R29 2
1
2 VDD3_3 2
PA_2G_CORE1_VDD3P3
1
R60 0ohm 5% 1/16W R0402
1
10K 1% 1/16W R0402
C83 0.1UF 6.3V C0201
2
1
C89 2.2UF X5R 6.3V 20% C0402
2
0.1uF 10V C0402
1
C73 0.1UF 6.3V C0201
2
2
C82 0.1UF 6.3V C0201
1
1 C58 0.1UF 6.3V C0201
2
1 C68 0.1UF 6.3V C0201
2
1
VDD1_2A
2
C78 0.1UF 6.3V C0201
2
1
LOGEN_LNA
2 0.1UF 6.3V C0201
PA_2G_CORE0_VDD3P3
VDD_PLL_LIN
1
VDD1_2C
C47 4.7uF 6.3V C0603
1
J03
2
10-8-3
QFU1.2E LA
C70 0.1UF 6.3V C0201
2A
Wireless LAN USB module, light sensor, IR/LED
2012-09-21
2822 065 02668 2822 065 02669 19370_075_130207.eps 130207
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 198
J04, USB
USB
J04
1
VDD3_3
R9 150K 5% 1/16W R0402 VDD1_2
VDD1_2A
2
C91 10uF 6.3V C0603
1
1
1 C92 0.1UF 6.3V C0201
1
R61 0ohm 5% 1/16W R0402
C94 2.2UF X5R 6.3V 20% C0402
C93 1000pF 25V C0201
2
1
R45 150K 1% 1/16W R0402
C81 22pF 50V C0402
2
2
1
5
1
VDD1_2
2 L15 2.2UH 20% 1.5A L2_LPS3015
2
FB
1
2
EN
3
1
VIN
2
1 C71 0.1uF 10V C0402
C26 1uF 10V C0603 1
2
2
2
C59 10uF 10V C0805
2
R39 150K 1% 1/16W R0402
VDD3_3
VDD3_3
C51 VDD3_3
2
.1uF 50V C0603
2
U2 1in 2in
1out 2out
USB_DPLS USB_DMNS
4 1
1 NP / GBLC05C-LF-T7 SOD_323 2
D1
USB_DPLS USB_DMNS
2 2
C14 NP / 10pF 50V C0402
C11 NP / 10pF 50V C0402
1
2
C99 NP / 100P 50V C0402
3 2
F4P-2012 L4_2012
2
1
USB_D+ USB_D-
1
IRQ
2 .1uF 50V C0603
2
2
C50 1
IRQ
NC
A1
1
R11 10K 5% 1/16W R0402
6 5 4 3 2 1
S1315-06RVB-S03-K A1253WRA_S_6
A2
L12 1000ohm 25% 800mA L0603
P1 Shield IRQ GND1 USB+ USBPower
A3 2
1
1
1 GND3
GND2
8
2
R12 NP / 10K 5% 1/16W R0402
7
C57 10uF 10V C0805
1
1
4
RT8008PB SOT_25 LX GND
U9
2
VDD3_3
2
VDD3_3
1
J04
2
10-8-4
QFU1.2E LA
2A
Wireless LAN USB module, light sensor, IR/LED
2012-09-21
2822 065 02668 2822 065 02669 19370_076_130207.eps 130207
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 199
J05, Connectors, IR, and LED
J05
Connectors, IR, and LED
J05
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
NC
2
2 1 0ohm 5% 1/16W R0402
1 2
AMBI-SPI-CCLK 8 L0402
AMBI-TEMP
8
1
2 0.1uF 16V / NC C0402
1 R31
C66 0.1uF 16V / NC C0402
CONTROLS CONNECTOR
NC
R6 1 2 NP / 0ohm 5% 1/16W R0402
+12V-AMBI
FH34SRJ-18S-0.5SH / NC R0402
2
2 0ohm 5% 1/16W
AMBI-SPI-MOSI 8
C64
R30 1
C65 10pF 50V C0402
NC
1 2 L13 120OHM 1.5A
GND-AMBI
C67 10pF 50V C0402
C63 1uF 25V C0603
1 R7 2 0ohm 5% 1/16W R0402
NC
KEYBOARD_IRQ-CRP
J5
GND-AMBI
+3V3-STANDBY
+3V3-STANDBY
8
+3V3-STANDBY
1 2 3 4 5 6 7 8 9 10
GND-AMBI
FH34SRJ-26S-0.5SH
LED2
NC
1
+12V-AMBI
2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
0ohm 5% 1/16W R0402 R32 1 2 NP / 0ohm 5% 1/16W R0402
2
J4
J3
1
C52 1U 10V C0402
R33 2
1
1
+3V3-AMBI
NC
R66 2 1 NP / 0ohm 5% 1/16W
R0402
R67 2 1 NP / 0ohm 5% 1/16W
R0402
SCL-SRF
7,8
SDA-SRF
7,8
3D-LED
7,8
NC 1 R10 2 NP / 0ohm 5% 1/16W R0402
FH52-8S-0.5SH
NC
R68 2 1 NP / 0ohm 5% 1/16W R0402
+5V
1U 10V C0402
1
10K 5% 1/16W R0402
C37
1
Q2 2
18pF 50V C0402
2
VS
3
OUT
1
GND1
4
GND2 TSOP75236
Q1 BC847BW / NC
BC857BW
1000P 50V C0402
2
LED2
NC
18pF 50V C0402
C95
NC R13
8
NP / 100P 50V C0402
2
10K 5% 1/16W R0402
C98
1
C40
C84 NP / 100P 50V C0402 C29
2
LED (R) KPBA_3010
1
LED (R) / NC KPBA_3010
3
R19 3
1
NC
1 R22 2 10 5% 1/16W R0402
2
8 IR_IRQ-RF4CEn
1 R21 2 100 5% 1/16W R0402
1
+3V3-STANDBY D4
1
D3
1
U8
12
12
NC
47 5% 1/16W R0402
RED LED
2
47 5% 1/16W / NC R0402
+3V3-STANDBY
IR
R65
2
R59
1
1
NC
2
10-8-5
QFU1.2E LA
NC R18 1
2
NP / 10K 5% 1/16W R0402
NC
2A
Wireless LAN USB module, light sensor, IR/LED
2012-09-21
2822 065 02668 2822 065 02669 19370_077_130207.eps 130207
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 200
J06, Light sensor and 3D IR
Light sensor and 3D IR
J06 +3V3-STANDBY
LIGHT SENSOR
+3V3-STANDBY
1
C45
1
1U 10V C0402 2
R26 10K 5% 1/16W R0402
6,8
2 1 R27 10 5% 1/16W R0402
SCL-SRF
1
VDD SDA
6
2
SCL INT
5
GND NC
4
3
1 R25 2 10 5% 1/16W R0402
SDA-SRF
2
U7
6,8 IRQ-SRFn
(NOT CONNECTED)
TSL25715FN
R16
1
D5
100UF 6.3V C7343
VSMY2853SL
3D-IR
2
1
2
1 + C23
+
C22 100UF 6.3V C7343
1
2
4.7 1% 1/8W R0805
2
1
+5V
D6
R64 4.7 1% 1/8W R0805
NC 1 R56 2 10 5% 1/16W R0402
1
NC
C90
3
R55 47K 1/16W 5% R0402
2
NC
Q3
1 2
R51 1 2 NP / 100 5% 1/16W R0402
SI2304DDS SOT_23
1
3D-LED
NC
0.01uF 25V C0402
2
2
NC 6,8
NP / 0.1uF 10V C0402 U6 NP / 74LVC1G126GW SOT_353 1 OE Vcc 5 R20 2 A 3 Gnd Y 4 1 2 NP / 10 5% 1/16W R0402 2
NP / 10K 5% 1/16W R0402
2
4.7 1% 1/8W R0805 2
1
1
R63 C39
IR_VSMY2853SL
1
2
2
VSMY2853SL IR_VSMY2853SL
1
+5V
R15
IR_VSMY2853SL
1
D2 VSMY2853SL
1
J06
R50 NP / 10K 5% 1/16W R0402
2
10-8-6
QFU1.2E LA
NC 2A
Wireless LAN USB module, light sensor, IR/LED
2012-09-21
2822 065 02668 2822 065 02669 19370_078_130207.eps 130207
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 201
J07, Connectors
Connectors
J07
GND TP4 F999
J1
1
NP / 10K 5% 1/16W R0402
SDA-SRF
SCL-SRF
TP9
TP8
3D-LED TP6
NC AMBI-SPI-CCLK 6
GND-AMBI
AMBI-SPI-MOSI 6
GND-AMBI
AMBI-TEMP 3D-LED LED2
6 6,7 6
KEYBOARD_IRQ-CRP
+3V3-STANDBY
IR_IRQ-RF4CEn
+5V
6
6
SCL-SRF
6,7
SDA-SRF
6,7
C32 1U 10V C0402
10pF 50V C0402
100P 50V C0402
10pF 50V C0402
C75 10pF 50V C0402
1
C35
1
C31
1
C33
2
+5V
C34 1U 10V C0402
2
+3V3-STANDBY
TP7
2
TP3
1
FH52-40S-0.5SH
2
NC
NC
R36
GND-AMBI
1
NC
R35 NP / 10K 5% 1/16W R0402
2
FH52-25S-0.5SH / NC
+12V-AMBI
1
FH52-11S-0.5SH / NC
+3V3-AMBI
2
13 12 11 10 9 8 7 6 5 4 3 2 1
+3V3-STANDBY
2
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
GND-AMBI +12V-AMBI
1
TP10 J2
GND-AMBI
2
GND-AMBI
J6
GND_Cable
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
1
J07
2
10-8-7
QFU1.2E LA
C30 10pF 50V C0402
TP5
IR_IRQ-RF4CEn
TP1
LED2
2A
Wireless LAN USB module, light sensor, IR/LED
2012-09-21
2822 065 02668 2822 065 02669 19370_079_130207.eps 130207
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 202
10.9 272217190759, 272217190761 Sensor Module J, RF4CE Sensor Module
RF
RF4CE Sensor Module
RF
U3 CC2533F96RHA
3
CSn SCLK MOSI MISO
VSS
+3.3V
104
R30 10R
U6 VCC
R32 10K RESETn 20
RES 2
RESET
26 RF-N
RF_N
P2_4/XOSC32_Q1 P2_3/XOSC32_Q2
P0_0 P0_1 P0_2 P0_3 P0_4 P0_5 P0_6 P0_7 RESET_N
C16
4 3
B-Port
C24
2.2uF 0.1uF 0.1uF
B-Port
AT1
C25 1
U-port
1 2 1.8nH
NC
4 3
VSS C26
SDBTPTR3015
2.7pF VSS
2
32
SMA /UFLR/NI
VSS 33 IRQ-SRF
VSS 22
XOSC_Q1
23
XOSC_Q2
X1 32MHz
RBIAS DCOUPL
30
3
40
C34
C35
15pF
15pF
C33 1uF
103 NPC803SN293D3T1G
C23
UFL
0
VSS
+3.3V
RXD-RF4CE 3
C32
GND
RES
TXD-RF4CE
R31 10R
19 18 17 16 15 14 13 12
25 RF-P
1
E
RJ2 10K
C22
U2 LFB182G45BG2D280
RF_P P1_0 P1_1 P1_2 P1_3 P1_4 P1_5 P1_6 P1_7
C21
3
2
B
11 9 8 7 6 5 38 37
C20
6
1 C
Q4 VSS BC847
P2_0 P2_1 P2_2
5
36 DD 35 DC 34
1.2pF C15
C19
VSS
2
100k IR-IRQ-RF4CE
C18
0.1uF 220pF 0.1uF 0.1uF 1uF
21 24 27 28 29 31
AVDD5 AVDD3 AVDD2 AVDD1 AVDD4 AVDD6
GND PAD
R37
NC SCL SDA NC
DVDD1
1 2 3 4
+3.3V
DVDD2
C17
GND
39
10
L3 1uH
1
R34 56k
VSS
1
10-9-1
VSS VSS
VSS
VSS
0 1 2 3 4 5 6 7 0 8 1C27
+3.3V IR-IRQ-RF4CE RXD-RF4CE TXD-RF4CE RESETn
VSS VSS
1C02 1 2 3 4 5
VSS
VSS
VSS
DD DC RESETn +3.3V
DEBUG
FH52-8S-0.5SH
0.9
RF4CE Sensor Module
2012-11-21
2722 171 90759 19370_043_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 203
10.10 310431366033 AmbiLight AL1, 7 LED Master LiteOn
7 LED Master LiteOn
AL1 2101
+3V3
+3V3
F007
9109
+3V3
+3V3AL
3103
10K
+3V3 RES 9106
7102
F010
1
5
F006
-T
9105
10K 1%
27K
3102
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
100n 3101
+12V
1A02 FH34SRJ-26S-0.5SH(50)
6101
9107
4
F002
F004
2
LMV321AP5X
AMBI-TEMP
BAT54 COL
18K 1%
3107
3105
3K3 1%
-T 10K
F001
RES 3106
9101
100n
2104
3
AMBI-TEMP
F003
SCKI F005
SDI
9104 +3V3
28
9102
+12V
27
9103
+3V3
+12V
2102 28
100n
15 16
VREG IREF
R OUT0 G B
3104 R OUT1 G B
1K5 1%
SDI
10K
R OUT2 G B
SDI-BUF SCKI-BUF
3108
1 2
SCKI-BUF 3 4 14 17
10p
2105
100R
R OUT3 G B SDTI SCKI
NC VIA
SDI
18
GND 3109
SDTO SCKO
PWM2-R1 PWM2-G1 PWM2-B1
22 23 24
PWM2-R2 PWM2-G2 PWM2-B2
7 8 9
PWM2-R3 PWM2-G3 PWM2-B3
10 11 12
PWM2-R4 PWM2-G4 PWM2-B4
6 5 26 27 28 29
3110 220R
SDO
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
9112 F116
9111 F009
AMBI-TEMP SCKI SDO 9113 +3V3
FH34SRJ-26S-0.5SH(50) 1A04
GND_HS 25
SCKI
10K 3112
3111
SCKI
19 20 21
100p
1u0
VCC
2107
2103
7101 TLC5971RGE
13
+3V3AL
SDI-BUF
100R F011
10p
AL1
2106
10-10-1
F008
F012
F013
F014
F015
1X00 310430135421
3
7 LED Master LiteOn
2012-08-30
3104 313 6603 19370_045_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 204
AL2, 7 LED Master LiteOn
7 LED Master LiteOn
AL2 3202-2 7001 3202-4
22R
22R
PWM2-G3 3202-3
PWM2-R3
1 3201-1 8
22R 2
560R 3201-2
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
+12V
7
560R 3
3201-3
100n
3202-1
2202
PWM2-B3
7002
100n
22R
2201
6
560R 4 3201-4 5 560R
3205-1 7003
22R
22R
PWM2-G2
3205-4
PWM2-R2
8 3204-1 1
22R
5
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
+12V
560R 2203
7 3204-2 2 560R
100n
3205-3
22R
2204
3205-2
7005
100n
PWM2-B2
7004
6 3204-3 3 560R 5 3204-4 4 560R
3206-1 7006
PWM2-G1 PWM2-R1
3206-2
3206-3
22R
22R 3206-4
8 3207-1 1
22R 7
560R 3207-2
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
2
560R 6
3207-3
+12V
100n
PWM2-B1
7007
2206
22R
100n
AL2
2205
10-10-2
QFU1.2E LA
3
560R 5 3207-4 4 560R
3
7 LED Master LiteOn
2012-08-30
3104 313 6603 19370_046_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 205
10.11 310431366043 AmbiLight AL1, 8 LED LiteOn
8 LED LiteOn
AL1 2101
+3V3
+3V3
F007
9109
+3V3AL
3103
10K
+3V3 RES 9106
7102
F010
1
5
F006 +3V3
-T
9105
10K 1%
27K
3102
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
100n 3101
+12V
1A02 FH34SRJ-26S-0.5SH(50)
6101
9107
4
F002
F004
2
LMV321AP5X
AMBI-TEMP
BAT54 COL
18K 1%
3107
RES 3106
3105
3K3 1%
-T 10K
F001
9101
100n
2104
3
AMBI-TEMP
F003
SCKI F005
SDI
9104 +3V3
28
9102
+12V
27
9103
+3V3
+12V
2102 28
100n
VCC 15 16
VREG IREF
R OUT0 G B
3104 R OUT1 G B
1K5 1%
SDI
10K
R OUT2 G B
SDI-BUF SCKI-BUF
3108
1 2
SCKI-BUF 3 4 14 17
10p
2105
100R
R OUT3 G B SDTI SCKI
NC VIA
SDI
18
GND 3109
SDTO SCKO
PWM2-R1 PWM2-G1 PWM2-B1
22 23 24
PWM2-R2 PWM2-G2 PWM2-B2
7 8 9
PWM2-R3 PWM2-G3 PWM2-B3
10 11 12
PWM2-R4 PWM2-G4 PWM2-B4
6 5
3110 220R
26 27 28 29
SDO
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
9112 F116
9111 F009
AMBI-TEMP SCKI SDO 9113 +3V3
FH34SRJ-26S-0.5SH(50) 1A04
GND_HS 25
SCKI
10K 3112
3111
SCKI
19 20 21
100p
1u0
2107
2103
7101 TLC5971RGE
13
+3V3AL
SDI-BUF
100R F011
10p
AL1
2106
10-11-1
F008
F012
F013
F014
F015
1X00 310430135421
3
8 LED LiteOn
2012-08-30
3104 313 6604 19370_047_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 206
AL2, 8 LED LiteOn
8 LED LiteOn
AL2 3202-2
3202-4
22R
22R
PWM2-G3 PWM2-R3
1 3201-1 8
22R 2
560R 3201-2
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
+12V
2201
3202-3
5
7
560R 3
3201-3
100n
3202-1
2202
PWM2-B3
7003
7002
100n
7001
22R
6
560R 4 3201-4 5 560R
3205-1 7004
22R 3205-3
22R
22R
PWM2-G2 8 3204-1 1
3205-4
PWM2-R2
22R
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
+12V
560R 7 3204-2 2 560R
100n
3205-2
2204
PWM2-B2
7005
100n
6 3204-3 3 560R 5 3204-4 4 560R
3206-1
22R 3206-4
8 3207-1 1
22R 7
560R 3207-2
5
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
2
560R 6
3207-3
+12V
100n
PWM2-R1
3206-3
22R
2206
PWM2-G1
3206-2
7008
100n
PWM2-B1
7007
7006
22R
2205
AL2
2203
10-11-2
QFU1.2E LA
3
560R 5 3207-4 4 560R
3
8 LED LiteOn
2012-08-30
3104 313 6604 19370_048_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 207
10.12 310431366053 AmbiLight AL1, 9 LED LiteOn
9 LED LiteOn
AL1 2101
+3V3
+3V3
F007
9109
+3V3
+3V3AL
3103
10K
+3V3 RES 9106
7102
F010
1
5
F006
-T
9105
10K 1%
27K
3102
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
100n 3101
+12V
1A02 FH34SRJ-26S-0.5SH(50)
6101
9107
4
F004
2
LMV321AP5X
AMBI-TEMP
BAT54 COL
18K 1%
3107
3105
3K3 1%
-T 10K
F002
RES 3106
F001
9101
100n
2104
3
AMBI-TEMP
F003
SCKI F005
SDI
9104 +3V3
28
9102
+12V
27
9103
+3V3
+12V
2102
VCC 15 16
VREG IREF
R OUT0 G B
3104 R OUT1 G B
1K5 1%
SDI
10K
R OUT2 G B
SDI-BUF SCKI-BUF
3108
1 2
SCKI-BUF 3 4 14 17
10p
2105
100R
R OUT3 G B SDTI SCKI
NC VIA
SDI
18
GND 3109
SDTO SCKO
PWM2-R1 PWM2-G1 PWM2-B1
22 23 24
PWM2-R2 PWM2-G2 PWM2-B2
7 8 9
PWM2-R3 PWM2-G3 PWM2-B3
10 11 12
PWM2-R4 PWM2-G4 PWM2-B4
6 5
3110 220R
26 27 28 29
SDO
26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
9112 F116
9111 F009
AMBI-TEMP SCKI SDO 9113 +3V3
FH34SRJ-26S-0.5SH(50) 1A04
GND_HS 25
SCKI
10K 3112
3111
SCKI
19 20 21
100p
1u0
2107
2103
7101 TLC5971RGE
13
+3V3AL
27
28
100n
SDI-BUF
100R F011
10p
AL1
2106
10-12-1
F008
F012
F013
F014
F015
1X00 310430135421
3
9 LED LiteOn
2012-08-30
3104 313 6605 19370_049_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 208
AL2, 9 LED LiteOn
9 LED LiteOn
AL2 3202-2
22R
PWM2-G3 PWM2-R3
1 3201-1 8
22R 2
560R 3201-2
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
+12V
2201
3202-3
5
7
560R 3
3201-3
100n
3202-4
22R
2202
3202-1
7003
100n
PWM2-B3
7002
7001
22R
6
560R 4 3201-4 5 560R
3205-1 7004
22R
22R 3205-4
PWM2-R2
8 3204-1 1
22R
5
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
+12V
560R 7 3204-2 2 560R
100n
3205-3
22R
2204
PWM2-G2
3205-2
100n
PWM2-B2
7006
7005
2203
6 3204-3 3 560R 5 3204-4 4 560R
3206-1
PWM2-G1 PWM2-R1
3206-2
3206-3
22R
22R 3206-4
8 3207-1 1
22R 7
560R 3207-2
5
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
2
560R 6
3207-3
+12V
100n
PWM2-B1
7009
7008
2206
7007
22R
100n
AL2
2205
10-12-2
QFU1.2E LA
3
560R 5 3207-4 4 560R
3
9 LED LiteOn
2012-08-30
3104 313 6605 19370_050_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 209
10.13 310431366063 AmbiLight AL1, 10 LED Master LiteOn
10 LED Master LiteOn
AL1 2101
+3V3
+3V3
F007
9109
+3V3AL
3103
10K
+3V3 RES 9106
7102
F010
1
5
F006 +3V3
-T
9105
10K 1%
27K
3102
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
100n 3101
+12V
1A02 FH34SRJ-26S-0.5SH(50)
6101
9107
4
F002
F004
2
LMV321AP5X
AMBI-TEMP
BAT54 COL
18K 1%
3107
3105
3K3 1%
-T 10K
F001
RES 3106
9101
100n
2104
3
AMBI-TEMP
F003
SCKI F005
SDI
9104 +3V3
28
9102
+12V
27
9103
+3V3
+12V
2102 28
100n
VCC 15 16
VREG IREF
R OUT0 G B
3104 R OUT1 G B
1K5 1%
SDI
10K
R OUT2 G B
SDI-BUF SCKI-BUF
3108
1 2
SCKI-BUF 3 4 14 17
10p
2105
100R
R OUT3 G B SDTI SCKI
NC VIA
SDI
18
GND 3109
SDTO SCKO
PWM2-R1 PWM2-G1 PWM2-B1
22 23 24
PWM2-R2 PWM2-G2 PWM2-B2
7 8 9
PWM2-R3 PWM2-G3 PWM2-B3
10 11 12
PWM2-R4 PWM2-G4 PWM2-B4
6 5
3110 220R
26 27 28 29
SDO
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
9112 F116
9111 F009
AMBI-TEMP SCKI SDO 9113 +3V3
FH34SRJ-26S-0.5SH(50) 1A04
GND_HS 25
SCKI
10K 3112
3111
SCKI
19 20 21
100p
1u0
2107
2103
7101 TLC5971RGE
13
+3V3AL
SDI-BUF
100R F011
10p
AL1
2106
10-13-1
F008
F012
F013
F014
F015
1X00 310430135421
3
10 LED Master LiteOn
2012-08-30
3104 313 6606 19370_051_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 210
AL2, 10 LED Master LiteOn
10 LED Master LiteOn
AL2
3202-2
PWM2-G4
3202-3
PWM2-R4
1 3201-1 8
22R 2
560R 3201-2
5
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
+12V
7
560R 3
3201-3
100n
22R
2202
3202-4
22R
2201
3202-1
7003
100n
PWM2-B4
7002
7001
22R
6
560R 4 3201-4 5 560R
3205-1
22R
PWM2-G3
3205-4
PWM2-R3
8 3204-1 1
22R
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
+12V
560R 2203
7 3204-2 2 560R
100n
22R
2204
3205-3
100n
PWM2-B3
7005
7004
22R 3205-2
6 3204-3 3 560R 5 3204-4 4 560R 3207-1
3207-3
22R
22R
PWM2-G2
3207-4
PWM2-R2
8 3206-1 1
22R 7
560R 3206-2
5
BLUE
2
1
GREEN
2
4
3
RED
4
5
BLUE
6
1
GREEN
3
RED
6 +12V
2
560R 6
3206-3
100n
3207-2
2206
PWM2-B2
7007
7006
22R
100n
3
560R 5 3206-4 4 560R
3209-1
22R 3209-4 22R
8
3208-1
1
5
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
+12V
560R 7 3208-2 2 560R
100n
PWM2-R1
3209-3
22R
2208
PWM2-G1
3209-2
7010
100n
PWM2-B1
7009
7008
22R
2207
AL2
2205
10-13-2
QFU1.2E LA
6 3208-3 3 560R 5 3208-4 4 3
560R
10 LED Master LiteOn
2012-08-30
3104 313 6606 19370_052_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 211
10.14 310431366171 AmbiLight AL1, 6 LED LiteOn
6 LED LiteOn
AL1
AL1 2101
+3V3
F007
9109
+3V3
+3V3AL
3103
10K
+3V3 RES 9106
7102
F010
1
5
F006
-T
9105
10K 1%
27K
6101
9107
4
F004
LMV321AP5X
AMBI-TEMP
BAT54 COL
18K 1%
3107
2
F002
-T 10K
3K3 1%
3105
RES 3106
F001
9101
100n
2104
3
AMBI-TEMP
F003
SCKI F005
SDI
9108 +3V3
9102
+12V
27
9103
+3V3
+12V
2102 28
100n
16
VREG IREF
R OUT0 G B
3104 R OUT1 G B
1K5 1%
SDI
10K
R OUT2 G B
SDI-BUF SCKI-BUF
3108
1 2
SCKI-BUF 3 4 14 17
10p
2105
100R
R OUT3 G B SDTI SCKI
NC VIA
SDI
18
GND 3109
SDTO SCKO
PWM2-R1 PWM2-G1 PWM2-B1
22 23 24
PWM2-R2 PWM2-G2 PWM2-B2
7 8 9
PWM2-R3 PWM2-G3 PWM2-B3
10 11 12
PWM2-R4 PWM2-G4 PWM2-B4
6 5 26 27 28 29
3110 220R
SDO
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
9112 F116
9111 F009
AMBI-TEMP SCKI SDO 9113 +3V3
FH34SRJ-26S-0.5SH(50) 1A04
GND_HS 25
SCKI
10K 3112
3111
SCKI
19 20 21
100p
1u0
VCC 15
2107
2103
7101 TLC5971RGE
13
+3V3AL
SDI-BUF
100R F011
10p
28
+3V3
3102
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
100n 3101
+12V
1A02 FH34SRJ-26S-0.5SH(50)
2106
10-14-1
F008
F012
F013
F014
F015
1X00 310430135421
1
6 LED LiteOn
2012-11-26
3104 313 6617 19374_001_130827.eps 130827
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 212
AL2, 6 LED LiteOn
6 LED LiteOn
AL2
3202-3
PWM2-G2 3202-2
PWM2-R2
1 3201-1 8
22R 2
560R 3201-2
6
5
BLUE
6
GREEN
2
1
GREEN
RED
4
3
RED
5
BLUE
1 3
5
BLUE
6
2
1
GREEN
2
4
3
RED
4
+12V
7
560R 3
3201-3
100n
22R
2202
3202-1
22R
100n
3202-4
7003
2201
PWM2-B2
7002
7001
22R
6
560R 4 3201-4 5 560R
3205-1
3205-3
22R
22R
PWM2-G1 PWM2-R1
3205-4 22R
8 3204-1 1
5
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
+12V
560R 7 3204-2 2 560R
100n
3205-2
7006
2204
PWM2-B1
7005
7004
22R
100n
AL2
2203
10-14-2
QFU1.2E LA
6 3204-3 3 560R 5 3204-4 4 560R
1
6 LED LiteOn
2012-11-26
3104 313 6617 19374_002_130827.eps 130827
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 213
10.15 310431366292 AmbiLight AL1, 7 LED Everlight
7 LED Everlight
AL1 2101
+3V3
+3V3
F007
9109
+3V3AL
3103
10K
+3V3 RES 9106
7102
F010
1
5
F006 +3V3
-T
9105
10K 1%
27K
3102
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
100n 3101
+12V
1A02 FH34SRJ-26S-0.5SH(50)
6101
9107
4
F004
2
LMV321AP5X
AMBI-TEMP
BAT54 COL
18K 1%
3107
3105
3K3 1%
-T 10K
F002
RES 3106
F001
9101
100n
2104
3
AMBI-TEMP
F003
SCKI F005
SDI
9104 +3V3
28
9102
+12V
27
9103
+3V3
+12V
2102 28
100n
VCC 15 16
VREG IREF
R OUT0 G B
3104 R OUT1 G B
1K5 1%
SDI
10K
R OUT2 G B
SDI-BUF SCKI-BUF
3108
1 2
SCKI-BUF 3 4 14 17
10p
2105
100R
R OUT3 G B SDTI SCKI
NC VIA
SDI
18
GND 3109
SDTO SCKO
PWM2-R1 PWM2-G1 PWM2-B1
22 23 24
PWM2-R2 PWM2-G2 PWM2-B2
7 8 9
PWM2-R3 PWM2-G3 PWM2-B3
10 11 12
PWM2-R4 PWM2-G4 PWM2-B4
6 5
3110 220R
26 27 28 29
SDO
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
9112 F116
9111 F009
AMBI-TEMP SCKI SDO 9113 +3V3
FH34SRJ-26S-0.5SH(50) 1A04
GND_HS 25
SCKI
10K 3112
3111
SCKI
19 20 21
100p
1u0
2107
2103
7101 TLC5971RGE
13
+3V3AL
SDI-BUF
100R F011
10p
AL1
2106
10-15-1
F008
F012
F013
F014
F015
1X00 310430135421
2
7 LED Everlight
2012-09-11
3104 313 6629 19370_053_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 214
AL2, 7 LED Everlight
7 LED Everlight
AL2
3202-2 7001 P5018/RSSGBB7W-M01/1G 3202-4
22R
22R
PWM2-G3
3202-3
PWM2-R3
1 3201-1 8
22R 2
560R 3201-2
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
+12V
7
560R 3
3201-3
100n
3202-1
2202
PWM2-B3
7002 P5018/RSSGBB7W-M01/1G
100n
22R
2201
6
560R 4 3201-4 5 560R
3205-1 7003 P5018/RSSGBB7W-M01/1G
22R
22R 3205-4
PWM2-R2
8 3204-1 1
22R
5
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
+12V
560R 2203
7 3204-2 2 560R
100n
3205-3
22R
2204
PWM2-G2
3205-2
100n
PWM2-B2
7005 P5018/RSSGBB7W-M01/1G
7004 P5018/RSSGBB7W-M01/1G
6 3204-3 3 560R 5 3204-4 4 560R
3206-1 7006 P5018/RSSGBB7W-M01/1G
PWM2-G1 PWM2-R1
3206-2
3206-3
22R
22R 3206-4
8 3207-1 1
22R 7
560R 3207-2
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
2
560R 6
3207-3
+12V
100n
PWM2-B1
7007 P5018/RSSGBB7W-M01/1G
2206
22R
100n
AL2
2205
10-15-2
QFU1.2E LA
3
560R 5 3207-4 4 560R
2
7 LED Everlight
2012-09-11
3104 313 6629 19370_054_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 215
10.16 310431366302 AmbiLight AL1, 8 LED Everlight
8 LED Everlight
AL1 2101
+3V3
+3V3
F007
9109
+3V3
+3V3AL
3103
10K
+3V3 RES 9106
7102
F010
1
5
F006
-T
9105
10K 1%
27K
3102
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
100n 3101
+12V
1A02 FH34SRJ-26S-0.5SH(50)
6101
9107
4
F002
F004
2
LMV321AP5X
AMBI-TEMP
BAT54 COL
18K 1%
3107
3105
3K3 1%
-T 10K
F001
RES 3106
9101
100n
2104
3
AMBI-TEMP
F003
SCKI F005
SDI
9104 +3V3
28
9102
+12V
27
9103
+3V3
+12V
2102 28
100n
15 16
VREG IREF
R OUT0 G B
3104 R OUT1 G B
1K5 1%
SDI
10K
R OUT2 G B
SDI-BUF SCKI-BUF
3108
1 2
SCKI-BUF 3 4 14 17
10p
2105
100R
R OUT3 G B SDTI SCKI
NC VIA
SDI
18
GND 3109
SDTO SCKO
PWM2-R1 PWM2-G1 PWM2-B1
22 23 24
PWM2-R2 PWM2-G2 PWM2-B2
7 8 9
PWM2-R3 PWM2-G3 PWM2-B3
10 11 12
PWM2-R4 PWM2-G4 PWM2-B4
6 5 26 27 28 29
3110 220R
SDO
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
9112 F116
9111 F009
AMBI-TEMP SCKI SDO 9113 +3V3
FH34SRJ-26S-0.5SH(50) 1A04
GND_HS 25
SCKI
10K 3112
3111
SCKI
19 20 21
100p
1u0
VCC
2107
2103
7101 TLC5971RGE
13
+3V3AL
SDI-BUF
100R F011
10p
AL1
2106
10-16-1
F008
F012
F013
F014
F015
1X00 310430135421
2
8 LED Everlight
2012-09-11
3104 313 6630 19370_055_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 216
AL2, 8 LED Everlight
8 LED Everlight
AL2
3202-2
22R
PWM2-G3 1 3201-1 8
22R 2
560R 3201-2
BLUE
2
1
4
3
BLUE
6
1
GREEN
3
RED
6
5
BLUE
6
GREEN
2
1
GREEN
2
RED
4
3
RED
4
+12V
2201
3202-3
PWM2-R3
5
5
7
560R 3
3201-3
100n
3202-4
22R
2202
3202-1
7003 P5018/RSSGBB7W-M01/1G
100n
PWM2-B3
7002 P5018/RSSGBB7W-M01/1G
7001 P5018/RSSGBB7W-M01/1G
22R
6
560R 4 3201-4 5 560R
3205-1
7004 P5018/RSSGBB7W-M01/1G
22R 3205-3
22R
22R 3205-4
PWM2-R2
8 3204-1 1
22R
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
+12V
560R 7 3204-2 2 560R
100n
PWM2-G2
3205-2
2204
PWM2-B2
7005 P5018/RSSGBB7W-M01/1G
100n
6 3204-3 3 560R 5 3204-4 4 560R
3206-1
22R 3206-4
8 3207-1 1
22R 7
560R 3207-2
5
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
2
560R 6
3207-3
+12V
100n
PWM2-R1
3206-3
22R
2206
PWM2-G1
3206-2
7008 P5018/RSSGBB7W-M01/1G
100n
PWM2-B1
7007 P5018/RSSGBB7W-M01/1G
7006 P5018/RSSGBB7W-M01/1G
22R
2205
AL2
2203
10-16-2
QFU1.2E LA
3
560R 5 3207-4 4 560R
2
8 LED Everlight
2012-09-11
3104 313 6630 19370_056_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 217
10.17 310431366312 AmbiLight AL1, 9 LED Everlight
9 LED Everlight
AL1 2101
+3V3
+3V3
F007
9109
+3V3
+3V3AL
3103
10K
+3V3 RES 9106
7102
F010
1
5
F006
-T
9105
10K 1%
27K
3102
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
100n 3101
+12V
1A02 FH34SRJ-26S-0.5SH(50)
6101
9107
4
F004
2
LMV321AP5X
AMBI-TEMP
BAT54 COL
18K 1%
3107
3105
3K3 1%
-T 10K
F002
RES 3106
F001
9101
100n
2104
3
AMBI-TEMP
F003
SCKI F005
SDI
9104 +3V3
28
9102
+12V
27
9103
+3V3
+12V
2102 28
100n
15 16
VREG IREF
R OUT0 G B
3104 R OUT1 G B
1K5 1%
SDI
10K
R OUT2 G B
SDI-BUF SCKI-BUF
3108
1 2
SCKI-BUF 3 4 14 17
10p
2105
100R
R OUT3 G B SDTI SCKI
NC VIA
SDI
18
GND 3109
SDTO SCKO
PWM2-R1 PWM2-G1 PWM2-B1
22 23 24
PWM2-R2 PWM2-G2 PWM2-B2
7 8 9
PWM2-R3 PWM2-G3 PWM2-B3
10 11 12
PWM2-R4 PWM2-G4 PWM2-B4
6 5
3110 220R
26 27 28 29
SDO
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
9112 F116
9111 F009
AMBI-TEMP SCKI SDO 9113 +3V3
FH34SRJ-26S-0.5SH(50) 1A04
GND_HS 25
SCKI
10K 3112
3111
SCKI
19 20 21
100p
1u0
VCC
2107
2103
7101 TLC5971RGE
13
+3V3AL
SDI-BUF
100R F011
10p
AL1
2106
10-17-1
F008
F012
F013
F014
F015
1X00 310430135421
2
9 LED Everlight
2012-09-11
3104 313 6631 19370_057_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
10.
EN 218
AL2, 9 LED Everlight
9 LED Everlight
AL2 3202-2
22R
PWM2-G3 PWM2-R3
1 3201-1 8
22R 2
560R 3201-2
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
+12V
2201
3202-3
5
7
560R 3
3201-3
100n
3202-4
22R
2202
3202-1
7003 P5018/RSSGBB7W-M01/1G
100n
PWM2-B3
7002 P5018/RSSGBB7W-M01/1G
7001 P5018/RSSGBB7W-M01/1G
22R
6
560R 4 3201-4 5 560R
3205-1
22R
PWM2-G2 3205-4
PWM2-R2
8 3204-1 1
22R
5
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
+12V
560R 7 3204-2 2 560R
100n
3205-3
22R
2204
3205-2
100n
PWM2-B2
7006 P5018/RSSGBB7W-M01/1G
7005 P5018/RSSGBB7W-M01/1G
7004 P5018/RSSGBB7W-M01/1G
22R
2203
6 3204-3 3 560R 5 3204-4 4 560R
3206-1
PWM2-G1 PWM2-R1
3206-2
3206-3
22R
22R 3206-4
8 3207-1 1
22R 7
560R 3207-2
5
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
2
560R 6
3207-3
+12V
100n
PWM2-B1
7009 P5018/RSSGBB7W-M01/1G
7008 P5018/RSSGBB7W-M01/1G
2206
7007 P5018/RSSGBB7W-M01/1G
22R
100n
AL2
2205
10-17-2
QFU1.2E LA
3
560R 5 3207-4 4 560R
2
9 LED Everlight
2012-09-11
3104 313 6631 19370_058_130131.eps 130131
2014-Jan-10 back to
div. table
Circuit Diagrams and PWB Layouts
QFU1.2E LA
10.
EN 219
10.18 310431366372 AmbiLight AL1, Q LED panel
Q LED panel
AL1
AL1
IN
+3V3
28 27
10K
10K 3211
3210
3219
3215
100R
3214
SCKI-BUF
+3V3 9222
F210
7209 LMV321AP5X 4
5
3212
SCKI
-T 10K
+12V
10K 1%
27K
8 7 6 5
1
6201
3
SCKI
F208
+3V3
9220
F209
3213
SDI +3V3AL
SDI-BUF
100R
SDI
2
AMBI-TEMP
AMBI-TEMP
BAT54 COL
18K 1%
SDI
+3V3
3218
F205 9219
100n +3V3
3217
SCKI
9229
9231-1 9231-2 9231-3 9231-4
2221
-T 10K
F204
1 2 3 4
8 7 6 5
3K3 1%
AMBI-TEMP
F203
502382-0670
9226-1 9226-2 9226-3 9226-4
100n
F202
1 2 3 4
8
FH34SRJ-26S-0.5SH(50)
SCKI
3216
9218
7
+12V
3.0A 32V
2220
F201
T
10p
+12V
9228
SDI
+12VAL F206 1201
2218
9217
1 2 3 4 5 6
10p
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
2219
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
OUT
1M09 1A05
1A02
9230 9221
10-18-1
+3V3
28 27
FH34SRJ-26S-0.5SH(50) FH34SRJ-26S-0.5SH(50)
26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
28 27
9223 F211 +12V
9224 F212
AMBI-TEMP SCKI SDO 9225 +3V3 1A04
2nd driver 9211
1K5 1% R OUT1 G B R OUT2 G B
SDTO SCKO
NC VIA
7 8 9
PWM1-R3 PWM1-G3 PWM1-B3
10 11 12
PWM1-R4 PWM1-G4 PWM1-B4
3206
15 16
VREG IREF
R OUT0 G B
1% 1K5 R OUT1 G B R OUT2 G B
1 2
6 5 26 27 28 29
3 4 14 17
R OUT3 G B SDTI SCKI
SDTO SCKO
NC VIA
+3V3AL
19 20 21
PWM2-R1 PWM2-G1 PWM2-B1
22 23 24
PWM2-R2 PWM2-G2 PWM2-B2
7 8 9
PWM2-R3 PWM2-G3 PWM2-B3
10 11 12
PWM2-R4 PWM2-G4 PWM2-B4
13
PWM1-R2 PWM1-G2 PWM1-B2
1u0
100n
1u0 3202
1X00 310430135421
+3V3
15 16
VREG
R OUT0 G B
IREF
1K5 1% R OUT1 G B R OUT2 G B
6 5
1 2
26 27 28 29
3 4 14 17
R OUT3 G B SDTI SCKI
100n
7203 TLC5971RGE
VCC 2204
SDTO SCKO
NC VIA
GND_HS GND
9206
19 20 21
PWM3-R1 PWM3-G1 PWM3-B1
22 23 24
PWM3-R2 PWM3-G2 PWM3-B2
7 8 9
PWM3-R3 PWM3-G3 PWM3-B3
10 11 12
PWM3-R4 PWM3-G4 PWM3-B4
VCC 2206
1u0 3203
15 16
VREG IREF
R OUT0 G B
1K5 1% R OUT1 G B R OUT2 G B
6 5
1 2
26 27 28 29
3 4 14 17
R OUT3 G B SDTI SCKI
SDTO SCKO
NC VIA
GND_HS GND
19 20 21
PWM4-R1 PWM4-G1 PWM4-B1
22 23 24
PWM4-R2 PWM4-G2 PWM4-B2
7 8 9
PWM4-R3 PWM4-G3 PWM4-B3
10 11 12
PWM4-R4 PWM4-G4 PWM4-B4
6 5 26 27 28 29
3209
SDO
220R
GND_HS GND 18
GND
22 23 24
7202 TLC5971RGE
VCC 2212
25
3 4 14 17
SDTI SCKI
PWM1-R1 PWM1-G1 PWM1-B1
25
1 2
18
SDI-BUF SCKI-BUF
R OUT3 G B
19 20 21
9205
+12V
2205
18
IREF
R OUT0 G B
25
VREG
18
15 16
+3V3
2203 +3V3AL
13
VCC 1u0 3201
100n
7206 TLC5971RGE
4th driver
9204
9203
+12V
+3V3AL
13
7201 TLC5971RGE 2202
3rd driver
+3V3
2211 100n
100p
9212
+12V
2217
+3V3
2201
GND_HS 25
9202
+3V3AL
13
1st driver 9201
+12V
1X01 310430135421
Q LED panel
2
2012-11-30
1
2012-08-30
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div. table
Circuit Diagrams and PWB Layouts
10.
EN 220
AL2, Q LED panel
AL2
PWM1-B1
Q LED panel
3001-1
1
8
22R
3001-2
2
7
22R
AL2
7T01 LTW-G45T-PH
7T02 LTW-G45T-PH
7T03 LTW-G45T-PH
3001-3
3
6
22R
5
BLUE
6
5
BLUE
6
5
BLUE
6
3001-4
4
5
22R
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
3017-1
1
8
22R
9T00-2 9T00-1 9T00-3
3017-2
2
7
22R
7T19 LTW-G45T-PH
PWM3-B1 +12V
7T20 LTW-G45T-PH
7T21 LTW-G45T-PH
3017-3
3
6
22R
5
BLUE
6
5
BLUE
6
5
BLUE
6
3017-4
4
5
22R
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
+12V
3003-3
3
6
22R
3003-4
4
5
22R
PWM1-G2 1
8
560R
3004-2
2
7
560R
3004-3
3
6
3004-4
4
3005-1 3005-2
7T06 LTW-G45T-PH
5
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3 3004-1
7T05 LTW-G45T-PH
7T04 LTW-G45T-PH
RED
4
3
RED
4
3
RED
3019-1
1
8
22R
3019-2
2
7
22R
560R
3020-3
3
6
560R
5
560R
3020-4
4
5
560R
1
8
22R
3021-1
1
8 220R
2
7
22R
3021-2
2
7 220R
3005-3
3
6
22R
3005-4
4
5
22R
PWM1-G3
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
RED
4
3
RED
4
3
RED
+12V
100n
2006
100n
3022-1
1
8
750R 750R
3006-2
2
7
560R
3022-2
2
7
3
6
560R
3022-3
3
6
750R
3006-4
4
5
560R
3022-4
4
5
750R
3007-1
1
8
22R
3031-1
1
8 220R
3007-2
2
7
22R
3031-2
2
7 220R
3007-3
3
6
22R
3007-4
4
5
22R
PWM1-G4
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
5
BLUE
6
5
BLUE
6
5
BLUE
6
3021-3
3
6 220R
3021-4
4
5 220R
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
7T26 LTW-G45T-PH
7T28 LTW-G45T-PH
PWM3-B4
560R
3032-1
1
8
750R 750R
3008-2
2
7
560R
3032-2
2
7
3008-3
3
6
560R
3032-3
3
6
750R
3008-4
4
5
560R
3032-4
4
5
750R
PWM1-R4
5
7T27 LTW-G45T-PH
PWM3-R3
4
100n
8
4
2008
1
RED
+12V
6
7T25 LTW-G45T-PH
3031-3
3
6 220R
3031-4
4
5 220R
PWM3-G4
100n
3008-1
7T12 LTW-G45T-PH
5
3
22R
BLUE
PWM3-B3
3006-3
7T11 LTW-G45T-PH
22R
5
4
PWM1-R3
7T10 LTW-G45T-PH
6
4
7T24 LTW-G45T-PH
7T23 LTW-G45T-PH
5
PWM3-R2
560R
PWM1-B4
3
3019-4
PWM3-G3
2005
8
7T09 LTW-G45T-PH
BLUE
3 1
7T08 LTW-G45T-PH
5
100n
560R
2004
560R
7
100n
8
2
2003
1
3020-2
7T07 LTW-G45T-PH
3019-3
PWM3-G2 3020-1
PWM1-B3
7T22 LTW-G45T-PH
PWM3-B2
4
PWM1-R2
3006-1
+12V
7T30 LTW-G45T-PH
7T29 LTW-G45T-PH
5
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
PWM3-R4
Q LED panel
100n
2018
22R
560R
2017
22R
7
560R
5
100n
8
2
6
4
+12V
100n
1
3003-2
3
3018-4
2020
3003-1
PWM1-B2
3018-3
PWM3-R1
+12V
100n
560R 560R
+12V
100n
6 5
560R
100n
3 4
7
2022
3002-3 3002-4
2
2032
PWM1-R1
3018-2
2019
560R
560R
100n
7
8
2021
2
1
100n
3002-2
3018-1
2031
560R
100n
8
100n
1
2002
3002-1
2001
PWM3-G1 PWM1-G1
2007
10-18-2
QFU1.2E LA
2
2012-11-30
1
2012-08-30
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Circuit Diagrams and PWB Layouts
10.
EN 221
AL3, Q LED panel
Q LED panel
4
5
22R
8
560R
3010-2
2
7
560R
3010-3
3
6
560R
BLUE
5
+12V
6
3023-1
1
8
22R
3023-2
2
7
22R
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
1
8
22R
3011-2
2
7
22R
7T16 LTW-G45T-PH
PWM2-B2 3011-3
3
6
22R
3011-4
4
5
22R
PWM2-G2 8
560R
3012-2
2
7
560R
3012-3
3
6
560R
7T17 LTW-G45T-PH
BLUE
6
5
BLUE
6
BLUE
5
22R
1
8
3024-2
2
7
560R
3024-3
3
6
560R
3024-4
4
5
560R
3025-1
1
8
22R
3025-2
2
7
22R
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
560R
7T34 LTW-G45T-PH
3025-3
3
6
22R
3025-4
4
5
22R
PWM4-G2 3026-1
1
3026-2 3026-3
8
560R
2
7
560R
3
6
560R
3026-4
4
5
560R
3027-1
1
8
22R
3027-2
2
7
22R
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
22R
7B06 LTW-G45T-PH
3
6
22R
3013-4
4
5
22R
5
BLUE
6
9208-3
5
BLUE
6
5
BLUE
6
1
GREEN
2
9208-2
1
GREEN
2
1
GREEN
2
3
RED
4
9208-1
3
RED
4
3
RED
4
3028-1
1
8
560R
3028-2
2
7
560R
3028-3
3
6
560R
3028-4
4
5
560R
3029-1
1
8
22R
3029-2
2
7
22R
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
PWM4-R3
560R 560R
3014-3
3
6
560R
3014-4
4
5
560R
7B10 LTW-G45T-PH
PWM4-B4 3029-3
3
6
22R
3029-4
4
5
22R
PWM4-G4 7B02 LTW-G45T-PH 9209-1
5
BLUE
6
9209-2
1
GREEN
2
22R
7
22R 3015-3
3
6
22R
3015-4
4
5
22R
PWM2-G4 3016-1
1
8
560R
3016-2
2
7
560R
3016-3
3
6
560R
7B05 LTW-G45T-PH
7B04 LTW-G45T-PH
7B03 LTW-G45T-PH 5
BLUE
6
5
BLUE
6
5
BLUE
6
1
GREEN
2
1
GREEN
2
1
GREEN
2
3
RED
4
3
RED
4
3
RED
4
PWM2-R4
+12V
4
5
560R
8
560R
3030-2 3030-3
2
7
560R
3
6
3030-4
560R
4
5
560R
9S03-1
5
BLUE
6
5
BLUE
6
1
GREEN
2
9S03-2
1
GREEN
2
1
GREEN
2
3
RED
4
9S03-3
3
RED
4
3
RED
4
+12V
100n
2036
7B09 LTW-G45T-PH 9B10-4
5
BLUE
6
9B10-2
1
GREEN
2
9B10-3
3
RED
4
+12V
+12V
100n
8
2
2016
2035 1
3015-2
2015
3015-1
PWM2-B4
1
6
4
100n
RED
3
3030-1
BLUE
PWM4-R4
100n
9209-3
+12V
7S04 LTW-G45T-PH
7S03 LTW-G45T-PH
5
100n
7
PWM2-R3
3016-4
+12V
2030
2
8
22R 22R
BLUE
2027
3013-3
2013
3014-2
1
6 5
22R
PWM2-G3 3014-1
3 4
5
100n
7
3027-3 3027-4
PWM4-G3 +12V
7B08 LTW-G45T-PH
2029
2
7S02 LTW-G45T-PH
7B07 LTW-G45T-PH
100n
3013-2
7S01 LTW-G45T-PH
7B01 LTW-G45T-PH
2014
8
+12V
9B06-1 9B06-2 9B06-3
560R
100n
1
7T36 LTW-G45T-PH
5
PWM4-B3
3013-1
7T35 LTW-G45T-PH
PWM4-R2
PWM2-B3
+12V
100n
5
22R
5
5
2034
4
+12V
6
PWM2-R2 3012-4
100n
7T18 LTW-G45T-PH
2011
1
6
4
7T33 LTW-G45T-PH
6
PWM4-B2 5
3012-1
2010
9T18-2 9T18-3 9T18-1
100n
3011-1
3
3023-4
7T32 LTW-G45T-PH
BLUE
PWM4-R1
2012
560R
+12V
100n
5
100n
2009
PWM2-R1 4
3023-3
PWM4-G1 3024-1
3010-4
7T31 LTW-G45T-PH 5
100n
3009-4
6
2028
22R
BLUE
5
100n
6
6
100n
3
BLUE
2024
3009-3
PWM2-G1 1
7T15 LTW-G45T-PH
PWM4-B1 5
3010-1
7T14 LTW-G45T-PH
100n
7T13 LTW-G45T-PH
100n
22R
2026
22R
7
2023
8
2
100n
1
3009-2
PWM2-B1
2025
3009-1
AL3
100n
AL3
2033
10-18-3
QFU1.2E LA
9B18-2 9B18-3 9B18-1
Q LED panel
2
2012-11-30
1
2012-08-30
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2014-Jan-10 back to
div. table
Styling Sheets
QFU1.2E LA
11.
EN 222
11. Styling Sheets 11.1
6000 series 42"/47"
6000 series 42"/47"
0056
0155
1163 1111
0013 1010 1164 0112
1050 0453 5211 1020
5211 Pos No. 0007 0009 0013 0030 0056 0112 0155 0271 0453 1004 1010 1012 1020 1050 1111 1163 1164 1185 5211
1012 0007
0030
0009
1004
Description Alu decoration frame Leading edge Back cover Leading edge assembly Leading edge cover Standplate fixing Stand assembly 3D glasses, 2 pieces V0 sheet LCD panel Control board WiFi sensor module RF4CE module Power supply SSB AmbiLight left AmbiLight right Remote control Loudspeaker combination
Remarks
Not displayed
Not displayed
FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9 19370_069_130205.eps 130205
2014-Jan-10 back to
div. table
Styling Sheets 11.2
QFU1.2E LA
11.
EN 223
7000 series 42"/47"
7000 series 42"/47"
1170
0056
0155
1163 1111
1172
0013 1010 0112
0453
5211
1164
1050
1020
5211 Pos No. 0007 0013 0030 0056 0112 0155 0271 0453 1004 1010 1012 1020 1028 1050 1111 1163 1164 1170 1172 1185 5211
1012
0007
0030
1004
Description Alu decoration frame Back cover Leading edge assembly Leading edge cover Standplate fixing Stand assembly 3D glasses, 2 pieces V0 sheet LCD panel Control board WiFi sensor module RF4CE module Skype camera Power supply SSB AmbiLight left AmbiLight right AmbiLight top left AmbiLight top right Remote control Loudspeaker combination
Remarks
Not displayed
Not displayed
Not displayed
FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9 19370_070_130205.eps 130205
2014-Jan-10 back to
div. table
Styling Sheets 11.3
QFU1.2E LA
11.
EN 224
8000 series 40"/46"
8000 series 40"/46"
1170
0056 1050
1163
0155
5211 1172 1111
0013 1010
0453
1164
1020 5211
0112
Pos No. 0007 0013 0030 0056 0112 0155 0271 0453 1004 1010 1012 1020 1028 1050 1111 1163 1164 1170 1172 1185 5211
1012
1028 1004 0030
0007
Description Alu decoration frame Back cover Leading edge assembly Leading edge cover Standplate fixing Stand assembly 3D glasses, 2 pieces V0 sheet LCD panel Control board WiFi sensor module RF4CE module Skype camera Power supply SSB AmbiLight left AmbiLight right AmbiLight top left AmbiLight top right Remote control Loudspeaker combination
Remarks
Not displayed
Not displayed
Not displayed
FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9 19371_002_130404.eps 130404
2014-Jan-10 back to
div. table
Styling Sheets 11.4
QFU1.2E LA
11.
EN 225
8000 Design series 46"
8000 Design series 46"
1172 1170
0155
0116 0101
1111 0100 1163
5211
1020
0103
0117 0011 1010
1050
0453
1164
0100 1012 0102
0030 1004
Pos No. 0007 0011 0030 0094 0100 0101 0102 0103 0116 0117 0155 0452 0453 1004 1010 1012 1020 1050 1111 1127 1163 1164 1170 1172 1185 5211
0094
0007
Description Front glass Back cover Leading edge assembly Bottom edge profil Fix profil side Fix profil top Fix profil bottom left Fix profil bottom right Side I/O assembly Bottom I/O assembly Wallmount assembly V0 sheet mains inlet V0 sheet power supply LCD panel Control board WiFi sensor module RF4CE module Power supply SSB Active 3D glasses 9 LED AmbiLight 9 LED AmbiLight 9 LED AmbiLight 9 LED AmbiLight Remote control Loudspeaker combination
Remarks
Not displayed
Not displayed
Not displayed
FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9 19374_017_131210.eps 131210
2014-Jan-10 back to
div. table
Styling Sheets 11.5
QFU1.2E LA
11.
EN 226
6000 series 55"/60"
6000 series 55"/60"
Not available at time of issue
Pos No. 0007 0009 0013 0030 0056 0112 0155 0271 0453 1004 1010 1012 1020 1050 1111 1163 1164 1185 5211
Description Alu decoration frame Leading edge Back cover Leading edge assembly Leading edge cover Standplate fixing Stand assembly 3D glasses, 2 pieces V0 sheet LCD panel Control board WiFi sensor module RF4CE module Power supply SSB AmbiLight left AmbiLight right Remote control Loudspeaker combination
Remarks
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FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9 19370_071_130205.eps 130205
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div. table
Styling Sheets 11.6
QFU1.2E LA
11.
EN 227
7000 series 55"
7000 series 55"
0056
0155
1170
1171 1163 1172 1111 0013
1010 1164 0112
1050
1020 5211 1012
Pos No.
0453
0007 0013 0030 0056 0112 0155 0271 0453 1004 1010 1012 1020 1028 1050 1111 1163 1164 1170 1171 1172 1185 5211
5211
1028
0007
0030
1004
Description Alu decoration frame Back cover Leading edge assembly Leading edge cover Standplate fixing Stand assembly 3D glasses, 2 pieces V0 sheet LCD panel Control board WiFi sensor module RF4CE module Skype camera Power supply SSB AmbiLight left AmbiLight right AmbiLight top left AmbiLight top middle AmbiLight top right Remote control Loudspeaker combination
Remarks
Not displayed
Not displayed
FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9 19370_072_130205.eps 130205
2014-Jan-10 back to
div. table
Styling Sheets 11.7
QFU1.2E LA
11.
EN 228
8000 series 55"
8000 series 55" 1171 1170 1111
0056
1063
0155
5211
1172 1050
0013
1020 1164
0453
5211 1010 0112 Pos No. 0007 0013 0030 0056 0112 0155 0271 0453 1004 1010 1012 1020 1028 1050 1111 1163 1164 1170 1171 1172 1185 5211
1012
1004
1028 0030
0007
Description Alu decoration frame Back cover Leading edge assembly Leading edge cover Standplate fixing Stand assembly 3D glasses, 2 pieces V0 sheet LCD panel Control board WiFi sensor module RF4CE module Skype camera Power supply SSB AmbiLight left AmbiLight right AmbiLight top left AmbiLight top middle AmbiLight top right Remote control Loudspeaker combination
Remarks
Not displayed
Not displayed
FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9 19371_001_130404.eps 130404
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div. table
Styling Sheets 11.8
QFU1.2E LA
11.
EN 229
8000 Design series 55"
8000 Design series 55" 1170 1172 0155
1171 0116 0101
1111 0100 1163
5211
1020
0103
0117 0011 1010
1050
0453
1164
0100 1012 0102
0030 1004 Pos No. 0007 0011 0030 0094 0100 0101 0102 0103 0116 0117 0155 0452 0453 1004 1010 1012 1020 1050 1111 1127 1163 1164 1170 1171 1172 1185 5211
0094
0007
Description Front glass Back cover Leading edge assembly Bottom edge profil Fix profil side Fix profil top Fix profil bottom left Fix profil bottom right Side I/O assembly Bottom I/O assembly Wallmount assembly V0 sheet mains inlet V0 sheet power supply LCD panel Control board WiFi sensor module RF4CE module Power supply SSB Active 3D glasses 10 LED AmbiLight 10 LED AmbiLight 7 LED AmbiLight 8 LED AmbiLight 7 LED AmbiLight Remote control Loudspeaker combination
Remarks
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Not displayed
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FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9 19374_018_131210.eps 131210
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div. table
Styling Sheets 11.9
QFU1.2E LA
11.
EN 230
8000 series 60"
8000 series 60"
1111
0117
0016
1163 0115
0116
0016
0013
1164
5211
1010
1020 1012
1104
0030
19374_020_131216.eps 131220
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Styling Sheets 11.10
QFU1.2E LA
11.
EN 231
9000 series 65"
9000 series 65"
1070
1071 1073
1072
1074
1072
1075
1006
1111 1076
1xxx
1050
5211 5212
1077
1004
5220
19374_021_131223.eps 140109
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Styling Sheets 11.11
QFU1.2E LA
11.
EN 232
9000 series 84"
9000 series 84" 1006
1051
1072
1076
1074
5212
1111 1075
1174 1071
1077
1043
1050
5219 1052
5212
1073
1070
5220
1012 1004
19374_019_131212.eps 131223
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