Manual de serviço tv lg 42lb7df sb chassis lj81a

Page 1

Internal Use Only website:http://biz.LGservice.com

LCD TV SERVICE MANUAL CHASSIS : LJ81A

MODEL : 42LB7DF

42LB7DF-SB

CAUTION BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.


CONTENTS

CONTENTS .............................................................................................. 2 PRODUCT SAFETY ..................................................................................3 SPECIFICATION ........................................................................................6 ADJUSTMENT INSTRUCTION ...............................................................12 TROUBLE SHOOTING ............................................................................20 BLOCK DIAGRAM...................................................................................48 EXPLODED VIEW .................................................................................. 54 SVC. SHEET ...............................................................................................

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

-2-

LGE Internal Use Only


SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Replacement Parts List. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet.

General Guidance An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB.

Do not use a line Isolation Transformer during this check. Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.

Leakage Current Hot Check circuit Keep wires away from high voltage or high temperature parts.

AC Volt-meter Before returning the receiver to the customer, always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.

Leakage Current Cold Check(Antenna Cold Check) With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1MΩ and 5.2MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

-3-

To Instrument's exposed METALLIC PARTS

0.15uF

Good Earth Ground such as WATER PIPE, CONDUIT etc.

1.5 Kohm/10W

LGE Internal Use Only


SERVICING PRECAUTIONS CAUTION: Before servicing receivers covered by this service manual and its supplements and addenda, read and follow the SAFETY PRECAUTIONS on page 3 of this publication. NOTE: If unforeseen circumstances create conflict between the following servicing precautions and any of the safety precautions on page 3 of this publication, always follow the safety precautions. Remember: Safety First. General Servicing Precautions 1. Always unplug the receiver AC power cord from the AC power source before; a. Removing or reinstalling any component, circuit board module or any other receiver assembly. b. Disconnecting or reconnecting any receiver electrical plug or other electrical connection. c. Connecting a test substitute in parallel with an electrolytic capacitor in the receiver. CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard. 2. Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device (DVM, FETVOM, etc) equipped with a suitable high voltage probe. Do not test high voltage by "drawing an arc". 3. Do not spray chemicals on or near this receiver or any of its assemblies. 4. Unless specified otherwise in this service manual, clean electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable non-abrasive applicator; 10% (by volume) Acetone and 90% (by volume) isopropyl alcohol (90%-99% strength) CAUTION: This is a flammable mixture. Unless specified otherwise in this service manual, lubrication of contacts in not required. 5. Do not defeat any plug/socket B+ voltage interlocks with which receivers covered by this service manual might be equipped. 6. Do not apply AC power to this instrument and/or any of its electrical assemblies unless all solid-state device heat sinks are correctly installed. 7. Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead. Always remove the test receiver ground lead last. 8. Use with this receiver only the test fixtures specified in this service manual. CAUTION: Do not connect the test fixture ground strap to any heat sink in this receiver. Electrostatically Sensitive (ES) Devices Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field-effect transistors and semiconductor "chip" components. The following techniques should be used to help reduce the incidence of component damage caused by static by static electricity. 1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

unit under test. 2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly. 3. Use only a grounded-tip soldering iron to solder or unsolder ES devices. 4. Use only an anti-static type solder removal device. Some solder removal devices not classified as "anti-static" can generate electrical charges sufficient to damage ES devices. 5. Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ES devices. 6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive material). 7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions. 8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ES device.) General Soldering Guidelines 1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500ºF to 600ºF. 2. Use an appropriate gauge of RMA resin-core solder composed of 60 parts tin/40 parts lead. 3. Keep the soldering iron tip clean and well tinned. 4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25cm) brush with a metal handle. Do not use freon-propelled spray-on cleaners. 5. Use the following unsoldering technique a. Allow the soldering iron tip to reach normal temperature. (500ºF to 600ºF) b. Heat the component lead until the solder melts. c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid. CAUTION: Work quickly to avoid overheating the circuitboard printed foil. 6. Use the following soldering technique. a. Allow the soldering iron tip to reach a normal temperature (500ºF to 600ºF) b. First, hold the soldering iron tip and solder the strand against the component lead until the solder melts. c. Quickly move the soldering iron tip to the junction of the component lead and the printed circuit foil, and hold it there only until the solder flows onto and around both the component lead and the foil. CAUTION: Work quickly to avoid overheating the circuit board printed foil. d. Closely inspect the solder area and remove any excess or splashed solder with a small wire-bristle brush.

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LGE Internal Use Only


IC Remove/Replacement Some chassis circuit boards have slotted holes (oblong) through which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique as outlined in paragraphs 5 and 6 above. Removal 1. Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts. 2. Draw away the melted solder with an anti-static suction-type solder removal device (or with solder braid) before removing the IC. Replacement 1. Carefully insert the replacement IC in the circuit board. 2. Carefully bend each IC lead against the circuit foil pad and solder it. 3. Clean the soldered areas with a small wire-bristle brush. (It is not necessary to reapply acrylic coating to the areas). "Small-Signal" Discrete Transistor Removal/Replacement 1. Remove the defective transistor by clipping its leads as close as possible to the component body. 2. Bend into a "U" shape the end of each of three leads remaining on the circuit board. 3. Bend into a "U" shape the replacement transistor leads. 4. Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the "U" with long nose pliers to insure metal to metal contact then solder each connection. Power Output, Transistor Device Removal/Replacement 1. Heat and remove all solder from around the transistor leads. 2. Remove the heat sink mounting screw (if so equipped). 3. Carefully remove the transistor from the heat sink of the circuit board. 4. Insert new transistor in the circuit board. 5. Solder each transistor lead, and clip off excess lead. 6. Replace heat sink.

Circuit Board Foil Repair Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or "lift-off" the board. The following guidelines and procedures should be followed whenever this condition is encountered. At IC Connections To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board. (Use this technique only on IC connections). 1. Carefully remove the damaged copper pattern with a sharp knife. (Remove only as much copper as absolutely necessary). 2. carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern. 3. Bend a small "U" in one end of a small gauge jumper wire and carefully crimp it around the IC pin. Solder the IC connection. 4. Route the jumper wire along the path of the out-away copper pattern and let it overlap the previously scraped end of the good copper pattern. Solder the overlapped area and clip off any excess jumper wire. At Other Connections Use the following technique to repair the defective copper pattern at connections other than IC Pins. This technique involves the installation of a jumper wire on the component side of the circuit board. 1. Remove the defective copper pattern with a sharp knife. Remove at least 1/4 inch of copper, to ensure that a hazardous condition will not exist if the jumper wire opens. 2. Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly connected to the affected copper pattern. 3. Connect insulated 20-gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side. Carefully crimp and solder the connections. CAUTION: Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges.

Diode Removal/Replacement 1. Remove defective diode by clipping its leads as close as possible to diode body. 2. Bend the two remaining leads perpendicular y to the circuit board. 3. Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board. 4. Securely crimp each connection and solder it. 5. Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder. Fuse and Conventional Resistor Removal/Replacement 1. Clip each fuse or resistor lead at top of the circuit board hollow stake. 2. Securely crimp the leads of replacement component around notch at stake top. 3. Solder the connections. CAUTION: Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures. CopyrightŠ2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

-5-

LGE Internal Use Only


SPECIFICATION NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range

3. Test method

This specification is applied to LJ81A chassis. Chassis Model Name LJ81A

42LB7DF-SB

Market

Brand

Central and

LG

3.1 Performance : LGE TV test method followed 3.2 Demanded other specification Safety : UL, CSA, IEC Specification EMC : FCC, ICES, IEC

Remark

South AMEROCA

2. Requirement for Test

Model Name

Market

42LB7DF-SB

Central and

Testing for standard of each part must be followed in below condition.

Appliance Safety : IEC/EN60065

South AMEROCA EMC : CISPR13

(1) Temperature : 20 ± 5°C, CST : 40± 5°C (2) Humidity : 65% ± 10% (3) Power : Standard input voltage (100-240V~, 50/60Hz) *Standard Voltage of each products is marked by models. (4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with SBOM. (5) The receiver must be operated for about 20 minutes prior to the adjustment.

4. General Specification(TV) Model

No

Specification

1

Receiving System

1) SBTVD / NTSC / PAL-M / PAL-N

2

Available Channel

1) VHF : 02~13

Option

Remark

2) UHF : 14~69 3) DTV : 02-69 4) CATV : 01~135 3

4

Input Voltage

1) AC 100 ~ 240V 50/60Hz

Market

Central and South AMERICA

Screen Size

42 inch Wide (1366 x 768)

HD

42 inch Wide (1920 x 1080)

FULL HD

5

Aspect Ratio

16:9

6

Tuning System

FS

7

Module

LC420WU6-SLA1

8

Operating Environment

1) Temp : 0 ~ 40 deg

FULL HD

42LB7DF-SB

2) Humidity : ~ 80 % 9

Storage Environment

1) Temp : -20 ~ 60 deg 2) Humidity : ~ 85 %

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

-6-

LGE Internal Use Only


5. Chroma & Brightness No 1

Item White brightness

Min

Typ

Max

Unit

Remark

400

500

cd/m

0.638

Typ.

2

42LB7DF-SB

(Center 1-point/Full white Pattern) 2

Brightness uniformity

3

Color coordinate

80

RED

X

Typ-0.03

%

Y

0.340

GREEN

X

0.279

Y

0.611

BLUE

X

0.146

Y

0.062

X

0.272

Y

0.278

WHITE 4

Color coordinate uniformity

5

Contrast ratio Color Temperature

Typ+0.03

Full white

+0.03

N/A

Cool Standard

700:1

1000:1

7000:1

10000:1

Typ.

11000

Typ.

-1000

9300

+1000

Warm

NORMAL DCR <Test Condition> HDMI Input,

6500

85% Full white pattern

Color Distortion, DG Color Distortion, DP

43.0

Color S/N, AM/FM

-80

10.0

%

10.0

deg dB dBm

Color Killer Sensitivity

6. Component Video Input (Y, CB/PB, CR/PR) No

Resolution

H-freq(kHz)

V-freq(kHz)

Pixel clock

1

720*480

15.73

60

13.5135

SDTV ,DVD 480I

2

720*480

15.73

59.94

13.5

SDTV ,DVD 480I

3

720*480

31.47

60

27.027

SDTV 480P

4

720*480

31.47

59.94

27.0

SDTV 480P

5

1280*720

45.00

60.00

74.25

HDTV 720P

6

1280*720

44.96

59.94

74.176

HDTV 720P

7

1920*1080

33.75

60.00

74.25

HDTV 1080I

8

1920*1080

33.72

59.94

74.176

HDTV 1080I

9

1920*1080

67.500

60

148.50

HDTV 1080P

10

1920*1080

67.432

59.939

148.352

HDTV 1080P

11

1920*1080

27.000

24.000

74.25

HDTV 1080P

12

1920*1080

26.97

23.94

74.176

HDTV 1080P

13

1920*1080

33.75

30.000

74.25

HDTV 1080P

14

1920*1080

33.71

29.97

74.176

HDTV 1080P

15

1920*1080

56.25

50.000

148.5

HDTV 1080P

16

1920*1080

28.125

25.000

74.25

HDTV 1080P

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

-7-

Proposed

LGE Internal Use Only


7. RGB Input (PC) No

Resolution

H-freq(kHz)

V-freq.(Hz)

Pixel clock(MHz)

Proposed

PC

DDC

1

640*350

31.468

70.09

25.17

EGA

X

2

720*400

31.469

70.08

28.32

DOS

O

3

640*480

31.469

59.94

25.17

VESA(VGA)

O

4

640*480

37.861

72.80

31.50

VESA(VGA)

O

5

640*480

37.500

75.00

31.50

VESA(VGA)

O

6

800*600

35.156

56.25

36.00

VESA(SVGA)

O

7

800*600

37.879

60.31

40.00

VESA(SVGA)

O

8

800*600

48.077

72.18

50.00

VESA(SVGA)

O

9

800*600

46.875

75.00

49.50

VESA(SVGA)

O

10

1024*768

48.363

60.00

65.00

VESA(XGA)

O

11

1024*768

56.476

70.06

75.00

VESA(XGA)

O

12

1024*768

60.023

75.02

78.75

VESA(XGA)

O

13

1280*768

47.776

59.870

79.5

CVT(WXGA)

O

14

1280*768

60.289

74.893

102.25

CVT(WXGA)

O

15

1360*768

47.712

60.015

85.50

VESA (WXGA)

O

16

1280*1024

63.981

60.020

108.00

VESA (SXGA)

O

17

1280*1024

79.976

75.025

135

VESA (SXGA)

O

18

1600*1200

75.00

60.00

162

VESA (UXGA)

O

19

1920*1080

67.5

60

148.5

HDTV 1080P

O

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

-8-

LGE Internal Use Only


8. HDMI Input (PC/DTV) No

Resolution

H-freq(kHz)

V-freq.(Hz)

Pixel clock(MHz)

Proposed

PC

DDC

1

640*350

31.468

70.09

25.17

EGA

X

2

720*400

31.469

70.08

28.32

DOS

O

3

640*480

31.469

59.94

25.17

VESA(VGA)

O

4

640*480

37.861

72.80

31.50

VESA(VGA)

O

5

640*480

37.500

75.00

31.50

VESA(VGA)

O

6

800*600

35.156

56.25

36.00

VESA(SVGA)

O

7

800*600

37.879

60.31

40.00

VESA(SVGA)

O

8

800*600

48.077

72.18

50.00

VESA(SVGA)

O

9

800*600

46.875

75.00

49.50

VESA(SVGA)

O

10

1024*768

48.363

60.00

65.00

VESA(XGA)

O

11

1024*768

56.476

70.06

75.00

VESA(XGA)

O

12

1024*768

60.023

75.02

78.75

VESA(XGA)

O

13

1280*768

47.776

59.870

79.5

CVT(WXGA)

O

14

1360*768

47.712

60.015

85.50

VESA (WXGA)

O

15

1280*1024

63.981

60.020

108.00

VESA (SXGA)

O

16

1280*1024

79.976

75.025

135

VESA (SXGA)

O

17

1600*1200

75.00

60.00

162

VESA (UXGA)

O

1920*1080

67.5

60

148.5

HDTV 1080P

O

18

DTV 1

720*480

31.47

60

27.027

SDTV 480P

2

720*480

31.47

59.94

27.00

SDTV 480P

3

1280*720

45.00

60.00

74.25

HDTV 720P

4

1280*720

44.96

59.94

74.176

HDTV 720P

5

1920*1080

33.75

60.00

74.25

HDTV 1080I

6

1920*1080

33.72

59.94

74.176

HDTV 1080I

7

1920*1080

67.500

60

148.50

HDTV 1080P

8

1920*1080

67.432

59.939

148.352

HDTV 1080P

9

1920*1080

27.000

24.000

74.25

HDTV 1080P

10

1920*1080

26.97

23.94

74.176

HDTV 1080P

11

1920*1080

33.75

30.000

74.25

HDTV 1080P

12

1920*1080

33.71

29.97

74.176

HDTV 1080P

13

1920*1080

56.25

50.000

148.5

HDTV 1080P

14

1920*1080

28.125

25.000

74.25

HDTV 1080P

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

-9-

LGE Internal Use Only


9. General specifications (module) No

Item

Value

Unit

Remark 42.02 inches

1

Active Screen Size

1067.31 (diagonal)

mm

2

Outline Dimension

983(H)x576(V)x47.3(D)

mm

3

Pixel Pitch

0.4845 x 0.4845

um

4

Pixel Format

1920(H)x1080(V) RGB stripe arrangement

5

Color Depth

8bit 16.7

6

Luminance ,White

500 (center 1 point typ)

cd/m2

7

Viewing Angle (CR>10)

R/L 178(Typ),U/D 178(Typ)

degree

8

Power Consumption

168.36

Mbit

Watt

9

Weight

11(Typ), 12(Max)

10

Display Operating Mode

Transmissive mode ,normally black

kg

11

Surface Treatment

Hard coating (3H)

10. Electro Optical Characteristic Specifications (module standard) No

Item

Min

Typ

CR

800

1000

400

500

1

Contrast Ratio

2

Surface Luminance, White

3

Luminance Variation

4

Response Time

Gray to Gray

5

Color coordinate

RED

Max

Unit

Remark

CR with DCR 1.3 5

Rise+decay

GREEN BLUE WHITE 6

7

Viewing Angle (CR>10)

Gray Scale

Cd/m2 8

10

14

X

Typ

TBD

Typ

Y

-0.03

TBD

+0.03

X

TBD

Y

TBD

X

TBD

Y

TBD

X

TBD

Y

TBD

X axis right(ø=0)

89

X axis left(ø=180)

89

Yaxis up (ø=90)

89

Z axis down(ø=270)

89

Without DCR

Full white (•‰ white/5P)

msec Full Pattern

degree

2.2

With DCR

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 10 -

LGE Internal Use Only


12. Customer Menu Setup (Shipment Condition) No

Item

Condition

1

Input Mode

TV02CH

2

Volume Level

20

3

Mute

Off

4

Aspect Ratio

5

Video

Remark

16:9 EZ Picture

Daylight

Color temperature

(Disable)

XD

Auto

Advanced

Cinema: Off

Can be access only EZ picture is setting user mode

Reset 6

7

8

9

10

Audio

Timer

Option

Lock

Audio Language

Off

EZ SoundRite

Off

EZ Sound

Normal

Balance

0

Treble

50

Bass

50

Front Surround

Off

TV Speaker

On

Auto clock

Off

Manual Clock

Off

Off Timer

Off

On Timer

Off

Auto Off

Off

Aspect Ratio

16:9

Caption/Text

Off

Caption Option

Off

Language

English

ISM Method

Normal

SET ID

1

Lock System

Off

Set password

On

Block channel

None

Movie Rating

Off

TV Rating-Children

Off

TV Rating-General

Off

Audio Block

Off

Channel Memory

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

( Default : 0000 )

none

- 11 -

LGE Internal Use Only


ADJUSTMENT INSTRUCTION 1. Application Range

4.PCB Assembly Adjustment

This spec sheet is applied all of the 'LJ81A' Chassis.

4-1. CPLD DOWNLOAD - JTAG MODE

2. Specification (1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. (2) Adjustment must be done in the correct order. (3) The adjustment must be performed in the circumstance of 25±5°C of temperature and 65±10% of relative humidity if there is no specific designation. (4) The input voltage of the receiver must keep 100-220V~, 50/60Hz. (5) The receiver must be operated for about 5 minutes prior to the adjustment. O After RGB 100% Full White pattern(06CH) then process Heat-run(or “8.Test patter” condition of EZ-Adjust status). O Enter into HEAT-RUN MODE 1) Press the POWER ON KEY on R/C for adjustment. 2) Press ADJ button of Service remocon. Select “10.Test pattern” and, after select “White” using navigation button, and then you can see 100% Full White pattern. 3) In this status you can maintain Heat-Run useless any pattern generator. * Notice! If you maintain one picture over 20minute(Especially sharp distinction black with white pattern-13Ch, or Cross hatch pattern09Ch) then it can appear image stick near black level.

(1) <<PRINT PORT>> PIN MAP Component

JTAG Mode Signal Name

2

TCK

3

TMS

8

TDI

11

TDO

13

-

15

VCC

18 to 25

GND

3. Adjustment items 3-1. PCB Assembly adjustment O O O

CPLD DOWNLOAD Adjust 480i Comp1 Adjust 1080p Comp1 / RGB - If it necessary, it can adjustment at Manufacture Line. - You can see set adjustment status at “9.ADJUST CHECK” of the “In-start menu”.

3-2. Set Assembly Adjustment O

EDID(The Extended Display Identification Data) / DDC(Display Data Channel) download O Color Temperature(White Balance) Adjustment O Make sure RS-232C control O Selection Factory output option

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 12 -

LGE Internal Use Only


(2) <<10P WAFER>> PIN MAP

(3) Circuit Board Header Connection - The ByteBlasterMV 10-pin female plug connects to a 10pin male header on the circuit board. The 10-pin male header has two rows of five pins, which are connected to the device’s programming or configuration pins. - The ByteBlasterMV cable receives power and downloads data via the male header. Fig.1 shows the dimensions of a typical 10-pin male header.

Dimenstions are shown in inches. The spacing between pin centers is 0.1 inch.

0.425 Typ.

Color Strip

Dimensions are shown in incles. Top View\\\\ 0.100\\

0.250 Typ.

0.100 Sq.

Side View 0.100\ 0.025 Sq.

0.025 Sq.

0.235

0.700 Typ.

1) Table 2. Identifies the 10-pin female plug’s pin names for the corresponding download mode. Table2. ByteBlasterMV Female Plug;s Pin Names & Download Models PS Mode

Pin

Singal Name

Description

Singal Name

Description

DCLK

Clock singnal

TCK

Clock singnal

2

GND

Signal ground

GND

Signal ground

3

CONF_DONE

Configuration

TDO

Data to device

1

(Fig.1) 10-Pin Male Header Dimensions

JTAG Mode

control 4

VCC

Power supply

VCC

Power supply

5

nCONFIG

Configuration

TMS

JTAG state

control

machine control

6

-

No connect

-

No connect

7

nSTATUS

Configuration

-

No connect

1) Table 3. Through 5 summarize the absolute maximum ratings, recommended operating conditions, and DC operating conditions for the ByteBlasterMV cable. Table 3. ByteBlasterMV Cable Absolute Maximum Ratings Symbol

Parameter

Vcc

Supply voltage

With respect ot ground -0.5

7.0

V

VI

DC input voltage

With respect ot ground -0.5

7.0

V

-

No connect

9

DATA0

10

GND

-

No connect

Data to device

TDI

Data to device

Signal ground

GND

Signal ground

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

Min Max Unit

Table 4. ByteBlasterMV Calbe Recommended Operating Conditions Symbol

Parameter

Vcc

Supply voltage 5.0-V Operation

4.5

5.5

V

Supply voltage 3.3-V Operation

3.0

3.6

V

status 8

Conditions

- 13 -

Conditions

Min Max Unit

LGE Internal Use Only


(4) Real-Time ISP with the Quartus II Software. 1) The programming file formats generated by the Quartus II software that support these two features are the Programmer Object File(.pof) that is used with the Quartus II programmer, and the Jam File(.jam) and Jam Byte-Code File(.jbc) that are used with either the Quartus II programmer or other programming tools. 2) Ensure that you enable this feature before programming a MAX II device through the Quartus II programmer. You can enable the real-time ISP feature by selecting the Enable real-time ISP to allow background programming(for MAX II devices) option from the Quartus II programmer window. Refer Fig.2.

(Fig.2) Real-Time ISP Option in the Quartus II Programmer Window 3) You can also enable the real-time ISP feature in the Quartus II software through the following steps: 1. Choose Options(Tool menu). 2. Choose Programmer under the Category section.

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 14 -

(5) MAX II Device Handbook, Volume1. - To configure or program one or more devices with the ByteBlasterMV cable and the Quartus II programmer. 1) Compile a project. The Quartus II compiler generates a .sof file to configure APEX II, APEX 20K, Mercury, and Excalibur devices. To program an EPC configuration device, a .pof or JAM STAPL format file should be used. 2) Attach the ByteBlasterMV cable to a parallel port on a PC and insert the 10-pin female plug into the prototype system containing the target device. The board must supply power to the ByteBlasterMV cable. - For the Windows Nt operating system, a driver must be installed before using the ByteBlasterMV cable, go to the “ByteBlasterMV and MasterBlaster Installation” section in the Quartus II. 3) Open the Quartus II programmer by selecting Open Programmer from the (Processing Menu). Choose Setup... in the Programming Hardware section. Specify the ByteBlasterMV cable and the appropriate LPT port. Please see “Changing Setup” under the ByteBlasterMV cable in the Quartus II software Help menu for more information. 4) Select either passive serial or JTAG programming mode and then add the files and/or devices you want to program or configure using the add file.. or add device... buttons to create a chain description file(.cdf). - The programmer has two programming modes “ passive serial and JTAG, In passive mode, you select which SOFs to include in the device chain. In JTAG mode, you add specific devices and configuration devices to the device chain, in addition to POFs and SOFs, and you have several programming options for each configuration device in the chain. In JTAG mode, you can verify an EPC configuration device’s contents against its programming file data, check that a device is blank, examine a programmed device and save its data to file, or use its data to program or verify another configuration device. 5) Choose the start button in the Quartus II software to program or configure the device(s). The ByteBlasterMV cable downloads the data from the SOF and/or POF file(s) into the device(s).

LGE Internal Use Only


4-2. Using RS-232C Orher

Command Set response

Inter the Adjustment ad 00 00

d 00 OK00x

Mode Change the Source kb 00 04

b 00 00 OK04x(Adjust 480i comp1)

Start Adjustment

kb 00 06

b 00 OK06x(Adjust 1080p comp1/RGB)

Return the

ad 00 10

Response

<Fig.3> Adjustment pattern : 480i/1080p 60Hz Pattern OKx(Success condition)

5-4. Adjustment method 480i Comp1, Adjust 1080p Comp1/RGB

NGx(Failed condition) Read Adjustment

(main)

(main)

data

ad 00 20

000000000000000000000000007c007b006dx

(sub)

(Sub)

ad 00 21

000000070000000000000000007c00830077x

Confirm Adjustment ad 00 99

NG 03 00x (Failed condition) NG 03 01x (Failed condition) NG 03 02x (Failed condition) OK 03 03x (Success condition)

End of Adjustment

ad 00 90

d 00 OK90x

* See ADC Adjstment RS-232C Protocol_Ver1.0 O Necessary items before Adjustmment items - Pattern Generator : MSPG-925FA - Adjust 480i Comp1 (MSPG-925A : model-209, pattern-65) - Adjust 1080p Comp1/RGB (MSPG-925FA : Model-225, pattern-65) * If you want more information then see the below Adjsutment method(Factory Adjustment) O

Adjustment sequence - ad 00 00 : Enter the ADC Adjustment mode. - kb 00 04 : Change the mode to Component(No actions) - ad 00 10 : Adjust 480i Comp1. (Change the mode and adjustment action) - kb 00 06 : Change to RGB-DTV mode(No action) - ad 00 10 : Adjust 1080p Comp1/RGB. (Change the mode and adjustment action) - ad 00 90 : End of the adjustment.

* Factory Adjustment

5. Auto Adjust Component 480i/1080p RGB 1080p 5-2. Summary

(1) ADC 480i Component1 adjustment. - Check connection of Component1 - MSPG-925FA -> Model : 209, Pattern : 65 1) Set Component 480i mode and 100% Horizontal Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to “NORMAL” 2) After get the signal, wait more a second and enter the “Ez-Adjust” with press ADJ key of Service remocon. After then select “3.ADC 480i Comp1” with navigator button and press “Enter”. It is automatically adjustment. 3) You can see “ADC Component1 Success” message after Adjustment success. 4) Error Messages: When its adjustment is not correct, “ADC Component1 480i Fail” message displayed. If component is not connection “Component1 Not Connected”, its format is not 480i then “Not Valid Format”, its signal don’t out then “Check Signal Status” message displayed. These messages will be displayed just a second. (2) ADC 1080p Component1 / RGB adjustment - Check connection both of Component1 and RGB - MSPG-925FA -> Model: 225, Pattern:65 1) Set Component 1080p mode and 100% Horizontal Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to “NORMAL” 2) If adjustment is correctly finished, “ADC Component1 Success” message will be displayed. But adjustment is not correctly finished, “ADC Component1 1080p Fail” message will be displayed. 3) After adjustment Component1 mode, move to RGB-DTV mode automatically and RGB adjustment start. After RGB Adjustment successfully finished, “ADC RGB 1080P Success” message will be displayed. 4) If Adjustment doesn’t success, check conditions all of the adjustment condition and adjustment again. See “Error Messages” sentence. 5) After adjustment finished, press “ADJ” key and exit from Adjustment mode.

- Adjustment component 480i/1080i and RGB 1080p is Gain and Black level setting at Analog to Digital converter, and compensate the RGB deviation

5-3. Using in strument - Adjustment remocon, 801GF(802B, 802F, 802R) or MSPG925FA pattern generator.(It can output 480i/1080i horizontal 100% color bar pattern signal, and its output level must setting 0.7V±0.1V p-p correctly) * You must make it sure its resolution and pattern cause every instrument can have different setting.

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 15 -

LGE Internal Use Only


6. EDID (The Extended Display Identification Data)/ DDC (Display Data Channel) Download.

(2) HDMI-2 EDID table

6-1. Summary (1) It is established in VESA, for communication between PC and Monitor without order from user for building user condition. It helps to make easily use realize “Plug and Play” function. (2) For EDID data write, we use DDC2B protocol.

6-2. Write HDMI EDID data (1) Using instruments 1) Jig.(PC Serial to D-Sub connection) for PC, DDC adjustment. 2) S/W for DDC recording (EDID data write and read) 3) D-sub jack 4) Additional HDMI cable connection Jig. (2) Preparing and setting. 1) Set instruments and Jig. Like pic.5), then turn on PC and Jig. 2) Operate DDC write S/W (EDID write & read) 3) It will operate in the DOS mode.

(3) HDMI-3 EDID table

LCD TV SET (or Digital Board)

<Fig.4> For write EDID data, setting Jig and another instruments

6-3. EDID data (Model name = LG TV) (1) HDMI-1 EDID table

(4) Analog(RGB) EDID table

* See Working Guide if you want more information about EDID communication.

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 16 -

LGE Internal Use Only


7. Adjustment Color Temperature (White Balance)

A

RS-232C Command

Meaning

[CMD

ID

DATA]

wb

00

00

Start white balance adjustment

wb

00

10

Start Gain adjustment(Internal white pattern)

wb

00

1f

End Gain adjustment

wb

00

20

Start Offset adjustment (Internal white pattern)

wb

00

2f

End Offset adjustment

wb

00

ff

End white Balance adjustment (Internal pattern disappear)

7-1. Using Instrucments (1) Color Analyzer: CA-210 (CH 9) - Using LCD color temperature, Color Analyzer (CA-210) must use CH 9, which Matrix compensated (White, Red, Green, Blue compensation) with CS-2100. See the Coordination bellowed one. (2) Auto-adjustment Equipment (It needs when Autoadjustment - It is availed communicate with RS-232C : Baud rate: 115200) (3) Video Signal Generator MSPG-925F 720p, 216Gray (Model: 217, Pattern 78)

- Wb 00 00 Start Auto-adjustment of white balance - Wb 00 10 Start Gain adjustment (Inner pattern) - Jb 00 c0 -… - Wb 00 1f End of Adjustment * If it needs, offset adjustment(wb 00 20-Start, wb 00 2f-End) - Wb 00 ff End of white balance adjustment (Inner pattern disappear)

7-2. Connection Diagram(Auto Adjusment) (1) Using Inner Pattern

Full White Pattern (Inner pattern)

RS-232C Command(Commonly apply)

* Notice! Adjustment Mapping information.

Color Analyer

RS-232C COMMAND [CMD ID DATA]

RS-232C

(2) Using HDMI input Color Analyer

216Gray White Pattern (HDMI Pattern)

MSPG-925FS Video ideo Signal Generator Model : 217 Pattern : 78

RS-232C Baud Rate : 1115200 15200

<Fig. 5> Connection diagram for Adjusment White balance

7-2. White Balance Adjusment (1) If you can’t adjust with inner pattern, then you can adjust it using HDMI pattern. You can select option at “Ez-Adjust Menu - 7. White Balance” there items “NONE, INNER, HDMI”. It is normally setting at inner basically. If you can’t adjust using inner pattern you can select HDMI item, and you can adjust. (2) In manual Adjust case, if you press ADJ button of service remocon, and enter “Ez-Adjust Menu - 7. White Balance”, then automatically inner pattern operates. (In case of “Inner” originally “Inner” will be selected. 1) Connect all cables and equipments like Pic.5) 2) Set Baud Rate of RS-232C to 115200. It may set 115200 orignally. 3) Connect RS-232C cable to set 4) Connect HDMI cable to set 5) Select LA75A Chassis at Adjustment equipment, and adjust.

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 17 -

Cool

Mid

Warm

R Gain

jg

ja

jd

G Gain

jh

jb

B Gain

ji

jc

CENTER (DEFAULT)

Min

Max

Cool

Mid

Warm

00

184

192

192

192

je

00

187

183

159

192

jf

00

192

161

95

192

R Cut

64

64

64

127

G Cut

64

64

64

127

B Cut

64

64

64

127

- When Color temperature (White balance) Adjustment. (Automatically) 1) Press “Power only key” of service remocon and operatie automatically adjustment. 2) Set BaudRate to 115200. - You must start “wb 00 00” and finish it “wb 00 ff”. - If it needs, then adjustment “Offset”.

LGE Internal Use Only


7-3. White Balance Adjusment (Manual adjustment)

8. GND and ESD Testing

(1) Test Equipment: CA-210 1) Using LCD color temperature, Color Analyzer (CA-210) must use CH 9, which Matrix compensated (White, Red, Green, Blue compensation) with CS-2100. See the Coordination bellowed one. (2) Manual adjustment sequence is like bellowed one. 1) Turn to “Ez-Adjust” mode with press ADJ button of service remocon. 2) Select “10.Test Pattern” with CH+/- button and press enter. Then set will go on Heat-run mode. Over 30 minutes set let on Heat-run mode. 3) Let CA-210 to zero calibration and must has gap more 10cm from center of LCD module when adjustment. 4) Press “ADJ” button of service remocon and select “7.White-Balance” in “Ez-Adjust” then press “ G” button of navigation key. (When press “ G” button then set will go to full white mode) 5) Adjust at three mode (Cool, Medium, Warm) 6) If “Medium” and “Warm” mode. - Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment. 7) With volume button (+/-) you can adjust. 8) After all adjustment finished, with Enter ( A key) turn to Ez-Adjust mode. Then with ADJ button, exit from adjustment mode.

8-1. Prepare GND and ESD Testing - Check the connection between set and power cord.

8-2. Operate GND and ESD auto-test (1) Fully connectd(Between set and power cord) set enter the Auto-test sequence. (2) Connect D-Jack AV jack test equipment. (3) Turn on Auto-controller(GWS103-4) (4) Start Auto GND test. (5) If its result is NG, then notice with buzzer. (6) If its result is OK, then automatically it turns to ESD Test. (7) Operate ESD test (8) If its result is NG, then notice with buzzer. (9) If its result is OK, then process next steps. Notice it with Good lamp and STOPER Down.

8-3. Check Items

(3) Using CS-1000 Equipment. Color Temperature

Remark

COOL

T=11000K, ∆uv=0.000, X=0.276, Y=0.283

MEDIUM

T= 9300K, ∆uv=0.000, X=0.285, Y=0.293

WARM

T= 6500K, ∆uv=0.000, X=0.313, Y=0.329

(1) TEst Voltage 1) GND : 1.5KV/min at 100mA 2) Signal : 3KV/min at 100mA (2) Test time : just 1 second. (3) Test point 1) GND test: Test between Power cord GND and Signal cable metal GND. 2) ESD test: Test between Power cord GND and Live and neutral. (4) Leakage current: Set to 0.5mA(rms)

(4) Using CS-210 Equipment.(9CH) - Contrast value : 216Gray Color temperature Color analyzer

Color coordinate X

Y

COOL

CA-210

0.276±0.002

0.283±0.002

MEDIUM

CA-210

0.285±0.002

0.293±0.002

WARM

CA-210

0.313±0.002

0.329±0.002

7-4. Test of RS-232C control - Press In-Start button of Service Remocon then set the “4.Baud Rate” to 115200. Then check RS-232C control.

7-5. Selection of Country option - Selection of country option is allowed only North American model (Not allowed Korean model). It is selection of Country about Rating and Time Zone. (1) Models: All models which use LA75A Chassis (See the first page.) (2) Press “In-Start” button of Service Remocon, then enter the “Option” Menu with “PIP CH-” Button. (3) Select one of these three (USA, CANADA, MEXICO) defends on its market using “Vol. +/-” button.

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 18 -

LGE Internal Use Only


9. Default Service option

10. Default Service option No

Item

1 Input Mode

TV02CH

2 Volume Level

10

3 Mute

Off

4 Aspect Ratio

16:9

5 Picture Picture Mode

Vivid

User1

9-1. ADC-Set (1) R-Gain adjustment Value (default 128) (2) G-Gain adjustment Value (default 128) (3) B-Gain adjustment Value (default 128) (4) R-Offset adjustment Value (default 64 ) (5) G-Offset adjustment Value (default 64 ) (6) B-Offset adjustment Value (default 64 )

Back Light

100

Contrast

100

Bright

50

Sharpness

70

Color

70

Tint

0

Color Temperature

Medium

Picture Reset 6 Audio

9-2. White balance. Value CENTER(DEFAULT) Max Cool

Mid

Warm

R Gain

184

192

192

192

G Gain

189

184

150

192

B Gain

192

161

84

192

R Cut

64

64

64

127

G Cut

64

64

64

127

B Cut

64

64

64

127

7 Time

Sound Mode

Standard

Auto Volume

Off

Clear Voice

Off

Front Surrround

Off

Balance

0

TV Speaker

On

Clock

Auto

Off Timer / On Timer

Off

Sleep Timer / Auto Off 8 Option Language(Menu/Audio) Portugues

9-3. Temperature Threshold (1) Threshold Down Low (2) Threshold Up Low (3) Threshold Down High (4) Threshold Down High

Condition

20 23 70 75

SimpLink

On

Key Lock

Off

Caption

Off

Set ID

1

9 Channel Memory

RF : 2,3,4,5,6,7,8,9,10,11, 12,13,14,30,51,63 CATV : 15,16,17

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 19 -

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 20 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF

L/R

R/G/B

(AMP)

MC33078

L/R

Y/Cb/Cr

CVBS/Y/C

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out (Coaxial) SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom)

24C16

HSX Serial TP

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

KIA7029

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

TC90512

CVBS/Y/C

Analog /Digital Tuner

NIM TUNER

I2C

DDR1 (64MB)

NVRAM

TROUBLESHOOTING

1. Power-Up Boot Fail 1-1. Block Diagram of Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 21 -

Replace IC101 Flash Memory

Y

Check R154 Clock 33MHz

Y

Check X200 Clock 54MHz

Y

Check C830, C853, C856 Voltage Level 1.2V

Y

Check IC803 #5 Pin / L807 Voltage Level 2.6V

Y

Check IC804 #2 Pin / L805 Voltage Level 3.3V

Y

Check P800, P801 All Voltage Level (19V, 12V, 6V, 3.3V)

N

N

N

N

N

N

Maybe BCM3553 has troubles.

Replace X200

Replace IC802 or IC805 & Recheck

Replace IC803 or L807 & Recheck

Replace IC804 / L805 & Recheck

Check Power connector OK ?

N

N

N

Y

Check Micom IC407 Redownload or replace

Replace Power board

TROUBLESHOOTING

1. Power-Up Boot Fail 1-2. Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 22 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF

L/R

R/G/B

(AMP)

MC33078

L/R

Y/Cb/Cr

CVBS/Y/C

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

SPDIF Out (Coaxial)

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom)

24C16

HSX Serial TP

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

KIA7029

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

TC90512

CVBS/Y/C

Analog /Digital Tuner

NIM TUNER

I2C

DDR1 (64MB)

NVRAM

TROUBLESHOOTING

2. No OSD

2-1. Block Diagram of Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 23 -

Check PDP/LCD Module Control board

Y

Check LVDS Cable

Y

Check P903 #33(TXAC-) , #32(TXAC+) , #17(TXBC-) , #16(TXBC+)

Y

Check L901 Voltage Level 12V

Y

Check D901 Pin #1 Voltage Level 12V

N

N

N

N

Replace Cable

Maybe BCM3553 has problems

Replace L901

Check Power connector Y Replace Power board

TROUBLESHOOTING

2. Power-Up Boot Fail 2-2. Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 24 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF

L/R

R/G/B

(AMP)

MC33078

L/R

Y/Cb/Cr

CVBS/Y/C

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

SPDIF Out (Coaxial)

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom)

24C16

HSX Serial TP

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

KIA7029

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

TC90512

CVBS/Y/C

Analog /Digital Tuner

NIM TUNER

I2C

DDR1 (64MB)

NVRAM

TROUBLESHOOTING

3. Digital TV Video

3-1. Block Diagram of Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 25 -

Y

Check PLD Clock, Hsync, Vsync R1102 (Typ. 74.25MHz), R1100, R1101

Y

Check BCM7412 Clock,Hsync, Vsync R1088 (Typ. 74.25MHz), R1087, R1086

Y

Check BCM3553 Output TP Clock, Data, Sync R153, R155, R152

Y

Check TP Clock, Data, Sync R925 (38.1MHz), R804, R803

None

Check D805 color

Y

Check Tuner 5V Power IC810 #3 Pin

Y

Check RF Cable

N

N

N

N

red

N

Redownload PLD file or replace

Maybe BCM7412(IC1000) has problems

Maybe BCM3553(IC100) has problems

Maybe Tuner(TU800) has problems

Bad Tuner. Replace Tuner.

Replace IC810

Maybe BCM3553(IC100) has problems

Y

Check BCM7412 Input Clock R107 (27MHz)

N Replace it

TROUBLESHOOTING

3. Digital TV Video

3-2. Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 26 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF

L/R

R/G/B

(AMP)

MC33078

L/R

Y/Cb/Cr

CVBS/Y/C

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

TP

SPDIF Out (Coaxial)

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom )

24C16

HSX Serial

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

KIA7029

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

TC90512

CVBS/Y/C

Analog /Digital Tuner

NIM TUNER

I2C

DDR1 (64MB)

NVRAM

TROUBLESHOOTING

4. Analog TV Video 4-1. Block Diagram of Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 27 -

Maybe BCM3553(IC100) has problems

Y

Check CVBS signal C658

Y

Check CVBS signal IC808 #8 Pin

Y

Check CVBS signal TU800 #17 Pin

Y

Check Tuner 5V Power IC810 #3 Pin

Y

Check RF Cable

N

N

N

N

Replace it

Replace IC808 or check L800 5V power

Maybe Tuner(TU800) has problems

Replace it

TROUBLESHOOTING

4. Analog TV Video 4-2. Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 28 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF

L/R

R/G/B

(AMP)

MC33078

L/R

Y/Cb/Cr

CVBS/Y/C

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out (Coaxial) SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom)

24C16

HSX Serial TP

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

KIA7029

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

TC90512

CVBS/Y/C

Analog /Digital Tuner

NIM TUNER

I2C

DDR1 (64MB)

NVRAM

TROUBLESHOOTING

5. Component Video 5-1. Block Diagram of Troubleshooting

LGE Internal Use Only


CopyrightŠ2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 29 -

Maybe BCM3553(IC100) has problems

Y

Check signal C638, C639, C640 / C628, C629, C630

Y

Check signal L700, L701. L702 / L704, L705, L706

Y

Check J700 / J702

Y

Check Component Cable

Y

Check signal format Is it supported?

N

N

N

Replace it

Replace it.

Replace connector

TROUBLESHOOTING

5. Component Video 5-2. Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 30 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF

L/R

R/G/B

(AMP)

MC33078

L/R

Y/Cb/Cr

CVBS/Y/C

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

SPDIF Out (Coaxial)

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom)

24C16

HSX Serial TP

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

KIA7029

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

TC90512

CVBS/Y/C

Analog /Digital Tuner

NIM TUNER

I2C

DDR1 (64MB)

NVRAM

TROUBLESHOOTING

6. RGB Video

6.1 Block Diagram of Troubleshooting

LGE Internal Use Only


CopyrightŠ2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 31 -

Maybe BCM3553(IC100) has problems

Y

Check Signal C635, C636, C637

Y

Check L708 Voltage Level 9V

Y

Check signal R727, R714, R729

Y

Check signal,Hsync, Vsync C745, C746, C747, R839, R843

Y

Check P701

Y

Check RGB Cable

Y

Check signal format Is it supported?

N

N

N

N

N

Replace it

Replace L708 / Q701 / Q702 / Q703

Replace it

Replace it.

Replace connector

TROUBLESHOOTING

6. RGB Video

6.2 Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 32 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF CVBS/Y/C

L/R

R/G/B

(AMP)

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

SPDIF Out (Coaxial)

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom)

24C16

HSX Serial TP

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

KIA7029

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

MC33078

L/R

Y/Cb/Cr

NIM TUNER TC90512

CVBS/Y/C

Analog /Digital Tuner

I2C

DDR1 (64MB)

NVRAM

TROUBLESHOOTING

7. AV Video

7-1. Block Diagram of Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 33 -

Maybe BCM3553(IC100) has problems

Y

Check signal C651 (Composite), C648 / C649 (S-Video) (Rear) C652 (Composite), C659 / C660 (S-Video) (Rear)

Y

Check signal R755 (Composite), R814 / R815 (S-Video) (Rear) R855 (Composite), R856 / R857 (S-Video) (Side)

Y

Check J701 (Rear) Check P700 & Cable (Side)

Y

Check AV Cable / S-Video Cable

Y

Check signal format Is it supported?

N

N

N

Replace it

Replace it.

Replace connector

TROUBLESHOOTING

7. AV Video

7-2. Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 34 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF

L/R

R/G/B

(AMP)

MC33078

L/R

Y/Cb/Cr

CVBS/Y/C

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

SPDIF Out (Coaxial)

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom)

24C16

HSX Serial TP

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

KIA7029

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

TC90512

CVBS/Y/C

Analog /Digital Tuner

NIM TUNER

I2C

DDR1 (64MB)

NVRAM

TROUBLESHOOTING

8. HDMI Video

8-1. Block Diagram of Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 35 -

Y

Check IC601 Clock Signal #26, #27

Y

Check HDCP Key NVRAM (IC102) Power & I2C Signal (#5, #6)

Y

Check EDID NVRAM (IC602, 603, 604) Power & I2C Signal (#5, #6)

Y

Check L607 Voltage Level 3.3V

Y

Check IC809 #2 Pin Voltage Level 3.3V

Y

Check J600 / J601 / J602

Y

Check HDMI Cable

Y

Check signal format Is it supported?

N

N

N

N

N

N

Replace it

Replace it

Replace it orredownload

Replace it

Replace it

Replace connector

Maybe BCM3553(IC100) has problems

TROUBLESHOOTING

8. HDMI Video

8-2. Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 36 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF

L/R

R/G/B

(AMP)

MC33078

L/R

Y/Cb/Cr

CVBS/Y/C

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

TP

SPDIF Out (Coaxial)

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom)

24C16

HSX Serial

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

KIA7029

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

TC90512

CVBS/Y/C

Analog /Digital Tuner

NIM TUNER

I2C

DDR1 (64MB)

NVRAM

TROUBLESHOOTING

9. All Source Audio 9-1. Block Diagram of Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 37 -

Maybe NTP3000 has problems. Replace it

Y

Check speaker

Y

Check Connector P500

Y

Check Signal L508, L509, L510, L511

Y

Check Signal L504, L505

Y

Check IC501 Power 19V, 3.3V, 1.8V L500, L501, L502, L503

Y

Check BCM3553 I2S Output R627, R628, R629

Y

Make sure you can’t hear any audio

N

N

N

N

N

N

Replace speaker

Replace connector

Replace it

Replace it.

Replace L

Replace it.

TROUBLESHOOTING

9. All Source Video 9-2. Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 38 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF CVBS/Y/C

L/R

R/G/B

(AMP)

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

SPDIF Out (Coaxial)

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom)

24C16

HSX Serial TP

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

KIA7029

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

MC33078

L/R

Y/Cb/Cr

NIM TUNER TC90512

CVBS/Y/C

Analog /Digital Tuner

I2C

DDR1 (64MB)

NVRAM

TROUBLESHOOTING

10. Digital TV Audio 10-1. Block Diagram of Troubleshooting

LGE Internal Use Only


TROUBLESHOOTING 10. Digital TV Audio

N Follow procedure All source audio trouble shooting

Y

Check video output

N

Follow procedure digital TV video trouble shooting

Maybe BCM3553 internal audio DSP has problems. Replace it

10-2. Troubleshooting

CopyrightŠ2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 39 -

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 40 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF CVBS/Y/C

L/R

R/G/B

(AMP)

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

SPDIF Out (Coaxial)

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom)

24C16

HSX Serial TP

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

MC33078

L/R

Y/Cb/Cr

NIM TUNER TC90512

CVBS/Y/C

Analog /Digital Tuner

KIA7029

I2C

DDR1 (64MB)

NVRAM

TROUBLESHOOTING

11. Analog TV Audio 11-1. Block Diagram of Troubleshooting

LGE Internal Use Only


CopyrightŠ2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

Follow procedure All source audio trouble shooting

Y

Check SIF signal R726 / C665

Y

Check SIF signal C801 / C806 / Q800

Y

Check L801 voltage level 5V

Y

Check video output

N

N

N

N

N

Maybe BCM3553 audio block has problems. Replace it

Replace it

Replace it

Replace it

Follow procedure analog TV video trouble shooting

TROUBLESHOOTING

11. Analog TV Video 11-2. Troubleshooting

- 41 -

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 42 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF

L/R

R/G/B

(AMP)

MC33078

L/R

Y/Cb/Cr

CVBS/Y/C

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

TP

SPDIF Out (Coaxial)

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom)

24C16

HSX Serial

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

KIA7029

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

TC90512

CVBS/Y/C

Analog /Digital Tuner

NIM TUNER

I2C

DDR1 (64MB)

NVRAM

TROUBLESHOOTING

12. Component / RGB / AV Audio 12-1. Block Diagram of Troubleshooting

LGE Internal Use Only


CopyrightŠ2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 43 -

Y

Check IC503 power L513 voltage level 9V

Y

Check signal R532 / R533 / C555 / R568 / C563 / R582

Y

Check IC500 power L512 voltage level 9V

Y

Check signal C734 / R746 / C735 / R752 (Component1) C736 / R829 / C737 / R833 (Component2) C733 / R837 / C732 / R838 (RGB) C701 / R816 / C700 / R817 (AV Rear) C729 / R858 / C728 / R859 (AV Side)

Y

Check Connector J700 / J702 (Component) J703 (RGB) J701 / P700 & cable (AV Rear, AV Side)

Y

Check video output

N

N

N

N

N

N

Replace it

Replace it or IC500

Replace it

Replace it

Replace connector

Follow procedure external input video trouble shooting

Maybe BCM3553 has problems

Y

Check Audio clock R134

Y

Check I2S signal R548 / R549 / R550

Y

Check IC502 power L514 voltage level 3.3V & L515 voltage level 5V

Y

Check IC502 power L514 voltage level 3.3V & L515 voltage level 5V

Y

Check signal C554 / R569 / R581 / C562

N

N

N

N

N

Replace it

Replace it or IC502

Replace it

Replace it

Replace it or IC503

TROUBLESHOOTING

12. Component / RGB / AV Audio 12-2. Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 44 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF

L/R

R/G/B

(AMP)

MC33078

L/R

Y/Cb/Cr

CVBS/Y/C

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

TP

SPDIF Out (Coaxial)

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom)

24C16

HSX Serial

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

KIA7029

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

TC90512

CVBS/Y/C

Analog /Digital Tuner

NIM TUNER

I2C

DDR1 (64MB)

NVRAM

TROUBLESHOOTING

13. HDMI Audiol

13-1 Block Diagram of Troubleshooting

LGE Internal Use Only


Follow procedure All source audio trouble shooting

Y

Check EDID NVRAM (IC602, 603, 604) Power & I2C Signal (#5, #6)

Y

Check video output

N

N

N

Maybe BCM3553 audio block has problems. Replace it

Replace it orredownload

Follow procedure HDMI video trouble shooting

TROUBLESHOOTING

13. HDMI Audio

13-2. Troubleshooting

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 45 -

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 46 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF

L/R

R/G/B

(AMP)

MC33078

L/R

Y/Cb/Cr

CVBS/Y/C

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

TP

SPDIF Out (Coaxial)

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom)

24C16

HSX Serial

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

KIA7029

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

TC90512

CVBS/Y/C

Analog /Digital Tuner

NIM TUNER

I2C

DDR1 (64MB)

NVRAM

TROUBLESHOOTING

14. USB

14-1. Block Diagram of Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 47 -

N

N

Replace it or IC202

Replace it

- In this case, remove the device and try to reboot the TV (AC power off/on)

- USB power could be disabled by inrushing current

• Exception

Maybe BCM3553 has problems

Y

Check L205 voltage level 5V

Y

Check P201

Y

Check USB Device If device is 2.5 inch HDD, check power adaptor

Y

Check USB 2.0 Cable

TROUBLESHOOTING

14. USB

14-2. Troubleshooting

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 48 -

COMP 1 COMP 2 AV1 AV2 RGB-PC

AV2

AV1

HDMI 1/2/3

RGB-PC

COMP2

COMP1

Switch

RF

Audio SW

TEA6420

CVBS SIF CVBS/Y/C

L/R

R/G/B

(AMP)

I2S

MCLK

CS5340

I2S

Dual HDMI Rx

RMX0

XCBUF

RSBUF

Parse2

RS232

DVI

SPDIF Out (Coaxial)

EPM240F

12bit YC 4:2:2

(MPEG4 Decoder)

BCM7412

Flash (32MB)

SPDIF Out

74HC04

MNT out (Audio Only)

4:2:2 20bit YC

DM1/DP1

Local KEY

Full HD(1080P)

Digital out

WXGA(768P)

MTV416 (Micom)

24C16

HSX Serial TP

PCI/ EBI

Audio DSP

HD/SD Video Encoder

USB2.0

BCM3553

IB0

64Bit I/F

DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4)

RX/TX

HD-DVI

Video Front End

PKT

Reset

X-tal(54M)

20bits TMDS_RX+-

DVI

Serial TP

74LVC14APW

NTP3000 (Digital AMP)

TMDS341A (3x1,S/W)

MC33078

L/R

Y/Cb/Cr

NIM TUNER TC90512

CVBS/Y/C

Analog /Digital Tuner

KIA7029

I2C

DDR1 (64MB)

NVRAM

BLOCK DIAGRAM

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 49 -

Active Low

Active Low

BCM7412

33MHz

BCM3553

Not Gate

Active High

BCM3553

VCXO 27M

BCM7412

27MHz Clock is Recovered From The STC Values

54M Crystal

Main Clock

Clock Design

Power-on Reset

Reset Design

PLD

Tuner

Flash

BCM3553

BCM7412

CH 3

CH 2

BCM3553

CH 1

CH 0

I2C Design

3.3V

3.3V

5V

3.3V

Micom (0x50)

HDCP Key EEPROM (0xA8)

Audio Switch (0x9A)

NVRAM (0xA6)

NIM TUNER (0xC2, 0x30)

Audio AMP (0x54)

BLOCK DIAGRAM

LGE Internal Use Only


CopyrightŠ2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 50 -

- These 3 voltages should ramp up within 20ms total in any order, no sequence required, supplying - 1.2V/2.6V/3.3V simultaneously is meet our requirement too.

So, Power-up is Controlled by Micom

- Recommends the following power-up sequence: 1.2V -> 2.5V -> 3.3V - Recommends no more than 5ms between different supplies All Voltages should regulate at their nominal output voltages no later than 10ms

BCM7412

D3.3V, D1.2V.jpg

- A Controlled power-up sequence is necessary to establish the two core voltages before the pad voltage is applied

BCM3553

Power-Up Sequence

BLOCK DIAGRAM

LGE Internal Use Only


CopyrightŠ2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 51 -

- Actually Reset time is approximately 100ms(considering the variation of R, C) after power on.(Spec. : after 75ms)

- Initially 1.2V, 2.6V, 3.3V ramp up in 10ms.(Spec. : within 20ms)e

2) Result

BCM_Reset

D3.3_BCM

D2.6_BCM

D1.2_BCM

1) Power Sequence measurement waveform

Power-Up Sequence

BLOCK DIAGRAM

LGE Internal Use Only


Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

HDMI_POWER_0

HDMI_POWER_1

HDMI_POWER_2

HDMI_HPD_0

HDMI_HPD_1

HDMI_HPD_2

COMP1_SW

COMP2_SW

REV_SEL0

6

7

8

9

10

11

14

15

16

- 52 -

HDMI_SEL_0

HDMI_SEL_1

RF_SWITCH_CTRL

29

30

31

Reserved S-Video 2 Auto Detect

S-VIDEO2_SW

RGB_SW

REV_SEL2

41

55

56

62

Input

Board Revision 2

RGB Auto Detect

Reserved

40

Input

Reserved

39

Input

Reserved

RF Switch Control

HDMI Source 1 Select

HDMI Source 0 Select

38

Output

Output

Output

Composite 1 Auto Detect

COMPOSITE1_SW

26

Input

Composite 2 Auto Detect

Input

COMPOSITE2_SW

24

Board Revision 1

Board Revision 0

Component 2 Auto Detect

Component 1 Auto Detect

HDMI 2 Hot Plug Detect

HDMI 1 Hot Plug Detect

HDMI 0 Hot Plug Detect

HDMI 2 Power Detect

HDMI 1 Power Detect

HDMI 0 Power Detect

S-Video 1 Auto Detect

Reserved

Input

Input

Input

Input

Output

Output

Output

Input

Input

Input

Input

Direction

23

REV_SEL1

S-VIDEO1_SW

5

17

Signal Name

GPIO

GPIO Structure Description

BLOCK DIAGRAM

LGE Internal Use Only


MEMO

CopyrightŠ2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 53 -

LGE Internal Use Only


CopyrightŠ2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

- 54 -

910

500

120

300

121

510

120

900

812

811

817

816

550

815

200

813

810

530

814

540

520

400

EXPLODED VIEW

LGE Internal Use Only


BCM PO, USB

C o a x i a l Out

HB-1M1608-102J T

0 . 0 1 uF R563 3 .3

L200 HB-1M1608-102J T

C538 470pF

AK13 AK15 R203 3.9K

C207 100pF

C528 0 . 1 uF

R214 120

+9V

C526 0 . 1 uF

AK14

27

25

28

26

24

23

22

21

20

19

18

17

16

15

E6 USB_DP1

AM14

C6 USB_PWRFLT1 A6

1 : A 2 ; 1 : H 1 ; 4 : E 6 ; 9 : E4

AN13 AN12 K34

22

R536

22

R537

+1.8V

G2

MC33078_L_OU T

C553 0.01uF

150

22uF

C556 47pF

R518 270

C516 0 . 1 uF

VEE

7

3

6

4

5

R581 150

OUTPUT2

INPUT2-

INPUT2+

22uF

C558 0.1uF

C557 0.1uF

R573 4.7K

AF3 AG2

BCM3553_J TAG_TDO

AF4

BCM3553_JTAG_TMS

AF6 AF5

BCM3553_JTAG_TRSTb

TEA6420_R_OU T

R582 10K

10K

E1

AG3

A1.2V

R580 270 R574 4.7K

G2

C564 0.01uF

R579 6.8K

C560 47pF

E1 E1

L202

N31 M33

C209 4 . 7 uF

0 . 1 uF C208

R575 4.7K

AJ28 AJ29 AH17

HB-1M1608-102J T

AH18

C211

0 . 1 uF C210

AH19

4 . 7 uF

BYP_DS_CLK

DDR1_BA1

BYP_SYS9_C LK

DDR1_DATA00

USB_AVSS1

DDR1_DATA01

USB_AVDD1P2

DDR1_DATA02

USB_AVDD1P2PLL

DDR1_DATA03

USB_AVDD2P5

DDR1_DATA04

USB_AVDD3P3

DDR1_DATA05

USB_RREF

DDR1_DATA06

USB_AVDD2P5REF

DDR1_DATA07

USB_DM1

DDR1_DATA08

USB_DP1

DDR1_DATA09

USB_DM2

DDR1_DATA10

USB_DP2

DDR1_DATA11

USB_MONCDR

DDR1_DATA12

USB_MONPLLCDR

DDR1_DATA13

USB_PWRFLT_1

DDR1_DATA14

USB_PWRFLT_2

DDR1_DATA15

USB_PWRON_1

DDR1_DATA16

USB_PWRON_2

DDR1_DATA17

RESET_OUT

DDR1_DATA18

RESET

DDR1_DATA19

NMI

DDR1_DATA20

TMODE_0

DDR1_DATA22

TMODE_1

DDR1_DATA23

TMODE_2

DDR1_DATA24

TMODE_3

DDR1_DATA25

EJTAG_TCK

DDR1_DATA26

EJTAG_TDI

DDR1_DATA27

EJTAG_TDO

DDR1_DATA28

EJTAG_TMS

DDR1_DATA29

EJTAG_CE

DDR1_DATA30

EJTAG_TRST

DDR1_DATA31

PLL_MIPS_AVDD1P2

DDR1_DM1

PLL_MIPS_AGND

DDR1_DM2

VCXO_PLL_AUD_TESTOUT PLL_DS_TESTOU T

DDR1_DQS1 DDR1_DQS2

PLL_VAFE_AVDD1P2

DDR1_DQS3

PLL_VAFE_AVSS

DDR1_RAS

PLL_VAFE_TESTOUT

DDR1_CAS

+9V

P1 U1 HB-1M1608-102J T

Y1

D2.6V

AC1

AUDIO SWITCH

AB7 C212 0 . 1 uF

+5.0V

+3.3V

OP AMP

C213 0 . 0 1 uF

C214 1000pF

C215 0 . 1 uF

C216 0 . 0 1 uF

N9

C217 1000pF

P9 R9 T9

C549 100uF

IC500

16V 0 . 1 uF C565

1:H1

SCL1_5V

AV_L_IN_ 1

L3

5

24

6

23

AV_R_IN_1

M0

BCM3553_AUD_MCLK 1:H3;A6

NC1

NC2

TEA6420D

7

8

ADDR 0x9A

22

21

VL

NC4

R548

CS5340_I2S_DATA_OU T

NC3

SDOUT

22

6:AJ17 L4

COMP_L_IN_2

7:D3

L5

7:F6

RGB_L_IN R532 100

F4

LOUT1

TEA6420_L_OU T R533 100

J4

ROUT1

TEA6420_R_OU T

9

20

10

19

11

18

12

17

R4

GND

1

16

BCM3553_SPDIF_OU T G7;6:AJ15

FILT +

15

2

3

REF_GND

14

CS5340_I2S_SC LK_OUT 6:AJ18

R549

CS5340_I2S_LRCLK_OUT

R550

ROUT4

LOUT4

22

LRCK

22

8

13

16

14

15

+5.0V

GND

IN

EN1 B3

USB_PWRON1 C238 0 . 1 uF

SPDIF OU T

DDR1_PLL_AIO

1K R216

1K R217

1K R213

R207 1K

AB3

N17

AA6

N18

AA3

N19

D3.3V

N20 N21 N22

R211 22

W5 W2 W4 W3

N23 P12

Y3

C261 1000pF

C273 OPT READY

C262 0 . 0 1 uF

C263 0 . 1 uF

C264 4 . 7 uF

C265 1000pF

C266 0 . 0 1 uF

C267 0 . 1 uF

P13 P22 P23

W6

R12

Y2 Y4 R4

B2

54MHz_XTAL_P L206

54MHz_XTAL_N

R13 R22

B2

R23

1008LS-272XJLC

R7

T12

P2

T13

D3.3V

P5 N2

T22

C232 33pF

READY R205

P4

T23 U12

P6

U13

P3 M6 M3

C252 4 . 7 uF

R212 22

C253 1000pF

C254 0 . 0 1 uF

C255 0 . 1 uF

C256 4 . 7 uF

C257 1000pF

C258 0 . 0 1 uF

C259 0 . 1 uF

C280 10uF

U22 U23 V12

L2

V13

M4

V22

M2

V23

M5

W12

N4

W13

N3

W22

D1.2V

Y6

W23

Y5

Y12

N5

Y13

N6

Y22

Y7

Y23 C233 0 . 1 uF

W7

C234 4 . 7 uF

C235 1000pF

C236 0 . 0 1 uF

C237 0 . 1 uF

C275 10uF

C276 10uF

P7

C240 33uF

C241 33uF

AA12 AA13

N7

AA22

T7

AA23

R5

AB12

R6

AB13

M7

AB22 D1.2V

T5

AB23

D1.2V

T4

AC12

U7

AC13

T6

A1.2V

D3.3V

AC2 L1

C242 1000pF

AB5

C243 0 . 0 1 uF

C244 0 . 1 uF

C245 4 . 7 uF

C246 1000pF

C247 0 . 0 1 uF

C248 0 . 1 uF

C249 4 . 7 uF

C250 1000pF

C251 0 . 0 1 uF

AC22 AC23 G34

L4

J 26

AB4

K9

L3 K1

K26 L8 L9 M9 N26

C226 0 . 1 uF

EN2

1

2

3

4

8

7

6

5

AA26 AA34 AB9 M a k e t h i s t r a c e 1 2 ml i

AB26 AC9 L205 FB-MH3216-HM501NT

OC1 USB_PWRFLT1

B3

OUT1 USB_POWER_OUT_ 1

C239 0 . 1 uF

OUT2

C260 0 . 1 uF

F6

M a k e t h i s t r a c e 1 2 ml i

AD9 USB_POWER_OUT_ 1

AE9

C6

AE26 AF12

USB_DM1

USB_DP1

AF13

C3

C224 0 . 0 1 uF 25V

C3

AF14

C274 10uF

AF24 D2.6V

MC33078_L_OU T

AF26

OC2

N27 AF10 AF11

F4

AG27

RST

9

AF25

AF27

MICOM_RESET

AJ32

4:H3;A6

6:AJ17 LOUT2

DDR1_VDDO2P5_1 2

N16

AINL

10

7

VINPUT

J4

MC33078_R_OU T 1uF C573

7:F6 SCLK

C552 0.1uF

ZD500 OPT

VQ

11

6

JP503

AINR

12

5

VCC

VA

13

4

JP504

C572 1uF

0 . 1 uF C570

C571 0 . 1 uF VD

RGB_R_IN

DDR1_BVSS_ 0 DDR1_BVSS_ 1

IC202 TPS2052BDRG 4

J 5 00 GND

COMP_R_IN_ 2 7:D3

R5

DDR1_VDDO2P5_1 0 DDR1_VDDO2P5_1 1

AA7

V34

M1

7:G7

COMP_R_IN_ 1 7:B2

DDR1_BVDD1P2_ 1

N15

D3.3V JP502

MCLK

R3

DDR1_VDDO2P5_ 9

AB2

U26

R578 1K

IC502 CS5340-CZZ R

7:C6

AV_R_IN_2

DDR1_VREF1 DDR1_BVDD1P2_ 0

N13

V26

M CLK : 12.288MHz

R2

DDR1_VDDO2P5_ 7 DDR1_VDDO2P5_ 8

N12

C272 33uF

D3.3V

ADDR

R1

DDR1_VREF0

C279 10uF

N14

USB DOWN STREAM

COMP_L_IN_1

25

DDR1_VDDO2P5_ 6

C270 0 . 1 uF

P26

F i b er O p t i c

L2

AV_L_IN_ 2

4

DDR1_CKE DDR1_CSB0

C269 0 . 0 1 uF

R3

C569 1uF

0 . 1 uF C568

C567 1uF

16V 0 . 1 uF C566

DDR1_VDDO2P5_ 4 DDR1_VDDO2P5_ 5

C268 1000pF

5

26

R540

22

SDA1_5V

DDR1_CLK0B

R210

3

SCL

1:H1

1

27

R539

22

2

2

SDA

3

28

4

L1

7:B2

V9

FI X _POL E

VS

1

0 . 0 1 uF

7:G6

HB-1M1608-102J T L515

R555 10K

CAPACITANCE

C502

7:C6

U9 W9

GND

C550 22uF

HB-1M1608-102J T L514

DDR1_VDDO2P5_ 3

M22 M23

1K

L512

DDR1_CLK0

T2 V6

AA4

EXT_DDR1_CLK

DDR1_VDDO2P5_ 1

M21

AA2

DDR1_WE DDR1_VDDO2P5_ 2

V5

AA5

DDR1_DQS0

PLL_OB_TESTOU T

M20

R2

PLL_MAIN_MIPS_RPTR_TESTOU T DDR1_DM3

AH28

L203

DDR1_BA0

M19

D2.6V

V7

DDR1_DM0

N30

HB-1M1608-102J T

A1

C563 22uF

AE5

BCM3553_JTAG_TDI

E1

MC33078_R_OU T

AE6

BCM3553_JTAG_TC K

E1

C562 22uF

DDR1_ADDR12

U5

DDR1_DATA21

AF1

1K

C561 100uF

VCC

R572 4.7K

R568

C555

TEA6420_L_OU T

A2

C519 10uF

2

INPUT1+

R570 6.8K

8

1

R569

C554

L503 HB-1M1608-102J T

C508 33pF

K29 AF2

R204

C530 0 . 0 1 uF

INPUT1-

4:F1 MUTE1

C559 0.1uF

I C503 MC33078DR2 G OUTPUT1

R534 100

AD8 1K R209

C529 0 . 1 uF

1uF C521

BCM3553_I2S_DATA_OU T BCM3553_I2S_LRCLK_OU T BCM3553_I2S_SCLK_OUT SDA2_3.3V SCL2_3.3 V

1 : A 2 ; 1 : H 1 ; 4 : E 6 ; 9 : E4

AP13 AM12

R200

USB_PWRON1

1 : D 6 ; 4 : B 6 ; 8 : A 3 ; 11 : O 11SYS_RESET b

R501 3 .3

6:AJ17

AH14

HB-1M1608-102J T +19.0V

C523 C527 22000pF 330uF

6:AJ17

AJ14

1K

L513

6:AJ17

AL14

D3.3V

C506 10uF

C504 0 . 1 uF

AN14

C228 0 . 1 uF

L501 HB-1M1608-102J T

AP14

E6 USB_DM1

BYP_SYS175_CLK BYP_SYS216_CLK

M18

U6

1

29

AJ15

DDR1_ADDR11

M17

TOP View

U3

2

14

READY 10K R206

AL12 AL13

BYP_CPU_CLK

M16

3

30

AG28

DDR1_ADDR10

V4

4

13

A3.3V

A2.6V

AF28 AM13

C546

470pF C533

32 31

N28 P27

A1.2V

33

12

4 . 7 uF

BYP_XTAL_EN

M13 M14

V3

R208 604

0 . 1 uF C203

4Y

DDR1_ADDR08 DDR1_ADDR09

14

M15

12pF C229

8

VCXO_AGND1 VCXO_AVDD1P2

13

M12

GND_108

GND_2

GND_109

GND_3

GND_110

GND_4

GND_111

A22

GND_5

GND_112

A25

GND_6

GND_113

GND_7

GND_114

A28

IC100 BCM3553

D1.2V

V2

X200 54MHz

7

DDR1_ADDR07

U4 U2

12pF C230

GND

P500

CLK54_MONITOR

12

C221

SMAW250-04

N29

DDR1_ADDR05 DDR1_ADDR06

11

JTAG_RESETb

C222

11

AH29

CLK54_XTAL_N CLK54_XTAL_P

10

A19

C223

IIC CH4 0x54

10

AF30 AF29

R565 3 .3 L511

C542 0 . 1 uF

AG32

C204

0 . 0 1 uF

2F

R554 10

35

R201 1.5K

3

AH34

8

9

1uF

R561 4.7K

C544 0 . 4 7 uF

54MHz_XTAL_P L201 HB-1M1608-102J T

DDR1_ADDR04

7

BCM3553_JTAG_TC K

470pF

U_CAN

54MHz_XTAL_N

E3 A1.2V

JP500

4A

34

9

+1.8V

10 5Y 9

E3

2

36

NTP3000A

8

0 . 1 uF C503

CONTACT

ZD501 5.6B

CLK54_AVSS

BCM3553_JTAG_TMS

B4

A16

470pF

IC501

7

4

C578 100pF

DDR1_ADDR02 DDR1_ADDR03

6

UB01123-4HHS-4F P201

37

6

110

AH31 AH33

CLK54_AVDD1P2 CLK54_AVDD2P5

5

BCM3553_J TAG_TDO

B4 B4 4:A7

C225

38

6

3Y

R524

JP202

AG30

4

C219

5

+19.0V

5

C577

1

DDR1_ADDR01

3

BCM3553_JTAG_TDI

C220

39

C541 0 . 1 uF

1F

2S R546 10

3A

O_SPRING

100pF

11 5A

C201 0 . 1 uF C202 0 . 1 uF

3

R523 75

BSC_S_SD A

T3

B4

1uF

4

1S

C524 22000pF

4

C576 R522 0 . 1 uF 120

AH32

DDR1_ADDR00

B4 BCM3553_JTAG_TRSTb

2

GND_1

A13

P202 YFDW254-14S

1

0 . 1 uF

40

12 6Y

M31

JP201

JP501

BSC_S_SC L

C227

41

3

3

M32

2

C218

C505 10uF

2

2A 2Y

2

C548

R559 4.7K

43

44

46

45

47

53

49

48

55

52

54

51 50

56

42

1

13 6A

IC100 BCM3553

4 . 7 uF

JP507

DA-8580 1uF

HB-1M1608-102J T L500

2

A10

4 . 7 uF

3

HB-1M1608-102J T L510

L506

C525 1uF

1Y

1

BCM3553_AUD_MCLK +1.8V

J 5 01 PPJ204-0 6

C231

C509

14 VCC

D3.3V

0 . 1 uF

R562 3 .3

C537 470pF R553 10

R544 10

1

0. 1uF

4:H3;G1

1000pF C501

4

JP506

1A

H2;6:AJ15 BCM3553_SPDIF_OU T

0 . 0 1 uF

470pF C536

C532 470pF

3.3K R531

C545

JP508

MICOM_RESET

C500 100pF

HB-1M1608-102J T

C278

+19.0V

JP200

0. 1uF

C540 0 . 1 uF

C200 4 . 7 uF

1

JP505

C522 1uF

M CLK : 12.288MHz

1:H3;D2

R564 3 .3 L509

2F

R552 10

470pF C531

0 . 0 1 uF

0. 1uF

C512 22000pF

0 . 1 uF

C547

0. 1uF

C507

R543 10

C515 22000pF

C543 0 . 4 7 uF

JP203

4 . 7 uF

2S

L502 HB-1M1608-102J T

C539 0 . 1 uF

1F

C575 0 . 1 uF

IC504 TC74VHC04FT

C277

1S

0 . 1 uF C518

SMW250-04

R202 1.5K

DA-8580

P200

RIGHT

HB-1M1608-102J T L508

C205

C514 0 . 1 uF

L504

+5.0V

D3.3V

LEFT

R551 10

R560 4.7K

D3.3V

C535 470pF

C534 470pF R545 10

C520 0 . 0 1 uF

C206

C517 C513 330uF 0 . 1 uF

R558 4.7K

PWM_MOD/AMP

IC100 BCM3553

A1.2V

A2.6V L207 HB-1M1608-102J T

+19.0V R541 3 .3

HB-1M1608-102J T L204

+19.0V

A31

GND_8

GND_115

A32

GND_9

GND_116

B30

GND_10

GND_117

GND_11

GND_118

B31 VDDC_1

C4

GND_12

GND_119

VDDC_2

C8

GND_13

GND_120

GND_14

GND_121

VDDC_3

C29

VDDC_4

D3

VDDC_5

D10

GND_15

GND_122

GND_16

GND_123

GND_17

GND_124

VDDC_6

D34

VDDC_7

E9

GND_18

GND_125

VDDC_8

E27

GND_19

GND_126

GND_20

GND_127

VDDC_9

F7

VDDC_10

F8

GND_21

GND_128

VDDC_11

F24

GND_22

GND_129

VDDC_12

F27

GND_23

GND_130

VDDC_13

H8

VDDC_14

H10

VDDC_15

H11

VDDC_16

H12

VDDC_17

H13

VDDC_18

H14

VDDC_19

H15

VDDC_20

H16

VDDC_21

H17

VDDC_22

H18

VDDC_23

H19

VDDC_24

H20

GND_24

GND_131

GND_25

GND_132

GND_26

GND_133

GND_27

GND_134

GND_28

GND_135

GND_29

GND_136

GND_30

GND_137

GND_31

GND_138

GND_32

GND_139

GND_33

GND_140

GND_34

GND_141

GND_35

GND_142

VDDC_25

H21

GND_36

GND_143

VDDC_26

H22

GND_37

GND_144

VDDC_27

H23

GND_38

GND_145

GND_39

GND_146

VDDC_28

H24

VDDC_29

H25

VDDC_30

H26

GND_40

GND_147

GND_41

GND_148

GND_42

GND_149

VDDC_31

J9

VDDC_32

J 10

GND_43

GND_150

L5

GND_44

GND_151

GND_45

GND_152

VDDC_33

L7

VDDC_34

L26

VDDC_35

GND_46

GND_153

M8

GND_47

GND_154

VDDC_37

M26

GND_48

GND_155

VDDC_38

M34

VDDC_39

N1

VDDC_36

VDDC_40

N8

VDDC_41

N34

VDDC_42

P8

VDDC_43

P14

VDDC_44

P15

VDDC_45

P16

VDDC_46

P17

GND_49

GND_156

GND_50

GND_157

GND_51

GND_158

GND_52

GND_159

GND_53

GND_160

GND_54

GND_161

GND_55

GND_162

GND_56

GND_163

GND_57

GND_164

VDDC_47

P18

GND_58

GND_165

VDDC_48

P19

GND_59

GND_166

VDDC_49

P20

GND_60

GND_167

VDDC_50

P21

GND_61

GND_168

VDDC_51

R8

GND_62

GND_169

VDDC_52

R14

GND_63

GND_170

VDDC_53

R15

VDDC_54

R16

VDDC_55

R17

GND_64

GND_171

GND_65

GND_172

GND_66

GND_173

GND_67

GND_174

VDDC_56

R18

VDDC_57

R19

GND_68

GND_175

VDDC_58

R20

GND_69

GND_176

GND_70

GND_177

VDDC_59

R21

VDDC_60

R26

VDDC_61

T1

VDDC_62

T8

VDDC_63

T14

VDDC_64

T15

VDDO_1

T17

VDDO_2

T18

T16

GND_71

GND_178

GND_72

GND_179

GND_73

GND_180

GND_74

GND_181

GND_75

GND_182

GND_76

GND_183

GND_77

GND_184

GND_78

GND_185

GND_79

GND_186

VDDO_3

T19

VDDO_4

T20

GND_80

GND_187

VDDO_5

T21

GND_81

GND_188

GND_82

GND_189

VDDO_6

T26

VDDO_7

T34

GND_83

GND_190

VDDO_8

U8

GND_84

GND_191

GND_85

GND_192

VDDO_9

U14

VDDO_10

U15

VDDO_11

U16

VDDO_12

U17

VDDO_13

U18

VDDO_14

U19

VDDO_15

U20

VDDO_16

U21

VDDO_17

V8

VDDO_18

V14

VDDO_19

V15

VDDO_20

V16

VDDO_21

V17

GND_86

GND_193

GND_87

GND_194

GND_88

GND_195

GND_89

GND_196

GND_90

GND_197

GND_91

GND_198

GND_92

GND_199

GND_93

GND_200

GND_94

GND_201

GND_95

GND_202

GND_96

GND_203

GND_97

GND_204

GND_98

GND_205

VDDO_22

V18

VDDO_23

V19

GND_99

GND_206

VDDO_24

V20

GND_100

GND_207

VDDO_25

V21

GND_101

GND_208

VDDO_26

W1 W8

GND_102

GND_209

GND_103

GND_210

GND_104

GND_211

VDDP_1

W14

VDDP_2

W15

GND_105

GND_212

VDDP_3

W16

GND_106

GND_213

VDDP_4

W17

GND_107

GND_214

W18 W19 W20 W21 W26 W34 Y8 Y9 Y14 Y15 Y16 Y17 Y18 Y19 Y20 Y21 Y26 AA8 AA9 AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AB1 AB6 AB8 AB14 AB15 AB16 AB17 AB18 AB19 AB20 AB21 AB34 AC3 AC4 AC5 AC14 AC15 AC16 AC17 AC18 AC19 AC20 AC21 AC26 AD2 AD3 AD26 AD27 AD28 AE7 AE8 AE27 AE28 AE29 AE34 AF7 AF9 AF15 AF16 AF17 AF18 AF19 AF20 AF21 AF22 AF23 AF31 AF32 AG9 AG10 AG11 AG12 AG13 AG14 AG15 AG16 AG17 AG18 AG19 AG20 AG21 AG22 AG24 AG25 AG26 AG29 AG31 AH15 AH25 AH26 AH27 AH30 AJ13 AK28 AK30 AL20 AN30 AN33 AN34 AP10

VDDP_5 AGC_VDDO1

ROUT3

=========== ========== CUTTING PIN LIST =========== ========== LOUT3

EBI_ADDR/PCI_AD[23]

W30

EBI_ADDR/PCI_AD[24]

V28

EBI_ADDR/PCI_AD[25]

V30

HD_DVI_HSYNC

EBI_ADDR/PCI_AD[26]

V29

HD_DVI_VSYNC

EBI_ADDR/PCI_AD[27]

U27

EBI_ADDR/PCI_AD[28]

R115

R117

R114

R118

R116

R162

R159

R161

R113

R158

R112

R110

D3.3V

R109

EBI_ADDR/PCI_AD[29]

D7;10:BA16

EBI_ADDR/PCI_AD[30] EBI_ADDR/PCI_AD[31]

G7;10:BA15

EBI_ADDR17/PCI_CBE1

D6;10:BA15

EBI_ADDR18/PCI_CBE2

D6;10:BA15

EBI_ADDR19/PCI_CBE3 BCM3553_CLK_OUT

D7

EBI_ADDR23/PCI_DEVSEL b

U29 U30 T27 Y28 V32 V27 R30

33

10:BA17

U28

AA33

EBI_ADDR16/PCI_CBE0

R32 R154 W33 V33

D3.3V

P33 N33 T29

Y29

EBI_ADDR20/PCI_PAR

W28

WP

SDA

22

1K

1K

1K

T28 SCL2_3.3V

H 1 ; 4 : E 6 ; 5 : A 5 ; 9 : E4

R101 SDA2_3.3V

H 1 ; 4 : E 6 ; 5 : A 5 ; 9 : E4

D6

T30

R170

5

R34

R100 R169

4

22

1K

1K

VSS

SCL

R119

A2

1K

R28 470

6

D7 D7

V31

470

3

BCM7411_INTb EBI_ADDR21/PCI_IRDYb

R165

7

10:BA16

R163

2

VCC

R160

8

R166

A1

1

R31 R29

R164

A0

R27 C122 0 . 1 uF

R148 1K

IC102 CAT24C08WI-GT

W27 W31

EBI_ADDR22/PCI_STOP b

W32 BCM Recommen d

P29

+5.0V

P28 P30 R33

D7

EBI_ADDR24

G7 F6

EBI_ADDR25 EBI_CS0b

HDMI_HDCP KEY MEMORY

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

P32 AD31 AE33 C126 0 . 1 uF

10:BA17

EBI_CS1b

F6;10:BA17

EBI_RDb

10:BA16

EBI_TAb

AD32 AC30 AD34 AC29 AB28 AB27 AB29 AB30 N32 AD33 AC31 AC27

D6;10:BA16

EBI_WE1b

AC28 P31

GPIO_17

PCI_AD18

GPIO_18

PCI_AD19

GPIO_19

PCI_AD20

GPIO_20

PCI_AD21

GPIO_21

PCI_AD22

GPIO_22

PCI_AD23

GPIO_23

PCI_AD24

GPIO_24

PCI_AD25

GPIO_25

PCI_AD26

GPIO_26

PCI_AD27

GPIO_27

PCI_AD28

GPIO_28

PCI_AD29

GPIO_29

PCI_AD30

GPIO_30

PCI_AD31

GPIO_31

PCI_CBE00

GPIO_32

PCI_CBE01

GPIO_33

PCI_CBE02

GPIO_34

PCI_CBE03

GPIO_35

PCI_CLK_IN

GPIO_36

PCI_CLK_OUT

GPIO_37

PCI_DEVSEL

GPIO_38

PCI_FRAME

GPIO_39

PCI_GNT0

GPIO_40

PCI_GNT1

GPIO_41

PCI_GNT2

GPIO_42

PCI_INT_A0

GPIO_43

PCI_INT_A1

GPIO_44

PCI_INT_A2

GPIO_45

PCI_IRDY

GPIO_46

PCI_PAR

GPIO_47

PCI_PERR

GPIO_48

PCI_REQ0

GPIO_49

PCI_REQ1

GPIO_50

PCI_REQ2

GPIO_51

PCI_RST

GPIO_52

PCI_SERR

GPIO_53

PCI_STOP

GPIO_54

PCI_TRDY

GPIO_55

PCI_VIO_0 PCI_VIO_1 PCI_VIO_2 EBI_ADDR24

GPIO_56 GPIO_57 GPIO_58 GPIO_59

EBI_ADDR25

GPIO_60

EBI_CS0

GPIO_61

EBI_CS1

GPIO_62

EBI_CS2 EBI_CS3 EBI_CS4 EBI_DS

GPIO_63 SGPIO_00 SGPIO_01 SGPIO_02

EBI_RD

SGPIO_03

EBI_RW

SGPIO_04

EBI_TA2

SGPIO_05

EBI_TA

SGPIO_06

EBI_TS

SGPIO_07

BCM7411_DVI_OUT2[4]

BCM7411_DVI_OUT2[5]

B2_IO_77

BCM7411_DVI_OUT2[3]

B2_IO_76

BCM7411_DVI_OUT2[2] B2_IO_81

B2_IO_80

C1105 B2_VCCIO2_2

B2_GNDIO_5

B2_IO_83

B2_IO_85

B2_IO_86

B2_IO_87

B2_IO_89

B2_IO_88

B2_IO_84

R1101

33

0 . 1 uF C1103

BCM7411_DVI_OUT[13]

B2_GNDIO_6

B2_VCCIO2_3

B2_IO_95

B2_IO_90

BCM7411_DVI_OUT[0] B2_IO_96

B2_IO_91

BCM7411_DVI_OUT[14]

B2_IO_98

B2_IO_97

B2_IO_94

BCM7411_DVI_OUT[2]

BCM7411_DVI_OUT[1]

BCM7411_DVI_OUT[15]

B2_IO_100

B2_IO_99

0 . 1 uF

1:A3 BCM7411_DVI_VSYNC2

BCM7411_DVI_OUT2[1]

BCM7411_DVI_OUT2[0] 10:BA22

BCM7411_DVI_OUT2[20]

L31

COMP1_S W

AD7 AC8 AP8

7:C3

REV_SEL0

J2

REV_SEL1

J2

BCM7411_DVI_OUT[0-19]

BCM7411_DVI_OUT2[26]

M27 K31 L29 J 34

COMPOSITE2_S W

7:G6

COMPOSITE1_S W

7:C6

BCMPWM_VBR_A HDMI_SEL_0

8:G6 8:G6 6:W19

HDMI_SEL_1

6:W19

RF_SWITCH_CTR L

8:A5

BCMPWM_VBR_B

G30 G32 G31 E29 L30 AG33 33

AG34

R107

BCM7411_27M_CLK 10:AF4

L33 M30 L32 K33 AP25 AN25

BCM7411_DVI_OUT2[27]

AM10 33

AL24

R134

BCM3553_AUD_MCLK 5 : A 6 ; 5 : D2

AL11

BCM7411_DVI_OUT2[28] BCM7411_DVI_OUT2[29]

AN10 M28 M29

BCM7411_DVI_OUT2[15-29]

AF33

11:K7

BCM_RX 4:A4

AE32

BCM_TX 4:A4

AC6

B o a r d C o n f i g u r t i on

D3.3V

AE1 AC7

R127

1K

AD4

R126

1K

S-VIDEO2_SW

D33 J 30 J 32

7:G6

RGB_SW

7 : J3

REV_SEL2

J2

+5.0V

D3.3V

H33 H32 L28 L27

R1107 10K

R1106 10K

B8

G5

A8

A9

D6 J8

K10

H7

H8

J9

E5

K9

JP1101 2

CPLD_TDO JP1102

3 JP1103 4 JP1104

I15

CPLD_TDI

C1109 0 . 1 uF R1103 10K

C1108 100pF

GND

5 JP1105 6

GND

BCM7411_DVI_OUT2[0-29] 1 : A 4 ; 1 : I2 H4 H4 H2

AE2 G33

J 31

C7

C6

BCM7411_DVI_OUT2[24]

K32 K30

J7

BCM7411_DVI_OUT2[24]

G6

BCM7411_DVI_OUT2[23]

B2_IO_51

K8

B2_IO_52

H9

J6

B2_IO_53

J 10 K7

H10

J2 K1

B1_TCK

BCM7411_DVI_OUT2[25]

AN9

B7

B6

BCM7411_DVI_OUT2[22]

H3

B1_TDO B1_IO_25

BCM7411_DVI_OUT2[23]

AM9 AL10

A6

A5

BCM7411_DVI_OUT2[21]

BCM7411_DVI_OUT2[22]

AN8

A7

B5

C5

F7

C4

B4

A4

A3

G7

C3

B2

B3

BCM7411_DVI_OUT2[20]

B2_IO_54

7:A3

COMP2_S W

A2

BCM7411_DVI_OUT2[19]

B2_IO_55

G8

BCM7411_DVI_OUT2[21]

J 33

A1

B2_IO_56

G9

B1_IO_49

D3.3V

HD_DVI_DE

W29

GPIO_15 GPIO_16

PCI_AD17

AP7

CPLD_TCK CPLD_TDO

G10

B1_IO_50

4 . 7 uF

HD_DVI_CLK_P

EBI_ADDR/PCI_AD[22]

GPIO_14

PCI_AD15 PCI_AD16

6:G20

AB16

CPLD_TCK

CPLD_TMS

BCM7411_DVI_OUT2[18]

J1

B1_IO_48

0 . 1 uF

T33 T31

PCI_AD14

6:G29 6:G11

HDMI_HPD_2

AB15 AB17 BCM7411_DVI_OUT[11]

I15

I15

I15

H2

B1_IO_47

0 . 1 uF

EBI_ADDR/PCI_AD[20] EBI_ADDR/PCI_AD[21]

GPIO_12 GPIO_13

HDMI_HPD_1

F31 AL9

6:G19;6:AG23

R1102

BCM7411_DVI_OUT2[17]

G3

BCM7411_DVI_OUT2[25]

0 . 1 uF

HD_DVI_14

T32

PCI_AD12 PCI_AD13

HDMI_HPD_0

E31

6:G28;6:AG29 6:G9;6:AG26

HDMI_POWER_2

0 . 1 uF

B1_TDI

BCM7411_DVI_OUT2[27]

0 . 1 uF

C125

U31

EBI_ADDR/PCI_AD[19]

GPIO_11

HDMI_POWER_0 HDMI_POWER_1

0 . 1 uF

C1107

B1_TMS

BCM7411_DVI_OUT2[26]

C113

U33

EBI_ADDR/PCI_AD[18]

GPIO_09 GPIO_10

PCI_AD11

C33 F28

CPLD_TMS CPLD_TDI

BCM7411_DVI_OUT2[28]

C112

EBI_ADDR/PCI_AD[17]

PCI_AD09 PCI_AD10

G27

AB16

B1_IO_46

Y27 U32

HB-1M1608-102J T C110 C111

B1_IO_20

7:C7

B1_GNDIO_3

EBI_DATA/PCI_AD[15]

L101

G9

GPIO_08

S-VIDEO1_SW

C1106

1

1:A4 BCM7411_DVI_DE2

EBI_DATA/PCI_AD[14] AA29

A7 E8

HD_DVI_12

B2_IO_57

B1_IO_41

EBI_DATA/PCI_AD[13] AA30 D7;10:BA10 EBI_ADDR/PCI_AD[17-31]

GPIO_06 GPIO_07

PCI_AD08

BCM7411_DVI_OUT2[19]

F29 D31

B2_VCCIO2_1

F10

B1_IO_40

EBI_DATA/PCI_AD[12] AA28

PCI_AD06 PCI_AD07

AM8

B2_GNDIO_4

G2

B1_VCCIO1_3

Y32

EBI_DATA/PCI_AD[11 ] AA27

GPIO_05

B2_IO_60

F6

B1_IO_19

BCM7411_DVI_HSYNC 10:BB24 BCM7411_DVI_OUT[19]

B1_IO_42/DEV_OE

EBI_DATA/PCI_AD[10]

A2.6V A1.2V

GPIO_03 GPIO_04

PCI_AD05

BCM7411_DVI_OUT2[17] BCM7411_DVI_OUT2[18]

B1_IO_43/DEV_CLRn

Y33

PCI_AD03 PCI_AD04

AJ10 AH11

B2_IO_61/GCLK2

F9

G1 H1

33

Y31

EBI_DATA/PCI_AD[9 ]

GPIO_02

VCCINT_2

F8

F1

B1_IO_18

P1100 GIL-G-06-S3T2 JP1100

1:A4 BCM7411_DVI_CLK2

0 . 1 uF

Y30

EBI_DATA/PCI_AD[8 ]

PCI_AD02

33

B2_IO_63/GCLK3

F4

D4

F3

B1_IO_16 B1_IO_17

R1100

EBI_DATA/PCI_AD[7 ]

9 : A 3 ; 9 : E4

G5

E10

F2

B1_IO_15

K6

9 : A 3 ; 9 : E4

C1

E1

B1_IO_14

BCM7411_DVI_OUT[9] BCM7411_DVI_OUT[10]

H6

AA31 AA32

H9

HD_DVI_CLK_N

AB33

EBI_DATA/PCI_AD[5 ] EBI_DATA/PCI_AD[6 ]

G6

B1_IO_13/GCLK1

BCM7411_DVI_OUT[8]

B1_IO_38

EBI_DATA/PCI_AD[4 ]

9:A5 9:A5

9:A4

BCM7411_DVI_OUT2[16]

GNDINT_2

B1_IO_39

9:A5

LVDS_TX_OUT_TB4LVDS_TX_OUT_TB4+

LVDS_TX_OUT_TBC+

BCM7411_DVI_OUT2[14] BCM7411_DVI_OUT2[15]

F5

B1_IO_37

LVDS_TX_OUT_TB3+

D8

BCM7411_DVI_OUT2[13]

E7

K5

C2 A6

BCM7411_DVI_OUT2[12]

VCCINT_1

D3.3V

BCM7411_DVI_OUT2[9]

B2_IO_65

D7

AB32

BCM7411_DVI_OUT2[7] BCM7411_DVI_OUT2[8]

B2_IO_66

H5

AB31

EBI_DATA/PCI_AD[3 ]

BCM7411_DVI_OUT2[16]

D8

BCM7411_DVI_OUT2[11]

B2_IO_67

J5

EBI_DATA/PCI_AD[2 ]

9:A5

BCM7411_DVI_OUT2[15]

AH10

BCM7411_DVI_OUT2[10]

B2_IO_70 B2_IO_68

J4

9:A4

LVDS_TX_OUT_TB3-

AJ9

B2_IO_71 B2_IO_69

K4

LVDS_TX_OUT_TB2+

GPIO_00 GPIO_01

B2_IO_72

E9

0 . 1 uF

BCM7411_DVI_CLK 10:BB24 BCM7411_DVI_OUT[12]

PCI_AD00 PCI_AD01

B2_IO_73

C9

E8

B1_IO_35

AC33

B2_IO_74

C8

D9

I C1107 EPM240F100C5 N

E6 E2

B1_IO_33

AC32

EBI_DATA/PCI_AD[1 ]

B2_IO_75

B9

B10

C10

D5

GNDINT_1

CPL D Program I /F

BCM7411_DVI_OUT2[6]

A10

D10

E4

B1_GNDIO_1

B1_IO_32

EBI_DATA/PCI_AD[0 ]

9:A4

9:A4

E3

B1_VCCIO1_1

BCM7411_DVI_OUT[18]

9:A5 9:A5

LVDS_TX_OUT_TB2-

LVDS_TX_OUT_TBC-

D1

B1_IO_7 0 . 1 uF

B1_IO_11/GCLK0

IC100 BCM3553

G7;10:BA15 EBI_DATA/PCI_AD[0-15]

LVDS_TX_OUT_TB1-

LVDS_TX_OUT_TAC+

C3

BCM7411_DVI_OUT[7] BCM7411_DVI_OUT[17]

C1101

LVDS_TX_OUT_TB1+

LVDS_TX_OUT_TAC-

E6

D2

B1_IO_36

D6

9:A4

D3

B1_IO_5 B1_IO_6

C1104

LVDS_TX_AVDD C1P2

F5

9:A4

LVDS_TX_OUT_TB0+

B1 C1

B1_IO_4

BCM7411_DVI_OUT[6]

C1100 C123 0 . 1 uF

9 : A 4 ; 9 : E4

LVDS_TX_OUT_TB0-

B1_IO_2 B1_IO_3

BCM7411_DVI_OUT[16]

1:A3 BCM7411_DVI_HSYNC2

LVDS_TX_AVDD2P5_2 LVDS_PLL_AVDDC1P2

HD_DVI_11

B1 F6

VIO

C2

BCM7411_DVI_OUT[4] BCM7411_DVI_OUT[5]

B1_IO_34

LVDS_TX_AVSS_4 LVDS_TX_AVSS_5 LVDS_TX_AVDD2P5_1

HD_DVI_9 HD_DVI_10

B2

29

B1_IO_1

BCM7411_DVI_OUT[3]

D3.3V

EBI_ADDR/PCI_AD[17]

NC3

B1_GNDIO_2

LVDS_TX_AVSS_3

A3 B3

28

D1;10:BA17

D2

H4

HD_DVI_5

E4

30

EBI_CS0b

G4

LVDS_TX_AVSS_1 LVDS_TX_AVSS_2

B4 D4

27

EBI_RDb

A0

K3

LVDS_TX_1_CLK_P

HD_DVI_3 HD_DVI_4

LVDS_TX_OUT_TA4+

A4

31

K2

HD_DVI_2

9 : A 4 ; 9 : E4

26

EBI_DATA/PCI_AD[0 ]

CE

J3

LVDS_TX_0_CLK_P LVDS_TX_1_CLK_N

LVDS_TX_OUT_TA4-

NC2

32

VSS1

B1_IO_27

HD_DVI_0 HD_DVI_1

9 : A 4 ; 9 : E4 9 : A 4 ; 9 : E4

25

EBI_DATA/PCI_AD[8 ]

OE

B1_IO_28

LVDS_TX_1_DATA_4_P

9 : A 3 ; 9 : E5

LVDS_TX_OUT_TA3LVDS_TX_OUT_TA3+

33

DQ0

B1_IO_26

LVDS_TX_1_DATA_4_N

9 : A 3 ; 9 : E5

LVDS_TX_OUT_TA2+

NC1

24

EBI_DATA/PCI_AD[1 ]

DQ8

B1_IO_29

LVDS_TX_1_DATA_3_P

VDAC_2 VDAC_3

9 : A 3 ; 9 : E4

LVDS_TX_OUT_TA2-

A1

34

EBI_DATA/PCI_AD[9 ]

DQ1

SYS_RESET b 1 : D 6 ; 2 : B 3 ; 4 : B 6 ; 8 : A3

AH13

VDAC_1

9 : A 3 ; 9 : E4

LVDS_TX_OUT_TA1+

EBI_ADDR/PCI_AD[18]

23

DQ9

BCM7411_DVI_OUT2[29]

BCM7411_DVI_HSYNC2 BCM7411_DVI_VSYNC2

LVDS_TX_1_DATA_2_P LVDS_TX_1_DATA_3_N

LVDS_TX_OUT_TA1-

A2

1K

11:N11 11:N22

AK11

VDAC_RBIAS VDAC_0

D5 E5

HD_DVI_13

AH9

AH12

BCM7411_DVI_DE2

LVDS_TX_1_DATA_1_P LVDS_TX_1_DATA_2_N

HD_DVI_8

AJ11 AK10

LVDS_TX_1_DATA_1_N

VDAC_DREG

C5

EBI_ADDR/PCI_AD[19]

35

0 . 1 uF

BCM7411_DVI_OUT2[14] BCM7411_DVI_OUT2[0-14] 11:K7 BCM7411_DVI_CLK2 11:U17

LVDS_TX_1_DATA_0_P

VDAC_AVSS3 VDAC_AVDD1P2

C6 B5

A3

36

22

C1102

AK8

LVDS_TX_0_DATA_4_P LVDS_TX_1_DATA_0_N

VDAC_AVSS2

B6

9 : A 3 ; 9 : E5 9 : A 3 ; 9 : E5

EBI_ADDR/PCI_AD[20]

37

21

BCM7411_DVI_VSYNC

BCM7411_DVI_OUT2[13]

VDAC_AVDD3P3_2 VDAC_AVSS1

D7 E7

LVDS_TX_OUT_TA0LVDS_TX_OUT_TA0+

A4

38

20

10:BB24

AK9 AN7

LVDS_TX_0_DATA_4_N

HD_DVI_7

AL8 AM7

BCM7411_DVI_OUT2[11] BCM7411_DVI_OUT2[12]

VDAC_AVDD3P3_1

HD_DVI_6

AL7 AN6

BCM7411_DVI_OUT2[10]

LVDS_TX_0_DATA_3_P

C7

EBI_ADDR/PCI_AD[21]

19

EBI_DATA/PCI_AD[2 ]

AD29 AD30 AE31 AE30 AD6

SCL0_3.3V

8:A3

SDA0_3.3V

8:A3

SCL1_5V

5:C3

SDA1_5V

5:C3

SCL2_3.3V

AD5

SDA2_3.3V

AE4 AE3

REV_SEL0 REV_SEL1 REV_SEL2 READY

BCM7411_DVI_OUT2[8]

LVDS_TX_0_DATA_2_P LVDS_TX_0_DATA_3_N

VDAC_BGVDD2P5

B7

A5

EBI_DATA/PCI_AD[10]

DQ2

READY R106 100

AP5 AN5

BCM7411_DVI_OUT2[9]

LVDS_TX_0_DATA_2_N

CHIP3POD_MOVAL

D1

A6

EBI_ADDR/PCI_AD[22]

C124 0 . 1 uF

EBI_DATA/PCI_AD[3 ]

DQ10

READY R105 100

BCM7411_DVI_OUT2[5] BCM7411_DVI_OUT2[6] BCM7411_DVI_OUT2[7]

LVDS_TX_0_DATA_1_P

CHIP2POD_MOSTR T

F4 D2

A7

EBI_ADDR/PCI_AD[23]

DQ3

R104 100

AM6

LVDS_TX_0_DATA_1_N

CHIP2POD_MDO 7

G7

EBI_ADDR/PCI_AD[24]

EBI_DATA/PCI_AD[11 ]

BCM7411_DVI_OUT2[15-29 ]

AL6

BCM7411_DVI_OUT2[4]

CHIP2POD_MDO 6

LVDS_TX_0_CLK_N

AP4

BCM7411_DVI_OUT2[3]

LVDS_TX_0_DATA_0_P

J4 G8

39

DQ11

1K

AN4

LVDS_TX_0_DATA_0_N

J3

40

1K

AM5

BCM7411_DVI_OUT2[1]

CHIP2POD_MDO 4 CHIP2POD_MDO 5

EBI_ADDR18/PCI_CBE2

A17

J2 K4

41

17 18

1K

BCM7411_DVI_OUT2[0]

CHIP2POD_MDO 3

D3;10:BA15

K3

16

D3.3V

EBI_DATA/PCI_AD[4 ]

VCC

1K

AM25

DVO_0_HSYNC DVO_0_VSYNC

EBI_ADDR19/PCI_CBE3

EBI_DATA/PCI_AD[12]

DQ4

1K

AN27 AM26

BCM7411_DVI_OUT2[2]

11:O11

AM27 AN26

560

R111

C109 0 . 1 uF

CHIP2POD_MDO 1 CHIP2POD_MDO 2

A18 D3;10:BA15

42

EBI_DATA/PCI_AD[5 ]

DQ12

R103

AJ27 AP26 C106 0 . 1 uF

DVO_0_DE

K6 K2

15

DQ5

R108

AK27 C108 0 . 0 1 uF AK26

L100 HB-1M1608-102J T

CHIP2POD_MDO 0

RY/BY

H1

43

R102

AJ26

C105 0 . 1 uF

A1.2V

DVO_0_CLK_POS

WP/ACC

J8

44

4.7K R144

AL27

DVO_0_CLK_NEG

J7

EBI_ADDR22/PCI_STOP b

45

4.7K R143

AM28

C107 0 . 1 uF C104 4 . 7 uF

POD2CHIP_MIVAL CHIP2POD_MCLKO

D2

46

12

14

READY

E32 G28

DVO_0_29

A21

H4

11

13

EBI_DATA/PCI_AD[13]

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

CPLD/BCM7411 PWR

A 2 ; 4 : E 6 ; 5 : A 5 ; 9 : E4 A 2 ; 4 : E 6 ; 5 : A 5 ; 9 : E4

SCL3_3.3V

4 : F 1 ; 9 : A6

SDA3_3.3V

4 : F 1 ; 9 : A6

EBI_TSIZE0 EBI_TSIZE1 EBI_WE0 EBI_WE1 NAND_PB

READY READY READY READY

READY READY READY READY C121

E33 H30

AL26

DVO_0_27 DVO_0_28

POD2CHIP_MISTR T

WE RESET

EBI_DATA/PCI_AD[6 ]

DQ13

4.7K R141

E30

DVO_0_26

POD2CHIP_MDI6 POD2CHIP_MDI7

A20

EBI_WE1b SYS_RESET b

EBI_DATA/PCI_AD[14]

DQ6

4.7K R142

F30

DVO_0_24 DVO_0_25

POD2CHIP_MDI5

EBI_ADDR20/PCI_PAR EBI_ADDR21/PCI_IRDYb

D3.3V

EBI_DATA/PCI_AD[7 ]

DQ14

READY

H31

A2.6V

POD2CHIP_MDI3 POD2CHIP_MDI4

D2 D2 D1;10:BA16 2 : B 3 ; 4 : B 6 ; 8 : A 3 ; 11 : O 11

47

EBI_DATA/PCI_AD[15]

DQ7

C120

F33

A3.3V

DVO_0_23

G3 F2

10

DQ15/A_1

4.7K R140

F34

DVO_0_21 DVO_0_22

POD2CHIP_MDI2

J5

48

C119

H27

DVO_0_20

POD2CHIP_MDI0 POD2CHIP_MDI1

H3 G2

49

9

C118

F32

POD2CHIP_MCLKI

A19

G1

50

8

C117

J 27 C34

DVO_0_18 DVO_0_19

A8

51

7

1K

J 29 J 28 D32

CHIP2POD_CR X CHIP2POD_DR X

EBI_ADDR/PCI_AD[25]

K7

6

4.7K R139

K27

DVO_0_17

A9

1K

C32

DVO_0_15 DVO_0_16

A10

EBI_ADDR/PCI_AD[26]

1K

E28 B34 K28

DVO_0_14

HSX_DATA HSX_SYNC

A11

EBI_ADDR/PCI_AD[27]

Boot STRAP & FLASH

E5;10:BA15

1K

G29

DVO_0_12 DVO_0_13

HSX_CLK

A12

EBI_ADDR/PCI_AD[28]

VSS2

1K

H29

PKT0_DATA PKT0_SYNC

H5

EBI_ADDR/PCI_AD[29]

52

D2

EBI_ADDR17/PCI_CBE 1 D3;10:BA15 EBI_DATA/PCI_AD[0-15]

R151 BYTE 1K

R124

B32

H6

5

EBI_ADDR25

A16

R125

C30 D30

H28

K5 H2

53

1K

R152

DVO_0_11

L6

54

4

1K

R153 R155

22

PKT0_CLK

D3.3V

E2 F3

1K

33 22

BCM Recommen d

DVO_0_9 DVO_0_10

3

R122

C31

HSX_CLK HSX_DATA HSX_SYNC

DVO_0_8

OB_IFVCO_P

A13

1K

TU2BCM3553_SDATA TU2BCM3553_SYN C

10:V28 10:V28 10:V28

DVO_0_6 DVO_0_7

OB_IFVCO_N

EBI_ADDR/PCI_AD[30]

1K

8:A3 8:A3

B33

DVO_0_5

OB_I_N OB_I_P

A14

R123

A33

TU2BCM3553_SCLK

8:A3

OB_PLLAVDD1P2

G4

EBI_ADDR/PCI_AD[31]

R121

AP32 AP33

DVO_0_3 DVO_0_4

A15

K8 J6

4.7K R138

AP31

OB_AVSS_1 OB_AVSS_2

EBI_ADDR/PCI_AD[17-31]

E4;10:BA10

E1

NC4

4.7K R137

AN31

DVO_0_2

D3.3V

NC5

C116

AL29 C102 4 . 7 uF

C103 0 . 1 uF

DVO_0_0 DVO_0_1

OB_ADCAV 2P5

55

C115

AM31

OB_AGC OB_ADCAV 1P2

56

2

1K

AL30 AK29

1

1K

AM30

0 . 1 uF

A22

1K

0 . 1 uF

H7

IC101 S29GL256N10TFI02 0 A23

1K

C100 C101

D3;10:BA16

EBI_ADDR16/PCI_CBE0

1K

A1.2V L102 HB-1M1608-102J T

EBI_ADDR24 EBI_ADDR23/PCI_DEVSEL b

R150 1K

AK34

D2 D3

IC100 BCM3553

C114

A2.6V

R157 100

A1.2V

AUDI 0

B2_IO_82

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

A 1 , A 2 , A 5 , A 8 , A 11 , A 1 4 , A 1 7 , A 2 0 , A 2 3 , A 2 6 , A 2 9 , A 3 4, E 3 , E 3 4 , F 1 , H 3 4 , J1 , K 1 0 , K 11 , K 1 2 , K 1 3 , K 1 4 , K 1 5 , K 1 6 , K 1 7 , K 1 8 , K 1 9 , K 2 0 , K 2 1 , K 2 2 , K 2 3 , K 2 4 , K 2 5 , L 1 0 , L 11 , L 1 2 , L 1 3 , L 1 4 , L 1 5 , L 1 6 , L 1 7 , L 1 8 , L 1 9 , L 2 0 , L 2 1 , L 2 2 , L 2 3 , L 2 4 , L 2 5 , L, 3 4 M1, M10, M11, M24, M25, N 1 0 , N 11 , N 2 4 , N 2 5 , P 1 0 , P 11 , P 2 4 , P 2 5 , P 3 ,4 R1, R1 0, R11 , R2 4 , R2 5, T 1 0 , T 11 , T 2 4 , T 2 5, U 1 0 , U 11 , U 2 4 , U 25 , U 3 4, V 1 , V 1 0 , V 11 , V 2 4 , V 2 5, W10, W11, W24, W25 , Y 1 0 , Y 11 , Y 2 4 , Y 2 5 , Y 3 4, AA1, AA10, AA11, AA24, AA25 , AB10, AB11, AB24, AB25, A C10, A C11, A C24, A C25, A C34, AD1, AD10, AD11, AD12, AD13, AD14, AD15, AD16, AD17, AD18, AD19, AD20, AD21, AD22, AD23, AD24, AD25 , A E 1 0 , A E 11 , A E 1 2 , A E 1 3 , A E 1 4 , A E 1 5 , A E 1 6 , A E 1 7 , A E 1 8 , A E 1 9 , A E 2 0 , A E 2 1 , A E 2 2 , A E 2 3 , A E 2 4 , A E 2 5 , AF34, AG1, A J34, AK1, A P 1 , A P 6 , A P 9 , A P 1 2 , A P 1 5 , A P 1 8 , A P 2 1 , A P 2 4 , A P 2 7 , A P 3 0 , A4P 3

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

AUDIO AD C

B1_VCCIO1_2

ROUT2

LGE Internal Use Only


D2.6V

DDR0_ADDR[3]

27

40

28

39

29

38

30

37

31

36

32

35

33

34

F1 DDR0_DQM_5

UDM

LDM

DDR0_DQM_0 E2 DDR0_WEb DDR0_CLK0b

/CK

/WE /CAS

DDR0_CASb

CK DDR0_CLK0

CKE NC_5

/CS

DDR0_CSBb

DDR0_ADDR[12]

A11

DDR0_ADDR[11]

A9

DDR0_ADDR[9]

A8

DDR0_ADDR[8]

A7

/RAS

DDR0_RASb

DDR0_CKE

A12

NC_4 DDR0_BA0

BA0

DDR0_BA1

BA1

DDR0_ADDR[10] A10/AP DDR0_ADDR[0]

DDR0_ADDR[7]

A6

DDR0_ADDR[6]

DDR0_ADDR[1]

A5

DDR0_ADDR[5]

DDR0_ADDR[2]

A4

DDR0_ADDR[4]

DDR0_ADDR[3]

A0 A1 A2 A3 VDD_3

VSS_1

18

49

19

48

20

47

21

46

22

45

23

44

24

43

25

42

26

41

27

40

28

39

29

38

30

37

31

36

32

35

33

34

DDR0_DQ[35]

DDR0_VDDO2P5_2 3

DDR0_M_Data[33 ]

DDR0_DQ[33]

DDR0_VDDO2P5_2 4

DDR0_M_Data[49 ]

DDR0_M_Data[42 ]

DDR0_DQ[42]

DDR_DATA[51]

DDR0_M_Data[51 ]

DDR_DATA[54]

VSSQ_3

DDR_DATA[56] DDR_DATA[58] DDR0_DQS4 H5

C318 0 . 1 uF

DDR0_M_Data[61 ]

DDR0_M_Data[54 ]

DDR0_M_Data[56 ]

DDR0_M_Data[51 ]

DDR0_DQ[51]

DDR0_M_Data[58 ]

DDR0_M_Data[58 ]

DDR0_M_Data[49 ]

DDR0_DQ[49]

DDR0_M_Data[56 ]

DDR0_M_Data[58 ]

DDR0_DQ[58]

R335 33

DDR0_DQM_4 F1

DDR0_DQ[56] DDR0_DQ[61]

DDR0_CLK1b D 5 ; H 5 ; I2 DDR0_CLK1 CKE

D 5 ; H 5 ; I3

A6

DDR0_ADDR[6]

A5

DDR0_ADDR[5]

A4

DDR0_ADDR[4]

33

R371

B2 DDR0_DQM_0

H6 DDR0_DQM1

R375 33

H6 DDR0_DQM7

A2 DDR0_DQM_1

NC

1

D6 DDR0_DQM_6

H6 DDR0_DQM6

GND

DDR0_REF VREF

33

C337

R378 33

H6 DDR0_DQM5

A5 DDR0_DQM_3

0 . 0 1 uF C393

2

7

3

6

4

5

DDR0_ADDR[9]

0 . 0 1 uF C394 R409 75

DDR0_ADDR[4]

PVCC

DDR0_ADDR[3] AVCC

DDR0_ADDR[1] C358 100uF

VDDQ

R380 33

B2 DDR0_DQM_5

0 . 0 1 uF C395

0 . 0 1 uF

C323 0 . 0 4 7 uF

C324 2700pF

C305 470pF

C326 100uF

C328 0 . 0 1 uF

C329 0 . 0 4 7 uF

C330 2700pF

1K

R447

AT24C512W-10SI-2. 7

C402 0 . 1 uF

6A

NC

GND

3A SYS_RESE T 10:AC4 3Y b SYS_RESET 1 : D 6 ; 2 : B 3 ; 8 : A 3 ; 11 : O 11 GND

4

11

5

10

6

9

7

8

6

4

5A

5

WP

R436 22

1 : A 2 ; 1 : H 1 ; 5 : A 5 ; 9 : E4 SDA2_3.3V

5Y

4A

4Y C418 0 . 1 uF

C419 10uF

D403

KDS184

ST_5V

P o rt

INPUT

3

1

B2

A Z1117H-3.3

B1

3.3VST_MICOM

LED_R

A2

IC404

JP732 JP731

75 R819

JP733

ZD735

75 R820

R862 470K

75 R818

ZD716 ZD718 ZD706

ZD717

R805 470K R749 470K

R851 75 75

R852

JP734

6:Y15

6:Y14

6:Y14

RGB_R

RGB_G

RGB_B

COMP2_Pr 6:Y12

C714

R710 15K

R730 15K

6:Y14

6:Y14

RGB_HS

R731 6.8K

R717 1K

R712 6.8K

R728 1K

R725 1K

R707 6.8K

RGB_VS

R715 15K

4.7K R867

C715

4.7K R868

27pF

L706 FI-A2012-271KJT

27pF

22

R860

Q700

C SDA

22

/W_PROTEC T

KRC102S

E

GND

4:H2;6:A B28;6:A B24;6:A B21

B

GND

R861

GND

GND GND

GND

RGB_SW

1:H2

ZD719

22 R839

C717 22pF 22 R843

ZD720

GND

C718 22pF

JP720 JP722 JP714

R844 0

JP709

JP711 JP712

DDC_SCL

4:D3

DDC_SDA

4:D3

JP716 ZD741

JP719

ZD721

JP717

JP715 R845 0

JP713

JP721 JP718

ZD742 ZD722

JP723

R846 0 ZD743

ZD723

J702

R478 6.8K

GND

JP407

JP406 1

GND

RxD

6 2

7:G7

GND

7 : J2

D_EYE

HSCL1/P3.0/RX D

22

R455

P4.3/AD 3

GND 4.7K

7 : J2

DDC_SDA

A4 UCOM_RX

R458

4.7K

R459

0

KEY2

READY

H2

1K 1K 1K

8:H6

GND

4:C3;E4 AI_ON/OFF

R942

VBR_B_FHD LCD R943

44

0 READY

LVDS_TX_OUT_TB4+

1:B5

LVDS_TX_OUT_TB4-

1:B5

LVDS_TX_OUT_TB3+

1:B5

LVDS_TX_OUT_TB3-

1:B5

LVDS_TX_OUT_TB1+

1:B5

LVDS_TX_OUT_TB1-

1:B4

LVDS_TX_OUT_TBC+

1:B4

LVDS_TX_OUT_TBC-

1:B5

LVDS_TX_OUT_TB2+

1:B5

LVDS_TX_OUT_TB2-

1:B5

LVDS_TX_OUT_TB0+

1:B5

LVDS_TX_OUT_TB0-

1:B5;E4

LVDS_TX_OUT_TA4+

1:B5;E4

LVDS_TX_OUT_TA4-

1:B5;E4

LVDS_TX_OUT_TA3+

1:B5;E4

LVDS_TX_OUT_TA3-

1:B5;E4

LVDS_TX_OUT_TA1+

IC406

P 5 .3 34

P 5 .0

P 5 .1

P 5 .2 35

36

33

P 5. 4

32

P 5. 5

31

P 5. 6

R498 1K

30

P5.7/CL KO2

R496 1K

29

P7.0/HBLANK

28

P4.1/AD 1

27

P7.1/VBLANK

26

P7.2/HCLAMP

25 24

P 6. 7

23

P 6. 5

P 6. 6

F5

LVDS_PANEL_CTRL 9:G5 DISP_E N

9 : A 6 ; 9 : E3

INV_ON/OFF_3.3

H7

RL_ON_3.3

H7

AC_DET

8

1

7

2

6

3

5

4

A0

R500

SCL R445 22

GND GND

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

C433 22pF

SDA

1K

LIVE_ON_3.3

H7

GND

GND

22 P 6 .4

2

0

3

1:B5;A3

1:B4;E4

LVDS_TX_OUT_TAC-

1:B5;E5

LVDS_TX_OUT_TA2-

1:B5;E5

LVDS_TX_OUT_TA0+

0

R932

1KB

4

5

D2_1

A2;E3

C904 47uF 25V

FOR PANEL POWER SEQUENCE T1 TIMING Q900

0 . 1 U / 1 6 V - - > 0 . 1 U / 5 0V 47U/16V --> 47U/25V

GND

GND

FOR PANEL POWER SEQUENCE T1 TIMIN G

6

LVDS_TX_OUT_TA2+

9 1:B4;A3

LVDS_TX_OUT_TAC-

10

32

1:B4;A3

LVDS_TX_OUT_TAC+

11 12

30

1:B5;A3

LVDS_TX_OUT_TA1-

13

29

1:B5;A3

LVDS_TX_OUT_TA1+

14

27

1:B5;A4

LVDS_TX_OUT_TA3-

16

26

1:B5;A4

LVDS_TX_OUT_TA3+

17

24

1:B5;A4

LVDS_TX_OUT_TA4-

23

1:B5;A4

LVDS_TX_OUT_TA4+

15

18

SCL2_3.3V AI_ON/OFF SDA2_3.3V

19

READY

0

D3.3V

4:H3;A6 DISP_EN READY A2;I 6

21

R969

R970

R923 10 WXGA_LPL C906 100pF WXGA

16

+12.0V

20 READY

0

R971

17

22

WXGA_LCD R963 100 R964 100 READY

24 1

25

WXGA_LCD

R965

0

26

WXGA_LCD

R966

0

27

0

DAC B/D Power

23

2 28

WXGA_LCD_12V

3

29

14

30

13

GIL- G-03-S3T2 P901

31

12 GND 11

32 33

10

22

LVDS_PANEL_CTRL

2SC3875S

5

33

19

R946

G2

L901

C902 0 . 1 uF 50V

4

8

20

LVDS_TX_OUT_TA0-

D2_2

WXGA_LCD

7

21

LVDS_TX_OUT_TA2+

4:H3

E

LVDS_TX_OUT_TA2-

22

9 8

6

3.3VST_MICOM

5 E 3 ; I6

WXGA_LCD_12V

4

GND

3 2 1 FHD FI-R51S-HF P903

GND

GND

R491

1K

4.7K

4.7K

21

18

19

20

P 6 .3

LVDS_TX_OUT_TAC+

1:B5;E5

5 : A 6 ; 5 : G1

/W_PROTEC T

R416 100 R417 100

C434 22pF

B3

KEY2 B2

KEY1

C436 0 . 1 uF

GND

GND

A2

R446 22

GND

R470 22

R952

1

0

R968

28

1K

6

7

MICOM_RESE T

C435 0 . 1 uF

A1

1 : H 1 ; 9 : A6

WP

1K

VCC C432 0 . 1 uF

0

GND

R967

WXGA

35

8:I6

68K R492

C437 0 . 1 uF

GND

F5

R464

LED_G C416 0 . 1 uF

GND 12

READY 8 : H 6 ; 8 : I6VBR_B_HD

1:B5;A3

36

33K R499

GND

1K

X400 24MHz

R469 22

AT24C16AN-10SI-2. 7

R953

0

READY

37

R944

D1_1

3

3.3VST_MICOM

LCD

LED_R L405

WXGA R951 0

4 :F5 ; B5 VBR_B_EXT

15

R423 4.7K

L404

JP405

WXGA_LCD

READY R949 0 R950

38

1K

D1_2

7

S2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

GND 8:A7

JP404

LVDS_TX_OUT_TA0LVDS_TX_OUT_TA0+

39

R938

8

2

C

1:B5;A3 1:B5;A3 40

LVDS_TX_OUT_TA1-

1:B4;E4

1:B5;E5

R485

POWER_CTL_3.3 V

3.3VST_MICOM

8

P 6 .1

15

R422 4.7K

T h i s P o i n t M u s t b e c h e c k e. d

43

0

GND

READY R487

3.3VST_MICOM

FI-X30SSL-HF

42

1:B4

1

WXGA_LCD_12V

45

0

S1

G1

FOR PANEL POWER SEQUENCE T1 TIMIN G

P900 READYR941

18

C426 0 . 1 uF

R489

GND

C414 0 . 1 uF

6:AO22

1K

C3

POWER_CTL_2.6V_1.2 V 8 : E 1 ; 8 :G3 ; 8 :H 1

IR

MUTE1

R451 L403

GND

P 6 .2

R463 15K

MUTE2

1K

5:A4

JP403

R450

VSS 16 P4.0/AD 0 17

C431

0.1uF

H2

P6.0/CL KO1

R453

KEY1

4.7K

3.3VST_MICOM

L402

C415 0 . 1 uF

1K

6 : A B 2 8 ; 6 : A B 2 4 ; 6 : A B 2 1 ; 7 : I3

C412 0 . 1 uF

C411 0 . 1 uF

LED G 10

MTV416GMF

I S D A / P 3 . 4 / T0 10 I S C L / P 7 .5 11

JP401

GND

6

7 P 3 . 2 / I N T0 8 P 3 . 3 / I N T1 9

L401 1

IC407

5

HSDA1/P3.1/TXD

22

R457 R449 220

IR

JP400

LED R 9

6.8K R473

2 P1.7/SOG I 3 RST 4

M i c o m Op t i o n 3 Pi n - H i g h

ST_5V

1

VSYNC/P1.6

Micom Option 3 Pin _ Lo w

R443

B2

C413 0 . 1 uF

GND

Q901 SI4925BDY

R933 47K

WXGA_WAFER

46

1K

ST_5V

HH-1M 2012-121 L400

7

47

25

READY R418

0

HSYNC/P1.5

GND

SMW200-12

JP409

48

100

R440

R438 READY

1K

R439 4. 7K 0

C429 0 . 1 uF

DDC_SC L

JP402

R940 READY

34

READY R419

AI_ON/OFF POD

R437

2SC3875 S E

G

GND

R441 OPT

8:H6

READY

PDP : LCD :

3 2

C428 0 . 1 uF

4

0

1:B5;E4

37

1

Q400

38

ST_5V

9 : A 5 ; 9 : E4

33K

C B

O

P4.2/AD 2

I

P 1 . 0 / E T2

KIA7029AF

A02-0915-10 1

VDD

JP408

C A2

41

D402 SDC15 A1

C A2

39

D401 SDC15 A1

C3 UCOM_RX

R481

40

220pF

T2IN

R2OUT

R466

P1.1/DA 0

1:H2 BCM_TX

T1IN

5 10

X1

9

C410

P1.3/DA 2

10

8

C409 220pF

P1.4/DA 3

11

7

1:H2 BCM_RX

R1OUT

P1.2/DA 1

6

GND

4 :F5 ; E5 VBR_B_EXT

+12.0V

49

GND

GND

R484

IC405

4 9

43

R2IN

C901 0 . 1 uF

51 50

R935

4.7K R934 READY

1K

READY ONLY FOR LCD R939 4.7K LCD

8

R1IN

44

V-

T2OUT

12

C900 0 . 1 uF

LCD Module Only

LVDS OUTPUT(WXGA)

52 R945 L900

D3.3V

D3.3V

R483

42

0 . 1 uF

5

3.3VST_MICOM

3

12 HSCL2/P7.3 13 X2 14

C2-

13

7

1K

C404

4

TxD

T1OUT

R462

C2+

14

R452 10K

0 . 1 uF

3

R448 47K

C1-

READY

D3.3V

42" FUll HD(WCG) : NOT Assembl e

READY R903 4.7K

J 7 ; 8 : I6

J7 ; 8 :H 7

READY READY

KDS184

HSDA2/P7.4

15

1 : H 1 ; 9 : A6

2

H6;8:H7

3 7 " 4 7 " F Ul l H D : A s se mbl e

LIVE_ON

3.3VST_MICOM

R482

SCL3_3.3 V

V+

C420

RL_ON

J 7 ; 8 : I6

LIVE_ON

22 22

R937 22

READY

A1

16

A2

1

SDA3_3.3V

0 . 1 uF

6:L26

C407

GND

C408 0 . 1 uF

VCC

RL_ON

DISP_EN SDA3_3.3V

31

C424 10uF

D404

C

P400

ADM3232E ARNZ

C406 22uF

GND

0

R936 R947

SCL3_3.3V

4:H3;E3 1 : H 1 ; 4 : F1

H 6 ; 8 : I6

C425 0 . 1 uF

HDMI_CEC

IC402 C1+

INPUT CONNECTOR

D e t e c t + 3 . 3 V f o r P o w e r S e q u e n c e ( B C M 1 . 2 V, 2 . 6 V, 3 .)3 V

ADJ/GND

OUTPUT

0

R505

READY Q404 R520 2SC3875 S 470 READY C E READY R521 Q405 B 470 2SC3875 S READY C E B Q406 2SC3875 S READY E

+3.3V

3.3VST_MICOM

GND 11

SCL

GND

GND

41

2 C405 10uF

R504

H 6 ; 8 : I6

INV_ON/OFF

100 R488

Ser i a l

A1

C

6.8K R471

GND

GND INV_ON/OFF

0

R503

READY R511 470

Q403 2SC3875 S READY E

B

1 : A 2 ; 1 : H 1 ; 5 : A 5 ; 9 : E4 SCL2_3.3V

SDA

Q402 2SC3875 S READY E C

LIVE_ON_3.3 H3

R435 22

SCL

9 : B 5 ; 9 : E5

2Y

7

3

C

READY R519 470

GND

12

2

1K

3

6Y

Q401 2SC3875 S READY E B

C417 0 . 1 uF

READY R510 470

1 : H 1 ; 4 : F1 R516 4.7K READY

R475

4

2

1Y

C401 10uF

B

RL_ON_3.3 H3

VCC

R514 4.7K READY C

8:H6

13

A1 G

8

VBR_B_EXT

2

1

VCC

READY R509 470 B

5V_MNT

14

3.3K R474

1

8:H6

1A

O

LED_G

3

5

1

2A

GND

5

ONLY FOR PDP R513 READY

R512 4.7K READY R508 100K READY

R507 100K READY C

INV_ON/OFF_3.3 H3

VBR_A

74LVC14APW

A0 I

2

5V_ST

6

4

ST_5V

R506 READY R502 100K READY

IC403

1K

R444

1K

IC400 KIA7029AF

R430 330

75

DDR0_CKE

ST_5V

L406 READY

D3.3V

3

1

D3.3V

IC401 R400

R431 680

JTAG_RESET b SW400 SKHMPWE010

D3.3V

R433 10K

2 : E1

6

GND

+5.0V

D3.3V D3.3V

5

Q702 2SC3875 S R729 E 22

TP186

LVDS OUTPUT(Full HD)

NVRAM

D3.3V

IR

B

DDR

L407 READY

GND

Q701 2SC3875 S R714 22

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

DDR0_BA1 DDR0_ADDR[10]

+5.0V

3

E

R414 75

DDR0_BA0

C319 470pF

RESE T

2

TP190

DDR0_ADDR[8]

A2;A5;B5;B2;H7

C327 0 . 1 uF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

GND

JP705

3

TP189

B

R972 47K

C322 0 . 0 1 uF

R415

GND

JP704

JP706

J700

DDR0_ADDR[6]

B5;B2;D5;D2;H5

KEY1

ZD708 ZD709

0 . 0 1 uF C396

R413 75

DDR0_ADDR[0]

KEY2

JP703

TP187

GND

DDR0_CASb DDR0_ADDR[5]

A2;A5;B5;B2;H5

A2;A5;B5;B2;H7

P401

JP702

DDR0_WEb

A2;A5;B5;B2;H5

D2 DDR0_DQM_4

H6 DDR0_DQM4

B5 DDR0_DQM_2

H6 DDR0_DQM2

D2.6V

C321 0 . 1 uF

C320 100uF

C403

ZD736 5.1V

A2 C

C Q703 2SC3875 S R727 22

ZD729

READY C748 0 . 0 1 uF 50V

ZD733 5.1V

E

C907 8200pF 50V

D2.6V

0 . 1 uF

READY R723 82

TP191

R873 1K

DDR0_RASb

A2;A5;B5;B2;H5

C357 2 . 2 uF

R410 75

DDR0_CSBb

A2;A5;B5;B2;H5 C359 1uF

R374

JP701

75

DDR0_ADDR[2] V_SENSE

R379 75

JP700

DDR0_ADDR[11]

VTT

VSS_1 R372 33

0 . 0 1 uF C392

75

R407 75

DDR0_VTT

R373 75

ZD703

75 R853

R411

D2.6V

8

READY R721 82

READY R705 82

B

WP

C724 0 . 1 uF

DDR0_ADDR[7]

DDR0_ADDR[0-12]

A4;D5;D2;H7;I2

75

DDR0_ADDR[12]

C336 10uF

C352

READY R702 82

75

DDR0_CLK0b B5;B2;H5

IC305 SC2595ST R

B6 DDR0_DQM_7

READY R720 82

DDR0_VTT

DDR0_CLK0 B5;B2;H5

A1;A4;D5;D2;H7

R377 33

DDR0_VTT

H6 DDR0_DQM3

R405 75

DDR0_CLK1b D5;D2;H5

DDR0_ADDR[0-12]

R376 75

DDR0_ADDR[7]

A7

READY C741 0 . 0 1 uF 50V

R408

220uF

DDR0_ADDR[8]

A8

DDR0_M_Data[49 ]

DDR0_VTT

DDR0_ADDR[9]

A9

C351 1000pF

R412

B 5 ; B 2 ; D 5 ; H 5 ; I1 DDR0_CKE DDR0_ADDR[0-12] A1;A4;D5;H7;I2 R369 33 H6 DDR0_DQM0

NC_5

DDR0_ADDR[11]

C350 0 . 0 1 uF

DDR0_CLK1 D5;D2;H5 DDR0_VTT

R370 75

READY R722 82

DDR0_M_Data[51 ] C349 0 . 1 uF

R406

DDR0_VTT

CK

R404 75

DDR0_M_Data[54 ]

DDR0_M_Data[61 ]

DDR0_M_Data[56 ] DDR0_M_Data[61 ]

/CK

DDR0_ADDR[12]

DDR0_M_Data[45 ]

R368 33

UDM

A11

DDR0_M_Data[40 ]

C347 C348 0 . 0 1 uF 1000pF

R366 33 R367 33 DDR0_DQ[54]

C331 470pF

A12

C346 0 . 1 uF

DDR0_DQ[45]

VREF VSS_2

R403 75 DDR0_M_Data[42 ]

G24

DDR0_DQ[40]

DDR0_M_Data[54 ]

DDR_DATA[61]

DDR0_REF

UDQS

J 24 J 25

DDR0_M_Data[40 ]

NC_7

NC_6

DDR0_M_Data[33 ]

DDR0_M_Data[45 ]

R333 33

DDR_DATA[36]

C345 1000pF

C TP188

10K

DQ8

DDR0_VDDO2P5_2 1

DDR0_M_Data[35 ]

DDR0_M_Data[42 ]

DDR_DATA[49]

C344 0 . 0 1 uF

J 23

DDR0_VDDO2P5_2 2

DDR0_M_Data[40 ]

DDR_DATA[42]

C343 0 . 1 uF

J 22

DDR0_VDDO2P5_2 0

DDR_DATA[40]

DDR0_M_Data[35 ]

J 21

GND

R854

VDDQ_4

DDR0_M_Data[38 ]

DDR0_M_Data[45 ]

DDR0_VDDO2P5_1 8

R402 75

DDR0_M_Data[38 ]

10K

DDR_DATA[45]

DDR0_M_Data[29 ]

R847

DDR_DATA[37]

DDR0_M_Data[24 ]

C342 1000pF

1uF

DDR_DATA[38]

DQ9

C341 0 . 0 1 uF

7

5. 6K R833

DQ10

C340 0 . 1 uF

J 19 J 20

DDR0_VDDO2P5_1 9

R401 75

DDR0_M_Data[26 ] C338 C339 33uF 10uF

J 18

5:C2 COMP_R_IN_2

DDR_DATA[39]

VSSQ_4

J 16 J 17

2

JP745 A1

C745 10uF 16V

NC_3

51 50

DQ11

R329 33 R330 33

470pF

J 15

DDR0_VDDO2P5_1 7

C742 10uF 16V

VCC

14

41

C313 470pF

16

DDR_DATA[35]

DDR0_VDDO2P5_1 5 DDR0_VDDO2P5_1 6

C743 0 . 1 uF 16V

8

16

42

26

C316 0 . 1 uF

52

15

DDR0_DQ[29] R364 33 R365 33 DDR0_DQ[38]

DDR0_VDDO2P5_1 4

DDR0_DATA62 DDR0_DATA63

16V 0 . 1 uF C744

1

12

43

25

VSS_2

53

14

17

DDR0_M_Data[29 ]

DDR0_VDDO2P5_1 2 DDR0_VDDO2P5_1 3

DDR0_DATA61

A0

15

44

24

NC_2 VDD_2

DDR0_M_Data[38 ]

DDR0_DATA59 DDR0_DATA60

+5.0V

L708 120OHM

10

45

23

LDQS

DDR0_REF

DDR_DATA[38]

DDR0_DQ[60] C26 DDR0_DQ[61] C27 DDR0_DQ[62] D25 DDR0_DQ[63] B26

DDR0_DQ[17]

C391

J 14

P700

+5.0V

IC701 AT24C02BN-10SU-1. 8

+9V

11

22

DDR0_DQS0

DDR0_DQ[24]

SMW200-14 C716 0 . 0 1 uF

R832 75

R827 75

13

46

H5 DDR0_DQS5

H6

UDQS

54

13

DDR0_DQ[26]

DDR0_M_Data[24 ]

JP744

0

ZD728

GND

7

21

VDDQ_3

VSSQ_3

VREF

55

12

DDR0_M_Data[26 ]

R823 75

GND

DDR0_ADDR[2]

DDR0_ADDR[0]

DDR0_ADDR[1]

A3

47

20

NC_7

NC_6

56

DDR0_DQ[19]

DDR0_M_Data[17 ]

DDR0_M_Data[33 ] DDR0_M_Data[35 ]

JP743

R700

5

A2

48

19

NC_1

57

11

DDR0_M_Data[19 ]

DDR0_M_Data[26 ]

DDR_DATA[35]

ZD750

ZD749

9

A1

VDD_3

49

18

DQ7

DDR_DATA[47]

DDR_DATA[4 ]

58

10

DDR0_M_Data[22 ]

DDR0_M_Data[24 ]

DDR_DATA[33]

2

1 C739 27pF 50V

8

A0

50

DQ8

59

9

DQ12

DDR0_M_Data[29 ]

DDR_DATA[26]

R857 0

4

A10/AP

51

17

VSSQ_2

VDDQ_4

8

VDDQ_5

R327 33

DDR_DATA[24]

DDR_DATA[29]

ZD730

JP742

6

DDR0_BA1

52

16

DQ6

VDDQ_2

DDR_DATA[34]

DDR0_M_Data[19 ] DDR0_M_Data[17 ]

ZD731

GND

2

BA1

15

DQ5

DDR_DATA[46]

60

DDR_DATA[33]

DQ13

R750 75

5

ZD748

3 C738 27pF 50V

3

DDR0_BA0

A 5 ; B 5 ; B 2 ; H 7 ; I1

53

14

DDR_DATA[45]

DDR_DATA[5 ]

7

DQ14

470pF

R434 75

DDR0_M_Data[22 ] D2.6V

ZD726

1

/CS

54

13

DDR_DATA[44]

DDR_DATA[6 ]

DQ9

61

DDR_DATA[32]

VSSQ_5

DDR0_M_Data[13 ]

ZD747

4 R856 0

P701

/RAS

NC_4 BA0

A 5 ; B 5 ; B 2 ; H 7 ; I1

55

DQ4

DDR_DATA[7 ]

DQ10

VSSQ_4

6

DQ15

R798 75

C390

470pF

F9

J 13

ZD746

S-VIDEO2_L

75 R840

/CAS

12

DQ11

DQ3

62

C375

6

JP741

SHIELD_PLATE

6:Y11

7

JP740

S-VIDEO2_C

75 R841

/WE

56

DDR_DATA[40]

63

R794 75

470pF

DDR0_M_Data[8]

J 11

C740 27pF 50V

S-VIDEO2_S W

75 R842

E2 DDR0_DQM_1 A 5 ; B 5 ; B 2 ; H 5 ; I1 DDR0_WEb A 5 ; B 5 ; B 2 ; H 5 ; I1 DDR0_CASb A 5 ; B 5 ; B 2 ; H 5 ; I1 DDR0_RASb A 5 ; B 5 ; B 2 ; H 5 ; I2 DDR0_CSBb

57

11

DDR_DATA[3 ]

64

5

R836 470K

6:Y11

C746 10uF 16V

LDM

58

10

DQ12

65

4

R399 75

DDR0_M_Data[10 ]

A24 A27

1:H2

5:A2

RGB_L_IN 5.6K R838

1uF

C747 10uF 16V

NC_3

59

9

VSSQ_1

VDDQ_5

2 3

A21

J 12

C732

C719 100pF

R834 470K

NC_2

8

DQ2

VDDQ_1

DDR0_VDDO2P5_1 0 DDR0_VDDO2P5_1 1

C387

470pF

[RD]O_SPRING

LDQS

VDD_2

60

DQ1

DDR_DATA[41]

DDR0_DATA57 DDR0_DATA58

470pF

C374

DDR0_M_Data[1]

A18

DDR0_VDDO2P5_ 9

DDR0_DATA56

DDR0_DQ[58] C28 DDR0_DQ[59] B28

T_TERMINAL2

8

JP739

COMPOSITE2_S W 1:H4

3E

NC_1 VDDQ_3

H6 DDR0_DQS1

7

DDR_DATA[42]

DDR_DATA[2 ]

A15

R398 75

DDR0_M_Data[6] DDR0_M_Data[3]

1uF 470pF C360 470pF

C737

DQ7

DDR_DATA[15]

61

DDR_DATA[43]

DDR_DATA[1 ]

DQ13

VSSQ_5

DDR0_VDDO2P5_ 7 DDR0_VDDO2P5_ 8

C333 C334 C335 0 . 1 uF C356 1uF

4 . 7 uF 0 . 1 uF 4 . 7 uF

ZD738

VSSQ_2

6

DQ0

DDR_DATA[0 ]

DQ14

DQ15

DDR0_DQ[13] R362 33 R363 33 DDR0_DQ[22]

DDR0_DATA54 DDR0_DATA55

DDR0_M_Data[59 ] C398 C332 C397

A9

ZD715

DQ6

62

DDR0_VDDO2P5_ 6

C389 1000pF C373

5:A2 COMP_L_IN_2

DQ5

DDR_DATA[14]

63

DDR0_VDDO2P5_ 4 DDR0_VDDO2P5_ 5

DDR0_DATA53

B_TERMINAL2

6B

470pF

1000pF C372

R397 75

5. 6K R829

VDDQ_2 DDR_DATA[13]

64

5

DDR0_VDDO2P5_ 2 DDR0_VDDO2P5_ 3

DDR0_DATA51 DDR0_DATA52

DDR0_DQ[56] D27 DDR0_DQ[57] B27

DDR0_DQ[8]

DDR0_M_Data[13 ]

DDR0_M_Data[22 ] R325 33

VSS_3

DDR0_DATA49 DDR0_DATA50

DDR0_DQ[53] D24 DDR0_DQ[54] F25 DDR0_DQ[55] B25

DDR0_M_Data[57 ]

1uF

DQ4

DDR_DATA[12]

65

3 4

DDR0_DQ[10]

DDR0_DQ[50] C24 DDR0_DQ[51] G25 DDR0_DQ[52] C25

R396 75

DDR0_M_Data[62 ]

C736

DQ3

DDR_DATA[8 ]

66

2

DDR0_M_Data[10 ]

R361 33

R835 470K

9

JP738

GND

DDR0_M_Data[63 ]

DDR0_M_Data[60 ]

A12

7B

5:C2

5.6K R837

1uF C720 100pF

0 . 0 1 uF C386

R830 470K

VSSQ_1

1

DDR0_DQ[1]

L302

A1.2V

A30

DDR0_PLL_AIO DDR0_VDDO2P5_ 1

DDR0_DATA48

5

T_SPRING

C388

DDR0_CKE

B 5 ; B 2 ; D 5 ; D 2 ; I1

D28 D29

DDR0_BVSS_ 1

DDR0_DATA46 DDR0_DATA47

DDR0_CLK1b

33

B29 D9 C9

DDR0_BVSS_ 0

DDR0_DATA45

DDR0_DQ[47] D21 DDR0_DQ[48] B24 DDR0_DQ[49] E24

1000pF C371

DDR0_M_Data[52 ]

ZD737

DQ2

DDR0_DQ[6] DDR0_DQ[3]

DDR0_M_Data[1]

DDR0_M_Data[8]

DDR0_M_Data[19 ]

DDR_DATA[22]

DDR0_M_Data[6] DDR0_M_Data[3]

R359 33

R360

DDR0_M_Data[53 ]

DDR0_CLK1

JP710

DQ1

DDR_DATA[9 ]

66

DDR0_M_Data[17 ]

DDR0_DQ[59]

DDR0_BVDD1P2_ 0 DDR0_BVDD1P2_ 1

F18 B8

DDR0_VREF1

DDR0_DATA43 DDR0_DATA44

DDR0_M_Data[55 ]

DDR0_CLK0DDR0_REF

R_SPRING

DDR0_CLK0b

F19

DDR0_VREF0

DDR0_DATA42

DDR0_M_Data[50 ]

DDR0_WEb

ZD714

VDDQ_1 DDR_DATA[10]

1

DDR_DATA[17] DDR_DATA[19] D2.6V

VDD_1

DDR0_M_Data[8] DDR0_M_Data[10 ]

DDR0_DQ[60] DDR0_DQ[57]

DDR0_M_Data[59 ]

DDR0_CKE DDR0_CSB0

DDR0_DATA40

33 33 33 33

ZD713

DDR0_M_Data[13 ]

DDR_DATA[10]

DDR0_M_Data[60 ] DDR0_M_Data[57 ]

DDR0_CLK1B

DDR0_DATA38

R358

[WH]C_LUG_L

DQ0

DDR_DATA[11 ]

D2.6V

VSS_3

DDR0_DQ[62]

DDR0_DQ[45] E23 DDR0_DQ[46] B22

R352 R355 R356

[RD]1P_CAN2

VDD_1

IC304 HY5DU561622FTP-D43-C

DDR0_DATA41

DDR0_DQ[43] B23 DDR0_DQ[44] C22

D23 C23

D13

[RD]CONTACT

R323 33

DDR_DATA[8 ]

D2.6V

DDR0_DATA39

DDR0_DQ[41] D22 DDR0_DQ[42] G23

DDR0_DQ[63]

DDR0_M_Data[62 ]

DDR0_M_Data[3] DDR0_M_Data[6] R321 33

IC303 HY5DU561622FTP-D43-C

DDR0_DQ[39] E20 DDR0_DQ[40] F23

DDR0_DQ[52]

DDR0_M_Data[63 ]

R357 33

DDR0_M_Data[1]

DDR_DATA[3 ] DDR_DATA[6 ]

D2.6V

DDR0_DQ[53]

DDR0_M_Data[52 ]

DDR0_M_Data[60 ] DDR0_M_Data[62 ]

DDR_DATA[1 ]

DDR_DATA[13]

DDR0_M_Data[53 ]

DDR0_M_Data[57 ]

C13

4

C733

RGB_R_IN

ZD745 ZD724 GND

GND

R855

3216

4E

33

DDR_DATA[62]

DDR0_CLK1

1uF

ZD727

2E

R318

DDR_DATA[60]

G26

DDR0_CLK0 DDR0_CLK0B

DDR0_DATA37

5.6K R859

GND

5D

DDR0_M_Data[59 ]

DDR_DATA[57]

EXT_DDR0_CLK

DDR0_DATA35 DDR0_DATA36

R395 75

COMP2_P b

DDR0_M_Data[52 ]

DDR_DATA[59]

DDR0_DATA34

DDR0_DQ[37] B21 DDR0_DQ[38] E21

R354 33

DDR0_M_Data[48 ]

DDR0_CASb

[WH]1P_CAN

DDR_DATA[52]

VSS_1

DDR0_DQ[34] D20 DDR0_DQ[35] F21 DDR0_DQ[36] C21

DDR0_DQ[50] DDR0_DQ[55]

DDR0_M_Data[43 ]

DDR0_RASb

0 . 0 1 uF C385

2D

DDR0_DQ[48]

DDR0_M_Data[50 ] DDR0_M_Data[55 ]

DDR0_CSBb

1000pF C370

C726 100pF

R394 75

6:Y12

DDR0_ADDR[4]

DDR0_DQ[43]

DDR0_M_Data[48 ]

G19 G20

DDR0_M_Data[41 ]

C712

DDR0_ADDR[5]

A4

DDR0_DQ[41]

DDR0_M_Data[43 ]

DDR0_M_Data[63 ]

DDR0_WE

DDR0_M_Data[44 ]

27pF

DDR0_ADDR[6]

A5

DDR0_M_Data[41 ]

DDR0_M_Data[48 ]

DDR0_CAS

DDR0_M_Data[46 ]

DDR0_DQS6 DDR0_DQS7

C713

DDR0_ADDR[7]

A6

DDR0_M_Data[50 ]

R316 33

DDR0_RAS

DDR0_DQS5

0 . 0 1 uF C384

L705 FI-A2012-271KJT

A7

DDR_DATA[63]

DDR0_DQS7

DDR0_DATA32 DDR0_DATA33

DDR0_DQS4

1000pF C369

27pF

DDR0_ADDR[8]

DDR0_DATA30 DDR0_DATA31

33

DDR0_M_Data[47 ]

ZD734

DDR0_ADDR[9]

A8

DDR0_DQ[31] D15 DDR0_DQ[32] B20 DDR0_DQ[33] F20

DDR0_DQS3

B_TERMINAL1

8

ZD712

DDR_DATA[48] A9

R353 33

33 33 R385

GND R393 75

7A

10

GND

6:Y10 COMPOSITE2_I N

ZD704

DDR0_M_Data[36 ]

DDR0_DQS1 DDR0_DQS2

R347 33 R349 33 R350 33

33

E25 R332 E26 R334 E19

C703 100pF

5.6K R817

1uF

[RD]C_LUG_L

DDR0_DQ[44]

33

ZD740

[BL]C_LUG_L

DDR0_DQ[46]

DDR0_M_Data[44 ]

DDR0_DQS6

DDR0_DQS0

[RD]CONTACT

5C

DDR0_M_Data[46 ]

DDR0_M_Data[55 ]

DDR0_DQS4 DDR0_DQS5

DDR0_DATA29

33 33

F16 R326 G21 R328 G22 R331

DDR0_M_Data[37 ]

R337 33 R339 33 R341 33 R343 33 R344 33

33

4C 0 . 0 1 uF C383

JP707 [BL]1P_CANZD711

DDR0_M_Data[53 ]

DDR0_DATA27 DDR0_DATA28

E11 R320 F12 R322 G14 R324

1000pF C368

[RD]1P_CAN1

DDR_DATA[50]

DDR0_ADDR[11]

A11

R314 33

DDR0_DQ[28] C15 DDR0_DQ[29] D16 DDR0_DQ[30] B15

DDR0_M_Data[39 ]

2C

DDR_DATA[55]

DDR0_DQS3

DDR0_M_Data[34 ]

[GN]O_SPRING

DDR_DATA[53] DDR0_ADDR[12]

DDR0_DATA26

DDR0_M_Data[32 ]

75

T_TERMINAL1

5:C2

5B

R351 33 DDR0_DQ[47]

DDR0_DQS1 DDR0_DQS2

75

R319

DDR0_DQM7 33

2B

DDR0_DQ[36]

DDR0_M_Data[47 ]

DDR0_M_Data[44 ]

DDR0_ADDR[0-12]

A12

DDR0_ADDR[0-12] A1;D5;D2;H7;I2

DDR0_ADDR[10]

DDR0_M_Data[36 ]

DDR0_M_Data[41 ]

DDR0_DATA24 DDR0_DATA25

R317

DDR0_DQM5

3A

NC_5

DDR0_DQ[37]

DDR0_M_Data[46 ]

DDR0_M_Data[43 ] R312 33

DDR_DATA[46]

DDR0_DQS0

DDR0_DQ[26] G16 DDR0_DQ[27] C16

DDR0_DQM4 DDR0_DQM6

D26

AV_R_IN_1

COMP2_Y

DDR_DATA[44]

DDR0_DATA23

DDR0_DQ[24] E16 DDR0_DQ[25] B16

R348 33

F22 F26

GND

6:Y13

DDR_DATA[43] DDR_DATA[41]

DDR0_M_Data[37 ]

DDR0_M_Data[36 ]

DDR0_DM6 DDR0_DM7

C700

ZD705

R392 75

C710

DDR0_CLK1b D 2 ; H 5 ; I2 DDR0_CLK1 D 2 ; H 5 ; I3

DDR0_DQ[39]

DDR0_DM4 DDR0_DM5

DDR0_DATA21 DDR0_DATA22

[RD]0_SPRING

C702 100pF

27pF

B 5 ; B 2 ; D 2 ; H 5 ; I1 DDR0_CKE

CKE

DDR0_DQ[34]

DDR0_M_Data[39 ]

DDR0_DATA19 DDR0_DATA20

DDR0_DQ[22] F14 DDR0_DQ[23] C14

3C

5.6K R816

1uF

C711

CK

DDR0_DQ[32]

DDR0_M_Data[34 ]

DDR0_DQ[20] E15 DDR0_DQ[21] B14

0 . 0 1 uF C382

AV_L_IN_ 1 ZD739

JP708

DDR_DATA[36]

/CK

DDR0_M_Data[32 ]

DDR0_M_Data[47 ] R310 33

R346 33

[RD]1P_CAN

[GN]CONTACT

34

F2 DDR0_DQM_6

DDR0_DQ[27]

DDR0_M_Data[27 ]

2C

4A

33

DDR_DATA[47]

C325 470pF

DDR0_DQ[28] DDR0_DQ[25]

DDR0_M_Data[27 ]

R315

0 . 1 uF C367

1:H3 5:A2

C701

L704 FI-A2012-271KJT

35

C314 0 . 1 uF

UDM

DDR0_M_Data[28 ] DDR0_M_Data[25 ]

DDR0_M_Data[32 ]

DDR0_DQM3

R391 75

DDR0_M_Data[25 ]

0 . 0 1 uF C381

27pF

36

32

VSS_2

DDR0_M_Data[39 ] DDR0_M_Data[34 ]

DDR0_M_Data[28 ]

75 75

[WH]C_LUG_L

E_SPRING

6A

11

JP737 ZD744

C728

0

1:H4 COMP2_S W

37

31

DDR_DATA[32]

DDR0_M_Data[30 ]

75

R313

5B

3

ZD710

38

30

R308 33

DDR_DATA[34]

G15 E22

75

R311

DDR0_DQM2

0 . 1 uF C366

1uF

AV_L_IN_ 2

5:A2

PEJ024-0 1

[GN]1P_CAN

VSS_1

29

DDR0_REF

VREF

DDR0_DM3

R309

DDR0_DQM1

R390 DDR0_M_Data[31 ]

5.6K R858

ZD725

COMPOSITE1_S W

2A

A3 VDD_3

DDR_DATA[39]

DDR0_DQS6 H5 NC_6

DDR0_DATA18

F15

75 75

[WH]1P_CAN

PPJ209-0 2

A2

DDR0_ADDR[3]

DDR0_DQ[30]

F11 G11

R305 R306

[YL]CONTAC T

2B

COMP1_Pr

A1

DDR0_ADDR[2]

DDR0_M_Data[30 ]

DDR0_DM1 DDR0_DM2

D19

[YL]0_SPRING

4A

C708

A0

DDR0_ADDR[1]

39

DDR0_M_Data[37 ]

DDR0_DM0

DDR0_DATA16 DDR0_DATA17

3A

27pF

DDR0_ADDR[0]

40

28

DDR_DATA[37]

UDQS

DDR0_DATA15

DDR0_DQ[18] D14 DDR0_DQ[19] E14

0 . 0 1 uF C380

75

C709

DDR0_ADDR[4]

41

27

DDR0_DQ[31]

0 . 1 uF C365

R389

DDR0_M_Data[20 ]

C727 100pF

J703

27pF

DDR0_ADDR[5]

A4

26

DDR0_M_Data[31 ]

DDR0_M_Data[23 ] DDR0_M_Data[21 ] DDR0_VTT

33 DDR0_ADDR10 DDR0_BA_0 DDR0_BA_1 DDR0_DQM0

5:C2 COMP_R_IN_1

DDR0_ADDR[6]

A5

BA1

DDR0_ADDR[10] A10/AP

42

DDR0_M_Data[30 ]

DDR0_M_Data[28 ]

DDR0_BA0 DDR0_BA1

DDR0_DQ[16] B13 DDR0_DQ[17] G13

R345 33

DDR_DATA[30]

DDR0_DATA13 DDR0_DATA14

DDR0_ADDR[12]

75

DDR0_M_Data[18 ]

DDR0_ADDR[9] DDR0_ADDR[11]

AV_R_IN_2

5:C2

GND

6:Y10

COMPOSITE1_I N

5. 6K R752

DDR0_ADDR[7]

A6

BA0

DDR0_BA1

43

25

DDR0_M_Data[25 ]

R307 33

DDR_DATA[28]

VSSQ_3

DDR0_DQ[14] B11 DDR0_DQ[15] C11

33

DDR0_ADDR[8] R384

B19 F17 E17 C20

1:H5

1uF

34

A7

DDR0_BA0

24

DDR_DATA[25] NC_7

R383

G17

DDR0_ADDR09 DDR0_ADDR10

C735

33

DDR0_ADDR[8]

44

DDR0_DQ[20]

DDR0_ADDR11 DDR0_ADDR12

12 C729

R753 470K

35

DDR0_ADDR[9]

A8

NC_4

45

23

DDR0_M_Data[20 ]

G18 E18

DDR0_ADDR08

DDR0_DATA11 DDR0_DATA12

DDR0_DATA10

[RD]O_SPRING

36

32

DDR0_ADDR[11]

A9

/CS

DDR0_CSBb

22

DDR0_M_Data[27 ]

DDR0_ADDR07

DDR0_DATA08 DDR0_DATA09

DDR0_DQ[12] D12 DDR0_DQ[13] G12

[RD]1P_CAN2

37

31

A11

/RAS

DDR0_DQ[21]

DDR_DATA[27]

DDR0_DATA07

DDR0_DQ[9] C12 DDR0_DQ[10] E13 DDR0_DQ[11] B12

[RD]CONTACT

38

30

DDR0_ADDR[12]

/CAS

DDR0_RASb

46

DDR_DATA[52]

R342 33

13 JP736

2A

3E

29

DDR0_CKE NC_5 A12

DDR0_CASb

21

DDR0_DQ[23]

DDR0_DQ[11]

[Y L]1P_CAN

4E

39

DDR0_CLK0

CKE

47

DDR0_DQ[18]

DDR0_M_Data[23 ] DDR0_M_Data[21 ]

2A

2E

40

28

DDR0_CLK0b

CK

/WE

48

20

DDR0_DQ[16]

DDR0_M_Data[18 ]

0 . 0 1 uF C379

6:Y13

41

27

DDR0_WEb

49

19

DDR0_M_Data[16 ]

DDR0_M_Data[20 ]

0 . 1 uF C364

D_EYE

4:C3

R875 READY

GND

6:AM4 MNT_R_OUT

6:Y12

S-VIDEO1_S W

JP730

26

DDR0_DQM_2 /CK

18

DQ8

DDR0_M_Data[11]

DDR0_M_Data[31 ]

DDR0_M_Data[16 ]

JP735 14

R755 0

5. 6K R746

VDD_3

42

LDM

VDDQ_4

R340 33

DDR0_DQ[9]

DDR0_M_Data[16 ]

R304 33 DDR_DATA[20]

[S-VHS]0_SPRING

1uF

DDR0_ADDR[1]

A3

DDR0_ADDR[3]

DDR0_ADDR[2]

DDR0_ADDR[0]

DDR0_ADDR[10]

A2

43

25

NC_3

F2 DDR0_DQM_7

50

F13

DDR_DATA[31]

8

R747 470K

A1

44

24

C315 470pF

51

17

DDR_DATA[53]

DDR0_ADDR[6] DDR0_ADDR[7]

0 . 0 1 uF C378

R388

C706

A0

23

C312 0 . 1 uF

UDM

16

DDR_DATA[54]

DQ9

C18

DDR0_M_Data[9] DDR0_M_Data[11]

L702 FI-A2012-271KJT

A10/AP

45

VDD_2

VSS_2

52

DDR0_DQ[8]

DDR_DATA[16]

DQ10

DDR0_ADDR05 DDR0_ADDR06

0 . 1 uF C363

75

DDR0_M_Data[12 ]

C707

BA1

DDR0_BA1

46

22

NC_2

DDR0_REF

VREF

53

15

LDQS

H6 DDR0_DQS2

NC_6

54

14

DDR0_M_Data[9]

D11

DDR0_M_Data[18 ]

R303 33

DDR_DATA[18]

VSSQ_4

DDR0_DATA05 DDR0_DATA06

DDR0_ADDR[4]

READY

2B

READY

C731 100uF READY

C730 0.1uF

MNT_L_OUT6:AM4

4A

0 R815

5:A2 COMP_L_IN_1

DDR0_BA0

A 2 ; B 5 ; B 2 ; H 7 ; I1

21

UDQS

13

DDR_DATA[55]

DDR0_DQ[7]

DDR0_M_Data[14 ]

DDR0_ADDR[3] DDR0_ADDR[5]

[S-VHS]C_LUG_L4

C734

BA0

A 2 ; B 5 ; B 2 ; H 7 ; I1

47

20

H5 DDR0_DQS7

55

DQ11

DDR0_DQ[6]

DDR0_DQ[12]

R382

B17 D17 C17

[S-VHS]C_LUG_L3

ZD707

/CS NC_4

48

NC_1 VDDQ_3

VSSQ_3

56

DDR0_DQ[14]

DDR0_M_Data[12 ]

DDR0_ADDR04

7C 7D

DDR0_M_Data[15 ]

[RD]C_LUG_L

DDR0_CSBb

49

19

DDR_DATA[20]

NC_7

57

11

DDR0_M_Data[14 ]

DDR0_M_Data[23 ]

DDR0_ADDR03

DDR0_DATA04

DDR0_ADDR[1] DDR0_ADDR[2]

[WH]1P_CAN

DDR0_RASb

A 2 ; B 5 ; B 2 ; H 5 ; I2

18

DQ8

58

10

12

DQ7

DDR_DATA[63]

59

9

DDR0_M_Data[21 ]

DDR0_ADDR02

DDR0_DATA03

0 . 0 1 uF C377

75

33

[WH]C_LUG_L

A 2 ; B 5 ; B 2 ; H 5 ; I1

50

VSSQ_2

VDDQ_4

8

G10

DDR_DATA[21] DDR_DATA[23]

C19 D18 B18

5C

/RAS

51

17

DQ6

DDR_DATA[51]

E12 B10

DDR0_ADDR00 DDR0_ADDR01

DDR0_DATA02

E10

DDR0_DQ[4] DDR0_DQ[5]

DDR0_DATA00 DDR0_DATA01

2D

/CAS

DDR0_CASb

16

DQ5

DDR_DATA[62]

DQ12

DDR0_M_Data[15 ]

DDR0_M_Data[14 ]

DDR0_DQ[3]

R338 33 DDR0_DQ[15]

DDR0_M_Data[12 ]

33

DDR_DATA[14]

F10 C10

0 R814

6:Y12

S-VIDEO1_L

5D

DDR0_WEb

A 2 ; B 5 ; B 2 ; H 5 ; I1

52

15

DDR_DATA[61]

DDR0_M_Data[9]

R302

DDR_DATA[12]

B9

DDR0_DQ[1] DDR0_DQ[2]

JP727

A 2 ; B 5 ; B 2 ; H 5 ; I1

/WE

53

DDR_DATA[21]

DDR_DATA[9 ]

DDR_DATA[50]

VDDQ_5

R387

DDR0_DQ[0]

[S-VHS]C_LUG_L2

JP728

DDR0_DQM_3

54

14

DDR_DATA[22]

DQ9

DDR0_DQ[4]

[S-VHS]C_LUG_L1

7B

JP729

E1

13

VDDQ_2

DQ10

DDR0_DQ[5]

DDR0_M_Data[4]

0 . 1 uF C362

COMP1_P b

LDM

55

DQ4

DDR_DATA[60]

DDR_DATA[23]

VSSQ_4

60

DDR0_DQ[7]

DDR0_M_Data[5]

7A

S-VIDEO1_C

3A

DDR0_M_Data[4]

6:Y13

NC_3

12

DQ11

7

DQ13

DDR0_M_Data[5]

27pF

VDD_2

DDR_DATA[0-63]

56

61

DDR_DATA[11 ]

DDR0_BA1

DDR0_ADDR[0]

L701 FI-A2012-271KJT

NC_2

57

11

DQ3

DDR_DATA[56]

DDR_DATA[19]

62

6

DDR_DATA[49]

DDR0_ADDR[10]

H6

27pF

LDQS

H5 DDR0_DQS3 D7

58

10

DQ12

5

DDR0_M_Data[7] DDR0_M_Data[4] DDR0_M_Data[11]

DDR_DATA[4 ]

DQ14

DDR0_BA_1 DDR0_ADDR10

ZD702

VDDQ_3

59

9

VSSQ_1

VSSQ_5

IC100 BCM3553

DDR0_DQ[2]

ZD701 5.1V ZD732

NC_1

8

DQ2

DDR_DATA[57]

63

DDR0_M_Data[2]

[S-VHS]GROUND_TER

[GN]O_SPRING

DQ7

DDR_DATA[31]

60

DDR_DATA[18]

VDDQ_5

64

4

DDR0_M_Data[0]

R301 33

0 . 0 1 uF C376

[BL]C_LUG_L

VSSQ_2

7

DQ13

3

DDR0_M_Data[15 ]

DDR_DATA[48]

6 0 . 1 uF C361

[BL]1P_CAN

DQ6

61

DQ1

DDR_DATA[58]

DDR_DATA[15]

DQ15

DDR0_M_Data[2] DDR0_M_Data[7]

[RD]1P_CAN1

DQ5

DDR_DATA[30]

62

6

DDR_DATA[17]

VSS_3

DDR0_BA0

2C

VDDQ_2 DDR_DATA[29]

63

5

DQ14

65

H6

COMP1_Y

DQ4

DDR_DATA[28]

4

VDDQ_1

VSSQ_5

66

2

R386 75

DDR0_M_Data[0]

H6

DDR0_BA_0

6:Y13

DQ3

DDR_DATA[24]

64

1

DDR0_DQ[0-63] DDR0_DQ[0-63] F7 R336 33 DDR0_DQ[0]

C704

VSSQ_1

65

3

DQ0

DDR_DATA[59]

DDR_DATA[16]

DDR0_M_Data[0]

L700 FI-A2012-271KJT

DQ2

DDR_DATA[25]

2

DQ15

DDR0_M_Data[2]

DDR_DATA[0 ]

27pF

DQ1

VDD_1

VSS_3

R381 33

DDR0_M_Data[7]

DDR_DATA[2 ]

1:H4 COMP1_S W

VDDQ_1 DDR_DATA[26]

66

1

DDR0_M_Data[5]

DDR_DATA[7 ]

ZD700

DQ0

DDR_DATA[5 ] D2.6V

5B

PMJ029-01

[GN]1P_CAN

VDD_1 DDR_DATA[27]

IC302 HY5DU561622FTP-D43-C

D2.6V D2.6V

+9V

PPJ200-0 7

J701

DDR0_DQ[0-63]

PPJ209-0 2

IC301 HY5DU561622FTP-D43-C

D2.6V

L703 HH-1M2012-121

J 7 04

DDR0_VTT

F7 R300 33

A 03- 7071- 094

DDR0_VTT DDR0_ADDR[0-12]

A1;A4;D5;D2;I2

R863 470K

I7 DDR0_M_Data[0-63 ]

A6 DDR_DATA[0-63]

5B

C317 470pF

2B

C310 2700pF

3A

C309 0 . 0 4 7 uF

27pF

C308 0 . 0 1 uF

JP724

JP725

E7 DDR0_M_Data[0-63 ]

C307 0 . 1 uF

C306 100uF

C705

C311 470pF

[GN]CONTACT

C304 2700pF

4A

C303 0 . 0 4 7 uF

2A

C302 0 . 0 1 uF

JP726

D2.6V

C301 0 . 1 uF

C300 100uF

MICOM, TTL LGE Internal Use Only


22

R1026 7411_DDR_DQ[20 ]

7411_DDR_DQ[23 ]

Q9

22

R1027 7411_DDR_DQ[24 ]

H20;H7

100 100

7411_DDR_DQ[25 ]

H20;H7

7411_DDR_DQ[26 ]

H20;H7

22

0 . 0 1 uF R1044

100

H9 Q7

7411_DDR_DQ[22 ]

7411_DDRM_DQ[24]

R1039

H7

7411_DDR_DQ[21 ]

7411_DDR_DQS[0-3 ]

X19

7411_DDR_DM[0-3]

X20

R2IN

7411_DDR_DM[1]

22

C1053 0 . 1 uF

R1058 7411_DDRM_RAS

7411_DDRM_DQ[25]

7411_DDRM_DQ[26]

7411_DDRM_DQ[26]

7411_DDRM_DQ[27]

7411_DDRM_DQ[27]

R1020 7411_DDRM_DQ[28]

7411_DDRM_DQ[28]

R1028 7411_DDR_DQ[28 ]

P20;Q7

7411_DDRM_CLK

7411_DDRM_DQ[29]

7411_DDRM_DQ[29]

7411_DDR_DQ[29 ]

P20;Q7

7411_DDRM_CLK

7411_DDRM_DQ[30]

7411_DDRM_DQ[30]

7411_DDR_DQ[30 ]

7411_DDRM_DQ[31]

7411_DDRM_DQ[31]

7411_DDR_DQ[31 ]

C1055 0 . 1 uF

C1056 0 . 1 uF

T1IN

GIL- G-03-S3T2 P1000

AI 4 BCM7411_TXB AI 4 BCM7411_RXB

T2IN

R2OUT

0 . 1 uF C1067

0 . 1 uF C1071

0 . 1 uF C1073

R1049 22 R1050 22 R1051 22

7411_DDRM_CKE

Y21 Y21

7411_DDR_CKE

Y21

C1057 0 . 1 uF

C1059 0 . 1 uF

C1060 0 . 1 uF

C1061 0 . 1 uF

0 . 1 uF C1068

C1063 0 . 1 uF

0 . 1 uF C1072

C1069 10uF

0 . 1 uF C1074

0 . 1 uF C1076

0 . 1 uF C1078

0 . 1 uF C1083

0 . 1 uF C1085

C1079 10uF

IC809

3

7411_DDR_DQ[0] VSS_1

7411_DDR_DQ[1] 7411_DDR_DQ[2] 7411_DDR_DQ[3] J 40

7411_DDR_DQ[4]

7411_DDR_DQ[0-31 ]

7411_DDR_DQ[5] 7411_DDR_DQ[6] 7411_DDR_DQ[7] 7411_DDR_DQ[8] D2.6V

7411_DDR_DQ[9] 7411_DDR_DQ[10 ]

C1035 0 . 1 uF

7411_DDR_DQ[11] 7411_DDR_DQ[12 ] 7411_DDR_DQ[13 ] 7411_DDR_DQ[14 ] 7411_DDR_DQ[15 ] 7411_DDR_DQ[16 ] 7411_DDR_DQ[17 ]

/WE 7411_DDRM_WE

H20;R34

7411_DDRM_CAS

H20;R34

7411_DDRM_RAS 7411_DDRM_CS

/CAS /RAS /CS NC_3 BA0 H19;R37

7411_DDRM_BA0

H18;R36

7411_DDRM_BA1 7411_DDRM_A[10]

BA1 A10/AP

7411_DDRM_A[0]

A0

7411_DDRM_A[1]

A1 A2

7411_DDRM_A[2]

A3

7411_DDRM_A[3]

VDD_3

26

41

27

40

28

39

29

38

30

37

31

36

32

35

33

34

BCM7411_DVI_CLK

7411_DDRM_DM3 7411_DDRM_CLK

R34 P20;R32

7411_DDRM_CLK 7411_DDRM_CKE

P20;R33 P20;R32

R1048 240

CK CKE

NC C844

11:H17

A11

7411_DDRM_A[11]

A9

7411_DDRM_A[9]

A8

7411_DDRM_A[8]

A7

7411_DDRM_A[7]

A6

7411_DDRM_A[6]

A5

7411_DDRM_A[5]

A4

7411_DDRM_A[4]

L4 K2 K1 L2 L3 L1 M3 M2 N2 N3 NC_6 NC_2 NC_1 NC_4 NC_5 NC_3 NC_9 NC_8 NC_11 NC_12

VSS_34

VSS_31

2

VDD25_1 VDD25_2 VDD25_3 VDD25_4 VDD25_5 VDD25_6 VDD25_7 VDD25_8 VDD25_9 VDD25_10 VDD25_11 VDD25_12

VSS_PLL_3

1

2

4

6

5

7

8

11

10

9

13

1

2

12

SMW250-10

3

4

5

6

3

R826

X

O

O

X

F ul l H D 3 7 " "

R913 On l y be st u f f ed

Full HD 42"47"

R 9 11 , R 9 1 2 b e s t u f d fe

HD 32", 37", 42"

R 9 0 9 , R 9 1 2 b e s t u fdf e

V668

3

1

R 9 1 0 , R 9 1 4 b r s t u fd fe

VC C857 47uF

C858 0 . 1 uF

+9V

IC806

+12.0V

KA7809ERTM

ADJ/GND I

OUTPUT

0 . 3 3 uF

C804 C803

C864

11:D14

BCM7411_DVI_OUT[0-19]

1

C847 0 . 1 uF

G

0 . 3 3 uF

C851 22uF

C859 0 . 1 uF

GND

O

3 2

C849

C832 10uF

47uF

BCM7411_DVI_OUT[4]

0 . 0 1 uF

BCM7411_DVI_OUT[5]

0 . 1 uF

BCM7411_DVI_OUT[6] BCM7411_DVI_OUT[7]

4 . 7 uF

BCM7411_DVI_OUT[8] BCM7411_DVI_OUT[9]

+2.5V

BCM7411_DVI_OUT[10] BCM7411_DVI_OUT[11] BCM7411_DVI_OUT[12]

A2.6V

D2.6V

L809

BCM7411_DVI_OUT[13] BCM7411_DVI_OUT[14]

TU800 VA1G5BR2003

BCM7411_DVI_OUT[15] BCM7411_DVI_OUT[16] BCM7411_DVI_OUT[17] BCM7411_DVI_OUT[19] R1080

10K

R1081

1K

R1082

10K

R1083

10K

R1084

10K

R1085

10K

4 . 7 uF

1 2 3 4 EBI_CS1b

5

1:D3

1:D2

EBI_RDb

1 : D 1 ; 1 : F6

6 1:D3

BCM7411_INTb EBI_WE1b

8

EBI_ADDR16/PCI_CBE 0

1 : D 7 ; 1 : D3

EBI_ADDR17/PCI_CBE 1

1 : D 3 ; 1 : G7 1 : D 6 ; 1 : D3

EBI_ADDR18/PCI_CBE 2

9 10

1 : D 6 ; 1 : D3

EBI_ADDR19/PCI_CBE 3 EBI_DATA/PCI_AD[0-15]

EBI_DATA/PCI_AD[0 ]

7

1 : D 6 ; 1 : D1 1:D1

EBI_TAb

A2 D5 B3 B4 C4 C5 D6 B5 D7 C6 B6 A6 D8 C7 B7 C8 D11 C10 A11 B11 D12 C11 A12 B12 B13 D13 C13 A14 D14 B14 C14 B15

IC803

+3.3V

D3.3V L810

D3.3V

BCM3553_CLK_OUT

C869 0 . 1 uF

C808

BCM7411_DVI_OUT[18]

11

EBI_DATA/PCI_AD[1 ] EBI_DATA/PCI_AD[2 ]

12

EBI_DATA/PCI_AD[3 ] EBI_DATA/PCI_AD[4 ]

13

EBI_DATA/PCI_AD[5 ] EBI_DATA/PCI_AD[6 ] EBI_DATA/PCI_AD[7 ]

14

EBI_DATA/PCI_AD[8 ] EBI_DATA/PCI_AD[9 ]

15

EBI_DATA/PCI_AD[10] EBI_DATA/PCI_AD[11 ]

16

EBI_DATA/PCI_AD[12] EBI_DATA/PCI_AD[13]

17

EBI_DATA/PCI_AD[14]

SC1566I5M-2.5TR T

BB C810

B1

C871

4 . 7 uF

B2

VIN A1[RD]

0 . 1 uF

C807

SYS_RESET b

SDA

22

R900

SCL

22

R899

R825 1K

RSEDRF

0

SBYTE

R802 22

R803

TU2BCM3553_SYN C

22

R804

TU2BCM3553_SDAT A

SRCK

33

R925

TU2BCM3553_SCL K

AFT

0

SIF

R800

19

3

2

D3.3V

SPBVAL

VIDEO

C801 0 . 0 1 uF

R894 10K

SHIELD EBI_ADDR/PCI_AD[17-18]

C806 0 . 0 1 uF

6:X8

+3.3V D800 KDS226

C

A

C818 0 . 1 uF

C800 0 . 1 uF

ASEL

1

8

2

7

3

6

4

5

YOUT

BST

VCC

CVOUT

READY 0

C819 4 . 7 uF

SW

GND

1

8

2

7

3

6

4

5

COUT

READY R905 0

C867 0 . 1 uF

D3.3V

IN

TU_CVBS 6:Y10

GND

D803 KDS226 A

IC802 SC4519STR T

YI N

C838 0 . 1 uF

C837 4 . 7 uF

C854 4 . 7 uF

D1.2V +3.3V

L804 3.3uH

AC

C

FMS6400CS1 X R897 18

C836 0 . 1 uF

+1.2V

SIF 2SA1504S Q800

L800

IC808

ADJ

GND

A2[GN]

E

B

TU_+5.0V

NC

READY

L807 HH-1M2012-121

VO

4 . 7 uF

C817 22uF

L801

R895 OPT

4 3

OUTPUT

ADJ/GND

TU_+5.0V

SRDT

5

2

1 C814 10uF

A1[RD]

C

EN C834

GND

18

EBI_ADDR/PCI_AD[18]

+2.5V

IC811 AZ1117H-2.5TR/E1

SAM2333 D806

0 . 1 uF

1:H2

EBI_DATA/PCI_AD[15] EBI_ADDR/PCI_AD[17]

TU_+5.0V

C873

4 . 7 uF

1:H2

SDA0_3.3V SCL0_3.3 V

1

330

INPUT

1 : D 6 ; 2 : B 3 ; 4 : B 6 ; 11 : O 11

RESET

R828

D805 SAM2333

L811

B4

C

A2[GN]

+1.2V

B3

CIN

IC805 SC4519STR T R812 22

SYNC

C829 47uF

C830 33uF

BST

COMP

IN

FB

C833 4 . 7 uF

EN C824 560pF

C827 0 . 0 1 5 uF

SW

GND R813 1K

A1.2V

L808 HH-1M2012-121

L806 3.3uH

AC

C

1

8

2

7

3

6

4

5

R811 6.8K

R917 22

SYNC

C852 47uF

C853 33uF

C855 0 . 1 uF

C856 68uF

COMP

FB

EN C848 560pF

C850 0 . 0 1 5 uF

R918 1K

R916 6.8K

0 R806 READY

R1073 10K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

4

R824 PDP

IC807

INPUT

VOUT

5

BCM7411_DVI_OUT[3]

GND

VSS_1

+3.3V

R914 22 READY LCD

AZ1117H-1.8TRE1(EH13A )

3

C805

BCM7411_DVI_OUT[2]

R904 7411_DDRM_A[12]

+1.8V

BCM7411_DVI_OUT[1]

NC_5 NC_4

1

BCM7411_DVI_OUT[0]

UDM /CK

I 6 ; 9: E5

N1 M1 N4 P3 P4 P2 VIDO_CLKI_B NC_7 VIDO_EXT_VSYNC_B VIDO_FIELD_B NC_14 NC_13

L803

E6 E7 E8 E13 E14 E15 F5 F16 G5 G16 H5 H16

N5 N16 P5 P16 R5 R16 T6 T7 T8 T13 T14 T15

N18

K18

K19

N19

P18

VDD33_1 VDD33_2 VDD33_3 VDD33_4 VDD33_5 VDD33_6 VDD33_7 VDD33_8 VDD33_9 VDD33_10 VDD33_11 VDD33_12

VSS_29

C1082 22uF

VSS_35

C1049 0 . 0 4 7 uF

VSS_36

C1047 470pF

VSS_2

VSS_26

VREF

VSS_28

NC_6

VSS_33

JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_ N JTAG_DBG

VSS_24

K17 J19 L17 K20 J17 J18

VSS_32

10K

VSS_30

1K 1K

R1059

VSS_25

1K

R1011 R1012

VSS_22

42

1K

R1010

R34

VSS_27

43

25

7411_DDRM_DQS 3

VSS_23

44

24

DDR_VREF_741 2 UDQS

VSS_20

45

23

VSSQ_3

VSS_15

46

22

NC_7

VSS_17

47

21

R1009 7411_DDRM_DQ[24]

DQ8

VSS_21

20

VDDQ_4

VSS_18

48

7411_DDRM_DQ[25]

DQ9

VSS_16

19

7411_DDR_DQ[31 ]

VSS_19

49

D3.3V

7411_DDRM_DQ[26]

DQ10

VSS_8

50

18

7411_DDR_DQ[30 ]

VSS_13

17

7411_DDR_DQ[29 ]

VSS_14

51

7411_DDR_DQ[28 ]

VSS_5

52

7411_DDR_DQ[27 ]

VSS_6

53

16

7411_DDRM_DQ[27]

VSSQ_4

VSS_11

54

15

7411_DDRM_DQ[28]

DQ11

VSS_12

55

14

7411_DDR_DQ[26 ] DQ12

VSS_3

56

13

7411_DDR_DQ[25 ]

R912 R913 22 22 READY READY

2

TU_+5.0V

33

R801 82

LDM 7411_DDRM_DM2

R35 H20;R33

H19;R37

11 12

7411_DDR_DQ[24 ]

VSS_9

NC

57

7411_DDR_DQ[23 ]

VSS_10

NC_2 VDD_2

10

7411_DDR_DQ[22 ]

VSS_7

LDQS

58

7411_DDRM_DQ[29]

VDDQ_5

VSS_4

DQ7 NC_1 VDDQ_3

59

9

7411_DDRM_DQ[30]

DQ13

VSS_2

DQ6 VSSQ_2

7411_DDRM_DQ[23]

60

8

DQ14

VSS_1

7411_DDRM_DQ[22]

7411_DDRM_DQS 2

R35

7

7411_DDR_DQ[21 ]

10K

11:H16

A1 A7 A15 A20 B2 B19 C3 C18 D4 D17 H1 J4 J9 J10 J11 J12 K9 K10 K11 K12 L9 L10 L11 L12 L20 M4 M9 M10 M11 M12 N17 N20 P1 U4 U9 U13 U17 V3 V18 W1 W2 W19 Y1 Y2 Y7 Y14 Y20

DQ5

61

7411_DDR_DQ[20 ]

10K

R1079

A5 B8 B10 C12

PCI_AD_0/H_DATA_0 PCI_AD_1/H_DATA_1 PCI_AD_2/H_DATA_2 PCI_AD_3/H_DATA_3 PCI_AD_4/H_DATA_4 PCI_AD_5/H_DATA_5 PCI_AD_6/H_DATA_6 PCI_AD_7/H_DATA_7 PCI_AD_8/H_DATA_8 PCI_AD_9/H_DATA_9 PCI_AD_10/H_DATA_10 PCI_AD_11/H_DATA_11 PCI_AD_12/H_DATA_12 PCI_AD_13/H_DATA_13 PCI_AD_14/H_DATA_14 PCI_AD_15/H_DATA_15 PCI_AD_16/H_ADDR_ 0 PCI_AD_17/H_ADDR_ 1 PCI_AD_18/H_ADDR_ 2 PCI_AD_19/H_ADDR_ 3 PCI_AD_20 /UNUSED PCI_AD_21 /UNUSED PCI_AD_22 /UNUSED PCI_AD_23 /UNUSED PCI_AD_24 /UNUSED PCI_AD_25 /UNUSED PCI_AD_26 /UNUSED PCI_AD_27 /UNUSED PCI_AD_28 /UNUSED PCI_AD_29 /UNUSED PCI_AD_30 /UNUSED PCI_AD_31 /UNUSED

B20 C19 D20 C20 D19

7411_DDRM_DQ[21]

62

7411_DDR_DQ[19 ]

VSSQ_5

R1078 R1088

BCM7411_DVI_HSYNC

1K

DQ4 VDDQ_2

63

5

7411_DDR_DQ[18 ] 7411_DDRM_DQ[31]

DQ15

1K

DQ3

7411_DDRM_DQ[20]

4

6

VSS_3

1:H3

7411_DDRM_DQ[19]

64

1K

DQ2 VSSQ_1

65

R1061

DQ1

7411_DDRM_DQ[18]

66

2

T 4:B6 SYS_RESE

7411_DDRM_DQ[17]

1

3

GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7

DQ0 VDDQ_1

10K

A17 B9 A10 A13 B16 D9 D10

PCI_CBE_ 0 PCI_CBE_ 1 PCI_CBE_ 2 PCI_CBE_ 3

A18 B17 C16 D15 A19 B18 C17 D16

VDD_1 7411_DDRM_DQ[16]

DDR_DQ_0 DDR_DQ_1 DDR_DQ_2 DDR_DQ_3 DDR_DQ_4 DDR_DQ_5 DDR_DQ_6 DDR_DQ_7 DDR_DQ_8 DDR_DQ_9 DDR_DQ_1 0 DDR_DQ_1 1 DDR_DQ_1 2 DDR_DQ_1 3 DDR_DQ_1 4 DDR_DQ_1 5 DDR_DQ_1 6 DDR_DQ_1 7 DDR_DQ_1 8 DDR_DQ_1 9 DDR_DQ_2 0 DDR_DQ_2 1 DDR_DQ_2 2 DDR_DQ_2 3 DDR_DQ_2 4 DDR_DQ_2 5 DDR_DQ_2 6 DDR_DQ_2 7 DDR_DQ_2 8 DDR_DQ_2 9 DDR_DQ_3 0 DDR_DQ_3 1

SPI_CLK SPI_CS_ N SPI_DI SPI_DO SPI_IRDY

C1031 0 . 0 4 7 uF

U3 V1 U2 U1 T3 T2 T1 R3 Y8 W8 W7 Y6 W6 Y5 Y4 W5 Y12 W12 W11 Y11 W10 Y10 W9 Y9 W18 Y18 W17 Y17 V16 W16 W15 Y16

33

R1077

A3 A4 C9 C15 A8 A9 A16

H_IF_SEL PCI_ENABLE PCI_STOP_N PCI_REQ_ N PCI_PERR_ N PCI_IRDY_N PCI_GNT_ N PCI_CLK/H_CLK PCI_DEVSEL_N/H_CS_ N PCI_FRAME_N/H_RD_ N PCI_IDSEL/H_AS_ N PCI_INTA/H_INT_N PCI_PAR/H_WR_ N PCI_TRDY_N/H_WAIT_N

R1072

0 . 0 1 uF

DDR_REF_ 0 DDR_REF_ 1

R1071

C1027

DDR_WE_N

SP_TEST_CL K

C1014 2700pF

IC1002 HY5DU281622FTP5

DDR_CAS_ N DDR_RAS_ N

T4

UART_RX_B UART_TX_B

C1002 2700pF

7411_DDRM_A[0-12]

R41

V4 V5

R1 Y19

TU_+5.0V

IC810 VIN

R808 470

7411_DDR_WE

R1087

11:K11

R893 12K

7411_DDR_RAS

U33

+6.0V

PQ05DZ1U

BCM7411_DVI_VSYNC

R807 56

7411_DDR_CAS

U34

GND

SHIELD

33

R919 4.7K

7411_DDRM_A[4]

U34

C1052 470pF

C828 47uF

D3.3V R1086

READY

C1051 0 . 0 4 7 uF

R911 22 READY

R910 22 READY

VC

2 5

47uF

16V

A4

7411_DDR_DQS[3 ] DDR_VREF_741 2

R909 22 READY

VOUT

3

4

0 . 1 uF

READY

7411_DDRM_A[5]

1

0 . 3 3 uF

C823

C822

VSS_47

7411_DDRM_A[6]

A5

VSS_42

7411_DDRM_A[7]

A6

VSS_43

7411_DDRM_A[8]

A7

VSS_40

7411_DDRM_A[9]

A8

VSS_46

A9

DDR_DQS_ 0 DDR_DQS_ 1 DDR_DQS_ 2 DDR_DQS_ 3

VSS_44

7411_DDRM_A[11]

A11

DDR_MSK_0 DDR_MSK_1 DDR_MSK_2 DDR_MSK_3

V2 W4 Y13 Y15

H3 J3 H2 G1 F1 F2 E1 F3 E2 D1 G3 G4 G2 C1 D2 E3 E4 D3 C2 B1

VSS_45

7411_DDR_DQS[2 ]

NC C821

C825 22uF

W20

VIDO_DATA_A_0/VIDO_DVI_DATA_ 0 VIDO_DATA_A_1/VIDO_DVI_DATA_ 1 VIDO_DATA_A_2/VIDO_DVI_DATA_ 2 VIDO_DATA_A_3/VIDO_DVI_DATA_ 3 VIDO_DATA_A_4/VIDO_DVI_DATA_ 4 VIDO_DATA_A_5/VIDO_DVI_DATA_ 5 VIDO_DATA_A_6/VIDO_DVI_DATA_ 6 VIDO_DATA_A_7/VIDO_DVI_DATA_ 7 VIDO_DATA_A_8/VIDO_DVI_DATA_ 8 VIDO_DATA_A_9/VIDO_DVI_DATA_ 9 VIDO_DATA_A_10/VIDO_DVI_DATA_1 0 VIDO_DATA_A_11/VIDO_DVI_DATA_1 1 VIDO_DATA_A_12/VIDO_DVI_ENA VIDO_DATA_A_1 3 VIDO_DATA_A_1 4 VIDO_DATA_A_1 5 VIDO_DATA_A_1 6 VIDO_DATA_A_1 7 VIDO_DATA_A_1 8 VIDO_DATA_A_1 9

VSS_41

7411_DDR_DQS[1 ]

GND

4

R20 T20 R19 T19

J1 J2 K4 F4 H4 K3

VSS_38

7411_DDR_DQS[0-3 ]

IC1000 BCM7412KPB1G

DDR_CS_ N

GND

1:H3

3

VSS_37

7411_DDR_DQS[0 ] Z37

7411_DDRM_A[12]

VIN

ADJ/GND

GND

ST_5V

C866 10uF

RF_SWITCH_CTR L

B+

2

VSS_39

7411_DDR_DM[3]

Q7;R32

NC_5 NC_4

DDR_CKE_N

E20 E19

34

Q7;R33

7411_DDRM_CKE

DDR_CK DDR_CK_N

V15 U5

7411_DDR_DM[2]

BCM7411_RXB

35

33

7411_DDRM_CLK

U10 V10

W3 Y3 W13 W14

7411_DDR_DM[1]

R920 6.8K

R921 6.8K

SW

1

U20 V20 U19 V19

1 2

OUTPUT

R809 1K

UMX-NT-076

BCM7411_TXB

32

7411_DDR_CS

BA36

36

7411_DDR_CKE

+3.3V_HDMI

A Z1117H-3.3

BA36

37

7411_DDR_C LK

U32 U37

7411_DDR_DM[0-3]

CLK_200_TE ST CLK_400_TE ST

38

7411_DDR_C LK

U32

7411_DDR_DM[0] Z36

CKE

U33

Q7;R32

UART_RX_A UART_TX_A

39

30 31

R35

7411_DDRM_CLK R1029 240

CK

BCMPWM_VBR_A

C842 100uF

GND

C840 0 . 1 uF

+5.0V

IC800

TU_+5.0V

C811 10uF

JP815 JP814

C841 1uF

C839 0 . 1 uF

C865 10uF

L802

DDR_BA0 DDR_BA1

F20 F19

40

29

/CK

V6 U6

BCM7411_RXA

41

27 28

UDM

7411_DDR_BA1

BCM7411_TXA

26

Pl a c e R esi st o r s ad j a c en t t o D D R p i n 4 5 , 4 6 a t t h eD D R c h i p f u r t h e s t f r o m t h e 7 4 1.1 7411_DDRM_DM1

VSS_2

7411_DDR_BA0

U36

BA37

42

VREF

U37

BA37

43

25

C1081 22uF

PLL_BYP_ENA_A PLL_BYP_ENA_B

24

NC_6

C1045 0 . 0 4 7 uF

T18 R18

VDD_3

44

7411_DDRM_DQS 1 R35

D18

A3

7411_DDRM_A[3]

23

7411_DDR_A[11] 7411_DDR_A[12]

C1044 470pF

UDQS

1K

A2

7411_DDRM_A[2]

45

7411_DDR_A[10]

VSSQ_3

1K

A1

7411_DDRM_A[1]

46

22

7411_DDR_A[9]

DDR_VREF_741 2

7411_DDRM_DQ[8]

NC_7

1K

A0

7411_DDRM_A[0]

47

21

7411_DDRM_DQ[9]

VDDQ_4 DQ8

C861

GND

+5.0V

VIDO_VBLANK_A_ N VIDO_HBLANK_A_N VIDO_FIELD_A VIDO_EXT_VSYNC_A VIDO_CLKO_A VIDO_CLKI_A

JP813

JP812

READY R824 0

100uF

+6.0V

+6.0V

R1076 10K

AUDO_CLK_A AUDO_DATA_ A AUDO_FS256_ A AUDO_LEFT_A

JP811

JP810

+19.0V

0 . 1 uF C1090

AUDO_SPDIF

1K

BA1 A10/AP

7411_DDRM_A[10]

48

20

7411_DDR_A[7] 7411_DDR_A[8]

DQ9

C813 10uF

C862 100uF

+3.3V

GIL- G-03-S3T2 P1001

0 . 1 uF C1089

AUDO_CLK_B AUDO_DATA_ B AUDO_FS256_ B AUDO_LEFT_B

R1070

7411_DDRM_BA1

49

19

7411_DDR_A[6] 7411_DDRM_DQ[10]

DQ10

DDR_AD_2 DDR_AD_3 DDR_AD_4 DDR_AD_5 DDR_AD_6 DDR_AD_7 DDR_AD_8 DDR_AD_9 DDR_AD_10 DDR_AD_11 DDR_AD_12 DDR_AD_13 DDR_AD_14 DDR_AD_15

R1069

7411_DDRM_BA0

H5;R36

50

18

7411_DDR_A[5] VSSQ_4

AUDI_CLK AUDI_DAT A AUDI_LEFT

U7 V8 U8 V9 U11 V11 U12 V12 V13 U14 V7 V14 U15 R4

R1068

BA0 H6;R37

17

7411_DDR_A[4]

7411_DDRM_DQ[11]

DQ11

U18 V17 U16

R1067

NC_3

51

7411_DDR_A[3]

VCX0_A VCX0_B

7411_DDRM_CS

H6;R37

52

7411_DDR_A[2]

M18 M17

/CS

53

16

7411_DDR_A[1]

1K

/RAS

54

15

7411_DDR_A[0]

R1066

7411_DDRM_RAS

55

14

1K

DBG_ENA

H7;R34

56

13

1K

R1008

CLK NC_10

/WE

11 12

1K

R1007

7411_DDR_A[0-12]

V41

DDR_TEST_CL K

NC LDM

/CAS

57

R1006

7411_DDRM_DQ[12]

DQ12

R2

NC_2 VDD_2

7411_DDRM_WE 7411_DDRM_CAS

58

10

7411_DDRM_DQ[13]

VDDQ_5

L18 M19

7411_DDRM_DM0

9

7411_DDRM_DQ[14]

DQ13

1K

R36 H7;R33 H7;R34

59

DQ14

R1065

LDQS

8

VSSQ_5

GND

BCMPWM_VBR_B

0 . 1 uF C1084

JP809

JP816 JP806

3

7411_DDRM_DQ[15]

DQ15

BCM7411_27M_CLK

DQ7 NC_1 VDDQ_3

60

TEST TEST_S E TEST_MODE

DQ6 VSSQ_2

7411_DDRM_DQ[7]

61

RESET

7411_DDRM_DQ[6]

62

GND

2

+6.0V

C1011 47uF

M u s t b e s e p a r a t e l y f i l t e rde

P20

DQ5

63

7

CSI_AFULL_B CSI_CLK_B CSI_DATA_B CSI_ERROR_ B CSI_SYNC_ B CSI_VALID_B

L19 M20

7411_DDRM_DQ[5]

64

5

J20 H20 H19 F18 H17 H18

E17

DQ4 VDDQ_2

65

4

6

1K

R17 T17 P17

7411_DDRM_DQ[4]

2 3

1K

R1005

1K

DQ3

1K

R1004

1K

DQ2 VSSQ_1

7411_DDRM_DQ[3]

1K

R1003

1K

DQ1

7411_DDRM_DQ[2]

1K

R1002

R1063

DQ0 VDDQ_1

7411_DDRM_DQ[1]

R1001

JP807 JP808

JP805 HH-1M2012-121

C1143 220pF

C1086 10uF

R1074 G40

VSS_3

CSI_AFULL_A CSI_CLK_A CSI_DATA_A CSI_ERROR_ A CSI_SYNC_ A CSI_VALID_A

R1064

7411_DDRM_DQ[0]

66

E18 G20 G19 F17 G17 G18

VSS_PLL_2

HSX_SYNC

7411_DDRM_DQ[0-31] 1

1K

VDD_PLL_3

1:A6

IC1001 HY5DU281622FTP5 VDD_1

R1000

VSS_PLL_1

HSX_CLK HSX_DATA

VDD_PLL_2

1:A7 1:A6

VDD_PLL_1

0 . 1 uF C1041

R1062

0 . 0 1 uF

P19

E5 E9 E10 E11 E12 E16 H8 H9 H10 H11 H12 H13 J5 J8 J13 J16 K5 K8 K13 K16 L5 L8 L13 L16 M5 M8 M13 M16 N8 N9 N10 N11 N12 N13 T5 T9 T10 T11 T12 T16

10K

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40

C1033 0 . 0 4 7 uF

C1030

7

10

C846 0 . 1 uF

JP1005 TxD

C1144 220pF C1080 4 . 7 uF

TU801

R1060 C1025 2700pF

JP802

HH-1M2012-121

PQ05DZ1U

D2.6V

C1012 2700pF

JP800

M u st b e p l a c e d o n t h e tpo

Y18

7411_DDR_C LK 7411_DDR_C LK

HU-1M5750-401

GND

C845 220uF

+12.0V

INPUT

7411_DDRM_DQS 0

JP804

C843 22uF

0 . 1 uF

7411_DDR_DQ[27 ]

P20;Q7

JP801

JP803 C831

JP1004

D3.3V

R36

22uF

D802 POWER_CTL_3.3 V JP1003

0 . 1 uF C1075

C1058 0 . 1 uF

Y18

7411_DDR_WE

7411_DDRM_WE

C1054 0 . 1 uF

Y18

7411_DDR_CAS

7411_DDRM_CAS

7411_DDRM_DQ[25]

9

0 . 1 uF

1

7411_DDRM_DM2

7411_DDR_RAS

10

8

RxD

7411_DDR_DM[3]

R1057

11

7

220pF

HH-1M2012-121 L814

1K R902 GND

C1099

D3.3V

7411_DDRM_DM3

22

6

C1098 AH4 BCM7411_RXA 220pF AH4 BCM7411_TXA

R1OUT

D2.6V

+1.2V

7411_DDR_DM[2]

100

T2OUT

+1.2V 7411_DDR_DM[0]

100 7411_DDRM_DQS 2

V-

C1093

7411_DDR_DQS[2 ] 7411_DDR_DQS[3 ]

7411_DDRM_DQS 3

C1050

0 . 1 uF

7411_DDR_DQS[0 ] 7411_DDR_DQS[1 ]

5

3

R1IN

C815

C816

RL_ON

100

R1043

Y22

TxD

T1OUT

L805 HH-1M2012-121 ADJ/GND

AC_DET

100

R1041 0 . 0 1 uF R1042

Y20 Y22

7411_DDR_BA1

7411_DDRM_DM1

1

L819

0 . 0 1 uF R1040

C1048

7411_DDR_CS 7411_DDR_BA0

R1056 22

7411_DDRM_DM0

3

OUTPUT

C809 10uF

C826 47uF

HH-1M2012-121

0 . 0 1 uF R1038

C1046

7411_DDRM_BA1

7411_DDRM_DQS 1

INPUT

VC

4:H3

100

C1043

22

7411_DDRM_CS 7411_DDRM_BA0

100 100 7411_DDRM_DQS 0

12

VOUT

4 : H 6 ; 4 : J7

0 . 0 1 uF

7411_DDRM_DQ[23]

100

R1035

13

2

0 . 3 3 uF

4 : H 6 ; 4 : J7

0 . 0 1 uF

C1023

7411_DDRM_DQ[21]

100

R1037 4 . 7 uF

4

5

C802

2 JP1002

INV_ON/OFF

7411_DDRM_DQ[20] 7411_DDRM_DQ[22]

0 . 0 1 uF R1036

C1088

14

3

4

2 NC

JP1001

C1097 0 . 1 uF

GND

For V668

R1018 7411_DDRM_DQ[20]

R1019 7411_DDRM_DQ[24]

100

0 . 0 1 uF R1034

C1042

3

1

1 RxD

VCC

VBR_B_HD

P22

C2-

15

R907 5.6K

P20

7411_DDR_DQ[19 ]

7411_DDRM_DQ[23]

C1095

16

2

R908 4.7K

H20

7411_DDR_DQ[18 ]

C2+

1

R826 0

H22

7411_DDR_DQ[17 ]

7411_DDRM_DQ[18] 7411_DDRM_DQ[19]

7411_DDRM_DQ[22]

100

0 . 0 1 uF R1033

C1040

H18;H5

7411_DDR_DQ[14 ]

R1055

7411_DDR_DQ[15 ] R1025 7411_DDR_DQ[16 ]

7411_DDRM_DQ[17]

7411_DDRM_DQ[18] 7411_DDRM_DQ[19]

7411_DDRM_DQ[21]

R1032 C1037

H19;H6 H19;H6

7411_DDR_DQ[13 ]

100

C1-

0 . 1 uF

0 . 0 1 uF 0 . 0 1 uF R1031

0 . 1 uF V+

40V

0 . 0 1 uF 0 . 0 1 uF

C1022

100

C1062 1uF

1K

C1020 C1021

100

C1094 0 . 1 uF C1092

5V_MNT

0 . 0 1 uF

C1+

C1007 100uF

VDDQ

C1070 2 . 2 uF

C1077 C1036

VIN JP1000

AVCC

4: F5

4 . 7 uF 0 . 0 1 uF

C1019

IC1004

PVCC

H6;9:E5

C1087 C1018

VTT

POD

22 7411_DDRM_DQ[16]

7411_DDRM_DQ[12] 7411_DDRM_DQ[13]

5

4:C3

7411_DDRM_DQ[15]

R1017 7411_DDRM_DQ[16]

6

H6;9:B5

R1024 7411_DDR_DQ[12 ]

7411_DDRM_DQ[14]

7411_DDRM_DQ[15]

7411_DDRM_DQ[17]

7411_DDR_A[10]

VREF

VBR_B_FHD For LCD_FHD_3 7

22

7411_DDRM_DQ[14]

7411_DDRM_DQ[13]

7411_DDRM_A[10]

DDR_VREF_741 2

VBR_A For LCD_HD/LCD_FHD_42_4 7

7411_DDR_DQ[11]

7

3

4

7411_DDR_A[9]

D804 MBRS340

7411_DDR_DQ[10 ]

8

2

ADM3232E ARNZ

V_SENSE

7411_DDR_A[8]

7411_DDR_A[12]

L818

7411_DDRM_DQ[10] 7411_DDRM_DQ[11]

R1016 7411_DDRM_DQ[12]

GND

7411_DDR_A[7]

7411_DDR_A[11]

7411_DDRM_A[12]

4 : F 6 ; H6

100

7411_DDR_A[6]

7411_DDRM_A[9] 7411_DDRM_A[11]

H6;9:B5

7411_DDRM_DQ[10]

1

7411_DDR_A[5]

R1054 7411_DDRM_A[8]22

7411_DDR_DQ[9]

7411_DDRM_DQ[11]

NC

220uF

7411_DDR_A[4]

7411_DDRM_A[6]

VBR_B_FHD LCD_FHD_42_4 7

100

7411_DDRM_A[7]

HH-1M2012-121

0 . 0 1 uF

7411_DDRM_A[5]

VBR_A For V668

0 . 0 1 uF

C1017

7411_DDRM_A[4]22

7411_DDRM_A[9] 7411_DDRM_A[11] 7411_DDRM_A[10] 100

R1030

4 : F 6 ; H6

0 . 0 1 uF

C1016

R1053

7411_DDRM_A[6] 7411_DDRM_A[7] R1047 7411_DDRM_A[8]

7411_DDRM_A[12] 0 . 1 uF

SMW250-13

22

7411_DDRM_DQ[9]

100

0 . 0 1 uF

C1039

4 : H 6 ; 4 : J7

7411_DDRM_DQ[8]

7411_DDRM_DQ[9]

0 . 0 1 uF

C1034

7411_DDR_DQ[6]

A Z1117H-3.3

LIVE_ON

R1015 7411_DDRM_DQ[8]

C1032

7411_DDR_DQ[5]

IC804

PQ05DZ1U

VBR_B_HD For LCD_HD

7411_DDR_DQ[7] R1023 7411_DDR_DQ[8]

P800

A3.3V

D3.3V

IC801

D3.3V

D2.6V

L817

7411_DDRM_DQ[7]

+6.0V

Se r i a l Po r t ( 7 4 1 2) IC1003 SC2595ST R C1004 10uF

L815

7411_DDRM_DQ[6]

7411_DDRM_DQ[7]

P801

DDR_VTT_7412

C1003

POWER_CTL_2.6V_1.2 V

0 . 0 1 uF

C1015

0 . 0 1 uF

7411_DDR_DQ[3] R1022 7411_DDR_DQ[4]

7411_DDRM_DQ[5]

7411_DDRM_DQ[6]

X24

L816

C1029

7411_DDR_DQ[2]

22

7411_DDRM_DQ[5]

0 . 1 uF

C1091

7411_DDR_A[3]

C835 0 . 2 2 uF

0 . 0 1 uF

7411_DDR_DQ[1]

7411_DDR_A[2]

7411_DDRM_A[3]

40V

7411_DDRM_DQ[4]

7411_DDRM_A[2]

D801 MBRS340

7411_DDRM_DQ[3]

R1046 7411_DDRM_A[4] 7411_DDRM_A[5]

C820 0 . 2 2 uF

7411_DDRM_DQ[2]

7411_DDRM_DQ[3]

100

0 . 0 1 uF

C1013 C1000

7411_DDRM_DQ[1]

7411_DDRM_DQ[2]

R1014 7411_DDRM_DQ[4]

100

R1075 10K

C1010

7411_DDRM_DQ[1]

100

0 . 0 1 uF

L1000

0 . 0 1 uF

C1028

R1021 7411_DDR_DQ[0]

L1002

0 . 1 uF 0 . 0 1 uF

C1009

7411_DDRM_DQ[0]

C1066 0 . 1 uF

0 . 0 1 uF

C1008

R1013 7411_DDRM_DQ[0]

7411_DDR_A[1]

L1001

C1006 C1001

22

100

7411_DDR_A[0]

7411_DDRM_A[1]

8

7411_DDR_A[0-12]

R1052 7411_DDRM_A[0]22

9

F14

P l a c e R e s i s t o r s a d j a c e n t t o 7 4 11 ( B O T T O ) M

7411_DDRM_A[2] 7411_DDRM_A[3]

330uF C812

R1045 7411_DDRM_A[0]

0 . 1 uF

A 1[ RD]

100

0 . 0 1 uF

C1038

C1065 0 . 1 uF

0 . 0 1 uF

C1026

X16

C1064 0 . 1 uF

C1005

7411_DDR_DQ[0-31 ]

S27

A 2[ GN]

0 . 0 1 uF

7411_DDRM_A[1] 7411_DDRM_DQ[0-31]

C

7411_DDRM_A[0-12] DDR_VTT_7412

C1024

DDR_VTT_7412

MPEG4

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

4:G1;G3;H1 POWER_CTL_2.6 V_1.2V

V_1.2V 4:G1;E1;G3 POWER_CTL_2.6

TUNER, POWER

+9V

H23

TMDS0_RX2-

H22

TMDS0_RX2+

GND

11

38

B11

VCC_2

12

37

SCL1

B34

13

36

SDA1

A34

14

35

HPD1

GND_3

15

34

EQ

VSADJ

16

33

S2

SCL_HDMI_2

E17;AI21

SDA_HDMI_2

E17;AI20

Q605 KRC102S

A1

B

/W_PROTECT 4:H2;A B28;A B24;7:I3

R608 0

E

A2

GND

GND

HDMI_SEL_1

1:H3

HDMI_SEL_0

1:H3

W22

TMDS2_RX0+

W22

TMDS_RXC+_BCM

TMDS_RXC-_BCM

AJ13

AJ30 AK32 AL34

A1.2V

A2.6V

AK31 AJ31 0 . 1 uF C666

TMDS2_RX1-

W23

AM34 AM32 L605

0 . 1 uF

HB-1M1608-102J T L606 TMDS2_RX1+

W23

TMDS2_RX2-

W23

TMDS2_RX2+

W24

4 3

C626 34 R693

0 . 1 uF

1.5M R695

R651 1K

R647 30K

E

C TP602

20 BCM_L_OUT AO29

21

R644

Q602 2SC3875 S

B

TP606

2SA1504S

B TP613

DC1R019W DH

C662 3 . 3 uF 50V

R652 470

GND

0 . 1 uF

AN15

C637

0 . 1 uF

AM15

AK16

AH16 AJ16 AL15 C638

0 . 1 uF

C639

0 . 1 uF

C640

0 . 1 uF

C628

0 . 1 uF

C629

0 . 1 uF

C630

0 . 1 uF

AM21 AL21 AN21 AM20 AN22 AL22 AP22 AM22

BCM_L_OUT2 0

R653 1.5K

C636

7: F4 RGB_B 7:G3 RGB_HS

7:C4 COMP2_Y

R656

TP612

E TP609

R648 15K

C633 0 . 1 uF

7:C7 S-VIDEO1_L 7:C7 S-VIDEO1_C

1.5M R706

R701 34

AN32

0 . 1 uF

7:D4 COMP2_Pr b 7:C4 COMP2_P

C

0

C617 3 . 3 uF 50V

J 6 01

1.5M R696

34 R694

Q613

TP608

C668 4 . 7 uF

C635

7:A4 COMP1_Y 7:B4 COMP1_Pr b 7:A4 COMP1_P

C627 1

C664 0 . 1 uF

7 : E4 RGB_R 7: F4 RGB_G

7:G3 RGB_VS

TP607

2

AL33 AM33

C656 4 . 7 uF

0 . 1 uF C655

5

AL32 AL31

+5.0V

6

7:G5

S-VIDEO2_L

7:G6

S-VIDEO2_C

C648

0 . 1 uF

AL17

C649

0 . 1 uF

AL16 AP16

C659

0 . 1 uF

AN18

C660

0 . 1 uF

AM18

C658

0 . 1 uF

C651

0 . 1 uF

AN17

C652

0 . 1 uF

AM19

AM17 1:H4 HDMI_HPD_1

0 . 1 uF

R654 34 R703

10V VR602

0 READY

18

16 15

AL19 R718 1.5M

AP19 AN19

TU_CVBS 8:C2 N 7:C6 COMPOSITE1_I N 7:G6 COMPOSITE2_I

AN16

AP20 AN24 AM16 AP17

TP604

C642

SDA_HDMI_1

T26;AI23

SCL_HDMI_1

T26;AI24

34 R704

R612 30K TP603

R645 1K

BCM_R_OUT

10V VR603

13

10

TMDS1_RXC-

T26

C608 3 . 3 uF 50V

R609 0

B

TMDS1_RXC+

S26

TMDS1_RX0-

S26

TP611

0 R649 1.5K

R646 470

C645 34 R711

R655

E R643 15K

1.5M R709 8:C2

2SA1504S C

TP610

TP605

GND

AL18 AN20 R726 10 S IF

TMDS1_RX0+

S26

TMDS1_RX1-

R26

TMDS1_RX1+

R26

6

AL23 AP23 AM23

1.5M R716

R607 1.5M

4

A2.6V C653

1.5M R724

R26

TMDS1_RX2+

R26

C625

0 READY R692 34

READY 1.5M R699

C646 C632

0 . 1 uF 0 . 1 uF

C644

0 . 1 uF

C643

0 . 1 uF

C631 C634 C671

21

L603

AJ22 AJ19 4 . 7 uF

AJ23 READY

0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF

AJ18

C602

AJ21 AJ20 AK20 AK21

0 . 1 uF

AK17

C661

0 . 1 uF

AK19

C657 C654

0 . 1 uF

AK22

0 . 1 uF

AK18

C663

C643, C602 R EADY F o r P C N o i s e S o l u t in o

20

AH21 AK23 AG23

2 1

A1.2V

0 . 1 uF

AJ17

34 R719

C667

TMDS1_RX23

AH20 AH23

R650

GND

AH22

BCM_R_OUT2

C650 3 . 3 uF 50V

0 . 1 uF

5

AN23

0 . 1 uF

8 7

AM24

C665 0 . 1 uF

Q612 B Q601 2SC3875 S

TP601

0 . 1 uF

E

C

TP600

14

9

0 . 1 uF C647

HB-1M1608-102J T L604 GND

17

11

34 R713

GND

1:H4;AG26 HDMI_POWER_1

10V VR608

R600 1K 19

12

C641 1.5M R708

+5.0V GND

22

4.7K R623

M12 K7

GND

7

3

6

4

5

C

KDS184 D602

Q610 2SC3875 S

WP

GND

SCL

R772

B

MUTE2 2K

E

C620 0 . 1 uF GND

R618

22

R619

22

Q611 KRA102S

GND

C694 0 . 1 uF

GND GND

E17;W21

+5.0V

SCL_HDMI_2 SDA

E17;W21 SDA_HDMI_2 R744 5 .1 C

DS_AGCT_CTL

ZD600 3.3V I2S_CLK_IN

DS_AGCI_CTL

I2S_DATA_IN

EDSAFE_AVSS_1

I2S_LR_IN

EDSAFE_AVSS_2

I2S_CLK_OUT

EDSAFE_AVSS_3

I2S_DATA_OUT

EDSAFE_AVSS_4

I2S_LR_OUT

EDSAFE_DVDD1P2

AUD_LEFT_N

EDSAFE_AVDD2P5_1

AUD_LEFT_P

EDSAFE_AVDD2P5_2 EDSAFE_AVDD2P5_3 EDSAFE_IF_P

AUD_VSSO AUD_RIGHT_N

EDSAFE_IF_N

AUD_RIGHT_P

PLL_DS_AVDD1P2 PLL_DS_AGND

AUD_VDDO2P5

AUD_SPDIF SPDIF_AVDD2P5 SPDIF_AVSS

SD_R

SPDIF_IN_N

SD_G

SPDI F_IN_P

SD_B RGB_HSYNC RGB_VSYNC SD_INCM_RGB SD_Y1

HDMI_RX_0_CEC_RES HDMI_RX_0_CEC_DAT HDMI_RX_0_HTPLG_IN HDMI_RX_0_HTPLG_OU T

SD_PR1

HDMI_RX_0_DDC_SCL

SD_PB1

HDMI_RX_0_DDC_SDA

SD_INCM_COMP1 SD_Y2 SD_PR2 SD_PB2

HDMI_RX_0_RESREF HDMI_RX_0_CLK_N HDMI_RX_0_CLK_P HDMI_RX_0_DATA0_N

SD_INCM_COMP2

HDMI_RX_0_DATA0_P

SD_L1

HDMI_RX_0_DATA1_N

SD_C1

HDMI_RX_0_DATA1_P

SD_INCM_LC1

HDMI_RX_0_DATA2_N

SD_L2

HDMI_RX_0_DATA2_P

SD_C2 SD_INCM_LC2 SD_L3 SD_C3 SD_INCM_LC3 SD_CVBS1 SD_CVBS2 SD_CVBS3 SD_CVBS4 SD_CVBS5

HDMI_RX_0_VDD3P3 HDMI_RX_0_VDD1P2 HDMI_RX_0_VDD2P5 HDMI_RX_0_PLL_AVDD 1P2 HDMI_RX_0_AVSS HDMI_RX_0_PLL_AVSS HDMI_RX_1_CEC_RES HDMI_RX_1_CEC_DAT HDMI_RX_1_HTPLG_IN HDMI_RX_1_HTPLG_OU T

SD_INCM_CVBS1

HDMI_RX_1_DDC_SCL

SD_INCM_CVBS2

HDMI_RX_1_DDC_SDA

SD_INCM_CVBS3 SD_INCM_CVBS4 SD_INCM_CVBS5 SD_SIF1

HDMI_RX_1_RESREF HDMI_RX_1_CLK_N HDMI_RX_1_CLK_P HDMI_RX_1_DATA0_N

SD_SIF2

HDMI_RX_1_DATA0_P

SD_INCM_SIF1

HDMI_RX_1_DATA1_N

SD_INCM_SIF2

HDMI_RX_1_DATA1_P

SD_V1_AVSS

HDMI_RX_1_DATA2_N

SD_V2_AVSS

HDMI_RX_1_DATA2_P

SD_V3_AVSS SD_V4_AVSS SD_V5_AVSS SD_V6_AVSS SD_CLKTST SD_V1_AVDD2P5

HDMI_RX_1_VDD3P3 HDMI_RX_1_VDD1P2 HDMI_RX_1_VDD2P5 HDMI_RX_1_PLL_AVDD 1P2 HDMI_RX_1_AVSS HDMI_RX_1_PLL_AVSS

AH24 AJ24 AK24 AK25

22

R627

AL25

22

R628

AJ25

22

R629

AP28 C675 AN28

R626

5:D2 5:D1

CS5340_I2S_LRCLK_OU T T BCM3553_I2S_SCLK_OU BCM3553_I2S_ L RCLK_OUT

E

5:A5 5:A5 5:A5

BCM_L_OUT1 AK28

AM29

AP11

5:D2

CS5340_I2S_DATA_OU T

0 . 1 uF

AL28 AN29 C674 AP29

CS5340_I2S_SCLK_OUT

BCM3553_I2S_DATA_OUT

Q608 2SC3875 S

C690 100uF

0 . 1 uF

A2.6V BCM_R_OUT1 AK26

22

BCM3553_SPDIF_OU T

AK12

5 : G 7 ; 5 : H2

AJ12 AM11 C672 AN11 C695

0 . 1 uF

C682 0 . 1 uF

0 . 1 uF

AP3 AL5

A2.6V

AL3 AL2 AL1

22

R633

AK4

22

R636

DDC_SCL_BCM V17 DDC_SDA_BCM V17

AL4

499 R737 TMDS_RXC-_BCM S18 TMDS_RXC+_BC M S18

AM1 AM2 AN1

A1.2V

TMDS_RX0-_BCM S18 TMDS_RX0+_BCM S18

AN2 AM3

TMDS_RX1-_BCM R18 TMDS_RX1+_BCM R18

AM4 AP2

TMDS_RX2-_BCM R18 TMDS_RX2+_BCM Q18

AN3 AK6

A3.3V

HB-1M1608-102J T L601

AJ7 AK5 AG8 AJ8 AG7

C676 0 . 1 uF

C613 10uF

C678 0 . 1 uF

C680 0 . 1 uF

C683 0 . 1 uF

AJ4 AK3

A2.6V

AG4 AF8 AG6 AG5

R738 499

AH6 AH2 AH1 AH3

A1.2V

AH4 AJ1 AJ2

A3.3V

AJ3

HB-1M1608-102J T L600

AK2 AH7 AJ5 AH5 AJ6 AH8 AK7

C612 0 . 1 uF

C614 10uF

C679 0 . 1 uF

C681 0 . 1 uF

C684 0 . 1 uF

SD_V2_AVDD2P5 SD_V3_AVDD2P5 SD_V4_AVDD2P5 SD_V5_AVDD2P5 SD_V6_AVDD2P5

R743 1.5K

SD_V1_AVDD1P2 SD_V2_AVDD1P2 SD_V3_AVDD1P2

BCM_L_OUT2 S12;AN24 R740 1.5K

SD_V4_AVDD1P2 SD_V5_AVDD1P2 SD_V6_AVDD1P2

7: F7 MNT_L_OUT

7: F7 MNT_R_OUT

BCM_R_OUT2 Q7;AN22

470K R742

W22

TMDS2_RX0-

C616 0 . 1 uF

4.7K R611

4.7K R610 TMDS_RX0+_BCM

TMDS_RX0-_BCM

AJ12

TMDS_RX1-_BCM

AJ13

TMDS_RX1+_BCM

AJ12

TMDS_RX2-_BCM

AJ12

AJ12

TMDS_RX2+_BCM

AJ12

AJ13

DDC_SCL_BCM

GND

8 7

2K

BCM_R_OUT2

8

2

R770

B E

+5.0V

1:H4;G19

VCC

470K R739

9

DDC_SDA_BCM

W22

TMDS2_RXC+

10

AJ11

10V VR605

11

AJ11

13 TMDS2_RXC-

C Q609 2SC3875 S

B

AJ33

14

12

BCM_L_OUT2 E8;T26 SCL_HDMI_1 E8;T26 SDA_HDMI_1

IC100 BCM3553 AK33

SCL_HDMI_2 W21;AI2 1

1

C

GND

+3.3V_HDMI

GND SDA_HDMI_2 W21;AI2 0

15

22

C

17 16

A1 C

R665 1K

32

R603

R617

JP608

A0

1:H4;AG23

10V VR606

R601 1K

18

S1

30

31

29 SCL_SINK

HPD_SINK

28

0 . 0 1 uF C607

SDA_SINK

27

25

24

22

26

23

Z2

Z1

Y2

Y1

VCC_4

GND_4

GND_5

18

17

20

19

21 Z3

Z4

Y3

Y4 10V VR600

0 . 0 1 uF C605 HDMI_POWER_2

0

22

SDA

IC604

+3.3V_HDMI

R604

R616

A T24C02BN-10SU-1.8

TMDS2_RXC+ H16 TMDS2_RXC- H16

22 22

GND

SCL

HDMI_POWER_2

TMDS2_RX0+ H15 TMDS2_RX0- H15

R632 R634

0 . 0 1 uF

C

HB-1M1608-102J T

L607 VDD 49

A33

TMDS2_RX1+ H14 TMDS2_RX1- H14

0 . 0 1 uF C610

A2

E8;AI23 SDA_HDMI_1

10

A11

GND 22

5

2SA1504S Q607

B

C619 0 . 1 uF

WP

4.7K R624

H7 E8;AI24 SCL_HDMI_1

SDA2

SCL2R638 22

HPD2R635 22

53

52

51 50

C606

0 . 0 1 uF B21

VCC_7

A22

B23

B22

GND_7

A21

55

54

VCC_5

39

4.7K R620

H6

TMDS1_RXC-

L602

0 . 0 1 uF C609

B12

40

1:H4

4

A1

H6

TMDS1_RXC+

H5

A12

41

GND

E

R640 200 C624 1200pF

C622

GND +5.0V

R606

HDMI_HPD_2

6

4.7K R621

H5

H6 TMDS1_RX0+

TMDS1_RX0-

H4

H4

TMDS1_RX1+

GND_6

42

9

DC1R019W DH

19

TMDS1_RX2-

B13

43

IC601 TMDS351PAG

7 8

VCC_3

J 6 02

A13

44

6

B32 A32 B33

0 . 0 1 uF

3.9K

45

4 5

7

3

R685 3.6K

C693 C692 0 . 0 1 uF 1uF

21

C601

VCC_6

B31

2

VCC

R683 470

BCM_R_OUT1

KDS184 D601

E

TMDS0_RX1+

46

A2

AJ15 C615 0 . 1 uF

22

TMDS0_RX1-

H23

47

3

A31

A1

R642 1K R691 2K BCM_R_OUT

1:H4;G9

C

TMDS2_RX2+ H13 TMDS2_RX2- H13

+9V

SCL_HDMI_0

+5.0V

C

H24

20

2

B14

F26;N23

F27;N24 SDA_HDMI_0

GND A14

VCC_1

GND_2

8

C

R745

C600 0 . 0 1 uF

1

C623 1200pF

R637 200

TMDS0_RX0+

22

A2

TMDS0_RX0-

H24

22

R615

JP607 IC603 AT24C02BN-10SU-1. 8

A0 Q604 KRC102S 4:H2;A B28;A B21;7:I3 B /W_PROTEC T

R614

SDA

HDMI_POWER_1

E 48

1

GND

SCL

C

TMDS0_RXCTMDS0_RXC+

H24

5

4.7K R625

H25 H25

1

6

4

2SA1504S Q606

B

C621

A1

N21

GND_1

7

3

C618 0 . 1 uF

E

R639 200

0 . 0 1 uF WP

R690 2K BCM_L_OUT

R684 3.6K

VCC

4.7K R622

N21

TMDS0_RX2+

SCL3

2

R666

N22

TMDS0_RX2-

SDA3

GND

1K

TMDS0_RX1+ 3 2

22 22

8

GND A2

GND

C604 0 . 0 1 uF

R641 1K

R682 470

BCM_L_OUT1

1K

SCL_HDMI_0

R630 R631

A1

+5.0V

READY

F26;AI27

5 4

0 . 0 1 uF

C603 64 SDA_HDMI_0

1

+3.3V_HDMI ST_5V

R613

6

F27;AI26

56

N22

57

N22

TMDS0_RX1-

59

N22

TMDS0_RX0+ 7

58

N23

TMDS0_RX0GND

8

A24

9

B24

TMDS0_RXC+

10

62

11

HPD3

TMDS0_RXC- N23

10V VR604

12

A0

E

4 : E4

HDMI_CEC

13

VCC_8

14

A23

N23;AI27

61

N24;AI26

SCL_HDMI_0

60

SDA_HDMI_0

63

15

G

R605 68K

GND 17 16

D603 MMBD301LT1G

10V VR607

18

TMDS1_RX2+

3.3VST_MICOM

R602 1K 19

TMDS1_RX1-

1:H4;AG29

D B S Q600 BSS83

HDMI_POWER_0

C611 0 . 1 uF

C

AJ16

KDS184 D600

B

1K

10V VR601 GND 22

Q603 KRC102S 4:H2;A B24;A B21;7:I3 B /W_PROTEC T

+5.0V

1:H4;G28 HDMI_POWER_0 JP606

IC602 AT24C02BN-10SU-1. 8

A2

R664

+5.0V

HDMI_HPD_0 1:H4

J 6 00 DC1R019W DH

GND

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

VIDEO EXT. INPUT LGE Internal Use Only


PRINTED CIRCUIT BOARD

MAIN (BOTTOM)

MAIN (TOP)

SIDE A/V (TOP)

SIDE A/V (BOTTOM)

CONTROL B/D(TOP)

CONTROL B/D(BOTTOM)

Copyright©2007 LG Electronics. Inc. All right reserved. Only for training and service purposes

IR/LED(TOP)

IR/LED(BOTTOM)

LGE Internal Use Only


P/NO : MFL41546701

Dec., 2007 Printed in Korea


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