Internal Use Only North/Latin America Europe/Africa Asia/Oceania
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LED LCD TV SERVICE MANUAL CHASSIS : LJ21C
MODEL : 42LM3400
42LM3400-SB
CAUTION
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67405917 (1203-REV00)
Printed in Korea
CONTENTS
CONTENTS . ............................................................................................. 2 PRODUCT SAFETY ................................................................................. 3 SPECIFICATION........................................................................................ 4 ADJUSTMENT INSTRUCTION................................................................. 8 TROUBLE SHOOTING............................................................................. 17 BLOCK DIAGRAM................................................................................... 22 EXPLODED VIEW .................................................................................. 23 SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB. Keep wires away from high voltage or high temperature parts.
Do not use a line Isolation Transformer during this check. Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5 mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Before returning the receiver to the customer, always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 MΊ and 5.2 MΊ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
Copyright Š LG Electronics. Inc. All rights reserved. Only for training and service purposes
-3-
LGE Internal Use Only
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This spec sheet is applied all of the 22”, 32”, 37”, 42”, 47”, 50”, 55” LCD TV with LJ21A/B/C chassis
2. Test condition
3. Test method
1) Performance: LGE TV test method followed 2) Demanded other specification - Safety : CE, IEC specification - EMC: CE, IEC
Each part is tested as below without special notice. 1) Temperature : 25 ºC ± 5 ºC, CST : 40 ºC±5 ºC 2) Relative Humidity: 65 % ± 10 % 3) Power Voltage Standard input voltage (100~240V@ 50/60Hz) * Standard Voltage of each products is marked by models. 4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. 5) The receiver must be operated for about 20 minutes prior to the adjustment.
4. General Specification No
Item
Specification
Measurement
Result
Remark
1.
Receiving System
1) SBTVD / NTSC / PAL-M / PAL-N
2.
Available Channel
1) VHF : 02~13 2) UHF : 14~69 3) CATV : 01~135
3.
Input Voltage
1) AC 100 ~ 240V 50/60Hz
4.
Market
Central and South AMERICA
5.
Screen Size
22 inch Wide (1366 × 768)
22LS3500-SA
32 inch Wide (1366 × 768)
32CS460-SA/SZ 32LS3400-SA 32LM3400-SB 32LS3500-SA
32 inch Wide (1920 × 1080)
32CS560-SA 32LS4600-SA
37 inch Wide (1366 × 768)
37LS3400-SA 37LM3400-SB
42 inch Wide (1920 × 1080)
42CS460-SA 42CS560-SA 42LS3400-SA 42LS4600-SA 42LM3400-SB 42LS4600-SA 42LM5800-SB
47 inch Wide (1920 × 1080)
47LS4600-SA 47LM4600-SB 47LM5800-SB
50 inch Wide (1920 × 1080)
50LS4000-SA
55 inch Wide (1920 × 1080)
55LM4600-SB
6.
Aspect Ratio
16:9
7.
Tuning System
FS
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
-4-
LGE Internal Use Only
No 8.
Item Module
Specification
Measurement
Result
Remark
V216BG1-LE1
HD, 60Hz
CMI
22LS3500-SA
LC320WXN-SCA2
HD, 60Hz
LGD
32CS460-SA
LC320WXE-SCA1
HD, 60Hz
LGD
32CS460-SZ
LC320WUN-SCA2
FHD, 60Hz
LGD
32CS560-SA
T320HVN01.4
FHD, 60Hz
AUO
32CS560-SA
LC320DXN-SER2
HD, 60Hz
LGD
32LS3400-SA
LC320DXN-SEU2
HD, 60Hz
LGD
32LM3400-SB
LC320EXN-SEA2
HD, 60Hz
LGD
32LS3500-SA
T320XVN01.1
HD, 60Hz
AUO
32LS3500-SA
LC320EUN-SEM2
FHD, 60Hz
LGD
32LS4600-SA
LC370DXN-SER2
FHD, 60Hz
LGD
37LS3400-SA
LC370DXN-SEU2
37LM3400-SB
LC420WUE-SCA2
FHD, 60Hz
LGD
42CS460-SA 42CS560-SA
T420HVN02.1
FHD, 60Hz
AUO
42CS460-SA 42CS560-SA
LC420DUN-SER2
HD, 60Hz
LGD
42LS3400-SA
LC420DUN-SEU2
FHD, 60Hz
LGD
42LM3400-SB
LC420EUE-SEM1
FHD, 60Hz
LGD
42LS4600-SA
LC420EUE-SEF1
FHD, 120Hz
LGD
42LM5800-SB
LC470EUE-SEM1
FHD, 60Hz
LGD
47LS4600-SA
LC470EUE-SEF1
FHD, 120Hz
LGD
47LM5800-SB 47LM4600-SB
LC550EUE-SEF1
FHD, 120Hz
LGD
55LM4600-SB
9.
Operating Environment
1) Temp : 0 ~ 40 deg 2) Humidity : ~ 80 %
10.
Storage Environment
1) Temp : -20 ~ 60 deg 2) Humidity : ~ 85 %
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
-5-
LGE Internal Use Only
5. External Input Support Format
5.1. Component input(Y, CB/PB, CR/PR) No
Resolution
H-freq(kHz)
V-freq.(kHz)
Pixel clock
Proposed
1.
720*576
15.625
50.000
13.5
SDTV 576I
2.
720*480
15.73
60
13.5135
SDTV ,DVD 480I
3.
720*480
15.73
59.94
13.5
SDTV ,DVD 480I
4.
720*480
31.50
60
27.027
SDTV 480P
5.
720*480
31.47
59.94
27.0
SDTV 480P
6.
720*576
31.250
50.000
27.000
SDTV 576P
7.
1280*720
37.500
50.000
74.25
HDTV 720P
8.
1280*720
45.00
60.00
74.25
HDTV 720P
9.
1280*720
44.96
59.94
74.176
HDTV 720P
10.
1920*1080
28.125
50.00
74.250
HDTV 1080I
11.
1920*1080
33.75
60.00
74.25
HDTV 1080I
12.
1920*1080
33.72
59.94
74.176
HDTV 1080I
13.
1920*1080
56.250
50.00
148.50
HDTV 1080P
14.
1920*1080
67.500
60.00
148.50
HDTV 1080P
15.
1920*1080
67.432
59.939
148.352
HDTV 1080P
16.
1920*1080
27.000
24.000
74.25
HDTV 1080P
17.
1920*1080
26.97
23.976
74.176
HDTV 1080P
18.
1920*1080
33.75
30.000
74.25
HDTV 1080P
19.
1920*1080
33.71
29.97
74.176
HDTV 1080P
5.2. RGB input(PC) No
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
PC
DDC
1.
640*350
31.468
70.09
25.17
EGA
X
2.
720*400
31.469
70.08
28.32
DOS
O
3.
640*480
31.469
59.94
25.17
VESA(VGA)
O
4.
800*600
37.879
60.31
40.00
VESA(SVGA)
O
5.
1024*768
48.363
60.00
65.00
VESA(XGA)
O
6.
1152*864
54.348
60.053
80.00
VESA
O
7.
1360*768
47.712
60.015
85.50
VESA (WXGA)
O
8.
1920*1080
67.5
60
148.5
HDTV 1080P
O
※ RGB PC Monitor Range Limits Min Vertical Freq - 58 Hz Max Vertical Freq - 62 Hz Min Horiz. Freq - 30 kHz Max Horiz. Freq - 83 kHz Pixel Clock - 160 MHz
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
-6-
LGE Internal Use Only
5.3. HDMI Input (PC/DTV) No
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
PC
DDC
1.
640*350
31.468
70.09
25.17
EGA
X
2.
720*400
31.469
70.08
28.32
DOS
O
3.
640*480
31.469
59.94
25.17
VESA(VGA)
O
4.
800*600
37.879
60.31
40.00
VESA(SVGA)
O
5.
1024*768
48.363
60.00
65.00
VESA(XGA)
O
6.
1152*864
54.348
60.053
80.00
VESA
O
7.
1360*768
47.712
60.015
85.50
VESA (WXGA)
O
8.
1280*1024(FHD Only)
63.981
60.02
108.00
VESA (SXGA)
O
9.
1920*1080(FHD Only)
67.5
60
148.5
HDTV 1080P
O
DTV 1.
720*480
31.469
59.940
27.000
SDTV 480P
2.
720*480
31.500
60.000
27.027
SDTV 480P
3.
720*576
31.250
50.000
27.000
SDTV 576P
4.
1280*720
37.500
50.000
74.25
HDTV 720P
5.
1280*720
45.00
60.00
74.25
HDTV 720P
6.
1280*720
44.96
59.94
74.176
HDTV 720P
7.
1920*1080
28.125
50.000
74.25
HDTV 1080I
8.
1920*1080
33.75
60.00
74.25
HDTV 1080I
9.
1920*1080
33.72
59.94
74.176
HDTV 1080I
10.
1920*1080
56.250
50.000
148.50
HDTV 1080P
11.
1920*1080
67.500
60.00
148.50
HDTV 1080P
12.
1920*1080
67.432
59.94
148.352
HDTV 1080P
13.
1920*1080
27.000
24.000
74.25
HDTV 1080P
14.
1920*1080
26.97
23.976
74.176
HDTV 1080P
15.
1920*1080
33.75
30.00
74.25
HDTV 1080P
16.
1920*1080
33.71
29.97
74.176
HDTV 1080P
※ HDMI Monitor Range Limits Min Vertical Freq - 58 Hz Max Vertical Freq - 62 Hz Min Horiz. Freq - 30 kHz Max Horiz. Freq - 83 kHz Pixel Clock - 160 MHz
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
-7-
LGE Internal Use Only
ADJUSTMENT INSTRUCTION 1. Application
This spec sheet is applied all of the LCD TV with LJ21A/B/C chassis
3. Main PCB check process
2. Designation
(1) T he adjustment is according to the order which is designated and which must be followed, according to the plan whic al Unit: Product Specification Standard. (2) Power adjustment : Free Voltage. (3) Magnetic Field Condition: Nil. (4) Input signal Unit: Product Specification Standard. (5) Reserve after operation: Above 5 Minutes (Heat Run). Temperature : at 25 ºC±5 ºC Relative humidity : 65 ± 10% Input voltage : 100~220V, 50/60Hz (6) A djustment equipments : Color Analyzer (CA-210 or CA-110), SVC remote controller (7) Push The “IN STOP KEY” – For memory initialization.
Case1 : Software version up 1) A fter downloading S/W by USB , TV set will reboot automatically 2) Push “In-stop” key 3) Push “Power on” key 4) Function inspection 5) After function inspection, Push “In-stop” key.
* APC – After Manual-Insert, executing APC * Boot file Download
(1) Execute ISP program “Mstar ISP Utility” and then click “Config” tab. (2) Set as below, and then click “Auto Detect” and check “OK” message. I f “Error” is displayed, Check connection between computer, jig, and set. (3) Click “Read” tab, and then load download file (XXXX.bin) by clicking “Read” (1) filexxx.bin
(4) C lick “Connect” tab. If “Can’t ” is displayed, Check connection between computer, jig, and set. (2)
(3)
Case2 : Function check at the assembly line 1) When TV set is entering on the assembly line, Push “In-stop” key at first. 2) Push “Power on” key for turning it on. => If you push “Power on” key, TV set will recover channel information by itself. 3).After function inspection, Push “In-stop” key. Please Check the Speed To use speed between from 200KHz to 400KHz
(5) Click “Auto” tab and set as below. (6) Click “Run”. (7) After downloading, check “OK” message. (4) filexxx.bin
(5)
(7)...........OK
(6)
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
-8-
LGE Internal Use Only
* USB DOWNLOAD(*.epk file download)
(1) Put the USB Stick to the USB socket. (2) Automatically detecting update file in USB Stick. - If your downloaded program version in USB Stick is Low, it didn't work. But your downloaded version is High, USB data is automatically detecting (3) Show the message "Copying files from memory"
* A fter downloading, have to adjust Tool Option again. (1) Push "IN-START" key in service remote controller. (2) Select "Tool Option 1" and Push "OK" button. (3) Punch in the number. (Each model has their number.) (4) Completed selecting Tool option.
(4) Updating is staring.
(5) After updating is complete, The TV will restart automatically. (6) If TV turns on, check your updated version and Tool option. (refer to the next page about tool option) * If downloading version is higher than your TV have, TV can lost all channel data. In this case, you have to channel recover. If all channel data is cleared, you didn't have a DTV/ATV test on production line.
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
Tool Tool Tool Tool option1 option2 option3 option4
Tool option5
Model
Module
32CS460-SA
LGD
32788
358
9243
13200
2592
32CS460-SZ
LGD
32788
870
9243
13200
2560
42CS460-SA
LGD
32790
870
9243
13200
2561
42CS460-SA
AUO
32CS560-SA
LGD
32CS560-SA
AUO
36900
358
9243
13200
2592
42CS560-SA
LGD
32806
870
9243
13200
2561
33190
358
9371
13200
2080
35105
358
9499
13200
2080
42CS560-SA
AUO
32LS3400-SA
LGD
37LS3400-SA
LGD
42LS3400-SA
LGD
32LM3400-SB
LGD
37LM3400-SB
LGD
42LM3400-SB
LGD
22LS3500-SA
CMI
32LS3500-SA
LGD
32LS3500-SA
AUO
37156
358
9499
13200
2096
32LS4600-SA
LGD
33092
35191
9499
13200
7202
42LS4600-SA
LGD
33094
2423
9499
13200
7170
47LS4600-SA
LGD
33095
2423
9499
13200
7170
50LS4000-SA
AUO
47LM4600-SB
LGD
55LM4600-SB
LGD
42LM5800-SB
LGD
32870
2423
9499
13200
7170
47LM5800-SB
LGD
* RS-232C Connection Method Connection : P CBA (USB Port) -> USB to Serial Adapter (UC-232A) -> RS-232C cable -> PC(RS-232C port) ▪ Product name of USB to Serial Adapter is UC-232A. ※ Caution: LJ21* chassis support only UC-232A driver. ( only use this one. )
-9-
LGE Internal Use Only
4. Total Assembly line process
3.1. ADC Process(TBD) 3.1.1. ADC
■ Enter Service Mode by pushing “ADJ” key, ■ Enter Internal ADC mode by pushing “►” key at “6. ADC Calibration”
4.1. Adjustment Preparation
■ W/B Equipment condition CA210 : C H 9, Test signal : Inner pattern (80IRE) – in case of CCFL back light CA210 : C H14, Test signal : Inner pattern (80IRE) – in case of LED back light ■ Above 5 minutes H/run in the inner pattern. (“power on” key of adjust remote control) Cool
Color Temperature
=> Caution : Using ‘power on’ button of the Adjustment R/C, power on TV.
Medium
Warm
13,000k
9,300k
6,500k
K
X=0.269 (±0.002) Y=0.273 (±0.002)
K
X=0.285 (±0.002) Y=0.293 (±0.002)
K
X=0.313 (±0.002) Y=0.329 (±0.002)
K
X=0.271 (±0.002) Y=0.276 (±0.002)
※ ADC Calibration Protocol (RS232C/USB) NO
Item
CMD 1
CMD 2
Data 0
Enter Adjust MODE
Adjust ‘Mode In’
A
A
0
0
When transfer the ‘Mode In’, Carry the command.
ADC adjust
ADC Adjust
A
D
1
0
Automatically adjustment (The use of a internal pattern)
Cool
Color Temperature
※ Adjust Sequence ▪ aa 00 00 [Enter Adjust Mode] ▪ xb 00 40 [Component1 Input (480i)] ▪ ad 00 10 [Adjust 480i Comp1] ▪ xb 00 60 [RGB Input (1024*768)] ▪ ad 00 10 [Adjust 1024*768 RGB] ▪ aa 00 90 End Adjust mode * Required equipment : Adjustment R/C.
3.2.1. Check display and sound
Color Temperature
■ Check Input and Signal items. (cf. work instructions) (1) TV (2) AV (CVBS) (3) COMPONENT (480i) (4) RGB (PC : 1024 x 768 @ 60hz) (5) HDMI (6) PC Audio In * Display and Sound check is executed by Remote controller. ※ Caution : Not to push the INSTOP KEY after completion if the function inspection
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
Medium
9,300k
K
X=0.287 (±0.002) Y=0.296 (±0.002)
Warm
6,500k
K
X=0.315 (±0.002) Y=0.332 (±0.002)
K
X=0.285 (±0.002) Y=0.293 (±0.002)
K
X=0.295 (±0.002) Y=0.305 (±0.002)
K
X=0.313 (±0.002) Y=0.329 (±0.002)
Cool
3.2. Function Check
- 10 -
13,000k
Medium
Warm
13,000k
9,300k
6,500k
26/32LS3500-SA 32/42CS460-SA 32/37/42CS560-SA 32/42/47/55LS4600SA 32/42/47LM5800-SA 47CM565-SA
32/37/42LS3400-SA 32/37/42LM3400-SA
22LS3500-SA
<Test signal> Inner pattern (204 Gray 80IRE)
<Test signal> Inner pattern (204 Gray 80IRE)
<Test signal> Inner pattern (204 Gray 80IRE)
LGE Internal Use Only
■ Edge LED W/B Table in process of time (Only LGD except AUO/ CMI) LS35/46, LM58 Tool ( LED LCD TV Model ) CA210 : CH 14, Test signal : Inner pattern (80IRE) ▪ Standard color coordinate and temperature using CA-1000 (by H/R time) Cool H/R Time(Min)
Medium
● Auto adjustment Map(RS-232C) RS-232C COMMAND [ CMD ID DATA ] Wb 00 00 White Balance Start Wb 00 ff White Balance End RS-232C COMMAND [CMD ID DATA]
Warm
x
y
x
x
y
x
Cool
Mid
Warm
CENTER (DEFAULT)
MIN
MAX
Cool
Mid
Warm
269
273
285
293
313
329
R Gain
jg
Ja
jd
00
172
192
192
192
1
0-2
280
287
296
307
320
337
G Gain
jh
Jb
je
00
172
192
192
192
2
3-5
279
285
295
305
319
335
B Gain
ji
Jc
jf
00
192
192
172
192
3
6-9
277
284
293
304
317
334
R Cut
64
64
64
128
64
64
64
128
64
64
64
128
4
10-19
276
283
292
303
316
333
G Cut
5
20-35
274
280
290
300
314
330
B Cut
6
36-49
272
277
288
297
312
327
7
50-79
271
275
287
295
311
325
8
80-119
270
274
286
294
310
324
9
Over 120
269
273
285
293
309
323
※ Connecting picture of the measuring instrument (On Automatic control) Inside PATTERN is used when W/B is controlled. Connect to auto controller or push Adjustment R/C POWER-ON -> Enter the mode of White-Balance, the pattern will come out.
● Auto-control interface and directions (1) Adjust in the place where the influx of light like floodlight around is blocked. (Illumination is less than 10ux). (2) Adhere closely the Color Analyzer ( CA210 ) to the module less than 10cm distance, keep it with the surface of the Module and Color Analyzer’s Prove vertically.(80~100°). (3) Aging time - After aging start, keep the power on (no suspension of power supply) and heat-run over 5 minutes. - Using ‘no signal’ or ‘full white pattern’ or the others, check the back light on.
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
** Caution ** Color Temperature : COOL, Medium, Warm. One of R Gain/G Gain/ B Gain should be kept on 0xC0, and adjust other two lower than C0. (when R/G/B Gain are all C0, it is the FULL Dynamic Range of Module) *Manual W/B process using adjusts Remote control. ■After enter Service Mode by pushing “ADJ” key, ■Enter White Balance by pushing “►” key at “7. White Balance”.
※ After You finish all adjustments, Press “In-start” button and compare Tool option and Area option value with its BOM, if it is correctly same then unplug the AC cable. I f it is not same, then correct it same with BOM and unplug AC cable. For correct it to the model’s module from factory JIG model. ※ P ush The “IN STOP KEY” after completing the function inspection. And Mechanical Power Switch must be set “ON”.
- 11 -
LGE Internal Use Only
4.2. DDC EDID Write (RGB 128Byte)
■ Connect D-sub Signal Cable to D-Sub Jack. ■ Write EDID DATA to EEPROM (24C02) by using DDC2B protocol. ■ Check whether written EDID data is correct or not. * For SVC main Ass’y, EDID have to be downloaded to Insert Process in advance.
4.3. DDC EDID Write (HDMI 256Byte)
※ Caution * Use the proper signal cable for EDID Download - Analog EDID : Pin3 exists - Digital EDID : Pin3 exists => Caution -N ever connect HDMI & D-sub Cable at the same time. - Use the proper cables below for EDID Writing. - Download HDMI1, HDMI2 separately because HDMI1 is different from HDMI2.
■ Connect HDMI Signal Cable to HDMI Jack. ■ Write EDID DATA to EEPROM(24C02) by using DDC2B protocol. ■ Check whether written EDID data is correct or not. * For SVC main Ass’y, EDID have to be downloaded to Insert Process in advance.
For Analog EDID
For HDMI EDID
D-sub to D-sub
DVI-D to HDMI or HDMI to HDMI
4.4. EDID DATA
1) All Data : HEXA Value 2) Changeable Data : *: Serial No : Controlled / Data:01 **: Month : Controlled / Data:00 ***:Year : Controlled ****:Check sum - Auto Download ■ After enter Service Mode by pushing “ADJ” key, ■ Enter EDID D/L mode. ■ Enter “START” by pushing “OK” key.
No.
Item
Condition
Hex Data
1 2
Manufacturer ID
GSM
1E6D
Version
Digital : 1
01
3
Revision
Digital : 3
03
● EDID DATA (1) HD EDID Data CheckSum
Physical Address (0x9E)
HDMI 1
A4/5B
10
HDMI 2
A4/4B
20
※ Edid data and Model option download (RS232C) NO
Item
CMD 1
CMD 2
Data 0
Enter download MODE
Download ‘Mode In’
A
A
0
0
When transfer the ‘Mode In’, Carry the command
Edid data and Model option download
Download
A
E
00
10
Automatically download (The use of a internal Data)
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 12 -
LGE Internal Use Only
(2) FHD EDID Data(Deep Color support)
(3) FHD EDID Data(Deep Color not support)
CheckSum
Physical Address (0x9E)
CheckSum
Physical Address (0x9E)
HDMI 1
43/DE
10
HDMI 1
43/25
10
HDMI 2
43/CE
HDMI 3
43/BE
20
HDMI 2
43/15
20
30
HDMI 3
43/05
30
- HDMI
- HDMI
-RGB
-RGB
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 13 -
LGE Internal Use Only
(4) 3D EDID Data(Deep Color not support) CheckSum
Physical Address (0x9E)
HDMI 1
43/23
10
HDMI 2
43/13
20
HDMI 3
43/03
30
4.5. MAC address D/L
Connect: USB port Communication Prot connection ▪ Com 1,2,3,4 and 115200(Baudrate) Mode check: Online Only ▪ Check the test process: DETECT -> MAC -> CI -> Widevine ▪. Play: START ▪. Result: Ready, Test, OK or NG ▪. Printer Out (MAC Address Label)
- HDMI
4.6. LAN Inspection
4.6.1. Equipment & Condition
▪ Each other connection to LAN Port of IP Hub and Jig
-RGB
4.6.2. LAN inspection solution
▪ LAN Port connection with PCB ▪ Network setting at MENU Mode of TV ▪ setting automatic IP ▪ Setting state confirmation ▪ If automatic setting is finished, you confirm IP and MAC Address.
- Model List HD(LAMP)
FHD(LAMP)
HD(LED)
FHD(LED)
FHD 3D(LED)
32CS460-SA
32CS560-SA
22LS3500-SA
42LS3400-SA
42LM3400-SB
32CS460-SZ
42CS560-SA
32LS3500-SA 32LS4600-SA
47LM4600-SB
42CS460-SA
32LS3400-SA
42LS4600-SA
55LM4600-SB
37LS3400-SA
47LS4600-SA
32LM3400-SB 37LM3400-SB
42LM5800-SB 50LS4000-SA
47LM5800-SB
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 14 -
LGE Internal Use Only
5. EYE-Q function check
4.7. LAN PORT INSPECTION(PING TEST)
Step1) Turn on TV. Step2) P ress “P-only” key, enter to power only mode and escape the “P-only” Mode by pressing “Exit” key Step3) Press “Tilt” key, entrance to Local Dimming mode. Step4) At the Local Dimming mode, module Edge Backlight moving Top to bottom Back light of module moving Step5) confirm the Local Dimming mode Step6) Press “Exit” key
4.7.1. Equipment setting
1) Play the LAN Port Test PROGRAM. 2) Input IP set up for an inspection to Test Program. *IP Number : 12.12.2.2
6. 3D Function Test
4.7.2. LAN PORT inspection (PING TEST)
(Pattern Generator MSHG-600, MSPG-6100 [SUPPORT HDMI1.4]) * HDMI mode NO. 872 , pattern No.83 1) Please input 3D test pattern like below (HDMI mode NO. 872 , pattern No.83)
1) Play the LAN Port Test Program. 2) connect each other LAN Port Jack. 3) Play Test (F9) button and confirm OK Message. 4) Remove LAN CABLE
2) W hen 3D OSD appear automatically , then select OK button.
4.8. Outgoing condition Configuration
■ When pressing IN-STOP key by SVC remocon, Red LED are blinked alternatively. And then automatically turn off. (Must not AC power OFF during blinking)
4.9 GND & Hi-pot test
Confirm whether is normal or not when between power board's ac block and GND is impacted on 1.5kV(dc) or 2.2kV(dc) for one second. ■ GND TEST = P OWER CORD GND and SIGNAL CABLE GND ■ Hi-pot TEST = POWER CORD GND and LIVE&NUETRAL ■ Test Process (1) Check the POWER CABLE and SIGNAL CABLE insertion condition. (2) Connect the AV JACK Tester (3) Controller(GWS103-4) on (4) GND TEST(Auto) - If Test is failed, Buzzer operate - If Test is passed, execute next process(HI-pot test) - Remove A/V CORD from A/V JACK BOX (5) HI-POT test(Auto) - If Test is failed, Buzzer operate - I f Test is passed, GOOD Lamp on and move to next process automatically.
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 15 -
3) Don’t wear a 3D Glasses, Check the picture like below
LGE Internal Use Only
7. EYE-Q function check
Step 1) Turn on TV Step 2) Press EYE key of Adj. R/C Step 3) Cover the Eye Q II sensor on the front of the using your hand and wait for 6 seconds Step 4) Confirm that R/G/B value is lower than 10 of the “Raw Data (Sensor data, Back light )”. If after 6 seconds, R/G/B value is not lower than 10, replace Eye Q II sensor Step 5) Remove your hand from the Eye Q II sensor and wait for 6 seconds Step 6) Confirm that “ok” pop up. If change is not seen, replace Eye Q II sensor
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 16 -
LGE Internal Use Only
TROUBLE SHOOTING No power
Check 24V, 12V, 3.5V of Power B/D
: [A] PROCESS
Fail
Check short of Main B/D or Change Power B/D
Pass
Check Output of Q403, IC407, IC401
Fail
Check short of Q403, IC407, IC401
Fail
Re-soldering or Change defect part of Q403, IC407, IC401
Pass Pass
Check LED Assy
Check short of IC402, IC403
Fail
Fail
Re-soldering or Change defect part of Q403, IC407, IC401
Change LED Assy
Pass Check P403 Connector
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 17 -
LGE Internal Use Only
No Raster
: [B] Process
Pass Check LED status On Display Unit
Fail
Repeat A PROCESS
Pass
Check Panel Link Cable Or Module
Fail
Change Panel Link Cable Or Module
Fail
Change Inverter Connector Or Inverter
Pass
Check Inverter Connector Or Inverter Pass
Check Output of IC1401
Fail
Change IC1401
Pass Check LVDS Cable
Fail
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
Change LVDS Cable
- 18 -
LGE Internal Use Only
No Raster on HDMI Signal
No Raster on COMPONENT Signal
Pass
Pass
Check Input source Cable And Jack
Check Input source Cable And Jack
Pass Check the Input/Output Of JK801, JK802, JK803
Pass
Check The Input/Output Of JK1601, JK1602
Fail
Re-soldering or Change the defect part
Fail
Re-download EDID Data] (Adjust Menu EDID D/L)
Pass Re-soldering or Change the defect part
Check the Instart Menu EDID D/L Status Pass
Pass
Check the Input/Output Of IC101
Fail
Fail
Check the Input/Output Of IC103
Re-soldering or Change the defect part
Re-soldering or Change the defect part. Re-download HDCP
Pass Check the Input/Output Of IC101
Pass
Fail
Re-soldering or Change the defect part
Pass
Repeat [A], & [B] Process
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
Fail
Repeat [A], & [B] Process
- 19 -
LGE Internal Use Only
No Raster On AV Video Signal
No Signal On TV(RF) Signal
Pass
Pass
Check Input source Cable And Jack
Check Input source Cable And Jack
Pass
Check The Input/Output Of JK1601
Pass
Fail
Re-soldering or Change the defect part
Check The Input/Output Of TU3703
Pass
Check the Input/Output Of IC101
Fail
Re-soldering or Change the defect part
Fail
Re-soldering or Change the defect part
Pass
Fail
Re-soldering or Change the defect part
Check the Input/Output Of IC101
Pass
Pass
Repeat [A], & [B] Process
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
Repeat [A], & [B] Process
- 20 -
LGE Internal Use Only
No Sound
Check The Input Sourse
Fail
Change The Source Input
Pass
Check The Input/Output Of IC501
Fail
Re-soldering or Change the defect part
Pass
Check The Speaker
Fail
Change Speaker
Pass
Check The Speaker Wire
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 21 -
LGE Internal Use Only
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
Side
Rear
- 22 USB1
HDMI3
EPHY
TMDS
DP/DM
SPDIF
SPDIF
Ethernet
L/R
RGB, H/VSYNC
CVBS, Y/Pb/Pr, L/R
Y/Pb/Pr, L/R
DDC/ D[0:2]/ CK/ HPD
TU_SW
SIF
TU_CVBS
IF +/-
PC/DVI Audi In
RGB PC
Component2 Component1&AV
HDMI1/2(DVI)
TDSNTDSNB001F
24M
X-tal
LGE2112-T8 IC101
I2S
DDR3 1Gb IC1202 H5TQ1G63DFR
CONTROL IR & LED / SOFT TOUCH (TACT SWITCH)
NAND FLASH IC102 (1Gbit)
SPK L/R
AT24C256C-SSHL-T IC104 256Kbit
EEPROM
DDR3 1Gb IC1201 H5TQ1G63DFR
SERIAL FLASH IC1401 (8M bit) MX25L8005M2I
Audio AMP NTP7500
SOFT TOUCH _SCL/SDA
IR
LED_R
KEY2
KEY1
SENSOR_SCL/SDA
I2C
DDR3 Data
DDR3 Add.
SPI
LVDS (FHD/50Hz)
FPC(51P)
BLOCK DIAGRAM
LGE Internal Use Only
EXPLODED VIEW IMPORTANT SAFETY NOTICE
910
530
Copyright Š LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 23 -
/
HOME
A7
A2
510
300
310
A10
* Set + Stand * Stand Base + Body
120
AG1
810
200
550
820
LV1
800
540
900
521
400
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
LGE Internal Use Only
IC102 NAND01GW3B2CN6E +3.3V_Normal
CL /PF_CE1
OPT R104 10K
AL PF_ALE W /PF_WE WP C
OS R102 3.3K
E
NC_11
OS R106 1K
B
/PF_WP
NC_12
OPT Q101 MMBT3904(NXP)
NC_13 NC_14 NC_15
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
1K
34
16
NC_22
OPT
15
C103 0.1uF OS
VSS_2
1K
35
OPT
36
14
W21 AA18 AB22
PCM_D[3]
AE20
PCM_D[4]
AA15
PCM_D[5] PCM_D[6]
AE21 AB21
PCM_D[7]
Y15
PCM_A[0]
W20
PCM_A[1]
R152
13
VDD_2
R123
37
OS C102 10uF
NC_23
1K
38
12
S7LR2_DIVX_MS10
PCM_D[0] PCM_D[1] PCM_D[2]
PCM_A[0-14] NC_24
OS
11
+3.3V_Normal
NC_25
OS AR102
I/O2
PCM_A[2]
I/O1
PCM_A[1]
I/O0
OPT C112 100pF 50V
LED_R/BUZZ
PCM_A[7]
AB17
AUD_SCK
PCM_A[8]
Y16
PCM_A[9]
AB19
PCM_A[10]
AB20
PWM1
PCM_A[11]
AA16
PWM0
PCM_A[12]
AA19
PCM_A[13]
AC21
PCM_A[14]
AA17
56
PCM_A[0]
22
NC_19 NC_18
AA20 Y19
AUD_MASTER_CLK_0 PCM_A[3]
I/O3
PCM_A[4]
AA21
R148
AUD_MASTER_CLK
W22 AB18
PCM_A[5]
NC_21 NC_20
V20
PCM_A[2] PCM_A[3]
PCM_A[6]
1K
NC_10
39
PCM_A[4]
1K
NC_9
40
10
I/O4
/PCM_REG
AA22
NC_16
AD22
/PCM_IORD
+5V_Normal
AD20
AC20 Y18
/PCM_CD
Y21 Y22
NC_2 NC_3 NC_4 NC_5 NC_6 R/B RE CE NC_7 NC_8 VCC_1 VSS_1 NC_9 NC_10 CLE ALE WE WP NC_11 NC_12 NC_13 NC_14 NC_15
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31 30
19 20
29
21
28
22
27 26
23 24
25
NC_27 NC_26 NC_5 I/O7 I/O6
42
8
41
9
40
10
39
11
38
RE CE
NC_8 NC_23 VCC_1 VCC_2
44
7
R/B
NC_7
45
5
43
I/O4
NC_24
4
6
I/O5
NC_25
46
3
NC_4
NC_6
47
2
NC_28 NC_3
48
1
NC_2
C108 0.1uF OPT
12
37
13
36
NC_29
NC_1
NC_28
NC_2
NC_27
NC_3
NC_26
NC_4
I/O7
NC_5
I/O6
NC_6
I/O5
RY/BY
I/O4
RE
NC_25
CE
NC_24
NC_7
47
2
46
3
VCC_1
VCC_2
/CI_CD2
48
1
NC_8
NC_23
/CI_CD1
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
VSS_2
VSS_1
NC_22
NC_9
13
36
NC_22
14
35
14
35
NC_10
15
34
16
33
NC_21
NC_10
NC_20
CLE
15
34
16
33
ALE I/O3
17
WE I/O2 WP I/O1 NC_11 I/O0 NC_12 NC_19 NC_13 NC_18 NC_14 NC_17 NC_15 NC_16
32 31
18 19
30
20
29
21
28
22
27
23
26
24
25
I/O3
ALE
I/O2
WE
I/O1
WP
I/O0
17
NC_12
NC_18
NC_13
NC_17
NC_14
NC_16
NC_15
31
18
NC_11
NC_19
32
19
30
20
29
21
28
22
27
23
26
24
25
TE(US)_Multi IC101-*5 LGE2111A-TE
I/O8 I/O7
T8(EU)_Multi IC101-*6 LGE2111A-T8
C7 E6 F5
I/O6
B6 E5 D5
I/O5
B7 E7 F7
NC_25
AB5 AB3 A9
NC_24
F4 AB1 N6
NC_23
AB2 AC2
GPIO36
LVA0P
GPIO37
LVA0N
GPIO38
LVA1P
GPIO39
LVA1N
GPIO40
LVA2P
GPIO41
LVA2N
GPIO42
LVA3P
GPIO45
LVA3N
GPIO46
LVA4P
GPIO49
LVA4N
GPIO51
LVB0P
GPIO52
LVB0N
I2C_SCKM0/GPIO53
LVB1P
I2C_SDAM0/GPIO54
LVB1N
GPIO73
LVB2P
GPIO74
LVB2N
C7 E6
AC25
F5
AB24
B6
AD25
E5
AC24
D5
AE23
B7
AC23
E7
AD23
F7 AB5 AB3
V23
A9
U24
F4
V25
AB1
V24
N6
W25
AB2
W23
AC2
AA23
LVB3P
LVA0P
GPIO36 GPIO37
LVA0N
GPIO38
LVA1P
GPIO39
LVA1N
GPIO40
LVA2P
GPIO41
LVA2N
GPIO42
LVA3P
GPIO45
LVA3N
GPIO46
LVA4P
GPIO49
LVA4N
GPIO50 GPIO51
LVB0P
GPIO52
LVB0N
I2C_SCKM0/GPIO53
LVB1P
I2C_SDAM0/GPIO54
LVB1N
GPIO73
LVB2P
GPIO74
LVB2N LVB3P
Y24
LVB3N
VSS_2
AB25 AB23
AC22
GPIO50
VCC_2
LVB3N
AA25
LVB4P
AA24
LVB4N
LVACKN
Y23
LVBCKP
W24 T25
GPIO196
GPIO193
T24
GPIO194
T23
GPIO195
D5
AE23
B7
AC23
E7
AC22
F7
AD23
AB5 AB3
V23
A9
U24
F4
V25
AB1
V24
N6
W25
AB2
W23
AC2
AA23
GPIO37
LVA0N
GPIO38
LVA1P
GPIO39
LVA1N
GPIO40
LVA2P
GPIO41
LVA2N
GPIO42
LVA3P
GPIO45
LVA3N
GPIO46
LVA4P
GPIO49
LVA4N
GPIO50 GPIO51
LVB0P
GPIO52
LVB0N
I2C_SCKM0/GPIO53
LVB1P
I2C_SDAM0/GPIO54
LVB1N
GPIO73
LVB2P
GPIO74
LVB2N LVB3P
Y24
LVB3N
AA25
LVB4P
AA24
AB25
C7
AB23
E6
AC25
F5
AB24
B6
AD25
E5
AC24
D5
AE23
B7
AC23
E7
AC22 AD23
F7 AB5 AB3
V23
A9
U24
F4
V25
AB1
V24
N6
W25
AB2
W23
AC2
AA23
N25 N24
LVA0P
GPIO37
LVA0N
GPIO38
LVA1P
GPIO39
LVA1N
GPIO40
LVA2P
GPIO41
LVA2N
GPIO42
LVA3P
GPIO45
LVA3N
GPIO46
LVA4P
GPIO49
LVA4N
GPIO50
NF_CEZ/GPIO137 NF_CLE/GPIO136
PCMADR[1]/GPIO124
NF_REZ/GPIO139
PCMADR[2]/GPIO122
NF_WEZ/GPIO140
PCMADR[3]/GPIO121
NF_ALE/GPIO141
PCMADR[4]/GPIO99
NF_RBZ/GPIO142
LVB0P LVB0N
I2C_SCKM0/GPIO53
LVB1P
I2C_SDAM0/GPIO54
LVB1N
GPIO73
LVB2P
GPIO74
LVB2N LVB3P
Y24
LVBCKP
LVB3N
AA25
LVB4P
AA24
W24
GPIO194
AB24
LVBCKP
W24
AD23
P23
R137
22
P24
D1
RGB_DDC_SCL
PCMADR[8]/GPIO108 GPIO_PM[0]/GPIO6
PCMADR[10]/GPIO114
PM_UART_TX/GPIO_PM[1]/GPIO7
PCMADR[11]/GPIO112
GPIO_PM[2]/GPIO8
PCMADR[12]/GPIO104
GPIO_PM[3]/GPIO9
PCMADR[13]/GPIO107
GPIO_PM[4]/GPIO10 PM_UART_RX/GPIO_PM[5]/GPIO11 PM_SPI_SCZ1/GPIO_PM[6]/GPIO12 GPIO_PM[7]/GPIO13 GPIO_PM[8]/GPIO14
PCMOE_N/GPIO113
GPIO_PM[9]/GPIO15
PCMWE_N/GPIO197
PM_SPI_SCZ2/GPIO_PM[10]/GPIO16
PCMIORD_N/GPIO111
E6 F5 B6
NC_17
E5 D5 B7
NC_16
E7 F7
GPIO36
LVA0P
GPIO37
LVA0N
GPIO38
LVA1P
GPIO39
LVA1N
PM_SPI_CZ0/GPIO_PM[12]/GPIO0
PCMIRQA_N/GPIO105
PM_SPI_SDI/GPIO2
PCMCD_N/GPIO130
GPIO40
LVA2P
GPIO41
LVA2N
GPIO42
LVA3P
GPIO45
LVA3N
GPIO46
LVA4P
GPIO49
LVA4N
GPIO51
LVB0P
GPIO52
LVB0N
I2C_SCKM0/GPIO53
LVB1P
I2C_SDAM0/GPIO54
LVB1N
GPIO73
LVB2P
GPIO74
LVB2N
E6 F5
AB24
B6
AD25
E5
AC24
D5
AE23
B7
AC23
E7
AC22
F7
AD23
AB5 AB3
GPIO50
+3.3V_Normal
V23
A9
U24
F4
V25
AB1
V24
N6
W25
AB2
W23
AC2
AA23
GPIO36
LVA0P
GPIO37
LVA0N
GPIO38
LVA1P
GPIO39
LVA1N
GPIO40
LVA2P
GPIO41
LVA2N
GPIO42
LVA3P
GPIO45
LVA3N
GPIO46
LVA4P
GPIO49
LVA4N
GPIO50 GPIO51
LVB0P
GPIO52
LVB0N
I2C_SCKM0/GPIO53
LVB1P
I2C_SDAM0/GPIO54
LVB1N
GPIO73
LVB2P
GPIO74
LVB2N LVB3P
Y24
LVB3N
AA25
LVB4P
AA24
GPIO193
T24
GPIO194
T23
PWM0
W23 AA23
N23
PWM1
Y24 AA25
P22
PWM2
+3.5V_ST
AA24
R21
LED_B/LG_LOGO
P20
AD24 Y23
F6
W24
LED_R/BUZZ
AE24 AD24
LVACKN LVBCKP
W24
B6
AD25
E5
AC24
D5
AE23
B7
AC23
E7
AC22
F7
AD23
AB5 AB3
V23
A9
U24
F4
V25
AB1
V24
N6
W25
AB2
W23
AC2
AA23
GPIO36
LVA0P
GPIO37
LVA0N
GPIO38
LVA1P
GPIO39
LVA1N
GPIO40
LVA2P
GPIO41
LVA2N
GPIO42
LVA3P
GPIO45
LVA3N
GPIO46
LVA4P
GPIO49
LVA4N
GPIO50 GPIO51
LVB0P
GPIO52
LVB0N
I2C_SCKM0/GPIO53
LVB1P
I2C_SDAM0/GPIO54
LVB1N
GPIO73
LVB2P
GPIO74
LVB2N LVB3P
Y24
LVB3N
AA25
LVB4P
AA24
T24
R149 4.7K 11_SUB
T23
S7LR2_DIVX_CN IC101-*4 LGE2111A-VD
GPIO196
GPIO196 GPIO193
T24
GPIO194
GPIO194
T23
GPIO195
E6 F5
AB24
B6
AD25
E5
AC24
D5
AE23
B7
AC23
E7
AC22
F7
AD23
AB5 AB3
V23
A9
U24
F4
V25
AB1
V24
N6
W25
AB2
W23
AC2
AA23 Y24 AA25 AA24
GPIO36
LVA0P
GPIO37
LVA0N
GPIO38
LVA1P
GPIO39
LVA1N
GPIO40
LVA2P
GPIO41
LVA2N
GPIO42
LVA3P
GPIO45
LVA3N
GPIO46
LVA4P
GPIO49
LVA4N
GPIO50
R143 4.7K 11_SUB
PM_SPI_SDO/GPIO3
TS0CLK/GPIO87 PCM2_CE_N/GPIO131
TS0VALID/GPIO85
PCM2_IRQA_N/GPIO132
AD24
LVACKN
Y23
LVBCKP
W24
AMP_MUTE R147
D3 R154 B2 B1
22
33 R146
SPI_SCK
33
/SPI_CS
OPT R151
SPI_SDI
33
PCM2_WAIT_N/GPIO133
TS0DATA_[0]/GPIO77
PCM2_RESET/GPIO134
TS0DATA_[1]/GPIO78 TS0DATA_[2]/GPIO79
UART1_TX/GPIO43
TS0DATA_[3]/GPIO80
UART1_RX/GPIO44
TS0DATA_[4]/GPIO81
UART2_TX/GPIO65
TS0DATA_[5]/GPIO82
UART2_RX/GPIO64
TS0DATA_[6]/GPIO83
UART3_TX/GPIO47
TS0DATA_[7]/GPIO84
CI_TS_CLK CI_TS_VAL CI_TS_SYNC
AA10 Y12
CI_TS_DATA[0-7]
Y13
CI_TS_DATA[0]
Y11
CI_TS_DATA[1]
AA12
CI_TS_DATA[2]
from CI SLOT
CI_TS_DATA[3]
AB12 AA14
CI_TS_DATA[4]
AB14
CI_TS_DATA[5]
AA13
CI_TS_DATA[6]
AB11
CI_TS_DATA[7] FE_TS_CLK FE_TS_VAL_ERR FE_TS_SYNC
AC15 TS1CLK/GPIO98
I2C_SCKM2/DDCR_CK/GPIO72
TS1VALID/GPI96
I2C_SDAM2/DDCR_DA/GPIO71
TS1SYNC/GPIO97
AD15
FE_TS_DATA[0-7]
AC16
DDCA_DA/UART0_TX
TS1DATA_[0]/GPIO88
DDCA_CK/UART0_RX
TS1DATA_[1]/GPIO89 TS1DATA_[3]/GPIO91
PWM0/GPIO66
TS1DATA_[4]/GPIO92
PWM1/GPIO67
TS1DATA_[5]/GPIO93
PWM2/GPIO68
TS1DATA_[6]/GPIO94
PWM3/GPIO69
TS1DATA_[7]/GPIO95
AE15
FE_TS_DATA[1]
AE14
FE_TS_DATA[2]
AC13
FE_TS_DATA[3]
AC14
FE_TS_DATA[4]
AD12
FE_TS_DATA[5]
AD13
FE_TS_DATA[6]
AD14
FE_TS_DATA[7]
PWM4/GPIO70
G5 R101
22
G4
R163 11_SUB R164 11_SUB
22
J5
22
J4
SAR0/GPIO31 SAR1/GPIO32 SAR2/GPIO33 SAR3/GPIO34 SAR4/GPIO35
EU_OPT
LVB0P LVB0N
I2C_SCKM0/GPIO53
LVB1P
I2C_SDAM0/GPIO54
LVB1N
GPIO73
LVB2P
GPIO74
LVB2N LVB3P LVB3N LVB4P
AD24 Y23 W24
GPIO196 GPIO193
T24
GPIO194
T23
GPIO195
GPIO195
R24 L/DIM_SCLK
AB24 AD25
R25
L/DIM_MOSI
AC24 AE23
T21
SENSOR_SCL
AC23 AC22
T22
SENSOR_SDA
AD23
SPI1_CK/GPIO201 SPI1_DI/GPIO202 SPI2_CK/GPIO203 SPI2_DI/GPIO204
U24 V25 V24 W25 W23 AA23 Y24 AA25 AA24 AE24
LVACKP LVACKN LVBCKP
AD24 Y23 W24
S7LR2_DIVX_MS10 IC101 LGE2111A-T8
LVBCKN T25
U23
VSYNC_LIKE/GPIO145
AB23 AC25
U23 T24 T23
T25 GPIO196 GPIO193 GPIO194
U23 T24 T23
GPIO195
A0
NON_OS_512k_ST
NON_OS_512k_ATMEL
5V_DET_HDMI_2
I2C_SDA
IC104-*3 M24512-RMN6TP
IC104-*4 AT24C512C-SSHD-T
5V_DET_HDMI_4 +3.3V_Normal
VCC
A0
WC
A1
SCL
A2
1
8
4.7K R182 URSA5_RESET
8
1
VCC
7
E5
AV_CVBS_DET
D5
2
7
3
6
2
7
3
6
WP
SCL
VSS
4
5
SDA
GND
4
5
SDA
TUNER_RESET
EAN43349004
AMP_SDA MODEL_OPT_2 DEMOD_RESET
C105 0.1uF
VCC
NVRAM_ST
NVRAM_RENESAS
IC104-*1 M24256-BRMN6TP
IC104-*2
applied on only SMALL PCB
AB5 AB3
R171 100 URSA5_RESET
A9 F4
R172
0
AB1
R173 OPT
0
N6
OPT
AB2 AC2
LVA0P
GPIO37
LVA0N
GPIO38
LVA1P
GPIO39
LVA1N
GPIO40
LVA2P
GPIO41
LVA2N
GPIO42
LVA3P
GPIO45
LVA3N
GPIO46
LVA4P
GPIO49
LVA4N
GPIO50 GPIO51
LVB0P
GPIO52
LVB0N
I2C_SCKM0/GPIO53
LVB1P
I2C_SDAM0/GPIO54
LVB1N
GPIO73
LVB2P
GPIO74
LVB2N
R178
100
OPT
R179
100
OPT
LVB3N
R177 10K 11_SUB
E0
WP
1
8
2
7
3
6
4
5
VCC
A0
WC
A1
1
8
2
7
3
6
4
5
VCC
LVB4P
GND
6
4
5
EAN61133501
SCL
SDA
C104 8pF OPT
R111
22
R112
22
C106 8pF OPT
E1
I2C_SCL E2
I2C_SDA
SCL
A2
LVACKN
WP
SCL
LVBCKP R175 10K TACT_KEY
R176 10K 12_SUB
SDA
VSS
RXA1-
AD25
RXA2+
AC24
RXA2-
AE23
RXA3+
AC23
RXA3-
AC22
RXA4+
AD23
RXA4RXB0+
U24
RXB0-
V25
RXB1+
V24
RXB1-
W25
RXB2+
W23
RXB2-
AA23
RXB3+
Y24
RXB3-
AA25
RXB4+
AA24
RXB4RXACK+
AD24
RXACK-
Y23
RXBCK+
W24
RXBCK-
LVBCKN T25 GPIO196
VSS
RXA1+
AB24
AE24
PM_MODEL_OPT_1
3
RXA0-
AC25
LVB4N LVACKP
A0’h A2
RXA0+
AB23
V23
LVB3P R174 10K TOUCH_KEY
R1EX24256BSAS0A
F7
MODEL_OPT_0
AMP_SCL URSA5_RESET
E7
HP_DET OLP
MODEL_OPT_1 +3.5V_ST
B7
AB25 GPIO36
PM_MODEL_OPT_0 A1
I2C_SDA
8
B6
SC1/COMP1_DET
URSA5_RESET
2
F5
DSUB_DET E0
+3.3V_Normal
1
E6
5V_DET_HDMI_1
8
I2C_SCL
Internal demod out
FE_TS_DATA[0]
AD16
AMP_SCL
EEPROM
SDA
SPI_SDO
for SERIAL FLASH
R145 2.2K
IC104 AT24C256C-SSHL-T NVRAM_ATMEL
HDCP_EEPROM C107 0.1uF
R129 22 HDCP_EEPROM
PM_MODEL_OPT_0
M4
C7
HDCP_EEPROM
5
PANEL_CTL
C1
LVB4N
LVBCKN
EAN43349003
HDCP_EEPROM 22 R128
SIDE_HP_MUTE
M5
LOCAL DIMMING
PM MODEL OPTION
R127 4.7K HDCP_EEPROM
M6
TS0SYNC/GPIO86
PCM2_CD_N/GPIO135
AMP_RESET
Addr:10101--
SCL
/FLASH_WP
H6 KEY1
AMP_SDA
+3.3V_Normal
6
L5
V23
GPIO51 GPIO52
AE24 LVACKP
T25
U23
E2
7
PM_RXD
C2
AB25
C7
AB23 AC25
LVB4N
LVBCKN
GPIO193
PWM0
E6 F5
AB24
AE24 LVACKP
Y23
E1
3
POWER_ON/OFF_1
L6
PWM_PM/GPIO199
SENSOR_SCL
2
RL_ON
K4
U23
GPIO195
AB25
C7
AB23 AC25
LVB4N
LVACKP
SENSOR_SDA
A2
INV_CTL
J6
PCMWAIT_N/GPIO100
P21
W25
I2C_SCL
VSS 4
PM_TXD
K5
A2
PWM2
WP
POWER_DET
K6
T25 GPIO196
U23
S7LR2_DIVX_DTS_AT IC101-*3 LGE2111A-W1
AB25
C7
AB23 AC25
LVB4N
A_DIM C111 2.2uF
1
/F_RB
GPIO_PM[11]/GPIO17 PM_SPI_SCK/GPIO1
PCMCE_N/GPIO115
V25 V24
L/DIM_VS AB25
C7
NC_18
T25
A1
PF_ALE
AD19
R23
LVBCKP
IC103
/PF_WE
AE17
H5
PCMADR[9]/GPIO110
TS1DATA_[2]/GPIO90
SCART1_MUTE
LVBCKN
HDCP_EEPROM CAT24WC08W-T R113 4.7K VCC A0
/PF_OE
AD17
PCMADR[7]/GPIO103
D2
S/T_SCL
LVACKN
HDCP EEPROM
/PF_CE1
AC19
PCMADR[6]/GPIO102
U24
I/O2
NC_19
22
RGB_DDC_SDA
AC22
LVBCKN
GPIO195
S7LR2_DIVX_AT_SPIL IC101-*2 LGE2111A-TE SPIL
R136
AE23 AC23
KEY2
S7LR2_DIVX_AT_ASE IC101-*1 LGE2111A-TE
/PF_CE0
AC18
AC24
S/T_SDA
I/O1
/PF_WP
AD18
AR104 22 OS
UART3_RX/GPIO48
I2C_SDA
AD25
AE24 LVACKN
Y23
T25 GPIO196 GPIO193
T24 T23
A8
MODEL_OPT_7
I2C_SCL
AC25
LVB4N LVACKP
AD24
LVBCKN
U23
AB23
AC17
PCMADR[5]/GPIO101
V23
GPIO51 GPIO52
AE24 LVACKN
Y23
B8
MODEL_OPT_6
AB25 GPIO36
LVB4N LVACKP
AD24
for SYSTEM EEPROM (IC104)
I/O3
LVB3N
R144 2.2K
B6 E5
AC24
W1(KR)_Multi IC101-*8 LGE2111A-W1 [MULTI]
I/O4
LVB4P
R161 1K
F5
AB24 AD25
GPIO195
LVB3P
R160 1K
AC25
LVA0P
GPIO36
T25 GPIO196
U23
GPIO194
AC2
R140 R141 1K 1K
C7 E6
LVBCKN
NC_21
AB2
100
AB25 AB23
AE24 LVACKP
AD24
LVACKN LVBCKP
NC_20
VD(CN)_Multi IC101-*7 LGE2111A-VD
LVB4N AE24
NC_22
N6
R157
E4
PM_TXD
AB1
PWM_DIM
NF_WPZ/GPIO198
PCMADR[0]/GPIO125
D4
PM_RXD
F4
A_DIM
U22
USB2_CTL
NC_26
A9
A_DIM R156 10K
R20 T20
MSTAR (IC101) Multi package (11.11.18~)
NC_27
AB3
I2C
V21
USB1_CTL PCM_5V_CTL
USB2_OCD
AB5
DIMMING
22 22
ERROR_OUT
GPIO193
CLE NC_20
PCMDATA[7]/GPIO116
Y14
to delete CI or gate for
LVBCKN
NC_21
R120 R122 OPT
NC_28
LVACKP
NC_9
NF_CE1Z/GPIO138
PCM_RESET/GPIO129
C109 0.1uF
USB1_OCD
NC_29
LVB4P
VSS_1 VSS_2
AE18
PCMDATA[6]/GPIO117
U21
OPT
EAN61508001 IC102-*3 TC58NVG0S3ETA0BBBH
EAN61857001 IC102-*2 K9F1G08U0D-SCB0
NC_1
PCMDATA[5]/GPIO118
AD21 /PCM_CE /PCM_IRQA
PCM_RST
NAND_FLASH_1G_TOSHIBA
NAND_FLASH_1G_SS
NC_29
OS AR103 22
PCMDATA[4]/GPIO119
PCMIOWR_N/GPIO109
/PCM_WAIT
48
PCMDATA[3]/GPIO120
AB15 /PCM_WE
R132 10K
1
PCMDATA[2]/GPIO128
PCMREG_N/GPIO123
/PCM_OE
NC_17
R133 10K
NC_1
PCMDATA[1]/GPIO127
Y20
/PCM_IOWR
NAND_FLASH_1G_HYNIX EAN35669102 IC102-*1 H27U1G8F2BTR-BC
PCMDATA[0]/GPIO126
PCMADR[14]/GPIO106 R153
VSS_1 OPT R105 1K
9
PCM_A[5]
R124
+3.3V_Normal
41
PCM_A[6]
I/O5
NON_OS
VDD_1
8
I/O6
PCM_D[0-7]
Boot from 8051 with SPI flash Secure B51 without scramble Secure B51 with scramble Boot from MIPS with SPI flash Boot from MIPS with SPI flash Boot from MIPS with SPI flash Secure MIPS without scramble Scerur MIPS with SCRAMBLE
1K
NC_8
42
4’b0000 4’b0001 4’b0010 4’b0100 4’b0101 4’b0110 4’b1001 4’b1010
OPT
OS C101 0.1uF
43
7
: : : : : : : :
R165
NC_7 OPT R108 1K
6
B51_no_EJ SB51_WOS SB51_WS MIPS_SPE_NO_EJ MIPS_SPI_EJ_1 MIPS_SPI_EJ_2 MIPS_WOS MIPS_WS
PCM_A[7]
R117
/PF_CE0
44
I/O7
1K
E
5
NC_26
1K
R /PF_OE
45
<CHIP Config> (I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)
R118
RB
46
4
IC101 LGE2111A-T8 PCM_A[0-7]
OS 22 AR101
NC_27
R121
NC_6
/F_RB
3
1’b0 1’b1
NC_28
1K
NC_5
NAND_FLASH_1G_NUMONYX EAN60762401 47 2
NC_29
OPT
NC_4 OS R109 3.9K
OS R107 1K
48
R115
NC_2 NC_3
<CHIP Config(LED_R/BUZZ)> Boot from SPI CS1N(EXT_FLASH) Boot from SPI_CS0N(INT_FLASH)
+3.3V_Normal 1
1K
NC_1
R116
NAND FLASH MEMORY
SDA
GPIO193 GPIO194
MODEL_OPT_3
U23
MODEL_OPT_4
T24
MODEL_OPT_5
T23
S2_RESET
GPIO195
EAN61548301
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
EAN62389501
GP4L_S7LR2 FLASH/EEPROM/GPIO
2011.12.01 1
LGE Internal Use Only
MODEL OPTION
OPC&SCANNING_CTRL
+1.10V_VDDC
0.1uF
0.1uF OPT
OPT
OPT
C4024
OS:NON_DualStream OS:DualStream NonOS:NON_ErrorOut NonOS:ErrorOut
OPT
C4019
A8
OPT
0.1uF
120HZ
MODEL_OPT_7
0.1uF
DVB_S
NON_120HZ
OPT
C4013
NON_DVB_S
B8
OPT
C4011
T24
MODEL_OPT_6
0.1uF
MODEL_OPT_5
OPT
0.1uF
OLED
C4006
NON_OLED
C299
U23
0.1uF
3D
MODEL_OPT_4
DVB_T2
C292
NON_3D
1uF
AB2 T25
0.1uF
MODEL_OPT_2 MODEL_OPT_3
NON_DVB_T2
+1.10V_VDDC VDDC : 2026mA
C280
MODEL_OPT_1
VDDC 1.05V
PHM_ON
C283
PHM_OFF
10uF
F4
1uF
MODEL_OPT_1
HD
C276
HD
FHD
MODEL_OPT_0
R203 RF_SW_OPT 100 OPT 100 R204
RF_SWITCH_CTL
HIGH
LOW
AB3
10uF
1K
1K PHM_ON
R211
R226
1K 3D R208
R206
DVB_T2
1K
1K OLED
DVB_S
OPT 100 R201 R202 BOOSTER_OPT100
PIN NO.
MODEL_OPT_0
C277
LNA2_CTL
R291
1K
R4027
120HZ
R290
R4028
OS_DualStream(O)/NonOS_ErrorOut(X)
IF_AGC_SEL
1K
1K
MODEL OPTION
10uF
PIN NAME
+3.3V_Normal
C275
+2.5V_Normal
C228
+3.3V_Normal
MODEL_OPT_2 MODEL_OPT_3
R4031 OPT R4032 OPT
100
MODEL_OPT_4
100
MODEL_OPT_5
R4040 OPT
100
MODEL_OPT_6
R4039
100
MODEL_OPT_7
HALF_NIM/ASIA
HALF_NIM/ASIA
C4068-*1 68pF
* Dual Stream is only Korea 3D spec
IC101 LGE2111A-T8
C4069-*1 68pF +1.10V_VDDC
S7LR2_DIVX_MS10
DTV_IF
Normal Power 3.3V
IF_P_MSTAR HALF_NIM/EU_NON_T2 C4068 100pF
H9 L204 BLM18PG121SN1D
J2 CK+_HDMI1
J3
CK-_HDMI1
K3
D0+_HDMI1
J1
D0-_HDMI1 D1+_HDMI1
K2 K1
D1-_HDMI1
L2
D2+_HDMI1
L3
D2-_HDMI1
T5
DDC_SDA_1
T4
DDC_SCL_1
V5
HPD1
C264 1000pF OPT
AC4 RXACKP
VIFP
RXACKN
VIFM
RXA0P
ANALOG SIF Close to MSTAR
AD3
IP
RXA1P
IM
RXA1N SIFP
RXA2N
SIFM
0.1uF
0.1uF
0.1uF
C232
C267
0.1uF
0.1uF
0.1uF
10uF
0.1uF
OPT
N12 P14 R10 R14
FB_CORE
R15 T10
L208 BLM18PG121SN1D
L227 BLM18PG121SN1D HALF_NIM/EU_NON_T2
DDCDA_CK/GPIO23
C240 0.1uF
AD2
GND_33 GND_34
VDDC_2
GND_35
VDDC_3
GND_36
VDDC_4
GND_37
VDDC_5
GND_38
VDDC_6
GND_39
VDDC_7
GND_40
VDDC_8
GND_41
VDDC_9
GND_42
VDDC_10
GND_43
VDDC_11
GND_44
VDDC_12
GND_45
VDDC_13
GND_46
VDDC_14
GND_47 GND_49
P10
C241 0.1uF
P19
FB_CORE
HALF_NIM/EU_NON_T2 R4019 10K HALF_NIM/EU_NON_T2 R4004 0
HOTPLUGA/GPIO19
GND_32
VDDC_1
GND_48
AC5 HALF_NIM/EU_NON_T2 C4064 0.1uF
R16 L11 M14
MIUVDDC
AVDD1P0
GND_50
FB_CORE
GND_51
AVDDL_MOD
GND_52
AVDD10_LAN
GND_53
DVDD_DDR
GND_54
IF_AGC_MAIN
AE2
RF_AGC
AE6
GND_55
C4065 0.047uF 25V HALF_NIM/EU_NON_T2
OPT R4001 0
TUNER_I2C I2C_SCKM1/GPIO75
OPT
+3.3V_Normal
AE3
DDCDA_DA/GPIO24
IF_AGC
M12
OPT OPT
AVDD_AU33
AD4
RXA2P
L10
P15
AC3
RXA0N
OPT
K11
M13 C265
47
C4031
0.1uF R4003
C4025
C251
TU_SIF
OPT
C4020
47
C284
0.1uF R4002
C4044
S7LR2_DIVX_MS10
C250
C4043
IC101 LGE2111A-T8
0.1uF
HALF_NIM/EU_NON_T2 C4069 100pF
0.1uF
HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2
K10 0.1uF
IF_N_MSTAR
C4014
0.1uF
C4012
C258
100
0.1uF
R289
G10 AVDDLV_USB
G9
C4007
OPT
OPT
C4067
K12
VDD33
+3.3V_Normal
C4001 10uF
0.1uF
10uF
C257
100
C293
FHD
1K
1K
PHM_OFF
R212
Close to MSTAR R288
HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2
R227
NON_DVB_T2
1K
1K NON_3D
R209
R207
NON_OLED
1K
NON_DVB_S
R4029
R294
1K
1K
1K R293
R4030
OS_DualStream(X)/NonOS_ErrorOut(O)
NON_120HZ
OPT
W9
AVDD2P5
W10 W11
TU_SCL
AD6
W12
TU_SDA
I2C_SDAM1/GPIO76
GND_56 AVDD2P5_ADC_1
GND_57
AVDD2P5_ADC_2
GND_58
AVDD2P5_ADC_3
GND_59
AVDD25_REF
GND_60
Close to MSTAR
GND_61
Y17 C261
AD1
AE9 CK+_HDMI4
AC9
CK-_HDMI4
AC10
D0+_HDMI4
AD9
D0-_HDMI4 D1+_HDMI4
AC11 AD10
D1-_HDMI4
AE11
D2+_HDMI4
AD11
D2-_HDMI4
AE8
DDC_SDA_4
AD8
DDC_SCL_4
AC8
HPD4
D7 RXCCKP RXCCKN
F3
CK-_HDMI2
G3
D0+_HDMI2
F1
D0-_HDMI2 D1+_HDMI2
G2 G1
D1-_HDMI2
H2
D2+_HDMI2
H3
D2-_HDMI2
R6
DDC_SDA_2
U6
DDC_SCL_2
P5
HPD2
R4
CEC_REMOTE_S7
510 33
R3
RGB_PC RGB_PC
DSUB_G+ DSUB_B+
33
R231
68
RGB_PC
R232
33
R233
68
2.4K
R4026
10K RGB_PC R4023
RGB_PC
R230
68
RGB_PC RGB_PC
SCART1_RGB/COMP1
R229
C204
0.047uF
N2
C205
0.047uF
P3
C206
0.047uF
N3
C207
0.047uF
N1
C208
0.047uF
M3
C209
0.047uF
M2
C210
1000pF
M1
USB0_DM
RXC1N
USB0_DP AC12
RXC2N
USB1_DM
DDCDC_DA/GPIO28
USB1_DP AMP_SCL AMP_SDA
C8
RXDCKP
I2S_IN_SD/GPIO151
RXDCKN
I2S_IN_WS/GPIO149
RXD0P
D8
R213
22
DVB_S
R214
22
DVB_S
D9
RXD0N
I2S_OUT_BCK/GPIO156
RXD1P
I2S_OUT_MCK/GPIO154
RXD1N
I2S_OUT_SD/GPIO157
M7
AVDD2P5:172mA
P7 OPT OPT C271 C270 0.1uF 0.1uF
C269 10uF
DEMOD_SCL
C273 0.1uF
C274 0.1uF
C4045
AVDD_AU33
COMP2_DET AUD_SCK
B9
AVDD25_PGA:13mA VDD33
L229 BLM18PG121SN1D
AUD_LRCH
DDCDD_CK/GPIO29
C10
VDD33
AUR0 HSYNC0
AUL1
VSYNC0
AUR1
RIN0P
AUL2
RIN0M
AUR2
GIN0P
AUL3
GIN0M
AUR3
BIN0P
AUL4
BIN0M
C236
AA11
2.2uF COMP2
AVDD_MIU
SC1/COMP1_R_IN
AA9
R253
33
COMP2
R254
68
COMP2
R255
33
COMP2
R256
COMP2
R257
68 33
COMP2
R258
68
SC1_SOG_IN R236
0
NON_EU
COMP2 COMP2 COMP2 COMP2 COMP2 COMP2 COMP2
COMP2
C211
0.047uF
U3
C212
0.047uF
U2
C213
0.047uF
T1
C214
T2
C215
0.047uF 0.047uF
C216
0.047uF
R1
C217
1000pF
T3
AB8 2.2uF
C4027 0.1uF
COMP2_L_IN
Y10
C243
2.2uF
AC7
C244
2.2uF
PC_AUDIO
C245
2.2uF
PC_AUDIO
L17
L223
COMP2_R_IN
M17
AVSS_PGA
PC_L_IN
BLM18SG121TN1D
L16
PC_R_IN
R2
W6
VSYNC1
AUOUTL0
RIN1P
AUOUTL2
RIN1M
AUOUTL3
GIN1P
AUOUTR0
GIN1M
AUOUTR2
BIN1P
AUOUTR3
V6
SCART1_Lout
V4 Y7
TP207
B17
TP208
C23
DDR3 1.5V
W5
A5
SCART1_Rout
U5
C11
TP209
C19 D14 D18
AVDD_MIU
1000pF
W1
BIN2P
AUVAG
BIN2M
AUVRP
CVBS In/OUT R244
33
C225
0.047uF AA8
R245
33
C226
0.047uF
C227
Y4
0.047uF
W4 AA5 Y5
R249
AV_CVBS_IN2
33
OPT
C230
0.047uF AA4
OPT
Y6 AA1
DTV/MNT_VOUT
AA6
R252
68
C233
0.047uF
AB6
L205
5.6uH 5.6uH
CVBS1 ET_RXD[0]/RP/GPIO60
CVBS3
ET_TXD[0]/TP/GPIO57
CVBS4 CVBS5 CVBSOUT0
HEAD_PHONE
EPHY_RP EPHY_TP
C268 4.7uF 10V HEAD_PHONE
G8
AVDD_DDR1:55mA
H8
C272 4.7uF 10V HEAD_PHONE
N22 N21 N20 M22 M21
ET_RXD[1]/RN/GPIO63
EPHY_RN
C4
M20
SOC_RESET
ET_TXD[1]/LED1/GPIO56
F10
B5 ET_TX_EN/GPIO58 ET_MDC/GPIO61 ET_MDIO/GPIO62
EPHY_TN
C3 R264 49.9
A3
R265 49.9
R262 49.9
R263 49.9
B3 B4
C294 0.1uF
ARC0 HWRESET
T6 N5
R210
33
HDMI1_ARC
C231
0.047uF
HDMI1_ARC
+3.5V_ST
IR HDMI_ARC SOC_RESET
W16 V8 T18
C295 0.1uF
N4 IRIN/GPIO4
V15
SWICH SW200 JTP-1127WEM
*H/W opt : ETHERNET
AV_CVBS_IN2
C200 4.7uF 10V
STby 3.5V
SWICH R205 100
VDDP_2
GND_84 GND_85
AVDD_LPLL_1
GND_86
AVDD_LPLL_2
GND_87 GND_88 GND_89 GND_91
AVDD_DDR0_D_1
GND_92
AVDD_DDR0_D_2
GND_93
AVDD_DDR0_D_3
GND_94
AVDD_DDR0_C
GND_95 GND_96
AVDD_DDR1_D_1
GND_97
AVDD_DDR1_D_2
GND_98
AVDD_DDR1_D_3
GND_99 GND_100 GND_102 GND_103
SOC_RESET
+3.5V_ST
C201 0.1uF
GND_1
GND_106
GND_2
GND_107
GND_3
GND_108
GND_4
GND_109
GND_5
GND_110
GND_6
GND_111
GND_7
GND_112
GND_8
GND_113
GND_9
GND_114
GND_10
GND_115
GND_11
GND_116
GND_12
GND_117
GND_13
GND_118
GND_14
GND_119
GND_15
GND_120
GND_16
GND_121
GND_17
GND_122
GND_18
GND_123
GND_19
GND_124
GND_20
GND_125
GND_21
GND_126
GND_22
GND_127
GND_23
GND_128
GND_24
GND_129
GND_25
GND_130
GND_26
GND_131
GND_27
GND_132
GND_28
GND_133
GND_29
GND_134
GND_30
GND_135
GND_31
GND_136
G13 G14 G17 G18 G19 G24 H11 H12 H13 H14 H15 H16 H17 H18 H19 J9 J10 J11 J12 J13 J14 J15 J16 J18 J19 J25 K9 K13 K14 H10 K18 K19 K22 L8 L9 J8 L12 L13 L18 L19 M8 K8 M10 M11 L14 M15 M16 M18 M25 N10 N11 N13 N14 N15 N16 N17 N19 K7 P8 P9 M9 P11 P13 P16 P17 P18 P12 R8 R9 R11 R12 R13 R17 T8 T9 N7 T11 T12 T13 T14 T15 T16 T17 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 R18 V9 V10 V11 V12 V14 V17 T7 E8
MIUVDDC L228 BLM18PG121SN1D
AVDD_NODIE C4071 10uF
L206 BLM18PG121SN1D
D200 BAW56 GEANDE
GND_105
G12
+1.10V_VDDC
AVDD_NODIE:7.362mA R217 10
R200 62K
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
F18 F19
HP_ROUT
C5
ET_COL/LED0/GPIO55
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
OPT
A6
ET_TX_CLK/TN/GPIO59 VCOM
F17
HP_LOUT
C6
CVBS2
F8
H/P OUT
HEAD_PHONE
CVBS0
AB4
Close to MSTAR
L203
EARPHONE_OUTR
CVBSOUT1 C203 1000pF OPT
AC6
E22
1uF
W3
C4042
0.047uF
C263 10uF
0.1uF
C223
AE5
C256 0.1uF
C4009
68
GIN2M
C253 1uF
C249 4.7uF
E19 0.1uF
R242
V1
AD5 AUVRM
C4038
0.047uF 0.047uF
GIN2P
0.1uF
C221 C222
Y3
R241
68 33
RIN2M
C4036
W2
0.1uF OPT
0.047uF
C281
C220
C290
33
E18 10uF OPT
R239
E17
10uF
0.047uF AA3
L209 BLM18PG121SN1D
L202 BLM18SG121TN1D
RIN2P
C278
Y2
D19 HSYNC2
0.1uF
0.047uF
C219
33
GND_83
A23
C4046
C218
68
R246
GND_82 VDDP_1
AUDIO OUT
C22
EARPHONE_OUTL
COMP2_Y+/AV_CVBS_IN
GND_81
GND_104
BIN1M
SOGIN2
TU_CVBS
AVDD_EAR33
GND_101
+1.5V_DDR
C224
SC1_CVBS_IN
GND_80
GND_EFUSE HSYNC1
2
COMP2_Pb+
GND_79 AVDD_AU33
Close to IC with width trace
SOGIN1
R238 R240
GND_78
AUDIO IN
4
COMP2_Y+/AV_CVBS_IN
33
GND_77
AVDD_DDR1_C
AA2 R237
GND_76
K17
AVDD_DDR0:55mA
COMP2 COMP2_Pr+
AVDD_DMPLL
J17
L15
AUR4
GND_75
VDDP_NAND
K16
AA7
AD7
GND_74
AVDD3P3_MPLL
V19
K15
L219 BLM18PG121SN1D
C242
AVDD_DVI_USB_2
AVDD25_PGA
SC1/COMP1_L_IN
Y9
Y8
GND_73
GND_90
2.2uF COMP2
C237
AVDD_DVI_USB_1
R19
W19
HOTPLUGD/GPIO22 AB9
GND_72
W18
C4070 0.1uF 16V
AUD_LRCK
I2S_OUT_WS/GPIO155
GND_71
V7
T19
I2S_I/F
RXD2N
GND_70
M19
AVDD2P5_MOD
RXD2P DDCDD_DA/GPIO30
1uF
W7
AUD_MASTER_CLK_0
GND_69
DVDD_NODIE
DEMOD_SDA
C9
GND_68
AVSS_PGA
L7
R7
B10
AVDD25_PGA
AVDD_NODIE
SIDE_USB1_DP
HOTPLUGC/GPIO21
GND_67
AVDD2P5
L211 BLM18PG121SN1D
SIDE_USB1_DM
AE12
DDCDC_CK/GPIO27 I2S_IN_BCK/GPIO150
GND_65
E9 V3
SC1_B+/COMP1_Pb+
+2.5V_Normal
SIDE_USB2_DP
VDD33
RXC2P
AVDD_MOD_2
U7
AVDD_NODIE
SIDE_USB2_DM
E2
W15
AVSS_PGA
Normal 2.5V
SIDE USB
E3
RXC1P
GND_64
W14
AVDD25_PGA
V2
SC1_FB
SC1_G+/COMP1_Y+
100
SOGIN0
SC1_ID SC1_R+/COMP1_Pr+
CI_DET SPDIF_OUT
R296
GND_63 AVDD_MOD_1
GND_66
0
3
DSUB
DSUB_R+
RGB_PC R4025 RGB_PC R228
RGB_PC RGB_PC RGB_PC RGB_PC RGB_PC RGB_PC RGB_PC
DSUB_HSYNC DSUB_VSYNC
P2
U19
22pF
SPDIF_OPTIC
RXC0N
AUL0 510
C262
GND_62
V18
AVDD2P5_MOD
D6
SPDIF_OUT/GPIO153
CEC/GPIO5
RGB_PC R4024
OPT R297
RXC0P
F2 CK+_HDMI2
SPDIF_IN/GPIO152
1M
HOTPLUGB/GPIO20
X201 24MHz
1
HDMI
R5 PM_MODEL_OPT_1
AC1
R287
XIN XOUT
AVDD25_LAN
22pF
G11
C286 0.1uF
C4062 0.1uF
C252 0.1uF
GP4L_S7LR2 POWER,IN/OUT,H/W OPT
2011.07.12 2
LGE Internal Use Only
TP for NON-EU models(except EU and China) TP for CI slot /PCM_REG
PCM_D[0]
TP for SCART PCM_A[8]
CI_TS_CLK
SCART1_MUTE
TP for Headphone HP_LOUT
/PCM_OE
PCM_D[1]
PCM_A[9]
CI_TS_VAL
SC1_ID
HP_ROUT
/PCM_WE
PCM_D[2]
PCM_A[10]
CI_TS_SYNC
SC1_FB
SIDE_HP_MUTE
/PCM_IORD
PCM_D[3]
PCM_A[11]
CI_TS_DATA[0]
SC1_SOG_IN
HP_DET
/PCM_IOWR
PCM_D[4]
PCM_A[12]
CI_TS_DATA[1]
DTV/MNT_VOUT
/PCM_CE
PCM_D[5]
PCM_A[13]
CI_TS_DATA[2]
SCART1_Lout
/PCM_IRQA
PCM_D[6]
PCM_A[14]
CI_TS_DATA[3]
SCART1_Rout
/PCM_CD
PCM_D[7]
CI_TS_DATA[4]
SC1_CVBS_IN
/PCM_WAIT
CI_TS_DATA[5]
PCM_RST
CI_TS_DATA[6]
/CI_CD1
CI_TS_DATA[7]
/CI_CD2
PCM_5V_CTL
CI_DET
TP for S2 S2_RESET
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
GP4_S7LR2 TP_NON_EN
2011.07.07 3
LGE Internal Use Only
+3.5V_ST --> 3.375V --> 3.46V
+12V/+15V
PANEL_POWER
FROM LIPS & POWER B/D
0.01uF C436 0.01uF 50V
OPT C442 10uF 25V
C438 0.1uF 25V
S
MMBT3906(NXP) Q402
OPT C408 0.1uF 16V
C406 0.1uF 16V +12V/+15V L402 CIS21J121
5
100
L402-*1 MLB-201209-0120P-N2
R408 FOR 200HZ PWM_DIM2
OPT C407 0.1uF 16V
24V
6
GND
8
GND
GND
7
3.5V
9
10
3.5V
3.5V
11
12
3.5V
GND
13
14
GND
PANEL_CTL
GND
15
16
GND/V-sync
17
18
INV ON
12V
19
20
A.DIM
12V
21
22
P.DIM1
24
Err OUT
23
OPT R429 47K B
1:AK10
C
R489 10K
NON_CI_CAP C455 0.1uF 25V
Q407 MMBT3904(NXP)
OPT R435 22K
OPT Q406 MMBT3904(NXP)
IC408-*1 APX803D29
C474 0.1uF
GND
RESET
+24V
R407 2.2K
R405 2.2K
PANEL_DISCHARGE_RES_2.2K PANEL_DISCHARGE_RES_2.2K
PD_+24V R404 100K
2
3
VCC
3
PD_+24V R403 1.5K 1%
PD_+24V C412 0.1uF 16V
GND PWR_DET_ON_DIODES
PD_+24V_PWR_DET_ON_SEMI IC409 NCP803SN293 VCC
E
E
PD_KR_42_LIPS R447-*1 5.1K 1%
PD_+24V R482 8.2K 1%
C B
POWER_DET
1
R405-*1 R407-*1 3K 3K PANEL_DISCHARGE_RES_3K PANEL_DISCHARGE_RES_3K
OPT C451 0.1uF 25V
R440 5.6K
R430 10K
C418 0.1uF 50V
12V
GND/P.DIM2
C404 0.1uF 16V
4
OPT R431 22K
L407 CIS21J121
R402 100
RESET
2
RESET
IC409-*1 APX803D29 PD_+24V R480 100
RESET
2
3
VCC
1
1
GND
GND
PD_+24V_PWR_DET_DIODES
Power_DET
+3.3V_Normal +3.5V_ST R419 1K
25
OPT R412 0
SLIM_32~52 P401 SMAW200-H24S2
R415 100
OPT R476 0
R421 10K
B
E
OPT Q405 MMBT3904(NXP) R427 10K
IC407 AP7173-SPG-13 HF(DIODES)
L420
PG
1
OPT C416 0.1uF 16V
R606 3.9K PWM_PULL-DOWN_3.9K
’ERROR_OUT’ is used for lamp(CCFL/EEFL) models. In other words, LED models need not use.
2
VCC
3
+3.3V_Normal R606-*1 1K PWM_PULL-DOWN_1K
R433 10K
OPT ERROR_OUT R420 100
NON_CI_CAP C435 0.1uF 16V
EN
7
1.5A6
4
5
R434 10K
R438 22K
OUT
R1 R457
FB
4.3K
C472 22uF 10V
R2 R456 4.7K 1/16W 1%
C467 560pF 50V
GND
FET_AOS R445 100
C476 0.1uF 16V
C425 0.1uF 16V
FET_AOS G C423 4.7uF FET_2.5V 16V C423-*1 2.2uF 10V
FET_2.5V R445-*1 2.2K
1/16W 1%
SS
NON_CI_CAP C475 0.1uF 16V
C461 10uF 10V
+3.3V_Normal
8
9
IN
THERMAL
A_DIM
PWM_DIM
R611 0
L403 BLM18SG700TN1D
+1.5V_DDR
[EP]
BLM18PG121SN1D NON_PSU_T120_LGD
+3.3V_Normal
FET_AOS Q403 AO3407A
INV_CTL +3.5V_ST
PWM1
780 mA
+3.3V_Normal
Max 1000mA
+3.5V_ST
C OPT R418 6.8K
OPT R475 0
+1.5V_DDR
R426 10K
FET_2.5V_DIODE DMP2130L Q403-*1
R443 10K
POWER_ON/OFF_1
OPT R446 10K
OPT C445 0.1uF 16V
C437 22uF 16V
FET_2.5V_AOS AO3435 Q403-*2 D
GND
24V
2 1
S
OPT R610 33K
L404 CIS21J121
2
C411 0.1uF 16V
3
C B
OPT R490 10K
Q400 MMBT3904(NXP)
G
R462 10K +3.5V_ST
PWR ON 1 24V 3
L404-*1 MLB-201209-0120P-N2
PD_+12V R447 1.2K 1%
PANEL_VCC
G
+24V L407-*1 MLB-201209-0120P-N2
R407-*2 4.7K
D
Q401 MMBT3904(NXP) E
VCC R405-*2 4.7K
PANEL_DISCHARGE_RES_4.7K PANEL_DISCHARGE_RES_4.7K
C443 10uF 25V
R439 33K
NORMAL_32 P404 FM20020-24
NORMAL_EXPEPT_32 P403 FW20020-24S
2
5%
PD_KR_42_LIPS R450-*1 100 1%
S
B
3
1
PWR_DET_ON_SEMI IC408 NCP803SN293
G
R406 4.7K
C
OPT R463 10K
PD_+3.5V R450 0
D
OPT R401 10K
PD_+12V R448 2.7K 1%
S
R461 10K
+3.5V_ST R488 100K
New item Q409 AO3407A D
+3.5V_ST
RL_ON
+3.5V_ST
+24V --> 3.78V --> 3.92V (3.79V) +18.5V --> 3.5V --> 3.75V (3.59V)
0.015uF C409 0.015uF 50V
+3.5V_ST
+12V/+15V
+20V --> 3.51V --> 3.76V (3.59V) +12V --> 3.58V --> 3.82V (3.68V)
L412 120 CIS21J121
E
R486 4.7K ERROR_OUT
Vout=0.8*(1+R1/R2)=1.5319
FOR LPB Download [To LED DRIVER]
+2.5V/+1.8V
+3.3V_Normal
+3.3V_Normal IC402
FOR LPB MODEL P407 12507WR-08L
+2.5V_Normal
TJ3940S-2.5V-3L VIN
3
Vd=550mV 1
NON_CI_CAP C432 0.1uF 16V
2
VOUT
300 mA
1
R473 1
GND
OPT R615 10K OPT R616 10K
2
3
C440 0.1uF 16V
C403 10uF 10V
FOR LPB MODEL_L/DIM R612 33
LOCAL DIMMING L/DIM_SCLK
4
5
FOR LPB MODEL_L/DIM R613 33 L/DIM_MOSI
FOR LPB MODEL R183 33
6
I2C_SCL
7
8 9
I2C_SDA FOR LPB MODEL_L/DIM R614 33
FOR LPB MODEL R184 33
L/DIM_VS FOR LPB MODEL_L/DIM R617 4.7K
S7LR core 1.2V volt C447
+3.3V_Normal
2000 mA
+3.5V_ST
1%
1%
OPT C4072 100pF
FB
4
3A
5
PWRGD
EN
BOOT 13
14
VIN_3 2
GND_1
3
GND_2
4
PH_3
11
PH_2
NR8040T3R6N
PH_1
C453 22uF 10V
10 IC403 TPS54319TRE 9
R2
C444 0.1uF 16V
C456 22uF 10V
COMP
COMP
C494 2200pF 50V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
OPT R180 10K OLP
OPT R181 1K
C488 3300pF
C493 0.01uF 50V
EN
Vout=0.8*(1+R1/R2)
Copyright ⓒ 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
+3.3V_Normal
SS/TR
R432 1/16W 330K 5% R436 15K
R1
C448 3300pF
R442 27K 1/16W 1%
C439 50V 100pF
Not used : only for small(ready)
50V
R608 12K R423 12K 1%
L415 3.6uH
12
8
VIN_2
7
C430 10uF 10V
THERMAL 17
5
9
6
SS
OPT C492 22uF 16V
1
RT/CLK
R609 11K
3
7
OPT C4074 0.1uF 16V
VIN_1 NON_CI_CAP C431 0.1uF 16V
VSENSE
R416 56K
AGND
2
C420 22uF 16V
NC
L413
AGND
R1
VIN
OPT C4073 0.1uF 16V
8
1 THERMAL
PGND
[EP]LX
+5V_Normal
L425 BLM18PG121SN1D
L406 3.6uH
15
+5V_USB
IC401 AOZ1051PI
6
C4075 10uF 25V
+1.10V_VDDC
C441 0.1uF 16V
EP[GND]
R410 10K
16
+5V_USB L401
C405 10uF 25V OPT
0.33uF 16V
R428 10K
+12V/+15V
R2
3A
$ 0.165
R441 56K 1/16W 1%
Vout=0.827*(1+R1/R2)=1.225V
GP4L_S7LR2 POWER_LARGE
2011/11/26 4
LGE Internal Use Only
IR/LED and control for normal models.
+3.5V_ST
R2404 10K 1%
R2405 10K 1%
R2411 100
R2401 100
OPT C2408 18pF 50V
KEY1 OPT C2401 D2402 0.1uF 5.6V AMOTECH CO., LTD.
L2402 BLM18PG121SN1D
R2402 100 KEY2
+3.5V_ST
IR_OUT_EU
R2429 3.3K
+3.5V_ST
C2403 0.1uF 16V
C2404 1000pF 50V
B
IR_OUT R2431 47K
E C IR_OUT Q2405 MMBT3904(NXP)
4
JP2408
5
OPT R2413 1.5K LED_B/LG_LOGO
12_SUB R2432 1.5K
R2430 10K
C
JP2407
6
IR_OUT IR_OUT_EU
IR_OUT_EU Q2406 MMBT3904(NXP)
3
L2403 BLM18PG121SN1D
+3.5V_ST
R2425 1K
P2403 12507WR-12L
2 OPT D2404 5.48VTO5.76V
R2426 3.3K
LED_R/BUZZ
7 OPT C2410 0.1uF 16V
JP2409
8
JP2410
9
B E
C2407 100pF 50V
+3.3V_Normal 11_SUB L2404 BLM18PG121SN1D
OPT D2405 5.48VTO5.76V
11_SUB C2405 0.1uF 16V
10
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
11 JP2411
IR_OUT_US R2409 0
OPT
P2402 12507WR-15L
1
OPT C2409 18pF 50V
11_SUB
P2401 12507WR-10L
SENSOR_SDA
+3.5V_ST
IR_OUT R2410 22
OPT D2403 5.48VTO5.76V
R2412 100
OPT C2402 D2401 0.1uF 5.6V AMOTECH CO., LTD.
IR_OUT
12_SUB
SENSOR_SCL
L2401 BLM18PG121SN1D
11_SUB C2406 1000pF 50V
IR
OPT R2414 1.5K LED_R/BUZZ OPT R2416 10K
13
13
14
15 16
S/T_SCL OPT C906 18pF 50V
OPT D902 ADUC 5S 02 0R5L 5.5V
OPT C907 18pF 50V
OPT D903 ADUC 5S 02 0R5L 5.5V
S/T_SDA
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
GP4L_S7LR2 IR/CONTROL
2011/11/16 6
LGE Internal Use Only
USB (SIDE)
USB1_DIODES
USB2_DIODES
USB_2
EAN61849601
EAN61849601 L1450-*1 MLB-201209-0120P-N2
IC1450 AP2191DSG
L1451-*1 MLB-201209-0120P-N2
120-ohm USB_2_BEAD_MAG
120-ohm NC L1451 CIS21J121 OPT R1458 2K 1/8W 5%
OPT R1459 2K 1/8W 5%
OUT_2
OUT_1 C1451 22uF 16V
FLG
8
1 $0.077
7
2
6
3
5
4
GND
+5V_USB
L1450 CIS21J121 USB_2_BEAD_SS
IN_1 C1452 10uF 10V
IN_2
EN
IC1451 AP2191DSG
OPT R1450 2K 1/8W 5%
C1453 0.1uF
OPT R1452 2K 1/8W 5%
OUT_2
OUT_1
8
1 $0.077
7
2
6
3
5
4
+5V_USB
GND
IN_1 USB_2 C1454 10uF 10V
IN_2
C1450 22uF 16V USB_2
+3.3V_Normal
NC
FLG
EN
USB_2 C1455 0.1uF +3.3V_Normal
OPT R1457 4.7K
R1455 4.7K OPT USB1_CTL
USB2_CTL USB_2 R1456 10K
R1454 10K
USB2_OCD
1 2
SIDE_USB2_DM
3
3AU04S-305-ZC-(LG)
47
USB_2
SIDE_USB2_DP
4 5
1 2 3 4
3AU04S-345-ZC-H-LG
1 2 3
3AU04S-305-ZC-(LG)
4 5
1 2 3 4 5
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
D1451
JK1451 USB_2_NORMAL
USB DOWN STREAM
SIDE_USB1_DP
JK1451-*1 USB_2_32LS3500
USB DOWN STREAM
USB DOWN STREAM
USB DOWN STREAM
3AU04S-345-ZC-H-LG
USB1_OCD
SIDE_USB1_DM
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R1453
47
JK1450 USB_1_NORMAL
5
R1451 JK1450-*1 USB_1_32LS3500
D1450
RCLAMP0502BA
RCLAMP0502BA
OPT
OPT
GP4_S7LR2 USB_OCP_DIODE
10/08/13 7
LGE Internal Use Only
HDMI 5V_HDMI_1
5V_HDMI_1
+5V_Normal
+5V_Normal
5V_HDMI_2
C
A1
A2
A1
R830
B
R884
R888
2.7K
2.7K
DDC_SDA_1
16
R885
R889
2.7K
2.7K
DDC_SDA_1
DDC_SDA_2
DDC_SCL_1
DDC_SCL_2
R887
R891
2.7K
2.7K
HDMI_SIDE
HPD1 10K
E
HDMI_SIDE
Q802 MMBT3904(NXP)
C802 0.1uF 16V
HDMI_2
R802
1.8K
3.3K
R804
HDMI_2
NON_CI_CAP
1K
17
MMBD6100 D824
C
20
18
MMBD6100 D822
C
HDMI_SIDE
MMBD6100 D821
R896
A2
HDMI_2
10K SHIELD
C
A1
R806
19
+5V_Normal
5V_HDMI_4
5V_DET_HDMI_1 A2
HDMI_1
DDC_SDA_4
DDC_SCL_1 15
DDC_SCL_4
14 HDMI_1_Normal
EAG59023302
HDMI_CEC 13 CK-_HDMI1 12 11 10 9 8 7 6 5 4 3 2 1
CK+
CK+_HDMI1
D0-
D0-_HDMI1
D0_GND D0+
D0+_HDMI1
D1-
D1-_HDMI1
D1_GND D1+
D1+_HDMI1
D2-
D2-_HDMI1
D2_GND D2+
D2+_HDMI1 OPT D802
For CEC
JK802
R855 100 CEC_REMOTE_S7
HDMI_CEC
For BDP In-Packing Model - EMI Gasket Touch Jack
HDMI_2
5V_HDMI_2
SIDE_HDMI5V_HDMI_4
HDMI_2
5V_DET_HDMI_2
5V_DET_HDMI_4
R807
10K BODY_SHIELD HDMI_2
20 19
C B
20
R828 10K
19
HPD2
DDC_SDA_2
16
R805
HDMI_ARC
5 4 3 2 1
CK+_HDMI2
D0-
D0-_HDMI2
EAG62611201
CK+
HDMI_SIDE
EAG59023302
HDMI_2_Normal
CK-_HDMI2
6
19 HPD4 18
10K E
17 16 DDC_SDA_4 15
15
14
14
13
HDMI_CEC
12
7
B
HDMI_SIDE R862
0
HDMI1_ARC
13
8
16V
C
11 10 9 8 7
D0+_HDMI2
D1-
6
D1-_HDMI2
D1_GND
5
D1+ D2-
D1+_HDMI2
4
D2-_HDMI2
3
D2_GND
2
D2+
1
D2+_HDMI2 OPT D801
JK801
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
12 CK-_HDMI4
12
D0_GND D0+
HDMI_CEC
13
JK803
11 10
CK+ CK+_HDMI4
9
D0D0-_HDMI4 D0_GND
8
D0+
7 D0+_HDMI4 6
D1D1-_HDMI4
5
D1_GND
4
D1+ D1+_HDMI4
3
D2D2-_HDMI4
2
D2_GND
1
D2+ D2+_HDMI4
OPT D811
20
20
DDC_SCL_4
DDC_SCL_2
9
1.8K HDMI_SIDE
17
15
11 10
R837
18
16
14
HDMI_SIDE NON_CI_CAP_HDMI_SIDE Q803 C803 MMBT3904(NXP) 0.1uF
SHIELD
SHIELD
BODY_SHIELD 20
1K
E
3.3K
1.8K HDMI_2
17
HDMI_2 R801
R803
18
HDMI_2 Q801 MMBT3904(NXP)
NON_CI_CAP_HDMI_2 C801 0.1uF 16V
1K
HDMI_SIDE R897
3.3K
HDMI_2 R895
HDMI_SIDE R835
SHIELD
HDMI_SIDE R808
10K
19 HOT_PLUG_DETECT 18 VDD[+5V] 17 DDC/CEC_GND 16 SDA 15 SCL 14 RESERVED 13 CEC 12 TMDS_CLK11 TMDS_CLK_SHIELD 10 TMDS_CLK+ 9 TMDS_DATA08 TMDS_DATA0_SHIELD 7 TMDS_DATA0+ 6 TMDS_DATA15 TMDS_DATA1_SHIELD 4 TMDS_DATA1+ 3 TMDS_DATA22 TMDS_DATA2_SHIELD 1 TMDS_DATA2+
SIDE_HDMI_32LS3500 51U019S-312HFN-E-R-E-LG JK803-*1
19
HPD
18
+5V_POWER
17
DDC/CEC_GND
16
SDA
15
SCL
14
NC
13
CEC
12
CLK-
11
CLK_SHIELD
10
CLK+
9
DATA0-
8
DATA0_SHIELD
7
DATA0+
6
DATA1-
5
DATA1_SHIELD
4
DATA1+
3
DATA2-
2
DATA2_SHIELD
1
DATA2+
HDMI_2_BDP_Model
HPD +5V_POWER DDC/CEC_GND SDA SCL NC CEC CLKCLK_SHIELD CLK+ DATA0DATA0_SHIELD DATA0+ DATA1DATA1_SHIELD DATA1+ DATA2DATA2_SHIELD DATA2+
HDMI_1_BDP_Model YKF45-7054V
YKF45-7054V
JK802-*1
JK801-*1
GP4L_S7LR2 HDMI
2011.10.04 8
LGE Internal Use Only
RGB-PC / SPDIF PC AUDIO
SPDIF OPTIC JACK
PC_AUDIO
+3.3V_Normal
JK1102
5.15 Mstar Circuit Application
PEJ027-04 SPDIF_OPTIC JK1103 2F01TC1-CLM97-4F
VIN SPDIF_OUT OPT R1104 10K
OPT C1109 22uF 16V
OPT C1110 10uF 16V
SPDIF_OPTIC C1131 0.1uF 16V
SPDIF_OPTIC C1121 100pF 50V
2
3
Fiber Optic
VCC
1
E_SPRING T_TERMINAL1
7A
B_TERMINAL1
4
R_SPRING
5
T_SPRING
PC_AUDIO R1107 15K
AMOTECH CO., LTD.
PC_R_IN
NON_CI_CAP_PC_AUDIO OPT PC_AUDIO D1101 C1107 R1102 100pF 470K 5.6V 50V
7B
B_TERMINAL2
6B
T_TERMINAL2
AMOTECH CO., LTD. OPT D1102 5.6V
PC_AUDIO R1110 10K
PC_AUDIO R1108 15K
4 SHIELD
GND
3 6A
PC_L_IN
NON_CI_CAP_PC_AUDIO PC_AUDIO C1108 R1103 100pF 470K 50V
PC_AUDIO R1111 10K
RGB PC +5V_Normal
RGB_PC D1115 MMBD6100 A2 C A1
NON_CI_CAP_RGB_PC C1129 0.1uF 16V
RGB_PC
RGB_PC
R1140 2.2K
R1139 2.2K
RGB_DDC_SCL NON_CI_CAP_RGB_PC NON_CI_CAP_RGB_PC C1127 18pF 50V
RGB_DDC_SDA
C1128 18pF 50V
DSUB_VSYNC
DSUB_HSYNC OPT C1122 68pF 50V
OPT OPT C1126 D1109 68pF 20V 50V ADUC 20S 02 010L
OPT D1114 5.6V
OPT D1113 20V ADUC 20S 02 010L
OPT D1116 5.6V OPT R1148 0
DSUB_B+
PM_RXD ADUC 20S 02 010L RGB_PC R1133 75
OPT R1149 0
OPT D1110 20V
PM_TXD
R1150 0
R1151 0
DSUB_G+ ADUC 20S 02 010L RGB_PC R1135 75
+3.3V_Normal
OPT D1111 20V
RGB_PC R1146 10K
RGB_PC R1147 1K DSUB_DET
OPT D1117 5.6V ADMC 5M 02 200L
DSUB_R+
16
SHILED
DDC_GND
DDC_CLOCK
GND_1
SYNC_GND
15 10
4
9 3
5
V_SYNC
NC
14
BLUE
H_SYNC
BLUE_GND
13
GREEN
GREEN_GND
DDC_DATA
2
8
12
RED
7 1
6
11
GND_2
ADUC 20S 02 010L OPT D1112 20V
RED_GND
RGB_PC R1137 75
JK1104 SPG09-DB-010
RGB_PC
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
GP4L_S7LR2 RGB-PC/SPDIF
2011/09/27 9
LGE Internal Use Only
RS-232C
COMMERCIAL/NonOS MODEL OPTION COMMERCIAL MODEL OPTION
COMMERCIAL_RS232C_PHONEJACK
32LS3500_RS232C_PHONEJACK
JP1002
IR_OUT R1003 100
M6
6
M6
6
M1
1
M1
1
M3_DETECT
3
M3_DETECT
3
M4
4
M4
4
M5_GND
5
M5_GND
5
JP1000
+3.5V_ST
R1002 100
JP1001
JP1004
C1000 0.33uF
OPT D1000 ADUC 20S 02 010L 20V
COMMERCIAL C1005 0.1uF
COMMERCIAL COMMERCIAL IC1000
OPT D1001 ADUC 20S 02 010L 20V
KJA-PH-1-0177 JK1001
(H:7mm)
PEJ030-01 JK1001-*1
ONLY 32LS3500 US MODEL(H:10mm)
MAX3232CDR
C1+
COMMERCIAL C1001 0.1uF COMMERCIAL C1002 0.1uF
C1-
C2+
COMMERCIAL C1003 0.1uF
1
16
2
15
3
14
4
13
VCC OS_Debug(P1000) +3.5V_ST
V+
C2-
5
12
6
11
12507WR-04L JP1003
DOUT1
RIN1
RS-232C_IC_Bypass
ROUT1
R1000 0
R1001 0 RS-232C_IC_Bypass
V-
COMMERCIAL C1004 0.1uF
DOUT2
RIN2
7
10
8
9
P1000
GND
VCC
PM_RXD
GND PM_RXD RM_TXD
DIN1 PM_TXD
1
2
3
4 5
DIN2 GND
ROUT2
EAN41348201
For Comsumer model, use 4PIN Wafer.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
GP4L_S7LR2 RS232C_PHONE
2011/08/13 10
LGE Internal Use Only
LVDS for large inch
[51Pin LVDS Connector] (For FHD 60Hz)
FOR FHD REVERSE(10bit)
[30Pin LVDS Connector] (For HD 60Hz_Normal)
Change in S7LR
FHD P703 FI-RE51S-HF-J-R1500
MIRROR LVDS_SEL
Pol-change
RXA4+
RXA0+
RXA0-
RXA4-
RXA0-
RXA0+
HD P705
1 +3.3V_Normal
FF10001-30
2 3
OPT R705 3.3K
4
RXA3+
RXA1+
RXA1-
RXA3-
RXA1-
RXA1+
1
RXACK+
RXA2+
RXA2-
2
RXACK-
RXA2-
RXA2+
3
RXA2+
RXACK+
RXACK-
4
5 OPT R710 10K
6
+3.3V_Normal
7 8 9
SCANNING_EN
OPT R713 0
RXA2-
RXACK-
RXACK+
5
RXA1+
RXA3+
RXA3-
6
RXA3+
RXA1-
RXA3-
RXA3+
7
RXA3-
RXA0+
RXA4+
RXA4-
8
RXA0-
RXA4-
RXA4+
9
RXACK+
10
RXACK-
PWM_DIM OPT R703 3.3K
PSU_T120_LGD R706 0
10
OPC&SCANNING_CTRL OPT R704 10K
11 12
RXA4+
13
RXA4-
14
RXA3+
15
RXA3-
16
RXACK+
17
RXACK-
18 19
RXA2+
20
RXA2-
RXB4+
RXB0+
RXB0-
11
RXB4-
RXB0-
RXB0+
12
RXA2+
RXB3+
RXB1+
RXB1-
13
RXA2-
RXB3-
RXB1-
RXB1+
14
RXBCK+
RXB2+
RXB2-
15
RXA1+
RXBCK-
RXB2-
RXB2+
16
RXA1-
RXB2+
RXBCK+
RXBCK-
17
21
RXB2-
RXBCK-
RXBCK+
18
RXA0+
22
RXB1+
RXB3+
RXB3-
19
RXA0-
RXB1-
RXB3-
RXB3+
20
RXB0+
RXB4+
RXB4-
21
RXB4+
22
RXA1+
23
RXA1-
24
RXA0+
25
LVDS_SEL
RXB0-
RXA0-
RXB4-
30
OPT R711 10K
AUO_GND/LGD_NC 24
27
29
OPT R712 3.3K
23
26
28
+3.3V_Normal
PANEL_VCC
25 RXB4+
AUO_GND R709 10K
RXB4-
HD L701 70-ohm BLM18SG700TN1D
26 27
RXB3+
31
RXB3-
32
RXBCK+
33
RXBCK-
28
FOR FHD REVERSE(8bit)
29
Change in S7LR
30
34
OPT C701 10uF 16V
OPT C702 1000pF 50V
HD C703 0.1uF 16V
31
MIRROR
35
RXB2+
36
RXB2-
Pol-change
Shift
RXA4+
RXA4+
RXA4-
RXA0-
RXA4-
RXA4-
RXA4+
RXA0+
37 38
RXB1+
39
RXB1-
40
RXB0+
41
RXB0-
RXA3+
RXA0+
RXA0-
RXA1-
RXA3-
RXA0-
RXA0+
RXA1+
RXACK+
RXA1+
RXA1-
RXA2-
RXACK-
RXA1-
RXA1+
RXA2+
RXA2+
RXA2+
RXA2-
RXACK-
RXA2-
RXA2-
RXA2+
RXACK+
RXA1+
RXACK+
RXACK-
RXA3-
RXA1-
RXACK-
RXACK+
RXA3+
RXA0+
RXA3+
RXA3-
RXA4-
RXA0-
RXA3-
RXA3+
RXA4+
RXB0-
42 43 44
PANEL_VCC
45 46 47
FHD L702 70-ohm
48 49 50 51
OPT C700 10uF 16V
OPT C709 1000pF 50V
FHD C710 0.1uF 16V
RXB4+
RXB4+
RXB4-
RXB4-
RXB4-
RXB4+
RXB0+
RXB3+
RXB0+
RXB0-
RXB1-
RXB3-
RXB0-
RXB0+
RXB1+
RXBCK+
RXB1+
RXB1-
RXB2-
RXBCK-
RXB1-
RXB1+
RXB2+
RXB2+
RXB2+
RXB2-
RXBCK-
52
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
RXB2-
RXB2-
RXB2+
RXBCK+
RXB1+
RXBCK+
RXBCK-
RXB3-
RXB1-
RXBCK-
RXBCK+
RXB3+
RXB0+
RXB3+
RXB3-
RXB4-
RXB0-
RXB3-
RXB3+
RXB4+
GP4L_S7LR2 LVDS_LARGE
2011/11/14 11
LGE Internal Use Only
R1227
L1202 CIC21J501NE
1uF
0.1uF
C1220
1uF
C1241
1uF
C1238
1uF
C1219
1uF
C1218
C1217
0.1uF
0.1uF
C1239
10uF
C1206
OPT C1251
OS 1K 1% 0.1uF
C1250 OS 1% 1K
C1249
OS
OS 1000pF
R1225
0.1uF
C1247
C1248 OS 1K 1%
CLose to Saturn7M IC
AVDD_DDR0
+1.5V_DDR
R1228
R1224
OS 1K 1%
CLose to Saturn7M IC
CLose to DDR3
AVDD_DDR0
B-MVREFDQ
B-MVREFCA
OS
A-MVREFCA
OS 1000pF
1000pF
C1204
1% 1K
C1203
R1205
0.1uF
A-MVREFDQ
1000pF
0.1uF C1202
C1201
AVDD_DDR0
1K 1%
R1204
AVDD_DDR0
1K 1% 1%
R1202
1K
R1201
AVDD_DDR0
CLose to DDR3
IC1201-*1 K4B1G1646G-BCH9
IC1202-*1 K4B1G1646G-BCH9
DDR_1333_SS_NEW
DDR_1333_SS_NEW
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
M8 A0
VREFCA
P3
A2
H1
A3
VREFDQ
P2
A5
L8
A6
ZQ
T8
A8
B2
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
IC1201 H5TQ1G63DFR-H9C
IC101 LGE2111A-T8
A4 R1203
A5
L8 ZQ
240 1%
AVDD_DDR0
A7 A8
B2 C1205
10uF
D9
C1207
0.1uF
G7
C1208
0.1uF
K2
C1210
0.1uF
K8
C1211
0.1uF
N1
C1212
0.1uF
N9
C1213
0.1uF
R1
C1214
0.1uF
R9
C1215
0.1uF
C1216 OS
0.1uF
VDD_1
A9
VDD_2
A10/AP
VDD_3
A11
VDD_4
A12/BC
VDD_5
A13
VDD_6 VDD_7
D2 E9 F1 H2 H9
VDDQ_2
BA0
L9 T7
R3 L7 R7 N7 T3
CK CK
VDDQ_4
CKE
VDDQ_5 CS
VDDQ_7
ODT
VDDQ_8
RAS CAS
N8 M3
NC_1
K9
K1 J3 K3 L3 T2
RESET
J2 J8 M1 M9 P1 P9 T1 T9
NC_4
F3 DQSL
G3 C7
VSS_1
DQSU
VSS_2
DQSU
VSS_3 VSS_4
DML
VSS_5
DMU
VSS_6 DQL0
VSS_8
DQL1
VSS_10
DQL2 DQL3
VSS_11
DQL4
VSS_12
DQL5
D8 E2 E8 F9 G1 G9
F7 F2 F8 H3 H8 G2 H7
DQL7
B1 D1
D3 E3
VSS_7 VSS_9
B7 E7
DQL6
B9
A-MA6
A-MA5
A-MA7
A-MA6
A-MA8
A-MA7
A-MA9
A-MA8
A-MA10
A-MA9
A-MA11
A-MA10
A-MA12
A-MA11
A-MA13
A-MA12 A-MA13 A-MA14
A-MBA0 A-MBA1 A-MBA2
VSSQ_1
D7
VSSQ_2
DQU0
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
A-MCK A-MBA0 C1209 0.01uF 50V
A-MCKE
A-MBA1 A-MBA2 A-MCK A-MCKB
A-MCKB
DQU5
VSSQ_8
DQU6
VSSQ_9
DQU7
C3 C8 C2 A7 A2 B8 A3
B11 F12 C15 E12 A14 D11 B14 D12 C16 C13 A15 E11 B13
A_DDR3_A[0]
B_DDR3_A[0]
A_DDR3_A[1]
B_DDR3_A[1]
A_DDR3_A[2]
B_DDR3_A[2]
A_DDR3_A[3]
B_DDR3_A[3]
A_DDR3_A[4]
B_DDR3_A[4]
A_DDR3_A[5]
B_DDR3_A[5]
A_DDR3_A[6]
B_DDR3_A[6]
A_DDR3_A[7]
B_DDR3_A[7]
A_DDR3_A[8]
B_DDR3_A[8]
A_DDR3_A[9]
B_DDR3_A[9]
A_DDR3_A[10]
B_DDR3_A[10]
A_DDR3_A[11]
B_DDR3_A[11]
A_DDR3_A[12]
B_DDR3_A[12]
A_DDR3_A[13]
B_DDR3_A[13]
A_DDR3_A[14]
B_DDR3_A[14]
D25 F22 G22 E24 F21 E23 D22 D24 D21 C24 C25 F23
B-MA0
B-MA2
B-MA1
B-MA3
B-MA2
B-MA4
B-MA3
B-MA5
B-MA4
B-MA6
B-MA5
B-MA7
B-MA6
B-MA8
B-MA7
B-MA9
B-MA8
B-MA10
B-MA9
B-MA11
B-MA10
B-MA12
B-MA11
B-MA13
A-MCKE
F13
E21
B15 E13
B_DDR3_BA[0]
A_DDR3_BA[1]
B_DDR3_BA[1]
A_DDR3_BA[2]
A17 B16
B_DDR3_MCLK
A_DDR3_MCLKZ
B_DDR3_MCLKZ
A_DDR3_MCLKE
B_DDR3_MCLKE
P2 R8 R2 T8 R3 L7 R7 N7 T3
F24
OS C1240
B-MBA1
F20
B-MBA2
0.01uF 50V
B-MCK
G23
B-MBA1
M3
B-MBA2
K9
B-MCKE
K1
A-MRASB
AVDD_DDR0
A-MCASB R1231 A-MWEB 10K
A-MODT A-MRASB A-MCASB A-MWEB
A-MRESETB
E14 B12 A12 C12
AVDD_DDR0
D20 A_DDR3_ODT
B_DDR3_ODT
A_DDR3_RASZ
B_DDR3_RASZ
A_DDR3_CASZ
B_DDR3_CASZ
A_DDR3_WEZ
B-MCASB
A24
B-MWEB
B_DDR3_WEZ
F11
K3
OS
L3
B-MWEB
A-MDQSL A-MDQSL A-MDQSLB A-MDQSU A-MDQSUB
A-MDQSU A-MDQSUB
A-MDML A-MDMU
A-MDML A-MDMU
A-MDQL0 A-MDQL1
A-MDQL0
A-MDQL2
A-MDQL1
A-MDQL3
A-MDQL2
A-MDQL4
A-MDQL3
A-MDQL5
A-MDQL4
A-MDQL6
A-MDQL5
A-MDQL7
A-MDQL6 A-MDQL7
A-MDQU0 A-MDQU1
A-MDQU0
A-MDQU2
A-MDQU1
A-MDQU3
A-MDQU2
A-MDQU4
A-MDQU3
A-MDQU5
A-MDQU4
A-MDQU6
A-MDQU5
A-MDQU7
A-MDQU6 A-MDQU7
C18
B_DDR3_DQSL
A_DDR3_DQSLB
B_DDR3_DQSU
A_DDR3_DQSUB E15 A21
B_DDR3_DQML
A_DDR3_DQMU
G15 B21 F15 B22 F14 A22 D15
B_DDR3_DQL[0]
A_DDR3_DQL[1]
B_DDR3_DQL[1]
A_DDR3_DQL[2]
B_DDR3_DQL[2]
A_DDR3_DQL[3]
B_DDR3_DQL[3]
A_DDR3_DQL[4]
B_DDR3_DQL[4]
A_DDR3_DQL[5]
B_DDR3_DQL[5]
A_DDR3_DQL[6]
B_DDR3_DQL[6]
A_DDR3_DQL[7]
B_DDR3_DQL[7]
A_DDR3_DQU[0]
B_DDR3_DQU[0]
A_DDR3_DQU[1]
B_DDR3_DQU[1]
F16 C21 E16 A20 D16 C20
B_DDR3_DQU[2]
A_DDR3_DQU[3]
B_DDR3_DQU[3]
A_DDR3_DQU[4]
B_DDR3_DQU[4]
A_DDR3_DQU[5]
B_DDR3_DQU[5]
A_DDR3_DQU[6]
B_DDR3_DQU[6]
A_DDR3_DQU[7]
B_DDR3_DQU[7]
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5 VDD_6 VDD_7 VDD_8
BA0
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4 VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
L24 J23 M24 H23 M23
B-MDMU
B-MDQL0
B-MDQL0
B-MDQL2
F7
B-MDQL1
B-MDQL3
B-MDQL2
B-MDQL4
B-MDQL3
B-MDQL5
B-MDQL4
B-MDQL6
B-MDQL5
B-MDQL7
F2 F8 H3 H8 G2 H7
B-MDQL6
K23
B-MDQL7
H22 K20 H20 L21
B-MDQU0
B-MDQU2
B-MDQU1
B-MDQU3
B-MDQU2
B-MDQU4
B-MDQU3
B-MDQU5
B-MDQU4
B-MDQU6
B-MDQU5
H21
NC_4 DQSL
G7
OS C1228
10uF
G3
VDDQ_8
CAS
VDDQ_9
OS C1229 OS C1230
0.1uF
N1
OS C1231
0.1uF
B7
0.1uF
E9
L2
F1
K1
H2
J3
H9
K3
J9
NC_2
0.1uF
R1 R9
OS C1234
0.1uF
OS C1235 OS C1236
0.1uF
F2
0.1uF
F8
D3
H8
A8
G2
C1
H7
T7
DQSU
VSS_1
DQSU
VSS_2
DML
VSS_4
DMU
VSS_5
C8
F1
C2
H2
A7 A2
H9
B8
C3 C8 C2 A7 A2 B8 A3
B-MDQU7
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C7
B3
B7
J2
D3
M1
E3
M9
F7
P1
F2
P9
F8
T1
H3
T9
H8 G2
DQL6
H7
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
IC1201-*2 NT5CB64M16DP-CF
L9 T7
VSS_1
DQSU
VSS_2 VSS_3
DML
VSS_4
DMU
VSS_5 VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
P3
B3
N2
E1
P8
G8
P2
J2
R8 R2
J8
T8
M1
R3
M9
L7
P1
R7 N7
P9
T3
T1 T9
M2
DQL7
N8
B1 VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
M3
A3
VREFDQ
P2
A5 A6
L8 ZQ
T8
A8 A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12
VDD_4
NC_6
VDD_5 VDD_6 VDD_7 VDD_8
K7
D8
K9
E2 E8
L2
F9
K1 J3
G1
K3
G9
L3
VSSQ_9
B2
R3
D9
L7
G7
R7
K2
N7
K8 N9 R9
D3
DDR_DVB_T2_2G
DDR_DVB_T2_2G
DDR_1600_MICRON
DDR_1600_MICRON
IC1201-*3 K4B2G1646C
IC1202-*3 K4B2G1646C
IC1201-*6 MT41J64M16JT-125:G
IC1202-*6 MT41J64M16JT-125:G
VDDQ_2 VDDQ_3
CKE
VDDQ_4 VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
N8
P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
A0
H1 VREFDQ
P2
A5 A6
L8 ZQ
T8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4 VDD_5 VDD_6
NC_5
VDD_7
BA0
VDD_9
VDD_8
K7 K9
K1 K3 L3
D9
L7
G7
R7
K2
N7
K8
VDDQ_2
CK
VDDQ_3 VDDQ_4
CS
VDDQ_6
ODT
VDDQ_7
VDDQ_5
RAS
VDDQ_8
CAS
VDDQ_9
WE
N9 R9
NC_2 NC_3 NC_4
F3 DQSL
K7 K9
D2 F1
K1 J3 K3 L3
J9
DQSU DQSU
D3
F7 F2 F8 H3 H8 G2 H7
VSS_2
DML
VSS_4
DMU
VSS_5
DQL0
VSS_7
VSS_6
E3 DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C3 C8 C2 A7 A2 B8 A3
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
VDD_5 VDD_6
NC_5
VDD_7
BA0
VDD_9
VDD_8
D9
L7
G7
R7
K2
N7
K8 N9 R9
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
CS
VDDQ_6
ODT
VDDQ_7
VDDQ_5
RAS
VDDQ_8
CAS
VDDQ_9
NC_2 NC_4
DQSL
K7 K9
D2 F1
K1 J3 K3 L3
J9
A9
C7
B3
B7 E7
J2
D3
J8 M1 M9
F7 F2
P9
F8
T1
H3 H8 G2 H7
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
VSS_2 VSS_3 VSS_4 VSS_5
DQL0
VSS_7
VSS_6 DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
VDD_3 VDD_4 VDD_5 VDD_6
A15
VDD_7
BA0
VDD_9
VDD_8
D9
L7
G7
R7
K2
N7
K8 N9 R9
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
CS
VDDQ_6
ODT
VDDQ_7
VDDQ_5
RAS
VDDQ_8
CAS
VDDQ_9
NC_2 NC_4
DQSL
K7 K9
D2 F1
K1 J3 K3 L3
J9
A9
C7
B3
B7 E7
J2
D3
J8 M1 M9
F7 F2
P9
F8
T1
H3 H8 G2 H7
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
VSS_2 VSS_3 VSS_4 VSS_5
DQL0
VSS_7
VSS_6 DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
VDD_3 VDD_4 VDD_5 VDD_6
A15
VDD_7
BA0
VDD_9
VDD_8
D9
L7
G7
R7
K2
N7
K8 N9 R9
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
CS
VDDQ_6
ODT
VDDQ_7
VDDQ_5
RAS
VDDQ_8
CAS
VDDQ_9
NC_2 NC_4
DQSL
K7 K9
D2 F1
K1 J3 K3 L3
J9
A9
C7
B3
B7 E7
J2
D3
J8 M1 M9
F7 F2
P9
F8
T1
H3 H8 G2 H7
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
VSS_2 VSS_3 VSS_4 VSS_5
DQL0
VSS_7
VSS_6 DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
VDD_3 VDD_4 VDD_5 VDD_6
NC_5
VDD_7
BA0
VDD_9
VDD_8
D9
L7
G7
R7
K2
N7
K8 N9 R9
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
CS
VDDQ_6
ODT
VDDQ_7
VDDQ_5
RAS
VDDQ_8
CAS
VDDQ_9
NC_2 NC_4
DQSL
K7 K9
D2 F1
K1 J3 K3 L3
J9
A9
C7
B3
B7 E7
J2
D3
J8 M1 M9
F7 F2
P9
F8
T1
H3 H8 G2 H7
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
VSS_2 VSS_3 VSS_4 VSS_5
DQL0
VSS_7
VSS_6 DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
VDD_3 VDD_4 VDD_5 VDD_6
NC_5
VDD_7
BA0
VDD_9
VDD_8
D9
L7
G7
R7
K2
N7
K8 N9 R9
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
CS
VDDQ_6
ODT
VDDQ_7
VDDQ_5
RAS
VDDQ_8
CAS
VDDQ_9
NC_2 NC_4
DQSL
K7 K9
D2 F1
K1 J3 K3 L3
J9
A9
C7
B3
B7 E7
J2
D3
J8 M1 M9
F7 F2
P9
F8
T1
H3 H8 G2 H7
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
VSS_2 VSS_3 VSS_4 VSS_5
DQL0
VSS_7
VSS_6 DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
VDD_3 VDD_4 VDD_5 VDD_6
A15
VDD_7
BA0
VDD_9
VDD_8
D9
L7
G7
R7
K2
N7
K8 N9 R9
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
CS
VDDQ_6
ODT
VDDQ_7
VDDQ_5
RAS
VDDQ_8
CAS
VDDQ_9
NC_2 NC_4
DQSL
K7
D2 F1
K1
H2
J3 K3 L3
J9
A9
C7
B3
B7 E7
J2
D3
J8 M1 M9
F7 F2
P9
F8
T1
H3 H8 G2 H7
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
VSS_2 VSS_3 VSS_4 VSS_5
DQ0
VSS_7
VSS_6 DQ1
VSS_8
DQ2
VSS_9
DQ3
VSS_10
DQ4
VSS_11
DQ5
VSS_12
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
VDD_1 VDD_2
A11
VDD_3
A12/BC
VDD_4 VDD_5 VDD_6
A15
VDD_7
BA0
VDD_9
VDD_8
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
CS
VDDQ_6
ODT
VDDQ_7
VDDQ_5
RAS
VDDQ_8
CAS
VDDQ_9
NC_2 NC_4
A8
J7
C1
K7
C9
K9
D2 E9
L2
F1
K1
H2
J3
H9
K3 L3
J9
A1 VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
A8 C1 C9 D2
VDDQ_5 CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
E9 F1 H2 H9 J1
NC_1
J9
NC_2
L1 L9
NC_4 DQSL
T7
NC_6
A9 DQSU
VSS_1
DQSU
VSS_2
B3 E1
VSS_3 DML
VSS_4
DMU
VSS_5
G8 J2 J8
VSS_6 DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
M1 M9 P1 P9 T1 T9
DQL6 B1 VSSQ_1 DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9 D1 D8 E2 E8 F9 G1 G9
VSS_1
DQSU
VSS_2 VSS_3
NC_2 NC_4
DML
VSS_4
DMU
VSS_5 VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
N9 R9
C3
A8
C2
C1 C9
A7
D2 E9
A2
F1 H2
B8
H9
A3
H1
A3
VREFDQ
A4 A5
L8
A6
ZQ
A7 A8
B2
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12
VDD_4
NC_6
VDD_5 VDD_6 VDD_7 VDD_8
BA0
T7
G7 K2 K8 N1 N9 R1 R9
BA1 A1 VDDQ_1 CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4 VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
A8 C1 C9 D2 E9 F1 H2 H9 J1
NC_1 RESET
NC_2 NC_3 NC_4
F3 G3
D9
VDD_9
T2
A9
C7
B3
B7
E1 G8
DQSL
J9 L1 L9 T7
NC_7
J2
D3
J8 M1
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
VSS_1
DQSU
VSS_2 VSS_3
DML
VSS_4
DMU
VSS_5 VSS_6
E3
M9
F7
P1
F2
P9
F8
T1
H3
T9
H8 G2
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
DQL6 DQL7
B1
DQU0
A9 DQSU
E7
H7 VSSQ_1
D7
A2
L9
DQL6
K8
R1
EAN61857201 VREFCA
A1
DQSL
DQSU
N1
M8 A0
WE
L1
NC_7
DQL7
J1 NC_1
DQSL
H7
C8
NC_3
G3
G7 K2
A1 VDDQ_1
F3
G2
D9
BA1
RESET
A9
C7 B7 E7
J2
D3
J8 M1
B1 VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9 D1 D8 E2 E8 F9 G1 G9
J9 L1 L9 T7
NC_5
M9
F7 F2
P9
F8
T1
H3 H8 G2 H7
VSSQ_2
DQ9
VSSQ_3
DQ10
VSSQ_4
DQ11
VSSQ_5
DQ12
VSSQ_6
DQ13
VSSQ_7
DQ14
VSSQ_8
DQ15
VSSQ_9
B9
VSS_1 VSS_2 VSS_3
DML
VSS_4
DMU
VSS_5
DQ0
VSS_7
VSS_6
E3
P1
T9
A9 DQSU DQSU
E1 G8
DQ1
VSS_8
DQ2
VSS_9
DQ3
VSS_10
DQ4
VSS_11
DQ5
VSS_12
D1
C3 C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 VSSQ_1
D7
D8
B3
DQ6 DQ7
B1 VSSQ_1
DQ8
A9
WE
B3
DQ6 DQ7
D7
R9
DQSL VSS_1
DML DMU
E3
P1
T9
DQSU DQSU
E1 G8
B2
A10/AP
L9 T7
H8
A7
T2
L1
NC_5
L8 ZQ
A8
CK
F8 H3
A5 A6
L2
J1 NC_1
H1
A4
J7 K9
F2
VREFDQ
BA2
C1
H9
VREFCA
A2 A3
NC_6
C9 E9
A0 A1
M2 N8
A8
M8
M7
R1
M3 VDDQ_1
F3
T3
N1
A1
NC_3
G3
R3
BA1
WE
B1 VSSQ_1
DQU0
A11 A12/BC
L9 T7
DQL6 DQL7
D7
VDD_1 VDD_2
B2
DQSL VSS_1
DML DMU
E3
P1
T9
DQSU DQSU
E1 G8
A9
RESET
R8 R2 T8
A10/AP
T2
L1
NC_6
L8
A7
L2
H2
P8
ZQ
A8
CK
N2 P2
A5
J7
J1 NC_1
P3 H1
A4 A6
N3 P7
VREFDQ
BA2
C1
H9
VREFCA
A2 A3
NC_6
C9 E9
A0 A1
M2 N8
A8
M8
M7
R1
M3 VDDQ_1
F3
T3
N1
A1
NC_3
G3
R3
BA1
WE
B1 VSSQ_1
DQU0
A11 A12/BC
L9 T7
DQL6 DQL7
D7
VDD_1 VDD_2
B2
DQSL VSS_1
DML DMU
E3
P1
T9
DQSU DQSU
E1 G8
A9
RESET
R8 R2 T8
A10/AP
T2
L1
NC_6
L8
A7
L2
H2
P8
ZQ
A8
CK
N2 P2
A5
J7
J1 NC_1
P3 H1
A4 A6
N3 P7
VREFDQ
BA2
C1
H9
VREFCA
A2 A3
A13
C9 E9
A0 A1
M2 N8
A8
M8
M7
R1
M3 VDDQ_1
F3
T3
N1
A1
NC_3
G3
R3
BA1
WE
B1 VSSQ_1
DQU0
A11 A12/BC
L9 T7
DQL6 DQL7
D7
VDD_1 VDD_2
B2
DQSL VSS_1
DML DMU
E3
P1
T9
DQSU DQSU
E1 G8
A9
RESET
R8 R2 T8
A10/AP
T2
L1
NC_6
L8
A7
L2
H2
P8
ZQ
A8
CK
N2 P2
A5
J7
J1 NC_1
P3 H1
A4 A6
N3 P7
VREFDQ
BA2
C1
H9
VREFCA
A2 A3
A13
C9 E9
A0 A1
M2 N8
A8
M8
M7
R1
M3 VDDQ_1
F3
T3
N1
A1
NC_3
G3
R3
BA1
WE
B1 VSSQ_1
DQU0
A11 A12/BC
L9 T7
DQL6 DQL7
D7
VDD_1 VDD_2
B2
DQSL VSS_1
DML DMU
E3
P1
T9
DQSU DQSU
E1 G8
A9
RESET
R8 R2 T8
A10/AP
T2
L1
NC_6
L8
A7
L2
H2
P8
ZQ
A8
CK
N2 P2
A5
J7
J1 NC_1
P3 H1
A4 A6
N3 P7
VREFDQ
BA2
C1
H9
VREFCA
A2 A3
A13
C9 E9
A0 A1
M2 N8
A8
M8
M7
R1
M3 VDDQ_1
F3
T3
N1
A1
NC_3
G3
R3
BA1
WE
B1 VSSQ_1
DQU0
A11 A12/BC
L9 T7
DQL6 DQL7
D7
VDD_1 VDD_2
B2
DQSL VSS_1
DML DMU
E3
P1
T9
DQSU DQSU
E1 G8
A9
RESET
R8 R2 T8
A10/AP
T2
L1
NC_6
L8
A7
L2
H2
P8
ZQ
A8
CK
N2 P2
A5
J7
J1 NC_1
P3 H1
A4 A6
N3 P7
VREFDQ
BA2
C1
H9
VREFCA
A2 A3
A13
C9 E9
A0 A1
M2 N8
A8
M8
M7
R1
M3 VDDQ_1
F3
T3
N1
A1
NC_3
G3
R3
BA1
RESET
B1 VSSQ_1
DQU0
VDD_3 VDD_4
L9 T7
DQL6 DQL7
D7
A11 A12/BC
B2
DQSL VSS_1 VSS_3
E7
VDD_1 VDD_2
WE
DQSL C7 B7
A9
CK
R8 R2 T8
A10/AP
T2
L1
NC_6
L8
A7
L2
H2
P8
ZQ
A8
J7
N2 P2
BA2
C1
H9
P3 H1 VREFDQ
A5 A6
N3 P7
A4
A13
C9 E9
VREFCA
A2 A3
M2 N8
A8
A0 A1
M7
R1
J1 NC_1
RESET
T3
N1
M3
CKE
T2
G3
R3
A1 VDDQ_1
CK
L2 J3
B2
BA1 BA2
J7
R8 R2
A7 A8
A13
N2 P8
A4
M2 M3
P7 P3
A2 A3
M7
N8
VREFCA
A1
M8
R1
BA1
BA2
J1 NC_1
E3 F7
N3
N9
VDD_9
M2
A1 VDDQ_1
CK
E7
M8
BA0
NC_5
M3
WE
B7
N3
N1
VDD_8
M7
R1
VDD_9
CK
DQSL
T3
N1
BA1
J7
D1
R8 R2
A7
BA0
N2 P8
A4
BA2
B9
P7 H1
C7
IC1202-*4 H5TQ1G63DFR-PBC
K8
VDD_7
N3 P3
A2
NC_5
DQL6
DQU0
K2
VDD_6
DDR_1333_NANYA_NEW
EAN61857201 VREFCA
A1
M7
VSS_12
VSSQ_1
G7
IC1202-*2 NT5CB64M16DP-CF M8
A0
RESET
DDR_1600_HYNIX
VDD_5
DDR_1333_NANYA_NEW P7
A9 DQSU
T2
IC1201-*4 H5TQ1G63DFR-PBC
A13
D9
B-MA14
B-MDQU7
DDR_1600_HYNIX
VDD_4
L1
DQSL
IC1202-*5 K4B1G1646G-BCK0
A12/BC
J9
G3
DDR_1600_SS
VDD_3
DQL7
B1 VSSQ_1
DQU0
F3
IC1201-*5 K4B1G1646G-BCK0
VDD_2
A11
E7
J8
NC_3
DDR_1600_SS
VDD_1
A10/AP
F3
A9
G8
VSS_6
D7 C3
B2
A9
NC_3
E1
VSS_3
C9 E9
A8
RESET
G3
DQL7
D2
ZQ
A7
DQSL
E3
H3
L8
A6
L9
NC_6
0.1uF F7
A5
T2
L1
NC_4 DQSL
VREFDQ
A4
WE
J1 NC_1
E7
OS C1232 OS C1233
N9
K9
L3
C7
B-MDQU6
K21
RAS
K7
C9
DQSL
0.1uF
K8
K2
NC_6
D7
B-MDQU0 B-MDQU1
L22
C1227
J1 NC_2
VDDQ_7
NC_3
A3
NC_1
ODT
RESET
A1
CK
VDDQ_6
T2
D9
BA1 VDDQ_1
CS
J7
C1 D2
VDDQ_5
F3
VDD_9
E3
B-MDQL1
G21
A_DDR3_DQU[2]
D3
B-MDMU
J24
VDDQ_4
AVDD_DDR0
B2
A9
E7
B-MDML
B-MDML
L20 L23
A_DDR3_DQL[0]
G16 B20
B-MDQSUB
B_DDR3_DQMU
D17
B7
B-MDQSU
J20 H24
A_DDR3_DQML
A8
C7
B-MDQSU B-MDQSUB
B_DDR3_DQSUB
CKE
H1
A3
BA2
A8
N3
B-MDQSLB
J21 A_DDR3_DQSU
VDDQ_3
A2
M2
A1 VDDQ_2
VREFCA
A1
NC_5
N8
VDDQ_1 CK
M8 A0
M7
M3
CK
DQSL
B-MDQSL
K25
B_DDR3_DQSLB
B18 A18
R9
WE
240 1%
A7
RESET
B-MDQSLB
K24 A_DDR3_DQSL
L3
ZQ
F3 G3
OS R1226
L8
A6
T2
B-MRESETB
B-MRESETB
B_DDR3_RESET
B19
A5
WE
B-MDQSL A-MDQSLB
A4
NC_3
E20 A_DDR3_RESET
R1232 10K
B-MRASB
B24
B-MRASB B-MCASB
B-MODT
B25
J3
J3 K3
L2
B-MCKE
B-MVREFDQ
VREFDQ
J7
B-MODT A-MODT
A3
BA2
K7
K1
H1
B-MCKB
B-MCKB
F25
A2
T3
BA1
L2
M2 N8
K9
K8
VDD_9
A1
NC_5 B-MBA0
B-MVREFCA
VREFCA
M7
B-MBA0
G25 A_DDR3_MCLK
P8
B-MA14
B_DDR3_BA[2]
C17
N2
B-MA13
D23
G20 A_DDR3_BA[0]
P3
B-MA12
B-MCK
A-MRESETB
DQSL
G8
A-MA4
NC_3 NC_6
E1
A-MA5
K7
WE
A9 B3
A-MA3
L2
VDDQ_6
NC_2
A-MA4
J7
VDDQ_3
J1 L1
T8
M2
VDDQ_1
VDDQ_9
J9
R2
BA2
A1
C9
R8
A-MA2
M7
BA1
C1
P2
A-MA3
NC_5
VDD_8 VDD_9
A8
A-MA14
A6
P8
C14
OS
A3
A-MA1
1%
VREFDQ
A-MA2
R1235 56
A-MVREFDQ
N2
A-MA0
1%
H1
A-MA1
B23
56 R1237
A2
P3
A11
P7
B-MA1
1%
A1
P7
S7LR2_DIVX_MS10
56 R1238
A0
R1236 56
VREFCA
A-MA0
OS 1%
N3
M8
K7
M8 A0
R7 N7
R1
VDD_8
J7
DDR_1333_HYNIX N3
B-MA0
L7
K2
N9
VDD_7
BA0
R3
G7
N1
BA2
DDR_1333_HYNIX A-MVREFCA
M3
D9
VDD_6
M2 N8
R8 R2
A7
NC_5
IC1202 H5TQ1G63DFR-H9C
EAN61828901
N2 P8
A4
M7
EAN61828901
N3 P7
A1
DQ8
VSSQ_2
DQ9
VSSQ_3
DQ10
VSSQ_4
DQ11
VSSQ_5
DQ12
VSSQ_6
DQ13
VSSQ_7
DQ14
VSSQ_8
DQ15
VSSQ_9
B9 D1 D8 E2 E8 F9 G1 G9
GP4L_S7LR2 DDR_256
2011/06/03 12
LGE Internal Use Only
GLOBAL tuner block except EU and China
FE_AGC_SPEED_CTL IF_AGC_SEL
DEMOD_RESET FE_BOOSTER_CTL LNA2_CTL
DEMOD_SCL
DEMOD_SDA
RF_SWITCH_CTL Pull-up can’t be applied because of MODEL_OPT_2
TU3704 TDSH-T101F SI2176_TW_2INPUT_H
R3741-*3 2.2K TU_IIC_BR_2.2K
TU3700 TDSS-G201D
TU3703 TDSN_B001F
R3740-*3 2.2K TU_IIC_BR_2.2K
SI2156_DVB_1INPUT_H
SI2176_BR_2INPUT_H
R3741-*2 1.2K TU_IIC_ATSC_1.2K
+3.3V_TU
R3733 100K
close to TUNER
1 2 3 4 5 6
RF_S/W_CTL RESET
1 2
SCL
3
SDA
4
+B1[3.3V] SIF
5 6
RF_S/W_CTL
R3705
0
1
C3701 RF_SW_OPT 0.1uF 16V
RESET
2
SCL
3
SDA
4
+B1[3.3V]
5
SIF
6
R3732 100
NC_1
TUNER_RESET
7 8 9 10 11
CVBS
7 8
+B2[1.8V]
7
CVBS
8
C3713-*1 20pF 50V TU_I2C_FILTER
TU_I2C_FILTER R3735-*1
TU_I2C_FILTER R3736-*1
RESET
R3736
+B1[3.3V] NC_2
C3702
close to TUNER
R3783
16V
R3758 82 TU_SIF
R3741 1.8K TU_IIC_ATSC_1.8K
TU_NON_BUFFER
E Q3705 MMBT3906(NXP) TU_BUFFER
B
TU_SCL
33
C
R3753 4.7K TU_BUFFER
TU_SDA
TU_I2C_NON_FILTER TU_I2C_NON_FILTER C3713 C3711 18pF 18pF 50V 50V TU_I2C_NON_FILTER
C3702-*1 0 ASIA
R3774 470 TU_BUFFER R3775 0
R3741-*1 1K TU_IIC_NON_ATSC_1K
TU_I2C_NON_FILTER R3735 33
SDA
+3.3V_TU
R3740-*1 1K TU_IIC_NON_ATSC_1K
R3740 1.8K TU_IIC_ATSC_1.8K
SCL
R3740-*2 1.2K TU_IIC_ATSC_1.2K
+3.3V_TU
C3710 0.1uF 16V
0.1uF
+B2[1.8V]
C3711-*1 20pF 50V TU_I2C_FILTER
TU_I2C_FILTER C3742 C3743 20pF 20pF 50V 50V TU_I2C_FILTER
+3.3V_TU
0
NON_ASIA
+B2[1.8V]NON_ASIA NC_3
R3784
R3752 220 TU_BUFFER
R3751 220 TU_BUFFER
0
NON_ASIA
IF_AGC
9
DIF[P]
10
DIF[N]
11 12
12 13 SHIELD 14 15 16 17 18 19 20 21 22 23 24 25 26 27
NC_1
9
NC_2
10
NC_3
11
+B3[3.3V] +B4[1.23V] NC_4
+1.23V_TU
IF_AGC
R3756 C3750 5pF 50V ASIA
DIF[P] R3761
0
C3751 5pF 50V ASIA
R3760
0
R3785 0 ASIA
HALF_NIM L3706 120 FULL_NIM C3718 0.1uF 16V FULL_NIM
12
R3781 3.3 ASIA
R3782 2K OPT
HALF_NIM
DIF[N]
0
TU_CVBS
TU_NON_BUFFER R3780 3.3 ASIA
R3749
E Q3703 MMBT3906(NXP) TU_BUFFER
0 B
TU_BUFFER
C
R3750 1K OPT
R3786 0 ASIA
Close to the tuner
IF_P_MSTAR
SHIELD IF_N_MSTAR
GND 1. should be guarded by ground 2. No via on both of them 3. Signal Width >= 12mils Signal to Signal Width = 12mils Ground Width >= 24mils
ERROR SYNC
+3.3V_TU
VALID MCLK +1.8V_TU
C3739 10uF 6.3V OPT
D0 C3737 100pF 50V
D1
C3738 0.1uF 16V
C3705 100uF 16V OPT
C3707 100pF 50V
C3708 0.1uF 16V
close to the tuner pin, add,09029
D2 D3
R3704
100
IF_AGC_MAIN
HALF_NIM
D4
should be guarded by ground
C3716 0.1uF 16V HALF_NIM
+3.3V_TU
D5
IC3703 AP1117E18G-13
+1.8V_TU
D6
R1 3
FE_TS_SYNC
IN ADJ/GND
OPT
1
R3710 200 1%
OUT
D7 FE_TS_VAL_ERR
FE_TS_DATA[0-7]
2
28 FE_TS_CLK
R3766 1
R3711 0
Vo=VREF*(1+R2/R1) FE_TS_DATA[0]
SHIELD
VREF = 1.25V R2
C3741 10uF 10V
C3740 0.1uF 16V
FE_TS_DATA[1]
FE_TS_DATA[2]
IC3701 AP2132MP-2.5TRG1 [EP]
FE_TS_DATA[3]
+1.23V_TU
VIN
5 6 7 8 9 10 11
10K FE_TS_DATA[7]
+5V_Normal
SDA +B1[3.3V]
Close to the CI Slot
SIF
+3.3V_TU
+B2[1.8V]
+3.3V_Normal
CVBS IF_AGC DIF[P]
VCTRL
3
6
4
5
C3725 0.1uF 16V
NC
C3715 22uF 10V
C3727 0.1uF 16V
FULL_NIM_BCD
1005
FULL_NIM_BCD
FULL_NIM_TJ
EN2
C3723 22uF 10V
R1
VOUT
C3729 0.1uF 16V FULL_NIM
C3730 10uF 10V FULL_NIM
R2
R3713 0
VIN3
SHIELD
ADJ
FULL_NIM_BCD FULL_NIM_BCD R3748 R3776 11K 10K
R3747 20K
NC_1
DIF[N]
12
7
IC3701-*1 TJ4220GDP-ADJ[EP]GND
Size change,0929 L3703 CIS21J121
60mA
R3769
SCL
L3704
4
RESET
FULL_NIM
3
FULL_NIM
FE_TS_DATA[6]
2
380mA
GND
FULL_NIM_BCD EN
NC
8
9
C3717 0.1uF 16V
FE_TS_DATA[5]
2
1
FULL_NIM_OPT
SI2176_ATSC_1INPUT_H
1
PG
10K
THERMAL
R3771
FE_TS_DATA[4]
NC4
8
1
2
9
TU3700-*1 TDSS-H101F
THERMAL
TUNER MULTI-OPTION
7
3
6
4
5
BCD Vo=0.6*(1+R1/R2) TJ
Vo=0.8*(1+R1/R2)
GND
ADJ/SENSE
FULL_NIM R3748-*1 5.1K
FULL_NIM_TJ R3776-*1 0
VOUT
NC_2
FULL_NIM_TJ R3747-*1 9.1K
Add,0929
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
GP4L_S7LR2 TUNER_NON_EU
2011.10.11 14
LGE Internal Use Only
Headphone
*Option : HEAD_PHONE
HEAD_PHONE HP_LOUT
+3.5V_ST
SIDE_HP_MUTE
B
B C R1500 3.3K HEAD_PHONE_POP
OPT C1502 1000pF 50V
C HEAD_PHONE R1501 Q1502 1K MMBT3904(NXP) HEAD_PHONE_POP E
E B B
Q1504 MMBT3904(NXP) HEAD_PHONE_POP
HEAD_PHONE
E HEAD_PHONE_POP Q1501 MMBT3906(NXP)
R1504 10K R1503 1K
C HP_DET
Q1500 MMBT3904(NXP) E HEAD_PHONE_POP
JK1500 KJA-PH-0-0177
+3.3V_Normal
C
HEAD_PHONE
C1500 10uF 16V
GND
5
L
4
DETECT
3
R
1
HEAD_PHONE
HEAD_PHONE HP_ROUT C1501 10uF 16V
OPT C1503 1000pF 50V
C HEAD_PHONE R1502 Q1503 1K MMBT3904(NXP) HEAD_PHONE_POP E
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
E B B
Q1505 MMBT3904(NXP) HEAD_PHONE_POP
HEAD_PHONE_32LS3500
C
JK1500-*1 PEJ031-01 GND
5
L
4
DETECT
3
R
1
GP4L_S7LR2 HEADPHONE
2011/10/04 15
LGE Internal Use Only
Audio amp(NTP-7500)
+3.3V_Normal
AMP_RESET C516 1000pF 50V 50V
R521 10K
C517
AUD_MASTER_CLK
+24V_AMP
22000pF
L502 BLM18PG121SN1D
OPT R507 3.3
3.3K
AVDD_PLL
3
LF
4
DGND_PLL
5
GND_1
6
AMP_MUTE 10K NON_LIPS
PVDD1_1
PVDD1_2
PVDD1_3
OUT1A_1
OUT1A_2
PGND1A
/RESET
AD
BST1A
38
39
40
41
42
43
44
45
46
37 31
VCC_5
R515 12
L506 10.0uH
C537 0.1uF 50V
R509 12
4.7K
C535 0.47uF 50V
C531 390pF 50V
D502 1N4148W 100V OPT
R516
SPEAKER_L C538 0.1uF 50V
R513 12
R517 4.7K
C526 22000pF 50V
WAFER-ANGLE
OUT2A_2
SDA
12
25
OUT2A_1
4
SPK_L-
3
SPK_R+ C528 1uF 25V
C529 1uF 25V
C534 1uF 25V
2
SPK_R-
1
C527 22000pF 50V
P501
24
26 23
11 22
BCK
21
PGND2A
20
27
19
10
18
WCK
17
BST2A
16
L505 10.0uH
SPK_L+
28
C518 22000pF
PVDD2_3
SPK_R+
PVDD2_2
Q501 MMBT3904(NXP) E NON_LIPS
VDR1
9
PVDD2_1
B
C505 1000pF 50V
BST1B
32
SDATA
OUT2B_2
R501
100
33
VDR2
OUT2B_1
C
NON_LIPS
R508 12
SPK_L-
AGND
PGND2B
NON_LIPS R506
NON_LIPS
PGND1B
29
BST2B
R502 10K
R520 10K
C509 33pF 50V
34
30
MONITOR2
C507 33pF 50V
+3.5V_ST
OUT1B_1
8
MONITOR1
100 100
35
7
SCL
R503
IC501 NTP-7500L
OUT1B_2
DVDD
AUD_SCK
R504
SPK_L+
DGND
AUD_LRCK
AMP_SCL
THERMAL 49
15
C513 0.1uF 16V
2
DVDD_PLL
AUD_LRCH
AMP_SDA
OPT C525 0.01uF 50V
D501 1N4148W 100V OPT
36
1
MONITOR0
OPT C511 10uF 10V
C523 10uF 35V
C521 0.1uF 50V
C530 390pF 50V
AGND_PLL
R505
100pF 50V
C519 0.1uF 50V
C512 0.1uF 16V
47
OPT C508 0.1uF 16V
14
C503
C506 4.7uF 16V
/FAULT
C504 1000pF 50V
48
C502 0.1uF 50V
13
C501 0.1uF 50V
GND_IO
16V
OPT C510 10uF 10V
CLK_I
0.1uF
L501 CIS21J121
C515 10uF 10V
[EP]
C514
VDD_IO
+24V_AMP
+24V
+24V_AMP
D503 1N4148W 100V OPT
R510 12
R514 12
C532 390pF 50V C520
C522
C524
0.1uF 50V
0.1uF 50V
10uF 35V
D504 1N4148W 100V OPT
L504 10.0uH
C533 390pF 50V R511 12
L503 10.0uH
R512 12
C536 0.47uF 50V
C539
R518
0.1uF 50V
4.7K
C540
R519
0.1uF 50V
4.7K
SPEAKER_R
50V SPK_RR522 0 POWER_DET LIPS_ONLY
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
GP4L_S7LR2 NTP-7500
2011.10.04 16
LGE Internal Use Only
COMPONENT1 & AV(COMMON), COMPONENT2 JK1601 PPJ239-01 COMP2_NORMAL
JK1602 PPJ234-02 COMP1 6H
[RD1]E-LUG
JK1601-*1
[RD]E-LUG
6E
R1632 10K
PPJ239-05 COMP2_R_IN
5H
[RD1]O-SPRING_2
D1617 5.6V ZENER_COMP1_LR
[RD]O-SPRING_2
5E
C1617 1000pF 50V OPT
R1626 470K
R1634 12K
R1633 10K
4H
[RD1]CONTACT_2
COMP2_L_IN
[RD]CONTACT_2
4E
D1616 5.6V ZENER_COMP1_LR
C1616 1000pF 50V OPT
R1625 470K
R1636 12K
+3.3V_Normal
5G
[WH1]O-SPRING
4F
[RD1]CONTACT_1
5D
[WH]O-SPRING
4C
[RD]CONTACT_1
R1612 10K
R1615 1K
D1613 5.6V OPT
COMP2_DET
6H
[RD1]E-LUG
5H
[RD1]O-SPRING_2
4H
[RD1]CONTACT_2
5G
[WH1]O-SPRING_2
4F
[RD1]CONTACT_1
5F
[RD1]O-SPRING_1
7F
[RD1]E-LUG-S
5E
[WH1]O-SPRING_1
4D
[YL1]CONTACT
5D
[YL1]O-SPRING
6D
[YL1]E-LUG
6N
[RD2]E-LUG
5N
[RD2]O-SPRING_2
COMP1_NON_ADC_FILTER
5F
COMPONENT1 & AV
7F
[RD1]O-SPRING_1
[RD]O-SPRING_1
5C
[RD1]E-LUG-S
L1601 CM2012FR10KT COMP1_ADC_FILTER_L D1615 20V OPT
[RD]E-LUG-S
7C
L1601-*1 0
C1620 47pF COMP1_ADC_FILTER 50V
R1621 75
COMP2_Pr+ C1621 47pF COMP1_ADC_FILTER 50V
4N
[RD2]CONTACT
5M
[WH2]O-SPRING
5L
[RD2]O-SPRING_1
7L
[RD2]E-LUG-S
5K
[BL2]O-SPRING
4J
[GN2]CONTACT
5J
[GN2]O-SPRING
COMP1_NON_ADC_FILTER
5E 7E 4D
[BL1]O-SPRING [BL1]E-LUG-S
D1614 20V OPT
[BL]E-LUG-S
7B
[GN1]CONTACT
L1602-*1 0 L1602 CM2012FR10KT COMP1_ADC_FILTER_L
[BL]O-SPRING
5B
C1622 47pF COMP1_ADC_FILTER 50V
R1620 75 +3.3V_Normal
R1660 10K
[GN]CONTACT
4A
[GN2]E-LUG 6J COMP2_LM4600-UA_ONLY R1666 1K
5D
[GN1]O-SPRING
6D
[GN1]E-LUG
COMP2_Pb+
C1623 47pF COMP1_ADC_FILTER 50V
5A
[GN]O-SPRING
6A
[GN]E-LUG
D1624 5.6V OPT
C1646 0.1uF 16V
AV_CVBS_DET
COMP1_NON_ADC_FILTER L1603-*1 0 L1603 CM2012FR10KT COMP1_ADC_FILTER_L
D1612 20V OPT
R1619
COMP2_Y+/AV_CVBS_IN
C1624 C1625 47pF COMP1_ADC_FILTER 47pF COMP1_ADC_FILTER 50V 50V
75
6N
[RD2]E-LUG
5N
[RD2]O-SPRING_2
R1618 10K SC1/COMP1_R_IN COMP2
4N
[RD2]CONTACT
5M
[WH2]O-SPRING
5L
[RD2]O-SPRING_1
D1609 5.6V ZENER_COMP2_LR
R1607 470K COMP2
R1631 12K COMP2
C1612 1000pF 50V OPT
R1617 10K SC1/COMP1_L_IN COMP2 D1607 5.6V ZENER_COMP2_LR
R1606 470K COMP2
C1611 1000pF 50V OPT
R1630 12K COMP2 COMP2_NON_ADC_FILTER L1604-*1 0 L1604 CM2012FR10KT COMP2_ADC_FILTER_L
COMPONENT2 7L
[RD2]E-LUG-S
5K
[BL2]O-SPRING
D1604 20V OPT
SC1_R+/COMP1_Pr+ C1627 47pF COMP2_ADC_FILTER 50V
C1626 47pF COMP2_ADC_FILTER 50V
R1608 75 COMP2
COMP2_NON_ADC_FILTER
7K 4J
[BL2]E-LUG-S
L1605-*1 0 L1605 CM2012FR10KT COMP2_ADC_FILTER_L
D1606 20V OPT
C1628 47pF COMP2_ADC_FILTER 50V
R1605 75 COMP2
SC1_B+/COMP1_Pb+ C1629 47pF COMP2_ADC_FILTER 50V
+3.3V_Normal
R1613 10K COMP2
[GN2]CONTACT
R1614
1K
SC1/COMP1_DET
COMP2
5J
[GN2]O-SPRING
6J
[GN2]E-LUG
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
D1611 5.6V OPT
COMP2_NON_ADC_FILTER L1606-*1 0 L1606 CM2012FR10KT COMP2_ADC_FILTER_L
D1605 20V OPT
R1604 75 COMP2
C1630 47pF COMP2_ADC_FILTER 50V
SC1_G+/COMP1_Y+ C1631 47pF COMP2_ADC_FILTER 50V
GP4L_S7LR2 REAR_NON_EU_L
2011.11.28 17
LGE Internal Use Only
ETHERNET * H/W option : ETHERNET
+2.5V_Normal
ETHERNET L3707 BLM18PG121SN1D
JK2100
BS-R430051
XRJV-01V-0-D12-080
ETHERNET_UDE
1
2
3
4
5
6
7
8
1
2
3
4
ETHERNET_XMULTIPLE
JK2100-*1
1
2
3
EPHY_TN
4
5
EPHY_RP OPT D2103 5.5V ADLC 5S 02 015
5
6
6
7
OPT D2104 5.5V ADLC 5S 02 015 EPHY_RN
OPT D2101 5.5V ADLC 5S 02 015
7
8
9
EPHY_TP OPT D2105 5.5V ADLC 5S 02 015
8 9
9
9 ETHERNET C2104 0.01uF 50V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
GP4L_S7LR2 ETHERNET
2011/06/14 21
LGE Internal Use Only
Serial Flash for SPI boot_NON_OS and OS
+3.5V_ST
S_FLASH_NON_OS_MACRONIX IC5601 MX25L6406EMI-12G
S_FLASH_NON_OS HOLD# R5603 S_FLASH_NON_OS 0.1uF
1
16
2
15
SCLK SPI_SCK
10K VCC
SI/SIO0
R5602 33
+3.5V_ST
+3.5V_ST SPI_SDI
S_FLASH_NON_OS C5601 NC_1
NC_2
NC_3
NC_4
CS# /SPI_CS SO/SIO1 SPI_SDO
3
14
4
13
5
12
6
11
7
10
8
9
S_FLASH_OS_MACRONIX
NC_8
NC_7
OPT R1404 4.7K
+3.5V_ST
NC_6
IC1401 MX25L8006EM2I-12G CS#
/SPI_CS OPT R1403 10K
NC_5
SO/SIO1 SPI_SDO
GND
WP# /FLASH_WP GND
WP# OPT R1401 0
1
8
2
7
3
6
4
5
S_FLASH_OS C1401 0.1uF
VCC
HOLD#
SCLK SPI_SCK SI/SIO0
R1405 33 SPI_SDI
S_FLASH_OS
C OPT Q1401 MMBT3904(NXP)
B
E
S_FLASH_NON_OS_WINBOND IC5601-*1 W25Q64BVSFIG HOLD[IO3]
VCC
NC_1
NC_2
NC_3
NC_4
CS
DO[IO1]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
CLK
DIO[IO0]
S_FLASH_OS_WINBOND IC1401-*1 W25Q80BVSSIG CS
DO[IO1]
NC_8
%WP[IO2]
NC_7
GND
1
8
2
7
3
6
4
5
VCC
HOLD[IO3]
CLK
DI[IO0]
NC_6
NC_5
GND
WP[IO2]
GP4L_S7LR Serial FLASH
2011.08.29 56
LGE Internal Use Only
MSTART DEBUG_4PIN
P1 12505WS-04A00
1 MSTAR_DEBUG_4P
2
3
RGB_DDC_SCL
4
RGB_DDC_SDA
5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
GP4L_S7LR2 MSTAR DEBUG_4PIN
2011/09/05 58
LGE Internal Use Only