Manual de serviço tv lg 42pn4500 sa chassis pb31a by Portal da Eletrônica

Internal Use Only North/Latin America Europe/Africa Asia/Oceania

http://aic.lgservice.com http://eic.lgservice.com http://biz.lgservice.com

PLASMA TV SERVICE MANUAL CHASSIS : PB31A

MODEL : 42PN4500

42PN4500-SA

CAUTION

BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL67648804 (1301-REV00)

Printed in Korea

CONTENTS

CONTENTS . ............................................................................................. 2 SAFETY PRECAUTIONS ......................................................................... 3 SPECIFICATION........................................................................................ 4 ADJUSTMENT INSTRUCTION................................................................. 5 BLOCK DIAGRAM................................................................................... 12 EXPLODED VIEW .................................................................................. 13 SCHEMATIC CIRCUIT DIAGRAM ..............................................................

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LGE Internal Use Only

SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

General Guidance

Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet.

An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB. Keep wires away from high voltage or high temperature parts.

Do not use a line Isolation Transformer during this check. Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5 mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.

Leakage Current Hot Check circuit

AC Volt-meter

Before returning the receiver to the customer, always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 MΩ and 5.2 MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.

-3-

To Instrument's exposed METALLIC PARTS

Good Earth Ground such as WATER PIPE, CONDUIT etc.

LGE Internal Use Only

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range

This spec sheet is applied all of the 42” 50”, 60” PDP TV with PB31A chassis.

2. Requirement for Test

Each part is tested as below without special appointment. (1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C (2) Relative Humidity: 65 % ± 10 % (3) Power Voltage : Standard input voltage (AC 100-240 V~, 50/60 Hz) * Standard Voltage of each products is marked by models. (4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. (5) The receiver must be operated for about 5 minutes prior to the adjustment.

3. Test method

(1) Performance: LGE TV test method followed (2) Demanded other specification - Safety : CE, IEC specification - EMC : CE, IEC

4. Model General Specification No 1

Item

Receiving System

Available Channel

Specification

Remark

1) SBTVD / NTS-M / PAL-M / PAL-N

60PN6500-SC, 50/42PN4500-SA 60PN6500-SX, 50PN4500-SZ

2) DVB-T / NTSC-M / PAL-M / PAL-N

60PN6500-DC, 50/42PN4500-DA

1) VHF : 2~13 2) UHF : 14~69 3) DTV : 7-69 4) CATV : 1~135

60PN6500-SC, 50/42PN4500-SA 60PN6500-SX, 50PN4500-SZ

1) VHF : 2~13 2) UHF : 14~69 3) DTV : 14~69 4) CATV : 1~125

60PN6500-DC, 50/42PN4500-DA

Input Voltage

1) AC 100 ~ 240V 50/60Hz

Market

Brazil / chile / Peru / Venezuela / Costarica / Uruguay

60PN6500-SC,50/42PN4500-SA 60PN6500-SX, 50PN4500-SZ

Colombia / Panama

60PN6500-DC, 50/42PN4500-DA

42 inch Wide(1024 × 768)

42PN all model

50 inch Wide(1024 × 768)

50PN4 all model

50 inch Wide(1920 × 1080)

50PN6 all model

60 inch Wide(1920 × 1080)

60PN6 all model

Screen Size

Aspect Ratio

16:9

Tuning System

Module

PDP42T4#### (1024 × 768)

42PN all model

PDP50T4#### (1024 × 768)

50PN4 all model

PDP50R4#### (1920 × 1080)

50PN6 all model

PDP60R4#### (1920 × 1080)

60PN6 all model

Operating Environment

1) Temp : 0 ~ 40 deg 2) Humidity : ~ 80 %

Storage Environment

1) Temp : -20 ~ 60 deg 2) Humidity : ~ 85 %

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LGE Internal Use Only

ADJUSTMENT INSTRUCTION 1. Application Range

This spec. sheet applies to PB31A chassis applied PDP TV all models manufactured in TV factory.

4. PCB Assembly Adjustment 4.1. Using RS-232C

2. Specification

■ Adjustment sequence

(1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. (2) Adjustment must be done in the correct order. But it is flexible when its factory local problem occurs. (3) T he adjustment must be performed in the circumstance of 25 °C ± 5 °C of temperature and 65 % ± 10 % of relative humidity if there is no specific designation. (4) The input voltage of the receiver must keep AC 100-240 V~, 50/60 Hz. (5) Before adjustment, execute Heat-Run for 5 minutes. ■ A fter Receive 100% Full white pattern (06CH) then process Heat-run (or “8. Test pattern” condition of Ez-Adjust status) ■ How to make set white pattern 1) Press Power ON button of Service Remocon 2) Press ADJ button of Service remocon. Select “10. Test pattern” and, after select “White” using navigation button, and then you can see 100% Full White pattern. * In this status you can maintain Heat-Run useless any pattern generator * Notice: if you maintain one picture over 20 minutes (Especially sharp distinction black with white pattern – 13Ch, or Cross hatch pattern – 09Ch) then it can appear image stick near black level.

3. Adjustment items

3.1. PCB Assembly adjustment

■ Adjust 480i Comp1 ■ Adjust 1080p Comp1/RGB ● If it is necessary, it can adjustment at Manufacture Line ● You can see set adjustment status at “9. ADJUST CHECK” of the “In-start menu”

3.2. Set Assembly Adjustment

■ EDID (The Extended Display Identification Data ) ■ Color Temperature (White Balance) Adjustment ■ Make sure RS-232C control ■ Selection Factory output option

- A djust 3 items at 3.1. PCB assembly adjustments " 4.1. ■ Adjustment sequence" one after the order.

-5-

Order

command

1. I nter the Adjustment mode

aa 00 00

a 00 OK00x

2. C hange the Source

XB 00 40 XB 00 60

b 00 OK40x (Adjust 480i Comp1 ) (Adjust 1080p Comp1) b 00 OK60x (Adjust 1080p RGB)

3. Start Adjustment

ad 00 10

4. R eturn the Response

Set response

OKx ( Success condition ) NGx ( Failed condition )

5. R ead Adjustment data

( main ) ad 00 20 ( main ) ad 00 30

(main : component1 480i, RGB 1080p) 000000000000000000000000007c007b006dx (main : component1 1080p) 000000070000000000000000007c00830077x

6. Confirm Adjustment

ad 00 99

NG 03 00x (Failed condition) NG 03 01x (Failed condition) NG 03 02x (Failed condition) OK 03 03x (Success condition)

7. End of Adjustment

ad 00 90

d 00 OK90x

< See ADC Adjustment RS232C Protocol_Ver1.0 > ■ Necessary items before Adjustment items ● Pattern Generator : (MSPG-925FA) ● Adjust 480i comp1 (MSPG-925FA:model :209, pattern :65) - comp1 Mode ● Adjust 1080p comp1 (MSPG-925FA:model :225 , pattern :65) - comp1 Mode ● Addjust RGB (MSPG-925FA:model :225 , pattern :65) - RGB-Pc Mode * If you want more information then see the below Adjustment method (Factory Adjustment) ■ Adjustment sequence ● aa 00 00: Enter the ADc Adjustment mode. ● xb 00 40: change the mode to component1 (No actions) ● ad 00 10: Adjust 480i comp ● ad 00 10: Adjust 1080p comp ● xb 00 60: change to RGB-Pc mode(No action) ● ad 00 10: Adjust 1080p RGB ● xb 00 90: Endo of Adjustmennt

LGE Internal Use Only

5. Factory Adjustment

-> PB31A : USE INTERNAL ADC(LM1) : using internal pattern.

5.1. Auto Adjust Component 480i/1080p RGB 1080p

■ Summary : A djustment component 480i/1080i and RGB 1080p is Gain and Black level setting at Analog to Digital converter, and compensate the RGB deviation ■ Using instrument ● A djustment remocon, 801GF(802B, 802F, 802R) or MSPG925FA pattern generator ( I t can output 480i/1080i horizontal 100% color bar pattern signal, and its output level must setting 0.7V±0.1V p-p correctly)

* caution : Set Volume 0 after adjustment

5.2. Use Internal ADC(S7R)

- A DJ(EZ ADJUST) -> 6.ADC Calibration -> ADC Calibration(START)

< Adjustment pattern : 480i / 1080p 60Hz Pattern > ● You must make it sure its resolution and pattern cause every instrument can have different setting ● Adjustment method 480i Comp1, Adjust 1080p Comp1/ RGB (Factory adjustment) ● ADC 480i Component1 adjustment - Check connection of Component1 - MSPG-925FA -> Model: 209, Pattern 65 ● Set Component 480i mode and 100% Horizontal Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to “NORMAL” ● ADC 1080p Component1 / RGB adjustment - Check connection both of Component1 and RGB - MSPG-925FA -> Model: 225, Pattern 65 ● Set Component 1080p mode and 100% Horizontal Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to “NORMAL” ● After get each the signal, wait more a second and enter the “IN-START” with press IN-START key of Service remocon. After then select “7. External ADC” with navigator button and press “Enter”. ● After Then Press key of Service remocon “Right Arrow (VOL+)” ● You can see “ADC Component1 Success” ● Component1 1080p, RGB 1080p Adjust is same method. ● C omponent 1080p Adjustment in Component1 input mode ● RGB 1080p adjustment in RGB input mode ● If you success RGB 1080p Adjust. You can see “ADC RGB-DTV Success”

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* E DID (The Extended Display Identification Data)/DDC (Display Data Channel) Download. ■ Summary ● It is established in VESA, for communication between PC and Monitor without order from user for building user condition. It helps to make easily use realize “Plug and Play” function. ● For EDID data write, we use DDC2B protocol. - Auto Download ■ After enter Service Mode by pushing “ADJ” key, ■ Enter EDID D/L mode. ■ Enter “START” by pushing “OK” key. * Caution: - N ever connect HDMI & D-sub Cable when the user downloading . - Use the proper cables below for EDID Writing

LGE Internal Use Only

■ It only needs to PCM EDID D/L for North America Product.

■ EDID data (Model name = LG TV) - MODEL NAME : 42/50PN4### - HD_HDMI 1 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 36 00 B0 84 43 00 00 18 A0 0F 20 00 31 58 1C 20 28 80 14 00 B0 84 43 00 00 1E 00 00 00 FD 00 3A 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 3E

* Edid data and Model option download(RS232) - Manual Download

02 03 21 F1 4D 10 1F 04 93 05 14 03 02 12 20 22 15 01 26 15 07 50 09 57 07 67 03 0C 00 10 00 80

Enter download MODE

EDID data Model option download

Item

download ‘Mode In’

download

00 00 1E 02 3A 80 18 71 38 2D 40 58 2C 45 00 40

CMD 1

84 63 00 00 1E 01 1D 80 18 71 1C 16 20 58 2C 25

CMD 2

00 40 84 63 00 00 9E 00 00 00 00 00 00 00 00 00

Data 0

*Note1

00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

*Note2

00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 24

When transfer the ‘Mode In’, Carry the command.

Automatically download (The use of a internal pattern)

Item

Adjust ‘Mode Out’’

Adjustment Confirmation

CMD 1

CMD 2

Data 0

When transfer the ‘Mode In’, Carry the command.

To check Download on Assembly line.

2D 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63

- HD_HDMI 2 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 0F 50 54 A1 08 00 31 40 45 40 61 40 01 01 01 01 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 36 00 B0 84 43 00 00 18 A0 0F 20 00 31 58 1C 20 28 80 14 00 B0 84 43 00 00 1E 00 00 00 FD 00 3A 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 3E

■ Write HDMI EDID data ● Using instruments - Jig. (PC Serial to D-Sub connection) for PC, DDC adjustment. - S/W for DDC recording (EDID data write and read) - D-sub jack - Additional HDMI cable connection Jig. ● Preparing and setting. - Set instruments and Jig. Like pic.5), then turn on PC and Jig. - Operate DDC write S/W (EDID write & read) - It will operate in the DOS mode.

02 03 21 F1 4D 10 1F 04 93 05 14 03 02 12 20 22 15 01 26 15 07 50 09 57 07 67 03 0C 00 20 00 80 2D 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40 58 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 14 - See Working Guide if you want more information about EDID communication.

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LGE Internal Use Only

- Adjustment Color Temperature(White balance) ■ Using Instruments ● Color Analyzer: CA-210 (CH 10) - Using LCD color temperature, Color Analyzer (CA210) must use CH 10, which Matrix compensated (White, Red, Green, Blue compensation) with CS2100. See the Coordination bellowed one. ● Auto-adjustment Equipment (It needs when Auto-adjustment – It is availed communicate with RS-232C : Baud rate: 115200) ● Video Signal Generator MSPG-925F 720p, 216Gray (Model: 217, Pattern 78) ■ Connection Diagram (Auto Adjustment) ● Using Inner Pattern

■ RS-232C Command (Commonly apply) RS-232C COMMAND [CMD ID DATA]

● Using HDMI input

Meaning

White Balance adjustment start.

Start of adjust gain (Inner white pattern)

End of gain adjust

Start of offset adjust

End of offset adjust

End of White Balance adjust

(Inner white pattern)

(Inner pattern disappeared) < connection Diagram for Adjustment White balance >

● “wb 00 00”: Start Auto-adjustment of white balance. ● “wb 00 10”: Start Gain Adjustment (Inner pattern) ● “jb 00 c0” : ●… ● “wb 00 1f”: End of Adjustment * If it needs, offset adjustment (wb 00 20-start, wb 00 2fend) ● “wb 00 ff”: End of white balance adjustment (inner pattern disappear)

■ White Balance Adjustment If you can’t adjust with inner pattern, then you can adjust it using HDMI pattern. You can select option at “Ez-Adjust Menu – 7. White Balance” there items “NONE, INNER, HDMI”. It is normally setting at inner basically. If you can’t adjust using inner pattern you can select HDMI item, and you can adjust.

■ Adjustment Mapping information

In manual Adjust case, if you press ADJ button of service remocon, and enter “Ez-Adjust Menu – 7. White Balance”, then automatically inner pattern operates. (In case of “Inner” originally “Test-Pattern. On” will be selected in The “Test-Pattern. On/Off”.

RS-232C COMMAND [CMD ID DATA]

● Connect all cables and equipments like Pic.5) ● Set Baud Rate of RS-232C to 115200. It may set 115200 orignally. ● Connect RS-232C cable to set ● Connect HDMI cable to set

-8-

M I N

CENTER (DEFAULT)

M A X

Cool

Mid

Warm

Cool

Mid

Warm

R Gain

184

192

G Gain

187

183

159

192

B Gain

192

161

192

R Cut

127

G Cut

127

B Cut

127

LGE Internal Use Only

● When Color temperature (White balance) Adjustment (Automatically) - Press “Power only key” of service remocon and operate automatically adjustment. - Set BaudRate to 115200. ● You must start “wb 00 00” and finish it “wb 00 ff”. ● If it needs, then adjustment “Offset”.

● Using CA-210 Equipment. (10 CH) - Contrast value: 216 Gray

■ White Balance Adjustment (Manual adjustment) ● Test Equipment: CA-210 - Using PDP color temperature, Color Analyzer (CA-210) must use CH 10, which Matrix compensated (White, Red, Green, Blue compensation) with CS-2100. See the Coordination bellowed one. ● Manual adjustment sequence is like bellowed one. - Turn to “Ez-Adjust” mode with press ADJ button of service remocon. - Select “10.Test Pattern” with CH+/- button and press enter. Then set will go on Heat-run mode. Over 30 minutes set let on Heat-run mode. - Let CA-210 to zero calibration and must has gap more 10cm from center of PDP module when adjustment. - Press “ADJ” button of service remocon and select “7.White-Balance” in “Ez-Adjust” then press “►” button of navigation key. (When press “►” button then set will go to full white mode) - Adjust at three mode (Cool, Medium, Warm) - If “cool” mode Let B-Gain to 192 and R, G, B-Cut to 64 and then control R, G gain adjustment High Light adjustment. - If “Medium” and “Warm” mode Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment. - All of the three mode Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment. - With volume button (+/-) you can adjust. - After all adjustment finished, with Enter (■ key) turn to Ez-Adjust mode. Then with ADJ button, exit from adjustment mode

Color temperature

Test Equipment

COOL

Color Coordination x

CA-210

0.276 ± 0.002

0.283 ± 0.002

MEDIUM

CA-210

0.285 ± 0.002

0.293 ± 0.002

WARM

CA-210

0.313 ± 0.002

0.329 ± 0.002

- Brightness spec. Item

White average brightness

Min

Typ

Max Unit Remark

Brightness uniformity -20 +20

cd/m²

- 100% Window White Pattern - 100IRE(255Gray) - Picture: Vivid(Medium)

- 85IRE(216Gray) 100% Window White Pattern - Picture: Vivid(Medium)

5.3. Test of RS-232C control.

- Press In-Start button of Service Remocon then set the “4.Baud Rate” to 115200. Then check RS-232C control and

5.4. Selection of Country option.

- Selection of country option is allowed only North American model (Not allowed Korean model). It is selection of Country about Rating and Time Zone. ■ Models: All models which PU31A Chassis (See the first page.) ■ Press “In-Start” button of Service Remocon, then enter the “Option” Menu with “PIP CH-“ Button ■ Select one of these three (USA, CANADA, MEXICO) depends on its market using “Vol. +/-“button.

* Attachment: White Balance adjustment coordination and color temperature.

* Caution : Don’t push The INSTOP KEY after completing the function inspection.

● Using CS-1000 Equipment. - COOL : T=11000K, ∆uv=0.000, x=0.276 y=0.283 - MEDIUM : T=9300K, ∆uv=0.000, x=0.285 y=0.293 - WARM : T=6500K, ∆uv=0.000, x=0.313 y=0.329

* Caution : Inspection only PAL M / NTSC

● When tester will measure on Cool condition, adjust W30 on TV display menu.

● When tester will measure on medium condition, adjust 0 on TV display menu. ● When tester will measure on warm condition, adjust W30 on TV display menu. Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

6. GND and ESD Testing

7. Default Service option.

6.1. Prepare GND and ESD Testing.

7.1. ADC-Set.

■ Check the connection between set and power cord

■ R-Gain adjustment Value (default 128) ■ G-Gain adjustment Value (default 128) ■ B-Gain adjustment Value (default 128) ■ R-Offset adjustment Value (default 128) ■ G-Offset adjustment Value (default 128) ■ B-Offset adjustment Value (default 128)

6.2. Operate GND and ESD auto-test.

■ Fully connected (Between set and power cord) set enter the Auto-test sequence. ■ Connect D-Jack AV jack test equipment. ■ Turn on Auto-controller(GWS103-4) ■ Start Auto GND test. ■ If its result is NG, then notice with buzzer. ■ If its result is OK, then automatically it turns to ESD Test. ■ Operate ESD test ■ If its result is NG, then notice with buzzer. ■ If its result is OK, then process next steps. Notice it with Good lamp and STOPER Down.

7.2. White balance. Value. Center(Default)

6.3. Check Items.

■ Test Voltage ● GND: 1.5KV/min at 100mA ● Signal: 3KV/min at 100mA ■ Test time: just 1 second. ■ Test point ● GND test: Test between Power cord GND and Signal cable metal GND. ● ESD test: Test between Power cord GND and Live and neutral. ■ Leakage current: Set to 0.5mA(rms)

COOL

Mid

Warm

R Gain

192

G Gain

192

B Gain

192

R Cut

G Cut

B Cut

7.3. Temperature Threshold ■ Threshold Down Low ■ Threshold Up Low ■ Threshold Down High ■ Threshold Up High

6.4. POWER PCB Ass’y Voltage adjustment (Va, Vs voltage adjustment)

6.4.1. Test equipment : : D.M.M 1EA 6.4.2. Connection Diagram for Measuring

20 23 70 75

8. USB DOWNLOAD(*.epk file download) ■ Put the USB Stick to the USB socket ■ Press Menu key, and move OPTION

: refer to fig.1 <XPOWER4 42T4H PSU>

(fig.1) PCB Assy Voltage adjustment

■ Press “FAV” Press 7 times

6.4.3. Adjustment method

6.4.3.1. Vs adjustment (refer fig.1) (1) Connect + terminal of D.M.M. to Vs pin of P811, connect -terminal to GND pin of P811 (2) After turning VR901, voltage of D.M.M adjustment as same as Vs voltage which on label of panel left/top ( deviation ; ±0.5V) 6.4.3.2. Va adjustment (refer fig.1) (1) After receiving 100% Full White Pattern, HEAT RUN. (2) Connect + terminal of D.M.M. to Va pin of P811, connect -terminal to GND pin of P811 (3) After turning VR502,voltage of D.M.M adjustment as same as Va voltage which on label of panel left/top (deviation; ±0.5V)

- 10 -

LGE Internal Use Only

■ Select download file (epk file)

■ After download is finished, remove the USB stick. ■ Press “IN-START” key of ADJ remote control, check the S/W version.

9. Tool option 42PN4500-SA Tool option 1

24576

Tool option 2

5392

Tool option 3

3313

Tool option 4

50310

Tool option 5

2058

Country Group Code

Country Group

Country

N/A

- 11 -

LGE Internal Use Only

BLOCK DIAGRAM

- 12 -

LGE Internal Use Only

EXPLODED VIEW IMPORTANT SAFETY NOTICE

601

207

304

A10

520 580

591 590

120 910

400

900

240

202

205

203

200

302

201

301

204

305

206

303

LV1

300

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

- 13 -

LGE Internal Use Only

+5V

PDP L13 EAX65071305

L103 120-ohm EU

+3.3V

EU JK100 PSC008-02

R104 10K AV/SC1_DET

SHIELD

R144 470 EU

R105 1K

R129 0 EU

AV_DET

B SC1_SOG_IN

C C

AV/SC1_CVBS_IN AV_DET C109 27pF 50V EU

R117 75 EU

22 COM_GND 21 SYNC_IN

C111 220pF 50V EU

Q100 MMBT3904(NXP) EU

Q103 MMBT3906(NXP) EU

R136 330 EU

SYNC_OUT 19

R113 75 EU

SYNC_GND2 18 SYNC_GND1

R118 470K EU

R134 100 1/4W EU

C102 100uF 16V EU

17 RGB_IO

C B

E Q104 MMBT3904(NXP) EU

SC1_VOUT

R146 18K EU

R141 220 EU

R135 0 EU

DTV/MNT_VOUT

C116 10uF 16V EU

R147 10K EU

R143 180 EU

SC1_FB

R106 75

D100 20V

G_OUT

JP112

SC1_ID

D2B_OUT 12

R114 R120 10K 2.7K EU EU

SC1_G+/COMP1_Y+

R108 75

D2B_IN 10

JP115

R122 R_GND

JP114

RGB_GND 14

R123 33 EU

R119 75 EU

SC1_R+/COMP1_Pr+

JP113

R_OUT 15

AV/SC1_L_IN R115 470K

G_GND AV_L_IN

R121 10K

R126 12K

ID 8 B_OUT

SC1_B+/COMP1_Pb+

7 AUDIO_L_IN 6

R107 75

AV/SC1_R_IN R116 470K

AV_R_IN

B_GND

R124 10K

R127 12K

IC101 AZ4580MTR-E1

P_17V

5 AUDIO_GND 4 AUDIO_L_OUT C107 5600pF 50V EU C108 5600pF 50V EU

3 AUDIO_R_IN 2 AUDIO_R_OUT 1

R138 2K EU Q101 MMBT3904(NXP) EU

C113 10uF 16V EU

C114 27pF 50V EU R145 6.8K EU

R137 470 EU

C115 27pF 50V EU

DTV_R_OUT R139 2K EU Q102 MMBT3904(NXP) EU

R149 15K EU

OUT1

VCC

IN1-

OUT2

IN1+

IN2-

IN2+

SCART1_Lout R154 5.6K EU

VEE

JIG_GND EU 5.6K R153

SCART1_Rout

R152 6.8K EU

R148 15K EU

C112 10uF 16V EU

+3.3V_ST

R140 470 EU

READY R189 1K SCART1_MUTE

CI POWER ENABLE CONTROL

+5V_CI_ON

+5V

+5V_CI_ON

C100 22uF 10V EU

C101 0.1uF 16V EU

R184 10K READY

R151 10K EU /CI_CD1

BUF1_FE_TS_DATA[7]

BUF2_FE_TS_DATA[7]

BUF1_FE_TS_DATA[6]

BUF2_FE_TS_DATA[6]

BUF1_FE_TS_DATA[5]

BUF2_FE_TS_DATA[5]

BUF1_FE_TS_DATA[4] EU

BUF2_FE_TS_DATA[4]

PCM_D[4]

PCM_D[5]

CI_TS_DATA[5]

PCM_D[6]

CI_TS_DATA[6] CI_TS_DATA[7]

BUF1_FE_TS_DATA[3]

BUF2_FE_TS_DATA[3] BUF2_FE_TS_DATA[2]

BUF2_FE_TS_DATA[0] BUF1_FE_TS_DATA[0] EU 33 AR108 BUF2_FE_TS_DATA[0-7]

BUF1_FE_TS_SYN BUF1_FE_TS_VAL_ERR BUF1_FE_TS_CLK

BUF2_FE_TS_SYN BUF2_FE_TS_VAL_ERR BUF2_FE_TS_CLK

BUF2_FE_TS_DATA[0-7]

BUF2_FE_TS_DATA[0] BUF2_FE_TS_DATA[1] BUF2_FE_TS_DATA[2]

BUF2_FE_TS_DATA[4] BUF2_FE_TS_DATA[5] BUF2_FE_TS_DATA[7]

REG CI_TS_CLK CI_TS_VAL CI_TS_SYNC

CI_TS_DATA[0] +3.3V_CI

R109 10K EU

BUF2_FE_TS_DATA[6]

PCM_RST

3.3V_CI

READY R112 0

BUF2_FE_TS_DATA[3]

/PCM_WAIT

+3.3V

R111 10K EU

CI_IOWR

BUF2_FE_TS_DATA[1]

AR110 33

R100 EU 33 R101 EU 33 R155 EU R156 EU R157 EU

100 33 33 R110 0 READY

AR102

33 EU

R130 R131

EU R165 10K

PCM_D[3]

BUF2_FE_TS_SYN

BUF1_FE_TS_DATA[2] BUF1_FE_TS_DATA[1]

AR103 33

AR100

CI_IORD

33 AR109

C131 0.1uF 16V READY

C104 0.1uF 16V EU

R198 10K READY

+3.3V_CI

JK102 10067972-000LF EU 35

R102 100 EU

BUF2_FE_TS_DATA[0-7]

BUF1_FE_TS_DATA[0-7]

+3.3V_CI

+5V

CI_TS_DATA[4]

R187 10K EU

Q114 L100 ZXMP3F30FHTA 120-ohm EU EU

R133 10K EU

PCM_D[7] 33 EU 33 EU

1OE

CI_DET PCM_A[0] /PCM_CE

CI_ADDR[7]

CI_OE

CI_ADDR[6]

1A1

2Y4

1A2

PCM_A[1]

CI_ADDR[10]

CI_ADDR[11]

CI_ADDR[9]

CI_ADDR[8]

CI_ADDR[13]

IC100 TC74LCX244FT

2Y3

1A3

PCM_A[2] CI_ADDR[5]

2Y2

1A4

PCM_A[3] CI_ADDR[4]

CI_ADDR[14]

2Y1

GND

EU C105 0.1uF 16V

VCC

2OE

1Y1

CI_ADDR[0] PCM_A[7] 1Y2

CI_ADDR[1] 2A3

PCM_A[6] 1Y3

CI_ADDR[2] 2A2

PCM_A[5] 1Y4

100 EU

CI_ADDR[3] 2A1

PCM_A[4]

/PCM_IRQA

17 18

CI_ADDR[12]

CI_IORD

/PCM_IORD

CI_IOWR

/PCM_IOWR

CI_ADDR[7] CI_ADDR[6]

R128

READY

CI_ADDR[5]

CI_ADDR[4]

CI_ADDR[3]

CI_ADDR[2]

CI_ADDR[1]

PCM_D[1] PCM_D[2]

Q113 MMBT3904(NXP) EU E

2A4

CI_TS_DATA[1]

R181 10K EU

CI_WE R132

CI_TS_DATA[2]

C B

PCM_5V_CTL

AR104 33

BUF2_FE_TS_VAL_ERR

CI_OE

BUF2_FE_TS_CLK

CI_WE

AR105

33 /PCM_OE /PCM_WE

AR106

+5V

CI_ADDR[12]

PCM_A[12]

CI_ADDR[13]

PCM_A[13] PCM_A[14]

CI_ADDR[14]

/PCM_REG

REG

IC102 AP2151WG-7

+5V

R125 4.7K READY

EU CI_ADDR[8] CI_ADDR[9] CI_ADDR[0-14]

AR107

OUT

READY

CI_ADDR[0] PCM_D[0]

GND

READY C103 4.7uF 10V

FLG

PCM_A[8] PCM_A[9]

CI_ADDR[10]

PCM_A[10]

CI_ADDR[11]

PCM_A[11]

CI_TS_DATA[3] L101 120-ohm EU

R150 10K EU +5V

C136 0.1uF 16V READY

C137 0.1uF 16V EU

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright Â© 2013 LG Electronics Inc. All rights reserved. Only for training and service purposes

/CI_CD2

G2 2 R103 100 EU

G1 1 PCM_D[0-7]

PCM_D[0-7]

L13 SCART,CI Slot

2012-09-20 1

LGE Internal Use Only

COMP2_Y+

[GN]CONTACT [BL]E-LUG-S 7B

DDC_SCL_3

JP208

9 8 7 6 5 4 3 2 1

11 10

D0D0-_HDMI3 D0_GND

D0+

D0+_HDMI3 D1-

D1-_HDMI3 D1_GND

D1+

D1+_HDMI3 D2-

D2-_HDMI3 D2_GND

D2+

D2+_HDMI3

JK201 HDMI1_SIDE

DDC_SCL_1

[WH]O-SPRING

[RD]CONTACT_2

CEC_REMOTE 5E

[RD]O-SPRING_2

[RD]E-LUG

CK-_HDMI1

CK+

4 R254 470K

R262 12K COMP2_R_IN

R257 10K R255 470K

R263 12K

+2.5V

CK+_HDMI1

D0-

JK210 XRJV-01V-0-D12-080

D0-_HDMI1

D0+

D0+_HDMI1 D1-

D1-_HDMI1 D1_GND

D1+

GROWTH D1+_HDMI1

JK202

D2-

D2_GND

ET_NET 5

+5V

VCC C219 0.1uF 16V

VINPUT

R285 100 SPDIF_OUT

C220 10pF 50V

FIX_POLE

AV_R_IN

D2+ D2+_HDMI1

GND

PPJ231-01

D2-_HDMI1

JK200 HDMI2_REAR

AV_L_IN R203 0

C200 0.1uF 16V ET_NET

AV_DET GROWTH

R234 0

D204 D200 5.6V 5.6V ET_NET ET_NET

D205 5.6V ET_NET

D206 5.6V ET_NET

AV/SC1_CVBS_IN GROWTH

R230 75 GROWTH

For CEC R268 100

JK204 JST1223-001

D0_GND

CEC_REMOTE

SIDE_USB_DM

SIDE_USB_DP

USB1_CTL

C201 0.1uF 16V

COMP2_L_IN

R256 10K

JP202

12 CK+_HDMI3

R271 33

USB1_OCD

10mm

CK+

COMP2_Pr+

[RD]CONTACT_1 DDC_SDA_1

R208 33

IN_2

JP201

CK-_HDMI3

[RD]O-SPRING_1

R207 33

R282 10K

15 CEC_REMOTE

11 10

R281 10K

R267 1K

R270 10K READY

IN_1

DDC_SDA_3

R253 75

GND

R246 33

[RD]E-LUG-S 7C

HPD1

Fiber Optic

R202 10K R217 10K

R204 3.3K

R231 33 JP207

COMP2_DET

R258 33

C213 10uF 10V

Q200

R201 1.8K

R265 10K COMP2_Pb+

B 19

C212 0.1uF 16V

R289 10K

R288 10K

HPD3

R232 10K E

R244 3.3K

OUT_1

B Q202

R238 1.8K

R200 1K

AV2_DET

[BL]O-SPRING

MMBT3904(NXP)

SHIELD

VA216

R209 10K

R252 75

MMBT3904(NXP)

R237 1K

VA217

BODY_SHIELD

VA210

5V_DET_HDMI_1

VA209

+5V

R259 10K R266 1K

OUT_3

OUT_2

JK209 3AU04S-305-ZC-(LG) USB DOWN STREAM

5V_DET_HDMI_3

R264 10K

[GN]O-SPRING 5A +5V

+5V

+3.3V

VA212

R251 75

+3.3V

IC204 BD82020FVJ

VA211

[GN]E-LUG

<HDMI2_REAR>

VA208

JK208 PPJ234-02

<HDMI1_SIDE>

SWITCH ADDED

+3.3V

<HDMI>

R273 0 ET_NET

R291 0 ET_NET

R280 0 ET_NET

R290 0 ET_NET

CEC_REMOTE_S7

<FOR COMMERCIAL> NON_Commercial

+3.3V_ST

P602 12507WS-04L

+3.3V_ST

JP241

+5V_ST

Commercial

3 8

R228 10K Commercial

RIN1

V+

C1-

5 10

C Q204 MMBT3904(NXP) Commercial E

TX R229 100K BCommercial R233 100K Commercial

ROUT1

DIN1

DIN2

ROUT2

C225 0.1uF 16V MAX3232

C2-

P_JACK TO RS232C

V-

DOUT2

RIN2

(1) (2) (3) (4)

RED_GND

6 3 6A

MAX3232 C226 0.1uF 16V

MAX3232 C227 0.1uF 16V

P_JACK TO RS232C R226 0

JK206 PEJ027-04 PHONE JACK

E_SPRING

R_SPRING

T_SPRING

B_TERMINAL2

T_TERMINAL2

JK207 PEJ027-04

R214 75

RED

US_Commercial 3

2 PC_R_IN

R218 470K

Commercial R221 10K

R222 12K

H_SYNC

V_SYNC

4 R223 12K

NON-OS Normal : O (RS232 Debug) NON-OS Commercial : O (PC Audio) OS Normal : X OS Commercial : O (PC Audio)

R205 33

+3.3V

C202 10pF 50V

GND_1

C203 10pF 50V

DDC_CLOCK

DSUB_HSYNC

R224 10K

B_TERMINAL1

R_SPRING

T_SPRING

DSUB_VSYNC R225 1K

B_TERMINAL2

T_TERMINAL2

DSUB_DET RGB_DDC_SCL PC_SER_DATA

DDC_GND R212 10

T_TERMINAL1

R213 0 NON_Commercial

DSUB_B+

R206 33

SYNC_GND

6A RGB_DDC_SDA DSUB_G+

R216 75

BLUE NC

R215 75

GREEN BLUE_GND

PC_L_IN R219 470K

DDC_DATA

E_SPRING

DSUB_R+

GREEN_GND

Commercial R220 10K

B_TERMINAL1

GND_2

T_TERMINAL1

C2+

4 9

MAX3232 C228 0.1uF 16V

Commercial

DOUT1

R298 10K

R297 10K

C1+

Commercial

+5V_ST

GND

Commercial

MAX3232 R277 100

MAX3232

Commercial

Commercial VA213

VCC MAX3232 R276 100

Commercial VA214

Commercial

JK205 SPG09-DB-010

Commercial

MAX3232 C229 0.1uF 16V

IC206 MAX3232CDR

VA202

JK203 SPG09-DB-009

+3.3V_ST

VA206

PM_RXD

VA207

PM_TXD

VA205

VA203

R283 R284

VA200

READY R275 0 READY R274 0

VA204

R279 10K

VA201

R278 10K

TX R210 10 US_Commercial

PC_SER_CLK

R211 10 NON_Commercial

SHILED

P603 12507WS-04L

GND 3

RGB_DDC_SDA RGB_DDC_SCL

4 5

R227 0

L13 JACK INTERFACE

2012-06-01 2

LGE Internal Use Only

TUNER

OPT1

OPT2

OPT3

OPT4

TU301

TDSS-G501D

DVB-T/C

HNIM

W/O AD

TU302

TDSH-G501D

China

HNIM

W/O AD

TU303

TDSS-H501F

ATSC

HNIM

W/O AD

TU304 TU305

TDSN-T501F

DVB-T_SCA HNIM

RF_SW

W/O AD

TDSN_B601F

SBTVD

FNIM

RF_SW

With AD

TU306

TDSQ_G605D

DVB_T2

FNIM

With AD

RF_SWITCH R310 1K RF_SWITCH_CTL

C307 0.1uF 16V RF_SWITCH

Close to Tuner Pin +3.3V_TU

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

+1.25V_TU 28 29 30 C314 10uF FNIM 6.3V

C315 0.1uF FNIM 16V

31 32 33 34 35

A1 36

+B2[1.8V]

CVBS

NC_2

NC_3

NC_4

NC_5

NC_6

NC_7

GND

ERROR

SYNC

VALID

MCLK

GND_1

GND_2

SIF

NC_1 NC_2

+B3[3.3V]

R336

+B4[1.23V]

0 SBTVD

R335 0 RESET_DEMOD SBTVD

GND

SHIELD

DIF[N]

11 B1

DIF[P]

DIF[N]

IF_AGC

DIF[P]

NC_3

11 B1

A1 12

A1 B2

2 SCL 3 SDA 4 +B1[3.3V] 5 SIF 6 +B2[1.8V] 7 CVBS 8 IF_AGC 9 DIF[P] 10 DIF[N] 11 A1

RESET

R301100

SCL

R307 22

SDA

R306 22

+B1[3.3V] NC_2

C303 10uF 16V

C302 0.1uF 16V

C310 0.1uF 16V

C304 68pF 50V

TUNER_RESET TU_SCL TU_SDA

C305 68pF 50V

C311 0.1uF 16V

+B2[1.8V]

Close to Tuner Pin

NC_3 IF_AGC

H_NIM 0

R303 IF_AGC_MAIN

DIF[P] IF_P_MSTAR DIF[N] IF_N_MSTAR A1

16V 0.1uF C306

Close to Tuner Pin R320 2K

+5V SHIELD

ERROR SYNC FE_TS_SYN VALID FE_TS_VAL_ERR

A-DEMODE OPT

DVB_T/C OPT

SHIELD

430 R319

430 R322

R316 470 C308 0.1uF 16V

FE_TS_CLK FE_TS_DATA[0]

FE_TS_DATA[1]

FE_TS_DATA[2]

FE_TS_DATA[3]

FE_TS_DATA[4]

FE_TS_DATA[5]

FE_TS_DATA[6]

FE_TS_DATA[7]

R312 4.7K

C R339 0 A_DEMODE

FE_TS_DATA[0]

R323

FNIM

FE_TS_DATA[1] FE_TS_DATA[2]

R324

DVB_T2

R326

DVB_T2

SHIELD

R304 100

T2_RESET

R305 10K FNIM

FE_TS_DATA[3]

R325

DVB_T2

FE_TS_DATA[4]

R327

DVB_T2

FE_TS_DATA[5]

R328

DVB_T2

FE_TS_DATA[6] FE_TS_DATA[7]

R330

R329

DVB_T2 DVB_T2

+3.3V_TU

BUF1_FE_TS_DATA[2] BUF1_FE_TS_DATA[3]

BUF1_FE_TS_DATA[4] BUF1_FE_TS_DATA[5]

R341 220 READY

R340 220 READY

BUF1_FE_TS_DATA[6] BUF1_FE_TS_DATA[7]

E FE_TS_SYN

DEMOD_RESET FNIM

+B4[3.3V]

TU_CVBS

Close to Tuner Pin

BUF1_FE_TS_DATA[1]

FE_TS_DATA[0-7]

+B3[1.23V]

MMBT3906(NXP) Q301

FE_TS_DATA[0-7] BUF1_FE_TS_DATA[0-7]

+3.3V_TU TU_GND

TU_SIF

BUF1_FE_TS_DATA[0]

R317 82 E

MCLK

FE_TS_VAL_ERR FE_TS_CLK

R331

FNIM

R333

FNIM

R332

FNIM

Q302 MMBT3906(NXP) READY

BUF1_FE_TS_SYN B

BUF1_FE_TS_VAL_ERR BUF1_FE_TS_CLK

NC_8 T2_SCL +3.3V_TU

T2_SDA R313 1.5K A1 R315

R318

TU_GND SHIELD

ALIF_[P]

IF_AGC

+B2[1.8]

CVBS

ALIF_[N]

+B2[1.8V]

CVBS

+B1[3.3V]

SIF

+B2[1.8V]

+B1[3.3V]

SDA

RESET

TU_GND

SIF

+B1[3.3V]

SDA

SCL

R309 R311 1.5K 10K

R308 1.5K

NC_1

C316 68pF 50V

R314 1.5K

TU_GND T2_SCL T2_SDA

SDA

RESET

SCL

+B1[3.3V]

RESET

SCL

R338

SDA

RESET_TUNER

DVB_T/C 1

R337

SCL

TU_GND

RESET

RF_S/W_CTL

TU_GND

RF_S/W_CTL

+1.8V_TU

TU301 TDSS-G201D

CHINA

ATSC

CO_PANAMA

SBTVD NC_1

TU302 TDSH-G501D

TU303 TDSS-H501F

TU_GND

DVB_T2

TU304 TDSH-T101F

TU305 TDSN-B601F

TU306 TDSQ-G605D

+3.3V_TU

C317 68pF 50V

DVB-T2 OPT

L13 Tuner block

2012-06-01 3

TUNER

LGE Internal Use Only

<GPIO& LVDS>

<ANALOG & DIGITAL INPUT> IC400 LGE2111C-MS (PDP_13_MS10)

AA22 PWM0

R438

33 C417

0.047uF

R428

68 C418

0.047uF

R429

33 C419

0.047uF

C420

R423

C422

68 C423

0.047uF 0.047uF

R442

33 C424

0.047uF

R430

68 C425

0.047uF

R431

33 C426

0.047uF

1000pF

C427

R432

SC1_FB

R443 68

GIN0P

TP LED0/GPIO55

SOGIN0

LED1/GPIO56

C428

0.047uF

C429

R445

68 C430

R446

33 C433

0.047uF

R433

68 C437

0.047uF

33 C439 C443

R448 49.9

R449 49.9

HSYNC0

C450 0.1uF

0.047uF

1000pF

A_DEMODE R424 33

A_DEMODE C447 0.047uF

R425

C448

0.047uF

R426

C449

0.047uF

W24 PWM0/GPIO66

LVB0M

PWM1/GPIO67

LVB0P

PWM2/GPIO68

LVB1M

PWM3/GPIO69

LVB1P

PWM4/GPIO70

LVB2M

PWM_PM/GPIO199

LVB2P LVBCKM

E7 KEY1

KEY2 AV/SC1_DET

C454 0.1uF

RIN1M

USB1_DM

RIN1P

USB1_DP

J6 D1

17V_DET

AD9

SPI_SCK

GIN1M GIN1P

SPI_SDO

SIDE_USB_DM

BIN1M

/SPI_CS

SIDE_USB_DP

SOC_RESET

RGB_DDC_SCL

RGB_DDC_SDA UART_RXD

C6 RIN2M

IRIN/GPIO4

R414

R412

SAR0/GPIO31

LVBCKP

SAR1/GPIO32

LVB3M

SAR2/GPIO33

LVB3P

SAR3/GPIO34

LVB4M

SAR4/GPIO35

LVB4P

R416

C413

0.047uF

E5 E4 U24

PM_RXD

GIN2M

AE4

GIN2P

XIN

BIN2M

C451

10pF

U25

PM_TXD

AD4

PM_TXD

XOUT

BIN2P

GND_2

X-TAL_2 X400 24MHz GND_1

PM_RXD

Y25 AA24 Y23 AB24 AA23 AB23 AB25

D0-_HDMI1

RXB3RXB3+

D0+_HDMI1 D1-_HDMI1

RXBCK-

D1+_HDMI1

RXBCK+

D2-_HDMI1

RXB2-

D2+_HDMI1

RXB2+

CK-_HDMI1

RXB1-

CK+_HDMI1

RXB1+

DDC_SCL_1

RXB0-

DDC_SDA_1

RXB0+

HPD1

G1 G2 G3 H2 H3 F3 F1 H5 H4 H6

A_RX0N

AUDIO IN

A_RX0P

LVA0M

PM_SPI_SDO/GPIO3

LVA0P

PM_SPI_SCZ1/GPIO_PM[6]/GPIO12

LVA1M

PM_SPI_SCZ2/GPIO_PM[10]/GPIO16

LVA1P LVA2M LVA2P

DDCA_CK/UART0_RX

LVACKM

DDCA_DA/UART0_TX

LVACKP

UART1_RX/GPIO44

LVA3M

UART1_TX/GPIO43

LVA3P

UART2_RX/GPIO64

LVA4M

UART2_TX/GPIO65

LVA4P

RXA4+

D0+_HDMI3 D1-_HDMI3

RXA3-

D1+_HDMI3

RXA3+

D2-_HDMI3

RXA4-

A_RX1N

AUL1

A_RX1P

AUR1

A_RX2N

AUL3

A_RX2P

AUR3

A_RXCN

AUL4

A_RXCP

AC25 AD24 AD25 AC23 AE24 AD23 AE23 AD22 AC22 AD21 AC21

RXACK-

D2+_HDMI3

RXACK+

CK-_HDMI3

RXA2-

CK+_HDMI3

RXA2+

DDC_SCL_3

RXA1-

DDC_SDA_3

RXA1+

HPD3

AC7 AD8 AE8 AC8 AE6 AD6 AC5 AE5 AD5

2.2uF

AA2 C404

2.2uF

AA1 C405

2.2uF

AA3 C406 W3 C407

2.2uF

AUR4

DDCDA_DA/GPIO24 EARPHONE_OUTL

AB21

CVBS0 CVBS1

C_RX1N

AUOUTL2

C_RX1P

VCOM

DISP_EN

R411 1K

R418

CVBSOUT2

R417

100

L7 J4

RL_ON

VS_ON

L6 L4

/FLASH_WP 5V_ON

PC_R_IN

GPIO40 GPIO_PM[0]/GPIO6

GPIO41

GPIO_PM[2]/GPIO8

GPIO42

GPIO_PM[4]/GPIO10

GPIO45

GPIO_PM[8]/GPIO14

GPIO46

GPIO_PM[9]/GPIO15

GPIO49

GPIO_PM[11]/GPIO17

GPIO50 GPIO51 GPIO52 GPIO53

P8 U11

AB9

V10

AUOUTR2

C_RXCN

AUVRP

C_RXCP

AUVAG

DDCDC_CK/GPIO27

AUVRM

+1.26V_VDDC

SCART1_Rout

AA4

AB8

AA5

DDCDC_DA/GPIO28

GND_3

VDDC_4

GND_4

VDDC_5

GND_5

VDDC_6

GND_6

VDDC_7

GND_7

VDDC_8

GND_8

VDDC_9

GND_9

VDDC_10

GND_10

VDDC_11

GND_11

VDDC_12

GND_12 GND_13

10uF C412

0.1uF C411

GND_15 GND_16 GND_17 AVDD25_LAN

GND_18

AVDD2P5_DADC

GND_19

AVDD_MOD

GND_20 GND_21

AB1

AVDD25_PGA

L408 BLM18SG121TN1D

GND_14

Y8 AA8

1uF C410

VDDC_3

DVDD_DDR

4.7uF C409

GND_2

P18

AVDD2P5

C_RX2P

GND_1

VDDC_2

AVDDLV

SCART1_Lout

AB5

A15 VDDC_1

U17

C_RX2N

AB2

AVSS_PGA

AVDD25_PGA

GND_22

AVSS_PGA

GND_23

RXA0-

GND_24

RXA0+

GND_25 K6

C10 I2S_IN_BCK/GPIO150

I2S_OUT_BCK/GPIO156

GPIO38

J11

AA9

AB4

GPIO39 100

PC_L_IN

AUDIO OUT

C_RX0P

I2S_IN_SD/GPIO151

GPIO37

for SYSTEM EEPROM

C_RX0N

HOTPLUGD/GPIO22

GPIO36

U18

COMP2_R_IN

B10

R401

22 DVB_T2

R402

22 DVB_T2

R404

I2S_OUT_MCK/GPIO154

5V_DET_HDMI_1

A6 M6 R4

DEMOD_RESET

I2S_OUT_WS/GPIO155

5V_DET_HDMI_3

I2S_OUT_SD/GPIO157

CEC_REMOTE_S7

T2_SCL

T2_I2C

AVDD_NODIE

T2_SDA

GND_26

W4 W5

P_SCL

AVDD_NODIE

GND_27

AVDD_DMPLL

GND_28 GND_29

A9 I2C_SDAM2/DDCR_DA/GPIO71

I2C_SDA

T18

COMP2_L_IN

HOTPLUGC/GPIO21

PM_UART_TX/GPIO_PM[1]/GPIO7

I2C_SCKM2/DDCR_CK/GPIO72

T17

AV/SC1_R_IN

EARPHONE_OUTR

PM_UART_RX/GPIO_PM[5]/GPIO11

I2C_SCL

AV/SC1_L_IN

AA21 10pF

R18

2.2uF

C408

R17

DDCDA_CK/GPIO23 HOTPLUGA/GPIO19

AD7

C403

I2S_IN_WS/GPIO149

DTV/MNT_VOUT

Y24

AC24

PM_SPI_SDI/GPIO2

UART_TXD

RIN2P

AC_DET R427

W25

MS10 P17

RXB4+

D0-_HDMI3

PM_SPI_SCK/GPIO1

CVBS2 L409

W23

AC6

PM_SPI_CZ0/GPIO_PM[12]/GPIO0

R473 R415 0 22

K4 HWRESET

R413

AMP_MUTE

SOGIN1

33 22

SCART1_MUTE

BIN1P

R407 A5 B5

SPI_SDI

HSYNC1

IC400 LGE2111C-MS (PDP_13_MS10)

+1.26V_VDDC

MS10

RXB4-

V23

AE9

C452

COMP2_Y+

LED_RED

*H/W opt : ETHERNET

R455 49.9

R454 49.9

X-TAL_1

TU_CVBS

SOGIN2

AV/SC1_CVBS_IN

T22

C2 A3

BIN0P

U23

BIN0M

VSYNC1

0.047uF 0.047uF

R434

COMP2_Pb+

SC1_ID

READY 0

COMP2_Y+

GIN0M

0.047uF

R441

COMP2_Pr+

VS_DET C421

R444

RIN0P

V24

COMP2_DET

VSYNC0

R439 68

SC1_SOG_IN

SC1_B+/COMP1_Pb+

R440

SC1_G+/COMP1_Y+

1000pF

R422

10K 2.4K

SC1_R+/COMP1_Pr+

RIN0M

DSUB_HSYNC DSUB_VSYNC R420 R421

68 C416

0.047uF 0.047uF

R437

DSUB_B+

C415

DSUB_G+

0.047uF

R447

R436 DSUB_R+

Y22

PWM1 C414

IC400 LGE2111C-MS (PDP_13_MS10)

MS10

MS10 R435 68

<HDMI& SOUND>

IC400 LGE2111C-MS (PDP_13_MS10)

AUD_SCK

B8 A8

AUD_LRCK AUD_LRCH

GND_30

VDD33

AUD_MASTER_CLK

AA6 W7

CEC/GPIO5

AVDD_DVI_USB_MPLL

GND_31

AVDD_AU33

GND_32

VDDP

GND_33

AVDD_PLL

GND_34

I2S_I/F

D6 M4 C5 E6

P_SDA

R406 M7

PCM_5V_CTL

R419 22

1uF

SPDIF_OUT

CI_DET AMP_SCL

SPDIF_IN/GPIO152

B7 K7

AVDD_MIU

J15 SPDIF_OUT/GPIO153

J16 K16

MODEL_OPT_1

J17

RF_SWITCH_CTL

L16

AV2_DET

L17

DSUB_DET

GPIO54

GND_36 GND_37

J14

AMP_SDA

GND_35

TUNER_RESET

C466

DVDD_NODIE

AMP_RESET_N

M16

AVDD_DDR0_C

GND_38

AVDD_DDR0_D_1

GND_39

AVDD_DDR0_D_2

GND_40

AVDD_DDR0_D_3

GND_41 GND_42

AVDD_DDR1_C

GND_43

AVDD_DDR1_D_1

GND_44

AVDD_DDR1_D_2

GND_45

AVDD_DDR1_D_3

GND_46 GND_47 GND_48

J8 K8

R23

IC400 LGE2111C-MS (PDP_13_MS10)

Y16

C4002

C441

C440

C4002 SHOULD NEAR MAIN IC

+2.5V

AVDD2P5

L405 BLM18PG121SN1D

AVDD_DDR0:55mA

C4001 IS CAP FOR REPAIR SHOULD BE BOTTOM SIDE

AVDD2P5:172mA

AE15

PCM_D[5]

AD14

PCM_D[6]

AB15

PCM_D[7]

AC16

PCM_A[0]

Y17

PCM_A[1]

AA16

PCM_A[2]

AB16

PCM_A[3]

AD16

PCM_A[4]

Y18

+5V DECAP FOR SOC (HIDDEN - UCC)

AVDD25_PGA

1uF

C446

C445

0.1uF

C444

C4004

0.1uF

0.1uF C4003

C442

10uF

C436

READY C4001 0.1uF 4V

C489 0.1uF 4V

AVDD_NODIE +3.3V_ST

AB18

PCM_A[9]

AD17

PCM_A[10]

AC15

PCM_A[11]

AE17

PCM_A[12]

AA19

PCM_RST

AC18 AE14 AD18

/PCM_IORD

AC17

/PCM_CE

AD19

/PCM_WE R460 10K

AVSS_PGA Close to IC with width trace

AC19

AD20

/PCM_IOWR

C401 0.1uF

AA18

TS1DATA0/GPIO88

PCMDATA1/GPIO127

TS1DATA1/GPIO89

PCMDATA2/GPIO128

TS1DATA2/GPIO90

PCMDATA3/GPIO120

TS1DATA3/GPIO91

PCMDATA4/GPIO119

TS1DATA4/GPIO92

PCMDATA5/GPIO118

TS1DATA5/GPIO93

PCMDATA6/GPIO117

TS1DATA6/GPIO94

PCMDATA7/GPIO116

TS1DATA7/GPIO95 TS1CLK/GPIO98

PCMADR0/GPIO125

TS1VALID/GPI96

PCMADR1/GPIO124

TS1SYNC/GPIO97

R457

/CI_CD1 /PCM_REG

22 C456EU

AE21

0.1uF 16V EU

W16

/PCM_WAIT

AE18

BUF1_FE_TS_DATA[1]

AD13

BUF1_FE_TS_DATA[2]

Y13

BUF1_FE_TS_DATA[3]

22 EU

USB1_OCD

<SOC_RESET>

+3.3V

Y10

/PF_CE1

AB10

/PF_OE

AC10

PF_ALE

BUF1_FE_TS_DATA[4]

V17

AD12

BUF1_FE_TS_DATA[5]

V18

AC12

BUF1_FE_TS_DATA[6]

V19

W10

BUF1_FE_TS_DATA[7]

V20

AB13

PCMADR4/GPIO99

TS0DATA0/GPIO77

PCMADR5/GPIO101

TS0DATA1/GPIO78

PCMADR6/GPIO102

TS0DATA2/GPIO79

PCMADR7/GPIO103

TS0DATA3/GPIO80

PCMADR8/GPIO108

TS0DATA4/GPIO81

PCMADR9/GPIO110

TS0DATA5/GPIO82

PCMADR10/GPIO114

TS0DATA6/GPIO83

PCMADR11/GPIO112

TS0DATA7/GPIO84

PCMADR12/GPIO104

TS0CLK/GPIO87

PCMADR13/GPIO107

TS0VALID/GPIO85

PCMADR14/GPIO106

TS0SYNC/GPIO86

AC14

C497 10uF 10V

MODEL OPTION

R472

R470

R410

R405

1K NON_OS

R463

1K R461

1K R459

<CHIP Config> (I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0) <CHIP Config(LED_R/BUZZ)> Boot from SPI CS1N(EXT_FLASH) 1’b0 Boot from SPI_CS0N(INT_FLASH) 1’b1

PIN NAME

PIN NO.

MODEL_OPT_0

AB3

MODEL_OPT_1

LOW FHD

HIGH

W17 W18

CI_TS_DATA[2]

W20

AE11 CI_TS_DATA[3] AB11 CI_TS_DATA[4]

W21

AE12 CI_TS_DATA[5] AC13 CI_TS_DATA[6]

W22 AA7

AB14 CI_TS_DATA[7]

AB6

AA11

AB7

CI_TS_CLK

Y11 AC11

GND_52

GND_92

GND_53

GND_93

GND_54

GND_94

GND_55

GND_95

GND_56

GND_96

GND_57

GND_97

GND_58

GND_98

GND_59

GND_99

GND_60

GND_100

GND_61

GND_101

GND_62

GND_102

GND_63

GND_103

GND_64

GND_104

GND_65

GND_105

GND_66

GND_106

GND_67

GND_107

GND_68

GND_108

GND_69

GND_109

GND_70

GND_110

GND_71

GND_111

GND_72

GND_112

GND_73

GND_113

GND_74

GND_114

GND_75

GND_115

GND_76

GND_116

GND_77

GND_117

GND_78

GND_118

GND_79

CI_TS_VAL

GND_80

CI_TS_SYNC

GND_81 GND_82

C458 2pF 50V

from CI SLOT

GND_83 GND_84

PCMIOWR_N/GPIO109

GND_85

100pF C463 READY

PCMOE_N/GPIO113

Close to MSTAR

PCMIORD_N/GPIO111 PCMCE_N/GPIO115 PCMWE_N/GPIO197

AC3

PCMCD_N/GPIO130

PCMREG_N/GPIO123

AD2

R466

100

R465

H_NIM 100

C462

GND_86 GND_87

100pF C464 READY

0.1uF

DTV_IF

C461 H_NIM 0.1uF

H_NIM

GND_88

IF_P_MSTAR

GND_89

B16 B18 B21 C11 C12 C13 C20 C23 C25 D23 E17 E18 E20 E23 F4 F5 F6 F7 F18 G4 G5 G6 G7 G10 G12 G15 G19 G20 G24 H7 H10 H12 H13 H14 H15 H19 H25 J1 J7 J12 J13 J19 J20 J24 K12 K13 K14 K15 K18 K19 K25 L8 L12 L13 L14 L15 L18 L19 L20 L24 M3 M8 M12 M13 M14 M15 M17 M18 M19 M24 N1 N7 N13 N14 N15 N16 N17 N18 N19 N20 N25 P13 P14 P19 P21 P24

GND_90

IF_N_MSTAR

H_NIM

A_DEMODE A_DEMODE C459 0.1uF R467 47

PCM2_CD_N/GPIO135

C460

PCM2_RESET/GPIO134 PCM2_CE_N/GPIO131 PCM2_IRQA_N/GPIO132

AD1 SIFP

AD3

SIFM

0.1uF R468

TU_SIF

A_DEMODE

ANALOG SIF Close to MSTAR

AC2 IF_AGC

+3.3V

NF_ALE/GPIO141 NF_WPZ/GPIO198 NF_CEZ/GPIO137

AB3 GPIO73

NF_CLE/GPIO136

GPIO74

NF_REZ/GPIO139

I2C_SCKM1/GPIO75

NF_WEZ/GPIO140

I2C_SDAM1/GPIO76

NF_RBZ/GPIO142

AC4 AE3 AE2

TU_SCL TU_SDA

TUNER_I2C

D400 BAW56 GEANDE R403 100K

W11

CI_TS_DATA[0-7]

NON_A_DEMODE AGC 1.25V 100 OHM SERIAL A_DEMODE 0ohm

SOC_RESET PWM1 PWM0

BUF1_FE_TS_SYN

AB12 CI_TS_DATA[0] AD11 CI_TS_DATA[1]

PCMIRQA_N/GPIO105

+3.3V

R408 10

BUF1_FE_TS_VAL_ERR

W13

PCM_RESET/GPIO129

AR401 OS 22

MODEL_OPT_1

V21

BUF1_FE_TS_CLK

/F_RB

RF_SWITCH_CTL

AUD_MASTER_CLK

V16

0.1uF C468 H_NIM

R475

AC9

/PF_WE

V15

W15

PCMADR3/GPIO121

AD10 AA10

/PF_CE0 +3.3V_ST

V11

PCMADR2/GPIO122

PCM2_WAIT_N/GPIO133

Y9 /PF_WP

LED_RED AUD_SCK

AB20 AR400 22 OS

FHD

Boot from 8051 with SPI flash Secure B51 without scramble Secure B51 with scramble Boot from MIPS with SPI flash Boot from MIPS with SPI flash Boot from MIPS with SPI flash Secure MIPS without scramble Scerur MIPS with SCRAMBLE

R409

4’b0000 4’b0001 4’b0010 4’b0100 4’b0101 4’b0110 4’b1001 4’b1010

READY

: : : : : : : :

R462

+3.3V

AA20 AB22

USB1_CTL

<HW_OPT> B51_no_EJ SB51_WOS SB51_WS MIPS_SPE_NO_EJ MIPS_SPI_EJ_1 MIPS_SPI_EJ_2 MIPS_WOS MIPS_WS

GND_51 GND_91

B14

PCMWAIT_N/GPIO100

Y20 R456

BUF1_FE_TS_DATA[0-7]

AA13

Y21 /CI_CD2

BUF1_FE_TS_DATA[0]

AA14

AA17

L407 BLM18SG121TN1D AVDD_DDR1:55mA

AC20

PCM_A[8]

/PCM_OE

C477 0.1uF

C453 IS CAP FOR REPAIR SHOULD BE BOTTOM SIDE

PCM_A[7]

/PCM_IRQA L400 BLM18PG121SN1D

DECAP FOR SOC (HIDDEN - UCC)

C453 0.1uF 4V

Y19

PCM_A[14] EU R458 10K

AVDD_NODIE:7.362mA

L406 BLM18PG121SN1D

READY 0.1uF

C485 0.1uF

AE20

PCM_A[6]

PCM_A[13]

AVDD_MIU

C432

AD15

PCM_D[4]

PCM_A[5]

DECAP READY FOR TEST

GND_50

A20

BLM18PG121SN1D

0.1uF

PCM_D[2]

Y14 PCMDATA0/GPIO126

L410 H_NIM

READY

C4000,C4005,C4006 IS CAP FOR REPAIR SHOULD BE BOTTOM SIDE

AB19

PCM_D[3]

AB17

PCM_D[1]

PCM_A[0-14] C438

10uF

C431

C434

C435 10uF

0.1uF

L401 BLM18PG121SN1D

C4006 0.1uF

4V C4005 0.1uF

C4000 0.1uF

0.1uF

0.1uF C493

C492

C491

C490

0.1uF 4V

0.1uF

0.1uF C484

C482

C487

0.1uF

C480

1uF

0.1uF

C478

C474

C472

1uF

10uF C465

C467

10uF

C455

DECAP FOR SOC (HIDDEN - UCC)

VDD33

+3.3V

DECAP FOR SOC (HIDDEN - UCC)

MS10 PCM_D[0]

READY READY READY

C457

Internal demod out

PCM_D[0-7]

+1.26V_VDDC VDDC : 2026mA

PCM_D[0-7]

+1.26V_VDDC

T23

L402 BLM18PG121SN1D

GND_49

TEST R19

#POWER FOR MAIN#

+1.5V_DDR

GND_EFUSE

A17

H_NIM R469 10K

C402 0.1uF R464 2.2K

R474 2.2K

R450 R451 2.2K 2.2K

H_NIM R471 100 R452 2.2K

R453 2.2K

IF_AGC_MAIN C469 0.047uF 25V H_NIM

I2C_SDA I2C_SCL P_SDA P_SCL

Close to MSTAR

UART_RXD UART_TXD

L13 MAIN

2012-06-201 4

LGE Internal Use Only

NAND Flash 1GBit

LVDS

Key/IR +3.3V_ST

D500 MMBD6100

D503

D504

R577 4.7K

R/B

P500 104060-8017

RE /PF_OE CE

47K R578

/PF_CE0 NC_7

P503 TF05-51S

R514 22

7 D505 20V

C520 10pF 50V

NC_6

/F_RB E Q500 MMBT3904(NXP) @optio

OS R568 4.7K

2K R579

20V

20V C534 0.1uF 16V

OS R565 1K

KEY2

LED_RED

R516 100

C535 0.1uF 16V

NC_5 LD500

KEY1

NC_8

OS C550 0.1uF 0 0

R519 R520

VCC_1

UART_RXD UART_TXD

VSS_1 NC_9

NC_10

+3.3V_ST

20V

D501

12 13 14

RXA0RXA0+ RXA1RXA1+

20 21 22 23 24

ALE PF_ALE WE /PF_WE

/PF_WP

RXA2RXA2+

31 30

NC_29 NC_28 NC_27 PCM_A[0-7]

OS AR518 22

NC_26 I/O7

PCM_A[7]

I/O6

PCM_A[6]

I/O5

PCM_A[5]

I/O4

PCM_A[4]

NC_25 NC_24 C554 OS 10uF10V

NC_23 VCC_2

OS C555 0.1uF

VSS_2 NC_22 NC_21

OS AR519 22

NC_20 I/O3

PCM_A[3] IC504-*1 TC58NVG0S3ETA0BBBH

I/O2

Toshiba_OS NC_1 1

PCM_A[2]

NC_2 NC_3

I/O1

PCM_A[1]

NC_4

PCM_A[0]

RY/BY

NC_5

I/O0

RE CE

15 OS

R556 3.3K

NC_12

R567 1K

NC_13

17 RXACKRXACK+ RXA3RXA3+ RXA4RXA4+

NC_6

NC_11

18 19

/PF_CE1

15 16

CLE

C547 0.1uF 16V

NC_2 NC_3

20V

R517 100

+3.3V

NC_4

R542 10K

D502

C517 10pF 50V

R513 4.7K

IR +3.3V_ST

NC_1 R512 4.7K

R518 100

+3.3V

+5V

P501 12507WR-06L

Commercial R515 4.7K

R540 10K

IC504 H27U1G8F2CTR-BC

+5V

NC_19

NC_7 NC_8 VCC_1 VSS_1

NC_18

NC_9 NC_10 CLE

NC_14

NC_17

ALE WE WP

NC_15

NC_16

NC_11 NC_12 NC_13

NC_14 NC_15

NC_29 NC_28 NC_27 NC_26 I/O8 I/O7 I/O6 I/O5 NC_25 NC_24 NC_23 VCC_2 VSS_2 NC_22 NC_21 NC_20 I/O4 I/O3 I/O2 I/O1 NC_19 NC_18 NC_17 NC_16

26 HD

24 27 28 29 30

RXB0RXB0+ RXB1RXB1+

25 26 27 28

31 32 33

34 35 36 37 38 39 40

SERIAL FLASH

RXB2RXB2+

31 32

RXBCKRXBCK+ RXB3RXB3+ RXB4RXB4+

R564 10K

RXA0-

RXA0+

RXA1-

FHD

NON OS

READY R580

SCLK SPI_SCK

10K VCC

SI/SIO0

R581 33

NC_2

NC_3

NC_4

RXA1+

SO/SIO1 SPI_SDO

GND IC505-*1 MX25L8006EM2I-12G

RXA2+

C556 0.1uF

VCC

HOLD[IO3]

CLK SPI_SCK

OS:8MB

MX_OS CS#

R575 DI[IO0] 33

RXACK+

RXA3-

WP#

RXA3+

GND

RXA4-

RXA4+

SO/SIO1

SPI_SDI

VCC

RXACK-

NC_8

RXB0-

RXB0+

RXB1-

HOLD#

SCLK

SI/SIO0

RXB1+

NON_OS:64MB

NC_6

Winbond_NON-OS CS 1

RXB2-

RXB2+

DO[IO1]

WP[IO2]

NC_5

GND

IC505-*3 MX25L6406EM2I-12G

IC505-*2 W25Q64FVSSIG

NC_7

RXBCK-

RXBCK+

RXB3-

67 CS# /SPI_CS

/FLASH_WP

55 SPI_SDI

READY 3

%WP[IO2]

C557 NC_1

DO[IO1] SPI_SDO

RXA2-

READY IC506 MX25L6406EMI-12G HOLD#

+3.3V_ST

READY 0.1uF

R569 4.7K READY

/SPI_CS

47 48

+3.3V_ST

IC505 W25Q80BVSSIG

Winbond_OS

+3.3V_ST +3.3V_ST

GND

VCC

MX_NON-OS CS

%HOLD[IO3]

SO/SIO1

CLK

DI[IO0]

GND

VCC

HOLD

SCLK

SI/SIO0

RXB3+

RXB4-

RXB4+

WP#

/FLASH_WP

72 73 74 75

P_SDA

DISP_EN

77 78

P_SCL PC_SER_DATA

PC_SER_CLK

80 C518 470pF READY

C519 470pF READY

NVRAM OS:256KB IC503-*1 AT24C256C-SSHL-T(Cu) ATMEL_OS A0

GND

VCC

SCL

SDA

IC503-*2 M24256-BRMN6TP ST_OS E0

VSS

+3.3V

VCC

SCL

C552 0.1uF

SDA

IC503 M24512-RMN6TP

P_SDA P_SCL

READY R521 0

PC_SER_DATA PC_SER_CLK 0 R522 READY

NON_OS:512KB

IC503-*3 AT24C512C-SSHD-T ATMEL_NON-OS A0 1 A1

GND

VCC

ST_NON_OS E2

SCL

R573 22

SDA

R574 22

I2C_SCL

VCC

VSS

I2C_SDA

SCL

SDA

* LCI: LVDS Connection Indicator

L13 Memory.LVDS,IR

2012-06-01 5

LGE Internal Use Only

POWER & AMP

<ST-BY>

1.26V Core

5V_STBY --> MULTI 5V

+5V_ST --> 3.3Vst

+5V

+5V_ST

+3.3V_ST

+5V

+5V_ST

RL_ON

5V_ON

R604

4.7K

Q604 ZXMP3F30FHTA

R657 10K READY

+3.3V_ST

300mA

5% 1/16W

S C608 10uF 10V

VS_DET

C610 0.1uF 16V

RL_ON

17V_DET AC_DET

C633 1000pF 50V

R648 100

R617 33K 1%

VS_ON

C607 0.1uF 16V

+5V_ST

IC600 AP2121N-3.3TRE1

R609 100

C606 0.1uF 16V

IC603 TPS54327DDAR [EP]GND

VFB

C623 100pF 50V

VREG5

R2 R619 51K 1%

C624 1uF 10V

R607 10K

L600 120

THERMAL

READY

7 R601 R600 10K 10K

C621 0.1uF 50V

READY

C620 10uF 25V

+5V_ST

R639 10K

R624 15K

C613 10uF 25V READY

READY

P_17V

R606 4.7K

+3.3V_ST

3A 4

R664 10K

L604 120

P600 SMAW200-H18S1

R667 0.1uF 16V READY

R670 0.1uF 16V

R671 10K READY

VIN

+1.26V_VDDC

VIN 3

VBST

C600 10uF 10V

C628 0.1uF 25V

VOUT

C601 0.1uF 16V

C604 1uF 6.3V

GND

READY C602 2.2uF 10V

C634 10uF 6.3V

L605 2.2uH

C C650 10uF 16V

GND

C629 10uF 16V

C630 0.1uF 16V

C609 10uF 16V

RL_ON

C603 10uF 16V

Q603 MMBT3904(NXP)

R659 10K E

C626 3300pF 50V

Vout=0.765*(1+R1/R2)

<MUTI> --> +1.5V_DDR

+5V->+3.3V ->+3.3V_TU

+5V->+2.5V

+5V->+1.8V_TU 80mA

INPUT IN

ADJ/GND

OUTPUT C618 10uF 6.3V

OUT C611 10uF 10V

200mA IC601 TJ1118S-2.5

+1.5V_DDR

OUT

INPUT

C616 10uF 10V

R612 1

GND

R662 1

C612 10uF 6.3V

C617 10uF 6.3V

ADJ/GND

OUTPUT

L606 120-ohm 2A

C619 10uF 6.3V

C627 10uF 6.3V

+3.3V_TU

ADJ/GND OUT

1 C605 10uF 10V

R675 1

R608 1

+3.3V IN

C615 10uF 10V

400mA

+5V

R2 IC604 AZ1117BH-ADJTRE1

220 100 R614 R613 5% 5%

+3.3V_DDR

IC608 AP1117E33G-13

+2.5V

+1.25V_TU

IC602 AP1117EG-13 FNIM +1.8V_TU IN

OUT

ADJ/GND

C614 10uF 10V FNIM

R621 1

READY

600mA IC605 AP1117E33G-13

+5V

D600 5V

+5V

IC613 R2 AZ1117BH-ADJTRE1

+5V

600mA

+5V

400mA 200 1K R674 R673 1% 1%

+3.3V_DDR

+5V->+1.25V_TU

R2 R615 1 FNIM

+5V->+3.3V_DDR

R618 240 FNIM

R620 1 FNIM C625 10uF 6.3V FNIM

C631 10uF 6.3V

Vout=1.25*(1+R2/R1) Vout=1.25*(1+R2/R1)

L609 10.0uH

L611 10.0uH

NC_1

NC_4

NC_3

NC_2

NC_7

NC_6

NC_5

NC_10

NC_8

+3.3V

NC_11

+3.3V_AMP

NC_9

NC_12

Coil_GET

Coil_TAIYO

L601

12 GND_REG

31 32 33

VREGFILT

AGNDPLL

MCLK

6 OUT2A 4 GND2 3 OUT2B

2 VSS_REG 1 VCC_REG

C679 0.1uF 50V

C685 Coil_TAIYO 330pF 50V Coil_TAIYO

R637 39

R633 39

C692 0.22uF 50V

C697 1000pF 50V

SPK_L+

SPEAKER_L

SPK_LP601 WAFER-ANGLE

SPK_L+

C689 0.22uF 50V

L615 10.0uH

[EP]

VDDDIG2

GNDDIG2

TESTMODE

SCL

SDA

PWDN

RESET

INTLINE

AUD_SCK

SDI

100

LRCKI

BICKI

AR600

AUD_MASTER_CLK

C696 1000pF 50V

Coil_GET L614 10.0uH

5 VCC2

FFX3B EAPD/FFX4A TWARNEXT/FFX4B

IC606 STA380BWF

C691 0.22uF 50V

L603 10.0uH

7 OUT1B

C688 0.22uF 50V

Coil_TAIYO

8 VCC1

FFX3A

L602 10.0uH Coil_GET L612 10.0uH

C684 330pF 50V

9 GND1

GNDDIG1

C678 0.1uF 16V

10 OUT1A

VDDDIG1

11 VDD_REG

NC_15

NC_14

38 39

C673 2.2uF 10V

NC_13

C672 0.1uF 16V

THERMAL

BLM18PG121SN1D

R636 39

R632 39

+3.3V_AMP

L610 10.0uH

AUD_LRCK

C693 0.22uF 50V

C698 1000pF 50V

C694 0.22uF 50V

C699 1000pF 50V

SPK_R+ SPK_L-

SPEAKER_R SPK_R+ SPK_R-

SPK_R-

P_17V

Coil_GET READY

AUD_LRCH

L616 CIS21J121

C632 2pF 50V

C677 0.1uF 16V C680 0.1uF 50V

R611 33 AMP_MUTE

C681 1uF 50V

C686 1uF 50V

C687 0.1uF 50V

C690 0.1uF 50V

C695 68uF 35V

+3.3V_AMP +3.3V_AMP

R628 4.7K AMP_RESET_N

R641 C622 0.1uF

AMP_SDA

R640 4.7K

4.7K

R652 22 R653 22

AMP_SCL READY C674 33pF 50V

READY C675 33pF 50V

L13 Power,AMP

2012-06-01 6

LGE Internal Use Only

R1227

C1241

1uF

C1238

1uF

C1219

1uF

10uF

C1218

C1251

OS 1K 1% 0.1uF

C1250 OS 1% 1K

C1249

OS 1000pF

R1225

L1202 CIC21J501NE

R1228

R1224

OS 1K 1% 0.1uF

C1248 OS 1K 1%

C1247

OS 1000pF

AVDD_DDR0

+1.5V_DDR

CLose to DDR3

CLose to Saturn7M IC

CLose to DDR3

AVDD_DDR0

B-MVREFDQ

B-MVREFCA

A-MVREFCA

1000pF

0.1uF C1204

1% 1K

R1205

A-MVREFDQ

C1203

1000pF

0.1uF C1202

C1201

AVDD_DDR0

1K 1%

R1204

AVDD_DDR0

1K 1% 1%

R1202

R1201

AVDD_DDR0

CLose to DDR3

IC400 LGE2111C-MS (PDP_13_MS10)

EAN61836301

IC1201 K4B1G1646G-BCK0

EAN61836301

IC1202 K4B1G1646G-BCK0

IC1201-*1 H5TQ1G63EFR-PBC

VREFDQ

A4 A5

ZQ 240 1%

A7 A8

C1208 C1210 C1211 C1212 C1213 C1214 C1215 C1216

0.1uF

R1 R9

0.1uF

VDD_1

A10/AP

VDD_2 VDD_3

A11

VDD_4

A12/BC

F1 H2 H9

L9 T7

A-MA14

R8 R2

J2 J8 M1 M9 P1 P9 T1 T9

BA0

VDDQ_1

D8 E2 E8 F9 G1 G9

BA0

A-MA8

VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

NC_2 NC_4

F3 G3

VDDQ_2 VDDQ_3

VDDQ_4

CKE

VDDQ_5 CS

VDDQ_7

ODT

VDDQ_8

RAS CAS

A-MA10

R7 N7 T3

DQSL

A_MA5

A_MA6

A8 C1 C9

A_MA7

D2 E9 F1

A_MA8

H2 H9

A_MA9

J9 L1 L9

A_MA10

A-MA12

VSS_1 VSS_2 VSS_3

DML

VSS_4

DMU

VSS_5

DQL0

VSS_7

VSS_6

E3 F2 H3 H8

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

B8 A3

A-MBA0

A-MBA1

A-MBA2

K7 K9

B3 E1 G8

A_MA12

J2 J8 M1

A_MA13

M9 P1 P9

A_MA14

T1 T9

DQL6

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

A-MDQL0

B1 VSSQ_1

D7 C3 C8

A_MA11

A9 DQSU DQSU

A-MA11 A-MA13

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9 D1

A-MDQL1

D8 E2 E8

A-MDQL2

F9 G1 G9

A-MCK

A-MDQL3 A-MDQL4 A-MDQL5

C1209

A-MDQL6

0.01uF 50V

A-MDQL7 A-MDQU0

A-MCKE

A-MDQU1 A-MCKB

A-MDQU2 A-MDQU3

A-MODT

A-MRASB

A-MDQU4 AVDD_DDR0

A-MDQU5

A-MCASB R1231 A-MWEB 10K

A-MDQU6 A-MDQU7 A_MCASB

A-MRESETB

RESET

NC_2

R1 R9

NC_6

C7 B7

WE NC_1

A_MA4

DQSL

VDDQ_6

K8 N1 N9

J1 NC_1

RESET

NC_3

A_MA3

G7 K2

VDD_9

VDDQ_1 CK

A-MA9

BA1

A_MRASB

NC_3

A_MWEB

NC_4

A-MDML

F3 DQSL

VSS_1

DQSU

VSS_2

DQSU

VSS_3 DML

VSS_5

DMU

VSS_6 DQL0

VSS_8

DQL1

VSS_9

DQL2

VSS_10

DQL3

VSS_11

DQL4

VSS_12

DQL5

DQU0

VSSQ_3

DQU1

VSSQ_4

DQU2

VSSQ_5

DQU3

VSSQ_6

DQU4

VSSQ_7

DQU5

VSSQ_8

DQU6

VSSQ_9

DQU7

A_MBA2

A-MDML

A_MCKE

A-MDMU

A-MCK A-MCKB

F7 F2 F8 H3 H8 G2 H7 D7

VSSQ_2

A_MBA1 A_MRESETB

DQL7 VSSQ_1

A_MODT

A-MDQSUB

VSS_7

A-MDMU

A-MDQSU

B7 E7

VSS_4

A-MDQSL A-MDQSLB

A_MBA0

B1 D1

J3 L3

BA2

DQL6

VDD_7 VDD_8

A-MA7

VDD_5 VDD_6

CKE

DQSL

A-MA6

VDD_8

NC_6

VDD_2 VDD_3 VDD_4

BA2

J1 L1

A10/AP A11

J7 K7

NC_5

VDD_7

VDDQ_9

N8 M3

A-MA4

A_MA2 B2

VDD_1

A12/BC

A-MA5

A_MA1

L8 ZQ

A8 A9

NC_5

H1 VREFDQ

DQL7

0.1uF

A_MA0

VREFCA

A5 A6 A7

NC_7

VDD_6

BA1

A3 A4

VDD_9

R7 N7

A-MA3

A13

VDD_5

0.1uF

M8 A0 A1 A2

C1207

10uF

T8 R3

C1205

A-MA2

R1235 56

AVDD_DDR0

R1236 56

R1203

A-MA1

C3 C8 C2 A7 A2 B8 A3

A-MDQL0

A-MDQSL

A-MDQL1

A-MDQSLB

A-MDQL2

A-MDQSU

A-MDQL3

A-MDQSUB

MS10F9 E10 G9 C14 F11 A14 F10 C15 D11 C16 G13 E11 F12 B15 D10 B23 B19 A23 C19 B24 C18 A24 A18 D15 F17 F14 E16 D14 D16 E14 F16 A12 B11 E9 B20 D17 A11 B12 G11 B13 G8 F13 B17 C17 B22 C22 A21 C21

E22 A_DDR3_A0

B_DDR3_A0

A_DDR3_A1

B_DDR3_A1

A_DDR3_A2

B_DDR3_A2

A_DDR3_A3

B_DDR3_A3

A_DDR3_A4

B_DDR3_A4

A_DDR3_A5

B_DDR3_A5

A_DDR3_A6

B_DDR3_A6

A_DDR3_A7 A_DDR3_A8 A_DDR3_A9 A_DDR3_A10 A_DDR3_A11 A_DDR3_A12 A_DDR3_A13 A_DDR3_A14 A_DDR3_DQL0 A_DDR3_DQL1 A_DDR3_DQL2 A_DDR3_DQL3 A_DDR3_DQL4

B_DDR3_A7 B_DDR3_A8 B_DDR3_A9 B_DDR3_A10 B_DDR3_A11 B_DDR3_A12 B_DDR3_A13 B_DDR3_A14 B_DDR3_DQL0 B_DDR3_DQL1 B_DDR3_DQL2 B_DDR3_DQL3 B_DDR3_DQL4

A_DDR3_DQL5

B_DDR3_DQL5

A_DDR3_DQL6

B_DDR3_DQL6

A_DDR3_DQL7

B_DDR3_DQL7

A_DDR3_DQU0

B_DDR3_DQU0

A_DDR3_DQU1

B_DDR3_DQU1

A_DDR3_DQU2

B_DDR3_DQU2

A_DDR3_DQU3

B_DDR3_DQU3

A_DDR3_DQU4

B_DDR3_DQU4

A_DDR3_DQU5

B_DDR3_DQU5

A_DDR3_DQU6

B_DDR3_DQU6

A_DDR3_DQU7

B_DDR3_DQU7

A_DDR3_CASZ

B_DDR3_CASZ

A_DDR3_RASZ

B_DDR3_RASZ

A_DDR3_WEZ

B_DDR3_WEZ

A_DDR3_DQML

B_DDR3_DQML

A_DDR3_DQMU

B_DDR3_DQMU

A_DDR3_ODT A_DDR3_BA0 A_DDR3_BA1 A_DDR3_BA2

B_DDR3_ODT B_DDR3_BA0 B_DDR3_BA1 B_DDR3_BA2

A_DDR3_RESET

B_DDR3_RESET

A_DDR3_MCLKE

B_DDR3_MCLKE

A_DDR3_MCLK A_DDR3_MCLKZ A_DDR3_DQSL A_DDR3_DQSBL A_DDR3_DQSU A_DDR3_DQSBU

B_DDR3_MCLK B_DDR3_MCLKZ B_DDR3_DQSL B_DDR3_DQSBL B_DDR3_DQSU

OS_SS_1G_1600

B_MA0

G21 F20 E24 K20 F24 J21 F23

B_MA1

B-MA0

B_MA2

B-MA1

B_MA3

B-MA2

B_MA4

B-MA3

B_MA5

B-MA4

B_MA6

B-MA5

H22 L21 G22

B_MA9

B-MA8

B_MA10

B-MA9

G25 H20

B_MA12

B-MA11

B_MA13

B-MA12

N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3

B-MA13

B_MA14

P23

B-MA10

B_MA11

J22

B-MA7

B_MA8

G23

B-MA6

B_MA7

L25 K23

B-MDQL3

T25

B-MCK

B-MDQL4

J23

B-MDQL5

T24

OS C1240

B-MDQL6

K24

B-MDQL7

N21

B-MDQU1

L22

B-MBA2

K7 K9

B-MODT

B_MCASB

B25

B_MRASB

F22 L23 R20 C24 D25

B-MWEB

R1232 10K

B-MDQU7

D24

B-MCASB

B-MDQU6

N22

B-MRASB

AVDD_DDR0

B-MDQU5

M22

E25 E21 H23 H24 N23 N24 M23

B_DDR3_DQSBU

A9 A10/AP A11 A12/BC

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_7

B-MDQSL

VDDQ_1 CK

VDDQ_2

VDDQ_3

CKE

VDDQ_4 VDDQ_5

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

B_MBA1

B-MDQSU

B_MBA2

B-MDQSUB

B_MCKE

B-MDML

B-MCK

B-MDMU

B-MDQSL

B-MDQL0

B-MDQSLB

B-MDQL1

B-MDQSU

B-MDQL2

B-MDQSUB

B-MDQL3

A-MDQL4

B-MDQL4

A-MDQL5

B-MDQL5

A-MDQL6

B-MDQL6

A-MDQL7

B-MDQL7

A-MDQU0

B-MDQU0

A-MDQU1

B-MDQU1

A-MDQU2

B-MDQU2

A-MDQU3

B-MDQU3

A-MDQU4

B-MDQU4

A-MDQU5

B-MDQU5

A-MDQU6

B-MDQU6

A-MDQU7

B-MDQU7

A11

VDD_3

A12/BC

VDD_4

NC_7

VDD_5

NC_5

VDD_7

BA0

VDD_9

VDD_6 VDD_8

K7 K9

0.1uF

OS C1231

0.1uF

K3 L3

VDDQ_2

VDDQ_3 VDDQ_4 VDDQ_5

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

RESET

NC_2 NC_3 NC_4

DQSL

A8 C1 C9 D2 E9 F1 H2 H9

J9 L1 L9 T7

DQSL C7 B7

A9 DQSU DQSU

0.1uF 0.1uF

OS C1234 OS C1235

0.1uF

OS C1236

0.1uF

F2 F8 H3 H8 H7

VSS_2

DML

VSS_4

DMU

VSS_5 VSS_6

OS C1232 OS C1233

VSS_1 VSS_3

C3 C8

0.1uF

R1 R9

NC_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

C2 A7 A2 B8 A3

B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

DQL6 DQL7

N1 N9

J1 NC_1

G7 K2 K8

A1 VDDQ_1

BA1

OS C1229 OS C1230

B2 VDD_1 VDD_2

B1 VSSQ_1

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9 D1 D8 E2 E8 F9 G1 G9

A8 C1 C9 D2 E9 F1 H2 H9 J1

NC_1

DQSL

A8 A9

L8 ZQ

A10/AP

AVDD_DDR0 10uF

H1 VREFDQ

NC_2 NC_4

B-MDQSLB

A6 A7

BA2

OS C1227 OS C1228

BA1

B-MDML B_MODT

VDD_9

NC_3

B-MDMU

A3 A4 A5

M2 N8

VREFCA

A1 A2

VDD_8

M8 A0

CKE

VDD_6

BA0

240 1%

RESET

J9 L1 L9 T7

NC_6

B-MA14

DQSL C7 B7

A9 DQSU

VSS_1

DQSU

VSS_2 VSS_3

E7 D3

B-MCKB

P25

OS R1226

B_MRESETB

M20

B_MWEB

B_MBA0

K22

B-MRESETB

R2 T8 L7

B-MCKE

B-MVREFDQ

B-MDQU4

R22

P8 P2

H1 VREFDQ

BA2

B-MDQU3

P20

B-MCKB

B-MDQU2

R21

B-MBA1

0.01uF 50V

B-MDQU0

P22

B-MBA0

N3 P7 N2

NC_5

B-MDQL2

IC1202-*1 H5TQ1G63EFR-PBC

B-MVREFCA

VREFCA

B-MDQL1

R24

M8 A0

A13

B-MDQL0

A-MVREFDQ

N2 P8 P2

56 R1237

P7 P3

A-MA0

OS 1%

N3 A0

VREFCA

56 R1238

SS_1G_1600 M8

A-MVREFCA

DML

VSS_4

DMU

VSS_5 VSS_6

E3 F7 F2 F8 H3 H8 G2 H7

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

DQL7

C8 C2 A7 A2 B8 A3

E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

DQL6 B1 VSSQ_1

D7 C3

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9 D1 D8 E2 E8 F9 G1 G9

<NONE MS10> NONE_MS10

AR1224

AR1217

AR1211

AR1206

IC400-*1 LGE2111C (PDP_13_None MS10)

F9 E10 G9

A_MA12

A-MA12

A_MBA1

A-MBA1

A-MA13

B-MA12

A_MA13 A_MA9

A-MA9

B_MA12 OS

B-MBA1

B_MBA1

B-MA13 B-MA9

B_MA13 OS

C14 F11 A14

B_MA9

F10 C15 D11 C16 G13 E11 F12

AR1223

AR1216

AR1207

AR1210

B15

D10 B23 B19 A23 C19 B24 C18

A_MA10

A-MA10 A-MCKE

A_MCKE

A_MA0

A-MA0

A_MWEB

A-MWEB

B_MA10

B-MA10 OS

B-MCKE

B_MCKE

B-MA0 B-MWEB

B_MA0

A24

B_MWEB

F17

A18 D15 F14 E16 D14 D16 E14 F16 A12

AR1222

AR1214

AR1203 OS

AR1205

B11 E9 B20 D17 A11 B12 G11

A-MA6

A_MA6 A_MA4

A-MA4

B-MA6

A_MA5

A-MA5 A-MA7

A_MA7

B_MA6 B_MA4

B-MA4

B-MA5 B-MA7

B_MA5

B13 G8 F13

B17

B_MA7

C17 B22 C22 A21 C21

A_DDR3_A0

B_DDR3_A0

A_DDR3_A1

B_DDR3_A1

A_DDR3_A2

B_DDR3_A2

A_DDR3_A3

B_DDR3_A3

A_DDR3_A4

B_DDR3_A4

A_DDR3_A5

B_DDR3_A5

A_DDR3_A6

B_DDR3_A6

A_DDR3_A7

B_DDR3_A7

A_DDR3_A8

B_DDR3_A8

A_DDR3_A9

B_DDR3_A9

A_DDR3_A10

B_DDR3_A10

A_DDR3_A11

B_DDR3_A11

A_DDR3_A12

B_DDR3_A12

A_DDR3_A13

B_DDR3_A13

A_DDR3_A14

B_DDR3_A14

A_DDR3_DQL0

B_DDR3_DQL0

A_DDR3_DQL1

B_DDR3_DQL1

A_DDR3_DQL2

B_DDR3_DQL2

A_DDR3_DQL3

B_DDR3_DQL3

A_DDR3_DQL4

B_DDR3_DQL4

A_DDR3_DQL5

B_DDR3_DQL5

A_DDR3_DQL6

B_DDR3_DQL6

A_DDR3_DQL7

B_DDR3_DQL7

A_DDR3_DQU0

B_DDR3_DQU0

A_DDR3_DQU1

B_DDR3_DQU1

A_DDR3_DQU2

B_DDR3_DQU2

A_DDR3_DQU3

B_DDR3_DQU3

A_DDR3_DQU4

B_DDR3_DQU4

A_DDR3_DQU5

B_DDR3_DQU5

A_DDR3_DQU6

B_DDR3_DQU6

A_DDR3_DQU7

B_DDR3_DQU7

A_DDR3_CASZ

B_DDR3_CASZ

A_DDR3_RASZ

B_DDR3_RASZ

A_DDR3_WEZ

B_DDR3_WEZ

A_DDR3_DQML

B_DDR3_DQML

A_DDR3_DQMU

B_DDR3_DQMU

A_DDR3_ODT

B_DDR3_ODT

A_DDR3_BA0

B_DDR3_BA0

A_DDR3_BA1

B_DDR3_BA1

A_DDR3_BA2

B_DDR3_BA2

A_DDR3_RESET

B_DDR3_RESET

A_DDR3_MCLKE

B_DDR3_MCLKE

A_DDR3_MCLK A_DDR3_MCLKZ A_DDR3_DQSL A_DDR3_DQSBL A_DDR3_DQSU A_DDR3_DQSBU

B_DDR3_MCLK B_DDR3_MCLKZ B_DDR3_DQSL B_DDR3_DQSBL B_DDR3_DQSU B_DDR3_DQSBU

IC400-*1 LGE2111C (PDP_13_None MS10)

E22

AB17

G21

AB19

F20

Y16

E24

AD15

K20

AE15

F24

AD14

J21

AB15

F23

AC16

H22 G23 L21

AA16 AB16 AD16

G25

Y18

H20

AE20

P23

Y19

L25

AC20

R24

AB18

K23

AD17

T25

AC15

J23

AE17

T24

AA19

K24

AA18

N21

AC19

P22 L22

AA17

R21

AD20

P20

AC18

R22

AE14

M22

AD18

N22

AC17

D24

AD19

B25

AE21

F22

AE18

L23

W16

D25

Y20 AA20

E25

AB22

E21

AB20

TS1DATA4/GPIO92 TS1DATA5/GPIO93 TS1DATA6/GPIO94

PCMDATA7/GPIO116

TS1DATA7/GPIO95 TS1CLK/GPIO98

PCMADR0/GPIO125

TS1VALID/GPI96

PCMADR1/GPIO124

TS1SYNC/GPIO97

Y13 AA13 AD12 AC12 W10 AB13 AC14 W13

PCMADR2/GPIO122 PCMADR3/GPIO121 PCMADR4/GPIO99 PCMADR5/GPIO101

IC400-*1 LGE2111C (PDP_13_None MS10)

F2 G1 G2 G3 H2 H3 F3 F1 H5 H4 H6

A_RX1N

AB12 TS0DATA0/GPIO77 TS0DATA1/GPIO78

PCMADR6/GPIO102

TS0DATA2/GPIO79

PCMADR7/GPIO103

TS0DATA3/GPIO80

PCMADR8/GPIO108

TS0DATA4/GPIO81

PCMADR9/GPIO110

TS0DATA5/GPIO82

PCMADR10/GPIO114

TS0DATA6/GPIO83

PCMADR11/GPIO112

TS0DATA7/GPIO84

PCMADR12/GPIO104

TS0CLK/GPIO87

PCMADR13/GPIO107

TS0VALID/GPIO85

PCMADR14/GPIO106

TS0SYNC/GPIO86

AD11

AUR1 AUL3

A_RX2P

AUR3

A_RXCN

AUL4

W9 AE11 AB11 AE12 AC13 AB14 AA11 Y11

AD7 AD8 AE8 AC8 AE6 AD6 AC5 AE5 AD5

AA2 AA1 AA3

V24 U23 T22 C7

AUR4

D7 J6 AA9 EARPHONE_OUTL

AB9

LVB1M LVB1P

PWM4/GPIO70

D1 C1

H23

AD10

H24

P25

AA10

N23

Y10 AB10 AC9 AC10

SAR0/GPIO31

LVBCKP

SAR1/GPIO32

LVB3M

SAR2/GPIO33

LVB3P

SAR3/GPIO34

LVB4M

SAR4/GPIO35

LVB4P

W25 Y24 Y25 AA24 Y23 AB24 AB23 AB25

C_RX1P

AUOUTR2

AB5

B5 B4 C4 B3

C_RX2P

C_RXCN

AUVRP

C_RXCP

AUVAG

DDCDC_CK/GPIO27

AUVRM

AA4 AA5

HOTPLUGC/GPIO21

E4 U24 C10 I2S_IN_BCK/GPIO150 I2S_IN_SD/GPIO151

PCMIRQA_N/GPIO105

B10 B9

I2S_IN_WS/GPIO149

PCMOE_N/GPIO113

PM_SPI_SDI/GPIO2

U25 D4 D5

AC24 LVA0M

PM_SPI_SDO/GPIO3

LVA0P

PM_SPI_SCZ1/GPIO_PM[6]/GPIO12

LVA1M

PM_SPI_SCZ2/GPIO_PM[10]/GPIO16

LVA1P

PM_SPI_CZ0/GPIO_PM[12]/GPIO0

LVA2M LVA2P

E2 D2

DDCDC_DA/GPIO28

PCMIOWR_N/GPIO109

L3 L2 K2 K1 K3 J2 J3

DDCA_CK/UART0_RX

LVACKM

DDCA_DA/UART0_TX

LVACKP

UART1_RX/GPIO44

LVA3M

UART1_TX/GPIO43

LVA3P

UART2_RX/GPIO64

LVA4M

UART2_TX/GPIO65

LVA4P

AC25 AD24 AD25 AC23 AD23 AD22 AC22 AD21 AC21

TN TP

R17

R18

T17

T18 U18

BIN0M BIN0P

LED0/GPIO55

SOGIN0

LED1/GPIO56

J11 P8

HSYNC0

R8 U11

N3 N2 P2 R7 R5

AE9 RIN1M

USB1_DM

RIN1P

USB1_DP

U3 U2 T2 T1

GND_1 GND_2

VDDC_3

GND_4 GND_5

VDDC_6

GND_6

VDDC_7

GND_7

VDDC_8 VDDC_9 VDDC_10 VDDC_11

GND_11 GND_12 GND_13

P18 DVDD_DDR

AA8 K4 HWRESET C6

RIN2M

IRIN/GPIO4

RIN2P

AVDD25_PGA

GND_22

GND_21

BIN2M

XOUT

GND_25

AD4

GND_26

W4 W5

AVDD_NODIE AVDD_DMPLL

PM_UART_RX/GPIO_PM[5]/GPIO11

I2S_OUT_BCK/GPIO156

PCMIORD_N/GPIO111

I2S_OUT_MCK/GPIO154 I2S_OUT_WS/GPIO155

PCMWE_N/GPIO197

AC3

PCMCD_N/GPIO130

PCMREG_N/GPIO123

AD2

B8 A8

I2C_SDAM2/DDCR_DA/GPIO71

I2C_SCKM2/DDCR_CK/GPIO72

N5 GPIO36 GPIO37

CEC/GPIO5

GPIO38 GPIO39

B6 PCM2_CD_N/GPIO135

SPDIF_IN/GPIO152

SPDIF_OUT/GPIO153

PCM2_RESET/GPIO134

AD1

PCM2_CE_N/GPIO131

SIFP

PCM2_IRQA_N/GPIO132

SIFM

AD3

AC2

GPIO40 GPIO_PM[0]/GPIO6

GPIO41

GPIO_PM[2]/GPIO8

GPIO42

GPIO_PM[4]/GPIO10

GPIO45

GPIO_PM[8]/GPIO14

GPIO46

GPIO_PM[9]/GPIO15

GPIO49

GPIO_PM[11]/GPIO17

IF_AGC NF_ALE/GPIO141

GPIO50 GPIO51

NF_WPZ/GPIO198

AB3

NF_CEZ/GPIO137

GPIO73

NF_CLE/GPIO136

GPIO74

NF_REZ/GPIO139

I2C_SCKM1/GPIO75

NF_WEZ/GPIO140

I2C_SDAM1/GPIO76

AC4 AE3

GPIO52 GPIO53

T4 T6

CVBS0 CVBS1 CVBS2

Y6 AA6 W7

AVDD_DVI_USB_MPLL

GND_31

AVDD_AU33

GND_32

VDDP

GND_33

AVDD_PLL

GND_34

R4 P5 M4 C8 C5 E6

GND_35

Y4 DVDD_NODIE

U4 VCOM

J14 T7 CVBSOUT2

J15 J16 K16

AVDD_DDR0_C

GND_38

AVDD_DDR0_D_1

GND_39

AVDD_DDR0_D_2

GND_40

AVDD_DDR0_D_3

GND_41

E3 K5 B7 K7 J5

GND_42

J17 L16 L17 M16

GPIO54

AR1218

AR1212

AR1209

AVDD_DDR1_C

GND_43

AVDD_DDR1_D_1

GND_44

AVDD_DDR1_D_2

GND_45

AVDD_DDR1_D_3

GND_46

GND_EFUSE

GND_49

GND_47

AE2

GND_48

J8 K8

R23 U5 U6 V3 V4

A_MA11 A_MA8

A-MA8

A_MRESETB

A-MRESETB A-MA2

B-MA11

A_MA2

B_MA11 OS

B-MA8

B_MA8

B-MRESETB B-MA2

B_MRESETB OS

V11 V15 V16

B_MA2

V17 V18 V19 V20 V21 W1 W2 W11

AR1220

AR1213

AR1202

AR1225

W15 W17 W18 W20 W21 W22 Y7

A-MRASB

A_MRASB A_MODT

A-MODT

A_MCASB

A-MCASB

A_MBA0

A-MBA0

B_MRASB

B-MRASB OS

B-MODT

B_MODT

B-MCASB B-MBA0

B_MCASB OS

AA7 AB6 AB7

GND_91

GND_52

GND_92

GND_53

GND_93

GND_54

GND_94

GND_55

GND_95

GND_56

GND_96

GND_57

GND_97

GND_58

GND_98

GND_59

GND_99

GND_60

GND_100

GND_61

GND_101

GND_62

GND_102

GND_63

GND_103

GND_64

GND_104

GND_65

GND_105

GND_66

GND_106

GND_67

GND_107

GND_68

GND_108

GND_69

GND_109

GND_70

GND_110

GND_71

GND_111

GND_72

GND_112

GND_73

GND_113

GND_74

GND_114

GND_75

GND_115

GND_76

GND_116

GND_77

GND_117

GND_78

GND_118

B_MBA0

GND_50 GND_51

R19 T23

A-MA11

GND_36 GND_37

TEST

AR1221

GND_28 GND_30

AA21 AB21

I2S_OUT_SD/GPIO157

GND_27 GND_29

PCMCE_N/GPIO115

GND_23 GND_24

AE4 XIN

GND_18 GND_19 GND_20

AVSS_PGA

GIN2M

SOGIN2

AVDD25_LAN AVDD2P5_DADC AVDD_MOD

AB1 AB2

GIN2P BIN2P

AB8

GND_16 GND_17

SOGIN1

GND_14 GND_15

BIN1P HSYNC1

GND_8 GND_9 GND_10

VDDC_12 AVDDLV

BIN1M

GND_3

VDDC_4 VDDC_5

U17

GIN1M

V1 V2

V10

AD9

A15 VDDC_1 VDDC_2

GIN1P

VSYNC1

PM_UART_TX/GPIO_PM[1]/GPIO7

RN RP

GIN0M GIN0P

R3 R1

AE24 AE23

RIN0M RIN0P

VSYNC0

PM_SPI_SCK/GPIO1

IC400-*1 LGE2111C (PDP_13_None MS10)

P17 M1 M2

C_RX2N

HOTPLUGD/GPIO22

IC400-*1 LGE2111C (PDP_13_None MS10)

AA23

A5 AB4 AUOUTL2

NF_RBZ/GPIO142

LVB2M LVB2P LVBCKM

V23 W23

C_RX0N C_RX0P C_RX1N

AC11

PCM_RESET/GPIO129

LVB0M LVB0P

PWM2/GPIO68 PWM3/GPIO69

DDCDA_CK/GPIO23

EARPHONE_OUTR

W24 PWM0/GPIO66 PWM1/GPIO67

PWM_PM/GPIO199

W3 Y2

DDCDA_DA/GPIO24 HOTPLUGA/GPIO19

AC7

Y22 Y3 AUL1

A_RX1P A_RX2N

A_RXCP

IC400-*1 LGE2111C (PDP_13_None MS10)

AA22

A_RX0N A_RX0P

AC6

PCM2_WAIT_N/GPIO133

M20

N24

PCMDATA4/GPIO119 PCMDATA5/GPIO118 PCMDATA6/GPIO117

AA14 AD13

Y21

K22

M23

TS1DATA2/GPIO90 TS1DATA3/GPIO91

PCMWAIT_N/GPIO100

R20 C24

TS1DATA0/GPIO88 TS1DATA1/GPIO89

PCMDATA2/GPIO128 PCMDATA3/GPIO120

Y17

G22 J22

Y14 PCMDATA0/GPIO126 PCMDATA1/GPIO127

GND_79 GND_80 GND_81 GND_82 GND_83 GND_84 GND_85 GND_86 GND_87 GND_88

AR1219

A-MA1 A-MA14

AR1215

A_MA1 A_MA14

A-MBA2 A-MA3

AR1204

A_MBA2 A_MA3

B-MA1 B-MA14

AR1208

B_MA1 OS

B_MA14

B14 B16 B18 B21 C11 C12 C13 C20 C23 C25 D23 E17 E18 E20 E23 F4 F5 F6 F7 F18 G4 G5 G6 G7 G10 G12 G15 G19 G20 G24 H7 H10 H12 H13 H14 H15 H19 H25 J1 J7 J12 J13 J19 J20 J24 K12 K13 K14 K15 K18 K19 K25 L8 L12 L13 L14 L15 L18 L19 L20 L24 M3 M8 M12 M13 M14 M15 M17 M18 M19 M24 N1 N7 N13 N14 N15 N16 N17 N18 N19 N20 N25 P13 P14 P19 P21 P24

GND_90

B_MBA2

B-MBA2 B-MA3

GND_89

A17 A20

B_MA3

GP4L_S7LR2 DDR_256

2011/06/03 12 LGE Internal Use Only

L13 T Training i i Manual(PB31A) M l(PB31A)

Table of contents

1. L13 Concept(’12 Vs. ’13) 2. L13 Power On/Off sequence 3. L13 Power Block 4. L13 I2C MAP 5. L13 Front End

LGE Internal Use Only

1. L13 Concept(’12 Vs. ’13)

42PA4500/50PA4500 50PA6500/60PA6500

42PN4500/50PN4500 50PN6500/60PN6500

3 1 S7LR3

141.5mm

1 S7LR3

4 4

2 5

206mm 1

Main processor, DDR, NAND

Tuner

LVDS Wafer

HDMI Block

Tact Key+LED+EYE+IR

206mm Jack ERRC 1) RGB ,RS-232C and PC-Audio is removed 2) Comp./Comp. Hybrid Æ Comp. Hybrid (1ea) 3) HDMI 1 Jack is removed

LGE Internal Use Only

2. Power On/Off sequence (AC) Signal

Spec.(min)

Measure

RL_On

40ms

M_On

80ms

700ms

VS_On

250ms

260ms

VS_DET

Graph

Remark

Graph

Remark

Signal

Spec.(min)

Measure

VS_On

40ms

RL_On

200ms

335ms

M_On

30ms

56ms

LGE Internal Use Only

2. Power On/Off sequence (DC) Signal

Spec.(min)

Measure

M_On

80ms

87ms

VS_On

250ms

280ms

Signal

Spec.(min)

Measure

M_On

2500ms

3000ms

RL_On

30ms

56ms

Graph

Remark

Graph

Remark

RL_On

VS_DET

LGE Internal Use Only

2. Screen On/Off sequence

Signal

Spec.(min)

Measure

VS_On

250ms

247ms

VS_DET

400ms

Signal

Spec.(min)

Measure

M_On

2530ms

2600ms

Graph

Remark

Graph

Remark

LGE Internal Use Only

3. Power Block.

17 V

Spec) 850mV↓ 20mVrms 356mVpp 17 07V 17.07V

OP-Amp OP Amp for SC

Spec) 850mV↓ 12mVrms 116mVpp L616 120 Ohm

17.07V

C680

C690

2012

0.1uF

C695

C686

C681

68uF

1uF

50V

35V

1608

8PI/6.3H

Audio AMP

LGE Internal Use Only

3. Power Block. Input

Input STBY

DTV Comp p HDMI

8.3mA 1.07A 1.12A 1.14A

L600

Spec) 250mV↓ 50Vrms 244mVpp

5.10V

2012

5.08V

Spec) 250mV↓ 69Vrms 245mVpp

p Comp

HDMI

33mA

5.07V

120 Ohm 5A

DTV

IC600 5V to 3.3V AP2121N-3.3 (0.3A)

Spec) 165mV↓ 73.58Vrms 418mVpp

+3.3V_ST

_ AVDD_NODIE L400

3.29V

120 Ohm

C604

0.1uF

1uF

1608

16V

6.3V

C608

C610

C600

C601

10uF

0.1uF

10uF

10V

16V

10V

3.29V

LM1

C401 0.1uF

RS232C

C229

Spec) 165mV↓ 73.58Vrms 164mVpp

0.1uF 16V 1005

3.29V

Serial Flash

3.29V

SUB Ass’y

C556

+5 V_ ST

0.1uF 16V

Spec) 250mV↓ 27Vrms 169mVpp5.02V

Spec) 250mV↓ 68Vrms 248mVpp L604

5.03V

120 Ohm 2A C601

5.08V Q604 MOFET ZXMP3F30 (3.0A)

Input DTV

Comp

910mA 900mA

Comp

230mA 220mA

1608

0.1uF 16V

DTV

HDMI 850mA

HDMI 220mA

Spec) 250mV↓ 88Vrms 249mVpp 5.07V C620

C621

10uF 25V

1005

Spec) 65mV↓ 17Vrms 60mVpp

Input

C547

+1.10V_Vddc _ IC603 5V to 1.23V TPS54231D (2A)

Input

0.1uF

STBY

16V

0 2mA 0.2mA

1005

1.26V

LM1 X3

0.1uF

10uF

0.1uF

1uF

50V

10V

16V

10V

2012

1005

Input DTV

Comp

HDMI

750mA 630mA 650mA

+5V

LGE Internal Use Only

3. Power Block. Spec) 250mV↓ 27Vrms 169mVpp

Spec) 125mV↓ +2 5V 16Vrms +2.5V 99mVpp

Input DTV

Comp

102mA 102mA

HDMI 102mA

L405 IC601 5V to 2.5V TJ3940S-2.5V (714mW)

5.00V C605

2.486V

2.476V

120 Ohm 2A

C612

10uF

C485

1608

10uF

10V DTV

Comp

102mA

HDMI

102mA 102mA

1005

Spec) 125mV↓ 16Vrms 99mVpp

L406

2.478V

2A C477

1608

IC604 5V to 1 1.8V 8V AP1117BH-ADJ (850mW)

C615 10uF

Spec) 90mV↓+1.8V_TU 5.6Vrms 89mVpp C631

DTV

Comp

150mA

1.81V

10uF

Input

10V

AVDD25_PGA

0.1uF

Spec) 250mV↓ 27Vrms 169mVpp 5 00V 5.00V

LM1

16V

전류안흐름??

1608

120 Ohm

+5 V

AVDD2P5

0.1uF

6.3V

Input

Spec) 125mV↓ 16Vrms 99mVpp

HDMI

164mA 164mA

16V 1005

Tuner C311 0.1uF

6.3V

16V

1608

1005

+1.25V_TU 5.00V C614 10uF 10V

IC602 5V to 1.25V AP1117EG-13 (850mW)

1.245V C625

C315

C314

10uF

0.1uF

10uF

6.3V

16V

6.3V

1608

1005

1608

T2/SBTV Tuner

LGE Internal Use Only

3. Power Block. Spec) 250mV↓ 26Vrms 169mVpp 5.02V

IC608 5.0V to 3.3V AP1117E33G (850mW)

Spec) 165mV↓ 5Vrms +3.3V 69mVpp 3.26V

L606

3.255V

Tuner

120 Ohm C617

0.1uF

10 F 10uF

1608

10V

6.3V

C616

Spec) 165mV↓ 5Vrms 69mVpp

+3.3V_TU

Input DTV

ATV

Comp

HDMI

L601

3 275V 120 Ohm 3.275V 1608

3 273V 3.273V

3.27V

16V

Spec) 165mV↓ 8Vrms 89mVpp

Input(STA380 not working)

3.26V C618

16V

DTV

Comp

HDMI

30mA

16V

Spec) 75mV↓ 7.5Vrms +1.5V_DDR 74mVpp L1202 500 Ohm 1.507V

C627

10uF

0.1uF

10uF

6.3V

10V

6.3V

Input Comp

HDMI

1.50V

Audio AMP

Spec) 75mV↓ 10Vrms 74mVpp

C1251

2012(?)

10uF

1uF

C619

C611

285mA

C672 0.1uF

30mA

IC613 3.3V to 1.5V AP1117BH-ADJ (850mW)

DTV

C677 0.1uF

Spec) 165mV↓ 7Vrms 79mVpp IC605 5.0V to 3.3V AP1117E33G (850mW)

10 F 10uF

1005

5.01V

C303

168mA 194mA 197mA 197mA

+3.3V_AMP

+5 V

C302 01 F 0.1uF

DDR

Input DTV

Comp

HDMI

140mA

85mA

185mA 185mA

L402 120 Ohm

1.50V

Spec) 75mV↓ 9.8Vrms 74mVpp

2A C432

C436

0.1uF

10uF

0.1uF

1uF

16V

10V

16V

10V

1005

2012

1005

1608

LM1

C446

Input

DTV

Comp

HDMI

145mA 105mA 105mA

LGE Internal Use Only

3. Power Block. In

Out

Current

type

17V

17V(1.1A)

5Vst

2mA

STBY

5V ST

5Vst (2mA)

5Vst

3.3Vst

35mA

ULDO 0.3A

3.3Vst(33mA)

17V

1.1A

Multi

5Vst

910mA + 1A

FET 3A

Multi

USB 1A

5Vst

1 1V 1.1V

((Input 220mA)) 750mA

DCDC 3A

1/4

2.5V

102mA

LDO 714mW

255mW

ULDO

F E T

DCDC

1 1V(750mA) 1.1V(750mA)

5V(?)

LDO

1.8V(164mA)

1.8V

164mA

LDO 850mW

525mW

LDO(T2)

1.25V(400mA)

1.25V

400mA(?)

LDO 850mW

1500mW

3.3V

300mA

LDO 850mW

510mW

3.3V

300mA

LDO 850mW

510mW

3.3V

1.5V

300mA

LDO 850mW

480mW

LDO LDO

2.5V(102mA)

3.3V(300mA)

3.3V

60mW

LDO

1.5V(300mA)

LGE Internal Use Only

4. L13 I2C MAP +3.3V_TU

I2C_SCKM1/GPIO75 I2C_SDAM1/GPIO76

AE3 AE2

TU_SCL TU_SDA

R308 1.5K

R309 1.5K

TU305 TDSN-B601F (0x) +3.3V_TU

I2C_SCKM1/GPIO75 I2C_SDAM1/GPIO76

AE3 AE2

TU_SCL TU_SDA

R308 1.5K

R309 1.5K

TU304 TDSH-T101F (0x)

+3.3V_AMP

IC400

GPIO49 GPIO50

H6 E6

AMP_SCL AMP SCL AMP_SDA

R640 4.7K

R641 4.7K

IC606 STA380BW (0x)

+3.3V

I2S_IN_WS/GPIO149 SPDIF_IN/GPIO152

B9 B6

P_SCL P_SDA

R450 3.3K

R451 3.3K

P500 LVDS (module 0 1C) 0x1C)

+3.3V

I2C_SCL I2C SDA I2C_SDA

R452 2.2K

R453 2.2K

IC503 EEPROM (0xA0)

LGE Internal Use Only

5. L13 Front End (ATSC/ISDB-T/DVB-T) Net-Cast 4.0 Low model (Mstar) use three kind of tuner as below But we apply 3ea PCB(NTSC/ISDB PCB(NTSC/ISDB-T/DVB-T), T/DVB T) for each tuner and distinguish by circuit option and tool option ATSC

ISDB-T

DVB-T

Diagram

2013 Tuner Figure Diagram 2013 Tuner Block Diagram

ATV ATSC

Si2158

DVB-S Tuner TDSS-H510F

DIF CVBS UseMstar A.Demod

L13 Mstar

SI2158: With out Analog Demod (Half NIM)

ISDB-T

DVB-T

Si2178

CVBS

DIF CVBS

Si2176

DVB-S Si2169 Demod

Tuner TDSN-B601F

TS [0] TS_

L13 Mstar

SI2178 : With Analog Demod (Full NIM) SI2169 : ISDB-T ISDB T Demod

Tuner TDSH-T101F

L13 Mstar

Si2176 : With Analog Demod (Half NIM)

SIF/IF

2012 Tuner Block Diagram

Tuner TDSS-H001F

Tuner TDSN-B001F

Tuner TDSH-T1001F

LGE Internal Use Only

5. L13 Front End (ATSC/ISDB-T/DVB-T) Use 3ea PCB for each tuner and apply different circuit option and tool option Tool option3 -USA TUNER : SI2158 DEMOD : ATSC-S7

Tool option4 ATSC KOREA/USA

-KOREA Digital Demod : ATSC_7 Digital DemodS : NO_DEMOD_S Analog Demod : MSTAR_58

Tool option4 -COLOMBIA/PANAMA Digital Demod : DVB_S7 Digital DemodS : NO_DEMOD_S Analog Demod : SI2176

Tool option4 DVB-T COLOMBIA/ PANAMA

ISDB-T Brazil/Chile/Peru Ecuador/COSTARICA

-Brazil/Chile/Peru/Ecuador/COSTARICA Digital Demod : ISDB_TC90527 Di it l DemodS Digital D dS : NO_DEMOD_S NO DEMOD S Analog Demod : SI2178

ATSC Tuner Area DVB-T Tuner Area ISDB-T Tuner Area

LGE Internal Use Only