Internal Use Only North/Latin America Europe/Africa Asia/Oceania
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LED LCD TV SERVICE MANUAL CHASSIS : LA22E
MODEL : 47LS5700/47LS579C CAUTION
47LS5700-UA/47LS579C-UA
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67460401 (1207-REV00)
Printed in Korea
CONTENTS
CONTENTS . ............................................................................................. 2 PRODUCT SAFETY ................................................................................. 3 SPECIFICATION........................................................................................ 4 ADJUSTMENT INSTRUCTION............................................................... 10 TROUBLE SHOOTING............................................................................. 20 BLOCK DIAGRAM................................................................................... 30 EXPLODED VIEW .................................................................................. 37 SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB. Keep wires away from high voltage or high temperature parts.
Do not use a line Isolation Transformer during this check. Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5 mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Before returning the receiver to the customer, always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 MΊ and 5.2 MΊ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
Copyright Š LG Electronics. Inc. All rights reserved. Only for training and service purposes
-3-
LGE Internal Use Only
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This spec sheet is applied all of the 32”, 42”, 47”, 55”, 65” LCD TV with LA22E chassis
2. Test condition
Each part is tested as below without special notice. 1) Temperature : 20 ºC ± 5 ºC 2) Relative Humidity: 65 % ± 10 % 3) Power Voltage - AC 110-240 V~, 50/60 Hz * Standard Voltage of each products is marked by models. 4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. 5) The receiver must be operated for about 5 minutes prior to the adjustment.
3. Test method
1) Performance: LGE TV test method followed 2) Demanded other specification - Safety: CE, IEC specification - EMC: CE, IEC specification - Wireless : WirelessHD Specification (Option)
4. General Specification No
Item
Specification
1
Receiving System
1) ATSC / NTSC-M
2
Available Channel
1) VHF : 02~13
Remark
2) UHF : 14~69 3) DTV : 02-69 4) CATV : 01~135 5) CADTV : 01~135 3
Input Voltage
1) AC 100 ~ 240V 50/60Hz
4
Market
NORTH AMERICA
5
Screen Size
47 inches
6
Aspect Ratio
16:9
7
Tuning System
FS
8
Module
LC470EUE-SEM1 / T470HVN01.1
9
Operating Environment
1) Temp : 0 ~ 40 deg 2) Humidity : ~ 80 %
10
Storage Environment
1) Temp : -20 ~ 60 deg 2) Humidity : ~ 85 %
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
-4-
120V, 50/60Hz on the label (USA)
LGD/AUO
LGE Internal Use Only
5. Supported video resolutions 5.1. 2D mode
5.1.1. Component Video Input (Y, CB/PB, CR/PR) No.
Resolution
H-freq(kHz)
V-freq.(kHz)
Pixel clock
Proposed
1.
720*480
15.73
60.00
13.5135
SDTV ,DVD 480I
2.
720*480
15.73
59.94
13.50
SDTV ,DVD 480I
3.
720*480
31.50
60.00
27.027
SDTV 480P
4.
720*480
31.47
59.94
27.00
SDTV 480P
5.
1280*720
45.00
60.00
74.25
HDTV 720P
6.
1280*720
44.96
59.94
74.176
HDTV 720P
7.
1920*1080
33.75
60.00
74.25
HDTV 1080I
8.
1920*1080
33.72
59.94
74.176
HDTV 1080I
9.
1920*1080
67.50
60.00
148.50
HDTV 1080P
10.
1920*1080
67.432
59.94
148.352
HDTV 1080P
11.
1920*1080
27.00
24.00
74.25
HDTV 1080P
12.
1920*1080
26.97
23.94
74.176
HDTV 1080P
13.
1920*1080
33.75
30.00
74.25
HDTV 1080P
14.
1920*1080
33.71
29.97
74.176
HDTV 1080P
5.1.2. RGB Input (PC) No.
Resolution
H-freq(kHz)
V-freq.(kHz)
Pixel clock
Proposed
1
640*350
31.468
70.09
25.17
EGA
X
2
720*400
31.469
70.08
28.32
DOS
O
3
640*480
31.469
59.94
25.17
VESA(VGA)
O
4
800*600
37.879
60.31
40.00
VESA(SVGA)
O
5
1024*768
48.363
60.00
65.00
VESA(XGA)
O
6
1152*864
54.348
60.053
7
1360*768
47.712
60.015
85.50
VESA (WXGA)
X
8
1920*1080
67.5
60.00
148.5
WUXGA(CEA861D)
O
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
-5-
VESA
LGE Internal Use Only
5.1.3. HDMI Input 1 (PC/DTV) No
Resolution
H-freq(kHz)
Pixel clock(MHz)
V-freq.(Hz)
Proposed
Remark
PC (DVI) 1
640*350
31.468
70.09
25.17
EGA
X
2
720*400
31.469
70.08
28.32
DOS
O
3
640*480
31.469
59.94
25.17
VESA(VGA)
O
4
800*600
37.879
60.31
40.00
VESA(SVGA)
O
5
1024*768
48.363
60.00
65.00
VESA(XGA)
O
6
1152*864
54.348
60.053
VESA
O
7
1280*1024
63.981
60.020
8
1360*768
47.712
60.015
85.50
9
1920*1080
67.5
60.00
148.5
VESA(SXGA) VESA (WXGA) HDTV 1080P
WUXGA(Reduced Blanking)
O
FHD only
DTV 1
720*480
31.50
60.00
27.027
SDTV 480P
2
720*480
31.47
59.94
27.00
SDTV 480P
3
1280*720
45.00
60.00
74.25
HDTV 720P
4
1280*720
44.96
59.94
74.176
HDTV 720P
5
1920*1080
33.75
60.00
74.25
HDTV 1080I
6
1920*1080
33.72
59.94
74.176
HDTV 1080I
7
1920*1080
67.50
60.00
148.50
HDTV 1080P
8
1920*1080
67.432
59.94
148.352
HDTV 1080P
9
1920*1080
27.00
24.00
74.25
HDTV 1080P
10
1920*1080
26.97
23.976
74.176
HDTV 1080P
11
1920*1080
33.75
30.00
74.25
HDTV 1080P
12
1920*1080
33.71
29.97
74.176
HDTV 1080P
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
-6-
LGE Internal Use Only
5.2. 3D mode 5.2.1. RF Input No
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
Remark
1
1920*1080
45
60
74.25
HDTV 1080I
Side by Side, Top & Bottom
2
1280*720
45
60
74.25
HDTV 720P
Side by Side, Top & Bottom
5.2.2. USB Input No 1
Resolution 1920*1080
H-freq(kHz) 33.75
V-freq.(Hz)
Pixel clock(MHz)
30.00
74.25
Proposed HDTV 1080p
Remark Side by Side, Top & Bottom, Checkerboard, MPO (Photo)
5.2.3. RGB-PC Input No 1
Resolution 1920*1080
H-freq(kHz) 66.587
V-freq.(Hz)
Pixel clock(MHz)
59.934
138.5
Proposed HDTV 1080p
Remark Side by Side, Top & Bottom
5.2.4. DLNA Input No 1
Resolution 1920*1080
H-freq(kHz) 33.75
V-freq.(Hz)
Pixel clock(MHz)
30
74.25
Proposed HDTV 1080p
Remark Side by Side, Top & Bottom, Checker board
5.2.5. HDMI 1.3 No
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Remark
1
1280*720p
45.00
60.00
74.25
Side by Side , Top & Bottom
2
1920*1080i
33.75
60.00
74.25
Side by Side , Top & Bottom
3
1920*1080p
67.50
60.00
148.50
Side by Side , Top & Bottom Checkerboard Single Frame Sequential
4
1920*1080p
27.00
24.000
74.25
Side by Side , Top & Bottom Checkerboard
5
1920*1080p
33.75
30.000
74.25
Side by Side, Top & Bottom Checkerboard
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
-7-
LGE Internal Use Only
5.2.6. HDMI 1.4a No
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
Remark
1
1280*720p
90.00
60.00
148.50
Mandatory
Frame Packing,
2
1280*720p
45.00
60.00
74.25
Mandatory
Top & Bottom
3
1920*1080i
33.75
60.00
74.25
Mandatory
Side by Side (Half)
4
1920*1080p
54.00
24.000
148.50
Mandatory
Frame Packing,
5
1920*1080p
27.00
24.000
74.25
Mandatory
Top & Bottom
6
1280*720p
45.00
60.00
74.25
Primary
Side by Side (Half)
7
1920*1080i
67.50
60.00
148.50
Primary
Frame Packing
8
1920*1080p
67.50
60.00
148.50
Primary
Top & Bottom
9
1920*1080p
27.00
24.000
74.25
Primary
Side by Side (Half)
10
1920*1080p
67.50
30.000
148.50
Primary
Frame Packing,
11
1920*1080p
33.75
30.000
74.25
Primary
Top & Bottom
12
1920*1080i
33.75
60.00
74.25
Secondary
Top & Bottom
13
1920*1080p
67.50
60.00
148.50
Secondary
Side by Side (Half)
14
1920*1080p
33.75
30.000
74.25
Secondary
Side by Side (Half)
15
720*480p
63.00
60.00
54.054
Secondary (16:9)
Frame Packing,
16
720*480p
31.50
60.00
27.027
Secondary (16:9)
Top & Bottom
17
720*480p
31.50
60.00
27.027
Secondary (16:9)
Side by Side (Half)
18
720*480p
63.00
60.00
54.054
Secondary (4:3)
Frame Packing,
19
720*480p
31.50
60.00
27.027
Secondary (4:3)
Top & Bottom
20
720*480p
31.50
60.00
27.027
Secondary (4:3)
Side by Side (Half)
21
640*480p
63.00
60.00
50.40
Secondary
Frame Packing,
22
640*480p
31.50
60.00
25.20
Secondary
Top & Bottom
23
640*480p
31.50
60.00
25.20
Secondary
Side by Side (Half)
24
1280*720p
90.00
60.00
148.50
Line Alternative
25
1280*720p
45.00
60.00
148.50
Side by Side (Full)
26
1920*1080i
67.50
60.00
148.50
Field Alternative
27
1920*1080i
33.75
60.00
148.50
Side by Side (Full)
28
1920*1080p
54.00
24.000
148.50
Line Alternative
29
1920*1080p
27.00
24.000
148.50
Side by Side (Full)
30
1920*1080p
67.50
30.000
148.50
Line Alternative
31
1920*1080p
33.75
30.000
148.50
32
720*480p
63.00
60.00
54.054
16:9
Line Alternative
33
720*480p
31.50
60.00
54.054
16:9
Side by Side (Full)
34
720*480p
63.00
60.00
54.054
4:3
Line Alternative
35
720*480p
31.50
60.00
54.054
4:3
Side by Side (Full)
36
640*480p
63.00
60.00
50.40
Line Alternative
37
640*480p
31.50
60.00
50.40
Side by Side (Full)
Copyright Š LG Electronics. Inc. All rights reserved. Only for training and service purposes
-8-
Side by Side (Full)
LGE Internal Use Only
5.3. 2D to 3D Mode
- Supports this function in all mode.
5.4. Remark: 3D Input mode No.
Side by Side
Top & Bottom
Checkerboard
Single Frame Sequential
Frame Packing
1
L
R
R
LLLLL R L
Copyright Š LG Electronics. Inc. All rights reserved. Only for training and service purposes
-9-
L
LGE Internal Use Only
ADJUSTMENT INSTRUCTION 1. Application Range
This spec. sheet applies to LA22E Chassis applied LCD TV all models manufactured in TV factory.
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. (2) Adjustment must be done in the correct order. (3) The adjustment must be performed in the circumstance of 25 ±5 °C of temperature and 65±10% of relative humidity if there is no specific designation. (4) The input voltage of the receiver must keep 100~240V, 50/60Hz. (5) The receiver must be operated for about 5 minutes prior to the adjustment when module is in the circumstance of over 15 °C I n case of keeping module is in the circumstance of 0°C, it should be placed in the circumstance of above 15°C for 2 hours I n case of keeping module is in the circumstance of below -20°C, it should be placed in the circumstance of above 15°C for 3 hours. [Caution] When still image is displayed for a period of 20 minutes or longer (especially where W/B scale is strong. Digital pattern 13ch and/or Cross hatch pattern 09ch), there can some afterimage in the black level area
4. MAIN PCBA Adjustments 4.1. ADC Calibration
- An ADC calibration is not necessary because MAIN SoC (LGE35230) is already calibrated from IC Maker - If it needs to adjust manually, refer to appendix.
4.2. M AC Address, ESN Key and Widevine Key download 4.2.1. Equipment & Condition 1) Play file: keydownload.exe
4.2.2. Communication Port connection
1) Key Write: Com 1,2,3,4 and 115200 (Baudrate) 2) Barcode: Com 1,2,3,4 and 9600 (Baudrate)
4.2.3. Download process
1) Select the download items. 2) Mode check: Online Only 3) Check the test process - U S, Canada models: DETECT -> MAC_WRITE -> WIDEVINE_WRITE - K orea, Mexico models: DETECT -> MAC_WRITE -> WIDEVINE_WRITE 4) Play : START 5) Check of result: Ready, Test, OK or NG
4.2.4. Communication Port connection
1) Connect: PCBA Jig -> RS-232C Port == PC -> RS-232C Port
3. Adjustment items
3.1. Main PCBA Adjustments
(1) ADC adjustment: Component 480i, 1080p / RGB-PC 1080p (2) EDID downloads for HDMI and RGB-PC
3.2. Final assembly adjustment (1) White Balance adjustment (2) RS-232C functionality check (3) Factory Option setting per destination (4) Shipment mode setting (IN-STOP) (5) GND and HI-POT test
3.3. Appendix
(1) Tool option menu, USB Download (S/W Update, Option and Service only) (2) Manual adjustment for ADC calibration and White balance. (3) Shipment conditions, Channel pre-set
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 10 -
LGE Internal Use Only
4.2.5. Download
1) U S, Canada, Mexico models (11Y LCD TV + MAC + Widevine + ESN Key)
4.3. LAN PORT INSPECTION(PING TEST) 4.3.1. Equipment setting
1) Play the LAN Port Test PROGRAM. 2) Input IP set up for an inspection to Test Program. *IP Number : 12.12.2.2.
4.3.2. LAN PORT inspection (PING TEST)
2) K orea and Philippine models (11Y LCD TV + MAC + Widevine Only)
1) Play the LAN Port Test Program. 2) connect each other LAN Port Jack. 3) Play Test (F9) button and confirm OK Message. 4) remove LAN CABLE
4.2.6. Inspection
- In INSTART menu, check these keys.
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 11 -
LGE Internal Use Only
4.4. EDID Download
ⓔ Checksum(LG TV): Changeable by total EDID data.
4.4.1. Overview
ⓔ1
- It is a VESA regulation. A PC or a MNT will display an optimal resolution through information sharing without any necessity of user input. It is a realization of “Plug and Play”.
4.4.2. Equipment
(1) S ince EDID data is embedded, EDID download JIG, HDMI cable and D-sub cable are not need. (2) Adjust by using remote controller.
4.4.3. Download method
(1) Press Adj. key on the Adj. R/C, (2) Select EDID D/L menu. (3) By pressing Enter key, EDID download will begin (4) I f Download is successful, OK is display, but If Download is failure, NG is displayed. (5) If Download is failure, Re-try downloads. ※Caution: When EDID Download, must remove RGB/HDMI Cable.
ⓔ2
ⓔ3
HDMI1
43
F2
X
HDMI2
43
E2
X
HDMI3
43
D2
X
HDMI4
43
C2
X
RGB
X
X
5C
ⓕ Vendor Specific(HDMI) INPUT
MODEL NAME(HEX)
HDMI1
67 03 0C 00 10 00 80 2D
HDMI2
67 03 0C 00 20 00 80 2D
HDMI3
67 03 0C 00 30 00 80 2D
HDMI4
67 03 0C 00 40 00 80 2D
4.4.4.2. 3D PCM(US) _ XvYcc : 0n
4.4.4. EDID DATA
4.4.4.1. 2D PCM(US) _ XvYcc : 0n
ⓐ Product ID
▪Reference - HDMI1 ~ HDMI4 / RGB - In the data of EDID, bellows may be different by S/W or Input mode. ⓐ Product ID
HEX
EDID Table
DDC Function
0001
0100
Analog
0001
0100
Digital
ⓑ Serial No: Controlled on production line. ⓒ Month, Year: Controlled on production line: ex) Monthly : ‘01’ -> ‘01’ Year : ‘2012’ -> ‘16’ ⓓ Model Name(Hex): LGTV
HEX
EDID Table
DDC Function
Chassis
MODEL NAME(HEX)
0001
0100
Analog
LA22E
00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
0001
0100
Digital
ⓔ Checksum(LG TV): Changeable by total EDID data.
ⓑ Serial No: Controlled on production line. ⓒ Month, Year: Controlled on production line: ex) Monthly : ‘01’ -> ‘01’ Year : ‘2012’ -> ‘16’ ⓓ Model Name(Hex): LGTV
ⓔ1
ⓔ2
ⓔ3
HDMI1
43
64
X
HDMI2
43
54
X
HDMI3
43
44
X
Chassis
MODEL NAME(HEX)
HDMI4
43
34
X
LA22E
00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
RGB
X
X
5C
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 12 -
LGE Internal Use Only
ⓕ Vendor Specific(HDMI) INPUT
ⓕ Vendor Specific(HDMI)
MODEL NAME(HEX)
INPUT
MODEL NAME(HEX)
HDMI1
78 03 0C 00 10 00 80 2D 20 C0 0E 01 4F 00 FE 08 10 06 10 18 10 28 10 38 10
HDMI1
67 03 0C 00 10 00 80 2D
HDMI2
78 03 0C 00 20 00 80 2D 20 C0 0E 01 4F 00 FE 08 10 06 10 18 10 28 10 38 10
HDMI2
67 03 0C 00 20 00 80 2D
HDMI3
67 03 0C 00 30 00 80 2D
HDMI3
78 03 0C 00 30 00 80 2D 20 C0 0E 01 4F 00 FE 08 10 06 10 18 10 28 10 38 10
HDMI4
67 03 0C 00 40 00 80 2D
HDMI4
78 03 0C 00 40 00 80 2D 20 C0 0E 01 4F 00 FE 08 10 06 10 18 10 28 10 38 10
4.4.4.4. 3D PCM(US) _XvYcc : off
4.4.4.3. 3D PCM(US) _ XvYcc : 0ff
ⓐ Product ID ▪Reference - HDMI1 ~ HDMI4 / RGB - In the data of EDID, bellows may be different by S/W or Input mode. ⓐ Product ID HEX
EDID Table
DDC Function
0001
0100
Analog
0001
0100
Digital
ⓑ Serial No: Controlled on production line. ⓒ Month, Year: Controlled on production line: ex) Monthly : ‘01’ -> ‘01’ Year : ‘2012’ -> ‘16’ ⓓ Model Name(Hex): LGTV
HEX
EDID Table
DDC Function
0001
0100
Analog
0001
0100
Digital
ⓑ Serial No: Controlled on production line. ⓒ Month, Year: Controlled on production line: ex) Monthly : ‘01’ -> ‘01’ Year : ‘2012’ -> ‘16’ ⓓ Model Name(Hex): LGTV Chassis
MODEL NAME(HEX)
LA22E
00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
ⓔ Checksum(LG TV): Changeable by total EDID data. ⓔ1
ⓔ2
ⓔ3
HDMI1
43
68
X
Chassis
MODEL NAME(HEX)
HDMI2
43
58
X
LA22E
00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
HDMI3
43
48
X
HDMI4
43
38
X
RGB
X
X
5C
ⓔ Checksum(LG TV): Changeable by total EDID data. ⓔ1
ⓔ2
ⓔ3
HDMI1
43
B5
X
HDMI2
43
A5
X
INPUT
HDMI3
43
95
X
HDMI1
HDMI4
43
85
X
78 03 0C 00 10 00 80 2D 20 C0 0E 01 4F 00 FE 08 10 06 10 18 10 28 10 38 10
RGB
X
X
5C
HDMI2
78 03 0C 00 20 00 80 2D 20 C0 0E 01 4F 00 FE 08 10 06 10 18 10 28 10 38 10
HDMI3
78 03 0C 00 30 00 80 2D 20 C0 0E 01 4F 00 FE 08 10 06 10 18 10 28 10 38 10
HDMI4
78 03 0C 00 40 00 80 2D 20 C0 0E 01 4F 00 FE 08 10 06 10 18 10 28 10 38 10
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
ⓕ Vendor Specific(HDMI)
- 13 -
MODEL NAME(HEX)
LGE Internal Use Only
5. Final Assembly Adjustment
5.1.4. Adjustment Command (Protocol) (1) RS-232C Command used during auto-adj.
5.1. White Balance Adjustment
RS-232C COMMAND
5.1.1. Overview
5.1.1.1. W/B adj. Objective & How-it-works (1) Objective: To reduce each Panel’s W/B deviation (2) H ow-it-works: When R/G/B gain in the OSD is at 192, it means the panel is at its Full Dynamic Range. In order to prevent saturation of Full Dynamic range and data, one of R/G/B is fixed at 192, and the other two is lowered to find the desired value. (3) Adj. condition: normal temperature - Surrounding Temperature: 25±5 °C - Warm-up time: About 5 Min - Surrounding Humidity: 20% ~ 80% - Before White balance adjustment, Keep power on status, don’t power off 5.1.1.2. Adj. condition and cautionary items (1) L ighting condition in surrounding area surrounding lighting should be lower 10 lux. Try to isolate adj. area into dark surrounding. (2) P robe location: Color Analyzer (CA-210) probe should be within 10cm and perpendicular of the module surface (80°~ 100°) (3) Aging time - A fter Aging Start, Keep the Power ON status during 5 Minutes. - In case of LCD, Back-light on should be checked using no signal or Full-white pattern.
00
Begin White Balance adj.
Wb
00
ff
End White Balance adj. (internal pattern disappears )
Warm
Command (lower caseASCII)
Data Range (Hex.)
CMD1
CMD2
MIN
MAX
R Gain
j
g
00
C0
G Gain
j
h
00
C0
B Gain
j
i
00
C0
R Gain
j
a
00
C0
G Gain
j
b
00
C0
B Gain
j
c
00
C0
R Gain
j
d
00
C0
G Gain
j
e
00
C0
B Gain
j
f
00
C0
5.1.5. Adjustment method
5.1.5.1 Auto WB calibration (1) Set TV in ADJ mode using P-ONLY key (or POWER ON key) (2) Place optical probe on the center of the display - I t need to check probe condition of zero calibration before adjustment. (3) Connect RS-232C Cable (4) Select mode in ADJ Program and begin a adjustment. (5) When WB adjustment is completed with OK message, check adjustment status of pre-set mode (Cool, Medium, Warm) (6) Remove probe and RS-232C cable. ▪ W/B Adj. must begin as start command “wb 00 00” , and finish as end command “wb 00 ff”, and Adj. offset if need
5.1.6. Reference (White Balance Adj. coordinate and color temperature) (1) Luminance: 204 Gray, 80IRE (2) Standard color coordinate and temperature using CS-1000 (over 26 inch)
RS-232C ※
00
Medium
Computer RS-232C
Wb
Cool
5.1.3. Equipment connection
RS-232C
ID
Adj. item
(1) C olor Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED: CH14) (2) A dj. Computer (During auto adj., RS-232C protocol is needed) (3) Adjust Remocon (4) V ideo Signal Generator MSPG-925F 720p/204-Gray (Model: 217, Pattern: 49) ※ Color Analyzer Matrix should be calibrated using CS-1000
Color Analyzer
DATA
(2) Adjustment Map
5.1.2. Equipment
Probe
Explanation
CMD
Pattern Generator
Signal Source ※If TV internal pattern is used, not needed
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 14 -
LGE Internal Use Only
5.1.7. Reference (White Balance Adj. coordinate and color temperature)
▪ Luminance: 204 Gray ▪ Standard color coordinate and temperature using CS-1000 (over 26 inch) Mode
Coordinate X
Y
Temp
Cool
0.269
0.273
13,000K
0.0000
0.285
0.293
9,300K
0.0000
Warm
0.313
0.329
6,500K
0.0000
(1) Tool option selection is only done for models in Non-USA North America due to rating (2) A pplied model: LA02D and LA02E Chassis applied to CANADA and MEXICO
5.2.2. Country Group selection
▪ S tandard color coordinate and temperature using CA-210(CH 14) (1) LGD and 65”AUO Coordinate
5.2.1. Overview
△uv
Medium
Mode
5.2. T ool Option setting & Inspection per countries
Temp
△uv
X
Y
Cool
0.269±0.002
0.273±0.002
13,000K
0.0000
Medium
0.285±0.002
0.293±0.002
9,300K
0.0000
Warm
0.313±0.002
0.329±0.002
6,500K
0.0000
(1) Press ADJ key on the Adj. R/C, and then select Country Group Menu (2) Depending on destination, select KR or US, then on the lower Country option, select US, CA, MX. Selection is done using +, - KEY
5.2.3. Tool Option Inspection
(1) Press ADJ key on the Adj. R/C, and then select Country Grou
(2) O/S Module(AUO, CMI, Sharp,IPS…) Coordinate
Mode
Tool 1
Tool 2
Tool 3
Tool 4
Tool 5
Tool 6
Tool 7
356
8259
9997
13006
21015
1322
8971
42LS5700UA(AUO)
4454
8259
9997
13006
21143
1322
13067
42LS5700-UA
358
8259
9997
13004
21015
1322
13067
47LS5700UA(AUO)
4455
8259
9997
13006
21143
1322
12555
47LS5700-UA
359
8259
9997
13004
21015
1322
12555
4457
8259
9997
13006
21143
1321
12555
Temp
△uv
0.276±0.002
13,000K
0.0000
0.287±0.002
0.296±0.002
9,300K
0.0000
55LS5700UA(AUO)
0.315±0.002
0.332±0.002
6,500K
0.0000
55LS5700-UA
361
8259
9997
13004
21015
1321
12555
60LS5700UA(Sharp)
39274
8259
9997
13006
21015
1321
12555
42LS5750-UB
358
8259
9997
13004
21015
1322
13067
42LS5750UB(AUO)
4454
8259
9997
13006
21143
1322
13067
47LS5750-UB
359
8259
9997
13004
21015
1322
12555
47LS5750UB(AUO)
4455
8259
9997
13006
21143
1322
12555
55LS5750-UB
361
8259
9997
13004
21015
1321
12555
55LS5750UB(AUO)
4457
8259
9997
13006
21143
1321
12555
60LS5750UB(Sharp)
39274
8259
9997
13006
21015
1321
12555
32LM6200-UE
116
8259
26381
13006
23063
1322
8971
X
Y
Cool
0.271±0.002
Medium Warm
▪ S tandard color coordinate and temperature using CA-210(CH-14) – by aging time (1) Only Kumi factory in Korea
(2) Other factories(Only LS5700 series Module & 65LM6200-UA) GP4
Model 32LS5700-UA
Aging time (Min)
Cool
Medium
Warm
X
Y
X
Y
X
Y
42LM6200-UE
118
8259
26381
13004
23063
1322
13067
269
273
285
293
313
329
47LM6200-UE
119
8259
26381
13004
23063
1322
12555
1
0-2
280
287
296
307
320
337
55LM6200-UE
121
8259
26381
13004
23063
1321
12555
2
3-5
279
285
295
305
319
335
65LM6200-UB
36987
8259
26381
13006
23063
1321
12427
3
6-9
277
284
293
304
317
334
42LM6210-UD
118
8259
26381
13004
23063
1322
13067
4
10-19
276
283
292
303
316
333
47LM6210-UD
119
8259
26381
13004
23063
1322
12555
5
20-35
274
280
290
300
314
330
47LM6250-UD
119
8259
26381
13004
23063
1322
12555
55LM6250-UD
121
8259
26381
13004
23063
1321
12555
6
36-49
272
277
288
297
312
327
7
50-79
271
275
287
295
311
325
8
80-119
270
274
286
294
310
324
9
Over 120
269
273
285
293
309
323
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
● Tool option can be reconstructed by Software
- 15 -
LGE Internal Use Only
5.3. Local Dimming Inspection
(1) P ress ‘TILT” key of the Adj. R/C and check moving patterns. The black bar patterns moves from top to bottom. I f a local dimming function does not work, a whole screen shows full white.
5.5. Magic Motion remote controller Check 5.5.1. Test equipment
▪ R F-remote controller for check, IR-KEY-CODE remote controller. ▪ Check AA battery before test. A recommendation is that a tester change battery every lots.
5.5.2. Test
(1) Make pairing with TV set by pressing “Start key(Wheel key)” on RCU. (2) Check a cursor on screen by pressing ‘Wheel key” of RCU (3) Stop paring with TV set by pressing “Back+ Home” key of RCU
<T120 Model>
5.5.3. Applied models Chassis
Model Name
Magic RF receiver
LA22E
32/42/47/55LS5700-UA
Built-in
42/47/55/65LM6200-UA 32/42/47/55LS5700-UA 42/47/55LM6700-UA 47/55LM7600-UA
<T240 Model> ※ Except No local-dimming models
※ LW5700-UE series: An USB dongle-type receiver will be supplied in form of accessory. So this pairing test is not necessary for these models.
5.4. EYE-Q Check
Step 1) Turn on the TV.. Step 2) P ress 'EYE button' on the adjustment remotecontroller. Step 3) Cover 'Eye Q sensor' on the front of set with your hands, hold it for 6 seconds. Step 4) Check "the Sensor Data" on the screen, make certain that Data is below 10. If Data isn’t below 10 in 6 seconds, Eye Q sensor would be bad. You should change Eye Q sensor. Step 5) Uncover your hands from Eye Q sensor, hold it for 6 seconds. Step 6) Check "Back Light(xxx)" on the screen, check data increase . You should change Eye Q sensor.
<Step 2>
<Step 4>
5.6. Wi-Fi MAC Address Check 5.6.1. Using RS232 Command Transmission
Command
Set ACK
[A][l][][Set ID][][20][Cr]
[O][K][x] or [N][G]
5.6.2. Check the menu on in-start
<Step 3>
<Step 5>
<Step 6>
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 16 -
LGE Internal Use Only
5.7. 3D pattern test (Only for 3D models)
5.8. HDMI ARC Function Inspection
5.7.1. Test equipment
(1) P attern Generator MSHG-600 or MSPG-6100 (HDMI 1.4 support) (2) Pattern: HDMI mode (model No. 872, pattern No. 83)
5.7.2. Test method
5.8.1. Test equipment
- Optic Receiver Speaker - MSHG-600 (SW: 1220 ↑) - HDMI Cable (for 1.4 version)
5.8.2. Test method
(1) Input 3D test signal as Fig.1.
(1) Insert the HDMI Cable to the HDMI ARC port from the master equipment (HDMI1)
(2) Check the sound from the TV Set
(2) Press ‘OK” key as a 3D input OSD is shown. (3) C heck pattern as Fig2 without 3D glasses. (3D mode without 3D glasses)
(3) Check the Sound from the Speaker or using AV & Optic TEST program (It’s connected to MSHG-600) Fig.2 Fig.3 <OK in 3D mode without 3D glasses> <NG in 3D mode without 3D glasses>
* Remark: Inspect in Power Only Mode and check SW version in a master equipment
5.9. Ship-out mode check (In-stop)
▪ After final inspection, press In-Stop key of the Adj. R/C and check that the unit goes to Stand-by mode
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 17 -
LGE Internal Use Only
6. AUDIO output check
8. USB S/W Download (optional, Service only)
6.1. Audio input condition
(1) RF input: Mono, 1KHz sine wave signal, 100% Modulation (2) CVBS, Component: 1KHz sine wave signal (0.4Vrms) (3) RGB PC: 1KHz sine wave signal (0.7Vrms)
(1) Put the USB Stick to the USB socket (2) Automatically detecting update file in USB Stick - If your downloaded program version in USB Stick is lower than that of TV set, it didn’t work. Otherwise USB data is automatically detected. (3) Show the message “Copying files from memory”
6.2. Specification No
Item
Min
Typ
Max
Unit
Remark
1
Audio practical max Output, L/R
9.0 8.5
10.0 8.9
12.0 9.9
W (1) Measurement Vrms condition -E Q/AVL/Clear Voice: Off (2) Speaker (8Ω Impedance)
7. GND and HI-POT Test
(4) Updating is staring.
7.1. GND & HI-POT auto-check preparation
(1) C heck the POWER CABLE and SIGNAL CABE insertion condition
7.2. GND & HI-POT auto-check
(1) P allet moves in the station. (POWER CORD / AV CORD is tightly inserted) (2) Connect the AV JACK Tester. (3) Controller (GWS103-4) on. (4) GND Test (Auto) - If Test is failed, Buzzer operates. - If Test is passed, execute next process (Hi-pot test). (Remove A/V CORD from A/V JACK BOX) (5) HI-POT test (Auto) - If Test is failed, Buzzer operates. - If Test is passed, GOOD Lamp on and move to next process automatically.
7.3. Checkpoint
(1) Test voltage - GND: 1.5KV/min at 100mA - SIGNAL: 3KV/min at 100mA (2) TEST time: 1 second (3) TEST POINT - GND Test = POWER CORD GND and SIGNAL CABLE GND. - Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL. (4) LEAKAGE CURRENT: At 0.5mArms
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 18 -
(5) Updating Completed, The TV will restart automatically (6) If your TV is turned on, check your updated version and Tool option. * If downloading version is more high than your TV have, TV can lost all channel data. In this case, you have to channel recover. If all channel data is cleared, you didn’t have a DTV/ ATV test on production line. * After downloading, TOOL OPTION setting is needed again. (1) Push "IN-START" key in service remote controller. (2) Select "Tool Option 1" and Push “OK” button. (3) Punch in the number. (Each model has their number.)
LGE Internal Use Only
9. Optional adjustments
9.2. Manual White balance Adjustment 9.2.1. Adj. condition and cautionary items
9.1. Manual ADC Calibration
(1) Lighting condition in surrounding area surrounding lighting should be lower 10 lux. Try to isolate adj. area into dark surrounding. (2) Probe location: Color Analyzer (CA-210) probe should be within 10cm and perpendicular of the module surface (80°~ 100°) (3) Aging time ▪ A fter Aging Start, Keep the Power ON status during 5 Minutes. ▪ In case of LCD, Back-light on should be checked using no signal or Full-white pattern.
9.1.1. Equipment & Condition
(1) Adjustment Remocon (2) 8 01GF (802B, 802F, 802R) or MSPG925FA Pattern Generator - Resolution : 4 80i Comp1 (MSPG-925FA: model-209, pattern-65) - Resolution : 1 080p Comp1 (MSPG-925FA: model-225, pattern-65) - Resolution : 1 080p RGB (MSPG-925FA: model-225, pattern-65) - Pattern : Horizontal 100% Color Bar Pattern - Pattern level : 0.7±0.1 Vp-p
9.2.2. Equipment
(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED: CH14) (2) A dj. Computer (During auto adj., RS-232C protocol is needed) (3) Adjust Remocon (4) V ideo Signal Generator MSPG-925F 720p/216-Gray (Model: 217, Pattern: 78)
9.1.2. Adjust method
8.1.2.1 ADC 480i/1080p Comp1, RGB (1) C heck connected condition of Comp1/RGB cable to the equipment (2) G ive a 480i Mode, Horizontal 100% Color Bar Pattern to Comp1. (MSPG-925FA -> Model: 209, Pattern: 65) (3) C hange input mode as Component1 and picture mode as “Standard” (4) P ress the In-start Key on the ADJ remote after at least 1 min of signal reception. Then, select 7.External ADC. And Press OK or Right Button for going to sub menu. (5) Press OK in Comp 480i menu (6) G ive a 1080p Mode, Horizontal 100% Color Bar Pattern to Comp1. (MSPG-925FA -> Model: 225, Pattern: 65) (7) Press OK in Comp 1080p menu (8) Perform (6) and (7) in RGB-PC (9) I f ADC Comp is successful, “ADC Component Success” is displayed. If ADC calibration is failure, “ADC Component Fail” is displayed. (10) I f ADC calibration is failure, after rechecking ADC pattern or condition, retry calibration (11) I f ADC RGB calibration is successful, “ADC RGB Success” is displayed. If ADC calibration is failure, “ADC RGB Fail” is displayed. (12) I f ADC calibration is failure, after recheck ADC pattern or condition, retry calibration
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
9.2.3. Adjustment
- 19 -
(1) Set TV in Adj. mode using POWER ON (2) Zero Calibrate the probe of Color Analyzer, then place it on the center of LCD module within 10cm of the surface. (3) Press ADJ key -> EZ adjust using adj. R/C -> 6. WhiteBalance then press the cursor to the right (KEY►). W hen KEY(►) is pressed 216 Gray internal pattern will be displayed. (4) One of R Gain / G Gain / B Gain should be fixed at 192, and the rest will be lowered to meet the desired value. (5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of color temperature. ▪ If internal pattern is not available, use RF input. In EZ Adj. menu 6.White Balance, you can select one of 2 Test-pattern: ON, OFF. Default is inner(ON). By selecting OFF, you can adjust using RF signal in 216 Gray pattern.
LGE Internal Use Only
TROUBLE SHOOTING 1. Power-up boot check Check stand-by Voltage. P2400 9~12pin : +3.5V_ST
No
Check Power connector
ok
Main B/D 3.5V Line Short Check
ok
Replace Power board.
ok Check Micom Voltage IC3000 48Pin : +3.5V
No
Check L2402
ok No Check X300 clock 32.768 KHz
Replace X300
ok Check P2400 PWR_ON. 1pin : 3.3V
No
No Re-download software.
Replace Micom (IC3000) or Main board
ok Check Multi Voltage P2400 2,3,4pin:24V 17,19,21pin:12V
No Replace Power Board
ok Check IC Input & Output Voltage IC2404 : Input 12V, Output 5V IC2400 : Input 12V, Output 1.2V IC2403 : Input 3.5V, Output 1.5V IC2405 : Input 12V, Output 3.3V IC6503 : Input 3.3V, Output 1.8V
No Replace IC2400,2403, 2404,2405,6503
ok Check LVDS Power Voltage Q2407 : 12V
No
Replace Q2407
ok Check Mstar LVDS Output
No
Replace LGE2112(IC105) or Main Board
ok Check Inverter Control P2400 18 pin : High
No Check Power Board or Module
ok Change Module
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 20 -
LGE Internal Use Only
2. Digital TV Video Check RF Cable & Signal
ok No Check Tuner 3.3V Power L6503
Replace L6503
ok Check Tuner 1.8V Power IC6503 2 pin : 1.8V
No Replace IC6503
ok Check IF_P/N Signal TU6500 10/11 Pin
No Bad Tuner. Replace Tuner.
ok Check Mstar LVDS Output
No Replace LGE2112(IC105) or Main Board.
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 21 -
LGE Internal Use Only
3. Analog TV Video Check RF Cable & Signal
ok No Check Tuner 3.3V Power L6503
Replace L6503
ok Check Tuner 1.8V Power IC6503 2 pin : 1.8V
No Replace IC6503 .
ok Check CVBS Signal TU3700 8 Pin
No Bad Tuner. Replace Tuner.
ok
Check Mstar LVDS Output
No
Replace LGE2112(IC105) or Main Board.
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 22 -
LGE Internal Use Only
4. AV Video Check input signal format. Is it supported?
ok Check AV Cable for damage for damage or open conductor
ok Check JK3800 CVBS Signal Line R341
No Replace Jack
ok Check CVBS_DET Signal
No
Replace R3801
ok Check Mstar LVDS Output
No
Replace LGE2112(IC105) or Main Board.
5. Component Video Check input signal format. Is it supported?
ok Check Component Cable for damage or open conductor.
ok Check JK3801 Y/PB/PR signal Line
No Replace Jack
ok Check COMP_DET Signal
No
Replace R3806
ok Check Mstar LVDS Output
No
Replace LGE2112(IC105) or Main Board.
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 23 -
LGE Internal Use Only
6. RGB Video Check input signal format. Is it supported?
ok Check RGB Cable conductors for damage or open conductor
ok Check EDID I2C Signal R3643, R3644(SCL,SDA)
No Replace LGE2112(IC105) or Main Board
ok Check JK3603 H/V_Sync/R/G/B Signal Line
No
Replace Jack
ok
Check DSUB_DET
No
Replace Jack
ok
Check Mstar LVDS Output
No
Replace LGE2112(IC105) or Main Board
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 24 -
LGE Internal Use Only
7. HDMI Video Check input signal format. Is it supported?
ok Check HDMI Cable conductors for damage or open conductor.
ok Check EDID I2C Signal R3308,R3309,R3314,R3315, R3328,R3329,R3302,R3303
No Replace LGE2112(IC105) or Main Board
ok Check JK3300, JK3301, JK3302 JK3303
No
Replace Jack
ok Check HDMI_DET(HPD)
No
Check Several component Q3300,Q3301,Q3302,Q3303
No
Replace LGE2112(IC105) or Main Board
ok Check HDMI Signal
No
Check other set If no problem, check signal line
No
Replace Main Board
ok
Check Mstar LVDS Output
No
Replace LGE2112(IC105) or Main Board
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 25 -
LGE Internal Use Only
8. All Source Audio Check the TV Speaker Menu (Menu -> Sound -> TV Speaker)
Off Toggle the Menu
On Check AMP IC(IC5400) Power 24V, 3.3V
No
Replace Amp IC(IC5400)
ok Check Mstar AUDIO_MASTER_CLK R368
No Replace LGE2112(IC105) or Main Board
ok Check AMP I2C Line R5402,R5403
No Check signal line. Or replace LGE2112(IC105)
ok Check Mstar I2S Output IC5400 9,10,11 Pin
No Check signal line. Or replace LGE2112(IC105)
ok Check Output Signal P5400 1, 2, 3, 4 pin.
No
Replace Audio AMP IC(IC5400)
ok
Check Connector & P5400
No
Replace connector if found to be damaged.
ok Check speaker resistance and connector damage.
No
Replace speaker.
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 26 -
LGE Internal Use Only
9. Digital TV Audio Check RF Cable & Signal
ok Check Tuner 3.3V Power L6503
No Replace L6503
ok Check Tuner 1.8V Power IC6503 2 pin : 1.8V
No Replace IC6503
ok Check IF_P/N Signal TU6500 10/11 Pin
No Bad Tuner. Replace Tuner.
ok Follow procedure ‘8. All source audio’ trouble shooting guide.
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 27 -
LGE Internal Use Only
10. Analog TV Audio Check RF Cable & Signal
ok Check Tuner 3.3V Power L6503
No Replace L6503
ok Check Tuner 1.8V Power IC6503 2 pin : 1.8V
No Replace IC6503
ok Check CVBS Signal TU3700 8 Pin
No Bad Tuner. Replace Tuner.
ok Follow procedure ‘8. All source audio’ trouble shooting guide.
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 28 -
LGE Internal Use Only
DVB-S
Air/ Cable
TUNER (S2)
TUNER (T/C)
LNB
DIGITAL DEMOD (S2)
DIGITAL DEMOD (T/C)
ANALOG DEMOD
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 29 RS-232C
LAN
OPTIC
PC-AUDIO
PC-RGB
HDMI4
HDMI3
HDMI2
HDMI1
USB3 USB_WIFI
USB1 USB2
IF(+/-)
P_TS
Rear
Side
P_TS
CVBS
P_TS
CI slot
Ethernet
(HDCP
SYSTEM DDR3 X 1600 X 16 (2Gb)
UART
I2C
IR
UART
SPI
I2S Out
EPI
LVDS
CONTROLER A/B
DDR
SYSTEM DDR3 X 1600 X 16 (2Gb)
MTK
EEPROM)
SPDIF OUT
L/R In
RGB,H/V
HDMI MUX
USB
TS_S/P
CVBS
T/C Demod
X_TAL 27MHz
Power load
Remote Control
M-Remote Module
LOCAL DIMMING
(NTP7500 or STA)
Audio AMP
Sub Micom (RENESASA)
50P 50P
51P 41P
eMMC X 1 (4GB)
SYSTEM EEPROM X 1 (256Kb)
SYSTEM DDR3 X 1600 X 16 (2Gb)
SYSTEM DDR3 X 1600 X 16 (2Gb)
756 Mhz
BLOCK DIAGRAM
1. MTK Block Diagram (ATSC)
LGE Internal Use Only
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 30 -
COMP 1 PHONE JACK
COMP1_DET
COMP1_Y/Pb/Pr
DTV/MNT_L_OUT DTV/MNT_R_OUT
DTV/MNT_V_OUT
SC_CVBS_IN
SC_ID
SC_FB
SC_L/R_IN
SC_DET
SC_R/G/B +
Full Scart(18 Pin Gender)
IC6000 AZ4580M [AUOUTR0]
[OPCTRL9]
[Y1P],[PB1P],[PR1P]
[AUOUTL0]
[SCART_LOUT] [SCART_ROUT]
[VDACX_OUT] [VDACY_OUT]
[CVBS2P]
[ADIN0_SRV]
[SOY0]
[AIN0_L_ADDC] [AIN0_R_AADC]
[OPCTRL8]
[PR0P],[PB0P],[Y0P]
[VSYNC], [HSYNC]
[RP],[GP],[BP]
[VGA_SDA]
[VGA_SCL]
[OPCTRL7]
[AIN2_R_AADC]
[AIN2_L_AADC]
[AL0_ADAC] [AR0_ADAC
[CVBS0P] [AIN3_L_AADC] [AIN3_R_AADC] [OPCTRL5]
[ASPDIF0] [SPDIF_OUT]
Main SoC MTK
IC6100 TPA6132A2
DSUB_VSYNC, DSUB_HSYNC
DSUB_R+, DSUB_G+, DSUB_B+
RGB_DDC_SDA
RGB_DDC_SCL
DSUB_DET
PC_R_IN
PC_L_IN
HP_ROUT_MAIN
HP_LOUT_MAIN
AV1_CVBS_IN AV1_L_IN AV1_R_IN AV1_CVBS_DET
SPDIF
HP_ROUT_AMP
RGB_PC
PC AUDIO
EARPHONE JACK
CVBS 1 PHONE JACK
HP_LOUT_AMP
SPDIF_OUT
2. Jack Interface
LGE Internal Use Only
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
[HDMI_1_SCL] [HDMI_1_SDA]
- 31 -
RENESAS MICOM
HDMI_CEC
Q3001
CK+/-_HDMI4_JACK, D0+/-_HDMI4_JACK, D1+/-_HDMI4_JACK, D2+/-_HDMI4_JACK
DDC_SDA_4_JACK
DDC_SCL_4_JACK
CK+/-_HDMI3_JACK, D0+/-_HDMI3_JACK, D1+/-_HDMI3_JACK, D2+/-_HDMI3_JACK
DDC_SDA_3_JACK
DDC_SCL_3_JACK
CK+/-_HDMI2_JACK, D0+/-_HDMI2_JACK, D1+/-_HDMI2_JACK, D2+/-_HDMI2_JACK
DDC_SDA_2_JACK
DDC_SCL_2_JACK
CK+/-_HDMI1_SOC, D0+/-_HDMI1_SOC, D1+/-_HDMI1_SOC, D2+/-_HDMI1_SOC
HDMI_ARC
DDC_SDA_1_SOC
DDC_SCL_1_SOC
CEC_REMOTE
[CEC]
[HDMI_3_RX_C/CB],HDMI_3_RX_0/0B] [HDMI_3_RX_1/1B],[HDMI_3_RX_2/2B]
[HDMI_3_SCL] [HDMI_3_SDA]
[HDMI_1_RX_C/CB],HDMI_1_RX_0/0B] [HDMI_1_RX_1/1B],[HDMI_1_RX_2/2B]
Main SoC MTK
[HDMI_0_RX_C/CB],HDMI_0_RX_0/0B] [HDMI_0_RX_1/1B],[HDMI_0_RX_2/2B]
[HDMI_0_SCL] [HDMI_0_SDA]
[HDMI_2_RX_C/CB],HDMI_2_RX_0/0B] [HDMI_2_RX_1/1B],[HDMI_2_RX_2/2B]
[ASPDIF1]
[HDMI_2_SCL] [HDMI_2_SDA]
X-tal 32.768kHz
HDMI4
HDMI3
HDMI2
HDMI1
3. HDMI
LGE Internal Use Only
MTK
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 32 -
[U0TX] [U0RX]
[OPCTRL2]
[OPCTRL4]
[U1TX]
[U1RX]
[USB_DP_P2]
[USB_DM_P2]
[GPIO44] [GPIO47]
[USB_DM_P3] [USB_DP_P3]
[GPIO42] [GPIO45]
[USB_DM_P0] [USB_DP_P0]
[GPIO43] [GPIO46]
[USB_DM_P2] [USB_DP_P1]
WIFI_DP
WIFI_DM
USB_CTL3
/USB_OCD3
USB_DP3
USB_DM3
USB_CTL2
/USB_OCD2
USB_DP2
USB_DM2
USB_CTL1
/SUB_OCD1
USB_DP1
USB_DM1
SOC_RX
SOC_TX
M_REMOTE_TX
M_REMOTE_RX
(+5V_USB)+0.3
(+5V_USB)+0.3
(+5V_USB_HDD)+0.3
RENESAS MICOM
_M_REMOTE_ISP
M_RFModule_RESET
USB3
USB2
USB1
OCP
OCP
OCP
TX / RX
9PIN DSUB
BCM BCM Solution Solution M_REMOTE M_REMOTE
USB_WIFI
4. USB / WIFI / M-REMOTE / UART
LGE Internal Use Only
MAX32 32CDR
T /C_ H/NIM
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
CVBS
SIF
- 33 IF_P/N
IF_AGC
TU_CVBS
TUNER_SIF
/TU_RESET
I2C_SDA6
I2C_SCL6
LVDS Tx Block
Main SoC MTK
[LDM_VSYNC]
[STB_SDA]
[STB_SCL]
[LDM_D0]
[LDM_CK]
10-bit (R)
24
LVDS_SEL
PANEL_VCC (+12V)
BIT_SEL_LOW
41Pin LVDS Output
51Pin LVDS Output
• LVDS_SEL : “H”=JEIDA, “L” or NC=VESA (LGD) • BIT_SEL : “H” or NC = 10-bit, “L” = 8-bit
Dual-link LVDS Output
10-bit (R)
24
Dual-link LVDS Output
L/DIMO_VS
I2C_SDA1
I2C_SCL1
L/DIMO_MOSI
L/DIMO_SCLK
5. TUNER/LVDS Tx (FHD120Hz)/LOCAL DIMMING
LGE Internal Use Only
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 34 I2C_SCL2
I2C_SDA2
[OPCTRL10]
PMIC_RESET
[TCON8]
VCOM_DYN
[OPCTRL11]
EPI CH4/5/6
Main SoC MTK
[TCON7]
EPI CH1/2/3
TXA0N/P, TXB1N/P, TXB2N/P
IC7700 TPS65178
TXA1N/P, TXACLKN/P, TXA4N/P
EPI_LOCK6 VCOMRFB
EPI_LOCK6_SOURCE
GMA[4][5][7][12][15]
VCOMLFB
VDD
H_VDD
Vcore
VCC18
VDD
H_VDD
Vcore
VCC18
50Pin EPI RIGHT
50Pin EPI LEFT
6. T-CON GMA[1][3][9][10][12][14][15][16][18] EPI_LOCK3 Z_OUT
LGE Internal Use Only
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 35 -
[TCON3]
[TCON4]
[TCON5]
[TCON6]
Main SoC MTK
VDD
VCC
GCLK_SOC
MCLK_SOC GCLK
MCLK
EO GST
EO_SOC
SWP
GST_SOC
R (47옴)
VGH_FB
CTRLP
CTRLN
IC7700 TPS65178
IC7701 TPS65198
VCOM_P/N/LOOP
VGL_FB
SWN
R(0옴) OPT
VGL_I VGL_I
CLK1~6_I
R CLK1~6 (0옴)
VGH_R, VGH_F, VST
VGH_ODD, VGH_EVEN
DISCHG
VCOM, GIP_RST
50Pin EPI RIGHT
50Pin EPI LEFT
7. T-CON
LGE Internal Use Only
Copyright © LG Electronics. Inc. All rights reserved. Only for training and service purposes
TR BUF
TUNER_SIF
PC_L_IN/PC_R_IN
AV1_L_IN/AV1_R_IN
SC_L_IN/SC_R_IN
[SIFP]
[STB_SCL]
[STB_SDA]
[AOBCK]
[AOSDATA0]
[AOLRCK]
[AL2_ADAC] [AR2_ADAC]
- 36 [AL0_ADAC] [AR0_ADAC]
[ASPDIF0]
Main SoC MTK
[AIN2_L_AADC] [AIN2_R_AADC]
[AIN3_L_AADC] [AIN3_R_AADC]
[AIN0_L_AADC] [AIN0_R_AADC]
IC6000 AZ4580M
HP_LOUT, HP_ROUT
SPDIF_OUT
AUD_LRCH AUD_SCK I2C_SDA1 I2C_SCL1
AUD_LRCK
Scart L/R OUT
LPF
SIDE_HP_MUTE
IC3101 MICOM
AMP_MUTE
NTP7500 or STA
LPF
LPF
LPF
HEAD PHONE
4P wafer
DTV/MNT_L/R_OUT
SCART
8. AUDIO
SCART_MUTE
LGE Internal Use Only
Tuner
EXPLODED VIEW IMPORTANT SAFETY NOTICE
A22
300
120
A7
200
A10
* Set + Stand * Stand Base + Body
800
LV1
530
810
540
900
521
910
400
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
Copyright Š LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 37 -
LGE Internal Use Only
EAX6430790* : LD22* / LC22* EAX6443420* : LT22* / LJ22* / LA22* / LB22* Crystal Matching Test result : 27pF -> 20pF -> 24pF
IC104-*1 M24256-BRMN6TP
NVRAM
+3.3V_NORMAL
E0
E1
E2
R103 4.7K
R105 4.7K OPT
R104
VSS
8
2
7
3
6
4
5
A1
A2
1
8
2
7
3
6
X-TAL
IC104-*2 R1EX24256BSAS0A
VCC
A0
WC
A1
SCL
A2
SDA
VSS
NVRAM_ST A0
4.7K OPT
+3.3V_NORMAL
IC104 AT24C256C-SSHL-T
1
1
8
2
7
3
6
4
5
+3.3V_NORMAL
VCC
WP
JTAG
NVRAM_RENESAS
AR100 10K
R146 10K MTK_JTAG
R152 MTK_JTAG P100 1K 12507WS-12L
33
2
JTRST#
I2C_SCL5
JTDI
3
JTMS
4
0
EMMC_CLK
1
- Low : Normal Operation - High : Write Protection R136
MT5369_XTAL_OUT C115 24pF
C113 24pF
Close to eMMC Flash (IC8100)
MTK_JTAG
SDA
Write Protection
SCL
IC R119
MT5369_XTAL_IN
SCL
VCC
WP
X100 27MHz
+3.3V_NORMAL
R174 10K
MT5369_NON_RM
IC105 LGE2112 +3.3V_NORMAL
GND
4
5
SDA
R137
33
5
JTCLK
I2C_SDA5
6
R143
JTDO
NVRAM_ATMEL
33
JTCLK
7
MTK_JTAG
AM14
JTDI
8
+3.3V_NORMAL
AP14 AR14
JTDO
AR15
9
JTMS
R144 10K
HDCP EEPROM
IC100-*1 24LC16B A0 1
NC_2 NC_3
8
1 2
7
C101 0.1uF 16V
VCC WC
R181
OSDA0
12
R145 10K MTK_JTAG
VCC
A1 2
7
WP
A2 3
6
SCL
VSS 4
5
SDA
R149 10K MTK_JTAG
3
6
SCL
R191
22
5
SDA
R192
22
AN12
OSCL0
13
U0RX
JTDO
SOC_TX
AP18
R165 4.7K
SOC_RX
R167 4.7K
AU16
JTMS
U1RX
JTRST
U1TX
M_REMOTE_RX
AT16
M_REMOTE_TX
OSDA0
POWE POOE
OSCL0
AN15
MT5369_XTAL_IN MT5369_XTAL_OUT AVDD_33SB
POCE1 OSDA1
POCE0
OSCL1
PDD7 PDD6
AT34 AU34
XTALI
PDD5
XTALO
PDD4 PDD3
AK27 AH26
C116 0.1uF
I2C_SCL1
A35
AP15
OSCL1
4.7K
VSS 4
U0TX
JTDI
AP12
OSDA1
HDCP_EEPROM_ST IC100 M24C16-R
8
AN14
JTRST#
JTCK
11
HDCP_EEPROM_MICRO
+3.3V_NORMAL
NC_1
10
AR18
AVDD33_XTAL_STB
PDD2
AVSS33_XTAL_STB
PDD1 PDD0
I2C_SDA1
PARB AVDD_33SB
+3.3V_NORMAL
PACLE
AK18 C117 0.1uF
AK17
AVDD33_VGA_STB
PAALE
AVSS33_VGA_STB
EMMC_CLK
EMMC_CMD
C33 B34
EMMC_DATA[2-7]
D33 D29
EMMC_DATA[7]
C30
EMMC_DATA[6]
D30
EMMC_DATA[5]
B31
EMMC_DATA[4]
A31
EMMC_DATA[3]
B32
EMMC_DATA[2]
+3.3V_NORMAL
R157 4.7K OPT
A32 C32 D32 A34
R178 4.7K OPT
EMMC_DATA[1]
C34
EMMC_DATA[0]
C29
EMMC_CLK +3.3V_NORMAL
AM20 R147 1K OPT
R150 1K
STRAPPING
R153 1K OPT LED_PWM0
LED_PWM0
LED_PWM1
OPWRSB
OPCTRL3
ICE mode + 27M + Serial boot
0
0
0
ICE mode + 27M + ROM to Nand boot
0
0
1
VDD3V3 AM22
AK23 C118 0.1uF
AM27
AVDD33_PLLGP
R154 1K
ICE mode + 27M + Rom to eMMC boot from eMMC pins (share pins w/s NAND)
0
ICE mode + 27M + ROM to eMMC boot from SDIO pins
0
1
D27
AJ20 AVDD10_LDO 1
C107 2.2uF 10V
1
C108 2.2uF 10V
I2C +3.3V_NORMAL
IC105-*1 LGE2112-AL
AMP, L/DIMMING,HDCP KEY T-CON MICOM S/Demod,T2/Demod, LNB NVRAM TUNER_MOPLL(T/C,ATV)
AC1
CI_ADDR[0]
H32
CI_ADDR[1]
F37
CI_ADDR[2]
F36
CI_ADDR[3]
G37
CI_ADDR[4]
G36
CI_ADDR[5]
G35
AC2 A3 A4 B4 C4 D4 B3 C3 AC3 AC4
ARDQM0
DDRV_45
ARDQS0
DDRV_1
ARDQS0
DDRV_2
ARDQ0
DDRV_5
ARDQ1
DDRV_8
ARDQ2
DDRV_10
ARDQ3
DDRV_4
ARDQ4
DDRV_7
ARDQ5
DDRV_46
ARDQ6
R134 2.7K
R139 2.7K
R142 2.7K
R173 2.7K
R185 2.7K
ARDQM1 ARDQS1 ARDQS1
RVREF_B
ARDQ8
RVREF_A
ARDQ9 ARDQ11
F10
R188 2.7K
R156 2.7K
R160 2.7K
ARDQ12
ARCKE
R164 2.7K
R177 2.7K
ARDQ13
D9 C9
ARCLK1
ARDQ14
ARCLK1
ARDQ15
ARCLK0
ARDQM2
ARCLK0
ARDQS2
ARODT
ARDQ16
A20 A21
STB_SCL STB_SDA
R110 R111
33
I2C_SCL1
33
E17
I2C_SDA1
E16 D14
OPCTRL_11_SCL
R112
33
I2C_SCL2
OPCTRL_10_SDA
R113
33
I2C_SDA2 I2C_SCL3
R115
33
I2C_SDA3
OSCL2
R116
33
OSDA2
R114
R117
ARRAS
ARDQ17
ARCAS
ARDQ18
ARCS
ARDQ19
ARWE
ARDQ20
ARRESET
ARDQ22
ARDQ21
B14
D16
ARBA0 ARDQM3
ARBA2
ARDQS3 ARDQS3
F13 C14
33
I2C_SDA4
OSCL0
R118
33
I2C_SCL5
OSDA0
R121
33
I2C_SDA5
OPCTRL_1_SCL
R122
33
I2C_SCL6
OPCTRL_0_SDA
R123
33
I2C_SDA6
ARDQ24
ARCSX
ARDQ25
C15
I2C_SCL4
F11 E15 D13 B15 E14 F16 E13 B13 A14 F14 F15
SOC -> CI SLOT
C23 B17
CI_ADDR[8]
L34
CI_ADDR[9]
L32
CI_ADDR[10]
K33
D23
MT5369_MCLKI MT5369_MIVAL_ERR
C17 D24 C16 C24
CI_ADDR[11]
K32
CI_ADDR[12]
H33
CI_ADDR[13]
L35
CI_ADDR[14]
K36
D15
MT5369_MISTRT B20 C20 A17 A23
SOC -> CI SLOT
D17 B23 D20
J32
MT5369_TS_OUT[0-7]
D22
J34
D19 C22
K34
B9
MT5369_TS_OUT[0]
A9
K35
C12 D6
MT5369_TS_OUT[1]
B12
K37
C5 C13
MT5369_TS_OUT[2]
J36
MT5369_TS_OUT[3]
J37
A5 A12 B5 E10
ARBA1
F18
A15
H34
ARDQ23
A13 G11
33
OSDA1
OSCL1
CI_ADDR[7]
A7
ARDQS2
E18 F17
G34
D21 MEMTP MEMTN
ARDQ10
R131 1.2K
C21 B21
ARDQ7
DDRV_47
G9 G13 G21
CI_ADDR[6] C19
DDRV_44
G10
R128 1.2K
ARA14
ARDQ26
ARA13
ARDQ27
ARA12
ARDQ28
ARA11
ARDQ29
ARA10
ARDQ30
ARA9
ARDQ31
D8 C6
CI_DATA[0-7]
D10 D7
ARA7
C7
ARA5
AVSS33_MEMPLL
ARA3 DVSS_48
H35
CI_DATA[0]
H31
CI_DATA[1]
F34
N15
R1 DVSS_50
ARA1
G33
B7 B10
ARA4 ARA2
J33
MT5369_TS_OUT[6] MT5369_TS_OUT[7]
C10
N14 AVDD33_MEMPLL
J35
MT5369_TS_OUT[5]
C11
ARA8 ARA6
MT5369_TS_OUT[4]
C8
P21
ARA0
CI_DATA[2]
E36
CI_DATA[3]
N33
CI_DATA[4]
P32
CI_DATA[5]
M35
CI_DATA[6]
M37
CI_DATA[7]
M33 F35
MT5369_TS_IN[0]
E35
MT5369_TS_IN[1]
Model Option
+3.3V_NORMAL
CI SLOT -> SOC
E37
MT5369_TS_IN[2] MT5369_TS_IN[3]
N32 M34
MT5369_TS_IN[4]
M36 M32
NO_FRC MTK_EPI R189 4.7K
MTK_DVB_C2_TUNER R186 4.7K
MT5369_TS_IN[6] MT5369_TS_IN[7] MTK_DVB_S_TUNER R175 4.7K
MTK_DVB_T2_TUNER R140 4.7K
MTK_CP_BOX R135 4.7K
MTK_DDR_768MB R132 4.7K
MTK_3D_DEPTH_IC R130 4.7K
MTK_OPTIC_Tx_IC R125 4.7K
MTK_FHD R108 4.7K
MTK_Int_FRC/URSA5 R106 4.7K
MTK_FRC3/URSA5 R101 4.7K
MT5369_TS_IN[5]
SoC internal FRC
LG FRC2
Reserved
MODEL_OPT_0
0
0
1
1
MODEL_OPT_1
0
1
0
1
L33
/USB_OCD2
E33
/USB_OCD1
E32
/USB_OCD3
F32 A29
USB_CTL2
D31
USB_CTL1
C31
USB_CTL3 EPI_LOCK6
MODEL_OPT_0
MODEL_OPT_0 MODEL_OPT_1 HIGH
C100 C102 C103 C105 C106 C104 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF OPT OPT OPT OPT OPT OPT
LOW
MODEL_OPT_2 HD
FHD
MODEL_OPT_2 MODEL_OPT_3
MODEL_OPT_9 MODEL_OPT_10
Reserved EPI
Default Support
Not Support
M104
MODEL_OPT_10
MDS62110214
Not Support
M103
Support
MTK_H/S_9.5T
S Tuner
M102
MODEL_OPT_8
Disable Not Support
MDS62110213
Support
MDS62110213
Enable
T2 Tuner
MTK_H/S_3.5T
CP BOX
MODEL_OPT_7
MODEL_OPT_3 M_RFModule_ISP MODEL_OPT_5 MODEL_OPT_6
HEAT SINK SMD GASKET
DDR_Default
M101
MODEL_OPT_6
ERROR_OUT
SC_ID_SOC
MTK_H/S_3.5T
MODEL_OPT_7
DDR_768MB
MODEL_OPT_1
MODEL_OPT_7
NON_OPTIC NON_3D_Depth_IC
MDS62110213
MODEL_OPT_9 MTK_NON_EPI R190 4.7K
MTK_NON_DVB_C2_TUNER R187 4.7K
MTK_NON_DVB_S_TUNER R184 4.7K
MTK_NON_DVB_T2_TUNER R141 4.7K
MTK_NON_CP_BOX R138 4.7K
MTK_DDR_DEFAULT R133 4.7K
MTK_NON_3D_DEPTH_IC R129 4.7K
MTK_NON_OPTIC_Tx_IC R127 4.7K
MTK_HD R109 4.7K
MTK_NO_FRC/FRC3 R107 4.7K
MTK_NO_FRC/Int_FRC R102 4.7K
M_RFModule_ISP MODEL_OPT_8
DDR
3D_Depth_IC
M100
MODEL_OPT_5
3D DEPTH
MTK_H/S_3.5T
MODEL_OPT_4
MODEL_OPT_6
OPTIC
MODEL_OPT_3
MTK_H/S_3.5T
MODEL_OPT_4
MDS62110213
/S2_RESET
MODEL_OPT_5
33
R159
OPT 4.7K
AT21 STB_SCL
E30 E31 F31 E29 AP9 AT9 AR9 AU9
DEMOD_TSCLK
GPIO2
DEMOD_TSDATA0
GPIO3
DEMOD_TSDATA1
GPIO4
DEMOD_TSDATA2
GPIO5
DEMOD_TSDATA3
GPIO6
DEMOD_TSDATA4
GPIO7
DEMOD_TSDATA5
GPIO8
DEMOD_TSDATA6
GPIO9
DEMOD_TSDATA7
GPIO11
DEMOD_TSSYNC
CI_INT
GPIO14
CI_TSCLK
GPIO15
CI_TSDATA0
GPIO16
CI_TSSYNC
GPIO17
CI_TSVAL
GPIO18
AN23
R176
10K
AN24
R162
10K
AP23
R163
10K
AR23
M_RFModule_RESET OPC_EN /TU_RESET /S2_RESET
AU23 AT23 AM24 AM23
FE_TS_CLK
T36
FE_TS_DATA[0]
U36
FE_TS_DATA[1]
T33
FE_TS_DATA[2]
T30
FE_TS_DATA[3]
V33
FE_TS_DATA[4]
V32
FE_TS_DATA[5]
V31
FE_TS_DATA[6]
PVR_TSVAL
GPIO21
PVR_TSSYNC
GPIO22
PVR_TSDATA0
GPIO23
PVR_TSDATA1
GPIO24
T35
FE_TS_SYNC
T31
FE_TS_VAL /PCM_REG
T37
/PCM_CE1 MT5369_TS_SYNC CI SLOT -> SOC /PCM_WE
R35 R37 R36
/PCM_OE
GPIO26
SPI_CLK
GPIO27
SPI_DATA
GPIO28
SPI_CLE
GPIO29
MT5369_TS_VAL CI SLOT -> SOC CI_A_VS1
R32 R33
MT5369_TS_CLK CI SLOT -> SOC /PCM_IRQA
P33 P34 N37
SPI_CLK1
P35 N34 N35
/PCM_WAIT +3.3V_NORMAL /CI_CD2 /CI_CD1 /PCM_IORD /PCM_IOWR
R161 4.7K OPT R171
R168 4.7K OPT
R166 2.7K OPT
AU12
GPIO30
OPWM2
GPIO31
OPWM1
GPIO32
OPWM0
AR12
R169
A37
GPIO34
SD_D0
GPIO35
SD_D1
GPIO36
SD_D2
GPIO37
SD_D3
GPIO38
SD_CMD
GPIO39
SD_CLK
10K
A36
SMARTCARD_RST
B35
R170
LDM_CS
GPIO43
LDM_CLK
GPIO44
LDM_VSYNC
GPIO45
LDM_DO
GPIO46
LDM_DI
PWM_DIM1
R126 1K
SMARTCARD_DET
B36
SMARTCARD_VCC
B37
SMARTCARD_CLK SMARTCARD_PWR_SEL
SMARTCARD_DATA FOR JAPAN
SMARTCARD_RST SMARTCARD_DET
AT11
GPIO42
PWM_DIM2
A_DIM C120 2.2uF 10V OPT PWM2_PULL_DOWN_1K PWM1_PULL_DOWN_1K R120 1K
SMARTCARD_CLK SMARTCARD_PWR_SEL
C35
GPIO40 GPIO41
22 22
AT12
OPT
GPIO33
EXTERNAL DEMOD -> SOC
FE_TS_DATA[7]
V30
R34 PVR_TSCLK
GPIO20
GPIO25
FE_TS_DATA[0-7]
PCM_RST
T32
N36
GPIO13
GPIO19
C114 0.1uF 16V
STB_SDA
DEMOD_TSVAL
GPIO12
SMARTCARD_VCC
AU11
L/DIM0_SCLK
AR10
SMARTCARD_DATA
L/DIM0_VS
AM9
FOR JAPAN
L/DIM0_MOSI
AP10
GPIO47 GPIO48
AN22
GPIO49
LED_PWM1
GPIO50
LED_PWM0
LED_PWM1
AP21
LED_PWM0
GPIO51 GPIO52 5V Tolerance
GPIO53
AU20
GPIO54
OPCTRL11
GPIO55
OPCTRL10 OPCTRL9
NON_EU R193 10K
MODEL_OPT_4
DEMOD_RST
GPIO1
GPIO10
SOC_RESET 22
STB_SCL
AR21 T34
GPIO0
R172
IR
FSRC_WR
STB_SDA
MT5369_RM
: : : : : :
R158
0
CI_ADDR[0-14]
I2C_1 I2C_2 I2C_3 I2C_4 I2C_5 I2C_6
AU21 OIRI
OPCTRL3 R151 1K OPT
R148 1K
R155 10K OPT
ORESET
AVSS33_PLLGP
LED_PWM1
OPCTRL8 ADIN0_SRV
OPCTRL7
ADIN1_SRV
OPCTRL6
ADIN2_SRV
OPCTRL5
ADIN3_SRV
OPCTRL4
ADIN4_SRV
OPCTRL3
ADIN5_SRV
OPCTRL2
ADIN6_SRV
OPCTRL1
ADIN7_SRV
OPCTRL0
OPCTRL_11_SCL
AT20
OPCTRL_10_SDA
AN18
COMP1_DET
AP20
SC_DET
AM18
DSUB_DET
AN19
HP_DET
AP19
AV1_CVBS_DET
AR19
AMP_RESET_SOC
AN21
OPCTRL3
AM19
RF_SWITCH_CTL
AN20
OPCTRL_1_SCL
AR20
OPCTRL_0_SDA
MODEL OPTION 8 is just for CP Box It should not be appiled at MP
R124 AMP_RESET_SOC 33 AMP_RESET_BY_SOC
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
MID_MAIN_1
AMP_RESET_N R100 10K
AMP_RESET_BY_SOC
2011.12.13 8
LGE Internal Use Only
PLACE AT JACK SIDE C319 10uF 16V
1608 sizs For EMI R314 PC_L_IN
PC_L_IN_SOC 1608 sizs For EMI R333
0 R300 C300 560pF 50V OPT
470K OPT
C314 100pF 50V OPT
AV1_CVBS_IN
AV1_CVBS_IN_SOC
1608 sizs For EMI R336
120-ohm C344 27pF 50V OPT
ZD300 5.48VTO5.76V C320 10uF 16V
ZD301 5.48VTO5.76V
C348 100pF 50V
R330 75 1%
C340 47pF 50V
PC_R_IN_SOC
PC_R_IN
1.0Vpp
0
1608 sizs For EMI 0
COMP1_Y
C315 100pF 50V OPT
C301 560pF 50V OPT
R301 470K OPT
ZD303 5.48VTO5.76V
C345 10uF 16V
1608 sizs For EMI R344 AV1_L_IN 30K
COMP1_Pb
R328 C338 560pF 50V OPT
470K OPT
C342 100pF 50V
C386 27pF 50V OPT
ZD304 5.48VTO5.76V ZD305 5.48VTO5.76V
10V
R302 180
C311
ARC
DSUB_VSYNC
R308 1.2K OPT 1uF
C329 5pF 50V OPT
HDMI_ARC
R324
22
COMP1_Y_SOC C394 27pF 50V OPT
C384 10pF 50V
R355 75 1%
1608 sizs For EMI 0 R373
AV1_L_IN_SOC
+5V_NORMAL
R374
C388 27pF 50V OPT
ZD302 5.48VTO5.76V
C391 27pF 50V OPT
COMP1_Pb_SOC
R354 75 1%
C379 10pF 50V
DSUB_VSYNC_SOC
OPT R325 2K
C346 10uF 16V
1608 sizs For EMI R345 AV1_R_IN
1608 sizs For EMI 0 R372
COMP1_Pr
AV1_R_IN_SOC
COMP1_Pr_SOC
30K
R303 82
R309 100K
DSUB_HSYNC C330 5pF 50V OPT
R323
22
C339 560pF 50V OPT
R329 470K OPT
DSUB_HSYNC_SOC
OPT R326 2K
C343 100pF 50V
C385 27pF 50V FOR EMI OPT
ZD306 5.48VTO5.76V ZD307 5.48VTO5.76V
C392 27pF 50V OPT
R353 75 1%
C378 10pF 50V
IC105 LGE2112
IC105 LGE2112
CHANGE SYMBOL AA32
AE33 AC33
DDC_SCL_1_SOC
AH32
DDC_SCL_4_JACK
AD33 AB33
DDC_SDA_1_SOC DDC_SDA_4_JACK
5V_HDMI_3_JACK 5V_HDMI_1_SOC 5V_HDMI_4_JACK
AH33 R304
1K
AG31
R305
1K
AE31
R306
1K
AC31
R307
1K
AH31
HDMI_0_RX_1
HDMI_1_SCL
HDMI_0_RX_1B
HDMI_2_SCL
HDMI_0_RX_2
HDMI_3_SCL
HDMI_0_RX_2B
HDMI_0_SDA
HDMI_0_RX_CB
HDMI_0_RX_C HDMI_1_SDA HDMI_1_RX_0
HDMI_3_SDA
HDMI_1_RX_0B
HDMI_0_PWR5V
HDMI_1_RX_1B
HDMI_1_RX_1 HDMI_1_PWR5V
HDMI_1_RX_2
HDMI_2_PWR5V
HDMI_1_RX_2B
HDMI_3_PWR5V
HDMI_1_RX_C
AE32 AC32
HDMI_HPD_1_SOC HDMI_HPD_4_JACK
AJ32
HDMI_2_RX_0
HDMI_2_HPD
HDMI_2_RX_0B
HDMI_3_HPD
HDMI_2_RX_1 HDMI_2_RX_1B
AA24 Y24
C306 0.1uF
C303 0.1uF
W24 AB24
AVDD12_HDMI_0_RX
HDMI_2_RX_2
AVDD12_HDMI_1_RX
HDMI_2_RX_2B
AVDD12_HDMI_2_RX
HDMI_2_RX_C
AVDD12_HDMI_3_RX
HDMI_2_RX_CB
AB29 VDD3V3
AA29 Y29 AC29 C304 0.1uF
C307 0.1uF
AF31 AF32
AG36
HDMI_3_RX_0
AVDD33_HDMI_1_RX
HDMI_3_RX_0B
AVDD33_HDMI_2_RX
HDMI_3_RX_1
AVDD33_HDMI_3_RX
HDMI_3_RX_1B HDMI_3_RX_2
AVSS33_HDMI_RX_1
HDMI_3_RX_2B
AVSS33_HDMI_RX_2
HDMI_3_RX_C
AVSS33_HDMI_RX_3
HDMI_3_RX_CB
AO4N AO4P
D1-_HDMI2_JACK
AF35
AOCLKN
D2+_HDMI2_JACK
AF34
AOCLKP
D2-_HDMI2_JACK
AH35
AO2N
CK+_HDMI2_JACK
AH34
AO2P
CK-_HDMI2_JACK
AD34
E27
MODEL_OPT_9
D0-_HDMI3_JACK D1+_HDMI3_JACK
AD35
F30
MODEL_OPT_10
F29
GCLK_SOC
D1-_HDMI3_JACK
B27
MCLK_SOC
AC35
D2+_HDMI3_JACK
AC34
B28
EO_SOC
CK+_HDMI3_JACK
AE34
A27
GST_SOC
D2-_HDMI3_JACK
AE35
A28
VCOM_DYN
CK-_HDMI3_JACK
C28
PMIC_RESET
D28
2D/3D_CTL D0+_HDMI1_SOC
AB34
E28
MODEL_OPT_2
D0-_HDMI1_SOC D1+_HDMI1_SOC
AA35 AA34 AA37
F28
PCM_5V_CTL
B29
EMMC_RST
D1-_HDMI1_SOC
USB_DM3 USB_DP2
Port was changed !!!!
USB_DM2 WIFI_DP WIFI_DM USB_DP1
VDD3V3
USB_DM1
AO1P AO0N
TCON2
AO0P
TCON3 AE4N
TCON5
AE4P
TCON6
AE3N
TCON7
AE3P
TCON8
AECLKN
TCON9
AECLKP
TCON10
AE2N
TCON11
AE2P
TCON12
AE1N
+1.2V_MTK_AVDD
AE1P AE0N
AC36
C350 0.1uF
CK-_HDMI1_SOC
AK34 AJ35 AJ34
C354 0.1uF
AJ36 AJ33 AK33
AF6 AE6
D0-_HDMI4_JACK D1+_HDMI4_JACK
AH7 C347 0.1uF
D1-_HDMI4_JACK
AJ37
AJ6 VDD3V3
D0+_HDMI4_JACK
AVDD12_LVDS_1
AG5
D2-_HDMI4_JACK
AF5
CK+_HDMI4_JACK
AE5
CK-_HDMI4_JACK
AH5
BO4N
AVDD12_VPLL
BO4P
AVDD33_LVDSB
BO3N
AVDD33_LVDSA
BO3P BOCLKN
AVSS12_LVDS_2
BOCLKP
AVSS12_LVDS_1
BO2N
AVSS12_VPLL
BO2P
AVSS33_LVDSB
BO1N
AVSS33_LVDSA
BO1P BO0N
AG7 REXT_VPLL
USB_DP_P0
D37
BE4P
USB_DP_P1
BE3N
USB_DM_P1
BE3P
AT13
BECLKN
USB_DP_P2
BECLKP
USB_DM_P2
BE2N
AT14 AU14
USB_DP_P3 USB_DM_P3
SC_R_IN_SOC
BE2P
SC_L_IN_SOC
BE1N BE1P
D35 AP13
BE0N
AVDD33_USB_P0P1 AU37 AU35
AVSS33_USB_P1 AVSS33_USB_P2
PC_R_IN_SOC
W35 +1.2V_MTK_AVDD
W34 Y34 Y35
VDD3V3
C316 0.1uF
AT18 PCIE11_TXP
TXVP_0
PCIE11_TXN
TXVN_0
PCIE11_RXN RXVN_1
AVDD12_PCIE11 PHYLED1
R310
30K
AT37 AU36 AP34
R338
AV1_R_IN_SOC
EPHY_RDN
AT36
0 R337
AV1_L_IN_SOC
EPHY_RDP
AR37
0
AR33 AP32 AR36
AM16
AP37
PHYLED0
W30 AVSS12_PCIE11
AD15 REXT
W36 W37
AT35
AN16
AVDD33_PCIE11
C308 0.1uF
30K
EPHY_TDN
AT17
RXVP_1
U24 V24
AU18 AU17
PCIE11_RXP
R311
PC_L_IN_SOC
EPHY_TDP
PCIE11_REFCKN
24K +1.2V_MTK_AVDD
AR35
R315
AP36
AD14
PCIE11_REFCKP
AVDD12_REC AD16 AVDD33_COM
AD17
AVDD33_LD
C323 0.1uF
VDD3V3
AR0_ADAC
AIN0_L_AADC
AL0_ADAC
AIN1_L_AADC
AR1_ADAC
AIN2_R_AADC
AL1_ADAC
AIN2_L_AADC AIN3_R_AADC
AR2_ADAC
AIN3_L_AADC
AL2_ADAC
AIN4_R_AADC AIN4_L_AADC
AR3_ADAC
AIN5_R_AADC
C362 0.1uF
AJ28
AVDD33_DAC
AIN6_L_AADC
AVDD33_DAC1
C352
Close to Tuner
ASPDIF0
IF_N
R331
0
T/C&AT&CHB
C358 0.01uF 50V
AOMCLK
C363 1uF 25V
AOSDATA4 AOSDATA3 AOSDATA2
51
AOSDATA1
1uF
R335
AU32 51
AT32
T/C&AT&CHB
VDD3V3
HSYNC
ADCINN_DEMOD
VSYNC RP
AVDD33_DEMOD
BP AVDD12_DEMOD
T/C&AT&CHB R342 10K
AJ26
AVSS33_DEMOD
C341 0.047uF T/C&AT&CHB
PB1P PR1P
U35 Close to MT5369 TP300
HP_OUT L303 BLM18PG121SN1D
IF_AGC
Y1P
RF_AGC
SOY1 COM0
AP31 AN30
LOUTN
PB0P
LOUTP
PR0P
HP_LOUT
Y0P
V35
OSCL2
HP_OUT C332 0.22uF 10V
V34
OSDA2
OSCL2
AR29
VDACX_OUT SC0
AK4
TXDCLKP
AJ3
TXD2N
AJ4
TXD2P
AJ1
TXD1N
AJ2
TXD1P
AH3
TXD0N
AH4
TXD0P TXA4N
AU2
CI_ADDR[0-14]
CH3
TXA4P
AT1
CI_ADDR[0]
TXA3N
AU1
CH2
TXACLKP
AP1
TU_CVBS
R340
100 100
C360 C359
0.047uF 0.047uF
AR30 AR31 AN29
C361
1uF
AP30
CVBS3P
AK24 AK25
CI_ADDR[12]
CI_ADDR[11] CI_ADDR[13]
TXB3N
CI_ADDR[14]
For PCB Pattern
TXBCLKN
AR5 AT4 AU4
TXBCLKP
HP_OUT 1.2K R351
TXB2N
1.2K
CH6
TXB2P
AP4
R352 C377 1200pF HP_OUT
HP_OUT
TXB1N
AR4
CH5
TXB1P
AP3
1.2K
HP_OUT R369
1.2K
R370
C383 HP_OUT 1200pF HP_OUT
TP328
C395 1200pF HP_OUT
MT5369_TS_OUT[0]
HP_LOUT_MAIN
MT5369_TS_OUT[1] MT5369_TS_OUT[2] MT5369_TS_OUT[3] MT5369_TS_OUT[4]
SCART_Rout_SOC
MT5369_TS_OUT[5] CI_DATA[0-7]
AN35
MT5369_TS_OUT[6]
AN34
MT5369_TS_OUT[7]
AUDIO_R_OUT_COMMERCIAL
AM32 AM34
CI_DATA[2] CI_DATA[4]
AM33
CI_DATA[5] R376
1.2K
R378
AM35
1.2K
R377
1.2K
R379 C400 1200pF
TP341 TP342 TP343
MT5369_TS_IN[1] MT5369_TS_IN[2] MT5369_TS_IN[3]
ARC L300
SC_ID_SOC
DSUB_R+
/CI_CD2
BLM15BD121SN1
Y32 R366
100
AP11
R367
100
AM12
R368
100
R371
AM10
AUD_SCK
AN11
C333 47pF 50V
R322 75
AUD_LRCK AUD_MASTER_CLK
100
AM11
/CI_CD1 D301 ADLC 5S 02 015 5.5V
AUD_LRCH C389 22pF OPT
C387 22pF OPT
Don’t use as GPIO
AN10
C393 22pF OPT
C396 33pF OPT
DSUB_G+
DSUB_HSYNC_SOC
AM25 0.01uF 0.01uF
C366 C367
100
R356
100
0.01uF
C368
100
R358
AP24
0.01uF
C369
100
R359
AT24
1500pF
C370
DSUB_B+
RGB_DDC_SCL
D302 ADLC 5S 02 015 5.5V
AP26 AU26 AP25 0.01uF
AU28
C371
0.01uF
100
R361
C372
100
R362
AR28
0.01uF
C373
100
R363
AP27
0.01uF
C374
100
R364
AR27
1500pF
C375
AT28
TP356
TP308 TP309 TP310 TP311 TP359 TP360 TP361 TP362 TP363
/PCM_WAIT
TP364
SC_R_IN_SOC
TP365
SC_L_IN_SOC
TP366
SC_CVBS_IN_SOC
TP367
SC_COM_SOC SC_G_SOC
AR26
TP355
TP307
/PCM_IRQA
L304 BLM15BD121SN1 R320 75
TP354
PCM_RST /PCM_REG
MT5369_TS_CLK
C334 47pF 50V
TP351 TP352 TP353
TP358
MT5369_TS_VAL CI_A_VS1
DSUB_VSYNC_SOC
RGB_DDC_SDA
AP22
D300 ADLC 5S 02 015 5.5V
TP348
TP357
/PCM_OE
R357
AU24
AR22
R321 75
TP347
TP350
/PCM_IORD
/PCM_WE
BLM15BD121SN1 C335 47pF 50V
TP346
TP349
/PCM_IOWR
/PCM_CE1 MT5369_TS_SYNC
L301
AN9
AR24
MT5369_TS_IN[5] MT5369_TS_IN[6] MT5369_TS_IN[7]
AR16
AR25
MT5369_TS_IN[4]
PLACE AT JACK SIDE
SPDIF_OUT
C380 0.1uF
AR11
TP336
TP344
MT5369_TS_IN[0] C399 1200pF
DAC_3V3 C365 0.01uF
TP335
TP345
AF30
AE30
TP333 TP334
TP340
CI_DATA[7]
C398 1200pF
C397 1200pF
TP332
TP338
CI_DATA[6] 1.2K
TP330 TP331
TP339
CI_DATA[3] AM37
TP329
TP337
CI_DATA[0] CI_DATA[1]
AM36
TP325 TP327
HP_ROUT_MAIN C390 1200pF HP_OUT
CH4
TXB0P
TP324 TP326
MT5369_TS_OUT[0-7]
TXB0N
AR3
TP321 TP322 TP323
TP368 TP369
SC_COM_SOC
SC_R_SOC
TP370
SC_G_SOC
SC_B_SOC
TP371
SC_R_SOC
SC_FB_SOC
TP372
SC_B_SOC
DTV/MNT_V_OUT_SOC
TP373
SCART_Rout_SOC
TP374
SC_FB_SOC For PCB Pattern
COMP1_Pb_SOC
SCART_Lout_SOC
TP375
PCM_5V_CTL
TP377
SC_DET
TP378
COMP1_Pr_SOC AU30
0
AP29
0
OPT
COMP1_Y_SOC
R349 R350
DTV/MNT_V_OUT_SOC
VDD3V3
AD21
AVDD33_VDAC
CVBS2P
AD19
CVBS1P
AVDD12_RGB
+1.2V_MTK_AVDD
CVBS0P CVBS_COM
VDD3V3
CI_ADDR[10]
MT5369_MISTRT
TXB3P
AP5
AD20 AVDD33_VDAC_BG
AT30 R341
MT5369_MCLKI MT5369_MIVAL_ERR
TXB4P
AR6
TP320
CI_ADDR[9]
TXB4N
AP6
TP319
CI_ADDR[8]
TXA0P
AU6
TP318
CI_ADDR[7]
CH1
TXA0N
AM4
TP317
CI_ADDR[6]
TXA1P
AM3
TP316
CI_ADDR[5]
TXA1N
AN2
TP315
CI_ADDR[4]
TXA2P
AN1
TP314
CI_ADDR[3]
TXA2N
AP2
TP313
CI_ADDR[2]
TXACLKN
AR2
TP312
CI_ADDR[1]
TXA3P
AR1
VDACY_OUT
SY0
SC_CVBS_IN_SOC For PCB Pattern AV1_CVBS_IN_SOC
HP_OUT C331 0.22uF 10V
TXDCLKN
SOY0
OSDA2 AP28
HP_ROUT
TXD3P
AK3
AT26 COM1
U34
HP_OUT L302 BLM18PG121SN1D
TXD3N
AL2
VGA_SCL
AVSS12_DEMOD
C355 0.047uF T/C&AT&CHB
Close to Tuner
SOG VGA_SDA
AM28
T/C&AT&CHB R332 10K
GP COM
AL27 C351 0.1uF
HP_ROUT_AMP
TXD4P
AL1
AN25 ADCINP_DEMOD
AD22 C364 0.1uF
+1.2V_MTK_AVDD 33pF T/C&AT&CHB
HP_LOUT_AMP
AL4
AOSDATA0
Close to MT5369
10V T/C&AT&CHB C310
IF_AGC
AOBCK AOLRCK
T/C&AT&CHB
T/C&AT&CHB C337
ASPDIF1
AN28 MPXP
R334
C309 OPT
0.01uF
R339 2.2K OPT
33pF
TXD4N
Y33 ALIN
VMID_AADC
C336 1uF 10V
TXC0P
AVSS33_DAC1 AVDD33_AADC
AJ27
AL14
T/C&AT&CHB R346 0
TXC0N
AD2
AG30
AIN6_R_AADC
AVSS33_AADC
AL15
IF_P
TXC1P
AD1
AL3_ADAC
AIN5_L_AADC
AL31
C305 1uF 25V
TUNER_SIF
T/C&AT&CHB C312
TXC1N
AE2
AUDIO_L_OUT_COMMERCIAL
AIN1_R_AADC
AVSS33_DAC
AVSS12_REC
TXC2P
AE1
AK30
AL16 AVSS33_LD AVSS33_COM
AIN0_R_AADC
VDD3V3
C328 0.1uF
TXC2N
AE4
SCART_Lout_SOC
D34 AR13
TXCCLKP
AE3
BE0P
For PCB Pattern
AVDD33_USB_P2P3 C302 0.1uF
TXCCLKN
AF4
AT6 BE4N
D36
AU13
TXC3P
AF3
BO0P
R343 24K 1%
USB_DM_P0
TXC3N
AG2
AT2
AVDD12_LVDS_2
AJ5
D2+_HDMI4_JACK
TXC4P
AG1
AE0P
AG6
CK+_HDMI1_SOC
TXC4N
AG4
AL3
TCON4
D2-_HDMI1_SOC
AC37
C36 C37
TCON0 TCON1
D2+_HDMI1_SOC
AA36
AVSS33_HDMI_RX_4 USB_DP3
AO1N
F27
MODEL_OPT_8 D0+_HDMI3_JACK
AE36
AK35 AVDD33_HDMI_0_RX
AB30 AD30
AG37
AB35
HDMI_1_HPD
AO3P
D0-_HDMI2_JACK D1+_HDMI2_JACK
HDMI_1_RX_CB HDMI_0_HPD
AO3N
D0+_HDMI2_JACK
AG34
AE37
HDMI_2_SDA
AG32
HDMI_HPD_2_JACK HDMI_HPD_3_JACK
+1.2V_MTK_AVDD
HDMI_0_SCL
AF33
DDC_SDA_2_JACK DDC_SDA_3_JACK
5V_HDMI_2_JACK
HDMI_0_RX_0 HDMI_0_RX_0B
AG33
DDC_SCL_2_JACK DDC_SCL_3_JACK
AG3
AG35 HDMI_CEC
AJ22 AVSS33_VDAC_BG
AVDD33_CVBS_1
AVSS12_RGB
AVDD33_CVBS_2
AVSS33_VDAC
AJ21
C382 0.1uF
AL24
AL25 AM26
AVSS33_CVBS_1 AVSS33_CVBS_2
Place at JACK SIDE
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
MID_MAIN_2
2011.12.19 9
LGE Internal Use Only
+3.3V_NORMAL
+1.2V_MTK_CORE
VDD3V3
C503 10uF
C500 10uF
5600mA
60mA
L500 BLM18PG121SN1D
C510 0.1uF
C506 10uF
C524 10uF
C504 2.2uF
C529 0.1uF
C505 10uF
C532 0.1uF
IC105 LGE2112
C535 0.1uF
IC105 LGE2112
+1.2V_MTK_CORE
+1.2V_MTK_CORE AR7 AT7 AU7 AP8 AR8
+1.2V_MTK_CORE
AT8 AU8 AM7
C539 10uF
C543 0.1uF
C546 0.1uF
C548 0.1uF
C550 0.1uF
C552 0.1uF
AN7
C553 0.1uF
AP7 AM8 AN8 P14 R14 T14
VDD3V3
U14
AVDD_33SB
V14 L501 BLM18PG121SN1D
W14 Y14 AA14
C501 0.1uF
+1.2V_MTK_CORE
+1.2V_MTK_AVDD
AB14 AC14
L502 BLM18PG121SN1D
AC19 P15 C525 10uF
C502 0.1uF
AC15 P16 AC16 V23 W23 Y23 AA23
AC22 VCCK_43
VCCK_31
VCCK_45
VCCK_32
VCCK_47
VCCK_36
VCCK_42
VCCK_8
VCCK_44
VCCK_10
VCCK_46
VCCK_12
VCCK_48
VCCK_33
VCCK_37
VCCK_30
VCCK_39
VCCK_7
VCCK_41
VCCK_29
VCCK_38
VCCK_6
VCCK_40
VCCK_27
VCCK_1
VCCK_5
VCCK_9
VCCK_26
VCCK_11
VCCK_4
VCCK_13
VCCK_34
VCCK_14
VCCK_35
R2
AC23
R3
AD24
J4
P23
R4
R24
Y4
T24
F5
AC24
J5
AC21
R5
P20
Y5
AC20
W5
P19
L7
AC18
M7
P18
R7
AC17
AA5
P17
AB5
AD18
K7
AD23
U7
VCCK_16
W7
VDD3V3
E9
VCCK_18 VCCK_20
E8
AL9
VCCK_22
VCC3IO_B_4
VCCK_23
VCC3IO_B_2
VCCK_28
VCC3IO_B_1
VCCK_2
VCC3IO_B_3
VCCK_24
VCC3IO_A_5
VCCK_3
VCC3IO_A_7
VCCK_25
VCC3IO_A_6
VCCK_15
VCC3IO_A_8
VCCK_17
VCC3IO_A_3
VCCK_19
VCC3IO_A_4
VCCK_21
VCC3IO_A_2
F9
AK10
G14
AK9
J6
AK11
R15
H29
T15
J29
U15
H30
V15
J30
W15
G31
Y15
G32
AA15
F33
AB15
E34
H11
VCC3IO_A_1
R16 T16 U16 V16
DAC_3V3
+5V_NORMAL
W16 IC501 AP1117E33G-13
Y16 AA16 AB16
INADJ/GND
R17
OUT
POWER_ON/OFF1
T17
C526 10uF 10V
TP500
U17 V17 Y17 T18 V18 Y18 R500 1
T19 V19 Y19
C540 10uF 10V
C544 0.1uF 16V
W17 AA17 AB17 R18 AB6 H19 H22 J11 J12 J22
R6 DVSS_51
DVSS_55
DVSS_52
DVSS_62
DVSS_37
DVSS_73
DVSS_53
DVSS_83
DVSS_107
DVSS_92
DVSS_20
DVSS_104
DVSS_38
DVSS_117
DVSS_54
DVSS_127
DVSS_108
DVSS_137
DVSS_95
DVSS_29
DVSS_44
DVSS_63
DVSS_46
DVSS_74
DVSS_56
DVSS_84
DVSS_120
DVSS_93
DVSS_130
DVSS_105
DVSS_43
DVSS_118
DVSS_77
DVSS_128
DVSS_97
DVSS_138
DVSS_13
DVSS_64
DVSS_12
DVSS_75
DVSS_22
DVSS_85
DVSS_28
DVSS_94
DVSS_39
DVSS_106
DVSS_57
DVSS_119
DVSS_68
DVSS_129
DVSS_78
DVSS_139
DVSS_87
DVSS_65
DVSS_99
DVSS_76
DVSS_112
DVSS_86
DVSS_122
DVSS_140
DVSS_132
DVSS_96
DVSS_34
DVSS_30
DVSS_58
DVSS_27
DVSS_69
DVSS_109
DVSS_79
DVSS_17
DVSS_88
DVSS_25
DVSS_100
DVSS_45
DVSS_113
DVSS_66
DVSS_123
DVSS_7
DVSS_133
DVSS_14
DVSS_59
DVSS_8
DVSS_70
DVSS_18
DVSS_80
DVSS_26
DVSS_89
DVSS_33
DVSS_114
DVSS_136
DVSS_71
DVSS_126
DVSS_90
DVSS_49
DVSS_115
DVSS_103
DVSS_72
DVSS_82
DVSS_91
DVSS_61
DVSS_116
DVSS_110
DVSS_101
DVSS_135
DVSS_124
DVSS_125
DVSS_134
DVSS_102
DVSS_60 DVSS_131
DVSS_81 DVSS_121
DVSS_35
DVSS_47
DVSS_36
DVSS_67
DVSS_40
DVSS_98
DVSS_41
DVSS_111
DVSS_42
DVSS_11
R20 T20 U20 V20 W20 Y20 AA20 AB20 G16 R21 T21 U21 V21 W21 Y21 AA21 AB21 R22 T22 U22 V22 W22 Y22 AA22 AB22 R23 T23 U23 AB23 W6 G17 F25 Y6 E21 F21 L8 T7 D11 E11 D12 E22 F22 G25 AB19 AA19 P22 W19 U19 R19 Y7 AB18 AA18 W18 U18 AA7 N22 T8 W8 Y8 E7 F8
DVSS_21
+3.3V_NORMAL
3.3V_EMMC
+3.3V_NORMAL
EMMC_VCCQ LAN_JACK_POWER
L504 BLM18PG121SN1D
L506 BLM18PG121SN1D
C512 0.1uF 16V
TP501
C522 0.1uF 16V
DECAP FOR SOC (HIDDEN - UCC)
DECAP FOR SOC (BOTTOM)
SMD Gaskit +1.2V_MTK_CORE
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
SMD_GASKIT_8.5T_COMP M502
C514 0.1uF
C520 0.1uF
C527 0.1uF
C531 0.1uF
C537 0.1uF
C545 0.1uF
MDS62110209
+1.5V_DDR
+1.5V_DDR
USB3 MDS62110217
MDS62110217
USB1~2
SMD_GASKIT_12.5T_HDMI1 M506
MDS62110209
COMP
SMD_GASKIT_12.5T_USB3 M505
SMD_GASKIT_8.5T_RGB M501 M504
M500
RGB
HDMI2~3 MDS62110217
M503
HDMI1~2
SMD_GASKIT_12.5T_USB1
MDS62110209
LAN
MDS62110217
SMD_GASKIT_12.5T_HDMI2
SMD_GASKIT_8.5T_LAN
+1.2V_MTK_CORE
C508 0.1uF
C523 0.1uF
C533 0.1uF
MID_MAIN_3
C536 0.1uF
C547 0.1uF
2011.12.09 10
LGE Internal Use Only
+1.5V_DDR
IC703 H5TQ2G63BFR-PBC
IC701 H5TQ2G63BFR-PBC
A_RVREF2
A_RVREF4 M8 A0
VREFCA
A1
A_RVREF1
A_RVREF1
C713 0.1uF
R706 1K 1%
A3
VREFDQ R710
R707 1K 1%
A2
H1 1% 240
A4 A5
L8
A6
ZQ
C714 0.1uF
+1.5V_DDR
A7 A8
B2 D9 G7
+1.5V_DDR
K2 K8 A_RVREF4
C715 0.1uF
R708 1K 1%
N1 N9 R1 R9
VDD_1
A9
VDD_2
A10/AP
VDD_3
A11
VDD_4
A12/BC
VDD_6
D2 E9 F1 H2 IC701-*2 K4B2G1646C-HCK0
IC701-*1 NT5CB128M16BP-DI
BA0
P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
H9
A5
L8
K3
VDD_1 VDD_2
A11
VDD_3
A12/BC
VDD_4 VDD_5 VDD_6 VDD_7 VDD_8
D9 G7
K2
K2
K8
K8
N1
N1
N9
N9
R1
R1
R9
R9
VDD_9
BA0
A8
B2
D9 G7
VDD_1
A9
VDD_2
A10/AP
VDD_3
VDDQ_1 VDDQ_3
CK
VDDQ_4
CKE
VDDQ_5 CS
VDDQ_7
ODT
VDDQ_8
RAS
NC_6
VDD_7
VDDQ_1 VDDQ_2
CK CK
VDDQ_3
CKE
VDDQ_4
CS
VDDQ_6
VDDQ_5 ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9 NC_1 NC_2
RESET
NC_3 NC_4
F3
A1
A1
A8
A8
C1
C1
C9
C9
D2
D2
E9
E9
F1
F1
H2
H2
H9
H9
J1
J1
J9
J9
L1
L1
L9
L9
T7
T7
A9
A9
NC_6
DQSL
VSS_2
DQSU
VSS_3 DML
VSS_4
DMU
VSS_5 VSS_6
E3 F2 F8 H3 H8 G2 H7
VSS_7
DQL0 DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
CAS
C2 A7 A2 B8 A3
T7
ARA[14]
VDDQ_2
CK CK
VDDQ_4 VDDQ_6
CS ODT
VDDQ_8
RAS
VDDQ_9
CAS
A9
M2
B3
M3
E1
J7
G8
K7 K9
J2
L2
J8
K1
M1
J3 K3 L3
M9
T2
P1
WE NC_1 NC_2
B3
E1
E1
G8
G8
J2
J2
J8
J8
RESET
P9
NC_3 NC_4
F3 DQSL
M1
M1
M9
M9
P1
P1
P9
P9
T1
T1
T9
T9
VSS_1
DQSU
VSS_2
DQSU
G3
T1
C7
T9
B7
VSS_3 DML DMU
VSS_8
DQL1 DQL2
VSS_10
DQL3
VSS_11
DQL4
VSS_12
VSSQ_1 VSSQ_2
DQU0 DQU1
VSSQ_3 VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
B1
B1
B9
B9
D1
D1
D8
D8
E2
E2
E8
E8
F9
F9
G1
G1
G9
G9
VSSQ_9
DQU7
DDR_SS
NC_4
B9
F2 F8
D1
H3 H8
DQL5
D8
G2 H7
E2
DQL7 VSSQ_1
D7
VSSQ_2
DQU0
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
DQU5
VSSQ_8
DQU6
VSSQ_9
DQU7
VDD_1 VDD_2
ARA[11]
ARA[11] R7
A10/AP
R7
VDD_3
A12/BC
VDD_4
ARA[13]
ARA[12] N7 ARA[13] T3
A11
ARA[12]
A13
VDD_5
A15
M3
K3
/ARCAS
/ARCAS
L3
J3
/ARRAS
/ARRAS
K3
K1
ARODT
ARODT
L3
/ARWE
/ARWE
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
R719 1K 1%
R9
DQSU
VSS_2
DQSU
CS
VDDQ_6
VSS_3
E7
ODT
VDDQ_7
D2
RAS
VDDQ_8
CAS
VDDQ_9
IC105 LGE2112
E9 F1 H2
+1.5V_DDR
H9 IC703-*1 NT5CB128M16BP-DI
DML
VSS_4
E8
C3 C8
F9
C2 A7
G1
A2 B8
G9
A3
ARDQM0
D3
NC_2 NC_4
DQSL
ARDQM1
DMU
VSS_5
ARDQ[16-23]
ARDQ[0-7]
VSS_6
E3 DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9 VSS_10
DQL3
VSS_11
DQL4
VSS_12
DQL5
F7 F8 H3 H8 G2
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
DQU5
VSSQ_8
DQU6
VSSQ_9
DQU7
F7 F2 F8
ARDQ[20]
H3
ARDQ[21]
H8
ARDQ[22]
G2
ARDQ[23]
H7
H7 ARDQ[24-31]
D7 DQU0
E3
ARDQ[19]
ARDQ[8-15]
VSSQ_2
ARDQ[16] ARDQ[17] ARDQ[18]
F2
DQL7 VSSQ_1
D3
C3 C8 C2 A7 A2 B8
ARDQ[24]
P7
L1
N2
L9
P2
T7
P3 P8 R8
ARA[14]
R2 T8 R3 L7
DQSU
VSS_1
DQSU
VSS_2 VSS_3
DML
VSS_4
DMU
VSS_5
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C3
ARDQ[26]
C8
ARDQ[27]
C2
ARDQ[28]
A7
ARDQ[29]
A2
ARDQ[30]
B8
ARDQ[31]
A3
A3
N7
A9
T3
B3
M7
E1
M2 N8
G8
M3
P7
A1
P3
A2
H1
J2
A4
P8
A5
P2 L8
J8
K9
M1
R2 T8
A8
B2 VDD_1
A9 A10/AP
VDD_2
A11
VDD_3
A12
VDD_4
NC_6
VDD_5
NC_5
VDD_7
BA0
VDD_9
VDD_6 VDD_8
J3 K3
P1
L3
VDDQ_1 VDDQ_2
CK CK
VDDQ_3
CKE
VDDQ_4
CS
VDDQ_6
VDDQ_5 ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9 NC_1 NC_3 NC_4
F3
E7
B1
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
K9
E9
K1
H2
J3
H9
K3
D3
B9
J9
D1
F2 F8
D8
H3 H8
E2
G2 H7
E8
VSS_3 VSS_5 VSS_6 DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
G1
C2
G9
A2
C8 A7
VSSQ_9
B8 A3
DDR_NANYA
VDD_1 VDD_2
A11
VDD_3
A12/BC
VDD_4 VDD_5 VDD_6
NC_5
VDD_7
BA0
VDD_9
VDD_8
D9
B3
G7 K2
C3
K8 N1
AC3
N9 R1
AC4
R9
A1 VDDQ_1 VDDQ_2
CK CK
VDDQ_3
CKE
VDDQ_4
CS
VDDQ_6
VDDQ_5 ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
NC_3 NC_4
TP700
C1 C9
D3
M1
F7
P1
F2
P9
F8
T1
H3
T9
H8 G2 H7
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
VSS_2 VSS_3
DML
VSS_4
DMU
VSS_5
DQL0
VSS_7
VSS_6
E3
M9
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
RVREF_A RVREF_B
D2
B9
DQL5
VSS_12
F1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
VSSQ_2
DQU0 DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6 VSSQ_7
DQU5
VSSQ_8
DQU6
H9
G21
ARDQ0
DDRV_5
ARDQ1
DDRV_8
ARDQ2
DDRV_10
ARDQ3
DDRV_4
ARDQ4
DDRV_7
ARDQ5
DDRV_46
ARDQ6
DDRV_47
ARDQ7 ARDQM1
MEMTN
ARDQS1 ARDQS1
RVREF_B
ARDQ8
RVREF_A
ARDQ9
J9
ARDQ10
L9 T7
ARDQ11
F10
ARCKE
ARDQ12
ARCKE
B3 E1 J2
C9
/ARCLK1
J8
ARDQ13
D9
ARCLK1
G8
P1
ARCLK1
ARDQ14
ARCLK1
ARDQ15
ARCLK0
ARDQM2
ARCLK0
ARDQS2
A20
ARCLK0
P9 T1
A21
/ARCLK0
T9
D1
F17
/ARRAS
D8 E2
E17
/ARCAS
E8
RVREF_A
F9 G1
R730 1K 1%
G9
E16
/ARCS
C746 0.1uF
D14
/ARWE
R731 1K 1%
C747 0.1uF
ARODT
ARDQ16
ARRAS
ARDQ17
ARCAS
ARDQ18
ARCS
ARDQ19
ARWE
ARDQ20 ARDQ21
B14
ARREST
DDR_SS
ARRESET
ARDQ22
ARBA0
G11 D16
ARBA0 ARDQM3
ARBA2
ARDQS3 ARDQS3
ARCSX
+1.5V_DDR ARA[14]C15 ARA[13]A15
RVREF_B R732 1K 1%
R733 1K 1% +1.5V_DDR
C726 0.1uF
C728 0.1uF
C705 1uF
C17 D24 C16 C24 D15
ARDQM1
B20
ARDQS1
C20
ARDQ[8-15]
/ARDQS1
A17 A23 D17 B23 D20 D22 D19 C22
C748 0.1uF
C749 0.1uF
C707 10uF 10V
ARDQM2
B9
ARDQS2
A9
/ARDQS2
C12
ARDQ[16-23]
D6 B12 C5 C13 A5 A12 B5 E10
ARBA1
F18
C724 0.1uF
D23
ARDQ23
A13
ARBA2
C722 0.1uF
ARDQ[0-7]
/ARDQS0
B17
A7
ARDQS2
E18
ARODT
+1.5V_DDR
B9
ARBA1
C720 0.1uF
ARDQS0
C23
M1 M9
DDR_HYNIX
C718 0.1uF
ARDQM0
C21 B21
D21 MEMTP
L1
VSSQ_9
DQU7
DDR_NANYA
DDR_HYNIX
DDRV_2
G13
H2
B1 VSSQ_1
D7
D1
G9
TP701
DQL6 DQL7
B1 VSSQ_1 VSSQ_2
DQU0
VSS_1
DQSU
J2
ARDQS0
A9 DQSU
E7
J8
ARDQS0
DDRV_1
E9
NC_6
DQSL
C7 B7
E1 G8
ARDQM0
DDRV_45
G10
A8
J1 NC_1 NC_2
F3
B3
C19 DDRV_44
BA1
L9
DQL6 DQL7
C3
D4
DQSL
VSS_4
D7
F9
A9 A10/AP
RESET
T7
C4
B2
T2
G3
VSS_1 VSS_2
DML
E3 F7
L8 ZQ
WE
L1
B4
A7 A8
L2
F1
A9 DQSU DQSU
DMU
VSSQ_1 VSSQ_2
K7
C9 D2
NC_7
DQSL
A5 A6
J7
DQSL C7 B7
DQL7
VREFDQ
A3 A4
BA2
A8
A4
H1
A13
L3
NC_2
A1 A2
M2
C1
A3
VREFCA
A0
M7
R1 R9
J1
T1
DQL6
DQU0
N7 T3
N1 N9
N8
RESET
G3
L7 R7
K2 K8
M3
T2
T9
D9 G7
A1
WE
P9
R3
BA1
L2 K1
M9
R8
ZQ
A6 A7
J7 K7
N2
VREFDQ
A3
M8
N3
VREFCA
A0
BA2
VSS_6
D7
ARDQ[25]
AC1 AC2
M8
N3
J9
NC_6
E7
ARDQM3
IC703-*2 K4B2G1646C-HCK0
J1 NC_1
R7
ARDQM2
C734 0.1uF
C9
DQSL
B7
/ARDQS3
/ARDQS1
C704 10uF 10V
A8
C7
ARDQS3
ARDQS1
B7
C702 1uF
C1
VDDQ_5
F3
/ARDQS2
/ARDQS0
C7 VSS_1
C757 0.1uF
A1
RESET
G3
C755 0.1uF
R1
WE
ARDQS2
ARDQS0
G3
C753 0.1uF
N9
VDDQ_1
T2
ARREST
ARREST
N1
BA1
L2
/ARCS
/ARCS
J3
K9
C745 0.1uF
C733 0.1uF
R718 1K 1%
VDD_9
J7 K7 ARCKE
/ARCLK1
/ARCLK0
C751 0.1uF
+1.5V_DDR
+1.5V_DDR
A_RVREF3
K8
BA2
R714 100 5%
R712 100 5% ARCKE
C701 10uF 10V
K2
VDD_8 BA0
ARCLK0
K7
K1
M3
ARBA2
ARBA2
K9
N8
C736 0.1uF
G7
VDD_7
M2
ARBA1
ARCLK1
ARBA1
R721 1K 1%
D9
VDD_6
M7
N8
C703 1uF
B2
T3
ARBA0
C758 0.1uF
+1.5V_DDR
N7
F3 DQSL
B1
F7
DQL6
DQU2
A9
1% 240 R716
ZQ
A7
NC_3
DQL6
E3 DQL0
VSS_9
ARA[9]
L8
A6
NC_3
D3
VSS_6 VSS_7
R3
ARA[9] R3 ARA[10] L7
A8
T2
E7
VSS_4 VSS_5
ARA[8]
DQSL
M7
CKE
VDDQ_5 VDDQ_7
ARA[6] R8 ARA[7] R2
ARA[8]
RESET
NC_2
NC_6
N8
VDDQ_3
NC_7
B3
VSS_12
DQL5 DQL7
C3
R3 L7
A5
A_RVREF3
ARA[6]
ARBA0
C756 0.1uF
VREFDQ
A4
ARA[7]
ARA[10]
C754 0.1uF
C735 0.1uF
R720 1K 1%
H1
A3
T8
WE NC_1
R7
BA2
DQL6
D7 C8
R2 T8
DQSL VSS_1
DQSU
E7
F7
L9
A2
R2
L7
A_RVREF2
T3
BA0
VDDQ_1
DQSL C7
D3
L1
P2 R8
NC_5
VDD_8 VDD_9
J9
N2 P8
VREFCA
A1
ARA[3] N2 ARA[4] P8 ARA[5] P2
T8
C752 0.1uF
M8 A0
R8
L2
VDDQ_6
J1
P7 P3
ARA[5]
J7 CK
VDDQ_2
N7
A12
VDD_5 VDD_6
BA1
T2
B7
A11
VDD_4
BA1
WE
G3
A6 A7
B2
A9 A10/AP
L2
L3
ZQ
A7 A8
BA2
K1
A3 A5
L8
ZQ
A6
J7
J3
A0 A2
VREFDQ
A4
NC_5
K7
N3 VREFCA
A1
A13
K9
H1
VREFDQ
A3 A4
M2 N8
M8
H1
A1 A2
M7
M3
M8 VREFCA
A0
ARA[4]
P2
BA2
VDDQ_9 N3
ARA[3]
P8
M2
A1
C9
ARA[2]
N2
M7
VDD_8 BA1
C1
P3
ARA[0] N3 ARA[1] P7 ARA[2] P3
A15
VDD_7
C716 0.1uF A8
ARA[0] ARA[1]
A13
VDD_5
VDD_9
R709 1K 1%
N3 P7
C750 0.1uF
ARA[0-13]
ARA[0-13]
+1.5V_DDR
+1.5V_DDR
ARDQ24 ARDQ25
ARA14
ARDQ26
ARA[12]F13 ARA[11]C14
ARA13
ARDQ27
ARA12
ARDQ28
ARA[10]F11 ARA[9] E15
ARA11
ARDQ29
ARA10
ARDQ30
ARA[8] D13 ARA[7] B15
ARA9
ARDQ31
ARA[6] E14 ARA[5] F16
ARA7 ARA6
AVDD33_MEMPLL
ARA[4] E13 ARA[3] B13
ARA5
AVSS33_MEMPLL
ARA[2] A14 ARA[1] F14
ARA3 ARA2
DVSS_50
ARA[0] F15
ARA1
DVSS_48
ARDQM3
C8
ARDQS3
D8
ARDQ[24-31]
/ARDQS3
C6 D10 D7 C11 C7 C10 B7 B10
AVDD3V3_MEMPLL
ARA8 N14
+3.3V_NORMAL
AVDD3V3_MEMPLL
N15
L700 BLM18PG121SN1D
ARA4 R1 C700 0.1uF
P21
ARA0 ARA[0-14]
+1.5V_DDR
C717 0.1uF
C719 0.1uF
C721 0.1uF
C723 0.1uF
C725 0.1uF
C727 0.1uF
C706 1uF
C708 10uF 10V
IC105 LGE2112 RVREF_C RVREF_D P13 V7
F3
/BRCLK0
V3
B_RVREF6 +1.5V_DDR A0
VREFCA R702 1K 1%
A1
B_RVREF5
C709 0.1uF
A2
H1
A3
VREFDQ
A4 R703 1K 1%
R711
C710 0.1uF
1% 240
A5
L8
A6
ZQ +1.5V_DDR
A7 A8
B2 D9 +1.5V_DDR
G7 K2
B_RVREF6 R704 1K 1%
K8
C711 0.1uF
N1 N9 R1
R705 1K 1%
R9
A9
VDD_1 VDD_2
A10/AP
VDD_3
A11 A12/BC
VDD_4 VDD_6
C1 C9 D2 E9 F1 H2 H9 IC702-*1 NT5CB128M16BP-DI N3
M8 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
VREFCA
A0
VDD_1 VDD_2
A11
VDD_3
A12/BC
VDD_4 VDD_5 VDD_6 VDD_7 VDD_8
BA0
CK
VDDQ_2
CK
VDDQ_3 VDDQ_4 VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
K2 K8 N1 N9 R1 R9
VDD_1
A9
VDD_2
A10/AP
VDD_3
A12 NC_6
VDD_6 VDD_7
BA1
A8 C1 C9 D2 E9 F1 H2
A8 C1 C9 D2 E9 F1 H2 H9
H9 J1
NC_1
T2
NC_2
RESET
NC_3 NC_4
F3
J9 L1 L9
J9 L1 L9 T7
VDDQ_1 VDDQ_2 VDDQ_3
CK CKE
VDDQ_5 VDDQ_6
P8 R8
VDDQ_7
ODT
VDDQ_8
RAS
VDDQ_9
CAS
NC_1
CK
VDDQ_3
CK
VDDQ_4
CKE
VDDQ_5 CS
VDDQ_7
ODT
VDDQ_8
RAS
VDDQ_9
CAS
B7
VSS_2
DQSU
VSS_3
E7 D3
DML
VSS_4
DMU
VSS_5
DQL0
VSS_7
VSS_6
E3 F7 F2 F8 H3 H8 G2 H7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C2 A7 A2 B8 A3
M1 M9 P1 P9 T1
J2 J8 M1 M9 P1 P9 T1 T9
T9
VSS_2
M2
G8
N8 M3
J2 J8
K7 K9
M1 M9
K1 J3
P1
K3 L3
P9 T1
VSS_4
DML DMU DQL0 DQL1
VSS_9
DQL2
VSS_10
DQL3
VSS_11
DQL4
VSS_12
DQL5 DQL6
B1 VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9 D1 D8 E2 E8 F9 G1 G9
DDR_SS
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
B9 D1 D8 E2 E8 F9 G1 G9
VSSQ_1
DQSU
VSS_2
DQSU
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
DQU5
VSSQ_8
DQU6
VSSQ_9
DQU7
R8
T8
BRA[8]
A6
R3
BRA[9]
BRA[7] R2 BRA[8] T8
L7
BRA[10]
A8
R7
BRA[11]
BRA[9] R3 BRA[10] L7
A9
VDD_1
N7
BRA[12]
A10/AP
VDD_2
T3
BRA[13]
BRA[11] R7 BRA[12] N7 BRA[13] T3
A12/BC
VDD_4
A13
VDD_5
N8 M3
DML
K9
K1 J3 K3 L3
G3
D3
B9 D1
F7 F2
D8
F8 H3
E2
H8 G2
E8
H7
F9 C3
G1
C8 C2 A7
G9
B7
D3
DMU
VSS_5
BRBA1
BRBA0
BRBA2
BRBA1
BRCLK0
BRBA2
BRCLK1 R713 100 5% BRCKE /BRCS
/BRCLK1 /BRCS
BRODT
BRODT
/BRRAS
DQL0 DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10 VSS_11
DQL4
VSS_12
DQL5
/BRCAS
/BRRAS
/BRWE
/BRCAS
BRREST
BRDQS0 BRDQS2
/BRDQS0
BRDQS3
/BRDQS1 BRDQM0
BRDQM2
BRDQM1
BRDQM3 BRDQ[16-23]
F7
BRDQ[16] BRDQ[17]
F2
BRDQ[18]
F8
BRDQ[19]
H3
BRDQ[20]
H8
BRDQ[21]
G2
BRDQ[22]
H7
BRDQ[23] D7
DQU0
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
DQU5
VSSQ_8
DQU6 DQU7
VSSQ_9
A2 B8
VDD_3
VDD_6 VDD_7 VDD_8 BA0
K1 K3 L3
R728 1K 1%
D9 G7
B_RVREF8
K2
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4 VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
K8
NC_1 RESET
NC_2 NC_4
F3 DQSL
N9 R723 1K 1%
R1 R9
D2 E9
VSS_3 DML
VSS_4
DMU
VSS_5 VSS_6
E3 F2 F8 H3 H8 G2 H7
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
F1
BRDQ[24-31]
C3
BRDQ[24]
C8
BRDQ[25]
N3
L1
P3
L9
P8
T7
R8
C2
BRDQ[26]
A7
BRDQ[27]
A2
BRDQ[28]
B8
BRDQ[29]
A3
BRDQ[30]
B8
BRDQ[31]
A3
C3 C8 C2 A7 A2
E1 G8 J2 J8 M1 M9 P1 P9 T1
P7 N2 P2
BRA[14]
R2
R7 N7 T3
A0
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
A3
M5
BRA[10]
P4
BRA[9]
M3
BRA[8]
L6
BRA[7]
L3
BRA[6]
N4
BRA[5]
K5
BRA[4]
N6
BRA[3]
N2
BRA[2]
M1
BRA[1]
N3
BRA[0]
K6
T9
M3
P3 H1 VREFDQ
A4 A6
P2 L8 ZQ
T8
A8 VDD_1
A10/AP
VDD_2
A11
VDD_3
A12
VDD_4
NC_6
VDD_5 VDD_6 VDD_7 VDD_8
BA0
J3 L3
N7 T3
N9 R9
VDDQ_2 VDDQ_4 VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
NC_2 NC_4
F3 DQSL
E9
L2 K1
H2
J3
H9
K3
J9
T7
D1 D8 E2 E8
VSS_1 VSS_3
DMU
F7 F2 F8 H3 H8 G2 H7
VSS_4 VSS_5 VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
G1 G9
C8 C2 A7 A2 B8
VDD_4
A13
VDD_5
NC_5
VDD_7
BA0
VDD_9
VDD_6 VDD_8
D9
VDDQ_1 CK
VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9 NC_1 NC_2 NC_4
F3
B3
B7
E1 G8
E7
J2
D3
R9
V6
M9
F7 F2
P9
F8
T1
H3
T9
H8 H7
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
DQSU
VSS_1
DQSU
VSS_2
DML
VSS_4
VSS_3 VSS_5 VSS_6 DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
A8 C1
B9
D7
D1
C3
D8
C8
E2
C2
E8
A7
F9
A2
G1
B8
G9
A3
H10
C9 D2
H13
E9 F1
E20
H2 H9
F20
J1
G20
J9 L1
G15
L9 T7
G18
B3
C25
E1 G8
B25
J2 J8
A25
M1 M9
H7
P1 P9
H8
T1 T9
J8
BRDQM0 BRDQS0 /BRDQS0
BRDQ[0-7]
J1 B2 J2 C2 K1
BRDQM1
A2
BRCAS
BRDQS1
K2
BRCS
BRDQS1 BRDQ8
BRBA0
BRDQ9
BRBA1
BRDQ10
BRBA2
BRDQ11 BRDQ12 BRDQ13 BRDQ14
BRA14
F2 J3
BRDQM1 BRDQS1 /BRDQS1
BRDQ[8-15]
B1 H3 D3 G3 C1 G4 D2
BRDQ15
BRA13
Y1
BRA12
BRDQM2
BRA11
BRDQS2
BRA10
BRDQS2
BRA9
BRDQ16
BRA8
BRDQ17
BRA7
BRDQ18
BRA6
BRDQ19
BRA5
BRDQ20
BRA4
BRDQ21
BRA3
BRDQ22
BRA2
BRDQ23
BRA1
V2 V1 T4
BRDQS3 BRDQ24
DDRV_11
BRDQ25
DDRV_13
BRDQ26
DDRV_38
BRDQ27
DDRV_42
BRDQ28
DDRV_40
BRDQ29
DDRV_14
BRDQ30
DDRV_18
BRDQ31
DDRV_23
BRDQ[16-23]
/BRDQS2
P2 AB3 P3 AB1 P1 AB2
W3 W4 AA3
BRDQM3 BRDQS3 /BRDQS3
BRDQ[24-31]
U4 AA4 T3 Y3 U3 Y2 U2 M2
BRRESET
DDRV_39
BRDQM2 BRDQS2
AB4
U1 BRDQM3 BRDQS3
DDRV_41
F1
+1.5V_DDR
BRREST
E23
DDRV_48
DDRV_16
DDRV_19
DDRV_22
DDRV_24
DDRV_29
DDRV_49
DDRV_21
DDRV_36
DDRV_28
DDRV_37
DDRV_17
DDRV_43
DVSS_15
DDRV_35
DVSS_23
DDRV_32
DVSS_1
DDRV_33
DVSS_3
DDRV_15
DVSS_5
DDRV_20
DVSS_9
DDRV_27
DVSS_16
DDRV_25
DVSS_24
DDRV_26
DVSS_31
DDRV_12
DVSS_32
DDRV_9
DVSS_19
DDRV_6
DVSS_2
DDRV_3
DVSS_4
DDRV_30
DVSS_6
DDRV_31
DVSS_10
F24 G24 F23 G23 E24 E12 F12 A18 B18 C18 D18 E19 F19 G19 G22 E25 A26 B26 C26 D26
DDRV_34
DQL6 DQL7
B1
J10
D25
E3
P1
P7
A9
DMU
J8 M1
N7
N9 R1
NC_6
DQSL
AC6
K8 N1
A1
CK
G7
G7 K2
BA1
NC_3
G2
VSSQ_1
D7 C3
VDD_2 VDD_3
A12/BC
RESET
C7
DQL6 DQL7
F9
B2 VDD_1
A10/AP A11
T2
A9
AC5 F7
A8 A9
DQSL
VSS_2
E3
ZQ
A6 A7
L9 G3
DQSU
DML
L8
WE
L1
T6
A4 A5
CKE
F1
NC_7
DQSU E7 D3
K9
D2
J1 NC_1
RESET
J7 K7
L3
WE T2
A8 C9
H1 VREFDQ
BA2
C1
G6
A1
D1
BRRAS
BRCSX
U6
A2 A3
M2 M3
VDDQ_3
VREFCA
A0 A1
M7
R1
A1
CK
L2
K3
R7
K8 N1
N8
CK CKE
K1
R3 L7
G7 K2
VDD_9
VDDQ_1
J7 K9
B2 D9
BA1 BA2
K7
R8 R2
A7 A9
N2 P8
A5
M2
G3
B9
BRODT
G5
E6 M8
N3 P7
A2 A3
NC_5
N8
VREFCA
A1
M7
A3
DDR_NANYA
M8
NC_3
B1 VSSQ_2
BRA[11]
F6
J9
B7
DQU0
N5
U5 IC704-*2 K4B2G1646C-HCK0
DQSL
D7
BRA[12]
V5 IC704-*1 NT5CB128M16BP-DI
C7
VSSQ_1
M4
T5
H9
DQL6 DQL7
BRA[13]
BRDQ6
E4 E3
BRDQ7
BRWE L5
E5
H2
B3
BRDQ5
D5
R3
E7
C744 0.1uF
BRDQ4
L4
+1.5V_DDR
T8
VSS_2
C743 0.1uF
BRDQ3
BRCLK1
BRA0
C9
A9 VSS_1
DQSU
F7
C738 0.1uF
C1
NC_6
DQSU
K4
/BRWE BRA[14]
A8
DQSL C7
D3
R729 1K 1%
N1
J1
T2
B7
C737 0.1uF
R722 1K 1%
A1
WE
G3
RVREF_D
BA1 VDDQ_1
P5
BRBA1
BRA[0-14]
VDD_9
L2 J3
C740 0.1uF
+1.5V_DDR
L7
BRDQS1
BRDQ[8-15]
VSSQ_2
A11
BA2
K9
C742 0.1uF
BRDQ1
BRCLK1
N1
BRBA0
+1.5V_DDR
B2
NC_3
DQL7 VSSQ_1
M3
K7 BRCKE
/BRCLK0
E3
VSS_7
A7
K3
/BRCS
+1.5V_DDR
M2 N8
1% 240 R717
ZQ
J7
R715 100 5%
BRDQ[0-7]
VSS_6
L8
A15
K7
E7
VSS_4
A5
H5
BRBA2 R725 1K 1%
VREFDQ
A4
H4
BRDQ0 BRDQ2
H6
/BRCAS
H1
A3
M7 BRBA0
/BRDQS3
VSS_3
B1
D7 DQU0
P2
BRA[6]
C7 VSS_1
B7
DQL7 VSSQ_2
P8
BRA[5]
F3
DQL6
E3
VSS_7 VSS_8
N2
BRA[4]
BRREST DQSL
A2
BRA[3]
NC_3 NC_4
B_RVREF7
BRA[6]
RESET
NC_2
G3
E7
VSS_5
BRA[4]
/BRDQS2
E1
DQSU
VSS_6
A1
BRA[5]
DQSL
B3
M7
T9
VSS_3
B1
DQL7
C3
G8 J2 J8
E1 G8
DQL6
D7 C8
B3 E1
P3
/BRWE
A9
N7
F3
DQSU
BRA[2]
BRA[7]
T2
C7 VSS_1
BRA[3]
R727 1K 1%
BRCLK0
BRCKE
/BRRAS
C741 0.1uF
C739 0.1uF
R724 1K 1%
VREFCA
R2
P2
WE NC_1
NC_6
T3
NC_3
A9 B3
A0
M8
R8
P8
L2
VDDQ_6
DQSL A9
VSS_1
DQSU
BRA[2]
J7
VDDQ_2
DQSL C7
R726 1K 1% B_RVREF7
BRA[0] N3 BRA[1] P7
L7 R7
T2
DQSL
VDDQ_1
T8
RESET
NC_4
BRA[0-13]
R3
WE NC_2
BRA[14]
T7
N2
BA2
R2
L2 CS
L9
P2
J7 CK
VDDQ_4
NC_7
T7
P3 N2
BA2
NC_6
DQSL
BA0
L1
P7
NC_5
VDD_8 VDD_9
R9
A11
VDD_4 VDD_5
J1
WE
G3
R1
D9 G7
A1
CKE
K3
N1 N9
A1 VDDQ_1
L2
L3
K2 K8
VDD_9
BA2
K1
D9 G7
BA1
J7
J3
A8
B2 B2
A9 A10/AP
A6 A7
A7
NC_5
K7
A5 ZQ
L8 ZQ
A8
A3 A4
L8
A5 A6
M2
K9
VREFDQ
H1 VREFDQ
A4
A13
N8
A2
H1
A3
A0 A1
A1 A2
M7
M3
VREFCA
M8
N3
P3
M2
J1 J9
BRA[1]
M7
BA0 BA1
A8
BRA[0]
P7
A15
VDD_7 VDD_8 VDD_9
C712 0.1uF
N3
A13
VDD_5
A1
IC702-*2 K4B2G1646C-HCK0
B_RVREF8
BRA[0-13] M8
B_RVREF5
RVREF_C
+1.5V_DDR
BRDQS0
P6
BRCKE BRODT
IC704 H5TQ2G63BFR-PBC
BRDQS0
V4
BRCLK1
IC702 H5TQ2G63BFR-PBC
BRDQM0
RVREF_D
BRCLK0
/BRCLK1
+1.5V_DDR
G2 RVREF_C
F4
BRCLK0
B1 VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9 D1 D8 E2 E8 F9 G1 G9
DDR_HYNIX DDR_HYNIX
DDR_NANYA
DDR_SS
2011.12.09 DDR ONE SIDE
12
LGE Internal Use Only
FROM LIPS & POWER B/D
PANEL_POWER
L2408 BLM18SG121TN1D
Q2401
R2408
3
GND
3.5V
9
10
3.5V
3.5V
11
12
3.5V
GND
13
14
GND
R2423
0
L/DIM0_VS
POWER_16_VSYNC
GND
15
16
GND/V-sync
12V
17
18
INV ON
R2425 100
12V
19
20
A.DIM
A_DIM
21
22
P.DIM1
GND/P.DIM2
23
24
Err OUT
C2401 0.1uF 50V
25 SMAW200-H24S2 P2401
#16/#20/#23 LD - GND OR USE LE(N.L.D.) - OPEN LE(L.D.) - USE
D
S R2442 10K
MTK_EPI
Q2406 MMBT3904(NXP)
PWM_DIM1 E
+3.3V_NORMAL
R2424 4.7K OPT
ERROR_OUT 22 POWER_24_ERROR_OUT
+5V_Normal R2417 100K
OPT R2413 0 5%
3
+5V_NORMAL
L2407 BLM18PG121SN1D
R2419 100
RESET
2
+12V
R2421 10K OPT
IC2402
DEV_DCDC_TPS54327
POWER_DET
1 C2415 10uF 16V
GND
IC2404 TPS54327DDAR [EP]GND
C2412 0.1uF 16V
POWER_ON/OFF2_3
OPT R2416 100K
+24V
R1
VCC
3
2
2
VREG5
SS
OPT
R2
24V-->3.48V 12V-->3.58V ST_3.5V-->3.5V
GND
6
VIN
VBST
C2429 0.1uF 16V
SW
+3.3V_NORMAL
L2409 3.6uH
L2413 BLM18PG121SN1D CN
NR8040T3R6N
R2418 100
RESET
7
3
C2416 100pF 50V
1
C2410 0.1uF 50V OPT
VFB
56K
NCP803SN293
R2411 1.5K 1% OPT
8
1
R2415
not to RESET at 8kV ESD OPT IC2401
R2412 8.2K 5% OPT
EN
C24001 0.1uF 16V
1%
9
R2435 10K
THERMAL
C2411 0.1uF 16V
R2409 1.2K 1%
+3.5V_ST
NCP803SN293 VCC
On-semi
C B
C2443 0.1uF 50V
R2405
+3.5V_ST
R2410 2.7K 1%
R2437 10K
PANEL_CTL
Power_DET +12V
R2442-*1 33K
+3.3V_NORMAL R2426 1K INV_CTL
C2440 1uF 25V OPT
1/8W 2K
8
1/8W 2K PANEL_DISCHARGE_REG R2452
7
G C2435 4.7uF 50V
PANEL_DISCHARGE_REG R2451
GND
C2413 0.1uF 50V
R2441 1.8K
GND
MTK_EPI
6
0
PWM_DIM2
5
12V
+12V L2401 CIS21J121
GND
L2403 CIS21J121
POWER_24_GND
C2406 0.1uF 16V
24V 24V
R2422
L2402 CIS21J121
2 4
R2441-*1 5.6K
PWR ON 1 24V 3
C2432 0.01uF 50V
PANEL_VCC
Q2407 AO3407A
C2433 0.1uF 50V
+24V
MTK_NON_EPI
OPT P2400 FW20020-24S
2
R2420 0
1
10K R2401 10K
POWER_16_GND
RL_ON
+3.5V_ST
TYP 1450mA
+12V
MMBT3906(NXP)
MTK_NON_EPI
+3.5V_ST
R2439 10K 1%
4
3A
5
GND
C2430 22uF 10V
+3.3V_TU_IN
+3.5V_ST
POWER_ON/OFF1 POWER_ON/OFF2_1 POWER_ON/OFF2_2 POWER_ON/OFF2_3 POWER_ON/OFF2_4
L2412
C2428 3300pF 50V
C2417 1uF 10V
C2436 0.1uF 16V
BLM18PG121SN1D NON_CN
DDR MAIN 1.5V +1.2V_MTK_CORE
C2418 10uF 10V
C2419 0.1uF 16V
2
GND_1
3
GND_2
BOOT 13
EN
R2404
PWRGD 14
PH_3
11
PH_2
10 IC2403 TPS54319TRE 9
PH_1
4
THERMAL 17
3A
AGND
C2422
SS/TR
C2424 10uF 10V
C2425 10uF 10V
C2446 10uF 10V
0.01uF 50V
C2427 0.1uF 16V
C2447 10uF 10V
R2432 1/16W 330K 5% R2431 15K
Vout=0.8*(1+R1/R2)
1/16W
VBST
14
13
5%
R1
C2421 4700pF
C2426 100pF 50V
SW2 C2434 0.1uF 50V
1
12
NR8040T3R6N
R2434
C2448 10uF 10V
12
1
C2431 10uF 16V
L2406 3.6uH
47K 1%
R2
VIN1
8
POWER_ON/OFF1
VIN_1 VIN_2
VIN2
16V
RT/CLK
R2403 10K
L2405 BLM18PG121SN1D
R1
5
C2404 0.1uF 16V
C2405 4700pF 50V
7
R2402 3.3K
IC2405 TPS54425PWPR
[EP]PGND
3.4 A
+3.3V_NORMAL
C2423 0.1uF +1.5V_DDR
COMP
COMP
5.6K 1%
EN
C2441 3300pF 50V OPT
VIN_3
5
C2414 10uF 10V
15
6
4
C2409 10uF 10V
6
3
C2408 10uF 10V
VSENSE
FB
C2407 10uF 10V
1%
C2403 0.1uF 16V OPT
NC_1
OPT R24000
R2406 10K
C2402 10uF 16V
7
L2410 BLM18PG121SN1D
0.1uF 16V
+3.5V_ST
NC_2
MAX
+3.3V_NORMAL THERMAL
AGND
C2400 10uF 16V
2
9
VIN
8 THERMAL
Placed on SMD-TOP
1
+12V C2420
[EP]LX
*NOTE 17 PGND
EP[GND]
IC2400 AOZ1038PI
16
L2400 BLM18PG121SN1D
L2404 2uH
15
10K R2430
POWER_ON/OFF2_1
+12V
2
VO
R2 R2428 10K
VFB
1% 3
4A 11
4
10
5
VREG5
SS
C2438 1uF 10V
R1 SW1
PGND2
PGND1
9
6
8
7
GND
PG
EN
50V
R2407 100K
R2427 33K 1%
C2439 3300pF 50V
R2414
10K
C2437 0.1uF
POWER_ON/OFF2_2
C2445 22pF 50V
+3.3V_NORMAL L2411 2uH
3A
$ 0.145
R2433 56K 1/16W 1%
R2 C2442 22uF 10V
C2444 22uF 10V
Vout=0.827*(1+R1/R2)=1.521V Vout=(0.763+0.0017*Vout.set)*(1+R1/R2)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
MID_POWER
2011.11.25
24
LGE Internal Use Only
Renesas MICOM
+3.3V_NORMAL
R3035 4.7K OPT
For Debug
12V_EXT_PWR_DET
+3.5V_ST
LOGO_LIGHT_MICOM
COMMERCIAL_12V_CTL_MICOM
P120/ANI19
23
22
21
20
19
SIDE_HP_MUTE MODEL1_OPT_4 MODEL1_OPT_3
For Sample Set
P146
P147/ANI18
P11/SI00/RXD0/TOOLRXD/SDA00
P13/TXD2/SO20
P12/SO00/TXD0/TOOLTXD
10K
P14/RXD2/SI20/SDA20
P15/PCLBUZ1/SCK20/SCL20
P16/TI01/TO01/INTP5
For JAPAN
P17/TI02/TO02
P51/INTP2/SO11
For LOGO LIGHT
Eye Sensor Option
AMP_MUTE
EXT_AMP_MUTE
R3034 4.7K OPT
SOC_RX
+3.3V_NORMAL
INV_CTL
GP4_HIGH
SOC_TX
GED
10K OPT
R3019 3.3K
POWER_DET
NON_GED
18
P27/ANI7
17
25 16
12 15
P26/ANI6
LOGO_LIGHT_MICOM
MODEL_OPT_6
R3036
MODEL1_OPT_0
26
LOGO_LIGHT_MICOM
MICOM_NON_LOGO_LIGHT R3013 10K
MICOM_TACT_KEY R3008 10K
MICOM_NON_JAPAN R3010 10K
MICOM_LCD/OLED R3006 10K
MICOM_GP3_12/15PIN R3031 10K
MICOM_NON_MHL R3021 10K
MICOM_NON_GED R3017 10K
MHL
+3.3V_NORMAL
MODEL1_OPT_1
27
(GP4_TOOL)
NON_MHL
KEY1 MODEL1_OPT_2
11
PDP
MODEL_OPT_5
10K OPT POWER_ON/OFF2_1
10
MODEL1_OPT_5 MODEL1_OPT_6
R3037
KEY2
P70/KR0/SCK21/SCL21
IR Wafer 10Pin
SCART_MUTE
For Japan:LNB_INIT POWER_ON/OFF2_4
P25/ANI5
SOC_RESET
(GP3_Soft touch)
+3.3V_NORMAL RL_ON
P71/KR1/SI21/SDA21
R3022
12/15Pin
MODEL1_OPT_4
P41/TI07/TO07
P24/ANI4
9
LED_B/GP4_LED_R
MODEL_OPT_4
MODEL1_OPT_3
P40/TOOL0
28
POWER_ON/OFF2_3
MICOM
8
13 MODEL1_OPT_2
IR Wafer
38
P23/ANI3
R5F100GEAFB
P50/INTP1/SI11/SDA11
MICOM_OLED_FRC R3005-*2 22K
MICOM_OLED_MAIN R3005-*1 56K
MICOM_LOGO_LIGHT R3012 10K
MICOM_JAPAN R3009 10K
MICOM_TOUCH_KEY R3007 10K
MICOM_PDP R3005 10K
MICOM_MHL R3020 10K
MICOM_GED R3016 10K
MICOM_GP4_10PIN R3030 10K
MODEL_OPT_3
39
29
IC3000
MODEL1_OPT_0 MODEL1_OPT_1
R3024
P22/ANI2
7
1
TOUCH_KEY
RESET
P21/ANI1/AVREFM
30
6
P74/KR4/INTP8/SI01/SDA01
+3.5V_ST
LCD / OLED
40
31
1
P75/KR5/INTP9/SCK01/SCL01
MICOM MODEL OPTION
MODEL_OPT_2
P124/XT2/EXCLKS
P20/ANI0/AVREFP
+3.5V_ST
TACT_KEY
P123/XT1
32
P30/INTP3/RTC1HZ/SCK11/SCL11
NON JAPAN
41
5
MODEL1_OPT_6
MODEL_OPT_1
42
P31/TI03/TO03/INTP4
EEPROM_SDA
LOGO
43
P130
P72/KR2/SO21
JAPAN
44
33
P73/KR3/SO01
NON LOGO
REGC
4
POWER_ON/OFF2_2
MODEL_OPT_0
45
P63
HDMI_CEC
0
46
P01/TO00/RXD1
IR
MICOM MODEL OPTION
47
34
PANEL_CTL
EEPROM_SCL
48
35
P62
MODEL1_OPT_5
R3018 3.3K
SCART_MUTE
3
22
AMP_RESET_BY_MICOM
SOC_RESET
COMMERCIAL_12V_CTL 12V_EXT_PWR_DET
2
R3003
POWER_ON/OFF2_4
EXT_AMP_MUTE
EXT_AMP_RESET
P00/TI00/TXD1
I2C_SDA3
POWER_ON/OFF2_3
3
P140/PCLBUZ0/INTP6
P61/SDAA0 AMP_RESET_N
POWER_ON/OFF2_3
1
4
36
P60/SCLA0 I2C_SCL3
POWER_ON/OFF2_2
2
POWER_ON/OFF2_4
POWER_ON/OFF!
POWER_ON/OFF2_1
C3004 0.1uF 16V
MICOM_RESET_SW SW3000 JTP-1127WEM
10K
14
GP4 High/MID Power SEQUENCE
R3033
VSS
R3032 10K AMP_RESET_BY_MICOM
VDD
+3.3V_NORMAL
P121/X1
C3001
C3000 0.1uF
13
P137/INTP0
12
P122/X2/EXCLK
0.47uF
MICOM_LOGO_LIGHT
11
P10/SCK00/SCL00
10
GND
+3.5V_ST
22
22
R3015
MICOM_RESET
9
270K OPT
22
MICOM_NON_LOGO_LIGHT
37
R3039 LOGO_LIGHT
8
10K
MICOM_DEBUG
6
7
+3.5V_ST
4.7M OPT
EXT_AMP_RESET
5
R3023
R3026
LOGO_LIGHT_MICOM
R3027
for DiiVA
22
MICOM_LOGO_LIGHT
24
R3004
4
32.768KHz
MICOM_DIIVA R3025 22
MICOM_NON_LOGO_LIGHT
3
X3000
COMMERCIAL_12V_CTL_MICOM
COMMERCIAL_12V_CTL 2
MICOM_DEBUG
1
22
C3003
/RST_DIIVA POD_WAKEUP_N FLG_POD_DR R3038
MICOM_RESET
Don’t remove R3014, not making float P40
C3002
/RST_DIIVA
MICOM_DIIVA R3001 22 MICOM_DIIVA R3002 22
R3014 1K
P3000 12507WS-12L
R3011 10K
MICOM_DEBUG
MICOM_DEBUG
8pF
8pF
FLG_POD_DR POD_WAKEUP_N
R3000
COMMERCIAL_12V_CTL_MICOM
10K
HDMI_WAUP:HDMI_INIT
For CEC
POWER_ON/OFF1 EDID_WP
+3.5V_ST
C
MODEL_OPT_4
0
1
Q3000 MMBT3904(NXP) EDID_WP E
MODEL_OPT_2 N/A
R3029 120K
R3028 27K
MC8101_ABOV (TACT_KEY)
G
0
B
D3000 CEC_REMOTE
BAT54_SUZHO Q3001 RUE003N02 HDMI_CEC_FET_ROHM
Copyright ⓒ 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
S
D
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HDMI_CEC
S
CM3231_CAPELLA (GP4 Soft touch)
D
CM3231_CAPELLA (GP3 Soft touch)
G
1
Q3001-*1 SI1012CR-T1-GE3 HDMI_CEC_FET_VISHAY
2012.02.22 MICOM
30
LGE Internal Use Only
5V_HDMI_4_JACK 5V_HDMI_3_JACK BODY_SHIELD R3312 4.7K
EAG62611201
8 7 6 5 4 3 2 1
16
CE_REMOTE
15
0
14
CEC_REMOTE CK-
13
CK-_HDMI4_JACK CK_GND
12
CK+ CK+_HDMI4_JACK HDMI_ARC
D0D0-_HDMI4_JACK D0_GND D0+
11 10 9 8
D0+_HDMI4_JACK
7
D1D1-_HDMI4_JACK
6
D1_GND
5
D1+ D1+_HDMI4_JACK
4
D2D2-_HDMI4_JACK
3
D2_GND
2
D2+ D2+_HDMI4_JACK
1
HDMI_HPD_3_JACK
E
GND DDC_DATA
R3328
100
DDC_CLK
R3329
100
DDC_SDA_3_JACK DDC_SCL_3_JACK
NC CE_REMOTE CEC_REMOTE CKCK-_HDMI3_JACK CK_GND CK+ CK+_HDMI3_JACK D0D0-_HDMI3_JACK D0_GND D0+_HDMI3_JACK D1D1-_HDMI3_JACK D1_GND IC3300 D1+
D2-_HDMI3_JACK
E0
D2_GND
1
8
2
7
VCC C3300 0.1uF 16V
D2+ D2+_HDMI3_JACK
E1
JK3303
UI : HDMI1
JK3301
MMBD6100 D3302
MMBD6100 D3300
M24C02-RMN6T
D1+_HDMI3_JACK D2-
E2
RSD-105156-100
5V_HDMI_3_JACK +5V_NORMAL
5V_HDMI_1_SOC +5V_NORMAL D0+
HDMI_EXT_EDID 3 6
WC
SCL
UI : HDMI3
4
5
SDA
C3302 0.1uF 16V R3337 R3339 47K 47K
R3323 R3325 47K 47K
EDID_WP
RSD-105156-100 VSS
R3319 22 DDC_SCL_1_SOC
DDC_SCL_3_JACK
DDC_SDA_1_SOC
DDC_SDA_3_JACK
HDMI_EXT_EDID R3320 22 HDMI_EXT_EDID
5V_HDMI_4_JACK +5V_NORMAL
A1
A2
A1
5V_HDMI_2_JACK +5V_NORMAL
MMBD6100 D3301
5V_HDMI_1_SOC
MMBD6100 D3303
R3316 1K
BODY_SHIELD C 20 HP_DET
18 17 16 15 14 13
EAG62611201
12 11 10 9 8 7 6 5 4 3 2 1
B
C
R3317 1K
20 HP_DET
HDMI_HPD_2_JACK 19
5V
E 18
GND DDC_DATA DDC_CLK
17 R3314
100
R3315
100
R3304 1K
BODY_SHIELD
16 DDC_SCL_2_JACK
Q3300 R3301 MMBT3904(NXP) 100K
5V
R3305 1K
DDC_DATA DDC_CLK
R3302
100
R3303
100
HDMI_HPD_1_SOC R3321 4.7K HDMI_EXT_EDID
E
C3301 0.1uF 16V
C3303 0.1uF 16V
R3324 R3326 47K 47K
R3338 R3340 47K 47K DDC_SCL_2_JACK
DDC_SCL_4_JACK
DDC_SDA_2_JACK
DDC_SDA_4_JACK
DDC_SDA_1_SOC DDC_SCL_1_SOC
15
NC
B
R3306 4.7K HDMI_INTERNAL_EDID
GND
DDC_SDA_2_JACK
NC 14
CE_REMOTE CEC_REMOTE
13
CKCK-_HDMI2_JACK
12
CK_GND EAG62611201
19
Q3302 R3313 MMBT3904(NXP) 100K
R3318 4.7K
C
C
5V_HDMI_2_JACK
A2
14
9
100
R3300
ARC
11 10
R3309
17
DDC_SDA_4_JACK DDC_SCL_4_JACK
15
12
100
R3331 1K
B
A1
DDC_CLK
R3308
5V
C
18
DDC_DATA
Q3303 R3327 100K MMBT3904(NXP)
HP_DET 19
GND
16
13
20
HDMI_HPD_4_JACK
A1
17
B
E
EAG62611201
18
5V
C
Q3301 R3307 MMBT3904(NXP) 100K
HP_DET 19
C
A2
R3311 1K
20
R3336 4.7K
R3330 1K
BODY_SHIELD
C
A2
R3310 1K
GND
CK+ CK+_HDMI2_JACK D0D0-_HDMI2_JACK D0_GND
11 10 9 8
D0+ D0+_HDMI2_JACK
7
D1-_HDMI2_JACK
6
D1D1_GND
5
D1+ D1+_HDMI2_JACK
4
D2-_HDMI2_JACK
3
D2D2_GND
2
D2+
1
D2+_HDMI2_JACK
UI : HDMI2
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
CEC_REMOTE CKCK-_HDMI1_SOC CK_GND CK+ CK+_HDMI1_SOC D0D0-_HDMI1_SOC D0_GND D0+ D0+_HDMI1_SOC D1D1-_HDMI1_SOC D1_GND D1+ D1+_HDMI1_SOC D2D2-_HDMI1_SOC D2_GND D2+
JK3300
JK3302 RSD-105156-100
CE_REMOTE
RSD-105156-100
D2+_HDMI1_SOC
UI : HDMI4
HDMI 4
2011.10.29 33
LGE Internal Use Only
RGB/ PC AUDIO/ SPDIF
RGB_5V
RGB PC
+5V_NORMAL
RGB_5V
A1 C
8
R3642 2.7K
2.7K VCC
R3645 10K
RGB_EDID E1
E2
VSS
2
7
3
6
4
5
JK3602 2F11TC1-EM52-4F
+3.3V_NORMAL
WC
EDID_WP R3643
SCL
22
SPDIF OUT
RGB_DDC_SCL R3644
SDA
22 RGB_DDC_SDA
C3633 18pF 50V
C3634 18pF 50V
R3615 33
R3620 2.7K OPT
SPDIF_OUT
D3613-*1 5.5V ADUC 5S 02 0R5L ESD_MTK
DSUB_VSYNC D3621 ADUC 5S 02 0R5L 5.5V OPT
D3615 30V OPT
D3613 5.5V ADUC 5S 02 0R5L OPT
C3615 0.1uF 16V
VIN
A
VCC
B
GND
C
Fiber Optic
1
4 SHIELD
R3641 IC3600 M24C02-RMN6T E0
RGB_EDID
A2 MMBD6100 D3620
D3622 ADUC 5S 02 0R5L 5.5V OPT
DSUB_HSYNC D3616 30V OPT
RGB_DEBUG R3602 100 DSUB_B+
SOC_RX RGB_DEBUG R3647 100
PC AUDIO SOC_TX
R3600 0 NON_RGB_DEBUG
D3600 20V OPT
R3601 0 NON_RGB_DEBUG
D3601 20V OPT
JK3601 KJA-PH-0-0177 5
GND
4
L
3
DETECT
PC_L_IN
+3.3V_NORMAL
DSUB_G+
R3646 10K
1
R
D3611 5.6V OPT
D3611-*1 ESD_MTK 5.6V
DSUB_DET
PC_R_IN
D3623 5.6V OPT
DSUB_R+
5
15
10
4
D3612-*1 ESD_MTK 5.6V
16
10 5
4
9 3
8 2
7 1
6
16
15
14
9
14
3
13
2
12
7
1
11
8
13
12
11
Closed to JACK
6
D3612 5.6V OPT
JK3603 SLIM-15F-D-2
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
JACK HIGH / MID
2011.11.21 36
LGE Internal Use Only
HP_LOUT
JK3700 KJA-PH-0-0177
+3.3V_NORMAL GND
5
R3700 10K HP_OUT HP_DET
HP_ROUT
L
4
DETECT
3
R
1
EAG61030001 HP_OUT VA3700 5.6V OPT
ESD for MTK
ESD for LG1152
VA3700-*1 VA3700-*2 5.6V 5.6V
ESD_MTK_HP_OUT
ESD_LG1152_HP_OUT
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
JACK_COMMON
2011.11.21 37
LGE Internal Use Only
12V_COMMERCIAL_OUT
12V 1A FOR COMMERCIAL(RS-232C POWER)
CVBS 1 PHONE JACK
12V_COMMERCIAL_OUT
RS232C
+3.3V_NORMAL 10 5 9 4
IR_OUT IC3800 MAX3232CDR
0.1uF
C1+
C3800
1
16
RS232 0.1uF
+3.5V_ST V+
C3801
2
15
3
14
GND
D3805 20V OPT
D3804 20V OPT
RS232 C1-
3
DOUT1
C2+
C3802
4
JK3800 KJA-PH-1-0177
6
OPT_RS232 R3834
1 10K
D3800 5.6V OPT
AV_JACK_BLACK
5
M5_GND
4
M4
3
M3_DETECT
1
M1
6
M6
RS232
FOR COMMERCIAL RIN1
AV1_CVBS_IN
JK3803
RS232
RS232 C2-
0.1uF
13
C3805 18pF 50V ESD_MTK
AV1_CVBS_DET
2
SPG09-DB-009 0.1uF
D3806 5.6V OPT
7
RS232 100 R3821
VCC
R3810 10K
8
RS232 100 R3820
+3.5V_ST
V-
C3803
5
12
6
11
7
10
8
9
ROUT1
DIN1
RS232 DOUT2
RIN2
DIN2 AV1_L_IN
AV_JACK_YELLOW ROUT2
JK3800-*1 KJA-PH-1-0177-1
SOC_RX
5
D3801 5.6V
M5_GND
OPT
EAN41348201
SOC_TX
UART_4PIN_STRAIGHT +3.5V_ST
R3811 4.7K
R3814
OPT
OPT
UART_4PIN_ANGLE
P3800
P3801
12507WS-04L
12507WR-04L
+3.5V_ST
4
M4
3
M3_DETECT
1
M1
6
M6
AV1_R_IN
4.7K 1
1
2
2
3
3
D3802 5.6V OPT
4
4 5
ESD For MTK
COMPONENT 1 PHONE JACK
ESD For LG1152 D3803-*1 5.6V
+3.3V_NORMAL
ESD_MTK
Close to the jack R3806 10K
5
D3807 5.6V OPT
C3804 18pF 50V ESD_MTK
D3800-*1 5.6V ESD_MTK
D3803-*2 5.6V ESD_LG1152
D3800-*2 5.6V ESD_LG1152
COMP1_DET
D3801-*1 5.6V
D3803 5.6V COMP_JACK_BLACK
ESD_MTK
OPT
JK3801 KJA-PH-1-0177 5
M5_GND
4
M4
3
M3_DETECT
1
M1
6
M6
D3802-*1 5.6V COMP1_Y
ESD_MTK
D3801-*2 5.6V ESD_LG1152
D3802-*2 5.6V ESD_LG1152
COMP1_Pb
COMP_JACK_GREEN JK3801-*1 KJA-PH-1-0177-2
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
5
M5_GND
4
M4
3
M3_DETECT
1
M1
6
M6
COMP1_Pr
JACK_COMMON
2011.11.21 38
LGE Internal Use Only
+3.5V_ST
IR & KEY
RGB Sensor EEPROM_SCL
C
KEY2 C4100 0.1uF +3.5V_ST
R4107 10K
B E
EEPROM_SDA
R4114 100
+3.5V_ST
COMMERCIAL_IR R4103 3.3K R4102 10K
IR Q4100 MMBT3904(NXP) COMMERCIAL_IR
KEY1
COMMERCIAL_IR
R4101 1K
R4104 47K
COMMERCIAL_IR C
IR_BYPASS
+3.5V_ST
E
C4102 0.1uF
R4124 100
1
2
D4101 5.6V AMOTECH CO., LTD. OPT
D4106 ADUC 20S 02 010L 20V OPT
D4100 5.6V AMOTECH CO., LTD. OPT
3
4
5 L4100 BLM18PG121SN1D
B Q4101 MMBT3904(NXP) COMMERCIAL_IR
P4102 12507WR-10L D4105 ADUC 20S 02 010L 20V OPT
R4113 100
COMMERCIAL +3.5V_ST
GP4_IR_10P
R4123 100
R4118 10K 5%
R4117 10K 5%
6
COMMERCIAL_IR
C4104 1000pF 50V
R4125
1.5K
LED_B/GP4_LED_R
7
8 R4100 0
9
IR_BYPASS
COMMERCIAL
C4107 100pF 50V
+3.5V_ST
D4104 5.6V
OPT AMOTECH CO., LTD.
COMMERCIAL_IR_EU
10 11
+3.5V_ST
R4109 1K
COMMERCIAL_IR
R4105 22 IR_OUT COMMERCIAL_IR Q4102 MMBT3904(NXP) COMMERCIAL_IR_EU
C
R4115 COMMERCIAL_IR_EU3.3K R4111 10K B
E
R4119 47K
C B Q4104 MMBT3904(NXP) COMMERCIAL_IR
R4108 0 COMMERCIAL_IR_US
E
COMMERCIAL_IR
Soft Touch Micom D/L
Zener Diode is close to wafer
ESD for MTK
ESD for LG1152
D4105-*1 ADUC 20S 02 010L 20V 10pF ESD_MTK
D4106-*1 ADUC 20S 02 010L 20V 10pF ESD_MTK D4100-*2 D4100-*1 200pF 5.6V ADMC 5M 02 200L
200pF 5.6V ADMC 5M 02 200L ESD_LG1152
ESD_MTK D4101-*2 D4101-*1 5.6V
200pF ADMC 5M 02 200L ESD_MTK
D4104-*1 5.6V 200pF ADMC 5M 02 200L ESD_MTK
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
5.6V 200pF ADMC 5M 02 200L ESD_LG1152
D4104-*2 5.6V 200pF ADMC 5M 02 200L ESD_LG1152
IR / KEY
2011.11.21 41
LGE Internal Use Only
+3.3V_NORMAL
+5V_USB FOR USB1 R4327 10K OPT
MAX 2A
R4323 10K
POWER_ON/OFF2_4 IC4303 TPS2554
11
3AU04S-305-ZC-(LG) JK4303 1
R1
R4336 20K
C4328 0.01uF 50V
ILIM1
OPT C4338 1000pF 50V
USB_DM1
2
C4334 4700pF 50V
6
1%
R2
2K R4339
USB_DP1
Vout=0.8*(1+R1/R2)
DVR Ready MAX 1.8A
3
C4332 47pF 50V
VSENSE
5
10uF 10V ILIM0
USB DOWN STREAM
5
USB_CTL1
7
4
4
EN
COMP
4
USB1 C4323
OUT_1
5
6
8
OPT RCLAMP0502BA D4303
3A
/USB_OCD1
3
OUT_2
R4300 27K
OPT
330K R4329
SS/TR
3
ILIM_SEL
GND
9
FAULT
1/10W
EN
7
2
10
1/10W
C4326 0.1uF 50V
8
2
C4336 0.1uF 16V
1
[EP]
OPT R4341 27K
C4324 10uF 35V
1
C4333 22uF 10V
1%
VIN
IN_2
820 R4343
BLM18PG121SN1D
PH
IN_1
1%
BOOT
GND L4308 6.8uH
10K R4338
L4305
IC4305 TPS54331D
40V
0 R4330
C4329
D4304 SMAB34
16V 0.1uF
+24V
40V
C4327 0.1uF 16V
THERMAL
D4304-*1 SX34
R4328 10K
R4332 POWER_ON/OFF2_4
IC4306
10K C4300 0.1uF 16V
SN1104041, DC-DC+2CH USB SW
+12V
LX_2
17
DEV_USB_DCDC_BD86180 IC4306-*1 BD86180MUV
SS
RT
CTL2
CTL1
FLG2
FLG1
USB_OUT2
GND_1
GND_2
USB_OUT1
1
2
3
24 25
COMP
THERMAL
EN
23
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
[EP]GND
VREG
GND_3
C4337 22uF 10V
C4301 22uF 10V
LX_1
16
VIN_2
SW_IN_3
VIN_1
15
PGND_2
PGND_1
SW_IN_2
BST
SW_2
14
7
8
9
10
11
USB2 MAX 1.5A
OPT
10K R4303
OPT R4304 10K
10K
ROSC
USB_DCDC_SN1104041 C4340-*1 0.01uF 50V USB_DCDC_BD86180
USB_DCDC_SN1104041 EN_SW2
+5V_USB_2 3AU04S-305-ZC-(LG) JK4302
USB_CTL2
1
EN_SW1 /USB_OCD2 NFAULT2 2
6
C4340 4700pF 50V
USB_DM2 NFAULT1 USB_DP2 SW_OUT2
+5V_USB_3
C4322 10uF 10V
AGND_1
AGND_2
3
C4331 0.1uF 16V
18
5
C4342 100pF 50V
USB DOWN STREAM
L4307 3.6uH
19
4
SS
4
BST
+5V_USB
20
5% 3
5
PGND_1
21
COMP
OPT RCLAMP0502BA D4302
PGND_2
22
2
R4342 10K 10K
VIN_1
C4325 10uF 16V
23
+3.3V_NORMAL
EN
R4301
VIN_2
USB_DCDC_SN1104041
AGND_3
THERMAL
L4306 BLM18PG121SN1D
1
24 25
V7V C4341 4.7uF 10V
R4302
[EP]GND
+5V_USB_2
SW_1
USB_IN_3
SW_IN_1
USB_IN_2
13
12
SW_OUT1
USB_IN_1
USB3 MAX 1.5A +5V_USB_3
2
ESD for LG1152
4
ESD_LG1152 RCLAMP0502BA D4300-*2
10uF 10V
5
C4310
3
OPT RCLAMP0502BA D4300
ESD for MTK
USB DOWN STREAM
1
3AU04S-305-ZC-(LG) JK4300
ESD_LG1152 RCLAMP0502BA D4302-*1
USB_WIFI +5V_USB
L4302 WIFI 120-ohm BLM18PG121SN1D
ESD_LG1152 RCLAMP0502BA D4303-*3
From SoC
C4319 0.1uF 16V
C4320 0.1uF 16V WIFI
WIFI
C4321 10uF 10V WIFI
C4339 10uF 10V WIFI
MAX 0.4A P4301
USB_DM3
12507WR-04L
For EMI
WIFI VDD
USB_DP3
DM USB_CTL3
WIFI_DM
/USB_OCD3
DP WIFI_DP GND
1
2
3
4 5 .
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
USB3_HUB_WiFi
2011.10.26 43
LGE Internal Use Only
ZigBee_Radio Pulse M_REMOTE OPTION +3.3V_NORMAL P4800 12507WR-08L
L4800 120-ohm
M_REMOTE 1
M_REMOTE
3.3V C4800
2
3
4
5
6
7
8
GND
0.1uF
AR4800 100 1/16W
RX
M_REMOTE_RX
TX M_REMOTE_TX RESET M_RFModule_RESET DC M_RFModule_ISP DD 3D_SYNC_RF GND
M_REMOTE
9
3D_SYNC_RF Only For PDP
ALL M_REMOTE OPTION
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
MOTION REMOTE
2011.11.21 48
LGE Internal Use Only
Ethernet Block
LAN_JACK_POWER
C5000 0.1uF 16V
C5001 0.01uF 50V
C5002 0.1uF 16V
C5003 0.01uF 50V
JK5000 XRJH-01A-4-DA7-180-LG(B) LAN_XML 1
2
3
4
5
6
7
8
9
10
11
D1
D2
D3
D4
P1[CT]
P2[TD+] EPHY_TDP P3[TD-] EPHY_TDN P4[RD+] EPHY_RDP P5[RD-] EPHY_RDN P6[CT]
P7
D5000
D5001
D5002
5.5V OPT
5.5V OPT
5.5V OPT
D5003 5.5V OPT
P8
P9
P10[GND]
P11
YL_C
YL_A
GN_C
GN_A
ESD for MTK
ESD for LG1152
12 ESD_LG1152
SHIELD D5000-*1 ESD_MTK
D5000-*2
ADUC 5S 02 0R5L
5.5V ADUC 5S 02 0R5L
ESD_LG1152 D5001-*1 ESD_MTK ADUC 5S 02 0R5L
D5001-*2 5.5V ADUC 5S 02 0R5L
JK5000-*1 TLA-6T764
ESD_LG1152
LAN_TDK 1
2
3
R1
R2
R3
D5002-*1 ESD_MTK D5002-*2
ADUC 5S 02 0R5L 4
5
6
7
8
9
10
11
D1
D2
D3
D4
R4
5.5V ADUC 5S 02 0R5L
R5
R6
ESD_LG1152
R7
R8
D5003-*1 R9
R10[GND]
ESD_MTK D5003-*2
ADUC 5S 02 0R5L
5.5V ADUC 5S 02 0R5L
R11
YL_C
YL_A
GN_C
GN_A
12 SHIELD
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
LAN_VERTICAL
2011.12.09 50
LGE Internal Use Only
+3.3V_NORMAL
DUAL COMPONENT
C5415 1000pF 50V
2ND : 0TR387500AA
50V
1ST : 0TRIY80001A
C5416
L5401 BLM18PG121SN1D AUD_MASTER_CLK
+24V_AMP
22000pF
Q1801
AMP_RESET_N
OPT R5406 3.3
3
LF
4
DGND_PLL
5
GND_1
6
10K E
PVDD1_1
PVDD1_2
PVDD1_3
OUT1A_1
OUT1A_2
BST1A
/RESET
AD
PGND1A
37
38
39
40
41
42
43
PGND1B
R5414 12
33
BST1B
32
VDR1
31
VCC_5
28
BST2A
WCK
10
27
PGND2A
BCK
11
26
OUT2A_2
SDA
12
25
OUT2A_1
R5408 12
5.1K
C5434 0.47uF 50V
SPEAKER_L C5437 0.1uF 50V
NRS6045T100MMGK R5412 12
R5416 5.1K
C5425 22000pF 50V
WAFER-ANGLE
4
SPK_L-
3
SPK_R+ C5427 1uF 25V
C5428 1uF 25V
C5433 1uF 25V
2
SPK_R-
1
C5426 22000pF 50V
P5400
24
23
22
21
20
19
18
C5430 390pF 50V
D5401 1N4148W 100V OPT
C5436 0.1uF 50V
NRS6045T100MMGK
R5415
SPK_L+
9
0x54
L5404 10.0uH
SPK_L-
SDATA
C5417 22000pF
PVDD2_3
PVDD2_2
PVDD2_1
SPK_R+
OUT2B_2
B
34
VDR2
OUT2B_1
R5400 AMP_MUTE
100 C5404 1000pF Q5400 50V MMBT3904(NXP)
OUT1B_1
AGND
PGND2B
C
35
29
BST2B
R5405
OUT1B_2
30
SCL
R5401 10K
36
8
17
C5408 33pF 50V
C5406 33pF 50V
+3.3V_NORMAL
R5407 12
L5405 10.0uH
7
MONITOR2
100
IC5400 NTP-7500L
16
I2C_SCL1
100
SPK_L+
DVDD
AUD_SCK
R5403
OPT C5424 0.01uF 50V
D5400 1N4148W 100V OPT
DGND
AUD_LRCK
R5402
THERMAL 49
15
C5412 0.1uF 16V
DVDD_PLL
44
2
45
AVDD_PLL
3.3K
46
1
47
AGND_PLL
AUD_LRCH
I2C_SDA1
C5422 10uF 35V
C5420 0.1uF 50V
C5429 390pF 50V
MONITOR1
R5404
OPT C5410 10uF 10V
C5418 0.1uF 50V
C5411 0.1uF 16V
14
OPT C5409 10uF 10V
MONITOR0
100pF 50V
C5407 4.7uF 10V
/FAULT
C5402
C5403 1000pF 50V
OPT C5405 10uF 10V
48
C5401 0.1uF 50V
13
C5400 0.1uF 50V
GND_IO
16V
CLK_I
0.1uF
L5400 CIS21J121
C5414 10uF 10V
[EP]
C5413
VDD_IO
+24V_AMP
+24V
+24V_AMP
D5402 1N4148W 100V OPT
R5409 12
R5413 12
C5419
C5421
C5423
0.1uF 50V
0.1uF 50V
10uF 35V
D5403 1N4148W 100V OPT
L5403 10.0uH
C5432 390pF 50V R5410 12
L5402 10.0uH NRS6045T100MMGK
C5431 390pF 50V
NRS6045T100MMGK R5411 12
C5435 0.47uF 50V
C5438
R5417
0.1uF 50V
5.1K
C5439
R5418
0.1uF 50V
5.1K
SPEAKER_R
50V
WOOFER_MUTE
SPK_R-
WOOFER_MUTE
TP5403
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
AMP_NEO
2011.11.21 54
LGE Internal Use Only
+3.3V_NORMAL
EARPHONE AMP
L6100 120-ohm BLM18PG121SN1D
C6105 10uF 10V
C6107 0.1uF 16V HP_LOUT_AMP
C6104 1uF 10V
C6100 1uF 10V
16 INL-
15
+3.3V_NORMAL
EN
VDD
SGND
OUTL
Close to the IC
14
13
1
12
2
11
HPVDD
C6108 2.2uF 10V
R6104 100K OPT
R6105 4.7K
HP_LOUT_MAIN
C6103 1uF 10V
INR-
HP_ROUT_MAIN
10
3
4
6
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
G0
R6103 4.7K
OUTR
R6100 4.7K R6101 OPT
5 R6102 4.7K OPT
9
EAN60724701 7
C
CPP
PGND
C6109 2.2uF 10V
Q6100 MMBT3904(NXP)
B
E
R6107 1K SIDE_HP_MUTE From Micom
CPN
8 HPVSS
INR+
IC6100 TPA6132A2
G1
INL+
OPT R6106 0
HP_ROUT_AMP C6106 2.2uF 10V
HEADPHONE AMP
2011.09.29 61
LGE Internal Use Only
T/C/S & H/NIM & T2/C TUNER(EU & CHINA) RF_SWITCH_CTL USE: T2/C,T/C,ATSC,DTMB.ISDB-T
TU6501 TDSN-G351D
TU6500 TDSS-G151D
TU6504 TDSH-T151F
TU6502 TDSQ-H051F
TU6503 TDSQ-G051D
+3.3V_TU CHB +5V_TU L6508 BLM18PG121SN1D
RESET
T/C_H/NIM_V 1 2
NC
T2/C_F/NIM_DEV NC_1
1
RESET
CHB_V
2
RESET
3
SCL
T/C/S2_V
+5V[SPLITTER] 1
1 2
RESET
3
TU_SCL
CHB
N.C_1
RF_SWITCH
OPT R6511 100K C6520 0.1uF 16V
BR_TW_CN_TUNER R6500-*1 1K
TW_H/NIM
CHB_CVBS CHB_ERR
L9_T2/C/S
ATV_OUT
CHB_SYNC
IC6500 74LVC1G08GW
ERROR & VALID PIN
CHB_VAL
close to TUNER
RF_S/W_CTL
LNB_TX LNB_OUT
5%
CHB_DATA
/TU_RESET
TU_TS_VAL
B
1
3
SDA
4
+B1[3.3V] SIF
5 6
+B2[1.8V] CVBS
7 8
IF_AGC DIF[P] DIF[N]
9 10 11
SCL SDA +B1[3.3V] SIF +B2[1.8V] CVBS IF_AGC DIF[P] DIF[N]
4
SDA
5
+B1[3.3V]
6
SIF
L9_T2/C/S C6544 TU_TS_ERR
A
2
RESET
2
3
SCL
3
C6503 0.1uF 16V
R6500
GND
0
BR_TW_CN_TUNER R6508-*1 R6508 100
1K
3
SHIELD
TU_SDA
5
M_+3.3V
6
M_SIF
4
SDA
5
+3.3V_TUNER
6
SIF
4 5 6
+B2[1.8V]
8
CVBS
8
M_CVBS
8
CVBS
8
9
NC_2
9
M_IF_AGC
9
T/C_IF_AGC
9
M_+1.8V
7
+1.8V_TUNER
7
C6551 100pF 50V
C6550 0.1uF 16V
C6500
10
M_DIF[P]
10
T/C_DIF[P]
10
11
NC_4
11
M_DIF[N]
11
T/C_DIF[N]
11
+B3[3.3V]
12
S_3.3V
12
N.C_2
12
0.1uF 16V
R6506
13
N.C_3
13
NC_5
14
S_CVBS
14
N.C_4
14
close to TUNER C6507 100pF 50V
R6518 82
R6520 220
TUNER_SIF
E
R6521 220
2012 perallel because of derating
E C
R6515 4.7K
Q6500 MMBT3906(NXP) B R6519 1K
C
T/C_H/NIM
Q6501 MMBT3906(NXP)
T/C/S2
T/C&AT&CHB OPT 1. should be guarded by ground IF_AGC2. No via on both of them 3. Signal Width >= 12mils Signal to Signal Width = 12mils Ground Width >= 24mils
100 T/C&AT&CHB
CHB C6523 100pF 50V
C6510 1000pF 50V CN
C6513 4700pF 50V CN
NOT_DVB_S
T2/C_F/NIM
DVB_S
NOT_T/C&AT
+1.8V_TU
15
GND_1
15
16
16
ERROR
16
17
SD_SYNC
17
SYNC
17
VALID
18
SD_VALID
18
VALID
18
MCLK
19
SD_MCLK
19
MCLK
19
D0
20
SD_SERIAL_D0 20
D0
20
D1
21
N.C_1
21
D1
21
NOT_T/C&AT&CHB AR6501 0 FE_TS_DATA[0]
D2
22
N.C_2
22
D2
22
FE_TS_DATA[1]
D3
23
N.C_3
23
D3
23
FE_TS_DATA[3]
D4
24
N.C_4
24
D4
24
FE_TS_DATA[4]
D5
25
N.C_5
25
D5
25
D6
26
N.C_6
26
D6
26
27
N.C_7
27
D7
27
GND_2
28
GND_2
28
29
GND_3
CHB
T2/C
DVB_S&CHB
DVB_S&CHB
T2/C&CN
NOT_T/C&AT
T/C&AT&CHB
BR
CN
CN
T/C&AT&CHB
NOT_DVB_S
NOT_T/C&AT
NOT_T/C&AT Not_L9_T2/C/S
T2/C
T2/C&CHB&CN
RF_SWITCH
Not_L9_T2/C/S
NOT_DVB_S
NOT_T/C&AT&CHB
T/C&AT&CHB
T2/C&CN
NOT_T/C&AT&CHB NOT_T/C&AT&CHB
CHB L6507
AT_H/NIM
CHB
DVB_S
DVB_S&CHB
Not_L9_T2/C/S NOT_T/C&AT
NOT_DVB_S
T2/C&CHB&CN
T2/C&CHB&CN
Not_L9_T2/C/S
H/NIM&CHB
Not_L9_T2/C/S NOT_T/C&AT&CHB Not_L9_T2/C/S
C6516 BLM18PG121SN1D 0.1uF 16V T2/C&CHB&CN&BR
SD_ERROR
T2/C/S2
+3.3V_D_Demod
OPT C6528 10uF 6.3V
+1.23V_TU
GND_1
T2/C&CHB&CN&BR
OPT C6525 0.1uF 16V
T2/C&CN&BR L6502 BLM18PG121SN1D
15
ERROR
R6516 470
+1.8V_TU
C6509 0.1uF 16V CHB
S_1.8V
NOT_L9_T2/C/S
B
16V
IF_N
13
R6525 0
+5V_TU
+5V_TU
TU_CVBS
C6522 0.1uF
should be guarded by groumd IF_P
+B4[1.23V]
GND
BR_TW_CN_TUNER C6506-*1 68pF 50V
close to TUNER
C6514 0.1uF 16V
C6505 0.1uF 16V
close to Tuner
NC_3
BR_TW_CN_TUNER C6508-*1 68pF 50V
L6500 BLM18PG121SN1D
L9 ATSC
10
SHIELD
I2C_SDA6
+3.3V_TU
7
FE_TS_VAL 1/16W 5% L9_T2/C/S
5%
I2C_SCL6
C6511 100pF 50V
R6526 100
Y
4
ATV_OUT
R6509 C6508 33 18pF R6510 OPT 50V 33 C6506 OPT 18pF 50V
0.1uF 16V
2
MTK/L9_DVB/ATSC/NTSC
RF_SWITCH RF_SWITCH_CTL
C6501 10uF 10V
1
7
12
12
4
VCC
5
MTK/L9_DVB/ATSC/NTSC
SCL
+3.3V_TU
CHB_CLK
CHB_CVBS
L9_T2/C/S
CHB_ERR
SYNC
CHB_SYNC CHB_VAL NOT_T/C&AT&CHB AR6500 0
CHB_CLK TU_TS_ERR FE_TS_SYNC TU_TS_VAL FE_TS_CLK CHB_DATA FE_TS_DATA[0-7]
T2 : Max 1.7A else : Max 0.7A
FE_TS_DATA[2]
FE_TS_DATA[5] FE_TS_DATA[6] FE_TS_DATA[7] NOT_T/C&AT
D7
+3.3V_TU_IN
AR6502 0 NOT_T/C&AT&CHB
IC6501 AP2132MP-2.5TRG1
+1.23V_TU [EP] NOT_T/C&AT R6527 R2 20K 1% NOT_T/C&AT R6528 11K 1% R6529 R1 10K 1%
Seperate GND for CHB
29
SD_1.23V_DEMOD 30
+1.23V_S2_DEMOD 30
SD_RESET
S2_RESET
31
SD_3.3V_DEMOD32 N.C_8
DVB_S&CHB L6501 BLM18PG121SN1D
2 +1.23V_TU
C6512 100pF
C6515 0.1uF DVB_S&CHB
C6519 10uF 10V DVB_S&CHB
10uF 16V
C6521 0.1uF OPT
S2_F22_OUTPUT 33
10 DVB_S&CHB
GND
3
NOT_T/C&AT C6533
+3.3V_D_Demod OPT R6512 2.2K R6513
+3.3V_S2_DEMOD 32
33
EN
R6523 10K
DVB_S&CHB
31
8
PG
9
GND_3
SHIELD
1 C6540 0.1uF
THERMAL
28
7 ADJ 6 VOUT
VIN
2A
4 +5V_NORMAL
CN R6528-*1 12K 1/16W 1%
NOT_T/C&AT
5 NC
VCTRL
NOT_T/C&AT C6549
EAN61387601 /S2_RESET
10uF +3.3V_D_Demod
16V
OPT
SD_SCL
34
S2_SCL
34
SD_SDA
35
S2_SDA
35
LNB
36
C6524 100pF LNB_TX R6503
36 GND_4 38
OPT
C6517 18pF 50V
OPT
C6518 18pF 50V
22
C6527 0.1uF OPT
C6535 1uF OPT
Vout=0.6*(1+R1/R2)
I2C_SCL4
DVB_S&CHB
CHB : Max 480mA else : Max 240mA
37 R6504
SHIELD LNB_OUT
SHIELD
22
I2C_SDA4
DVB_S&CHB
+3.3V_TU
+3.3V_D_Demod
IC6503
NOT_T/C&AT L6506 BLM18PG121SN1D
AZ1117BH-1.8TRE1 NOT_T/C&AT
C6531 0.1uF BR_F/NIM_V
CN_ATBM
TU6501-*1 TDSN-B051F
2 3 4 5 6 7
AT_H/NIM_V TU6500-*1 TDSS-H151F
8 9 10
1 2 3 4 5 6 7 8 9 10 11
NC
11 12
RESET
13
SCL 14
SDA
15
+B1[3.3V]
16
SIF
17 18
+B2[1.8V] 19
CVBS
20
IF_AGC
21
DIF[P]
22 23
DIF[N] 24 25
12 26
SHIELD
27 28
RF_S/W_CTL
1
RESET
2
SCL
3
SDA
4
+B1[3.3V]
5
SIF
6
+B2[1.8V]
7
CVBS
8
NC_1
9
NC_2
10
NC_3
11
+B3[3.3V]
12
+B4[1.23V]
13
NC_4
14
GND
15
ERROR
16
SYNC
17
VALID
18
MCLK
19
D0
20
D1
21
D2
22
D3
23
D4
24
D5
25
D6
26
D7
27
RF_S/W_CTL
2
RESET
1
SCL
2
SDA
3
+B1[3.3V]
4
RF_S/W_CTL
3
RESET
4 5
SIF
5
SCL 6
SDA
7
+B1[3.3V]
8 9
+B2[1.8V]
6
CVBS
7
NC_1
8
SIF 10
+B2[1.8V]
11
CVBS
12 13
NC_2
9
NC_3
10
+B3[3.3V]
11
NC_1 14
NC_2
15
NC_3
16 17
+B4[1.23V]
12
NC_4
13
GND
14
+B3[3.3V] 18
+B4[1.23V]
19 20
NC_4
21
ERROR
15
SYNC
16
VALID
17
MCLK
18
D0
19
D1
20
D2
21
GND 22
ERROR
23
SYNC
24 25
VALID 26
MCLK
27 28
D0
29
D3
22
D4
23
D1 30
D2
31
D3
32 33
D5
24
D6
25
D7
26 27
D4 34
D5
35 36
D6 D7
28
38
37
SHIELD
SHIELD SHIELD
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
IN
3
2
OUT
1
R6531 1
ADJ/GND
TU6503-*1 TDSQ-G351D
TU6501-*3 TDSN-C051D
28 SHIELD
NOT_T/C&AT C6542 0.1uF
C6538 10uF 10V
T2/C/S2
CN_LG3921
TU6501-*2 TDSN-C251D
1
1
+1.8V_TU
+3.3V_TU
N.C_1 RESET
C6546 10uF 10V
SCL SDA +B1[3.3V] SIF +B2[1.8V]
Close to the tuner
C6548 0.1uF 16V
CVBS N.C_2 N.C_3 N.C_4 +B3[3.3V] +B4[1.23V] N.C_5 GND_1 ERROR
L9/BR_TW_CN_TUNER R6532-*1 BLM18PG121SN1D
465mA(MAX)
SYNC VALID MCLK
150mA(MAX)
D0 D1 D2
120-ohm
D3 D4 D5
+3.3V_NORMAL
+3.3V_TU
D6
+5V_TU
+5V_NORMAL
D7 GND_2 GND_3 +B5[1.23V] S2_RESET +B6[3.3V] S2_F22_OUTPUT
NOT_L9_BR_TW_CN Tuner R6532 0
L6503 BLM18PG121SN1D
S2_SCL S2_SDA LNB GND_4
C6526 0.1uF 16V
C6529 22uF 10V
C6530 0.1uF 16V
Close to the tuner
TUNER
C6532 0.1uF 16V
C6534 22uF C6536 22uF 10V 10V
C6539 0.1uF 16V
Close to the tuner
2011.11.21 65
LGE Internal Use Only
FOR COMMERCIAL 12V OUT RS-232C 9 PIN (OPT:COMMER_EXT_12V) R7001 100 IC7000 MP5000DQ
GND C7000 470pF 50V
DV/DT
1
10
2
9
SOURCE_5
+3.5V_ST
FOR COMMERCIAL AUDIO OUT (OPT:COMMER_EXT_AMP)
SOURCE_4 12V_COMMERCIAL_OUT
R7000 1K ENABLE/FAULT COMMERCIAL_12V_CTL FOR 12V CONTROL (FROM MICOM)
I-LIMIT
NC
3
8
4
7
5
6
R7006 10K
SOURCE_3 L7000 BLM18PG121SN1D
SOURCE_1
C7003 22uF 25V
C7004 0.1uF 50V
12507WR-12L
+24V R7004 100K C
11
B
VCC
P7000
12V_EXT_PWR_DET
SOURCE_2
L7001 BLM18PG121SN1D Q7001 MMBT3904(NXP)
1 C7005 0.1uF 50V
+12V
2
E C7001 1uF 25V
R7005 22K
C7002 22uF 25V
3 AUDIO_L_OUT_COMMERCIAL
4
5 AUDIO_R_OUT_COMMERCIAL 6
EXT_AMP_RESET
7
FOR AMP RESET (MAIN SOC) EXT_AMP_MUTE
8
9
SPK_L_OUT_COMMERCIAL
PATTERN SHOULD BE CONSIDERED (MAX 3W)
AUDIO OUT JACK (OPT:COMMER_EXT_AMP) SPK_L_OUT_COMMERCIAL
SPK_R_OUT_COMMERCIAL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
C7006 10uF 16V
C7007 10uF 16V
D7000 5.6V
D7001 5.6V
SPK_R_OUT_COMMERCIAL COMMER_EXT_AMP_JACK JK7000 KJA-PH-0-0177 GND
5
L
4
DETECT
3
R
1
10
11
12 13
EAG61030001
COMMERCIAL_OPTION
2011.11.21 70
LGE Internal Use Only
LVDS LVDS_51PIN P7100 FI-RE51S-HF-J-R1500
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51
[51Pin LVDS OUTPUT Connector]
NC NC
R7100 33 LGD_2D/3D_CTRL
[41Pin LVDS OUTPUT Connector]
2D/3D_CTL
LVDS_SEL NC NC NC AUO_65_MIRROR
R7105 33 CP_BOX R7106 33 CP_BOX
+3.3V_NORMAL
I2C_SDA1 I2C_SCL1
R7101 3.3K LVDS_SEL_HIGH
LVDS_SEL NC NC L/DIM_ENABLE GND
LVDS_41PIN P7101 FI-RE41S-HF-J-R1500
R7107
33
PWM_DIM1
R7102 10K LVDS_SEL_LOW
LGD_32/37_LVDS_PWM R7108
33
1
OPC_EN 2
LGD_32/37_LVDS_OPC
3
RA0N TXA0N
4
RA0P TXA0P
5
RA1N TXA1N
6
RA1P TXA1P
7
RA2N TXA2N
8
RA2P TXA2P
9
GND
10
RACLKN TXACLKN
11
RACLKP TXACLKP GND
12
RA3N
13 TXA3N
14
RA3P TXA3P
15
RA4N TXA4N
16
RA4P TXA4P
17
GND
18
BIT_SEL
BIT_SEL
19
RB0N TXB0N
R7103 10K BIT_SEL_LOW
RB0P TXB0P
20 21
RB1N TXB1N
22
RB1P TXB1P
23
RB2N TXB2N
24
RB2P TXB2P
25
GND
26
RBCLKN TXBCLKN
27
RBCLKP TXBCLKP
28
GND
29
RB3N TXB3N
30
RB3P TXB3P
31
RB4N TXB4N
32
RB4P TXB4P GND
33
GND
34 35
GND GND
PANEL_VCC
36 37
GND NC VLCD
L7100 BLM18SG121TN1D LVDS_51PIN
38 39 40
VLCD VLCD VLCD
41 C7100 10uF 16V OPT
C7101 1000pF 50V OPT
C7102 0.1uF 50V OPT
NC NC NC
2D/3D_CTL R7104 33 AUO_2D/3D_CTRL
NC NC NC NC NC GND RC0N TXC0N RC0P TXC0P RC1N TXC1N RC1P TXC1P RC2N TXC2N RC2P TXC2P GND RCCLKN TXCCLKN RCCLKP TXCCLKP GND RC3N TXC3N RC3P TXC3P RC4N TXC4N RC4P TXC4P GND GND RD0N TXD0N RD0P TXD0P RD1N TXD1N RD1P TXD1P RD2N TXD2N RD2P TXD2P GND RDCLKN TXDCLKN RDCLKP TXDCLKP GND RD3N TXD3N RD3P TXD3P RD4N TXD4N RD4P TXD4P GND GND
42 GND
52 GND
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
LVDS_HIGH_MID
2011.08.11 71
LGE Internal Use Only
LOCAL DIMMING [To LED DRIVER] P7600 12507WR-08L L/DIM_OUT
+3.3V_NORMAL
R7600 10K OPT
1
2
R7601 10K L/DIM_OUT
AR7600 33 1/16W
3
L/DIM0_SCLK
4
5
L/DIM0_MOSI R7603
6
7
8
0
L/DIM_OUT R7602 0
L/DIM_OUT
I2C_SCL1
I2C_SDA1
L/DIM_OUT R7606
33
L/DIM0_VS
L/DIM_OUT 9
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
R7607 4.7K L/DIM_OUT
LOCAL DIMMING
2012.02.22 76
LGE Internal Use Only
<POWER BLOCK>
VCOM_P VCOM_N VCOM_LOOP VCC18 L7700
0
R7708
GMA4
DYN
VCOMFB
POS
NEG
VCOM
GMA6
GMA5
GMA4
GMA3
GMA2
GMA1
45
44
43
42
41
40
39
38
37 32
TPS65178RSLR
31
CTRLP
SWB2
6 7
30
TCOMP
8
29
VL
SWB1_2
9
28
SDA
1/16W
R7739 1.5K 1/16W 5%
C7756 1uF 25V
C7733 10uF 16V
C7746
C7748
1uF 25V
1uF 25V
D7704 1N4148W
VGH
SWP
CTRLP
E R7727
C7722 10uF 16V
0
1/16W
VDD
B
C7731 0.1uF 16V
OPT C7740 1000pF 50V
R7746
100V
100K
C7755 1uF 50V
D7706 1N4148W 100V
C7757 1uF 50V
R7744 20K 1/10W 5%
C
COMP
C7736 1000pF 50V
R7750 20K 1/10W 5%
C7754 0.1uF 50V
Q7701 MMBT3906(NXP)
VDD
VCC18 VCC18 L7704 22uH C7702 0.01uF 50V
C7739 0.1uF 50V
R7718
C7730 68uF 35V
C7729 1000pF
R7713 2.2
PANEL_VCC
C7700 0.01uF 50V
C7727 0.1uF 50V
VGH_FB
C7737 0.1uF 50V
C7701 0.1uF 50V
D7705 1N4148W 100V
1/16W 5% C7715 10uF 16V
0
INSTEAD OF AMCC0209
SS
L7703 NR6020T6R8NC 6.8uH
R7729 2.7K 1/16W
C7703 0.1uF 50V
1uF 25V
24
23 SWO
COMP
[Right Source(41PIN LOCATION)]
[Left Source(51PIN LOCATION)]
1uF 25V
C7742 1uF 25V
I2C_SCL2
R7717 33K 1/16W
H_VDD
VGL R7745
VL
TCOMP
C7724 1uF 25V
THIS IS REVERSE PATTERN !!!!
C7747
SWN
SS
AGND
SWI
SW_2
PGND_2
OPT
22
SS
21
COMP
25 20
26
12 19
27
11
PVINB1_2
18
10
SCL
C7745
VGH_FB
I2C_SDA2
NC 10uF 25V PVINB1_1
VGL_FB
100V
CTRLP
VGH
PGND2
C7716 10uF 25V
C
GMA5
PGND4
35
VGL SWP
PGND_1
C7714 10uF 25V
CTRLN SWN
17
C7713 10uF 25V
36
33
PGND3
D7700 SX34 40V
D7703 1N4148W
SWP
34
EPI
100K
1/16W 5% CTRLN
IC7700
16
C7721 OPT
5
THERMAL 49
OUT3
PANEL_VCC
4
15
C7712 1uF 10V
3
OUT2
SWB3
C7711 10uF 10V
2
RST OUT1
13
C7710 10uF 10V
22uH
1
SWB4
AVIN
C7704 0.1uF 16V
R7700 2K 1/16W
R7728
SWN
SWB1_1
L7702 C7728 10uF 10V OPT
46
[EP]AGND OUT4
VCC
C7707 10uF 10V OPT
47
10K 1/16W
INSTEAD OF AMCC0208
1/16W Q7700 MMBT3904(NXP)
VGL_FB
R7701
LQM2HPN2R2MG0L 2.2uH
R7760 0
CTRLN
48
VCC
14
C7709 10uF 10V
C7706 10uF 10V
OPT
L7701
PVINB3
PMIC_RESET TO SOC
1/16W
FROM SOC
R7759 0 1/16W
R7737 OPT 1/16W
E
VCOM_DYN 1/16W R7725 0
VCC
R7730 OPT 1/16W
0
B
R7710
GMA7
1/16W
Vcore
L7705 BLM18PG121SN1D OPT
0
VCOMLFB
GMA12
R7709
GMA15
1/16W
LQM2HPN2R2MG0L 2.2uH
SW_1
C7708 10uF 10V OPT
GMA14
VCOMRFB C7705 10uF 10V
9.1K VL
1/16W
1/16W 50V OPT OPT D7701 SX34
R7720 47K 1/16W 5%
40V C7723 10uF 25V
TCOMP
C7725 10uF 25V
C7734 0.1uF 50V
C7738 0.1uF 50V
C7732 0.1uF 50V
C7735 68uF 35V
OPT
TH7700 47k-ohm NCP18WB473F10RB
R7722 100K 1/16W 1%
51 51
Z_OUT
50 50
GMA1
49
GMA3
48
GMA4
47
GMA5
46
GMA7
45
GMA9
49
43
CLK6
42
VGH_R
41
VGH_F
40
VGH_ODD
GMA18 Vcore
38 37
VGH_EVEN
CLK3_I CLK2_I
38
VGL_I
35 34
CLK5
R7711 0
VST
36
GIP_RST
35
VCOMRFB
34
VCOM
CLK4
R7712
CLK3
R7714
0
0
CLK1_I
37
EPI_LOCK3
36
0
CLK4_I
39
CLK6
R7707
CLK5_I
CLK2
R7715
CLK1 0
VDD
CLK1_I
39
R7702 0 CLK6_I
CLK2_I
40
H_VDD
33
RE
30 29
VST
12
0
RESET
13
1/16W
DISCHG
GIP_RST
21
20
TXA1N
19
19
47 GST
GST_SOC
DISCHG
FROM SOC C7718 15pF 50V
17
VCOM
VGL
R7716 0 1/16W OPT
VGL
29
27
GCLK
26
MCLK
25
GST
24
EO
23
VSENSE
22
GND
15
GIP_RST
14
VST
13
VGL_I
12
VGH_EVEN
11
VGH_ODD
15
EPI_LOCK3
14
EPI_LOCK6_SOURCE
0 VGL_I
1/16W R7741
0
DISCHG
VCC
1/16W OPT
MCLK VDD GST
R7735 100 1/16W
EO
R7742
3K
RE
OPT 1/16W R7736 3K 1/16W
VDD
PANEL_VCC
R7738 0 1/16W
R7721 0 1/16W
+3.3V_NORMAL
REVERSE GCLK
16
VCOMLFB
VGL R7740
R7749 1K 1/16W OPT
1
2
3
4
5
6
14
1/16W
FROM SOC
Vcore
18
18
R7704
TXA1P
20
15
VDD 21
EPI
BI-SCAN
21
R7719
20
VGH_EVEN VST
TPS65198 IC7701
POS
TXACLKN
22
11
28
AVDD
23
H_VDD
EVEN
19
FROM SOC
10
NEG
CH4
TXB0N
22
9
ODD
18
TXB0P
23
VGH_ODD
VGL
24
24
TXACLKP
VGH_F
VGH_F C7717 15pF 50V
25
8
OUT
1/16W
FROM SOC
26
25
VGH_R
VGH_R
VGH2
FROM SOC
26
EO
17
TXA4N
27
47
16
R7703 EO_SOC
THERMAL
TXB1N
CH5
7
TXA4P
28
TXB1P
R7748 1K 1/16W REVERSE
[EP]VGL
VGH1
29
VGL
CLK1
FROM SOC
30
CLK2
RE
31
CLK3
TXB2N
CH6
CLK4
31
VCC
32
CLK5
32
TXB2P
CLK6
33
C7750 1uF 25V OPT
R7747 0 1/16W OPT
C7726 1uF 25V
R7743 OPT
0 1/16W
R7751 15K 1/16W
R7753 15K 1/16W OPT
R7752 15K 1/16W
R7754 15K 1/16W OPT
13
GMA18
11
GMA16
VGH_F 9
VGH_R
8
CLK6
7
CLK5
6
CLK4
GMA12
7 6
GMA9
CLK3
4
CLK2
3
CLK1
2
R7756 10K
VCC18
GMA14
GMA10 R7761 10K OPT
GMA7 GMA5
3
GMA4
2
GMA3
1
GMA1
MCLK
FROM SOC C7719 15pF 50V
EPI_LOCK6 C R7757
4
47 1/16W
GMA15
8
5
5
R7705 MCLK_SOC R7758 10K
R7755 EPI_LOCK6_SOURCE
B
VCOM_P C7741 10uF 16V
C7743 1uF 25V
VCOM_N VCOM_LOOP R7731 0 1/16W VCOM
12
10
9
1
CLK5
CLK4_I
GMA15 GMA16
10
44
CLK3_I
41
16
CLK4
CLK5_I
GMA14
17
CLK3
45
CLK6_I
GMA12
42
<LEVEL SHIFTER BLOCK>
46
GMA10
43
27
CLK2
47
44
28
CLK1
48
MMBT3904(NXP) Q7703
10K
VDD
E R7706
C B
100 E
0
1/16W OPT C7749 1uF 50V
OPT 40V
R7734
47 GCLK
GCLK_SOC Q7702 MMBT3904(NXP)
D7702
1/16W FROM SOC C7720 15pF 50V
R7723 R7724 0 0 1/16W 1/16W OPT
C7744 1uF 50V
R7726 0 1/16W OPT
R7732 0 1/16W OPT
R7733 0 1/16W
Z_OUT VGH
VGH
FL8S050HA1 FL8S050HA1
P7703
P7702
DEV_50WAFER
DEV_50WAFER
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
2011.12.01
T-Con
77
LGE Internal Use Only
eMMC I/F EMMC_VCCQ
10K
10K
10K
10K
R8104
R8105
R8106
R8107
EMMC_DATA[0]
A3
EMMC_DATA[1]
A4
EMMC_DATA[2]
A5
EMMC_DATA[3] EMMC_DATA[4]
B2
EMMC_DATA[5]
B4
B3
EMMC_DATA[6] EMMC_DATA[7]
B5
AR8101 22 1/16W
B6
DAT0
NC_25
DAT1
NC_26
DAT2
NC_27
DAT3
NC_28
DAT4
NC_29
DAT5
NC_30
DAT6
NC_31
DAT7
NC_32 NC_33 NC_34
M6 M5
CLK
NC_35
CMD
NC_36 NC_37 NC_38
A6 C5 E5 E8 AR8102
E9
22
E10
EMMC_CMD
F10
EMMC_RST
G3 G10 H5
OPT
J5
C8107 10pF 50V
K6 K7 K10 P7 P10
NC_3
NC_39
NC_4
NC_40
NC_23
NC_41
NC_42
NC_46
NC_43
NC_47
NC_44
NC_48
NC_45
NC_49
NC_52
NC_50
NC_58
NC_51
NC_59
NC_53
NC_66
NC_54
NC_73
NC_55
NC_80
NC_56
NC_81
NC_57
NC_82
NC_60
NC_116
NC_61
NC_119
NC_62
K5 RESET OPT
C8100 0.1uF 16V
C6 M4
3.3V_EMMC
EMMC_VCCQ
N4 P3 EMMC_RESET_BALL
EMMC_CMD_BALL
EMMC_CLK_BALL
DAT6
DAT5
DAT4
DAT3
P5
VCCQ_1 VCCQ_2 VCCQ_3 VCCQ_4 VCCQ_5
C8105 0.1uF 16V
C8106 2.2uF 10V
E6 F5 J10 K9
VCC_1 VCC_2 VCC_3 VCC_4
EMMC_VDDI C2 VDDI C8104 0.1uF 16V
E7 G5 H10 K8
C8102 0.1uF 16V
C8103 2.2uF 10V
C4 N2 N5 P4 P6
VSS_1
SANDISK_EMMC_4GB
A7
EMMC_CLK
IC8100-*3 H26M31001EFR
IC8100-*1 H26M21001ECR
NC_63 NC_64 NC_65 NC_67 NC_68 NC_69 NC_70 NC_71 NC_72 NC_74 NC_75 NC_76 NC_77 NC_78 NC_79 NC_83 NC_84 NC_85 NC_86 NC_87 NC_88 NC_89
VSS_2
NC_90
VSS_3
NC_91
VSS_4
NC_92
VSSQ_1
NC_93
VSSQ_2
NC_94
VSSQ_3
NC_95
VSSQ_4
NC_96
VSSQ_5
NC_97 NC_98 NC_99
DAT3 DAT4
A2 A8 A9 A10 A11 A12 A13 A14 B1 B7 B8 B9 B10 B11 B12
Don’t Connect Power At VDDI
B13
EMMC_VDDI
B14 C1
(Just Interal LDO Capacitor)
DAT5
NC_100
A1
C3 C7
NC_1
NC_101
NC_2
NC_102
NC_5
NC_103
NC_6
NC_104
NC_7
NC_105
NC_8
NC_106
NC_9
NC_107
NC_10
NC_108
NC_11
NC_109
NC_12
NC_110
NC_13
NC_111
NC_14
NC_112
NC_15
NC_113
NC_16
NC_114
NC_17
NC_115
NC_18
NC_117
NC_19
NC_118
NC_20
NC_120
NC_21
NC_121
NC_22
NC_122
NC_24
NC_123
DU1 DU2 DU3 DU4 DU5 DU6 DU7 DU8
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
DUMMY_1
DUMMY_9
DUMMY_2
DUMMY_10
DUMMY_3
DUMMY_11
DUMMY_4
DUMMY_12
DUMMY_5
DUMMY_13
DUMMY_6
DUMMY_14
DUMMY_7
DUMMY_15
DUMMY_8
DUMMY_16
C8
A3
C9
A4
C10
A5
C11
B2
C12
B3
C13
B4 B5
C14 D1 D2
DAT5
B6
C8 DAT0
NC_25
DAT1
NC_26
DAT2
NC_27
DAT3
NC_28
DAT4
NC_29
DAT5
NC_30
DAT6
NC_31
DAT7
NC_32 NC_33
D3 D4
M6
D12
M5
D13
NC_34 CLK
NC_35
CMD
NC_36 NC_37
D14 E1 E2
A7
E3
C5
E12
E5
E13
E8
E14
E9
F1 F2
NC_38
A6
DAT6
E10 F10 G3
F3 F12
G10
F13
H5
F14
J5
G1
K6
G2
K7
G12
K10
G13
P7
G14
P10
H1
NC_3
NC_39
NC_4
NC_40
NC_23
NC_41
NC_42
NC_46
NC_43
NC_47
NC_44
NC_48
NC_45
NC_49
NC_52
NC_50
NC_58
NC_51
NC_59
NC_53
NC_66
NC_54
NC_73
NC_55
NC_80
NC_56
NC_81
NC_57
NC_82
NC_60
NC_116
NC_61
NC_119
NC_62 NC_63
H2
NC_64
K5
H3
RESET
H12 H13 H14
C6
J1
M4
J2
N4
J3
P3
J12
P5
VCCQ_1 VCCQ_2 VCCQ_3 VCCQ_4 VCCQ_5
J13 J14 K1 K2
EMMC_RESET_BALL
E6 F5 J10
K3
K9
K12
VCC_1 VCC_2 VCC_3 VCC_4
K13 K14 C2
L1
VDDI
L2 L3 L12
E7
L13
G5
L14
H10
M1
K8
M2
C4
M3
N2
M7
N5
M8
P4 P6
M9 M10
VSS_1 VSS_2 VSS_3 VSS_4 VSSQ_1 VSSQ_2 VSSQ_3
NC_68 NC_69 NC_70 NC_71 NC_72 NC_74 NC_75 NC_76 NC_77 NC_78 NC_79 NC_83 NC_84 NC_85 NC_86 NC_87 NC_88 NC_89 NC_90 NC_91 NC_92 NC_93 NC_94 NC_95 NC_96
VSSQ_5
NC_97 NC_98 NC_99
M12 M13
A1
M14
A2
N1
A8
N3
A9
N6
A10
EMMC_CMD_BALL
N7
A11
N8
A12
N9
A13
N10
A14
N11
B1
N12
B7
N13
B8
N14
B9
P1
B10
P2
B11 EMMC_CLK_BALL
B12
P9
B13
P11
B14
P12
C1
P13
C3
P14
C7
DU9
DU1
DU10
DU2
DU11
DU3
DU12
DU4
DU13
DU5
DU14
DU6
DU15
DU7
DU16
NC_67
VSSQ_4
M11
P8
NC_65
DU8
NC_100 NC_1
NC_101
NC_2
NC_102
NC_5
NC_103
NC_6
NC_104
NC_7
NC_105
NC_8
NC_106
NC_9
NC_107
NC_10
NC_108
NC_11
NC_109
NC_12
NC_110
NC_13
NC_111
NC_14
NC_112
NC_15
NC_113
NC_16
NC_114
NC_17
NC_115
NC_18
NC_117
NC_19
NC_118
NC_20
NC_120
NC_21
NC_121
NC_22
NC_122
NC_24
NC_123
C9 C10 C11 C12 C13 C14 D1 D2
A3 A4 A5 B2 B3 B4 B5 B6
DAT0
NC_25
DAT1
NC_26
DAT2
NC_27
DAT3
NC_28
DAT4
NC_29
DAT5
NC_30
DAT6
NC_31
DAT7
NC_32
D3
NC_33
D4
NC_34
D12 D13
M6 M5
CLK
NC_35
CMD
NC_36
D14 E1 E2 E3 E12 E13 E14 F1 F2 F3 F12 F13 F14 G1 G2 G12 G13 G14 H1
NC_37 NC_38
A6 A7 C5 E5 E8 E9 E10 F10 G3 G10 H5 J5 K6 K7 K10 P7 P10
NC_3
NC_39
NC_4
NC_40
NC_23
NC_41
NC_42
NC_46
NC_43
NC_47
NC_44
NC_48
NC_45
NC_49
NC_52
NC_50
NC_58
NC_51
NC_59
NC_53
NC_66
NC_54
NC_73
NC_55
NC_80
NC_56
NC_81
NC_57
NC_82
NC_60
NC_116
NC_61
NC_119
NC_62
H2 H3 H12
K5 RESET
H13 H14 J1 J2 J3 J12 J13
C6 M4 N4 P3 P5
VCCQ_1 VCCQ_2 VCCQ_3 VCCQ_4 VCCQ_5
J14 K1 K2 K3 K12 K13
E6 F5 J10 K9
VCC_1 VCC_2 VCC_3 VCC_4
K14 L1 L2
C2 VDDI
L3 L12 L13 L14 M1 M2 M3 M7 M8 M9 M10
E7 G5 H10 K8 C4 N2 N5 P4 P6
VSS_1 VSS_2 VSS_3 VSS_4
NC_63 NC_64 NC_65 NC_67 NC_68 NC_69 NC_70 NC_71 NC_72 NC_74 NC_75 NC_76 NC_77 NC_78 NC_79 NC_83 NC_84 NC_85 NC_86 NC_87 NC_88 NC_89 NC_90 NC_91 NC_92
VSSQ_1
NC_93
VSSQ_2
NC_94
VSSQ_3
NC_95
VSSQ_4
NC_96
VSSQ_5
NC_97
M11
NC_98
M12
NC_99
M13
NC_100
M14 N1 N3 N6 N7 N8 N9 N10 N11 N12 N13 N14 P1 P2 P8 P9 P11 P12 P13 P14
A1 A2 A8 A9 A10 A11 A12 A13 A14 B1 B7 B8 B9 B10 B11 B12 B13 B14 C1 C3 C7
NC_1
NC_101
NC_2
NC_102
NC_5
NC_103
NC_6
NC_104
NC_7
NC_105
NC_8
NC_106
NC_9
NC_107
NC_10
NC_108
NC_11
NC_109
NC_12
NC_110
NC_13
NC_111
NC_14
NC_112
NC_15
NC_113
NC_16
NC_114
NC_17
NC_115
NC_18
NC_117
NC_19
NC_118
NC_20
NC_120
NC_21
NC_121
NC_22
NC_122
NC_24
NC_123
IC8100-*2 KLM2G1HE3F-B001
C8
A3
C9
A4
C10
A5
C11
B2
C12
B3
C13
B4
C14
B5
D1
B6
D2
C8 DAT0
NC_25
DAT1
NC_26
DAT2
NC_27
DAT3
NC_28
DAT4
NC_29
DAT5
NC_30
DAT6
NC_31
DAT7
NC_32 NC_33
D3
NC_34
M6
D4
M5
D12 D13
CLK
NC_35
CMD
NC_36 NC_37
D14 E1
A6
E2
A7
E3
C5
E12
E5 E8
E13
E9
E14
E10
F1 F2
F10
F3
G3 G10
F12 F13
H5
F14
J5 K6
G1
K7
G2
K10
G12 G13
P7
G14
P10
H1
NC_38 NC_3
NC_39
NC_4
NC_40
NC_23
NC_41
NC_42
NC_46
NC_43
NC_47
NC_44
NC_48
NC_45
NC_49
NC_52
NC_50
NC_58
NC_51
NC_59
NC_53
NC_66
NC_54
NC_73
NC_55
NC_80
NC_56
NC_81
NC_57
NC_82
NC_60
NC_116
NC_61
NC_119
NC_62 NC_63
H2
NC_64
K5
H3
RSTN
H12 H13 C6
H14
M4
J1 J2
N4
J3
P3 P5
J12
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5
J13 J14 K1
E6
K2
F5 J10
K3
K9
K12
VDDF_1 VDDF_2 VDDF_3 VDDF_4
K13 K14 C2
L1
VDDI
L2 L3 C4
L12
E7
L13
G5
L14
H10
M1
K8
M2 M3
N2
M7
N5
M8
P4
M9
P6
M10
VSS_1 VSS_2 VSS_3
SAMSUNG_EMMC_2GB
10K R8103
IC8100 SDIN5D2-4G-974L1
AR8100 22 1/16W
HYNIX_EMMC_2GB
10K R8102
R8116 10K
10K R8101
R8117 10K
10K R8100
47K
47K
47K
47K R8107-*1
R8106-*1
R8105-*1
EMMC DATA LINE 10K PULL/UP
DEV_HYNIX_EMMC_4GB
EMMC_DATA[0-7]
R8104-*1
47K
47K
47K R8103-*1
R8102-*1
R8101-*1
R8100-*1
47K
EMMC DATA LINE 47K PULL/UP
NC_65 NC_67 NC_68 NC_69 NC_70 NC_71 NC_72 NC_74 NC_75 NC_76 NC_77 NC_78 NC_79 NC_83 NC_84 NC_85 NC_86 NC_87 NC_88 NC_89 NC_90 NC_91
VSS_4
NC_92
VSS_5
NC_93
VSS_6
NC_94
VSS_7
NC_95
VSS_8
NC_96
VSS_9
NC_97 NC_98
M11
NC_99
M12
NC_100
A1
M13 M14
A2
N1
A8
N3
A9
N6
A10
N7
A11
N8
A12
N9
A13 A14
N10 N11
B1
N12
B7
N13
B8
N14
B9 B10
P1 P2
B11
P8
B12
P9
B13
P11
B14
P12
C1 C3
P13
C7
P14
NC_1
NC_101
NC_2
NC_102
NC_5
NC_103
NC_6
NC_104
NC_7
NC_105
NC_8
NC_106
NC_9
NC_107
NC_10
NC_108
NC_11
NC_109
NC_12
NC_110
NC_13
NC_111
NC_14
NC_112
NC_15
NC_113
NC_16
NC_114
NC_17
NC_115
NC_18
NC_117
NC_19
NC_118
NC_20
NC_120
NC_21
NC_121
NC_22
NC_122
NC_24
NC_123
C9 C10 C11 C12 C13 C14 D1 D2 D3 D4 D12 D13 D14 E1 E2 E3 E12 E13 E14 F1 F2 F3 F12 F13 F14 G1 G2 G12 G13 G14 H1 H2 H3 H12 H13 H14 J1 J2 J3 J12 J13 J14 K1 K2 K3 K12 K13 K14 L1 L2 L3 L12 L13 L14 M1 M2 M3 M7 M8 M9 M10 M11 M12 M13 M14 N1 N3 N6 N7 N8 N9 N10 N11 N12 N13 N14 P1 P2 P8 P9 P11 P12 P13 P14
DU9 DUMMY_1
DUMMY_9
DUMMY_2
DUMMY_10
DUMMY_3
DUMMY_11
DUMMY_4
DUMMY_12
DUMMY_5
DUMMY_13
DUMMY_6
DUMMY_14
DUMMY_7
DUMMY_15
DUMMY_8
DUMMY_16
DU10 DU11 DU12 DU13 DU14 DU15 DU16
eMMC
11.09.29 81
LGE Internal Use Only
BLM18PG121SN1D L8900 LOGO_LIGHT
+3.5V_ST
Place Near Micom +3.5V_ST
P8900 12507WR-03L
1 LOGO_LIGHT 2
10K R8902 OPT
R8900 22 LOGO_LIGHT LOGO_LIGHT B
3 4
C
LOGO_LIGHT
LOGO_LIGHT R8901 10K
LOGO_LIGHT C8900 0.1uF 16V
Q8900 1K R8903 E LOGO_LIGHT MMBT3904(NXP)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright â&#x201C;&#x2019; 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only