Internal Use Only North/Latin America Europe/Africa Asia/Oceania
http://aic.lgservice.com http://eic.lgservice.com http://biz.lgservice.com
PLASMA TV SERVICE MANUAL CHASSIS : PD11B
MODEL : 60PZ250T
60PZ250T-ZB
CAUTION BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL66986203(1104-REV00)
Printed in Korea
CONTENTS
CONTENTS ............................................................................................................................... 2 SAFETY PRECAUTIONS ...........................................................................................................3 SPECIFICATION.........................................................................................................................4 ADJUSTMENT INSTRUCTION ..................................................................................................6 BLOCK DIAGRAM ...................................................................................................................14 EXPLODED VIEW .................................................................................................................. 15 SCHEMATIC CIRCUIT DIAGRAM ..............................................................................................
Copyright ©2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
Leakage Current Hot Check (See below Figure)
General Guidance An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this monitor is blown, replace it with the specified.
Plug the AC cord directly into the AC outlet. Do not use a line Isolation Transformer during this check. Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
AC Volt-meter
Due to high vacuum and large surface area of picture tube, extreme care should be used in handling the Picture Tube. Do not lift the Picture tube by it's Neck.
Leakage Current Cold Check(Antenna Cold Check) With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1MΩ and 5.2MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
Copyright ©2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-3-
To Instrument's exposed METALLIC PARTS
0.15uF
Good Earth Ground such as WATER PIPE, CONDUIT etc.
1.5 Kohm/10W
LGE Internal Use Only
SPECIFICATION NOTE : Specifications and others are subject to change without notice for improvement. V
Application Range This spec is applied to PDP TV used PD11B Chassis.
V
Model Name
Market
Brand
60PZ250T-ZB
UK
LG
Specification Each part is tested as below without special appointment. (1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 ± 5 (2) Relative Humidity: 65 % ± 10 % (3) Power Voltage: Standard Input voltage (100 V - 240 V ~, 50 / 60 Hz) * Standard Voltage of each product is marked by models. (4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with SBOM. (5) The receiver must be operated for about 20 minutes prior to the adjustment.
V
Test Method (1) Performance : LGE TV test method followed. (2) Demanded other specification Safety : CE, IEC specification EMC : CE, IEC Model Name
Market
Brand Safety : IEC/EN60065
UK
60PZ250T-ZB
EMI : EN55013 EMS : EN55020
V
Module Specification (1) 3D - 60” FHD No
Item
1
Display Screen Device
152 cm (60 inch) wide Color Display Module
Specification
2
Aspect Ratio
16:9
3
PDP Module
PDP60R3####,
Remark PDP
RGB Closed (Well) Type, Glass Filter (38%) Pixel Format: 1920 horiz. By 1080 ver 4
Operating Environment
1) Temp. : 0 deg ~ 40 deg 2) Humidity : 20 % ~ 80%
5
Storage Environment
6
Input Voltage
3) Temp. : -20 deg ~ 60 deg
LGE SPEC
4) Humidity : 10 % ~ 90 % AC 100 V ~ 240 V, 50 / 60 Hz
Copyright ©2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-4-
Maker LG
LGE Internal Use Only
V
Model General Specification
No 1
Item Market
Specification Albania, Austria, Belgium, Bosnia, Bulgaria, Coratia,
Remarks 36 Country
Czech, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy, Kazakhstan, Latvia, Lithuania, Luxembourg, Morocco, Netherlands, Norway, Poland, Portugal, Romania, Russia, Serbia, Slovenia, Spain, Sweden, Slovakia, Switzerland, Turkey, Ukraine, UK 2
Broadcasting system
1) PAL/SECAM BG
EU (PAL Market)
2) PAL/SECAM DK 3) PAL Ⅰ/Ⅱ 4) SECAM L/L’ 5) DVB T 6) DVB C 3
Receiving system
Analog : Upper Heterodyne
4
Scart Jack (1EA)
5
Video Input (1EA)
PAL, SECAM, NTSC
6
Component Input (1EA)
Y/Cb/Cr, Y/ Pb/Pr
7
RGB Input
RGB-PC
Analog (D-Sub 15Pin)
8
HDMI Input (4EA)
HDMI-PC
HDMI/DVI,HDMI2, HDMI3
Digital : COFDM PAL, SECAM Side AV
HDMI-DTV 9
Audio Input (3 EA)
RGB/DVI Audio, Component, AV
10
SPDIF Out(1 EA)
SPDIF Out
11
USB(1EA)
For SVC, S/W Download, DivX
12
LAN
For UK models
Copyright ©2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-5-
L/R Input
LGE Internal Use Only
ADJUSTMENT INSTRUCTION 1. Application Range
3. Main PCB check process
This spec sheet is applied to all of the PDP TV with PD11B chassis.
* APC - After Manual-Insert, executing APC
3-1. Boot file Download (1) Execute ISP program “Mstar ISP Utility” and then click “Config” tab.
2. Specification (1) The adjustment is according to the order which is designated and which must be followed, according to the plan which can be changed only on agreeing. (2) Power adjustment : Free Voltage. (100 V ~ 240 V, 50 Hz / 60 Hz.) (3) Magnetic Field Condition: Nil. (4) Input signal Unit: Product Specification Standard. (5) Reserve after operation: Above 5 Minutes (Heat Run) Temperature : at 25 °C ± 5 °C Relative humidity 65 % ± 10 % Input voltage : 220 V, 60 Hz. (6) Adjustment equipments : Color Analyzer (CA-210 or CA110), DDC Adjustment Jig equipment, SVC remote controller. (7) The receiver must be operated for about 5 minutes prior to the adjustment when module is in the circumstance of over 15 °C - In case of keeping module is in the circumstance of 0 °C, it should be placed in the circumstance of above 15 °C for 2 hours - In case of keeping module is in the circumstance of below -20 °C, it should be placed in the circumstance of above 15 °C for 3 hours,. After RGB Full White in HEAT-RUN Mode, the receiver must be operated prior to the adjustment. O Enter into HEAT-RUN MODE 1) Press the POWER ON KEY on R/C for adjustment. 2) OSD display and screen display PATTERN MODE. - Set is activated HEAT run without signal generator in this mode. - Single color pattern ( WHITE ) of HEAT RUN MODE uses to check panel. - Caution : If you turn on a still screen more than 20 minutes (Especially digital pattern, cross hatch pattern), an after image may be occur in the black level part of the screen.
(2) Set as below, and then click “Auto Detect” and check “OK” message If “Error” is displayed, Check connection between computer, jig, and set. (3) Click “Read” tab, and then load download file (XXXX.bin) by clicking “Read”
(4) Click “Connect” tab. If “Can’t” is displayed, Check connection between computer, jig, and set.
O
(5) Click “Auto” tab and set as below. (6) Click “Run”. (7) After downloadng, check “OK” message.
(8) Push The “IN STOP KEY” - For memory initialiLAtion. Case1 : Software version up 1) After downloading S/W by USB , TV set will reboot automatically 2) Push “In-stop” key 3) Push “Power on” key 4) Function inspection 5) After function inspection, Push “In-stop” key. Case2 : Function check at the assembly line 1) When TV set is entering on the assembly line, Push “In-stop” key at first. 2) Push “Power on” key for turning it on. -> If you push “Power on” key, TV set will recover channel information by itself. 3) After function inspection, Push “In-stop” key.
Copyright ©2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-6-
LGE Internal Use Only
4. USB DOWNLOAD (*.epk file download)
Model
Module
Tool
Tool
Tool
Tool
Tool
option1 option2 option3 option4 option5
(1) Put the USB Stick to the USB socket (2) Automatically detecting update file in USB Stick - If your downloaded program version in USB Stick is Low, it didn’t work. But your downloaded version is High, USB data is automatically detecting (3) Show the message“Copying files from memory”
(4) Updating is staring.
(5) Updating Completed, The TV will restart automatically. (6) If your TV is turned on, check your updated version and Tool option. (explain the Tool option, next stage) * If downloading version is more high than your TV have, TV can lost all channel data. In this case, you have to channel recover. if all channel data is cleared, you didn’t have a DTV/ATV test on production line.
50PZ550-ZA
50R3
36928
37966
54144
26956
32
60PZ550-ZA
60R3
49216
37966
54144
26956
32
60PZ250-ZA
60R3
49280
37966
54144
26892
32
50PZ250-ZA
50R3
36992
37966
54144
26892
32
50PW450-ZA 50T3
37056
37966
54144
26892
32
42PW450-ZA 42T3
24768
37966
54144
26892
32
50PV350-ZA
50R3
37216
21582
54144
26892
32
50PT350-ZA
50T3
37312
21582
54144
26892
32
42PT350-ZA
42T3
25024
21582
54144
26892
32
60PV250-ZA
60R3
49536
21582
54144
26892
32
42PT250-ZA
42T3
25088
21582
54144
26892
32
60PV250-TA
60R3
49536
22934
54144
26892
32
50PV250-TA
50R3
37248
22934
54144
26892
32
50PW350-TA 50T3
37088
39318
54144
26956
32
42PW350-TA 42T3
24800
39318
54144
26956
32
60PZ550-TA
50R3
49216
39318
54144
26956
32
50PZ550-TA
50R3
36928
39318
54144
26956
32
50PT250-TA
50T3
37376
22934
54144
26892
32
42PT250-TA
42T3
25088
22934
54144
26892
32
50PZ550T-ZA 50R3
36928
37966
54144
29001
544
50PZ550T-ZA 50R3
36928
37966
54144
29004
544
60PZ250T-TA 60R3
49280
37966
54144
28940
544
50PZ250T-ZA 50R3
36992
37966
54144
28940
544
50PW450T-ZA 50T3
37056
37966
54144
28940
544
42PW450T-ZA 42T3
24768
37966
54144
28940
544
50PV350T-ZA 50R3
37216
21582
54144
28940
544
60PV250T-ZA 60R3
49536
21582
54144
28940
544
5. ADC Process 5-1. ADC - Enter Service Mode by pushing “ADJ”key, - Enter Internal ADC mode by pushing “ G ” key at “5. ADC Calibration” * Caution: Using ‘power on’ button of the Adjustment R/C , power on TV.
* After downloading, have to adjust TOOL OPTION again. (1) Push "IN-START" key in service remote controller. (2) Select "Tool Option 1" and Push “OK” button. (3) Punch in the number. (Each of models has their number.) (4) Completed selecting Tool option.
Copyright ©2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-7-
LGE Internal Use Only
* ADC Calibration Protocol (RS232) NO Enter
Item
Adjust Process will start by execute RS232C Command. Color temperature standards according to CSM and Module
O
CMD 1 CMD 2 Data 0
Adjust
A
A
0
0
Adjust ‘Mode In’
When transfer the ‘Mode In’
Mode
Carry the command.
ADC
ADC
adjust
Adjust
A
D
1
0
CSM
PLASMA
Cool
11000K
Medium
9300K
Warm
6500K
Automatically CS-1000/CA-100+/CA-210(CH 10) White balance adjustment coordinates and color temperature.
O
adjustment (The use of
Color Coordinate
CSM
a internal pattern) Adjust Sequence - aa 00 00 [Enter Adjust Mode] - xb 00 40 [Component1 Input (480i)] - ad 00 10 [Adjust 480i Comp1] - xb 00 60 [RGB Input (1024*768)] - ad 00 10 [Adjust 1024*768 RGB] - aa 00 90 End Adjust mode * Required equipment : Adjustment R/C.
x
y
Temp
±Color Coordinate
Cool
0.276
0.283
11000K
0.002
Medium
0.285
0.293
9300K
0.002
Warm
0.313
0.329
6500K
0.002
* Connecting picture of the measuring instrument (On Automatic control) - Inside PATTERN is used when W/B is controlled. Connect to auto controller or push Adjustment R/C POWER-ON ->Enter the mode of White-Balance, the pattern will come out.
6. Function Check 6-1. Check display and sound - Check Input and Signal items. (cf. work instructions) (1) TV (2) AV (SCART1/SCART2/ CVBS) (3) COMPONENT (480i) (4) RGB (PC : 1024 x 768 @ 60hz) (5) HDMI (6) PC Audio In * Display and Sound check is executed by Remote controller. * Caution : Not to push the INSTOP KEY after completion if the function inspection.
7. Total Assembly line process 7-1. POWER PCB Assy voltage adjustment (Vs voltage adjustment) O O
Required Equipment for adjustment - D.M.M Condition for adjustment - No signal with the snow noise in RF mode)
O
7-2. Adjustment Preparation - Required Equipment O Remote controller for adjustment O Color Analyzer ( CS-1000, CA-100,100+,CA-210 or same product : CH 10 (PDP) * Please adjust CA-210, CA-100+ by CS-1000 before measuring O Auto W/B adjustment instrument(only for Auto adjustment) O 9 Pin D-Sub Jack(RS232C) is connected to the AUTO W/B EQUIPMENT. Before Adjust of White Balance, Please press POWER ONLY key Copyright ©2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
* Auto-control interface and directions (1) Adjust in the place where the influx of light like floodlight around is blocked. (Illumination is less than 10ux). (2) Measure and adjust after sticking the Color Analyzer (CA100+, CA210 ) to the side of the module. (3) Aging time After aging start, keep the Power on (no suspension of power supply) and heat-run over 5 minutes
-8-
Auto adjustment Map(RS-232C) RS-232C COMMAND [ CMD ID DATA ] Wb 00 00 White Balance Start Wb 00 ff White Balance End RS-232C COMMAND CENTER [CMD ID DATA] Cool Mid
MIN
Warm
(DEFAULT)
MAX
Cool
Mid
Warm
00
192
192
192
R Gain
jg
Ja
jd
192
G Gain
jh
Jb
je
00
192
192
192
192
B Gain
ji
Jc
jf
00
192
192
192
192
R Cut
64
64
64
128
G Cut
64
64
64
128
B Cut
64
64
64
128
LGE Internal Use Only
* Caution - Color Temperature : COOL, Medium, Warm. - One of R Gain/G Gain/ B Gain should be kept on 0xC0, and adjust other two lower than C0. (when R/G/B Gain are all C0, it is the FULL Dynamic Range of Module) * Manual W/B process using adjusts Remote control. (1) After enter Service Mode by pushing “ADJ” key, (2) Enter White Balance by pushing “ G ” key at “. White Balance” (3) Stick the sensor to the center of the screen and select each items(Red/Green/Blue Gain) using D/E (CH +/-) key on R/C. (4) Adjust R/G/B Gain using F/G (VOL +/-) key on R/C. (5) Adjust three modes all(Cool/Medium/Warm) : Fix the one of R/G/B Gain and Change the others. (6) When the adjustment is completed, Enter “COPY ALL”. (7) Exit adjustment mode using EXIT key on R/C.
7-4. DDC EDID Write (RGB 128Byte ) -> Not used any more, Use Auto D/L (1) Connect D-sub Signal Cable to D-Sub Jack. (2) Write EDID DATA to EEPROM (24C02) by using DDC2B protocol. (3) Check whether written EDID data is correct or not. * For SVC main Ass’y, EDID have to be downloaded to Insert Process in advance.
7-5 DDC EDID Write (HDMI 256Byte) -> Not used any more, Use Auto D/L (1) Connect HDMI Signal Cable to HDMI Jack. (2) Write EDID DATA to EEPROM(24C02) by using DDC2B protocol. (3) Check whether written EDID data is correct or not. * For SVC main Ass’y, EDID have to be downloaded to Insert Process in advance.
7-6. EDID DATA (1) All Data : HEXA Value (2) Changeable Data : *: Serial No : Controlled / Data:01 **: Month : Controlled / Data:00 ***:Year : Controlled ****:Check sum
7-7. EDID DATA Auto Download (1) Press Adj. key on the Adj. R/C, (2) Select EDID D/L menu. (3) By pressing Enter key, EDID download will begin (4) If Download is successful, OK is display, but If Download is failure, NG is displayed. (5) If Download is failure, Re-try downloads.
* After You finish all adjustments, Press °∞In-start°± button and compare Tool option and Area option value with its BOM, if it is correctly same then unplug the AC cable. If it is not same, then correct it same with BOM and unplug AC cable. For correct it to the model’s module from factory JIG model. * Push The “N STOP KEY” after completing the function inspection. And Mechanical Power Switch must be set “ON”. * To check the coordinates of White Balance, you have to measure at the below conditions. Picture mode : Vivid, Energy Saving : Off, Below the Advanced control, Dynamic Contrast : Off, Dynamic Colour : Off Colour Temp.
*Caution: Never connect HDMI & D-sub Cable when EDID downloaded.
-> Picture Mode change : Vivid ? Vivid(User)
O
Edid data and Model option download (RS232)
NO
7-3. DPM operation confirmation (Only Apply for MNT Model)
Enter
Item download
A
A
download ‘Mode In’
* Check if Power LED Color and Power Consumption operate as standard.
Mode
(1) Set Input to RGB and connect D-sub cable to set (2) Measurement Condition: (100~240V@ 50/60Hz) (3) Confirm DPM operation at the state of screen without Signal
EDID data download
Copyright ©2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
CMD 1 CMD 2 Data 0 0
0 When transfer the ‘Mode In’ Carry the command.
A
E
00 10 Automatically
Model
download
option
(The use of
download
a internal pattern)
-9-
LGE Internal Use Only
(3) 3D - FHD HDMI2 EDID data
7-8. Manual Download * Caution * Use the proper signal cable for EDID Download - Analog EDID : Pin3 exists - Digital EDID : Pin3 exists * Caution: - Never connect HDMI & D-sub Cable at the same time. - Use the proper cables below for EDID Writing. - Download HDMI1, HDMI2 separately because HDMI1 is different from HDMI2.
(4) 3D - FHD HDMI3 EDID data No.
Item
Condition
Hex Data
1
Manufacturer ID
GSM
1E6D
2
Version
Digital : 1
01
3
Revision
Digital : 3
03
7-9. EDID DATA (1) 3D - FHD RGB EDID data
ⓐ Vender ID
(2) 3D - FHD HDMI1 EDID data O
Copyright ©2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
- 10 -
Checksum: Changeable by total EDID data.
LGE Internal Use Only
(3) Put on the 3D Glasses, And block the right side of Glasses (LEFT:OPEN[TEST], RIGHT:CLOSED) And check the middle sides of picture , RED -> normal , others -> abnormal
8. Checking the EYE-Q Operation. (1) Press the EYE Key on the adjustment remote controller. (2) Check the Sensor DATA ( It must be under 10) and keep the data longer than 1.5s (3) Check ‘OK’
(Sensor DATA 0 ~ 4095, Power Saving Mode 0 ~ 12) * IF you press IN-STAP Button, change Green Eye-check OSD.
(4) Put on the 3D Glasses, And block the right side of Glasses (LEFT:CLOSED, RIGHT:OPEN[TEST]) And check the middle sides of picture , BLUE -> normal , others -> abnormal
9. Ping TEST (DVB T2 model only, PP11B/L) * This test is to check Network operation. (1) Connect LAN cable from Computer to TV Set (2) When network operates normally, you can see “OK” on Computer
10. 3D Function Test (Pattern Generator MSPG-3233, HDMI mode NO. 371 , pattern No. 81) (1) Please input 3D test pattern like below
11. Model name & Serial number download 11-1. Model name & Serial number D/L
(2) Enter 3D mode , then select side by side (If you don’t wear a 3D Glasses, you will see the picture like below)
Copyright ©2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
- 11 -
(1) Press “Power on” key of service remocon.(Baud rate : 115200 bps) (2) Connect RS232 Signal Cable to RS-232 Jack. (3) Write Serial number by use RS-232. (4) Must check the serial number at signal test of customer support. (Refer to below).
LGE Internal Use Only
5) Check the Diagnostics (DTV country only) ? Buyer model displayed (ex 42LD450)
11-2. Signal TABLE
CMD LENGTH ADH ADL Data CS Delay
: A0h : 85~94h (1~16 bytes) : EEPROM Sub Address high (00~1F) : EEPROM Sub Address low (00~FF) : Write data : CMD + LENGTH + ADH + ADL + Data_1 + ... + Data_n : 20ms
11-3. Command Set
12. CI+ Key Download [Description] FOS Default write : <7mode data> write Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0, Phase Data write : Model Name and Serial Number write in EEPROM,.
12-1. Download Procedure (1) Press "Power on" button of a service R/C.(Baud rate : 115200 bps) (2) Connect RS232-C Signal Cable. (3) Write CI+ Key through RS-232-C. (4) Check whether the key was downloaded or not at ‘In Start’ menu. (Refer to below)
11-4. Method & notice (1) Serial number D/L is using of scan equipment. (2) Setting of scan equipment operated by Manufacturing Technology Group. (3) Serial number D/L must be conformed when it is produced in production line, because serial number D/L is mandatory by D-book 4.0 * Manual Download (Model Name and Serial Number) - If the TV set is downloaded By OTA or Service man, Sometimes model name or serial number is initialized.( Not always) - There is impossible to download by bar code scan, so It need Manual download. 1) Press the ‘instart’ key of ADJ remote controller. 2) Go to the menu ‘5.Model Number D/L’ like below photo. 3) Input the Factory model name(ex 42LD450-TA) or Serial number like photo. 4) Check the model name Instart menu ? Factory name displayed (ex 42LD450-TA)
Copyright ©2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
-> Check the Download to CI+ Key value in LGset.
12-2. Check the method of CI+ Key value
- 12 -
(1) check the method on Instart menu
LGE Internal Use Only
(2) check the method of RS232C Command 1) into the main ass’y mode (RS232 : aa 00 00) CMD 1
CMD 2
A
A
Data 0 0
0
2) check the key download for transmitted command (RS232 : ci 00 10) CMD 1
CMD 2
C
1
Data 0 1
0
3) result value - normally status for download : OKx - abnormally status for download : NGx
12-3. Check the method of CI+ Key value (RS232) (1) into the main ass’y mode (RS232 : aa 00 00) CMD 1
CMD 2
A
A
Data 0 0
0
(2) Check the mothed of CI+ key by command (RS232 : ci 00 20) CMD 1
CMD 2
C
1
Data 0 2
0
((3) result value
13. SW Download Guide. ※ Put a *.bin to USB Stick and Turn on TV (1) Put the USB Stick to the USB socket (2) Automatically detecting update file in USB Stick * If your downloaded program version in USB Stick is Low, it didn’t work. But your downloaded version is High, USB data is automatically detecting. (3) Show the message“Copying files from memory” (4) Updating is staring. (5)0 Updating Completed, The TV will restart automatically. After turn on TV, Please press‘IN-STOP’button on ADJ Remote-control. ※ IF you don’t have ADJ R/C, enter‘Factory Reset’in OPTION MENU. (6) When TV turn on, check the Updated version on Diagnostics MENU. Copyright ©2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
- 13 -
LGE Internal Use Only
BLOCK DIAGRAM
Copyright Š2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
- 14 -
LGE Internal Use Only
EXPLODED VIEW IMPORTANT SAFETY NOTICE
910
590
A13
203
A12
LV1
A4
A21 A2
120
302
300
570
560
305
304
301
202
A10
303
204
207
205
501
201
580
240
200
206
602
209
208
520
601
900
400
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
- 15 -
LGE Internal Use Only
Half SCART / COMP1 Option
Full SCART +5V +3.3V
EU JK100 PSC008-02
+3.3V
R114 10K EU AV/SC1_DET R115 1K EU
SHIELD
R136 0 EU
B SC1_SOG_IN
C
D103
30V
AV_DET
D104
COM_GND SYNC_IN
30V
C112 220pF 50V READY
20 R120 75 EU
SYNC_GND2 18 SYNC_GND1
R145 330 EU
E
R143 100 1/4W EU
R150 220 EU
SC1_FB R_OUT
READY
RGB_GND
R153 180 EU
R_GND
SC1_R-/COMP1_Pr-
D108
30V
G_OUT
R163 7.5K EU
G_GND ID
READY
R128 10K EU
R164 1K EU
E
SC_RE1
R133 12K EU
22
R1118 0 EU
R187 0 EU
21
R188 100 EU
20
R196 470K EU
C133 100uF 16V EU
18 SYNC_GND1 17 RGB_IO 16 D116
R_OUT
B
E
SC2_ID
Q107 2SC3052 EU
R167 12K C EU
AUDIO_L_IN
R_GND R1101 10K EU
R197 2.7K EU
E
13 D2B_OUT
R1116 0 EU
12 D117
G_OUT 11
SC2/COMP1_L_IN
D112 ENKMC2838-T112 EU
Q106 2SC3052 EU
R194 10K
R189 12K
B_GND SC1_B-/COMP1_Pb-
10
C135 1000pF 50V READY
G_GND
R199 470K
9 D118
ID
5
IC100 AS324MTR-E1
P_17V
R1100 470K
DTV_L_OUT
AUDIO_L_OUT 3
R129 0 EU
C105 1000pF 50V
AUDIO_R_IN 2
D102 READY 30V
AUDIO_R_OUT
OUT1 R147 2K EU
C108 4700pF 50V Q101 2SC3052 EU
1
READY
R132 0 EU
C106 1000pF 50V
C114 10uF 16V EU
R155 6.8K EU
R146 2K EU
C109 4700pF 50V
C115 27pF 50V EU
R159 15K EU
IN1-
SCART1_Lout
IN1+ R162 5.6K EU
VCC
Close to Jack SCART1_Rout R103 0 SC1_G+/COMP1_Y+> R100 75
R104 0
C116 27pF 50V EU
DTV_R_OUT
SC1_G-/COMP1_Y-
R148 2K EU
R105 0 SC1_B+/COMP1_Pb+>
SC1_B+/COMP1_Pb+
READY C100 27pF 50V
R106 0
GND
Q102 2SC3052 EU
SC1_B-/COMP1_Pb-
R102 75 GND
OUT2
14
2
13
3
12
4
11
5
10
6
9
7
8
IN4-
R171 33K EU
C122 27pF 50V EU
IN4+
SCART2_Lout
R175 10K EU
C124 10uF 16V EU
AUDIO_L_OUT C129 4700pF 50V
R184 2K EU
D122 3
C137 1000pF 50V
R192 0 EU
2
D124 READY 30V
AUDIO_R_OUT 1
R191 0 EU
C130 4700pF 50V
30V
D123 READY 30V
AUDIO_R_IN
Q111 2SC3052 EU
R186 2K EU
R168 5.6K EU
GND
READY
C138 1000pF 50V
SCART2_Rout
IN3+
JK105 PPJ-230-01
R169 5.6K EU
IN3-
OUT3
4
MNT_L_OUT
OUT4
C123 27pF 50V EU
R172 33K EU
R170 10K EU
[RD]MONO
13
[RD]R_IN
4
NON_EU
MNT_R_OUT C125 10uF 16V EU
C113 10uF 16V EU
R185 2K EU Q110 2SC3052 EU
R182 2K EU
SCART1_MUTE
[WH]L_IN
5
R1111 0
[RD]R
6
NON_EU R1109 0
[BL]B
7
[GN]C_DET
8
[GN]G
9
SC1_R+/COMP1_Pr+> SC1_B+/COMP1_Pb+>
D121
NON_EU
SC1_R+/COMP1_Pr+
READY C102 27pF 50V
R107 0
R160 6.8K EU
R158 15K EU
IN2-
1
R149 2K EU
R108 0 SC1_R+/COMP1_Pr+>
IN2+ R161 5.6K EU
SC1_G+/COMP1_Y+
READY C101 27pF 50V
GND
R101 75
READY
5 AUDIO_GND
4 30V
6 B_GND
AUDIO_GND
D101 READY 30V
7 AUDIO_L_IN
C136 1000pF 50V READY
R193 10K
R190 12K
30V
D119 READY 30V D120 READY 30V
B_OUT
R134 12K EU
30V READY
D2B_IN
SC2/COMP1_R_IN
C141 R131 1000pF 10K EU 50V READY
R127 470K EU
6
30V READY
14
AV/SC1_R_IN
7 30V
READY
SYNC_GND2 R1117 0 NON_EU
15
R165 1K EU
SC1_B+/COMP1_Pb+>
30V
D115 READY 30V
19
R1102 75 EU
8 B_OUT
READY
D100
D114
SYNC_IN SYNC_OUT
C131 1000pF 50V READY
30V READY
COM_GND
8
D110 READY30V D111
C140 1000pF 50V READY
R126 470K EU
SC1_G-/COMP1_Y-
9
R195 75 EU
C B
SC_RE2
10 30V
R177 180 EU
C134 27pF 50V EU
C132 220pF 50V READY
SC2_VOUT R179 240 EU
D113
AV_DET
Q112 E 2SC3052 EU
RGB_GND
Q105 2SC3052 EU
B
AV/SC1_L_IN
R183 330 EU
E R174 10K EU
C
SC1_G+/COMP1_Y+>
SC2_CVBS_IN
REC_8
R125 2.7K EU
D2B_IN
23 B
R178 390 READY
R166 12K EU
11
READY
D109
C121 100uF 16V EU
3K R1468 EU
SC1_ID R121 10K EU
D2B_OUT 12
C
Q108 2SC3052 EU
B
P_17V
14 13
DTV/MNT_VOUT
C117 100uF 16V EU
R157 10K EU
R130 33 EU
R124 75 EU
SC1_R+/COMP1_Pr+>
15
SHIELD C
C
R151 390 READY
RGB_IO 16
D107 READY30V
R1107 1K B Q109 ISA1530AC1 EU
C ATV_OUT
SC2/COMP1_DET
E
R173 18K EU
B
R144 0 EU
R176 470 EU
R156 15K EU
E Q104 2SC3052 EU
C111 1000pF 50V READY
C107 100uF 16V EU
R123 470K EU
17 30V
Q100 2SC3052 EU
SC1_VOUT
SYNC_OUT 19
READY
D106
C110 27pF 50V EU
R122 75 EU
21 D105 READY30V
B
AV/SC1_CVBS_IN
22
READY
Q103 ISA1530AC1 EU
C
23
EU JK101 PSC008-02
R1112 10K
C119 0.1uF 16V READY
C118 0.1uF 16V READY
R154 470 EU
E
R1110 0 SC1_G+/COMP1_Y+>
30V READY
NON_EU [GN]GND
SC1_R-/COMP1_Pr-
10 11
FIX-TER
+3.3V_CI
CI SLOT
+5V_CI_ON EU C103 22uF 10V
EU
AR108
EU C104 0.1uF 16V
PCM_A[12]
CI_ADDR[13]
PCM_A[13]
CI_ADDR[14]
PCM_A[14]
1OE
CI_DET
/PCM_REG
REG
JK104 EAG41860102 10067972-000LF
IC101 TC74LCX244FT
33
CI_ADDR[12]
1A1
PCM_A[0] 2Y4
CI_ADDR[7]
EU AR109
CI_ADDR[8]
33
1A2
PCM_A[1]
PCM_A[8]
2Y3
BUF_FE_TS_DATA[0-7]
EU R142 10K
PCM_D[3]
37
EU
3
PCM_D[4]
CI_ADDR[10]
PCM_A[10]
CI_ADDR[11]
PCM_A[11]
PCM_A[3]
38
4
PCM_D[5]
39
5
PCM_D[6]
CI_OE
CI_TS_DATA[6] CI_TS_DATA[7]
40
6
CI_WE
41
7
R137
PCM_D[7] 33 EU
R138
33 EU
CI_IOWR
EU
42
R118 10K
43
9
44
10
45
11
46
12
47
13
48
14
BUF_FE_TS_DATA[0] BUF_FE_TS_DATA[1]
49
BUF_FE_TS_DATA[2]
READY R119 0
BUF_FE_TS_DATA[3]
BUF_FE_TS_DATA[4]
EU R116 10K
BUF_FE_TS_DATA[5] BUF_FE_TS_DATA[6] BUF_FE_TS_DATA[7] PCM_RST /PCM_WAIT REG CI_TS_CLK CI_TS_VAL
R110 EU 33 R111 EU 33 AR103
33
EU READY R117 0
CI_TS_SYNC
CI_TS_DATA[0]
8
AR104 EU
33
51
17 18
53
19
54
20
56
22 23
58
24
59
25
60
26
61
27
62
28
BUF_FE_TS_DATA[1]
2 G2
69
EU
FE_TS_DATA[1]
6
15
7
14
8
13
9
12
10
11
1Y1
CI_ADDR[0] 2A4
PCM_A[7] 1Y2
CI_ADDR[1] 2A3
PCM_A[6] 1Y3
CI_ADDR[2] 2A2
PCM_A[5] 1Y4
CI_ADDR[3] 2A1
PCM_A[4]
BUF_FE_TS_DATA[2]
FE_TS_DATA[2]
BUF_FE_TS_DATA[3]
FE_TS_DATA[3]
/PCM_IRQA
AR102 33 EU FE_TS_DATA[4]
BUF_FE_TS_DATA[5]
FE_TS_DATA[5]
BUF_FE_TS_VAL_ERR
BUF_FE_TS_DATA[6]
FE_TS_DATA[6]
BUF_FE_TS_CLK
BUF_FE_TS_DATA[7]
FE_TS_DATA[7]
BUF_FE_TS_SYN BUF_FE_TS_VAL_ERR
FE_TS_CLK
BUF_FE_TS_CLK
+5V
EU Q114 RSR025P03
FE_TS_DATA[0-7] S
CI_ADDR[5]
EU L101 120-ohm CI Part
+5V_CI_ON
D
CI_ADDR[4] CI_ADDR[3] G
CI_ADDR[2] CI_ADDR[1]
EU
R1105 10K READY
CI_ADDR[0]
AR106 33
+5V
PCM_D[0]
+3.3V_CI EU R198 10K
CI_ADDR[0-14]
EU R1103 10K
IN_B
1
IN_A
2
GND
3
/CI_CD2 /CI_CD1
G1 1 PCM_D[0-7]
EU R1114 10K
EU C139 0.1uF 16V
R1122 10K READY
+3.3V_CI
3.3V_CI
IC102 KIC7SZ32FU EU
5
VCC
4
OUT_Y
C
EU
PCM_D[0-7] R1119 33
EU R1121 33
+3.3V
EU R1115 2K
EU R1120 10K EU
CI_DET
EU
PCM_5V_CTL
CI DETECT
Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
16
FE_TS_VAL_ERR
/PCM_CD
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
5
2OE
CI_ADDR[6]
PCM_D[2]
34
17
FE_TS_SYN
CI_WE
CI_ADDR[12] CI_ADDR[7]
PCM_D[1]
68 100
CI_ADDR[13]
READY
31
CI_TS_DATA[2] CI_TS_DATA[3] R113
BUF_FE_TS_DATA[0]
BUF_FE_TS_DATA[4]
30
33
4
VCC
AR110 33 EU
AR101 EU 33
0
29
32
/CI_CD2
R135
65 67
18
/PCM_IOWR
BUF_FE_TS_DATA[0-7]
CI_ADDR[9] CI_ADDR[8]
R141 EU 100
64 66
19
/PCM_IORD
CI_IOWR CI_OE
CI_ADDR[14]
63
CI_TS_DATA[1]
GND
/PCM_OE
20
3
/PCM_WE
CI_IORD
/PCM_CE
CI_ADDR[11]
21
55 57
CI_ADDR[4]
33
AR107
EU
2
CI_ADDR[10]
16
50
2Y1
EU
15
52
CI_ADDR[5] 1A4
CI_TS_DATA[5]
CI_IORD
PCM_A[2] 2Y2
CI_TS_DATA[4]
BUF_FE_TS_SYN
BUF_FE_TS_DATA[0-7]
1A3
AR105 33
36
33
CI_ADDR[6]
PCM_A[9]
FE_TS_DATA[0-7]
AR100
EU
EU
35
R112 EU 100
/CI_CD1
CI_ADDR[9]
1
EU C120 0.1uF 16V
R1104 0
R1106 10K
B EU R1108 10K
+3.3V_CI EU L100 120-ohm CI Part
EU Q113 2SC3052
EU C126 0.1uF 16V
E
EU C128 0.1uF 16V
CI POWER ENABLE CONTROL
GP2R_S7R SCART/COMP1 CI Slot
2010-08-31 1
LGE Internal Use Only
S7_TXD 5V_DET_HDMI_2
HDMI_2
HDMI_1 C Q200 2SC3052
SHIELD
B
R212 10K
SIDE_HDMI C
R200 1K
Q201 2SC3052
R225 1K 20
20
E
17
R206 33
DDC_SCL_2
CEC_REMOTE
13
CK-_HDMI2
12
7 6 5 4 3 2 1
CK+_HDMI2
D0D0_GND
CK+ D0-
D0+ D1-
2
D2+
1
D2+_HDMI2
JK200 HDMI1
5V_HDMI_2
D1+ D2-
D0+_HDMI3
7
D1-_HDMI3
6
D1+_HDMI3
4
D2-_HDMI3
3
R268 0
D2+_HDMI3
D207 READY 5V_HDMI_3
EAG59023301
D219 READY
8 4
RIN1
ROUT1
9
Q203 BSS83
CK+_HDMI4
DOUT1
D229 30V READY
C232 220pF 50V READY
CEC_REMOTE_S7
D
C233 220pF 50V READY R1435 100
5 10
D0-_HDMI4
DIN1 UART_TXD_3D DIN2
232C_NO4
G
R273 0 NON_RGB
D0+
PC_SER_DATA
D0+_HDMI4
R274 0 NON_RGB
D1-
PC_SER_CLK
D1-_HDMI4 D1_GND
D226 30V READY
D1+ D1+_HDMI4
8
A2
2
7
3
6
WP
SCL
GND
4
5
R208
R209
10K
10K
A1
JP200 R203
A2 DDC_SCL_2
22
VCC
A0
$0.055 2
3
7
6
WP
SCL
GND DDC_SDA_2
22
4
5
R233
R234
10K
10K
1
A2 DDC_SCL_3
2
7
3
6
GND DDC_SDA_3
4
5
RED_GND GND_2
11
RED
R238 75
13
14
15
DSUB_R-
C
COMP2_Y+>
R264 10K
5A [GN]CONTACT READY D220 30V
[BL]E-LUG-S
R244 0
DSUB_VSYNC
GND_1
16
5
1
NAND GATE Y
VCC
VINPUT
C234 0.1uF 16V READY
C236 10pF 50V
232C_NO6
4
2
3
A
SPDIF_OUT
B
GND
R293 100 READY R296 100
+3.3V
D224 30V READY
C217 10pF 50V READY
READY D221 30V
[RD]E-LUG-S
R272 1K
R283 0 R284 0
[RD]O-SPRING_1
R285 0
COMP2_Pr+>
[RD]CONTACT_1
COMP2_Pb+>
4C
DSUB_G+ R240 75
R246 0
SHILED
C218 10pF 50V READY
5D D215 30V READY
[RD]CONTACT_2 4E 5E
D209 30V READY
R259 470K
[RD]O-SPRING_2
DSUB_G-
COMP2_L_IN
R261 10K
[WH]O-SPRING
R245 0 DSUB_G+>
D216 30V READY
[RD]E-LUG
R260 470K
6E
C225 1000pF 50V
D230 30V READY
5A
[YL]E-LUG
4A
[YL]O-SPRING
3A
[YL]CONTACT
4B
[WH]O-SPRING
3C
[RD]CONTACT
C237 0.1uF 16V
D231 30V READY
R1200 75
C240 27pF 50V
R1201 10K SIDEAV_L_IN
COMP2_Pb+
C230 10pF 50V READY
D225 30V READY
C224 R265 12K 1000pF 50V R262 10K
R286 0
R281 75
R1203 1K SIDEAV_DET
JK207 PPJ235-01
SIDEAV_CVBS_IN
COMP2_Y-
7C DSUB_B-
COMP2_Y+
C229 10pF 50V READY
AV/COMP2_DET
5B
R294 10K
COMP2_Pr-
R280 75
COMP2_Y+> R270 10K
COMP2_Pr+
C228 10pF 50V READY
COMP2_DET
COMP2_Pb+>
RGB_DDC_SCL C211 10pF 50V
R271 1K
R282 0
5C
DDC_GND C209 10pF 50V
R279 75
D223 30V READY
[BL]O-SPRING
D211 30V READY
DDC_CLOCK
5
+3.3V
4A
R239 75
R219 33
SYNC_GND
10
RIN2
232C_NO4
SIDE CVBS
[GN]O-SPRING
DSUB_B+
DSUB_B+>
V_SYNC
4
R242 0
DSUB_B+>
DSUB_HSYNC
BLUE
8
C243 0.1uF 16V R1437 100
DDC_SDA_4
R243 0
R218 33
9
R1436 100
DOUT2
FIX_POLE
7B
NC
9
SDA
6A
DSUB_G+>
H_SYNC
3
DDC_SCL_4
[GN]E-LUG C216 10pF 50V READY
D210 30V READY
RGB_DDC_SDA
GREEN BLUE_GND
8
JP206
DSUB_R+
DSUB_R+>
DSUB_R+>
DDC_DATA
12
10K
JK210 PPJ234-02
R241 0
GREEN_GND
7 2
R257
10K
COMP2_Pr+>
R224 1K
C210 0.1uF 16V READY
7
READY
GND
Close to Jack
D206 30V READY
10
V-
R251 22
22
DSUB_DET
1
SCL
R256
COMPONENT2
R217 10K
6
IC204 NL17SZ00DFT2G VCC
Close to Jack
JK205 SPG09-DB-010
6
WP
R250 22
+3.3V
RGB PC
VCC
22
SDA R227
8
$0.055 A1
JP203 R228
SDA R202
EDID_WP R255 10K
$0.055 A1
11
C242 0.1uF 16V
C2-
+5V
R292 1K READY
C235 0.1uF 16V
JK204 JST1223-001 1
1
5
A1
A2
C
HDMI Side IC202 AT24C02BN-SH-T
2
A0
12
C2+
ENKMC2838-T112 D213
R232 10K
VCC
4
SPDIF
+5V
5V_HDMI_4
3
8
13
C241 0.1uF 16V
C1-
D2+_HDMI4
Fiber Optic
1
3
R1206 10K READY
D212 READY
4
A0
14
C244 0.1uF 16V
V+
D2-_HDMI4
EAG62611201
EDID_WP
R207 10K
2
D2+
1
A1
A2
A2
A1
HDMI2 IC201 AT24C02BN-SH-T
EDID_WP
15
C1+
D2-
ENKMC2838-T112 D208
C
HDMI1 IC200 AT24C02BN-SH-T
1
D227 30V READY
+5V ENKMC2838-T112 D205
UART_RXD_3D ROUT2
16
D2_GND
JK202 HDMI Side
+5V
EAG59023302
B
R289 100
3
D0_GND
2 D2+
D228 30V READY
7
S
GND
2
READY
D0-
D2_GND
JK201 HDMI2
+5V
9
5
3
D2_GND
D0-_HDMI3
D1_GND
4
D2-_HDMI2
D200 READY
D218 30V
CEC_REMOTE
CK+
8
5 D1+_HDMI2
CK+_HDMI3
11 10
IC203 MAX3232CDR
VCC 232C_NO6 R288 100
6
27K READY
CK-_HDMI4
D0_GND
6
D1_GND
D2-
R221 0 READY
CEC_REMOTE
12
7
D0+_HDMI2 D1-_HDMI2
D1+
DDC_SCL_4
13
8
D1-
R254 33
DDC_SCL_3
14
9
D0-_HDMI2
D0+
DDC_SDA_4
15
11 10
R291 10K
R1434 100
R269
CK-_HDMI3
12 CK+
R253 33
CEC_REMOTE
13
8
R231 33
R290 10K
1
R220 56K
R252 3.3K
16
15
R297 0
JK203 SPG09-DB-009
R249 1.8K
17
R230 33
C245 0.1uF 16V
PM_RXD HPD4
E
14
14
9
R229 3.3K
+3.3V_ST
+3.3V_ST
18
16
15
11 10
20
DDC_SDA_3
DDC_SDA_2
For CEC R258 B 10K
Q202 2SC3052
R248 1K
19
17 R205 33
16
+3.3V_ST
HPD3
18
R204 3.3K
18
PM_TXD
BODY_SHIELD
R226 1.8K
R201 1.8K
S7_RXD R295 0
5V_DET_HDMI_4
E 19
19
5V_HDMI_4
C
R236 B 10K
SHIELD HPD2
RS232C
HDMI
5V_DET_HDMI_3
5V_HDMI_3
MMBD301LT1G
5V_HDMI_2
4C
[RD]O-SPRING
5C
[RD]E-LUG
D232 30V READY
R298 470K
C239 1000pF 50V
R299 470K
C238 1000pF 50V
R1202 10K SIDEAV_R_IN
COMP2_PbD233 30V READY
COMP2_R_IN R287 0
R1204 12K
R1205 12K
R266 12K
R211 10
GND
PC_SER_DATA C204 D204 220pF 30V 50V READY READY
C207 220pF 50V READY
R210 10
+3.3V
PC_SER_CLK D201 30V READY
C203 220pF 50V READY
SWITCH ADDED
C208 220pF 50V READY
SIDE USB Capacitors on VBUSA should be placed as closd to connector as possible.
PC AUDIO JK209 3AU04S-305-ZC-(LG)
PC_R_IN R_SPRING
5
T_SPRING
6B
D202 C205 30V 1000pF READY 50V
R213 470K
R222 12K
PC_L_IN T_TERMINAL2
D203 C206 30V 1000pF READY 50V
1 R235 10K
8
R237 10K
R247 10K
C219 0.1uF 16V
2
7
3
6
RGB_DDC_SCL
4
5
RGB_DDC_SDA
EDID_WP R216 10K
B_TERMINAL2
1
R214 470K
R223 12K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
C214 10pF 50V
C222 0.1uF 16V
C223 100uF 16V
USB1_OCD
R263 33
8
1
7
2
GND
IN_1
$0.11 OUT_1
FLG
6
3
5
4
+3.3V
2
SIDE_USB_DM
+5V
R277 10K READY
IN_2
EN
R278
4
B_TERMINAL1
4
7B
R215 10K
NC
USB1_CTL
33
SIDE_USB_DP D214 30V READY
D217 30V READY
5
7A
IC205 AT24C02BN-SH-T
T_TERMINAL1
USB DOWN STREAM
6A
+5V_ST
RGB EDID E_SPRING
R267 10K
OUT_2
3
JK208 PEJ027-01 3
IC206 AP2191SG-13
10mm
C215 10pF 50V
GP2R_S7R HDMI/RGB/RS232C/USB COMP2/Side CVBS/SPDIF
2010-08-31 2
LGE Internal Use Only
Audio AMP
H-NIM Tuner +3.3V
R370 10K READY
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
AMP_MUTE READY
E
R341 470
ANT_PWR[OPT]
TU_SIF
AS SCL
R313
SDA NC[IF_TP]
GND_DIG_1 22 R375
R365
22 C305 10pF 50V READY
VDD_PLL R371
TU_SDA
C306 10pF 50V READY
R349 200
R345 200
R343 0
2K
C327 0.1uF 16V
C328 4700pF 50V
R366 TU_CVBS
READY
0 AUD_MASTER_CLK READY
VIDEO
E Q301 ISA1530AC1
+3.3V_TU
+1.26V_TU +3.3V_TU
AUD_SCK READY
B
1.2V
C
AUD_LRCK
+5V_TU
AUD_LRCH
READY
3.3V
R335 10K Close to Tuner
R334
100
READY
TUNER_RESET
IF_AGC_CNTL
R342 0 READY
C308 0.1uF 16V
IF_AGC_MAIN
(Should be guarded by GND) DIF_1
R346 200 EU
R348 200 EU
R359
XTI
22 R377
BICKI
22 R378
LRCKI
22 R379
SDI
2K
RESET INT_LINE
ISA1530AC1 Q302 EU
R360
2K
R316 22
SDA
AMP_SCL
SCL R372 10K C329 0.1uF 50V
GND_DIG_2 C332 0.1uF 50V
VDD_DIG_2
19
18
20
17
21
16
22
15
23
14
24
13
25
12
26
11
27Close-by
Close-by 10
28
9
29
8
30
7
Close-by 31
6
32
5
33 34
THERMAL
R315 22
AMP_SDA
- Should be guarded by GND - No Via - Width(Signal) : min 12mm GND(Signal) : min 24mm
C302 0.1uF 16V
22 R376
22 R380
IF_P_MSTAR C300 0.1uF 16V
FILTER_PLL GND_PLL
C355 22pF 50V C356 22pF 50V C357 22pF 50V C358 22pF 50V
ATV_OUT
IF_N_MSTAR
SHIELD
C333 680pF 50V
AMP_RESET_N
DIF_2
19
PWRDN
2.2 TU_SCL
+5V_TU
RESET
VDD_DIG_1
R338 4.7K
NC
GND
TWARN/OUT4A
C331 0.1uF 50V
R326 1.2K
R319 1.2K
C301 0.1uF 16V
SIF
R374 0
AC_DET
22
R314
EAPD/OUT4B
ISA1530AC1 Q300
+3.3V_TU C307 22uF 10V
C304 0.1uF 16V
NC[RF_AGC]
Q303 2SC3052 READY
R344 82
BST_CNTL +B
READY
4 3
35
2
36 Close-by
1
OUT3A/FFX3A OUT3B/FFX3B CONFIG C335 0.1uF 50V
VDD GND_REG
L302 10.0uH
R381 20
OUT1A GND1
C336 1uF C337
C345 0.22uF 50V
25V C342 330pF 50V
0.1uF 50V
VCC1
L303 10.0uH
C347 0.22uF 50V
C351 1000pF 50V
C348 0.22uF 50V
C352 1000pF 50V
4
3
OUT1B OUT2A
C338 1uF C339
L304 10.0uH
C343 330pF 50V
25V
0.1uF 50V
2
C346 0.22uF 50V
VCC2 R382 20
GND2 P_17V
C340 0.1uF 50V
OUT2B VCC_REG
C334 0.1uF 50V
L305 10.0uH
C341 68uF 35V
C349 0.22uF 50V
C353 1000pF 50V
C350 0.22uF 50V
C354 1000pF 50V
1
SMAW250-H04R P301
1
B
37
+5V_TU +5V_TU
@compC
R373 0 C
R367 10K
TU300 TDTJ-S001D
C344 68uF 35V READY
VSS TEST_MODE SA GND_SUB
[EP]GND
STA368BWG IC303
Key/IR
PC_SER_CLK
+3.3V
P602 12507WS-15L R781 2.2K
R809 4.7K
R807 0
1
IR
G
PC_SER_DATA
DISP_EN
SCL_3.3V_MOD
SDA_3.3V_MOD
TA1P
TA1N
TB1P
TB1N
TC1P
TC1N
TCLK1P
TCLK1N
TD1N
TD1P
TE1N
TE1P
TA2N
TB2N
TA2P
TB2P
TC2N
TC2P
TCLK2N
TCLK2P
TD2N
TD2P
TE2N
TE2P
UART_RXD
UART_TXD
LVDS
0
0
+3.3V_ST
C648 10pF
D
SDA_3.3V_MOD
2 R632 10K
Q701 2N7002(F)
R835
R836
S
P_SDA
R634 R628 10K 10K
R639 10K
KEY1
3
KEY2
4
+3.3V
R780 2.2K
R808 4.7K
R806 0
C
R629 4.7K
B
LED_RED G
S
SCL_3.3V_MOD
D
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
9
10
8
7
6
5
4
3
2
1
HD P701 TF05-51S
P_SCL
R633 4.7K
R630 22
0
R796
2D
0
LVDS_DATA_2_D-
R797
2D
0
PC_SER_CLK
SCL_3.3V_MOD PC_SER_DATA
SDA_3.3V_MOD DISP_EN
TA1N
TA1P
TB1N
TB1P
TC1N
TC1P
TCLK1N
TCLK1P
TD1N
TD1P
TE1N
TE1P
TA2P
TA2N
TB2N
TB2P
TC2N
TC2P
TCLK2N
TD2N
TCLK2P
TD2P
TE2N
TE2P
TA3N
TA3P
TB3N
TC3N
TB3P
TC3P
TCLK3N
TCLK3P
TD3N
TD3P
TE3N
TE3P
TA4N
TA4P
TB4N
TB4P
TC4N
TC4P
LVDS_CLK_2+ LVDS_CLK_2LVDS_DATA_2_C+
0 0 R842 R849
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
R800
2D
0
R801
2D
0
2D
0
R803
2D
LVDS_DATA_2_BLVDS_DATA_2_A+
0
R804
2D
0
R805
2D
0
R782
2D
0
LVDS_DATA_1_ELVDS_DATA_1_D+
5
4
3
2
1
FHD P703 104060-8017
0 0
R802
LVDS_DATA_1_DLVDS_CLK_1+
Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
2D 2D
LVDS_DATA_2_CLVDS_DATA_2_B+
LVDS_DATA_2_ALVDS_DATA_1_E+
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R798 R799
R783
2D
0
R784
2D
0
R785
2D
0
R786
2D
0
R787
2D
LVDS_CLK_1LVDS_DATA_1_C+
0
R788
2D
R789
2D
LVDS_DATA_1_CLVDS_DATA_1_B+
0
R790
2D
0
R791
2D
0
R792
2D
LVDS_DATA_1_BLVDS_DATA_1_A+ LVDS_DATA_1_A-
R793
2D
R822 2D R823 2D
0 0
R824 2D R825 2D
0
R826 2D R827 2D
0
R828 2D R829 2D
0
R830 2D R831 2D
0
R832 2D R833 2D
0
R810 2D R811 2D
0
R812 2D R813 2D R814 2D
0 0 0 0 0
0 0 0 0
R815 2D R816 2D
0
R817 2D R818 2D
0
R819 2D R820 2D
0
0 0
R821 2D
0
0
7
SUB_SCL
8
SUB_SDA
0
C645 10pF READY
C649 10pF READY
9
TE2P
10
TE2N C646 0.1uF 16V
TD2P TD2N
11
TCLK2P TCLK2N
12
TC2P TC2N TB2P
13
TOUCH_VER_CHK
TB2N TA2P
14
TA2N TE1P
15
TE1N TD1P
16
TD1N TCLK1P TCLK1N TC1P TC1N
TCLK4N
TCLK4P
TD4N
TD4P
TE4N
TE4P
UART_TXD
UART_RXD
R795
2D
LVDS_DATA_2_ELVDS_DATA_2_D+
0
6
E
R635 4.7K
+3.3V_ST 2D
R794
ZD601 5.6B
R631 22
Q700 2N7002(F)
LVDS_DATA_2_E+
5 Q602 2SC3052
+3.3V_ST
0 0
TB1P TB1N TA1P TA1N
GP2R_S7R Tuner/Audio Amp LVDS / Key-IR
2010-08-31 3
LGE Internal Use Only
VIDEO/AUDIO R463
IC400 LGE101DC-R [S7R DIVX/MS10]
SSIF/SIFM
DDCDA_DA/GPIO24 QP
DDCDA_CK/GPIO23
D5
B_RXCN
RF_TAGC
B_RX0P
R477 R478
Y4
Close to MStar
0 0
AMP_SCL AMP_SDA DEMOD_SCL DEMOD_SDA TU_SCL TU_SDA +3.3V_AVDD
U1
B_RX0N
TGPIO0/UPGAIN
B_RX1P
TGPIO1/DNGAIN
B_RX1N
TGPIO2/I2C_CLK
B_RX2P
TGPIO3/I2C_SDA
B_RX2N
U2 R3 T3
R458 X400 24MHz 1M
T2
DDCDB_DA/GPIO26
XTALIN
DDCDB_CK/GPIO25
XTALOUT
T1
C450
27pF
C451
27pF
R1411 3.3K
HOTPLUGB/GPIO20
CK+_HDMI4 CK-_HDMI4 D0+_HDMI4 D0-_HDMI4 D1+_HDMI4 D1-_HDMI4 D2+_HDMI4 D2-_HDMI4 DDC_SDA_4 DDC_SCL_4 HPD4
AA1 AB1 AA3 AB3 AB2 AC2 AC1 AB4 AA4 AC3
C_RXCP
SPDIF_IN/GPIO177
C_RXCN
SPDIF_OUT/GPIO178
C_RX0N
B3 A1 B1 B2 C2 C3 B4 C4 E5 D6
C_RX1P
DM_P0
C_RX1N
DP_P0
C_RX2P DM_P1
DDCDC_DA/GPIO28
DP_P1
DSUB_HSYNC DSUB_VSYNC DSUB_R+ DSUB_RDSUB_G+ DSUB_GDSUB_B+ DSUB_B-
C401 C402 C403 C404 C405 C406 C407
0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 1000pF
K1 L3 K3 K2 J3 J2 J1
F14 I2S_IN_BCK/GPIO175
D_RXCP
I2S_IN_SD/GPIO176
D_RXCN
I2S_IN_WS/GPIO174
D_RX0P
R1401
F13
22
F15 D20
D_RX0N
I2S_OUT_BCK/GPIO181
D_RX1P
I2S_OUT_MCK/GPIO179
D_RX1N
I2S_OUT_SD/GPIO182
D_RX2P
I2S_OUT_SD1/GPIO183
D_RX2N
I2S_OUT_SD2/GPIO184
DDCDD_DA/GPIO30
I2S_OUT_SD3/GPIO185
DDCDD_CK/GPIO29
I2S_OUT_WS/GPIO180
D19 F18 E18 D18 E19
C435 C436 C437 C438 C439 C440 C441 C442 C443 C444 C445 C446
LINE_IN_0R LINE_IN_1L
HSYNC0 VSYNC0
LINE_IN_1R
RIN0P
LINE_IN_2L
RIN0M
LINE_IN_2R
GIN0P
LINE_IN_3L
GIN0M
LINE_IN_3R
BIN0P
LINE_IN_4L
BIN0M
LINE_IN_4R
SOGIN0
LINE_IN_5L
P3 P1 P2 P4 P5 R6 T6 U5 V5 U6 V6
LINE_IN_5R
AV/SC1_L_IN AV/SC1_R_IN SC2/COMP1_L_IN SC2/COMP1_R_IN SIDEAV_L_IN SIDEAV_R_IN COMP2_L_IN COMP2_R_IN PC_L_IN PC_R_IN
C457 0.1uF READY
K4 J4 K6 H4 J6 J5
VSYNC1
LINE_OUT_0L
RIN1P
LINE_OUT_2L
RIN1M
LINE_OUT_3L
GIN1P
LINE_OUT_0R
GIN1M
LINE_OUT_2R
BIN1P
LINE_OUT_3R
N3 N2 M2 M1 L2 L1 M3
HSYNC2
TU_CVBS AV/SC1_CVBS_IN COMP2_Y+ SIDEAV_CVBS_IN
C422 C423 C424 C425
0.047uF 0.047uF 0.047uF 0.047uF
L4 L5 L6
R429 R430 R431
SC2_CVBS_IN
33 33 33
C426 C427 C428
0.047uF 0.047uF 0.047uF
M4 M5 K7
RIN2M GIN2M
R432
68
C429
0.047uF
VAG
BIN2M
VRP
P23 AR401 22
T5 R5
P6
C434 4.7uF
C448 1uF
C455 10uF
C454 0.1uF
CVBS2P
ET_RXD0
CVBS3P
ET_TXD0
CVBS4P
AB19 AD17 AA19
R482 2.2K S7_TXD S7_RXD
R483 R484
22 22 22 22
R487 R488
22 22
PWM0 PWM1 AV/COMP2_DET SC_RE2
PM_SPI_WP1/GPIO13/PM7 PM_SPI_WP2/GPIO14/PM8/INT2
PCM_OE_N
GPIO15/PM9
PCM_WE_N
PM_SPI_CS2/GPIO16/PM10
PCM_IORD_N
GPIO17/PM11/INT3
PCM_IOWR_N
GPIO18/PM12/INT4
E11 G9 F9 C5
R496
E8
PM_SPI_CK/GPIO1
PCM_IRQA_N
GPIO0/PM_SPI_CZ
PCM_CD_N
PM_SPI_DI/GPIO2
PCM_WAIT_N
PM_SPI_DO/GPIO3
33
E9
R437 R468 R456 0 R445 0
F7 F6 D8 G12
10K 22 3D READY READY
IC400 LGE101DC-R [S7R DIVX/MS10]
H12 H13 H14
C Q400 2SC3052
3D_RF_GPIO0
R497
TS0_CLK PCM_PF_CE0Z
TS0_VLD
PCM_PF_CE1Z
TS0_SYNC
PCM_PF_OEZ
VDDC : 2026mA +1.26V_VDDC
SPI_SCK
33
SPI_SDI SPI_SDO
L401 120-ohm Main
E10
R498
D10
N23
TS0_D0
PCM_PF_ALE
TS0_D1
PCM_PF_AD[15]
TS0_D2
PCM_PF_RBZ
TS0_D3 TS0_D5
UART_TX2/GPIO65
TS0_D6
UART_RX2/GPIO64
TS0_D7 TS1_CLK
DDCR_DA/GPIO71
TS1_VLD
DDCR_CK/GPIO72 DDCA_DA/UART0_TX
G22 G21
AA6 W6 AA7 Y9 AA8
AB6
TS1_D0 TS1_D2
PWM0/GPIO66
TS1_D3
PWM1/GPIO67
TS1_D4
PWM2/GPIO68
TS1_D5
PWM3/GPIO69
TS1_D6
PWM4/GPIO70
TS1_D7
AB10 AC9 AB9 AC8 AB8 AC7 AB7
ET_RXD1
CVBS5P
ET_TX_EN
CVBS_OUT1
ET_MDC ET_MDIO
N5
3D_RF_GPIO1 22
E22
B6 C8 C7 A6
SAR0/GPIO31
MPIF_CLK
SAR1/GPIO32
MPIF_CS_N
SAR2/GPIO33
C487
LVDS
R438
3D
22
LG8300_RESET DSUB_DET
F21
AF16
COMP2_DET SCART1_MUTE 3D_RF_GPIO2 DISP_EN AMP_RESET_N
D22
R467 R440
F22 D23
3D
22 100
F23
R441 1K
AF1 AE3 AD14 AD3 AF15 AF2
R1476 1K
AE15 AD2
G8
IR
K8
AD16 AD15
A4
SOC_RESET
Y17
AE16
AD4
HD
W26 NC_48
LVACLKP/LLV6P/BLUE[3]
NC_78
LVACLKN/LLV6N/BLUE[2]
NC_64
LVA0P/LLV3P/BLUE[9]
NC_50
LVA0N/LLV3N/BLUE[8]
NC_45
LVA1P/LLV4P/BLUE[7]
NC_34
LVA1N/LLV4N/BLUE[6]
NC_77
LVA2P/LLV5P/BLUE[5]
NC_65
LVA2N/LLV5N/BLUE[4]
NC_62
LVA3P/LLV7P/BLUE[1]
NC_33
LVA3N/LLV7N/BLUE[0]
NC_47
LVA4P/LLV8P
NC_46
W25 U26 U25 U24 V26 V25 V24 W24 Y26 Y25 Y24
LVA4N/LLV8N
LVB0P/RLV6P/RED[1] NC_66
LVB0N/RLV6N/RED[0]
NC_76
LVB1P/RLV7P/GREEN[9]
NC_32
LVB1N/RLV7N/GREEN[8] LVB2P/RLV8P/GREEN[7]
NC_44
LVB2N/RLV8N/GREEN[6]
NC_61
LVB3P/LLV1P/GREEN[3]
NC_60
LVB3N/LLV1N/GREEN[2]
NC_36 NC_67
RLV3P/RED[7]
NC_35
RLV3N/RED[6] RLV0P/LVSYNC
2
4
RLV1P/LDE
NC_40
RLV2N/RED[8]
5
NC_71
RLV4P/RED[5]
AE9
3
RLV0N/LHSYNC RLV2P/RED[9]
AF8
READY R435 100
AF9
NC_56
RLV4N/RED[4]
NC_72
RLV5P/RED[3]
AF11
D400 KDS181
AD6 AD12 AE5
C466 0.1uF
AF12 AF5 AE12
NC_53
TCON15/SCAN_BLK1
NC_74
TCON18/CS7/GCLK5
NC_37
TCON19/CS8/GCLK6
NC_43
TCON11/CS5/HCON
NC_52
TCON10/CS4/OPT_N
NC_75
TCON9/CS3/OPT_P
NC_68
TCON16/WPWM
NC_59
TCON12/DPM TCON1/STV/GSP/VST
AE10 AF7 AD11 AD7 AD10 AE7
+3.3V_AVDD
<T3 CHIP Config(AUD_LRCH)>
AF10
R460 1K
R453 READY1K
TCON5/TP/SOE
NC_70
TCON14/SACN_BLK
AB24 AC24 AD26 AD25 AD24
FE_TS_DATA[0-7]
AVDD2P5/ADC2P5:162mA
GND_6
VDDC_7
GND_7
VDDC_8
GND_8
VDDC_9
GND_9
VDDC_10
GND_10
VDDC_11
GND_11 GND_12
A_DVDD
GND_13
B_DVDD
GND_14 GND_15
M19
VDDC_12
GND_16
VDDC_13
GND_17
VDDC_14
GND_18
VDDC_15
GND_19
VDDC_16
GND_20
VDDC_17
GND_21
VDDC_18
GND_22
VDDC_19
GND_23
VDDC_20
GND_24 GND_25
C489
1uF
L7
AVDD1P2
GND_29
DVDD_NODIE
GND_30 GND_31
0.1uF
+2.5V_AVDD
J7 J8
AU25:10mA
GND_32
C490
AVDD2P5_ADC_1
GND_33
AVDD2P5_ADC_2
GND_34
AVDD25_REF
GND_35 GND_36
0.1uF
GND_37
L8 AVDD_AU25
L404 120-ohm Main
C491 C492
L405 120-ohm +3.3V_AVDD Main
VDD33_DVI:163mA VDD33_DVI +3.3V_ST
F12
L406Main 120-ohm AVDD_DMPLL
D13 E13
GND_40
W15 Y15
0.1uF
PVDD_1
GND_41
PVDD_2
GND_42 GND_43
U8 AVDD25_PGA
AVDD25_PGA:13mA
1K
C494 C495 C496 C497
10uF 0.1uF 0.1uF 0.1uF
GND_46
M8 AVDD_NODIE
GND_49
N9
C498 C499
P9
0.1uF 0.1uF
N8 P8
C1404 C1405 C1406 C1407
AVDD_DVI_1
GND_50
AVDD_DVI_2
GND_51
AVDD3P3_CVBS
GND_52
AVDD_DMPLL
GND_53 GND_54 GND_55
T7
0.1uF
10uF 0.1uF 0.1uF 0.1uF
LVDS_CLK_1LVDS_CLK_1+ LVDS_DATA_1_ALVDS_DATA_1_A+ LVDS_DATA_1_BLVDS_DATA_1_B+ LVDS_DATA_1_CLVDS_DATA_1_C+ LVDS_DATA_1_DLVDS_DATA_1_D+ LVDS_DATA_1_ELVDS_DATA_1_E+
B9 A8 C21 B10 A22 A10 B22 C9 C23 B11 A9 C10 B23
A_DDR3_A0/DDR2_A13
B_DDR3_A0/DDR2_A13
A_DDR3_A1/DDR2_A8
B_DDR3_A1/DDR2_A8
A_DDR3_A2/DDR2_A9
B_DDR3_A2/DDR2_A9
A_DDR3_A3/DDR2_A1
B_DDR3_A3/DDR2_A1
A_DDR3_A4/DDR2_A2
B_DDR3_A4/DDR2_A2
A_DDR3_A5/DDR2_A10
B_DDR3_A5/DDR2_A10
A_DDR3_A6/DDR2_A4
B_DDR3_A6/DDR2_A4
A_DDR3_A7/DDR2_A3
B_DDR3_A7/DDR2_A3
A_DDR3_A8/DDR2_A6
B_DDR3_A8/DDR2_A6
A_DDR3_A9/DDR2_A12 A_DDR3_A10/DDR2_RASZ A_DDR3_A11/DDR2_A11
B_DDR3_A9/DDR2_A12 B_DDR3_A10/DDR2_RASZ B_DDR3_A11/DDR2_A11
A_DDR3_A12/DDR2_A0
B_DDR3_A12/DDR2_A0
A_DDR3_A13/DDR2_A7
B_DDR3_A13/DDR2_A7
B-TMA0 B-TMA1 B-TMA2 B-TMA3 B-TMA4 B-TMA5 B-TMA6 B-TMA7 B-TMA8 B-TMA9 B-TMA10 B-TMA11 B-TMA12 B-TMA13
B24 A24 P25 C24
AVDD_AU33
GND_56
AVDD_EAR33
GND_57 GND_58 GND_59
NC_38
AE26
TCON21/CS10/VGH_ODD
NC_54
TCON20/CS9/VGH_EVEN
NC_73
TCON13/LEDON
NC_39
TCON17/CS6/GCLK4
T8
VDDP_1
GND_62
VDDP_2
GND_63
VDDP_3
GND_64 GND_65
P26 B26 R24 B25 T26 D24 A26 C25 T25
U20 V19
C1411
0.1uF
FRC_LPLL
GND_66
LVDS_CLK_2LVDS_CLK_2+ LVDS_DATA_2_ALVDS_DATA_2_A+ LVDS_DATA_2_BLVDS_DATA_2_B+ LVDS_DATA_2_CLVDS_DATA_2_C+ LVDS_DATA_2_DLVDS_DATA_2_D+ LVDS_DATA_2_ELVDS_DATA_2_E+
P24
B21
A-TMBA0 A-TMBA1 A-TMBA2
A11 A23
A_DDR3_BA0/DDR2_BA2 A_DDR3_BA1/DDR2_CASZ A_DDR3_BA2/DDR2_A5
B_DDR3_BA0/DDR2_BA2 B_DDR3_BA1/DDR2_CASZ
L412 120-ohm Main
C11 B12
R26 D26
A12
A-TMCK A-TMCKB A-TMCKE
C26
A_DDR3_MCLK/DDR2_MCLK A_DDR3_MCLKZ/DDR2_MCLKZ A_DDR3_CKE/DDR2_DQ5
B_DDR3_MCLK/DDR2_MCLK B_DDR3_MCLKZ/DDR2_MCLKZ
B-TMCK B-TMCKB B-TMCKE
D25 E24
B_DDR3_CKE/DDR2_DQ5
C1412
0.1uF
N25
A-TMODT A-TMRASB A-TMCASB A-TMWEB
A20 B20 A21
A_DDR3_ODT/DDR2_ODT A_DDR3_RASZ/DDR2_WEZ A_DDR3_CASZ/DDR2_BA1 A_DDR3_WEZ/DDR2_BA0
B_DDR3_ODT/DDR2_ODT B_DDR3_RASZ/DDR2_WEZ B_DDR3_CASZ/DDR2_BA1
N24 N26
B_DDR3_WEZ/DDR2_BA0 R25
C22
A-TMRESETB
A_DDR3_RESETB
AVDD_MEMPLL:24mA
C1413
0.1uF
AVDD_DDR0:55mA AVDD_DDR0
C463 0.1uF
C1414 C1415
AE24
A-TMDQSL A-TMDQSLB
B16
A_DDR3_DQSL/DDR2_DQS0 A_DDR3_DQSLB/DDR2_DQSB0
B_DDR3_DQSL/DDR2_DQS0
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
B_DDR3_DQSLB/DDR2_DQSB0
NC_3
GND_71
NC_4
GND_72 GND_73
NC_7
GND_74
AVDD_LPLL
GND_75
NC_1
GND_76 GND_77
AVDD_MEMPLL
GND_82
NC_6
GND_83 GND_84 GND_85
D16 E15 E16 E17
AVDD_DDR0_D_1
GND_86
AVDD_DDR0_D_2
GND_87
AVDD_DDR0_D_3
GND_88
AVDD_DDR0_D_4
GND_89
AVDD_DDR0_C
GND_90 GND_91
F17
C1421 C1422
10uF 10uF
G16 G17 H17
C1423 C1424 C1425 C1426
0.1uF 0.1uF 0.1uF 0.1uF
AVDD_DDR1_D_1
GND_92
AVDD_DDR1_D_2
GND_93
AVDD_DDR1_D_3
GND_94
AVDD_DDR1_D_4
GND_95
AVDD_DDR1_C
GND_96 GND_97 GND_98
AB11 AB12
AA12
NC_22
GND_99
NC_23
GND_100
NC_27
GND_101
NC_28
GND_102
NC_18
GND_103
AF24 AF23 AD22
GND_104 H26
A16
A-TMDQSU A-TMDQSUB
C15
A_DDR3_DQSU/DDR2_DQSB1
B_DDR3_DQSU/DDR2_DQSB1
A_DDR3_DQSUB/DDR2_DQS1
B_DDR3_DQSUB/DDR2_DQS1
B-TMDQSU B-TMDQSUB
H25
AE22 AF22
AE19 AD21 AE21 AF21 AD20 AE20 AF20
GND_78
GND_81
F16
B-TMDQSL B-TMDQSLB
J24
GND_70
D15
C1416 C1417 C1418 C1419 C1420
L408 120-ohm Main
10uF 10uF
AC12
J25
NC_2
R19
AC11 C16
GND_69
NC_14
AF26 AF25
T20
W14
B-TMRESETB
B_DDR3_RESETB
GND_68
GND_80
B-TMODT B-TMRASB B-TMCASB B-TMWEB
M26
NC_8
Y14
AVDD_DDR1:55mA C20
GND_67
GND_79
B-TMBA0 B-TMBA1 B-TMBA2
B_DDR3_BA2/DDR2_A5
NC_5
W19 U18
AE25
F26
A14
A-TMDML A-TMDMU
B18
A_DDR3_DML//DDR2_DQ13 A_DDR3_DMU/DDR2_DQ6
B_DDR3_DML/DDR2_DQ13 B_DDR3_DMU/DDR2_DQ6
L25
C18
A-TMDQL0 A-TMDQL1 A-TMDQL2 A-TMDQL3 A-TMDQL4 A-TMDQL5 A-TMDQL6 A-TMDQL7
B13 A19 C13 C19 A13 B19 C12
B-TMDML B-TMDMU
L24
A_DDR3_DQL0/DDR2_DQ3
B_DDR3_DQL0/DDR2_DQ3
A_DDR3_DQL1/DDR2_DQ7
B_DDR3_DQL1/DDR2_DQ7
A_DDR3_DQL2/DDR2_DQ1
B_DDR3_DQL2/DDR2_DQ1
A_DDR3_DQL3/DDR2_DQ10
B_DDR3_DQL3/DDR2_DQ10
A_DDR3_DQL4/DDR2_DQ4
B_DDR3_DQL4/DDR2_DQ4
A_DDR3_DQL5/DDR2_DQ0
B_DDR3_DQL5/DDR2_DQ0
A_DDR3_DQL6/DDR2_CKE A_DDR3_DQL7/DDR2_DQ2
B_DDR3_DQL6/DDR2_CKE
B-TMDQL0 B-TMDQL1 B-TMDQL2 B-TMDQL3 B-TMDQL4 B-TMDQL5 B-TMDQL6 B-TMDQL7
F24 L26 F25 M25 E26 M24 E25
B_DDR3_DQL7/DDR2_DQ2
R1403 1K 1% MVREF
GND_106 GND_107
C1427 R1404 1K 1%
GND_108
G15 MVREF
0.1uF
GND_109 GND_110 GND_111
Y7 Y8
NC_9 NC_10
GND_FU
H9 H10 H18 H19 J10 J17 J18 J19 K9 K10 K11 K12 K13 K14 K15 K16 K17 K18 L9 L10 L11 L12 L13 L14 L15 L16 L17 M9 M10 M11 M12 M13 M14 M15 M16 M17 N10 N11 N12 N13 N14 N15 N16 N17 P10 P11 P12 P13 P14 P15 P16 P17 R10 R11 R12 R13 R14 R15 R16 R17 R18 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 U10 U11 U12 U13 U14 U15 U16 U17 V7 V8 V9 V10 V11 V12 V13 V14 V15 V16 V17 V18 W7 W8 W9 W10 W11 W12 W13 W16 W17 W18 Y13 Y18 AA13 AB13 AC13 D17 H23 AF13 J9 U9
PGA_VCOM
L413 120-ohm Main
AF19 AD18 AE18 AF18
AB22
NC_41
R9
GND_60 GND_61
U19
FRC_LPLL:13mA FRC_MPLL:4mA
GND_47 GND_48
W20
A25
B8
GND_44 GND_45
C1401
VDD33_T/VDDP/U3_VD33_2:47mA
GND_38 GND_39
10uF 0.1uF
AVDD2P5
IC400 LGE101DC-R [S7R DIVX/MS10]
A-TMA0 A-TMA1 A-TMA2 A-TMA3 A-TMA4 A-TMA5 A-TMA6 A-TMA7 A-TMA8 A-TMA9 A-TMA10 A-TMA11 A-TMA12 A-TMA13
GND_26 GND_28
H7
AE23
NC_42
AB23 AC23
G26
A15
A-TMDQU0 A-TMDQU1 A-TMDQU2 A-TMDQU3 A-TMDQU4 A-TMDQU5 A-TMDQU6 A-TMDQU7
A17 B14 C17 B15 A18 C14 B17
A_DDR3_DQU0/DDR2_DQ15 A_DDR3_DQU1/DDR2_DQ9 A_DDR3_DQU2/DDR2_DQ8
B_DDR3_DQU0/DDR2_DQ15 B_DDR3_DQU1/DDR2_DQ9 B_DDR3_DQU2/DDR2_DQ8
A_DDR3_DQU3/DDR2_DQ11
B_DDR3_DQU3/DDR2_DQ11
A_DDR3_DQU4/DDR2_DQM1
B_DDR3_DQU4/DDR2_DQM1
A_DDR3_DQU5/DDR2_DQ12
B_DDR3_DQU5/DDR2_DQ12
A_DDR3_DQU6/DDR2_DQM0
B_DDR3_DQU6/DDR2_DQM0
A_DDR3_DQU7/DDR2_DQ14
B_DDR3_DQU7/DDR2_DQ14
B-TMDQU0 B-TMDQU1 B-TMDQU2 B-TMDQU3 B-TMDQU4 B-TMDQU5 B-TMDQU6 B-TMDQU7
J26 G24 K25 H24 K26 G25 K24
AC22
AB16 NC_26 NC_19
AA14
CLose to Saturn7M IC
CLose to Saturn7M IC
AC15
NC_30
AUD_LRCH AUD_SCK AUD_MASTER_CLK PWM1 PWM0 R461 1K
R454 1K
R449 READY 1K
R447 1K
R444 1K READY R448 1KREADY
<T3 CHIP Config> (AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0)
R450 1K
R443 1K
Boot from SPI flash : 1’b0 Boot from NOR flash : 1’b1
NC_57
READY
AD8
AB25
AD19 TCON3/OE/GOE/GCLK2
AE6
SOC_RESET
AB26
NC_58 NC_69
R434 10
AA24
RLV5N/RED[2]
AE11 AF6
AA25
AD23
RLV1N/LCK
AD9
AA26
NC_51
NC_49
READY SW400 TMUE312GAB
AC25
LVB4N/LLV0N/GREEN[0]
AE2
1
VDDC_6
V20
NC_63
AF4
1K
M18
10uF
+1.5V_DDR_IN
+3.3V_ST
VCC_1.5V_DDR
VCC_1.5V_DDR
Y16 NC_15 NC_31
AE8 NC_55
NC_29
NC_12
NC_21
GND_105
NC_20
Y19
AC16 AC14 AA16
Y11
AA15 Y10
NC_11
AA11
NC_17 AB15 NC_25 NC_24
Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
GND_5
J11
E12
DDR
AE1
AD5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
VDDC_5
GND_27
D14
IC400 LGE101DC-R [S7R DIVX/MS10]
AE4
No EJ PAD. Byte mode NAND flash.) EJ use PAD1. Byte mode NAND flash.) EJ use PAD2. Byte mode NAND flash.) Internal SPI flash secure boot, no scramble) Internal SPI flash secure boot with scarmble)
GND_4
AVDD33_T
SOC_RESET
R433 62K
VDDC_4
NC_13
C493
E14
GND_3
Y12
FE_TS_DATA[0] FE_TS_DATA[1] FE_TS_DATA[2] FE_TS_DATA[3] FE_TS_DATA[4] FE_TS_DATA[5] FE_TS_DATA[6] FE_TS_DATA[7]
R491
GND_2
VDDC_3
L19
P20
MPIF_BUSY
SAR3/GPIO34 SAR4/GPIO35
LVB4P/LLV0P/GREEN[1]
MODEL_OPT_3
10uF 0.1uF 0.1uF 0.1uF
P19
D12
C6
GND_1
VDDC_2
T9
AE13
C465 4.7uF 10V
L18
P18
L410Main 120-ohm
SC_RE1
ET_CRS
+3.3V_AVDD
J16
N19
READY R469 3.3K
READY R470 3.3K
E23 ET_REFCLK
J15
N18
+3.3V_AVDD
ET_TXD1
CVBS6P
J14
N20
FE_TS_CLK FE_TS_VAL_ERR FE_TS_SYN
AC6
J13
K19
C488
AC10
DDCA_CK/UART0_RX
G23
Y6
TS1_SYNC
A5 B5
AC4
J12
CI_TS_DATA[0-7]
CI_TS_DATA[0] CI_TS_DATA[1] CI_TS_DATA[2] CI_TS_DATA[3] CI_TS_DATA[4] CI_TS_DATA[5] CI_TS_DATA[6] CI_TS_DATA[7]
AC5
M22 N22
AA10
H15
VDDC_1
H16
C478 C477 C479 C480
L402 120-ohm Main
CI_TS_CLK CI_TS_VAL CI_TS_SYNC
AA5
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF 0.1uF
MIU0VDDC MIU1VDDC
D11
AB5
PCM_PF_WEZ
C469 C470 C471 C472 C473 C474 C475 C476
E
33
G18
H11
EDID_WP
F10 D9
PCM_CE_N
AC_DET PM_TXD LED_RED 5V_ON RL_ON PM_RXD /SPI_CS /FLASH_WP B
D7
L409 AVDD_DMPLL/AVDD_NODIE:7.362mA 120-ohm AU33:31mA C1400 0.1uF Main
AE14
R451
PM_SPI_CS1/GPIO12/PM6
+3.3V_AVDD READY R471 3.3K
MPIF_D3
AD13
READY R452 1K
GPIO11/PM5/PM_UART_RX/INT1
MPIF_D2
AD1
host. host. host. host. host.
GPIO10/PM4
PCM_A14
M23
K22
KEY1 KEY2 TOUCH_VER_CHK SC2_ID AMP_MUTE
AF3
as as as as as
PCM_A13
+1.26V_VDDC
UART_RXD UART_TXD
100
AVDD25_PGA
AF14
(MIPS (MIPS (MIPS (8051 (8051
GPIO9/PM3
PCM_A12
K23
LVBCLKN/LLV0N/GREEN[4]
4’h3 4’h4 4’h5 4’hb 4’hc
AA18 AB21
LVBCLKP/LLV0P/GREEN[5]
: : : : :
R436
PCM_RESET
AB20
AR400 22
AC26
MIPS_no_EJ_NOR8 MIPS_EJ1_NOR8 MIPS_EJ2_NOR8 B51_Secure_no scramble B51_Sesure_scramble
GPIO8/PM2
PCM_A11
TS1_D1
NC_16
FHD
GPIO7/PM1/PM_UART_TX
MPIF_D1
3D
D21
RESET
B6
GPIO6/PM0/INT0
PCM_A9
22 22
R493 R494
F19 E7
AC17
/PF_CE0 /PF_CE1 /PF_OE /PF_WE PF_ALE /PF_WP /F_RB
RGB_DDC_SDA RGB_DDC_SCL
E21
TESTPIN
MODEL_OPT_3
GPIO51/UART1_TX
PCM_A8
R8
R466
CVBS1P
LOW
PCM_A7
MPIF_D0
CVBS0P
IRINT
HIGH
G19
R2
HP_OUT_1R
AVLINK
PIN NO.
GPIO50/UART1_RX
U7
F8
PIN NAME
P22
G20
F20
PCM_A6
PCM_A10
M20
AA9
I2C_SDA I2C_SCL
SCART1_Rout SCART2_Rout
W5
R1
VCOM0
MODEL OPTION
PCM_A5
L20
R7
BIN2P
CVBS_OUT2
C400 1000pF READY
R474 100 R475 100
P7
M6
DTV/MNT_VOUT
GPIO42
3D_RF_RXD 3D_RF_TXD 3D_RFMODULE_RESET SC2/COMP1_DET AV/SC1_DET ERROR_DET TUNER_RESET
K20
VRM
GIN2P
CVBS7P
M7
Y3
T4
N4 N6
V4
AUCOM
RIN2P
HP_OUT_1L
33 33 33 33
W23
V23
R485 R486
SCART1_Lout SCART2_Lout
W4
MICIN
SOGIN2
R425 R426 R427 R428
Y23
GPIO41
PCM_A4
L23
R459 100
R4 MIC_DET_IN
SOGIN1
H5
0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 1000pF
W3
R495 100
BIN1M MICCM
C415 C416 C417 C418 C419 C420 C421
U23
GPIO40
PCM_A3
TS0_D4
C468 0.01uF
K5
C467 0.01uF R457 22K
0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 1000pF
0
NON_EU R418 33 R419 68 R420 33 R421 68 R422 33 R423 68 R424 0
COMP2_Pr+ COMP2_PrCOMP2_Y+ COMP2_YCOMP2_Pb+ COMP2_Pb-
C408 C409 C410 C411 C412 C413 C414
C433 0.01uF R455 22K
R417
33 68 33 68 33 68
AA21
U4
C432 0.01uF R442 22K
R411 R412 R413 R414 R415 R416
HSYNC1
R439 22K
H6
AB17
GPIO39
PCM_A2
C458 0.1uF
+3.3V_AVDD
G4
SC1_ID SC1_FB SC1_R+/COMP1_Pr+ SC1_R-/COMP1_PrSC1_G+/COMP1_Y+ SC1_G-/COMP1_YSC1_B+/COMP1_Pb+ SC1_B-/COMP1_PbSC1_SOG_IN
Y20
PCM_A1
AA20
PCM_RST
R480 2.2K
2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF READY 2.2uF READY
AA23
R23
HOTPLUGD/GPIO22 N1
T24
Y21
/PCM_IRQA
AUD_SCK AUD_MASTER_CLK AUD_LRCH MODEL_OPT_3 USB1_OCD USB1_CTL AUD_LRCK
E20
T23
W21
/PCM_CE
SUB_SDA P_SCL SUB_SCL
R21
V22
/PCM_WAIT
R401 10K
R400 10K
AE17
R22
AA17
/PCM_CD
G5 G6
SIDE_USB_DM SIDE_USB_DP
Y22
GPIO38
PCM_REG_N
/PCM_OE /PCM_WE /PCM_IORD /PCM_IOWR
DDCDC_CK/GPIO27
LINE_IN_0L
22 22 33 68 33 68 33 68 0
R479 10K
R481 10K
GPIO37/UART3_TX
0 0
R446 R492
K21 GPIO36/UART3_RX
PCM_A0
W22
/PCM_REG
+5V
A7 AF17
C_RX2N
CEC/GPIO5
R402 R403 R404 R405 R406 R407 R408 R409 R410
P_SDA SPDIF_OUT
B7
A2 A3
G13
22 100
C_RX0P
HOTPLUGC/GPIO21
CK+_HDMI3 CK-_HDMI3 D0+_HDMI3 D0-_HDMI3 D1+_HDMI3 D1-_HDMI3 D2+_HDMI3 D2-_HDMI3 DDC_SDA_3 DDC_SCL_3 HPD3 CEC_REMOTE_S7
R1408 R476
G14
AA2
R1412 3.3K
PCM_D6 PCM_D7
AA22
P21
AB14
A-MVREFCA
0.1uF
E4
IFAGC
L21
PCM_D5
U21 V21
5V_DET_HDMI_2 5V_DET_HDMI_4 5V_DET_HDMI_3 SIDEAV_DET
L22
1000pF
D4
V3 Y5
B_RXCP
AC21
M21
B-MVREFCA
C462
E1
C456 1000pF READY
AC20
TCON8/CS2/FLK3
R499
F3
PCM_A[0] PCM_A[1] PCM_A[2] PCM_A[3] PCM_A[4] PCM_A[5] PCM_A[6] PCM_A[7] PCM_A[8] PCM_A[9] PCM_A[10] PCM_A[11] PCM_A[12] PCM_A[13] PCM_A[14]
AC19
PCM_D4
1K 1%
E3
TU_SIF
TCON6/FLK
1%
E2
47 47
TCON4/CPV/GSC/GCLK3
PCM_D3
R1400
D2
R472 R473
AC18
TCON2/GSP_R/GCLK1
PCM_D2
1K
D1
0.1uF 0.1uF
QM
HOTPLUGA/GPIO19
C1
C430 C431
U3
D3
CK+_HDMI2 CK-_HDMI2 D0+_HDMI2 D0-_HDMI2 D1+_HDMI2 D1-_HDMI2 D2+_HDMI2 D2-_HDMI2 DDC_SDA_2 DDC_SCL_2 HPD2
Y1
PCM_A[0-14]
IF_P_MSTAR IF_N_MSTAR
PCM_D1
C461
E6
SSIF/SIFP
A_RX2N
0.1uF 0.1uF
TCON0/POL
PCM_D0
0.1uF
F4
Y2
A_RX2P
C452 C453
T22
1000pF
3D_RFMODULE_DD 3D_RFMODULE_DC PCM_5V_CTL
A_RX1N
100 100
T21
C460
F5
V1
IM
A_RX1P
R464 R465
N21
U22
AB18
R489
H2
V2 IP
A_RX0N
PCM_D[0] PCM_D[1] PCM_D[2] PCM_D[3] PCM_D[4] PCM_D[5] PCM_D[6] PCM_D[7]
1K 1%
H1
W1
1%
G1
VIFM
A_RX0P
PCM_D[0-7]
R490
H3
A_RXCN
IF_AGC_MAIN C449 0.1uF
C464 0.01uF 50V
1K
G3
VIFP
IC400 LGE101DC-R [S7R DIVX/MS10]
C459
G2
A_RXCP
10K
C447 0.01uF 50V
W2
F1 F2
R462
POWER
L400 +3.3V_AVDD 120-ohm Main
1K
GP2R_S7R MAIN
2010-08-31 4
LGE Internal Use Only
IC500 H5TQ1G63BFR-H9C
DDR3 Memory 1GBit x 2
VCC_1.5V_DDR
VREFCA
A0 A1
A-MVREFDQ
A2
H1 VREFDQ
A3 A4
R503 1K 1%
R505
A5
L8 ZQ
240 1%
C503 C501 0.1uF 1000pF
A7 A8
B2 C524
10uF
D9
C525
0.1uF
G7
C526
0.1uF
K2
C527
0.1uF
K8
C528
0.1uF
N1
C529
0.1uF
N9
C530
0.1uF
R1
C531
0.1uF
R9
C532
VDD_1
A9
VDD_2
A10/AP
VDD_3
A11
VDD_4
A12/BC
VDD_5 VDD_7
0.1uF 0.1uF 0.1uF
A1
C534 C535
0.1uF
C1
C536
0.1uF
C9
C537
0.1uF
D2
C538
0.1uF
E9
0.1uF
F1
C540
0.1uF
H2
0.1uF
H9
P2 R8 R2 T8 R3 L7 R7 N7 T3
M2 N8 M3
BA2 VDDQ_1
A8
C539
P8
VDDQ_2 VDDQ_3
CK
VDDQ_4
CKE
VDDQ_6
CS
VDDQ_7
ODT
VDDQ_8
RAS
VDDQ_9
CAS
NC_1 NC_2
L1
K1 J3 K3 L3 T2
RESET
NC_6
A-MA1
A-TMA1
A-MA8
A-TMA8
A-MA6
A-MA6
A-TMA6
A-MA7
G3
DQSL C7
A9 B3 E1
VSS_1
DQSU
VSS_2
DQSU
VSS_3
G8 J2 J8 M9 P1 P9 T1 T9
DML
VSS_5
DMU
D3 E3
VSS_7
DQL0
VSS_8
DQL1
VSS_9
DQL2
VSS_10
DQL3
VSS_11
DQL4
VSS_12
B7 E7
VSS_4 VSS_6
M1
DQL5 DQL6
F7 F2 F8 H3 H8 G2 H7
DQL7
B1 VSSQ_1
B9 D1 D8 E2 E8 F9 G1 G9
AR501
A-MBA0
A-MA8 A-MA9 A-MA10
D7
VSSQ_2
DQU0
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
DQU5
VSSQ_8
DQU6
VSSQ_9
DQU7
C3 C8 C2 A7 A2 B8 A3
A-MA5
A-TMA5 AR502
VREFCA
A0 A1
B-MVREFDQ
A2
H1 VREFDQ
A3 A4
R501 1K 1%
R504
A5
L8 ZQ
240 1%
C500 C502 0.1uF 1000pF
A7 A8
B2 C506
10uF
D9
C507
0.1uF
G7
C508
0.1uF
K2
C509
0.1uF
K8
C510
0.1uF
N1
C511
0.1uF
N9
C512
0.1uF
R1
C513
0.1uF
R9
C514
0.1uF
C515
0.1uF
VDD_1
A9
VDD_2
A10/AP
VDD_3
A11
VDD_4
A12/BC
VDD_5
A13
VDD_6 VDD_7
0.1uF 0.1uF
C517
0.1uF
C1
C518
0.1uF
C9
C519
0.1uF
D2
C520
0.1uF
E9
C521
0.1uF
F1
C522
0.1uF
H2
C523
0.1uF
H9
A8
L1 L9 T7
P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
M2 BA0
N8 M3
VDDQ_1 VDDQ_2 VDDQ_3
CK
VDDQ_4
CKE
VDDQ_5 CS
VDDQ_7
ODT
VDDQ_8
RAS
VDDQ_9
CAS
K1 J3 K3 L3
WE NC_1 NC_2
T2 RESET
NC_6
F3 DQSL
G3
DQSL
B3 E1
C7
G8 J2 J8 M1 M9 P1 P9 T1 T9
VSS_1
DQSU
VSS_2
DQSU
VSS_3
E7
VSS_4
DML
VSS_5
DMU
VSS_6 DQL0
VSS_8
DQL1
VSS_9
DQL2
VSS_10
DQL3
VSS_11
DQL4
VSS_12
DQL5 DQL6
D1 D8 E2 E8 F9 G1 G9
D3 E3
VSS_7
F7 F2 F8 H3 H8 G2 H7
DQL7
B1 B9
B7
D7
VSSQ_2
DQU0
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
DQU5
VSSQ_8
DQU6
VSSQ_9
C3 C8 C2 A7 A2 B8 A3
DQU7
DDR_A[5]
N8
A5
N3
A6
N7 P2 P8
A-MA10
A-MBA1
R509 56 1%
A-MBA2
R511 56 1%
56
22 22
AR504
A-MRASB
56
A-MWEB
R506 10K
A-MDQSLB
R2
DDR_BA[0]
BA0
L2
DDR_BA[1]
BA1
L3
CLK
J8
CLK CKE
A-TMCK A-TMCKB
22 22 22 22
A-TMDQSL A-TMDQSLB A-TMDQSU A-TMDQSUB
AR505
22
A-TMDQL1 A-TMDQL3
DDR2_CKE
A-TMDQL4
A-MDQL4
A-MDQL1
A-MDQU7 A-MDQU3
A-TMDQU3
A-MDQL3
A-MDQU5
A-TMDQU5
A-MDQL4
A-MDMU
AR508
22
AR509
22
A-MDQL7
A-MDQU0
A-TMDQU0
A-MDQU4
A-TMDQU4
A-MDQU2
A-MCKE
22
R512
10K
B-MA0
B-TMA1 B-TMA6
B-TMA3
B-MA5
B-TMA5
VDD_1
C716
0.1uF
C715
0.1uF
C714
0.1uF
56
B-TMA4
B-MA3
B-MA12
B-TMA12
B-MA4
B-MBA1
B-TMBA1
B-MA5
B-TMA10
B-MA10
B-MA6
AR513
B-MRESETB
B-MA7
56
L7
C3
VDDQ_8
C711
0.1uF
C7
VDDQ_7
C710
0.1uF
C9
VDDQ_6
C709
0.1uF
E9
VDDQ_5
C708
0.1uF
G1
VDDQ_4
C707
0.1uF
G3
VDDQ_3
C706
0.1uF
G7
VDDQ_2
C703
0.1uF
G9
VDDQ_1
C701
0.1uF
3D 3D
C700
10uF
3D
B3
DDR_DQS0M
LDQS
E8
A3
VSS_5
DDR_DQS1M
UDQS
A8
E3
VSS_4
J3
VSS_3
NC_4
N1
VSS_2
L1
P9
VSS_1
B2
VSSQ_10
B8
VSSQ_9
A7
VSSQ_8
D2
VSSQ_7
NC_5
R3
NC_6
R7
NC_1
A2
NC_2
E2
NC_3
R8
B-MA8
B-MA9
B-MA10 B-MA11 B-MA12
B-MCK B-MCKB
B-MA13
B-MRASB
R524 R525
22 22
AR514
56
B-MCK B-MBA0 B-MBA2
R510 56 1%
B-MDQL1 C542 0.01uF 50V
B-MCKE
R526 R527 R528 R529
22 22 22 22
AR515
22
B-MRASB B-MWEB
VCC_1.5V_DDR
B-MDQSUB
C_DDR_BA[0]
J7
B-TMDQL0
C_DDR_A[1]
B-MDQU0
B-TMDQU0
B-MDQU4
B-TMDQU4
B-MDQL2
B-MCKE
R530
22
R531
10K
F8
VSSQ_3
H2
VSSQ_2
H8
VSSQ_1
C_DDR_A[5]
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
NC_24 C550 10uF
NC_23 VCC_2
C551 0.1uF
VSS_2 NC_22 NC_21 NC_20
AR521 I/O3
PCM_A[3]
I/O2
PCM_A[2]
I/O1
PCM_A[1] PCM_A[0]
I/O0
22
NC_19 NC_18 NC_17 NC_16
+3.3V_ST
WP#
GND READY Q501 2SC3052
2
7
3
6
4
5
C552
VCC
HOLD#
SCLK SPI_SCK SI
R549 33 SPI_SDI
A0’h
EEPROM 1MBit
IC504 M24M01-HRMN6TP
E2
VSS
C547 0.1uF
1
8
2
7
3
6
4
5
VCC
WP
SCL
R543
22
SDA
R544
22
C546 10pF READY
I2C_SCL I2C_SDA
C548 10pF READY
DDR_A[8]
C_DDR_A[8] C_DDR_A[6]
DDR_A[6]
C_DDR_A[4]
DDR_A[4]
/C_DDR_CAS
/DDR_CAS R1459 3D 22
C_DDR2_CLK
DDR2_CLK R1460 3D 22 /DDR2_CLK
/C_DDR2_CLK R1461 3D 22 C_DDR_DQS0P
C_DDR_DQ[5] 3D C_DDR_DQ[2]
DDR_DQS1P
C_DDR_DQ[13] 3D C_DDR_DQ[10]
DDR_DQM0
C_DDR_DQ[8]
DDR_DQ[0]
Addr:10101--
HDCP EEPROM 8KBit
DDR_DQ[7] AR528 22 1/16W
+3.3V_AVDD DDR_DQ[13] DDR_DQ[10] DDR_DQ[8]
C_DDR_DQ[15]
DDR_DQS0M R1466 3D 22 DDR_DQS1M
DDR_DQ[15]
IC505 CAT24WC08W-T
C_DDR_DQ[14] 3D C_DDR_DQ[9] C_DDR_DQ[12]
B-MDQU2 C_DDR_DQ[3] 3D C_DDR_DQ[4] C_DDR_DQ[1] C_DDR_DQ[6]
A0 1
8
VCC
DDR_DQ[14]
A1 2
7
WP
DDR_DQ[9]
A2 3
6
SCL
DDR_DQ[11] DDR_DQ[12]
/DDR_CS
B-MDQU3
R548 4.7K
AR529 22 1/16W
C_DDR_DQ[11]
R1467 3D 22 /C_DDR_CS
DDR_DQ[2]
DDR_DQM1
C_DDR_DQS1M
+1.5V_DDR_IN
DDR_DQ[15-0] DDR_DQ[5]
C_DDR_DQ[7]
DDR_DQS0P R1462 3D 22 R1463 3D 22
AR527 22 1/16W
C_DDR_DQ[0]
R1465 3D 22
C545 0.1uF 16V
8
E
DDR_A[7]
C_DDR_DQS0M
B-MDQU1
1
0.1uF
DDR_A[11]
C_DDR_DQM0
B-MDQL6
B-MDQU5
37
PCM_A[4]
22
NC_25
AR535 3D 22 1/16W
B-MDQL7
B-MDQU6
12 13
DDR_A[5]
C_DDR_A[11]
B-MDQL5
B-MDQU7
38
PCM_A[5]
I/O4
+3.3V_AVDD
R1464 3D 22
C544 10uF 10V
39
11
R540 0
DDR_A[10]
C_DDR_DQM1
L500 500 Main
10
SO
AR534 22 1/16W
C_DDR_A[10]
B-TMDQU1
B-MDQL4
B-MDQU4
40
SPI_SDO
DDR_A[9] 3D
B-MDQL3
B-MDQU0
9
CS#
DDR_A[3]
C_DDR_DQS1P B-MDQU1
41
/SPI_CS
R546 10K
E1
B-TMDQU6
B-MDML
B-MDQL0
8
PCM_A[6]
I/O5
DDR_A[12]
C_DDR_A[9]
B-TMDQU5 B-TMDMU 22
42
PCM_A[7]
I/O6
DDR_A[1]
C_DDR_A[3] C_DDR_A[12]
B-TMDQU7
B-MDMU
B-MDQL1
J1
VSSQ_5 VSSQ_4
AR533 22 1/16W
C_DDR_A[7] B-TMCKE
B-TMDQU3
AR519
7
AR520 I/O7
IC503 MX25L8005M2I-15G
DDR2_ODT 3D
B-TMDQL1
B-TMDQL4
B-MDQU6
43
VSSQ_6
E7 F2
NC
B-TMDQSL B-TMDQSLB B-TMDQSU B-TMDQSUB
B-TMDQL6
B-MDMU
6
NC_26
DDR_A[2]
C_DDR2_ODT
B-TMDQL2
B-MDQU5
44
R547 4.7K READY
B-TMRASB
B-MDQL6 22
45
5
PCM_A[0-7]
NC_27
+3.3V_ST
+3.3V_ST
DDR_BA[0]
DDR_A[0]
B-MDQL2
AR518
4
NC_28
3D
SERIAL FLASH 8MBit
AR532 22 1/16W
3D
/DDR_RAS
B-TMDQL5
B-MDQU7
46
DDR_BA[1]
C_DDR_A[0]
B-TMDQL7
B-MDQL4
B-MDQSU
NC_15
3D
47
DDR2_CKE
C_DDR_A[2]
B-MDQL5
B-MDQSL B-MDQSLB
NC_14
2 3
NC_29
/DDR_WE
C_DDR2_CKE C_DDR_BA[1]
/C_DDR_RAS
B-MDQL7
22
NC_13
E
48
AR531 3D 22 1/16W /C_DDR_WE
R507 10K AR517
NC_12
3D
/FLASH_WP
B-TMCK B-TMCKB
B-TMDQU2 22
AR516
B-MDQL0 B-MRESETB
VDDL
B-TMA9
B-TMDML
B-MDML
B-MCKE
B-MCASB
Q500 2SC3052 READY
B-TMDQL3
B-MDQL3 B-MDQU2
B-MODT
B R534 10K READY
NC_11
R542 1K
B
B-TMRESETB
B-TMWEB
B-MWEB B-MDQSL B-MDQSLB B-MDQSU B-MDQSUB
R533 3.3K
WP C
/PF_WP
3D
/PF_WE
R539 10K READY
B-TMODT
B-MCKB R508 56 1%
R532 3.3K READY
3D
3D
WE R535 0
3D
3D 3D
ALE PF_ALE
C
B-TMCASB
B-MCASB
B-MBA1
3D C705 100pF 50V
B-TMA13
B-MA13
B-MA9
NC_10
/PF_CE1
+3.3V_ST
3D
CAS
B-TMBA2
B-MBA2
3D
/DDR_CAS
F3
R536 10K READY
3D
0.1uF
UDM
R541 1K
CLE
3D
C712
DDR_DQM0
READY
NC_9
3D
VDDQ_9
DDR_DQM1
VSS_1
3D
C1
LDM
VCC_1
+3.3V_AVDD
R1
K3
NC_8 C549 0.1uF
DDR_DQ[15]
K7
B-TMA7 AR512
DQ15
B-TMBA0
B-MA3 B-MA7
B9
DDR_DQ[14]
RAS
B-TMA11 B-TMA8
B-MA4
DQ14
NC_7 READY R538 1K
/DDR_RAS
B-TMA0
B-MA8
B-MA2
B1
D8
B-MA6
B-MA1
DDR_DQ[13]
K2
A-TMDQU1
B-MA1
56
DDR_DQ[12]
DQ13
0.1uF
B-TMA2
AR511
DQ12
D9
0.1uF
+1.8V 56 56
DQ11
D1
CE /PF_CE0
C713
A-MDQU6
56
D3
DDR_DQ[11]
VDDQ_10
A-MDQU5 R522 R523
DDR_DQ[10]
A9
VSSDL
AR510
DQ10
0.1uF
A-MDQU4
B-MA0 B-MA2
D7
RE /PF_OE
L8
A-MDQU3
A-MDQU7
DDR_DQ[9]
K9
A-MDQU0 R521
DQ9
R/B
1
A-TMDQU6
A-MDQL6
A-MDQU1
C2
NC_6
/F_RB
0.1uF
A-TMDQU7
A-MDQU6
A-MDQU1
C8
DDR_DQ[8]
CS
/DDR_CS
A-TMDMU
A-MDQL5
DDR_DQ[7]
DQ8
C717
A-TMDQL5
A-MDQL0
DQ7
VDD_2
A-MDQL5
A-MDQL2
F9
NC_5 R545 4.7K
ODT
DDR2_ODT
A-MDQSUB
A-TMDQL6
DQ6
R537 1K
M9
B7
A-MDQL6
F1
DDR_DQ[6]
K8
UDQS
A-TMDQL0
DDR_DQ[5]
0.1uF
DDR_DQS1P
A-TMDQL2
DDR_DQ[4]
DQ5
C718
A-TMDQL7
22
DQ4
H9
C719
A-MDQL7
AR507
DQ3
H1
NC_4
C720
F7
A-MDQL2
H3
DDR_DQ[3]
VDD_3
LDQS
A-MDQL0
H7
VDD_4
/DDR_WE
A-MDMU
NC_3
DDR_DQ[2]
VDD_5
DDR_DQS0P
A-MDML
DDR_DQ[1]
DQ2
J9
A-TMDQU2 22
DQ1
E1
A-TMCKE
A-TMDML
AR506
DDR_DQ[0]
G2
A1
DDR2_CLK
/DDR2_CLK
DQ0
NC_2
G8
+1.8V
A-TMRASB
WE
A-MCKE
A-MDQSU
A12
R517 R518 R519 R520
A-MDQU2
A-MDQSL
DDR_A[12]
P7
A-TMWEB
A-MDQL1
A-MRESETB
M2
A11
A-TMODT
A-MDQSL A-MDQSLB A-MDQSU A-MDQSUB
A-MCASB
P3
A10/AP
DDR_A[11]
A-TMCASB
A-MWEB VCC_1.5V_DDR
A9
DDR_A[10]
A-TMA9 R515 R516
A-MODT
A-MRASB
DDR_A[9]
A-TMRESETB A-TMBA2
A-MA13
A-MCK A-MCKB
A-MODT
A-TMA10
A-TMA13
A-MA9
C543 0.01uF 50V
A-MCKE
AR503
A-MBA2
VCC_1.5V_DDR
VSSQ_1
A4
A8
B-MDQU3 A9
DDR_A[4]
N2
A7
NC_3 NC_4
M7
A3
DDR_A[8]
L2
VDDQ_6
M3
A2
DDR_A[3]
A-TMBA1
K7 K9
A1
DDR_A[2]
A-MBA1
J7 CK
DDR_A[1]
M8
A-MA13
B-MODT
BA2
J1 J9
N2
A0
DDR_A[7]
M7
BA1
C516
P3
DDR_A[0]
DDR_A[6]
A15
VDD_8 VDD_9
A1
C504
A6
P7
J2
A-TMA12
B-MBA0 N3
VREF
A-TMA4
A-MRESETB
+3.3V_AVDD
NC_1
DDR_DQ[15-0]
A-MA4
A-MCK A-MCKB
IC502 H27U1G8F2BTR-BC
W9725G6JB-25
A-MA12
A-MBA0
NAND Flash 1GBit +3.3V_AVDD
A-MA12
VCC_1.5V_DDR
B-MVREFCA
56
IC701
3D C704 470pF 50V
DDR_A[12-0]
A-TMA7
A-MA7
A-MA11
IC501 H5TQ1G63BFR-H9C M8
3D C702 0.1uF 16V
A-TMBA0 A-TMA3
B-MA11
R500 1K 1%
56
A-MA3
A-MDML F3 DQSL
A-TMA11
A-MA11
A-MDQL3
NC_4
T7
A-TMA2
A-MA5
NC_3
L9
56 56
A-MA3
L2
WE
J9
R514 AR500
A-MCASB
VDDQ_5
J1
A-TMA0
A-MA4
K7 K9
56
A-MA2
J7 CK
R513
A-MA0
A-MA1 A-MA2
M7
BA0 BA1
C505
N2
A-MA0
A15
VDD_8
0.1uF
P3
A13
VDD_6
VDD_9
C533
C541
A6
P7
3D R700 100
N3
M8
A-MVREFCA
R502 1K 1%
LG8300 DDR3 Memory 256MBit
DDR_VREF_DDR
VSS
4
5
R550
4.7K R551
22
R552
22
I2C_SCL
SDA
I2C_SDA
AR530 22 1/16W DDR_DQ[3] DDR_DQ[4] DDR_DQ[1] DDR_DQ[6]
C_DDR_DQ[15-0]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
GP2R_S7R Memory
2010-08-31 5
LGE Internal Use Only
RL_ON
R602 10K R606
100
R603
100
5V_ON
C603 0.1uF 16V
+3.3V
12
13
14
15
16
17
18
R612 10K
+5V_ST
VIN_1
Q600 RTR030P02
C
R609 10K
RL_ON
C604 0.1uF 16V
G
R607 10K
C627 0.1uF 16V
C619 100uF 16V
C657 0.01uF 25V
C656 100uF 16V
B
Q601 RT1C3904-T112
C610 10uF 16V
E
19
C612 0.1uF 16V
BOOT
11
C655 0.01uF 25V
C654 22uF 16V
+3.3V_ST L603 500 Power Main
PWRGD
10
R642 0 EN
8
9
+1.26V_VDDC
READY R617 0
R638 10K READY
C622 0.1uF 50V
13
R601 10K
6
7
D
S
14
5
+3.3V_ST
READY C614 0.1uF 16V
VIN_3
4
10K +5V_ST_EN
15
3
3.2A / P-CHANNEL
+5V_ST
EP[GND]
2
P_17V
+5V_ST_EN READY R610
16
1
1.26V Core
5Vst Enable
Power Wafer P601 SMAW200-H18S1
12
PH_3
11
PH_2
IC603 10 SN1007054RTER 4 9
PH_1
1
VIN_2
2
GND_1
3
GND_2
THERMAL 17
L605 500 Power Main
C624 100uF 16V
C621 100uF 16V
C628 0.1uF 16V
C631 22uF 16V
C651 10uF 10V
C652 10uF 10V
C653 0.1uF 16V
C626 0.01uF
8
7
6
C630 100pF C633 50V 22uF 16V
RT/CLK
C602 0.1uF 16V
COMP
L604 500 Power Main
100
VSENSE
5 AGND
+5V
100
R604 R605
ERROR_DET AC_DET
R1 R621 39K 1%
SS
3A
R600 10K READY
L607 3.6uH
R615 10K
R619 75K 1/16W 1%
R637 330K
C618 2200pF
R2
Switching freq: 600K
5V Tuner
3
6
4
5
L610 120-ohm Power Main R626 105K
40V
10K
COMP
R627 20K 1% C640 470pF 50V
VSENSE
R2 R613 10K READY
C643 15pF 50V
VIN_1
R625 51K
C638 0.015uF 50V
C609 10uF 16V
3.3V +5V
IC601 AP2121N-3.3TRE1 2
INPUT C605 100uF 16V
GND
3
2 1
C658 0.1uF 16V
C606 0.1uF 16V
OUTPUT
C797 ADJ/GND 10uF 16V
C663 10uF 16V READY
C659 47uF 6.3V
R1475 1
C660 0.1uF 16V
C661 0.1uF 16V
R614 10K
AZ1117BH-ADJTRE1
L300 120-ohm 2A C309 22uF 10V
C313 0.1uF 16V
3
1
ADJ/GND
OUTPUT
C637 10uF 10V
C647 10uF 10V
C650 0.1uF 16V
8
C625 0.01uF
R618 12K 1/16W 1%
R636 330K
R2
Switching freq: 600K
C325 47uF 6.3V
Vout=0.827*(1+R1/R2)
SEPARATE GND
LG8300 3.3V / 1.8V
R1 0 3D R1440 0
R2000 R2 0
READY C734 R704 10K 0.1uF READY 16V
R2001
BOOT
PWRGD
EN
3D C739 0.1uF 50V 12
PH_3
11
PH_2
IC704 10 SN1007054RTER 4 9 3A 3D
PH_1
3D 10K R774
3D C738 2200pF
8 RT/CLK
7
6
5 AGND
COMP
2 3
VSENSE
VIN_2
+3.3V
R641 0
THERMAL 17
CGND1
+1.0V
13
14
15
16
EP[GND]
0
1
GND_1 GND_2
R773 VIN_3
READY
VIN_1
3D C728 0.1uF
C629 100pF C632 50V 22uF 16V
R1
LG8300 1.0V
READY R762
3D C725 10uF 16V
SS
R347 1.2K
3D L710 BLM18PG121SN1D
10K
C617 2200pF
R2
R1 R620 10.7K 1%
R350 10
2
C322 0.1uF 16V
+5V
PH_1
3
5 IC301
+3.3V_TU INPUT
VOUT
1
C601 0.1uF 16V
+3.3V
PH_2
10 IC602 SN1007054RTER 4 9
GND_1
THERMAL 17
+1.5V_DDR_IN L606 3.6uH
3D L702 3.6uH
3D R778 5.1K 1%
SS C740 0.01uF 3D
3D L709 BLM18PG121SN1D
R3 0
+3.3V_3D 3D IC707 AZ1117BH-1.8TRE1
3D L703 BLM18PG121SN1D
INADJ/GND READY C749 47uF 6.3V
R1 3D C743 100pF 50V
3D C745 22uF 10V
3D C746 10uF 10V
3D C747 10uF 10V
3D C748 0.1uF 16V
3D C751 0.1uF 16V
OUT
R2002 R4 0
+1.8V 3D R834 0
3D C752 47uF 6.3V
1/10W 5%
VIN 3
+3.3V_AVDD
IC606 AZ1085S-3.3TR/E1
PH_3
11
2
AGND
+1.26V_TU
+3.3V_ST
12
1
VIN_2
GND_2
C620 0.1uF 50V
3A
1.26V Tuner +5V_ST
C611 0.1uF 16V
R640 0
RT/CLK
3.3Vst
READY R616 0
READY C613 0.1uF 16V
BOOT
7
READY R608
GND
13
SS
2
PH
PWRGD
C636 0.01uF 50V
R624 3.6K
C635 4.7uF 50V
8
EN
EN C634 4.7uF 50V
2A
1
VIN
14
GND
BOOT
C623 0.1uF 16V
15
C616 47uF 6.3V
7
VOUT
1.5V DDR +5V_ST_EN
6
C615 0.1uF 16V
LD600 SAM2333 READY
3 2
R1
COMP
C
ADJ/GND C607 47uF 6.3V
1
C662 10uF 10V
C644 10uF 16V READY
VSENSE
VIN R611 1K READY A1[GN]
L602 120-ohm C608 Power Main 0.1uF 16V
C642 10uF 16V
EP[GND]
OUTPUT
C641 10uF 16V
VIN_3
2 1
0.1uF 50V
16
3
IC605 TPS54231D
C639
P_17V
R623 16K
INPUT
IC604 TJ3964S-2.5
D600 MBRA340T3G
IC600 AZ1085S-3.3TR/E1
L611 120-ohm Power Main
+5V_ST_EN
C600 0.1uF 16V
EAP61606601 L608 22.0uH
+2.5V_AVDD
+3.3V_AVDD
1%
3.3V_AVDD / 2.5AVDD
Vout=0.827*(1+R1/R2)
+5V_TU
CGND2 R2003 R5 0
3D C755 0.1uF 16V
R2004 R6 0 CGND3
3D R779 22K 1%
R2005
R2
R7 0
3D R775 330K
R2006 R8 0 CGND4 R2007
Switching freq: 600K
Vout=0.8*(1+R1/R2)
1.8V Control for Power_On Seq of LG8300 SIDE_HDMI/USB GASKET GND M1
M2
M3
MDS62110205
MDS62110205
MDS62110205
READY
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
GP2R_S7R Power
2010-08-31 6
LGE Internal Use Only
RF Emiiter Interface +3.3V_3D
BOOT_SEL
TMODE[3]
TMODE[0]
TMODE[2]
TMODE[1]
/JTAG_TRST
JTAG_TDO
JTAG_TCLK
JTAG_TMS
JTAG_TDI
FLASH_WP L/R_DETECT
TMODE[1] TMODE[0]
B3
TD4P
C3
TD4N
C1
TCLK4P
C2
TCLK4N
D2
TC4P
D1
TC4N
D3
TB4P
E3
TB4N
E1
TA4P
E2
TA4N
F1
TE3N
F3
TD3P
G3
TD3N
TE4N
RA1P
TD4P
RB1N
TD4N
RB1P
TCLK4P
RC1N
TCLK4N
RC1P
TC4P
RCLK1N
TC4N
RCLK1P
TB4P
RD1N
TB4N
RD1P
TA4P
RE1N
TA4N
RE1P
TE3P
RA2N
G1
TCLK3P
G2
TCLK3N
H2
TC3P
H1
TC3N
H3
TB3P
J3
TB3N
J1
TA3P
J2
TA3N
U17
R1438
T18 T17
R1439
R18 R17
R896
P18 P17
R894
N18 N17
R891
M18 M17
R883
TE3N
RA2P
IC700
RB2N RB2P
TCLK3P
RC2N
TCLK3N
RC2P
TC3P
RCLK2N
LG8300
TC3N TB3P
RCLK2P RD2N
TB3N
RD2P
TA3P
RE2N
TA3N
RE2P
L17
R878
K18 K17
R845
J18 J17 H18 H17
R874
G18 G17
R840
F18 F17
R897
L3
TD2N
L1
TCLK2P
L2
TCLK2N
M2
TC2P
M1
TC2N
M3
TB2P
N3
TB2N
N1
TA2P
N2
TA2N
CLK_XIN
TD2P
CLK_XOUT
TD2N
PO_RST_N
TCLK2P LR_SYNC
100
LVDS_CLK_1LVDS_CLK_1+
100
LVDS_DATA_1_DLVDS_DATA_1_D+
100
LVDS_DATA_1_ELVDS_DATA_1_E+
100
LVDS_DATA_2_ALVDS_DATA_2_A+
100
LVDS_DATA_2_BLVDS_DATA_2_B+
+3.3V_3D
0.1uF
K13
C771 16V
0.1uF
L6
10uF
H5
C795 16V
0.1uF
J5
C803 16V
0.1uF
K5
C811 16V
0.1uF
L5
C828 16V
0.1uF
M5
C821 16V
0.1uF
LVDS_DATA_2_ELVDS_DATA_2_E+
E6
C794 6.3V
10uF
E7
C758 16V
0.1uF
E8
C765 16V
0.1uF
E9
C778 16V
0.1uF
E10
C772 16V
0.1uF
E11
C782 16V
0.1uF
E12 E14 E15 F15
L712 BLM18PG121SN1D
G15 +3.3V_LRX C832 6.3V
10uF
L16
C829 16V
0.1uF
N16
C831 16V
0.1uF +3.3V_LTX
0.1uF
TE1N
C816 16V
0.1uF
TD1P
C836 6.3V
10uF
C835 16V
0.1uF
R11
C817 16V
0.1uF
V17
C837 16V
0.1uF
TCLK1P
DDR_VREF_LG8300
TCLK1N
GND_4
VDD10_5
GND_5
VDD10_6
GND_6
VDD10_7
GND_7
VDD10_8 VDD10_9
N8
VDD10_11
GND_11
VDD10_12
GND_12
VDD10_13
GND_13
VDD10_14
GND_14
VDD10_15
GND_15
VDD10_16
GND_16
VDD10_17
GND_17
VDD10_18
GND_18
VDD10_19
GND_19
VDD10_20
GND_20
VDD10_21
GND_21
VDD10_22
GND_22
VDD10_23
GND_23
VDD10_24
GND_24
VDD10_25
GND_25
VDD10_26
GND_26 GND_27
LTX_VDD10_1
GND_28
LTX_VDD10_2
GND_29
LTX_VDD10_3
GND_30
LTX_VDD10_4
GND_31
LTX_VDD10_5
GND_32 GND_34
VDD33_1
GND_35
VDD33_2
GND_36
VDD33_3
GND_37
VDD33_4
GND_38
VDD33_5
GND_39
VDD33_6
GND_40
VDD33_7
GND_41
VDD33_8
GND_42
VDD33_9
GND_43
VDD33_10
GND_44
VDD33_11
GND_45
VDD33_12
GND_46
VDD33_13
GND_47 GND_48
LRX_AVDD33_1
GND_49
LRX_AVDD33_2
GND_50 GND_51
LTX_AVDD33_1
GND_52
LTX_AVDD33_2
GND_53
LTX_AVDD33_3
GND_54
LTX_AVDD33_4
GND_55
DDR_TDOUT[1]
DDR_TDOUT[0] V10
T10
DDR_TAOUT
DDR_DQ[14]
DDR_DQ[15]
U10
R12
R13 C_DDR_DQ[15]
10uF
N10
C792 6.3V
10uF
N11
C760 16V
0.1uF
N12
C767 16V
0.1uF
N13
C774 16V
0.1uF
N14
C779 16V
0.1uF
P6
C783 16V
0.1uF
P7
C787 16V
0.1uF
P8
C793 16V
0.1uF
P9
C802 16V
0.1uF
P10
C810 16V
0.1uF
P12
C814 16V
0.1uF
P13 P14 P15
READY READY R1481 R1482 2.7K 2.7K
2
F8 F9 F10
3
F11
3D_RF_RXD ZD701 5.6B
F12 4
F14 G5
3D_RF_TXD ZD702 5.6B
G14
R1456 100
5
G16
3D_RFMODULE_RESET
H7
R1483 100
6
H8 H9
3D_RFMODULE_DC ZD707 5.6B
H10
7
H11
R1484 100 3D_RFMODULE_DD
ZD708 5.6B
H12
R1477 1K
8
H14 H15 H16
R1453 100
9
J7
3D_RF_GPIO0 ZD703 5.6B
J8
R1469 100
10
J9
3D_RF_GPIO1 ZD704 5.6B
J10 J11
R1470 100
11
J12
3D_RF_GPIO2 ZD705 5.6B
J14
R1455 22
12
J15
3D_L/R_SYNC ZD706 5.6B
J16 13
K7
R1478 1K
R1479 1K
R1480 1K
K8 K9 K10 K11 K12 K14 K15 K16 L14 L15 M7 M8 M9 M10 M11 M12 M14 M15 N5 N6 N15 P5 P11 R4 R14 M16 P16
LRX_AVSS33_2 DDR_VREF0
F4
DDR_VREF1
LTX_AVSS33_1
DDR_VREF2
LTX_AVSS33_2 LTX_AVSS33_3
DDR_VDDQ_1
LTX_AVSS33_4
DDR_VDDQ_2
LTX_AVSS33_5
H4 K4 M4 P4
DDR_VDDQ_3 DDR_VDDQ_4
C17
DDR_VDDQ_5
DDRPLL_AVSS33
DDR_VDDQ_6
SYSPLL_AVSS33
DDR_VDDQ_7
ADPLL_AVSS33
DDR_VDDQ_8
E16 L707 BLM18PG121SN1D
F16
SSPLL_AVSS33 +3.3V_PLL
DDR_VDDQ_9 DDR_VDDQ_10
DDRPLL_AVDD33
DDR_VDDQ_11
SYSPLL_AVDD33
DDR_VDDQ_12
SSPLL_AVDD33
DDR_VDDQ_13
ADPLL_AVDD33
DDR_VDDQ_14
+3.3V_3D
D17
C18
C834
D18
C773
E17
C766
0.1uF
E18
C759
0.1uF
C839
10uF
0.1uF 0.1uF
DDR_VDDQ_15 DDR_VDDQ_16 DDR_VDDQ_17
C_DDR_DQ[15-0]
DDR_DQ[13] C_DDR_DQ[14]
DDR_DQ[12]
DDR_DQ[11] T11
V13 C_DDR_DQ[13]
C_DDR_DQ[12]
DDR_DQ[9]
DDR_DQ[10] U11
U13
C_DDR_DQ[11]
C_DDR_DQ[10]
C_DDR_DQ[9]
V11
DDR_DQ[8]
T13
DDR_DQ[6] U15
DDR_DQ[7] C_DDR_DQ[8]
C_DDR_DQ[7]
C_DDR_DQ[6]
T14
DDR_DQ[5]
DDR_DQ[4] V16 C_DDR_DQ[5]
DDR_DQ[3] R16 C_DDR_DQ[4]
T16
DDR_DQ[2]
DDR_DQ[1] U16
C_DDR_DQ[3]
C_DDR_DQ[2]
DDR_DQ[0]
DDR_DM[1]
DDR_DM[0] R15
T12 C_DDR_DQM1
C_DDR_DQM0
C_DDR_DQ[0] V15 C_DDR_DQ[1] T15
DDR_DQS_N[1]
DDR_DQS_N[0] U12
C_DDR_DQS1M
C_DDR_DQS0M
U14
DDR_DQS[1] C_DDR_DQS1P
V12
DDR_DQS[0] C_DDR_DQS0P
/C_DDR_WE
V14
DDR_WE_N
DDR_CAS_N R10
/C_DDR_CAS
T5
DDR_RAS_N /C_DDR_RAS
C_DDR2_ODT
V4
DDR_ODT
DDR_CS_N U4
/C_DDR_CS
R5
DDR_CKE
DDR_CK
DDR_CK_N V9
U6
C_DDR2_CLK
/C_DDR2_CLK
V6
C838 6.3V
READY R1454 2.7K
F7
EJTAG
+3.3V_3D
8
2
7
3
6
VCC
C735 0.1uF 16V
READY R761 3.3K
HOLD
4
5
R763 3.3K
R776 3.3K
R765 3.3K R768 3.3K
+1.8V
R764 3.3K
CLK
SPI_CK
/JTAG_TRST
DIO
TP1
SPI_DI
JTAG_TDI JTAG_TDO
TP2
E
TP3
JTAG_TMS JTAG_TCLK
+1.8V
TP7
1
C GND
C_DDR2_CKE
DDR_BA[1] C_DDR_BA[1]
T9
DDR_BA[0]
DDR_ADDR[12] U9
C_DDR_BA[0]
DDR_ADDR[11]
C_DDR_A[12] V7
DDR_ADDR[10]
DDR_ADDR[8]
DDR_ADDR[9]
C_DDR_A[10] R9 C_DDR_A[11] T7
DDR_ADDR[7] R7
R8
U7 C_DDR_A[9]
C_DDR_A[8]
DDR_ADDR[6]
C_DDR_A[7]
U5 C_DDR_A[0]
C_DDR_A[12-0]
WP
N9
1
F5
+3.3V
+3.3V
+3.3V_3D
IC702 W25X20BVSNIG
DO
DDR_ADDR[5]
TA1P
GND_9 GND_10
LRX_AVSS33_1
+1.8V
TB1N
GND_8
VDD10_10
N7
TB1P
R758 10K
GND_3
VDD10_4
T4
TC1N
Q703 KRC103S READY
VDD10_3
LTX_AVDD33_5
TC1P
SPI_DO
GND_2
E4
C815 16V
TD1N
GND_1
VDD10_2
E5
E13
L706 BLM18PG121SN1D
VDD10_1
GND_33
+3.3V_VDD
LVDS_DATA_2_D-
100
M13
TE1P
CS
B
C764 16V
J4
Serial Flash 2MBit
FLASH_WP
K6
0.1uF
TA1N
SPI_CSZ
J13
C812 16V
DDR_ADDR[4]
U2
TA1N
0.1uF 0.1uF
N4
DDR_ADDR[3]
U1
C813 16V C757 16V
0.1uF
T6
TB1N TA1P
J6
C804 16V
T8
U3
H13
L4
R6
TB1P
H6
0.1uF 0.1uF
0.1uF
C_DDR_A[6]
T3
0.1uF
C800 16V C808 16V
C796 16V
C_DDR_A[5]
TC1N
C790 16V
L705 BLM18PG121SN1D
3D_L/R_SYNC
C_DDR_A[4]
T1
G13
+1.0V_LTX
V3
TA2P
DDR_ADDR[2]
TC1P
G12
G4
U8
T2
0.1uF 0.1uF
10uF
C_DDR_A[3]
R2
C781 16V C785 16V
C833 6.3V
DDR_ADDR[1]
TCLK1P TCLK1N
G11
C820 6.3V
R1450 0
DDR_ADDR[0]
R1
0.1uF
M6
LVDS_DATA_2_D+
B17
TB2N
V5
TD1N
C777 16V
LG8300_RESET
V8
R3
G10
L13
LVDS_CLK_2LVDS_CLK_2+
100
TB2P
C_DDR_A[2]
P3
0.1uF
L704 BLM18PG121SN1D
R1452 0
C_DDR_A[1]
TE1N TD1P
C770 16V
+1.0V
P2 P1
G9
L12
TA2N
TE1P
G8
L11
LVDS_DATA_2_CLVDS_DATA_2_C+
100
B18
TC2N
G7
0.1uF
L10
EMITTER_PULSE
TC2P
0.1uF 0.1uF
C763 16V
LVDS_DATA_1_CLVDS_DATA_1_C+
V2
TCLK2N
C798 16V C756 16V
L9
A17
TE2N
G6
L8
25MHz X700 50V 27pF C722
K3
10uF
LVDS_DATA_1_BLVDS_DATA_1_B+
R744
TE2N TD2P
TE2P
C791 6.3V
100
1M 1%
K1
F13
L7
K2
TE2P
10uF
LVDS_DATA_1_ALVDS_DATA_1_A+
100
R895
C818 6.3V
100
100
L18
TD3N
R752 R754 3.3K 3.3K
A3
D4
RA1N
TD3P
R750 3.3K
BOOT_SEL
TMODE[3]
TMODE[2]
C4
A4
B4
TMODE[1]
D5 TEST_SE
TMODE[0]
TCK
U18 TE4P
F2
TE3P
R748 3.3K
R739
22 R910 22 R911 4.7K B5
C5 TDO
TRST
22 R907
22 R908 22 R909 A5
C6
D6
TMS
TDI
A6
D7
C7
B7
A7
D8
C8
B8
A8
D9
B6 GPIO[31]
GPIO[30]
GPIO[29]
GPIO[28]
GPIO[27]
GPIO[26]
GPIO[25]
GPIO[24]
GPIO[23]
GPIO[22]
GPIO[21]
R725 0
R723 0
R722 0
R721 0
R726 0 GPIO[20]
C9
B9
GPIO[19]
GPIO[18]
A9 GPIO[17]
D10
B10
A10
D11
C11
B11
A11
C10
GPIO[16]
GPIO[15]
GPIO[14]
GPIO[13]
GPIO[12]
GPIO[11]
C12
B12
A12
D13
D12
GPIO[9]
GPIO[10]
GPIO[8]
GPIO[7]
GPIO[6]
GPIO[5]
GPIO[4]
GPIO[3]
C13
R708 0
B13
D14
C14
A13
GPIO[2]
GPIO[1]
GPIO[0]
SDA_M
P_SCL
P_SDA 22 R1446
SPI_CK SPI_DI
A2
TMODE[2]
50V 27pF C721
B1
TE4N
12507WS-12L
GND_0
F6
TMODE[3]
B2
TE4P
IC700 LG8300
+1.0V
BOOT_SEL
R746 3.3K
B14
R1443 22 R1444 22
22 R1445 A14
C15
D15
SDA
SCL
SCL_M
SPI_DI
SPI_CSZ
UART_TXD_3D
SPI_DO
22 R904
22 R902 22 R903
B15
D16
A15
SPI_DO
SPI_CS
SPI_SCLK
C16
22 R905
22 R1448 B16 UART_RXD
UART_TXD
A16
22 R1449
UART_RXD_3D
P704 READY READY READY READY READY R745 R747 R749 R751 R753 3.3K 3.3K 3.3K 3.3K 3.3K
TP4 0
TP5
R759
DDR_VREF_LG8300 R998 4.7K 1%
TP6
R770 1K
LG8300_RESET
DDR_VREF_DDR R996 4.7K 1%
R999 4.7K 1%
R997 4.7K 1% C843 C842 0.1uF 1000pF
C840 C841 0.1uF 1000pF
+3.3V_3D SW700 JTP-1127WEM 1 3
2 4
R757 0
Close to LG8300
R772 10K C737 0.1uF 16V
Close to DDR2(IC701)
LG8300_RESET
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
GP2R_S7R 3DF
2010-08-31 7
LGE Internal Use Only
PDP TV Repair Guide < Applicable Model > - PD11A/B/L/K
Copyright Š 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
PDP TV Repair Process Index No.
Symptom (M)
Page
1
No Picture/Sound OK
1
2
No Picture/No sound
2
Mal-discharge/Noise/dark picture
3
4
Picture broken/Freezing
4
5
Vertical bar/ Horizontal Bar
5
6
No Power (Not turn on)
6
Turn off (Instant, under watching)
7
No sound/ Sound distortion
8
Remote control & Local Key checking
9
RF emitter checking
10
3
Symptom (L)
A. Picture Problem
Remark
B. Power Problem 7 8
C. Sound Problem
9 E. General function Problem 10
First of all, Check whether there is SVC Bulletin in GCSC System for these model.
Copyright Š 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process
PDP TV
Symptom
A. Picture Problem
Making
No Picture/Sound OK
Revision
2010. 11. 16
- 6-2 1/10
First of all, Check whether all of cable between board was inserted properly or not. (Main B/D ↔ Power B/D, Power B/D ↔ Y-sus B/D, Power B/D ↔ Z-Sus B/D(for 60Inch), LVDS Cable, Speaker Cable, IR B/D Cable) ☞A1 Check Module pattern by using “TILT” key on SVC R/C
☞A2 Normal
Y
Check Sound
Sound OK
Check LVDS Cable
Y
Normal
N
Replace Main B/D
Check Vs, Va
Normal
Y
Check voltage . -VY . VSC . VZB
Normal
N
Y
Check B+ Voltage on Power Board / Control Board .Check B+(5V)
Y
1.Check Control Board . LED on . Crystal(X2), 3.3V, 5V . Rom update 2.Replace Control B/D
Move Power problem Section
1. Check Y-Sus/ Z-Sus Board 2. Replace defective B/D
※Refer to the Module label for each voltage
Normal N
N
☞A8~A11
Move Power problem Section
☞A13
☞A12
☞A5~A6
☞A3
Close
N
Move No Picture/No sound Section
N
Y
☞A4
<SVC R/C & Pattern>
-VY
VSC
VZB 1
Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process
PDP TV
Symptom
☞A1
A. Picture Problem
Making
No Picture/No Sound
Revision
- 6-2
2010. 11. 16
2/10
☞A2
Check Module pattern by using “TILT” key on SVC R/C
Y
Normal
Check Sound
Sound OK
Y
Check LVDS Cable
Picture OK
N
N
☞A6
Y
Close
N
Check Video
Move No Picture/ Sound Ok Section
Close Check “Speaker ON/Off” setting in OSD Menu
Normal Sound?
N
Check Speaker jack connection & Speaker Cable open
Normal Sound?
Y
Y
Close
Close
N
SVC Bulletin?
Y
Apply SVC Bulletin (S/W Upgrade etc)
Y
N
N
Check 17V (Audio IC B+) on Power B/D
Normal Sound?
Normal voltage?
N
Check Power B/D Replace Power B/D
Y Check Audio IC Short Replace Main B/D
2 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process
PDP TV Check Picture problem Type
A. Picture Problem
Symptom
Making
Mal-discharge/Noise/dark picture
- 6-2
2010. 11. 16
3/10
Revision
☞A15 Check CTRL ROM Ver. and Rom Upgrade
Dot type
Normal Picture?
☞A14
N
Replace Control board
Normal Picture?
Y
Y
Close
Close
N
Replace Module
Mal-discharge
☞A16
☞A5 Scan Type
Check voltage . –VY / VSC (Y-Sus B/D)
Y
Normal Picture?
Check Y Drive B/D & Replace B/D
☞A13 Normal Picture?
N 1.Check Control B/D 2.Replace Board
Y
N
N
Normal Picture? Y
Close
Replace Y-Sus B/D
Close
☞A6-1, 2 Picture Noise
Check RF Cable Connection
N
Normal Picture?
Check Tuner & Replace
Y Close
☞A9 Dark Picture
Check Picture mode setting
Normal Picture?
N
1. Check Z-Sus Board 2. Replace Board
Normal Picture?
Y
Y
Close
Close
N
Replace Module
3 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process
PDP TV
Symptom
Making
Picture broken/Freezing
☞A21 Check RF Signal level
Normal Signal?
A. Picture Problem
Y
- 6-2
2010. 11. 16
4/10
Revision
. By using Digital signal level meter . By using Diagnostics menu on OSD ( Menu→Press red key on R/C →Signal TEST) - Signal strength (Normal : over 50%) - Signal Quality (Normal: over 50%)
Check whether other equipments have problem or not. (By connecting RF Cable at other equipment) → DVD Player ,Set-Top-Box, Different maker TV etc
N Check RF Cable Connection 1. Reconnection 2. Install Booster
Normal Picture?
N
Move No Picture/ Sound Ok Section
■ Menu→Setup →Booster
Y Normal Picture?
N
Y Close
Check S/W Version
N
SVC Bulletin?
Booster menu On→Off: Check Off→On: Check
Normal Picture? N
Y S/W Upgrade
Y
Close
☞A6-1, 2
Check Tuner & replace Main B/D N
Normal Picture?
Normal Picture?
Y Close
N
Contact with signal distributor or broadcaster (Cable or Air)
4 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process
PDP TV ☞A19 Check defect type
A. Picture Problem
Making
Vertical bar/ Horizontal Bar
Revision
Symptom
- 6-2
2010. 11. 16
5/10
☞A1 Check Module pattern by using “TILT” key on SVC R/C
Regular Vertical Line / Bar
Y
Normal Pattern? N
☞A13
1.Check CTRL B/D 2.Replace Board
Vertical Line/Bar
☞A20 Irregular Vertical Line / Bar
Replace Module
※CTRL B/D: Control board
☞A13
Check connection of Connector (COF,TCP) on CTRL B/D , X B/D
Normal
Y
1.Check CTRL B/D 2.Replace Board
Normal Picture?
N
Check Main B/D Replace Module (If Main B/D doesn’t cause)
N Y
1.Connector re-connection 2.Eliminate foreign material on Connector
Close
☞A18 Half No picture
1.Check X B/D 2.Replace Board
N
Normal Picture?
Replace Module
Y Close
☞A20 Horizontal Line/Bar
※ H-Line’s Cause is rare CTRL B/D
☞A16
Check connection of Connector (FFC) on Y Drive B/D
Normal
Y
1. Check Y Drive B/D 2. Replace Board
N 1.Connector re-connection 2.Eliminate foreign material on FFC
Normal Picture?
N
1.Check CTRL B/D 2.Replace Board
Normal Picture?
Y
Y
Close
Close
N
Replace Module
5 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process
PDP TV
B. Power Problem
Symptom
Making
No Power (Not turn on)
- 6-2
2010. 11. 16
6/10
Revision ☞A26
Check Power LED
Y
Power LED ON?
. Stand-By: Red . Operating: Blue
DC Power on by pressing Power Key On Remote control
N Normal
Check R/C IR Operation
N Normal
Y
N
Repair/Replace IR B/D
Y
Close Check Power cord was inserted properly
Normal ?
☞A22
Y
Close
N
Check ST-BY 5V on Power Board
☞A22 Normal Voltage?
Y
Check AC DET Signal on Power B/D
N
☞A22
☞A22 Normal Signal?
☞A23
Y
Check RL_ON Signal on Power B/D
N
Normal Signal?
Y
N
Check Power B/D Replace Power B/D
Check Main B/D Replace Main B/D
Check the other pin’s Output voltage on Power B/D
N Normal
Replace Power B/D
Y Close
6 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process
PDP TV
B. Power Problem
Symptom
Making
Turn off (Instant, under watching)
Revision
- 6-2 7/10
☞A8~A11
※ To check Power B/D Protection Instant Turn off
2010. 11. 16
Turn on after pull out connector between Power B/D & Y-Sus
Power LED Blue?
Y
1. Check Y-Sus/ Z-Sus Board (especially Short or Open) 2. Replace defective B/D
N
☞A23
Check Power B/D Replace Power B/D
RCU Off
☞A24 Turn off Under watching
N “Off Timer” Set?
KEY Off
Check Power Off History
2HOUR Off
This is not problem Normal operation
Y NO Signal Off “Off timer” Function off
Don’t appear Power Off History
Move No Power problem Section
7 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process
PDP TV
C. Sound Problem
Symptom
Making
No sound/ Sound distortion
- 6-2
2010. 11. 16
8/10
Revision
1.No sound( If HDMI Input only have no sound, upload EDID data)
Close
☞A25 Check “Speaker ON/Off” setting in OSD Menu
Normal Sound?
N
Check Speaker jack connection & Speaker Cable open
Normal Sound?
Y
N
SVC Bulletin?
Close
Apply SVC Bulletin (S/W Upgrade etc)
Y
Normal Sound? N
N
Y
Close
Y
☞A22
☞A23
Check 17V (Audio IC B+) on Power B/D
Normal voltage?
N
Check Power B/D Replace Power B/D
Y
2.Sound distortion & sound drop ☞A2 Check Input signal →Cable connection →Cable open - RF & external (HDMI,SCART,,,)
Normal Sound?
N
Check AVL off/on Clear voiceⅡ off/on
Normal Sound?
Problem in external input (SCART,HDMI,,,)
Y
Close
Problem in all input Problem in only DTV
N Y
Check Audio IC Short Replace Main B/D
Close
Check whether Problem happen in same output of other equipments or not. (By connecting same output cable of other equipment) → DVD Player ,Set-Top-Box, different maker TV etc
N
Normal Sound? Y
SVC Bulletin? N
Explain customer that Cause is RF Signal’s problem (Case 1) Cause is Equipment’s problem (case 2)
Y
Apply SVC Bulletin (S/W Upgrade etc)
Normal Sound?
Y Close
N Check Audio IC Replace Main B/D
8 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process
PDP TV
D. General Function Problem
Symptom
Making
- 6-2
2010. 11. 16
Remote control & Local Key & RF emitter checking Revision
9/10
1. Remote controller (R/C) operating error
Replace Main B/D
☞A26 Check R/C itself Operation
Y Normal operating? N
Normal operating?
N
Y
Check R/C Operating When turn off light in room
Check & Replace Battery of R/C
If R/C operate, Explain the customer cause is interference from light in room.
Normal operating?
☞A26
☞A26
Check & Repair Cable connection Connector solder
Check B+ 5V On Main B/D
☞A12
Close
Normal Voltage?
Y
Check IR Output signal
N
Normal Signal?
Y
N
Check 5V on Power B/D Replace Power B/D or Replace Main B/D (Power B/D don’t have problem)
Repair/Replace IR B/D
Close
N Replace R/C
2. Local KEY operating error
Replace Main B/D
☞A27 Check local key Operation
Normal operating?
Y
N Move Power problem Section
Check & Repair Cable connection Connector solder
☞A27 Normal N operating?
Check Key Output signal
Normal Signal?
Y
N
Y Close
Repair/Replace Local Key B/D
9 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process
PDP TV
D. General Function Problem
Symptom
Making
2010. 11. 16
Remote control & Local Key & RF emitter checking Revision
- 6-2 10/10
3. RF emitter operating error
Check RF emitter Operation
Check the signal between the RF emitter and Mani board
Normal Signal?
Y
Display normally
Check the RF emitter SW Ver. at SVC menu
N
N
☞A28
Y
Close
Y
☞A28
Check & Repair Cable connection Connector solder
Normal operating? Y Close
N
Replace RF emitter board
Normal operating? N Replace Main B/D
10 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
PDP TV Repair Process Reference data Index No.
Symptom
Detail
Page
1
Check Module pattern by Tilt key
A1
2
Audio check method
A2
3
Check Va, Vs on Power Board
A3
4
PDP Module Label Information
A4
5
Check & Adjust 窶天Y,VSC,VZB voltage - 50R3 窶天Y,VSC(Y-Sus) / VZB(Z-Sus)
A5
6
Video Check Method
A6
6
Fuse Checking Method
A7
7
Y-Sus Board Checking Method(50R3)
A8
8
Z-Sus Board Checking Method(50R3)
A9
11
Check 5V on Power B/D
A12
Control Board Checking Method(50R3)
A13
13
Mal discharge Symptom Picture
A14
14
PDP Module Rom Ver. Checking method
A15
15
Y Drive B/D Checking method
A16
17
(Half picture) X- B/D Checking method(50R3)
A18
12
Picture Problem
Remark
Next page Continued Copyright ツゥ 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
PDP TV Repair Process Reference data Index No.
Symptom
Detail
Page
Defect type cause by PDP Module
A19
Connector Type on PDP Module
A20
20
RF Signal level Checking method
A21
21
Check voltage on Power board
A22
Power board Checking Method
A23
Check Power off History
A24
Speaker cable checking method
A25
Check Remote control IR operation
A26
Check Local Key operation
A27
Check RF emitter operation
A28
18 19
22
Picture Problem
Power Problem
23 24
Sound Problem
25 26
General Function Problem
27
Copyright Š 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
Remark
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Symptom Item
A. Picture Problem Check Module pattern by Tilt key
Making
2010. 11. 16
Revision
- 6-2 A1
Tilt Key You can see 20 types patterns by using TILT Key on SVC Remote controller (except Old model) < CHECK Item > 1. Dead pixel 2.Image sticking 3.Mal discharge 4.Module defect (V-Line/Bar, H-Line/Bar,,,) 5. In case of no picture, you can judge defect cause (Module or Main B/D) - If patterns appear, defect cause is Main B/D A1 Copyright Š 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Making
Audio check method
Revision
2010. 11. 16
- 6-2 A2
Jack for Speaker connection
1.Check Audio output by using oscilloscope
2.Check whether speaker jack was inserted properly or not.
GND â&#x2020;&#x201D; R- or R+ or L- or L+
Audio output waveform A2 Copyright Š 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data Input Block
PDP TV
All Input Audio Problem
Making Revision
2010. 11. 16
- 6-2 A2-1
Make sure you can’t hear any audio Y N Check speaker for damage.
Replace the Speaker
Y Check Connector P301
N
Replace P301
Y Check IC303 Power 17V(C340), 3.3V(R365,R374)
N
Check 17V (P600 #1,2), 3.3V (IC606 #2)
N
Check Reset (R380) / PDN (R374) :They must be High (3.3V)
Y Check IC700 Status PDN(#23) / Reset(#31) is High? Y Check SCL,SDA R359, R360
N Replace R359, R360
Y Check Mstar I2S Output #27,28, 29, 30 on IC303
N Replace MSTAR(IC400).
Y Replace AMP(IC303)
Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data Input Block
PDP TV
Digital TV / HDMI Audio Problem
Making Revision
2010. 11. 16
- 6-2 A2-2
◆ Digital TV Check video output
N
Follow procedure digital TV video trouble shooting
N
Follow procedure HDMI video trouble shooting
Y Follow procedure All source audio trouble shooting
◆ HDMI Check video output Y Check EDID Download
N
Re-download EDID data
Y Follow procedure All source audio trouble shooting
Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data Input Block
PDP TV
Check video output
Analog TV Audio Problem N
Making
2010. 11. 16
Revision
- 6-2 A2-3
Follow procedure analog TV video trouble shooting
Y Check #3 on TU300 for 5V
N
Check IC605 output Voltage
Y Check SIF signal C301
N
Replace TU300
Y Check SIF signal (C301)
N
Check SIF line
Y Follow procedure All source audio trouble shooting
< SIF waveform – sample > - Defend on the input signal.
Y Replace MSTAR IC (IC400)
Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Input Block
Component / AV/RGB Audio Problem
Check Connector and cables JK210(Component) JK100, JK101 (SCART) JK208 (RGB) JK207 (Side AV)
N
Making Revision
2010. 11. 16
- 6-2 A2-4
Replace connector or cable if found damaged
Y Check signal JK210 (Component) : R261, R262 JK100, JK101 (SCART) : R128, R131, R193, R194 JK208 (RGB) : R215, R216 JK207 (Side AV) : R1201, R1202 Y Check IC400 signal JK210 (Component) : C441, C442 JK100, JK101 (SCART) : C435, C436, C437, C438 JK208 (RGB) : C443, C444 JK207 (Side AV) : C439, C440 Y
N
N
Replace the Resistor
Replace the Capacitor
Follow procedure All source audio trouble shooting
Copyright Š 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data Input Block
PDP TV
Optical Audio Problem
Making
2010. 11. 16
Revision
- 6-2 A2-5
Check Signal (JK204 #3) Y N Check 5V #2 on JK204
Check P601 Output (L604,L605)
Y N Check SPDIF signal (R296)
Replace MSTAR(IC400)
< SPDIF waveform – sample > - Defend on the input signal.
Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
A. Picture Problem
Making
Check Va, Vs on Power Board
Revision
Symptom
- 6-2
2010. 11. 16
A3
▶ Check Va & Adjust Va Voltage (Refer to the Module label for Va specification) Power Board
PDP Module Label
Z-Sus Board
▶ Check Vs & Adjust Vs Voltage (Refer to the Module label for Vs specification)
Y-Sus Board
Check Va
Check Vs
Vs Adjustment (VR901)
Control Board Main Board
Va Adjustment (VR502)
A3
Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Making
PDP Module Label Information
Revision
- 6-2
2010. 11. 16
A4
PDP Module Label Information. ① ② ③ ④ ⑤ ⑥
⑨
⑧
⑩ ⑪ ⑫
⑦ Vy Vsc
⑭
⑬
Vzb
① Model Name
⑨ UL Approval Mark
② Bar Code (Code 128, Contains the manugacture No.)
⑩ UL Approval No. ⑪ Model Name
③ Manugacture No.
⑫ Max. Watt
④ Adjusting Voltage(DC Va, Vs)
⑬ Max. Volts
⑤ Adjusting Voltage (Set up/-Vy/Vsc/Ve/Vzb)
⑭ Max. Amps
⑥ The trade name of LG Electronics ⑦ Manufactured date(Year & Month) ⑧ Warning Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
A4 LGE Internal Use Only
Repair Process-Reference data
PDP TV
A. Picture Problem
Symptom
Making
2010. 11. 16
A5
Check & Adjust 窶天Y,VSC,VZB voltage(50R3) Revision
Voltage Check & Adjustment : 50R3
- 6-2
YSUS board
<Module Label> Vsc adjustment Fuses
-Vy adjustment Vy Vsc
Vzb
1. Vsc (150V) on Y-Sus B/D - Check Point: R324 - Adjustment Point: VR301
2. -Vy (-190V) on Y-Sus B/D - Check Point: R334 - Adjustment Point: VR302
A5 Copyright ツゥ 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
A. Picture Problem
Symptom
Making
Check & Adjust 窶天Y,VSC,VZB voltage(50R3) Revision
2010. 11. 16
- 6-2 A5
Voltage Check & Adjustment : 50R3
ZSUS board
<Module Label>
Vzb adjustment
Vy Vsc
Vzb
3. VZB (115V) on Z-Sus B/D . Check Point: R156 - Adjustment Point: VR204
A5 Copyright ツゥ 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data Input Block
PDP TV
Digital TV Video Problem
Making Revision
2010. 11. 16
- 6-2 A6-1
Check RF Cable Y Check TU300 Power 5V(C304), 3.3V(C302), 1.2V(C300)
N
Check Voltage 5V : IC605 Output 3.3V : IC600 Output 1.2V:IC301 Output
Y Check Video color
N
Y Check IIC Line
Check Monitor Out Video (Scart out)
N
Replace Tuner
Y N
Check TU_SCL/SDA Line
Y Check other input / OSD
N
Check Module
Y Change MSTAR(IC400)
A6 Copyright Š 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data Input Block
PDP TV
Analog TV Video Problem
Making
2010. 11. 16
Revision
- 6-2 A6-2
Check RF Cable Y Check 5V voltage on TU300(Pin3)
N
Check IC605 Output Voltage(L610)
Y Check CVBS signal TU601 #11 Pin
N
Replace Tuner(TU300)
Y Replace MSTAR(IC400)
< CVBS waveform – sample > - Defend on the input signal.
A6 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data Input Block
PDP TV
Component Video Problem
Making Revision
2010. 11. 16
- 6-2 A6-3
Check input signal format Is it supported? Y Check Component Cable Y Check signal on R411,C413,C415
N
Check the damage of JK210 And Replace Connector
Y Replace MSTAR(IC400)
Copyright Š 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
â&#x20AC;ť Measured signals depend on the input signal.
LGE Internal Use Only
Repair Process-Reference data Input Block
PDP TV
RGB(D-Sub) Video Problem
Making Revision
2010. 11. 16
- 6-2 A6-4
Check input signal format Is it supported? Y Check RGB Cable conductors for damage Y N Check P205
Replace connector (P205).
Y Check signal, Hsync, Vsync R218, R219 Y Check signal R404, R406, R408
N Replace R404, R406, R408
Y Replace MSTAR(IC400)
â&#x20AC;ť Measured signals depend on the input signal.
Copyright Š 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data Input Block
PDP TV
AV Video Problem
Making Revision
2010. 11. 16
- 6-2 A6-5
Check input signal format Is it supported? Y Check AV Cable for damage or open conductors Y Check AV port of JK207(Side), JK100,JK101(Rear)
N Replace connector
Y Check signal line JK207-Video : C425 JK100-Video : C408,C410,C412(RGB), C423(CVBS)
N Replace Capacitor
Y Replace MSTAR(IC400)
â&#x20AC;ť Measured signals depend on the input signal.
A6 Copyright Š 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data Input Block
PDP TV
HDMI Video Problem
Making Revision
2010. 11. 16
- 6-2 A6-6
Check input signal format Is it supported? Y Check HDMI Cable for damage or open conductors Y Check EDID D/L
N
Re-Download EDID
Y Check JK200 / J201 / J202 for proper connection or damage
N
Replace Connector
Y Replace MSTAR(IC400)
A6 Copyright Š 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
A. Picture Problem
Making
Fuse Checking Method
Revision
Symptom
2010. 11. 16
- 6-2 A7
< DMM mode >
Pic. 1. Fuse check Pic. 1.
Pic. 2.
1) Sound comes, the fuse is OK. 2) If Fuse is defects, it should check again voltage of 5V, Va, Va after replacing the fuse. 3) In case there are no voltage of 5V, Va, Vs, the board is failure, it need to replace the board.
A7 Copyright Š 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Making
Y-Sus Board Checking Method(50R3)
▣ Check Method ① Check input voltages(5V, Va, Vs) at P103 connector. ② Check it is short or not between Vs and GND at P103 connector. ③ Check all of fuses open. (FS201, FS202, FS203, FS501) ④ Check voltage of diode , FET by using digital multi-meter.
2010. 11. 16
A8
Revision
YSUS board FS203 Vs fuse
▣ Measurement method
P113
FET
Diode
- 6-2
FS202 5V fuse FS201 Va fuse
▣ Specifications
Forward Reverse
HS602
Forward Reverse
HS603
Forward Reverse
D610 Q606,Q607 Q608,Q609 0.35V ~ 0.45V 0.45V~0.55V 0.45V~0.55V O.L. (Overload) Q601,Q602 D604,D605 0.45V~0.55V 0.35V ~ 0.45V O.L. (Overload) D602 Q603,Q605 Q610,Q612 0.35V ~ 0.45V 0.35V ~ 0.45V 0.4V~0.5V O.L. (Overload)
HS602
HS601
FS501 18V fuse
Circuit No.
HS601
Direction
HS603
Position
A8 A9 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
A. Picture Problem
Symptom
Making
Z-Sus Board Checking Method(50R3)
① Check input voltages(5V, Va, Vs) at P203 connector. ② Check it is short or not between Vs and GND at P203 connector. ③ Check all of fuses open. (FS202) ④ Check voltage of diode , FET by using digital multi-meter.
▣ Measuring Method
FET
- 6-2
2010. 11. 16
A9
Revision
ZSUS board
P203
Diode
HS101
HS102
Direction Forward Reverse Forward Reverse
Circuit No. D114,D118
Q107, Q110
Q106, Q109
0.35V ~ 0.45V
0.35V ~ 0.45V
0.35V ~ 0.45V
O.L. (Overload) D109,D110,D108,D111 Q104,Q113,Q114 0.35V ~ 0.45V
0.5V ~ 0.6V
Q102,Q103 0.45V~0.55V
HS101
Position
HS102
▣ Specifications
O.L. (Overload)
FS202 5V fuse
A9 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Making
Check 5V, 17V on Power B/D
Revision
2010. 11. 16
- 6-2 A12
Power Board
P813
P600 P813
▣ Measure 5V voltage
▣ Measure 17V voltage
17.02
A12 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
A. Picture Problem
Symptom
Control Board Checking Method(50R3)
▣ Checking Method
Making
- 6-2
2010. 11. 16
A13
Revision
④ Check IC ( IC53, IC51 )
① Check input voltages(5V of P105 / 18V of P2) at control board.
IC53
IC51 5V
② Check LED is on.
3.3V
3.3V GND
③ If LED doesn’t work, check crystal X1 output. ④ Check 3.3V, 5V IC. ⑤ Check MCM at VS_DA by using digital multi meter. ② Check LED On ③ Check Crystal(X1) Check oscillation of Crystal (Normal: 25 MHZ)
⑤ Check MCM P105_FL1,FL2(5V)
MCM Check point (+)VS_DA / (-) GND (Normal: 3.3V )
P2(18V) Pin14, 15 Pin 14,15 : 18V
① Check Input voltage A13 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Making
Mal discharge Symptom
Revision
2010. 11. 16
- 6-2 A14
▣ Dot type Mal-discharge symptom
▣ Dark picture caused by Mal-discharge
▣ Scan type Mal-discharge symptom
A14 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Making
PDP Module Rom Ver. Checking method
- 6-2
2010. 11. 16
A15
Revision
▣ Check by using Rom Label on control board
Rom ver. Label
▣ Check by using SVC Remote controller
※Refer to the Module Rom upgrade manual for Rom upgrade.
Press “In-start” →Press ”0413” → Select Panel Control → Check Module Rom ver.
USB Type Jig
A15 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem Y Drive B/D Checking method(50R1)
Making
2010. 11. 16
Revision
- 6-2 A16
▣ Y drive board
Scan IC
※ DMM (Digital Multi-Meter)
Input signal connector
※ Check all output pins of scan IC (connector) using DMM.
A16 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
A. Picture Problem
Symptom
Making
(Half picture) X- B/D Checking method(50R1)
▣ Half / partly display (or abnormal display)
▣ Connections between panel and X B/D -. Right display (Picture 1.) ↔ Check/replace right X B/D -. Both ends display (Picture 2.) ↔ Check/replace center X B/D -. Left display (Picture 3.) ↔ Check/replace left X B/D
Partly display (abnormal)
- 6-2 A18
Revision Picture 1.
-. Check Va input voltage. (P121, P120, P220, P221, P320 : Power connector of the X board) Half -. Check cables between CTRL board and X board. display -. Replace the X B/D. (abnormal) -. Check TCP connection after X B/D replacement.
2010. 11. 16
Picture 2.
Picture 3.
abnormal
abnormal
※ Check connections (TCP - X board, CTRL board - X board)
Va
from CTRL
Va
from CTRL
Va
from CTRL
A18 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem Defect type cause by PDP Module
Making
- 6-2
2010. 11. 16
A19
Revision
First of all, Check whether all of cable between board was inserted properly or not. Next, Check whether there is foreign material on connector. Symptom picture
defects description
To action
Regular vertical lines
1. Check connection (CTRL B/D, X B/D) 2. Check CTRL B/D 3. Replace CTRL B/D
Vertical lines or Bar
1. Check connection (CTRL B/D, X B/D) 2. Check CTRL B/D 3. Replace CTRL B/D
Many irregular vertical lines
1. Check connection (CTRL B/D, X B/D) 2. Check CTRL B/D 3. Replace CTRL B/D
Horizontal Line or Bar
1. Check connection (Y-Sus B/D ↔Panel) 2. Check Y-Sus B/D 3. Replace Y-Sus B/D
A19 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem Connector Type on PDP Module
COF Type
TCP Type
96 Out Put
192 Out Put
1. Check foreign & Connection status 2. Check bad soldering on Chip resistance
TCP (Tape Carrier Package) is film for IC connect with Electrode pattern (Direct Bonding) on X B/D
Making
- 6-2
2010. 11. 16
A20
Revision FFC Type
Connector to connect between Electrode PAD Of PANEL and Y Drive B/D,Z-Sus B/D
▣ Defect symptom
A20 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Symptom
A. Picture Problem
Making
RF Signal level Checking method
Revision
2010. 11. 16
- 6-2 A21
◆ MENU Æ Press Red Button on R/C Æ Singal TEST -> Diagnostics 1. Check whether Signal Strength, Signal Quality is over 50% or not. 2. If Signal Strength, Signal Quality is under 50%,install the Booster to increase signal level.
A21 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Symptom
B. Power Problem
Making
Check voltage on Power board
Revision
2010. 11. 16
- 6-2 A22
P813
Pin Map Power B/D↔Main B/D
Checking Checking Order Order
No.
Checking Point
Spec
1
STBY
5V
2 3 4 5 6
5V 17V AC DET RL_ON M_ON
5V 17V High(3.3V~5V) High(3.3V~5V) High(3.3V~5V)
Remark
A22 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
B. Power Problem
Making
Power board Checking Method
Revision
Symptom
P811
- 6-2
2010. 11. 16
A23
Power B/D↔ Y-Sus B/D(P811) ◆ Check 5V,Va,Vs voltage
Vs adjust Va adjust
PIN 1 2 3 4 5 6 7
NAME VS VS NC GND GND VA M5V
: For Voltage specification, refer to the PDP Module Label.
SC101 P813
Va Voltage ADJ
◆ Adjust Va,Vs voltage.
▣ Checking Method - value
① Check soldering status on each major component. ② Check there is problem on major component or not by eye. (CONDENSER, FET, IC, Resistor)
+ value
Vs Voltage ADJ
③ Check FUSE. ④ Check 5V,Va,Vs voltage
Adjust way
※ PSU Maker: 1) LGIT 2) LITEON 3) YUYANG ※ If happen Power board Protection, check whether there is Short or Open on Y-SUS, Z-SUS B/D or not. A23 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Symptom
B. Power Problem
Making
Check Power off History
Revision
2010. 11. 16
- 6-2 A24
▣ Check Power off History by using SVC Remote controller Press “In-start” →Press” 0000” → Select “Power Off History” → Pop up Module Rom ver.
LAST HISTORY 1~5
Appear Power off history 5ea. (1 is the latest history)
RCU OFF
Power off by Remote control
KEY OFF
Mechanical power switch off
2HOUR OFF
After turn on by OnTimer, There is no operation for 2hours
NO SIGNAL OFF
In case that there is no signal for 15minutes
A24 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data
PDP TV
Symptom
C. Sound Problem
Making
Speaker cable checking method
Revision
2010. 11. 16
- 6-2 A25
Jack for Speaker connection
Speaker
1.Check whether speaker jack was inserted properly on Main B/D side & speaker side or not. 2. Check whether speaker cable have problem (disconnection wire) or not.
A25 Copyright Š 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data D. General function defect
PDP TV
Symptom
Check Remote control IR operation
Making
2010. 11. 16
Revision
- 6-2 A26
IR GND KEY1 KEY2 LED-RED GND SCL SDA GND 3.3V ST NC NC TOUCH_VER_CHK NC NC
IR Board
▣ Checking method 1.Check connector was inserted properly on Main board and IR board. 2. Check +3.3V_ST Voltage at Pin10 3. Check whether appear voltage on multi meter when operate remote control. ※ Test Condition for case 3 → Check Point: Pin 1( IR) → TV: power on status → Multi meter: Select DC 10V
IR & Local key Board for 2/3/4/550 TOOL A26 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data D. General function defect
PDP TV
Symptom
Making
Check Local Key operation
2010. 11. 16
- 6-2 A27
IR GND KEY1 KEY2 LED-RED GND SCL SDA GND 3.3V ST NC NC TOUCH_VER_CHK NC NC
P+
P-
Vol+
Vol-
OK
Menu
Input
Power
1.Check connector was inserted properly on Main board and IR board. 2. Check whether appear voltage on multi meter when operate Local switch. ※ Test Condition for case 3 → Check Point: Pin 2,3( Key1,Key2) → TV: power on status → Multi meter: Select DC 10V
IR & Local key Board for 2/3/4/550 TOOL
A27 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Repair Process-Reference data D. General function defect
PDP TV
Symptom
Making
Check RF emitter operation
- 6-2
2010. 11. 16
A28
+3.3V GND 3D_RF_RXD 3D_RF_TXD 3D_RFMODULE_RESET 3D_RFMODULE_DC 3D_RFMODULE_DD GND 3D_RF_GPIO0 3D_RF_GPIO1 3D_RF_GPIO2 3D_L/R_SYNC
1.Check connector was inserted properly on Main board and RF emitter board. 2. Check whether appear voltage on multi meter when operate RF emitter board. ※ Test Condition for case 3 → Check Point: Pin 12 → TV: power on status → Multi meter: Select DC 10V
RF emitter Board A28 Copyright © 2011 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only