Manual de serviço tv lg led 22lv2500 da chassis lt01s

Page 1

Internal Use Only North/Latin America Europe/Africa Asia/Oceania

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LED LCD TV SERVICE MANUAL CHASSIS : LT01S

MODEL : 22LV2500

22LV2500-DA

CAUTION BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL67140401 (1103-REV00)

Printed in Korea


CONTENTS

CONTENTS .............................................................................................. 2 PRODUCT SAFETY ..................................................................................3 SPECIFICATION ........................................................................................6 ADJUSTMENT INSTRUCTION ...............................................................10 EXPLODED VIEW .................................................................................. 17 SVC. SHEET ...............................................................................................

Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only


SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet.

General Guidance An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB.

Do not use a line Isolation Transformer during this check. Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.

Leakage Current Hot Check circuit Keep wires away from high voltage or high temperature parts.

AC Volt-meter

Before returning the receiver to the customer, always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.

Leakage Current Cold Check(Antenna Cold Check) With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1MΩ and 5.2MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.

Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

-3-

To Instrument’s exposed METALLIC PARTS

0.15uF

Good Earth Ground such as WATER PIPE, CONDUIT etc.

1.5 Kohm/10W

When 25A is impressed between Earth and 2nd Ground for 1 second, Resistance must be less than 0.1 Ω *Base on Adjustment standard

LGE Internal Use Only


SERVICING PRECAUTIONS CAUTION: Before servicing receivers covered by this service manual and its supplements and addenda, read and follow the SAFETY PRECAUTIONS on page 3 of this publication. NOTE: If unforeseen circumstances create conflict between the following servicing precautions and any of the safety precautions on page 3 of this publication, always follow the safety precautions. Remember: Safety First. General Servicing Precautions 1. Always unplug the receiver AC power cord from the AC power source before; a. Removing or reinstalling any component, circuit board module or any other receiver assembly. b. Disconnecting or reconnecting any receiver electrical plug or other electrical connection. c. Connecting a test substitute in parallel with an electrolytic capacitor in the receiver. CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard. 2. Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device (DVM, FETVOM, etc) equipped with a suitable high voltage probe. Do not test high voltage by "drawing an arc". 3. Do not spray chemicals on or near this receiver or any of its assemblies. 4. Unless specified otherwise in this service manual, clean electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable non-abrasive applicator; 10% (by volume) Acetone and 90% (by volume) isopropyl alcohol (90%-99% strength) CAUTION: This is a flammable mixture. Unless specified otherwise in this service manual, lubrication of contacts in not required. 5. Do not defeat any plug/socket B+ voltage interlocks with which receivers covered by this service manual might be equipped. 6. Do not apply AC power to this instrument and/or any of its electrical assemblies unless all solid-state device heat sinks are correctly installed. 7. Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead. Always remove the test receiver ground lead last. 8. Use with this receiver only the test fixtures specified in this service manual. CAUTION: Do not connect the test fixture ground strap to any heat sink in this receiver. Electrostatically Sensitive (ES) Devices Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field-effect transistors and semiconductor "chip" components. The following techniques should be used to help reduce the incidence of component damage caused by static by static electricity. 1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

unit under test. 2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly. 3. Use only a grounded-tip soldering iron to solder or unsolder ES devices. 4. Use only an anti-static type solder removal device. Some solder removal devices not classified as "anti-static" can generate electrical charges sufficient to damage ES devices. 5. Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ES devices. 6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive material). 7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions. 8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ES device.) General Soldering Guidelines 1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500°F to 600°F. 2. Use an appropriate gauge of RMA resin-core solder composed of 60 parts tin/40 parts lead. 3. Keep the soldering iron tip clean and well tinned. 4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25cm) brush with a metal handle. Do not use freon-propelled spray-on cleaners. 5. Use the following unsoldering technique a. Allow the soldering iron tip to reach normal temperature. (500°F to 600°F) b. Heat the component lead until the solder melts. c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid. CAUTION: Work quickly to avoid overheating the circuit board printed foil. 6. Use the following soldering technique. a. Allow the soldering iron tip to reach a normal temperature (500°F to 600°F) b. First, hold the soldering iron tip and solder the strand against the component lead until the solder melts. c. Quickly move the soldering iron tip to the junction of the component lead and the printed circuit foil, and hold it there only until the solder flows onto and around both the component lead and the foil. CAUTION: Work quickly to avoid overheating the circuit board printed foil. d. Closely inspect the solder area and remove any excess or splashed solder with a small wire-bristle brush.

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LGE Internal Use Only


IC Remove/Replacement Some chassis circuit boards have slotted holes (oblong) through which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique as outlined in paragraphs 5 and 6 above. Removal 1. Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts. 2. Draw away the melted solder with an anti-static suction-type solder removal device (or with solder braid) before removing the IC. Replacement 1. Carefully insert the replacement IC in the circuit board. 2. Carefully bend each IC lead against the circuit foil pad and solder it. 3. Clean the soldered areas with a small wire-bristle brush. (It is not necessary to reapply acrylic coating to the areas). "Small-Signal" Discrete Transistor Removal/Replacement 1. Remove the defective transistor by clipping its leads as close as possible to the component body. 2. Bend into a "U" shape the end of each of three leads remaining on the circuit board. 3. Bend into a "U" shape the replacement transistor leads. 4. Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the "U" with long nose pliers to insure metal to metal contact then solder each connection. Power Output, Transistor Device Removal/Replacement 1. Heat and remove all solder from around the transistor leads. 2. Remove the heat sink mounting screw (if so equipped). 3. Carefully remove the transistor from the heat sink of the circuit board. 4. Insert new transistor in the circuit board. 5. Solder each transistor lead, and clip off excess lead. 6. Replace heat sink.

Circuit Board Foil Repair Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or "lift-off" the board. The following guidelines and procedures should be followed whenever this condition is encountered. At IC Connections To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board. (Use this technique only on IC connections). 1. Carefully remove the damaged copper pattern with a sharp knife. (Remove only as much copper as absolutely necessary). 2. carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern. 3. Bend a small "U" in one end of a small gauge jumper wire and carefully crimp it around the IC pin. Solder the IC connection. 4. Route the jumper wire along the path of the out-away copper pattern and let it overlap the previously scraped end of the good copper pattern. Solder the overlapped area and clip off any excess jumper wire. At Other Connections Use the following technique to repair the defective copper pattern at connections other than IC Pins. This technique involves the installation of a jumper wire on the component side of the circuit board. 1. Remove the defective copper pattern with a sharp knife. Remove at least 1/4 inch of copper, to ensure that a hazardous condition will not exist if the jumper wire opens. 2. Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly connected to the affected copper pattern. 3. Connect insulated 20-gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side. Carefully crimp and solder the connections. CAUTION: Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges.

Diode Removal/Replacement 1. Remove defective diode by clipping its leads as close as possible to diode body. 2. Bend the two remaining leads perpendicular y to the circuit board. 3. Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board. 4. Securely crimp each connection and solder it. 5. Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder. Fuse and Conventional Resistor Removal/Replacement 1. Clip each fuse or resistor lead at top of the circuit board hollow stake. 2. Securely crimp the leads of replacement component around notch at stake top. 3. Solder the connections. CAUTION: Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures. Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only


SPECIFICATION NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range

3. Test method

This specification is applied to LED LCD TV used LT01S chassis.

1) Performance: LGE TV test method followed 2) Demanded other specification - Safety: CE / ICE / BSMI specification EMI: CE / ICE / BSMI

2. Requirement for Test Each part is tested as below without special appointment. 1) Temperature : 25 ºC ± 5 ºC 2) Relative Humidity : 65 ± 10 % 3) Power Voltage : Standard input voltage (100-240V~50/60Hz) * Standard Voltage of each products is marked by models. 4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. 5) The receiver must be operated for about 20 minutes prior to the adjustment.

4. Electrical Spec. No.

Item

Specification

1

Display Screen Device

19, 22 inch

2

Aspect Ratio

16:9

3

LCD Module

19 inch TFT LCD Module

Remark

22 inch TFT LCD Module 4

Storage Environment

Temp. : -20 deg ~ 60 deg Humidity : 0 ~ 85 %

5

Operating Environment

Temp. : 0 deg ~ 40 deg

6

Input Voltage

AC 100-240 V~ 50 / 60 Hz

7

Power Consumption

Humidity : 0 ~ 85 %

7

LCD Module(LGD)

22”

30.7W

FHD

19”

27.4W

HD

19”(AUO)

430.4 X 254.6 X 9.9

mm

22”(CMI)

495.6 X 292.2 X 11.5

mm

22”(AUO)

495.6 X 292.2 X 10.3

mm

Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

-6-

LGE Internal Use Only


5. LCD Module 5.1. 22” LCD Module (CMI) V215HGE-L10 No. 1.

Item Viewing Angle<CR>10>

Specification Right/Left/Up/Down

Min.

Luminance (cd/m2) 2.

Luminance

3.

Contrast Ratio

700

1000

WY

Typ

0.329

Typ

Xr

- 0.03

0.641

+0.03

-

CIE Color Coordinates

WX

Remark CR > 10

250

CR

RED 4.

Max.

200

Variation White

Typ.

75/75/70/70 85/85/80/80

1.3 All white/ All black

0.313

Yr

0.338

Green

Xg

0.315

Yg

0.629

Blue

Xb

0.159

Yb

0.059

5.2. 22” LCD Module (AUO) M215HW01-VB No. 1.

Item Viewing Angle<CR>10>

Specification Right/Left/Up/Down

Min.

Luminance (cd/m2) 2.

200

Contrast Ratio

Remark CR > 10

250 -

CR White

4.

Max.

Luminance Variation

3.

Typ.

75/75/70/70 85/85/80/80

600 WX

1.3

1000

All white/ All black

0.313

WY

Typ

0.329

Typ

RED

Xr

- 0.03

0.635

+0.03

Yr

0.349

Green

Xg

0.332

Yg

0.619

Blue

Xb

0.155

Yb

0.055

CIE Color Coordinates

Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

-7-

LGE Internal Use Only


5.3. 19� LCD Module (AUO) M185XW01-VD No. 1.

Item

Specification

Viewing Angle<CR>10>

Right/Left/Up/Down

Min.

Luminance (cd/m2) 2.

Typ.

200

250

Contrast Ratio

-

CR

600

White

4.

Remark CR > 10

Luminance Variation

3.

Max.

75/75/70/70 85/85/80/80

1.3

1000

WX

All white/ All black

0.313

WY

Typ

0.329

Typ

RED

Xr

- 0.03

0.634

+0.03

Yr

0.351

Green

Xg

0.334

Yg

0.605

Blue

Xb

0.146

Yb

0.059

CIE Color Coordinates

7. Component Video Input (Y, CB/PB, CR/PR) Specification

No Resolution

Remark

H-freq(kHz)

V-freq(Hz)

1.

720x480

15.73

60.00

SDTV,DVD 480i

2.

720x480

15.63

59.94

SDTV,DVD 480i

3.

720x480

31.47

59.94

480p

4.

720x480

31.50

60.00

480p

5.

720x576

15.625

50.00

SDTV,DVD 625 Line

6.

720x576

31.25

50.00

HDTV 576p

7.

1280x720

37.50

50.00

HDTV 720p

8.

1280x720

44.96

59.94

HDTV 720p

9.

1280x720

45.00

60.00

HDTV 720p

10.

1920x1080

28.125

50.00

HDTV 1080i

11.

1920x1080

33.75

60.00

HDTV 1080i

12.

1920x1080

33.72

59.94

HDTV 1080i

13.

1920x1080

56.250

50

HDTV 1080p

14.

1920x1080

67.43/67.5

59.94/60

HDTV 1080p

8. RGB (PC) Specification

No Resolution

Proposed

H-freq(kHz)

V-freq(Hz)

Pixel Clock(MHz)

1.

720*400

31.468

70.08

28.321

2.

640*480

31.469

59.94

25.17

3.

800*600

37.879

60.31

40.00

VESA

4.

1024*768

48.363

60.00

65.00

VESA(XGA)

Remark For only DOS mode

VESA

Input 848*480 60Hz, 852*480 60Hz -> 640*480 60Hz Display

5.

1280*768

47.78

59.87

79.5

WXGA

6.

1360*768

47.72

59.8

84.75

WXGA

7.

1280*1024

63.595

60.0

108.875

SXGA

FHD model

8.

1920*1080

66.587

59.93

138.625

WUXGA

FHD model

Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

-8-

LGE Internal Use Only


9. HDMI Input (PC/DTV) 9.1. DTV Mode No

Resolution

H-freq(kHz)

V-freq.(Hz)

Pixel clock(MHz)

Proposed

1.

720*480

31.469 /31.5

59.94 / 60

27.00/27.03

SDTV 480P

2.

720*576

31.25

50

54

SDTV 576P

3.

1280*720

37.500

50

74.25

HDTV 720P

4.

1280*720

44.96 / 45

59.94 / 60

74.17/ 74.25

HDTV 720P

5.

1920*1080

33.72 / 33.75

59.94 / 60

74.17/ 74.25

HDTV 1080I

6.

1920*1080

28.125

50.00

74.25

HDTV 1080I

7.

1920*1080

26.97 / 27

23.97 / 24

74.17/ 74.25

HDTV 1080P

8.

1920*1080

33.716 / 33.75

29.976 / 30.00

74.25

HDTV 1080P

9.

1920*1080

56.250

50

148.5

HDTV 1080P

10.

1920*1080

67.43 / 67.5

59.94 / 60

148.35/148.50

HDTV 1080P

Remark

9.2. PC Mode No

Resolution

H-freq(kHz)

V-freq.(Hz) 70.08

Pixel clock(MHz)

Proposed

28.321

Remark

1.

720*400

31.468

HDCP

2.

640*480

31.469

59.94

25.17

VESA

HDCP

3.

800*600

37.879

60.31

40.00

VESA

HDCP

4.

1024*768

48.363

60.00

65.00

VESA(XGA)

HDCP

5.

1360*768

47.72

59.8

84.75

WXGA

HDCP

6.

1280*1024

63.981

60.02

108.00

SXGA

HDCP / FHD Model

7.

1920*1080

67.5

60

148.5

WUXGA

HDCP / FHD Model

Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

-9-

LGE Internal Use Only


ADJUSTMENT INSTRUCTION 1. Application Range

3. Main PCB check process

This specification sheet is applied to all of the LCD TV with LT01T/U/S chassis.

* APC - After Manual-Insert, executing APC

* Boot file Download

2. Designation 1) The adjustment is according to the order which is designated and which must be followed, according to the plan which can be changed only on agreeing. 2) Power Adjustment: Free Voltage 3) Magnetic Field Condition: Nil. 4) Input signal Unit: Product Specification Standard 5) Reserve after operation: Above 5 Minutes (Heat Run) Temperature : at 25±5ºC Relative humidity : 65±10% Input voltage : 220V, 60Hz The receiver must be operated for about 5 minutes prior to the adjustment when module is in the circumstance of over 15°C In case of keeping module is in the circumstance of 0°C, it should be placed in the circumstance of above 15°C for 2 hours In case of keeping module is in the circumstance of below -20°C, it should be placed in the circumstance of above 15°C for 3 hours,.

(1) Execute ISP program “Mstar ISP Utility” and then click “Config” tab. (2) Set as below, and then click “Auto Detect” and check “OK” message. If “Error” is displayed, Check connection between computer, jig, and set.. (3) Click “Read” tab, and then load download file (XXXX.bin) by clicking “Read”. (4) filexxx.bin

(4) Click “Connect” tab. If “Can’t” is displayed, check connection between computer, jig, and set.

(1)

(3)

Caution) When still image is displayed for a period of 20 minutes or longer, there can some afterimage in the black level area. 6) Adjustment equipments : Color Analyzer (CA-210 or CA110), DDC Adjustment Jig equipment, SVC remote controller. 7) Push The “IN STOP KEY” - For memory initialization. Case1 : Software version up 1. After downloading S/W by USB, TV set will reboot automatically 2. Push “In-stop” key 3. Push “Power on” key 4. Function inspection 5. After function inspection, Push “I n-stop” key. Case2 : Function check at the assembly line 1. When TV set is entering on the assembly line, Push “In-stop” key at first. 2. Push “Power on” key for turning it on. -> If you push “Power on” key, TV set will recover channel information by itself. 3. After function inspection, Push “In-stop” key.

(2)

OK

Please Check the Speed : To use speed between from 200KHz to 400KHz

(5) Click “Auto” tab and set as below (6) Click “Run”. (7) After downloading, check “OK” message.

(5) filexxx.bin (6)

(8) ……….OK

(7)

Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

- 10 -

LGE Internal Use Only


* USB DOWNLOAD(*.epk file download) (1) Put the USB Stick to the USB socket. (2) Automatically detecting update file in USB Stick. - If your downloaded program version in USB Stick is Low, it didn’t work. But your downloaded version is High, USB data is automatically detecting (3) Show the message “Copying files from memory”

i TV Software Upgrade Copying files from memory Do not remove the memory card from the pc Do not plug off!

(4) Updating is staring.

32LV3400-DA_LGD 32LV2500-DA_CMI 32LV2500-DA_LGD 32LV2500-DA_AUO 26LV2500-DA_LGD 42LK450-DA_LGD 37LK450-DA_LGD 32LK450-DA_AUO 32LK450-DA_LGD 32LK330-DB_IPS 32LK330-DB_LGD 26LK330-DB_AUO 22LK330-DB_CMI 22LV2500-DA_AUO 22LV2500-DA_CMI 19LV2500-DA_AUO

18400 18212 18208 18216 14112 26240 22144 18056 18048 18000 17984 13896 9796 10024 10020 5928

9226 19478 19478 19478 8714 18966 18966 18966 18966 18966 18966 18966 18966 8714 8714 8714

53289 55337 55337 55337 55337 55305 55305 55305 55305 51209 51209 51209 51209 55337 55337 55337

26904 26904 26904 26904 26904 26904 26904 26904 26904 26904 26904 26904 26904 26904 26904 26904

288 352 288 352 288 258 258 290 290 290 290 290 256 288 288 288

4. Completed selecting Tool option.

3.1. ADC Process

i TV Software Upgrade

(1) ADC • Enter Service Mode by pushing “ ADJ” key • Enter Internal ADC mode by pushing “G” key at “6. ADC Calibration”

Upgrading... 63% Do not plug off!

i TV Software Upgrade Upgrading COMPLETED 100% The TV will restart after seconds.

(5) After updating is complete, The TV will restart automatically. (6) If TV turns on, check your updated version and Tool option. (refer to the next page about tool option) * If downloading version is higher than your TV have, TV can lost all channel data. In this case, you have to channel recover. If all channel data is cleared, you didn’t have a DTV/ATV test on production line.

* Caution: Using ‘power on’ button of the Adj. R/C, power on TV. * ADC Calibration Protocol (RS232)

* After downloading, have to adjust Tool Option again. 1. Push "IN-START" key in service remote controller. 2. Select "Tool Option 1" and Push “OK” button. 3. Punch in the number. (Each model has their number.) Model Tool option1 Tool option2 Tool option3 Tool option4 Tool option5 47LW4500-DA_LGD 34720 19466 55337 27032 8448 42LW4500-DA_LGD 26528 19466 55337 27032 8448 47LV4500-DA_LGD 34688 19478 55337 26904 8448 42LV4500-DA_LGD 26496 19478 55337 26904 8448 47LV3500-DA_LGD 34656 19478 55337 26904 256 42LV3500-DA_CMI 26468 19478 55337 26904 352 42LV3500-DA_AUO 26472 19478 55337 26904 352 42LV3500-DA_LGD 26464 19478 55337 26904 288 37LV3500-DA_LGD 22368 19478 55337 26904 288 37LV3500-DA_AUO 22376 19478 55337 26904 352 32LV3500-DA_LGD 18272 19478 55337 26904 288 32LV3500-DA_AUO 18280 19478 55337 26904 352 42LV3400-DA_LGD 26592 9226 53289 26904 288 Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

No.

Item

CMD1

CMD2

1

Enter Adjust Mode

A

A

Data0 0

0

2

ADC Adjust

A

D

0

0

- Adjust Sequence • aa 00 00 [Enter Adjust Mode] • xb 00 40 [Component1 Input (480i)] • ad 00 10 [Adjust 480i Comp1] • xb 00 60 [RGB Input (1024x768)] • ad 00 10 [Adjust 1024x768 RGB] • aa 00 90 [End Adjust Mode] * Required equipment : Adjustment R/C

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LGE Internal Use Only


4.1.2. Auto-control interface and directions

3.2. Function Check

1) Adjust in the place where the influx of light like floodlight around is blocked. (illumination is less than 10ux). 2) Adhere closely the Color Analyzer (CA210) to the module less than 10cm distance, keep it with the surface of the Module and Color Analyzer’s Prove vertically.(80~100°). 3) Aging time - After aging start, keep the power on (no suspension of power supply) and heat-run over 15minutes. - Using ‘no signal’ or ‘full white pattern’ or the others, check the back light on.

(1) Check display and sound - Check Input and Signal items. (cf. work instructions) 1) TV 2) AV (CVBS) 3) COMPONENT (480i) 4) RGB (PC : 1024 x 768 @ 60hz) 5) HDMI 6) PC Audio In * Display and sound check is executed by remote control. * Caution :Not to push the INSTOP KEY after completion if the function inspection.

4.1.3. Auto adjustment Map (RS-232C) RS-232C COMMAND [ CMD ID DATA ] Wb 00 00 White Balance Start Wb 00 ff White Balance End

4. Total Assembly line process 4.1. Adjustment Preparation · W/B Equipment condition CA210 : CH 9, Test signal : Inner pattern (85IRE) · Above 5 minutes H/run in the inner pattern. (“power on” key of adjust remote control) Cool

13,000k

Medium 9,300k Warm

6,500k

ºK ºK ºK

X=0.269(±0.002)

All

Y=0.273(±0.002)

<Test Signal>

X=0.285(±0.002)

Inner pattern

Y=0.293(±0.002)

(216gray,85IRE)

X=0.313(±0.002) Y=0.329(±0.002)

Cool

9,300k

ºK

Medium 8,000k

ºK

Warm

6,500k

ºK

X=0.285(±0.002)

Only 22LD350

Y=0.293(±0.002)

<Test Signal>

X=0.295(±0.002)

Inner pattern

Y=0.305(±0.002)

(216gray,85IRE)

RS-232C COMMAND MIN

CENTER

[CMD ID DATA]

MAX

(DEFAULT)

Cool

Mid

Warm

R Gain

jg

Ja

jd

G Gain

jh

Jb

je

00

172

B Gain

ji

Jc

jf

00

192

00

Cool

Mid

Warm

172

192

192

255

192

192

255

192

172

255

R Cut

64

64

64

128

G Cut

64

64

64

128

B Cut

64

64

64

128

** Caution ** Color Temperature : COOL, Medium, Warm. One of R Gain/G Gain/ B Gain should be kept on 0xC0, and adjust other two lower than C0. (when R/G/B Gain are all C0, it is the FULL Dynamic Range of Module) *Manual W/B process using adjusts Remote control. •After enter Service Mode by pushing “ADJ” key, •Enter White Balance by pushing “G” key at “7. White Balance”.

X=0.313(±0.002) Y=0.329(±0.002)

4.1.1. Connecting picture of the measuring instrument (On Automatic control) Inside PATTERN is used when W/B is controlled. Connect to auto controller or push Adjustment R/C POWER ON -> Enter the mode of White-Balance, the pattern will come out

Full White Pattern

CA-210 COLOR ANALYZER TYPE: CA-210

RS-232C Communication

# After You finish all adjustments, Press “In-start” button and compare Tool option and Area option value with its BOM, if it is correctly same then unplug the AC cable. If it is not same, then correct it same with BOM and unplug AC cable. For correct it to the model’s module from factory JIG model. # Push The “IN STOP KEY” after completing the function inspection. And Mechanical Power Switch must be set “ON”.

Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

- 12 -

LGE Internal Use Only


- Manual Download

4.2. DDC EDID Write (RGB 128Byte ) · Connect D-sub Signal Cable to D-Sub Jack. · Write EDID DATA to EEPROM (24C02) by using DDC2B protocol. · Check whether written EDID data is correct or not. * For SVC main Ass’y, EDID have to be downloaded to Insert Process in advance.

4.3 DDC EDID Write (HDMI 256Byte) · Connect HDMI Signal Cable to HDMI Jack. · Write EDID DATA to EEPROM(24C02) by using DDC2B protocol. · Check whether written EDID data is correct or not. * For SVC main Ass’y, EDID have to be downloaded to Insert Process in advance.

* Caution 1) Use the proper signal cable for EDID Download - Analog EDID : Pin3 exists - Digital EDID : Pin3 exists 2) Nerver connect HDMI & D-sub Cable at the same time. 3) Use the proper cables below for EDID Writing. 4) Download HDMI1, HDMI2 separately because each data is different. For Analog EDID

For HDMI EDID

D-sub to D-sub

DVI-D to HDMI or HDMI to HDMI

4.4 EDID DATA 1) All Data : HEXA Value 2) Changeable Data : *: Serial No : Controlled / Data:01 **: Month : Controlled / Data:00 ***:Year : Controlled ****:Check sum

Item

- Auto Download · After enter Service Mode by Pushing “ADJ” key · Enter EDID D/L mode. · Enter “START’ by pushing “OK” key. HDMI number is dependent on model.

Condition

Data(Hex)

Manufacturer ID

GSM

1E6D

Version

Digital : 1

01

Revision

Digital : 3

03

(1) FHD RGB EDID Data (CS : 1C)

(2) FHD HDMI 1 EDID Data (CS : E299)

Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

- 13 -

LGE Internal Use Only


(3) FHD HDMI 2 EDID Data (CS : E289)

(8) HD HDMI 3 EDID Data (CS : B445)

(4) FHD HDMI 3 EDID Data (CS : E279)

(9) ASCII Code

(5) HD RGB EDID Data (CS : CD)

4.5. Outgoing condition Configuration - When pressing IN-STOP key by SVC remocon, Red LED are blinked alternatively. And then Automatically turn off. (Must not AC power OFF during blinking) (6) HD HDMI 1 EDID Data (CS : B465)

4.6 GND & Hi-pot test Confirm whether is normal or not when between power board's ac block and GND is impacted on 1.5kV(dc) or 2.2kV(dc) for one second. • GND TEST = POWER CORD GND and SIGNAL CABLE GND • Hi-pot TEST = POWER CORD GND and LIVE&NUETRAL • Test Process 1. Check the POWER CABLE and SIGNAL CABLE insertion condition. 2. Connect the AV JACK Tester 3. Controller(GWS103-4) on 4. GND TEST(Auto) - If Test is failed, Buzzer operate - If Test is passed, execute next process(HI-pot test) - Remove A/V CORD from A/V JACK BOX 5. HI-POT test(Auto) - If Test is failed, Buzzer operate - If Test is passed, GOOD Lamp on and move to next process automatically.

(7) HD HDMI 2 EDID Data (CS : B455)

Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

- 14 -

LGE Internal Use Only


EXPLODED VIEW IMPORTANT SAFETY NOTICE

410

A21

300

A2

310

510

A5

A31

511

A10

120

200

820

810

540

900

521 LV1

910

400

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes

- 15 -

LGE Internal Use Only


IC102 NAND01GW3B2CN6E

NAND FLASH MEMORY

S7M-PLUS_DivX_MS10

+3.3V_Normal

+3.3V_Normal

LGE107DC-RP [S7M+ DIVX/MS10]

C101 0.1uF

+3.3V_Normal

VDD_1 VSS_1 NC_9

R105 1K

NC_10

OPT

CL OPT R104 10K

/PF_CE1 AL PF_ALE W /PF_WE WP

Q101 KRC103S OPT

3.3K

R102

NC_11

R106 1K

C B

/PF_WP

NC_12 NC_13

E

NC_14 NC_15

42

8

41

9

40

10

39

11

37

13

36

14

35

15

34

16

33

17

32

18

31

19

30

20

29

21

28

22

27

23

26

24

U22

PCM_D[1]

T21 T22

I/O5

PCM_A[5]

PCM_D[3]

AB18

I/O4

PCM_A[4]

<T3 CHIP Config> (AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0)

22

PCM_A[0-14] MIPS_no_EJ_NOR8 MIPS_EJ1_NOR8 MIPS_EJ2_NOR8 B51_Secure_no scramble B51_Sesure_scramble

NC_24 C102 10uF

NC_23 VDD_2

: : : : :

4’h3 4’h4 4’h5 4’hb 4’hc

(MIPS (MIPS (MIPS (8051 (8051

as as as as as

host. host. host. host. host.

No EJ PAD. Byte mode NAND flash.) EJ use PAD1. Byte mode NAND flash.) EJ use PAD2. Byte mode NAND flash.) Internal SPI flash secure boot, no scramble) Internal SPI flash secure boot with scarmble)

NC_20

AR102 I/O2

PCM_A[2]

I/O1

PCM_A[1]

AUD_MASTER_CLK

R148

AC21

V21

PCM_A[2]

Y22

PCM_A[3]

AA22

PCM_A[4]

R22

PCM_A[5]

R21 T23

PCM_A[7]

T24

PCM_A[8]

AA23 AB17

PCM_A[11]

AA21

PCM_A[12]

U23

PCM_A[13]

Y23

PCM_A[14]

W23

Y20

NC_16

/PCM_WE /PCM_IORD

+5V_Normal

V22 W21 Y21

V23 P23

/PCM_CD

R23

EAN61857001 IC102-*2 K9F1G08U0D-SCB0

NC_1 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 R/B RE CE NC_7 NC_8 VCC_1 VSS_1 NC_9 NC_10 CLE ALE WE WP NC_11 NC_12 NC_13 NC_14 NC_15

48

1

47

2 3

46

4

45

5

44 43

6 7

42

8

41

9

40 39

10 11

38

12

37

13

36

14

35

15

34

16

33

17

32

18

31

19

30

20

29

21

28

22

27

23

26

24

25

NC_29 NC_2 NC_28 NC_3 NC_27 NC_4 NC_26 NC_5 I/O7 NC_6 I/O6 R/B I/O5 RE I/O4 CE NC_25 NC_7 NC_24 NC_8 NC_23 VCC_1 VCC_2 VSS_1 VSS_2 NC_9 NC_22 NC_10 NC_21 CLE NC_20 ALE I/O3 WE I/O2 WP I/O1 NC_11 I/O0 NC_12 NC_19 NC_13 NC_18 NC_14 NC_17 NC_15 NC_16

1

48

2

47

3

46

4

45

5

44

6

43

7

42

8

41

9

40

10

39

11

38

12

37

13

36

14

35

15

34

16

33

17

32 31

18 19

30

20

29

21

28

22

27

23

26

24

25

NC_29

NC_1

NC_28

NC_2

NC_27

NC_3

NC_26

NC_4

I/O7

NC_5

I/O6

NC_6

I/O5

RY/BY

I/O4

RE

NC_25

CE

NC_24

NC_7

NC_23

NC_8

VCC_2 VSS_2

VCC_1 VSS_1

NC_22

NC_9

NC_21

NC_10

NC_20

CLE

I/O3

ALE

I/O2

WE

I/O1

WP

I/O0

NC_11

NC_19

NC_12

NC_18

NC_13

NC_17

NC_14

NC_16

NC_15

1

48

2

47

3

46

4

45

5

44

6

43

7

42

8

41

9

40

10

39

11

38

12

37

13

36

14

35

15

34

16

33

17

32 31

18 19

30

20

29

21

28

22

27

23

26

24

25

I/O6 I/O5

RGB_DDC_SCL

VSS_2 NC_22

I/O2

NC_48

LVACLKP/LLV6P/BLUE[3]

NC_78

LVACLKN/LLV6N/BLUE[2]

NC_64

LVA0P/LLV3P/BLUE[9]

NC_50

LVA0N/LLV3N/BLUE[8]

NC_45

LVA1P/LLV4P/BLUE[7]

NC_34

LVA1N/LLV4N/BLUE[6]

NC_77

LVA2P/LLV5P/BLUE[5]

NC_65

LVA2N/LLV5N/BLUE[4]

NC_62

LVA3P/LLV7P/BLUE[1]

NC_33

LVA3N/LLV7N/BLUE[0]

NC_47

LVA4P/LLV8P

NC_46

LVA4N/LLV8N

NC_76

LVB0N/RLV6N/RED[0] LVB1P/RLV7P/GREEN[9] LVB1N/RLV7N/GREEN[8] LVB2P/RLV8P/GREEN[7]

NC_44

LVB2N/RLV8N/GREEN[6]

NC_61

LVB3P/LLV1P/GREEN[3]

NC_60

S7R_RM W26

AE1

W25

AF16

U26

AF1

U25

AE3

U24

AD14

V26

AD3

V25

AF15

V24

AF2

W24

AE15

Y26

AD2

Y25 Y24

AD16 AD15 AE16

NC_48

LVACLKP/LLV6P/BLUE[3]

NC_78

LVACLKN/LLV6N/BLUE[2]

NC_64

LVA0P/LLV3P/BLUE[9]

NC_50

LVA0N/LLV3N/BLUE[8]

NC_45

LVA1P/LLV4P/BLUE[7]

NC_34

LVA1N/LLV4N/BLUE[6]

NC_77

LVA2P/LLV5P/BLUE[5]

NC_65

LVA2N/LLV5N/BLUE[4]

NC_62

LVA3P/LLV7P/BLUE[1]

NC_33

LVA3N/LLV7N/BLUE[0]

NC_47

LVA4P/LLV8P

NC_46

LVA4N/LLV8N

LVB3N/LLV1N/GREEN[2]

NC_49

RLV0N/LHSYNC

RLV0P/LVSYNC

RLV2P/RED[9] NC_71

RLV1P/LDE

NC_40

RLV2N/RED[8] RLV4P/RED[5]

AE9

AF6

NC_56

RLV4N/RED[4]

NC_72

RLV5P/RED[3]

AD6 AD12 AE5

EEPROM_1MBIT_ATMEL

AF12 AF5 AE12

NC_74 NC_37 NC_43 NC_52 NC_75 NC_68 NC_59

AF7 AD11 AD7 AE7

IC103-*1 CAT24C08WI-GT3-H-RECV(TV)

AF10 AD8

TCON18/CS7/GCLK5 TCON19/CS8/GCLK6 TCON11/CS5/HCON TCON10/CS4/OPT_N TCON9/CS3/OPT_P TCON16/WPWM TCON12/DPM TCON1/STV/GSP/VST

AE10

AD10

AC24

AE14

AD26

AE13

NC_57

AE26

TCON5/TP/SOE

NC_70

TCON14/SACN_BLK

NC_41

TCON21/CS10/VGH_ODD

NC_54

TCON20/CS9/VGH_EVEN TCON13/LEDON

NC_39

TCON17/CS6/GCLK4

NC_49

RLV0N/LHSYNC

RLV0P/LVSYNC

AF23

RLV2P/RED[9] NC_71

RLV1P/LDE

NC_40

RLV2N/RED[8] RLV4P/RED[5]

AE9 AF9

AF22

NC_56

RLV4N/RED[4]

NC_72

RLV5P/RED[3]

NC_55

NC_29

NC_12

NC_21

Y11 Y19

GND_105

AD3 AF2 AE15 AD2

Y25 Y24

AD16 AD15 AE16

AE6 AF11

AE21

AD6

AF21

AD12

AE20

AE5 AF12

AF20

AF5

AF19

AE12

NC_74 NC_37 NC_43 NC_52 NC_75 NC_68

AF7

AB22

AD10

AD11

AB23

AE7

AC23

AF10

AC22

AD8

TCON15/SCAN_BLK1 TCON18/CS7/GCLK5 TCON19/CS8/GCLK6 TCON11/CS5/HCON TCON10/CS4/OPT_N TCON9/CS3/OPT_P TCON16/WPWM TCON12/DPM TCON1/STV/GSP/VST

AE10

AF18

NC_57

TCON5/TP/SOE

NC_70

TCON14/SACN_BLK

NC_41

TCON21/CS10/VGH_ODD

NC_54

TCON20/CS9/VGH_EVEN

NC_73

TCON13/LEDON

NC_39

TCON17/CS6/GCLK4

LVA2P/LLV5P/BLUE[5] LVA2N/LLV5N/BLUE[4] LVA3P/LLV7P/BLUE[1]

NC_33

LVA3N/LLV7N/BLUE[0]

NC_47

LVA4P/LLV8P

NC_46

LVA4N/LLV8N

NC_19

AB26

AD1

LVB1P/RLV7P/GREEN[9]

NC_76

LVB1N/RLV7N/GREEN[8]

NC_32

AB25 AB24

LVB0P/RLV6P/RED[1] LVB0N/RLV6N/RED[0]

NC_66

LVB2P/RLV8P/GREEN[7]

AD13

AC24

AE14

AD26

AE13

AD25

LVB2N/RLV8N/GREEN[6]

NC_44 NC_61

LVB3P/LLV1P/GREEN[3]

NC_60

LVB3N/LLV1N/GREEN[2] LVB4P/LLV0P/GREEN[1]

AD24

AC14

AE8

AA16

Y11

AA15

Y19

NC_31 NC_55

NC_29

NC_12

NC_21

GND_105

AA11

AF4 AD4

AF16 AF1 AE3

U24

AD14

V26

AD3

V25

AF15

V24

AF2

W24

AE15

Y26

AD2

Y25

AD16

Y24

AD15 AE16

AE26 AE25

RLV3P/RED[7] RLV3N/RED[6]

NC_49

RLV0N/LHSYNC

RLV0P/LVSYNC RLV1N/LCK

AF25 AE24

AF8

AF24

AD9

AF23 AD22

RLV2P/RED[9] NC_71

RLV1P/LDE

NC_40

RLV2N/RED[8] RLV4P/RED[5]

AE9 AF9

AF22

NC_56

RLV4N/RED[4]

NC_72

RLV5P/RED[3]

AE6 AF11

AE21

AD6

AF21

AD12 AE5 AF12

AF20

AF5

AF19

AE12

AF7

AB22

AD10

AD11

AB23

AE7

AC23

AF10

AC22

AD8

TCON15/SCAN_BLK1 TCON18/CS7/GCLK5

NC_74

TCON19/CS8/GCLK6

NC_37

TCON11/CS5/HCON

NC_43

TCON10/CS4/OPT_N

NC_52

TCON9/CS3/OPT_P

NC_75

TCON16/WPWM

NC_68

TCON12/DPM TCON1/STV/GSP/VST

NC_57

LVA1P/LLV4P/BLUE[7] LVA1N/LLV4N/BLUE[6] LVA2P/LLV5P/BLUE[5]

NC_77 NC_65

LVA2N/LLV5N/BLUE[4]

NC_62

LVA3P/LLV7P/BLUE[1]

NC_33

LVA3N/LLV7N/BLUE[0]

NC_47

LVA4P/LLV8P

NC_46

LVA4N/LLV8N

TCON5/TP/SOE

NC_70

TCON14/SACN_BLK

AD1

NC_41

TCON21/CS10/VGH_ODD

NC_54

TCON20/CS9/VGH_EVEN

NC_73

TCON13/LEDON

NC_39

TCON17/CS6/GCLK4

LVB0P/RLV6P/RED[1] LVB0N/RLV6N/RED[0]

NC_66

LVB1P/RLV7P/GREEN[9]

NC_76

LVB1N/RLV7N/GREEN[8]

NC_32

AC24

AE14

AD26

AE13

AD25

LVB2P/RLV8P/GREEN[7] LVB2N/RLV8N/GREEN[6]

NC_44 NC_61

LVB3P/LLV1P/GREEN[3]

NC_60

LVB3N/LLV1N/GREEN[2] LVB4P/LLV0P/GREEN[1]

AD24

AF4 AD4

NC_19

AE26 AE25

RLV3P/RED[7] RLV3N/RED[6]

NC_49

RLV0N/LHSYNC

RLV0P/LVSYNC

AE2

AF26

RLV1N/LCK

AF25 AE24

AF8

AF24

AD9

AF23 AD22

RLV2P/RED[9] NC_71

RLV1P/LDE

NC_40

RLV2N/RED[8] RLV4P/RED[5]

AE9

AE22

AF9

AF22

NC_56

RLV4N/RED[4]

NC_72

RLV5P/RED[3]

AE8

Y19

U24

AD14

V26

AD3

V25

AF15

V24

AF2

W24

AE15

Y26

AD2

Y25

AD16

Y24

AD15 AE16

NC_31 NC_55

NC_29

NC_12

NC_21

AE6 AF11

AA11

AE21

AD6

AF21

AD12

AD20

AE5

AE20

AF12

AF20

AF5

AF19

AE12

TCON15/SCAN_BLK1 TCON18/CS7/GCLK5

NC_74

TCON19/CS8/GCLK6

NC_37

TCON11/CS5/HCON

NC_43

TCON10/CS4/OPT_N

NC_52

TCON9/CS3/OPT_P

NC_75

TCON16/WPWM

NC_68

TCON12/DPM

NC_59

AD18 AE18

TCON1/STV/GSP/VST

AE10

AF18

AF7

AB22

AD10

AD11

AB23

AE7

AC23

AF10

AC22

AD8

NC_57

TCON5/TP/SOE

NC_70

TCON14/SACN_BLK

AB14

NC_24

AB26

NC_41

TCON21/CS10/VGH_ODD

NC_54

TCON20/CS9/VGH_EVEN

NC_73

TCON13/LEDON

NC_39

TCON17/CS6/GCLK4

NC_19

AC14

AE8

AA16

Y11

AA15

Y19

NC_31 NC_55

NC_29

NC_12

NC_21

3

6

4

5

VCC

AF16

AD14 AD3 AF15 AF2

EEPROM

AE15 AD2 AD16

NC_11

AA11

LVB1P/RLV7P/GREEN[9]

NC_76

LVB1N/RLV7N/GREEN[8] LVB2P/RLV8P/GREEN[7]

AC24

AE14

AD26

AE13

LVB2N/RLV8N/GREEN[6]

NC_44 NC_61

LVB3P/LLV1P/GREEN[3]

NC_60

LVB3N/LLV1N/GREEN[2] LVB4P/LLV0P/GREEN[1]

AD24

AE1

W25

AF16

U26

AF1

U25

AE3

U24

AF4 AD4

AD3 AF15

V24

AF2

W24

AE15

Y26

AD2

Y25

ACKP/RLV3P/RED[3]

FRC_DDR3_A1/DDR2_A6

ACKM/RLV3N/RED[2]

FRC_DDR3_A2/DDR2_A7

A0P/RLV0P/RED[9] A1P/RLV1P/RED[7] A1M/RLV1N/RED[6] A2M/RLV2N/RED[4] A3P/RLV4P/RED[1]

AE26 AE25

RLV3P/RED[7] RLV3N/RED[6]

NC_49

RLV0N/LHSYNC

RLV0P/LVSYNC

AE2

AF26

RLV1N/LCK

AF25 AE24

AF8

AF24

AD9

AF23 AD22

RLV2P/RED[9] NC_71

RLV1P/LDE

NC_40

RLV2N/RED[8] RLV4P/RED[5]

AE9

AE22

AF9

AF22

NC_56

RLV4N/RED[4]

NC_72

RLV5P/RED[3]

A4P/RLV5P/GREEN[9] A4M/RLV5N/GREEN[8]

FRC_DDR3_A1/DDR2_A6

ACKM/RLV3N/RED[2]

FRC_DDR3_A2/DDR2_A7

A0P/RLV0P/RED[9]

FRC_DDR3_A3/DDR2_A1

A0M/RLV0N/RED[8]

FRC_DDR3_A4/DDR2_CASZ

A1P/RLV1P/RED[7]

FRC_DDR3_A5/DDR2_A10

A1M/RLV1N/RED[6]

FRC_DDR3_A6/DDR2_A0 FRC_DDR3_A7/DDR2_A5 FRC_DDR3_A8/DDR2_A2 FRC_DDR3_A9/DDR2_A9 FRC_DDR3_A10/DDR2_A11 FRC_DDR3_A11/DDR2_A4

AD1

FRC_DDR3_BA1/DDR2_ODT FRC_DDR3_BA2/DDR2_A12

AE14 AE13

A2P/RLV2P/RED[5] A2M/RLV2N/RED[4] A3P/RLV4P/RED[1] A3M/RLV4N/RED[0] A4P/RLV5P/GREEN[9]

AE6 AF11

AE21

AD6

AF21

AD12

AD20

AE5

AE20

AF12

AF20

AF5

AF19

AE12

TCON15/SCAN_BLK1 TCON18/CS7/GCLK5

NC_74

TCON19/CS8/GCLK6

NC_37

TCON11/CS5/HCON

NC_43

TCON10/CS4/OPT_N

NC_52

TCON9/CS3/OPT_P

NC_75

TCON16/WPWM

NC_68

TCON12/DPM TCON1/STV/GSP/VST

AE10 AF7

AB22

AD10

AD11

AB23

AE7

AC23

AF10

AC22

AD8

AB26

B0P/RLV6P/GREEN[7] FRC_DDR3_BA0/DDR2_BA2 FRC_DDR3_BA1/DDR2_ODT

AD1

FRC_DDR3_BA2/DDR2_A12

AB25 AB24 AC24

AE14

AD26

AE13

NC_57

FRC_DDR3_MCLK/DDR2_MCLK

AD25

TCON5/TP/SOE

NC_70

TCON14/SACN_BLK

NC_41

TCON21/CS10/VGH_ODD

NC_54

TCON20/CS9/VGH_EVEN TCON13/LEDON

NC_39

TCON17/CS6/GCLK4

FRC_DDR3_MCLK/DDR2_MCLK

B3P/TCON11/BLUE[9] B3M/TCON10/BLUE[8]

B3P/TCON11/BLUE[9] B3M/TCON10/BLUE[8] B4P/TCON9/BLUE[7]

AF4 AD4

AD5

W25

AF16 AF1 AE3

U24

AD14

V26

AD3

V25

AF15

V24

AF2

W24

AE15

Y26 Y25 Y24

7

NC_19

C1M/LLV1N/BLUE[2] FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

C2M/LLV2N/BLUE[0] C3P/LLV4P

3

A0’h

6

FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

C4P/LLV5P

AD2 AD16 AD15 AE16

AC14

AE8

AA16

Y11

AA15

Y19

NC_31 NC_55

NC_29

NC_12

NC_21

AE26 AE25

C0P/LLV0P/BLUE[5]

AE2 FRC_DDR3_RESETB/DDR2_A3

AF26

AF6

AF8 AD9

C1M/LLV1N/BLUE[2]

AF23 AD22

FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

C2M/LLV2N/BLUE[0] C3P/LLV4P

AE9

AE22

AF9

AF22

FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

C4P/LLV5P

AF12

SCL

R111

22

AF5

I2C_SCL

I2C_SDA

AE12

AD11 AD7

5

AD10

SDA

R112 C104 8pF OPT

FRC_DDR3_DQL0/DDR2_DQ6

C106 8pF OPT

22

AE7

I2C_SDA

AF10 AD8

AB26

NC_11

AA11

AE6 AF11

K22

PWM2

G23 G22 G21

SC1/COMP1_DET

G20

ERROR_OUT

G19

MODEL_OPT_0

F20

PCM_A6

GPIO50/UART1_RX

PCM_A7

GPIO51/UART1_TX

PCM_A8

DC_MREMOTE

F19

GPIO6/PM0/INT0

PCM_A10

GPIO7/PM1/PM_UART_TX

PCM_A11

GPIO8/PM2

PCM_A12

GPIO9/PM3

PCM_A13

GPIO10/PM4

PCM_A14

GPIO11/PM5/PM_UART_RX/INT1 PM_SPI_CS1/GPIO12/PM6 PM_SPI_WP1/GPIO13/PM7 PM_SPI_WP2/GPIO14/PM8/INT2

PCM_OE_N

GPIO15/PM9

PCM_WE_N

PM_SPI_CS2/GPIO16/PM10

PCM_IORD_N

GPIO17/PM11/INT3

PCM_IOWR_N

GPIO18/PM12/INT4 PM_SPI_CK/GPIO1

PCM_IRQA_N

GPIO0/PM_SPI_CZ

PCM_CD_N

PM_SPI_DI/GPIO2

PCM_WAIT_N

PM_SPI_DO/GPIO3

USB1_CTL

E11

HP_DET

G9

CONTROL_ATTEN

F9

MODEL_OPT_6

C5 E8

3D SG

USB1_OCD

D7

33

MODEL_OPT_1

R146

E9 /FLASH_WP MODEL_OPT_2

F7 F6

TUNER_RESET

D8

DEMOD_RESET AV_CVBS_DET

G12 F10 D9

PCM_CE_N

3D SG

DD_MREMOTE E7

PCM_A9

TS0_CLK PCM_PF_CE0Z

TS0_VLD

PCM_PF_CE1Z

TS0_SYNC

PCM_PF_OEZ

33

R147

SPI_SCK

D11 E10 D10

33

R151

/SPI_CS SPI_SDI

for SERIAL FLASH

SPI_SDO

AA5

CI_TS_CLK CI_TS_VAL CI_TS_SYNC

AA10

CI_TS_DATA[0-7]

AB5

PCM_PF_WEZ

TS0_D0

PCM_PF_ALE

TS0_D1

PCM_PF_AD[15]

TS0_D2

PCM_PF_RBZ

TS0_D3 TS0_D5

UART_TX2/GPIO65

TS0_D6

UART_RX2/GPIO64

TS0_D7

DDCR_DA/GPIO71

TS1_CLK

DDCR_CK/GPIO72

TS1_VLD

from CI SLOT

CI_TS_DATA[0]

AC4

CI_TS_DATA[1]

Y6

CI_TS_DATA[2]

AA6

CI_TS_DATA[3]

W6

CI_TS_DATA[4]

AA7

CI_TS_DATA[5]

Y9

CI_TS_DATA[6]

AA8

CI_TS_DATA[7] FE_TS_CLK FE_TS_VAL_ERR FE_TS_SYNC

AC5 AC6

Internal demod out /External demod in

FE_TS_DATA[0-7]

AB6

TS1_SYNC DDCA_DA/UART0_TX TS1_D0 TS1_D2 PWM0/GPIO66

TS1_D3

PWM1/GPIO67

TS1_D4

PWM2/GPIO68

TS1_D5

PWM3/GPIO69

TS1_D6

PWM4/GPIO70

TS1_D7

C6 B6 C8 C7 A6

AC10

FE_TS_DATA[0]

AB10

FE_TS_DATA[1]

AC9

FE_TS_DATA[2]

AB9

FE_TS_DATA[3]

AC8

FE_TS_DATA[4]

AB8

FE_TS_DATA[5]

AC7

FE_TS_DATA[6]

AB7

FE_TS_DATA[7]

D12 SAR0/GPIO31

MPIF_CLK

SAR1/GPIO32

MPIF_CS_N

SAR2/GPIO33

D14 E14

SAR3/GPIO34

Delete /PIF_SPI_CS R160 1K

MPIF_BUSY

SAR4/GPIO35

S7MR_MS10 AE1 AF16 AF1 AE3

U24

AD14

V26

AD3

V25

AF15

V24

AF2

W24

AE15

Y26

AD2

Y25 Y24

AD16 AD15 AE16

E12

AE21

AD6

AF21

AD12

AD20

FRC_DDR3_DQL1/DDR2_DQ0

AE5

AE20

AF5 AE12

AD18 AE18

AF7

AB22

AD10

D0M/LLV6N D1P/LLV7P

AB23

AE7

AC23

AF10 AD8

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

FRC_DDR3_DQU1/DDR2_DQ14

D4M/TCON0

D3M/TCON2

AD11

AC22

D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

AE10

AF18

ACKM/RLV3N/RED[2] A0P/RLV0P/RED[9]

FRC_DDR3_A3/DDR2_A1

A0M/RLV0N/RED[8]

FRC_DDR3_A4/DDR2_CASZ

A1P/RLV1P/RED[7]

FRC_DDR3_A5/DDR2_A10

A1M/RLV1N/RED[6]

FRC_DDR3_A6/DDR2_A0

A2P/RLV2P/RED[5]

FRC_DDR3_A7/DDR2_A5

A2M/RLV2N/RED[4]

FRC_DDR3_A8/DDR2_A2

A3P/RLV4P/RED[1]

FRC_DDR3_A9/DDR2_A9

A3M/RLV4N/RED[0]

FRC_DDR3_A10/DDR2_A11

A4P/RLV5P/GREEN[9]

FRC_DDR3_A11/DDR2_A4

A4M/RLV5N/GREEN[8]

FRC_DDR3_DQU4/DDR2_DQ15 FRC_DDR3_DQU5/DDR2_DQ9

GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN GPIO2/TCON7/LDE/GCLK4

FRC_DDR3_DQU7/DDR2_DQM1

GPIO3/TCON6/LCK/GCLK2

AF3 AF14

AB26

AD1

FRC_DDR3_BA1/DDR2_ODT FRC_DDR3_BA2/DDR2_A12

AB25 AB24

B0P/RLV6P/GREEN[7] FRC_DDR3_BA0/DDR2_BA2

AC24

AE14

AD26

AE13

FRC_DDR3_MCLK/DDR2_MCLK

B3P/TCON11/BLUE[9] B3M/TCON10/BLUE[8] B4P/TCON9/BLUE[7]

AF4 AD4

FRC_GPIO1

AC14

AE8 Y11

AA15

Y19

FRC_GPIO9/UART_TX FRC_DDR3_NC/DDR2_DQM0

AE26

CCKP/LLV3P CCKM/LLV3N C0P/LLV0P/BLUE[5]

AE2 FRC_DDR3_RESETB/DDR2_A3

AF26 AF8 AD9

AF23 AD22

C1M/LLV1N/BLUE[2] FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

C2M/LLV2N/BLUE[0] C3P/LLV4P

AE9 AF9

AF22

FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

C4P/LLV5P

AE6 AF11

AE21

AD6

AF21

AD12

AE20

AE5 AF12

AF20

AF5

AF19

AE12

AD18 AE18

AF7

AB22

AD10

AD11

FRC_DDR3_DQL1/DDR2_DQ0

AB23

AE7

AC23

AF10

AC22

AD8

DCKM/TCON4 D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

AD16 AD15 AE16

D4P/TCON1

FRC_DDR3_DQU1/DDR2_DQ14

D4M/TCON0

D3M/TCON2

FRC_DDR3_DQU4/DDR2_DQ15 FRC_DDR3_DQU5/DDR2_DQ9

FRC_PWM1

ACKP/RLV3P/RED[3]

FRC_DDR3_A1/DDR2_A6

ACKM/RLV3N/RED[2]

FRC_DDR3_A2/DDR2_A7

A0P/RLV0P/RED[9]

FRC_DDR3_A3/DDR2_A1

GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN GPIO2/TCON7/LDE/GCLK4

FRC_DDR3_DQU7/DDR2_DQM1

GPIO3/TCON6/LCK/GCLK2

A1P/RLV1P/RED[7] A1M/RLV1N/RED[6]

FRC_DDR3_A6/DDR2_A0

A2M/RLV2N/RED[4] A3P/RLV4P/RED[1]

FRC_DDR3_A9/DDR2_A9

A3M/RLV4N/RED[0]

FRC_DDR3_A10/DDR2_A11

A4P/RLV5P/GREEN[9]

FRC_DDR3_A11/DDR2_A4

A4M/RLV5N/GREEN[8]

FRC_GPIO1

AC14

AE8

AA16

Y11

AA15

Y19

FRC_GPIO9/UART_TX FRC_DDR3_NC/DDR2_DQM0 FRC_REXT FRC_TESTPIN

AE1

W25

AF16

U26

AF1

U25

AE3

U24

AD14

V26

AD3

V25

AF15

V24

AF2

W24

AE15

Y26

AD2

Y25

AD16

Y24

AD15 AE16

BCKM/TCON12/GREEN[0]

AA26 AA25

AF3

AA24

AF14

AB26

AD1

B0P/RLV6P/GREEN[7] FRC_DDR3_BA0/DDR2_BA2 FRC_DDR3_BA1/DDR2_ODT FRC_DDR3_BA2/DDR2_A12

AB25 AB24 AC24

AE14

AD26

AE13

FRC_DDR3_MCLK/DDR2_MCLK

B3P/TCON11/BLUE[9] B3M/TCON10/BLUE[8] B4P/TCON9/BLUE[7]

AF4 AD4

AE26

C0P/LLV0P/BLUE[5] C0M/LLV0N/BLUE[4] C1P/LLV1P/BLUE[3]

AF23

C1M/LLV1N/BLUE[2] FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

C2M/LLV2N/BLUE[0] C3P/LLV4P

AE9 AF9

AF22

FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

C4P/LLV5P

AE6 AF11

AE21

AD6

AF21

AD12 AE5 AF12

AF20

AF5

AF19

AE12

AD18

A2P/RLV2P/RED[5] A2M/RLV2N/RED[4] A3P/RLV4P/RED[1] A3M/RLV4N/RED[0]

FRC_DDR3_A9/DDR2_A9 FRC_DDR3_A10/DDR2_A11

A4P/RLV5P/GREEN[9]

FRC_DDR3_A11/DDR2_A4

A4M/RLV5N/GREEN[8]

F12 D13 E13

AF7

AB22

AD10

AD11

FRC_DDR3_DQL1/DDR2_DQ0

AB23

AE7

AC23

AF10

AC22

AD8

DCKM/TCON4 D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

AD1

D4P/TCON1

FRC_DDR3_DQU1/DDR2_DQ14

D4M/TCON0

D3M/TCON2

AC24

AE14

AD26

AE13

AD25

FRC_DDR3_DQU4/DDR2_DQ15

GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN GPIO2/TCON7/LDE/GCLK4

FRC_DDR3_DQU7/DDR2_DQM1

GPIO3/TCON6/LCK/GCLK2

B1P/RLV7P/GREEN[5]

FRC_DDR3_BA1/DDR2_ODT

B1M/RLV7N/GREEN[4] B2P/RLV8P/GREEN[3] B2M/RLV8N/GREEN[2]

FRC_DDR3_MCLK/DDR2_MCLK FRC_DDR3_CKE/DDR2_RASZ

B3P/TCON11/BLUE[9]

FRC_DDR3_MCLKZ/DDR2_MCLKZ

B3M/TCON10/BLUE[8] B4P/TCON9/BLUE[7]

AD24

AF4 AD4

FRC_GPIO1

AE26 AE25

CCKP/LLV3P CCKM/LLV3N C0P/LLV0P/BLUE[5]

AE2

C0M/LLV0N/BLUE[4]

FRC_DDR3_RESETB/DDR2_A3

AF26

C1P/LLV1P/BLUE[3]

AF25 AE24

AF8

AF24

AD9

AF23 AD22

C1M/LLV1N/BLUE[2] FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

C2M/LLV2N/BLUE[0] C3P/LLV4P

AE9

AE22

AF9

AF22

FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

C4P/LLV5P

AC14

AE8 Y11

AA15

Y19

FRC_GPIO9/UART_TX FRC_DDR3_NC/DDR2_DQM0

AE6 AF11

AE21

AD6

AF21

AD12

AD20

AE5

AE20

AF12

AF20

AF5

AF19

AE12

AD18 AE18

AA11

AF7

AB22

AD10

AD11

D0P/LLV6P

FRC_DDR3_DQL1/DDR2_DQ0 FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P D1M/LLV7N

FRC_DDR3_DQL4/DDR2_DQ4 FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

FRC_DDR3_DQU1/DDR2_DQ14

D4M/TCON0

D3M/TCON2

AD16 AD15 AE16

W26 FRC_DDR3_A0/DDR2_NC

ACKP/RLV3P/RED[3]

FRC_DDR3_A1/DDR2_A6

ACKM/RLV3N/RED[2]

FRC_DDR3_A2/DDR2_A7

A0P/RLV0P/RED[9] A0M/RLV0N/RED[8]

FRC_DDR3_A3/DDR2_A1 FRC_DDR3_A4/DDR2_CASZ

A1P/RLV1P/RED[7]

FRC_DDR3_A5/DDR2_A10

A1M/RLV1N/RED[6] A2P/RLV2P/RED[5]

FRC_DDR3_A6/DDR2_A0 FRC_DDR3_A7/DDR2_A5

A2M/RLV2N/RED[4]

FRC_DDR3_A8/DDR2_A2

A3P/RLV4P/RED[1] A3M/RLV4N/RED[0]

FRC_DDR3_A9/DDR2_A9 FRC_DDR3_A10/DDR2_A11

A4P/RLV5P/GREEN[9]

FRC_DDR3_A11/DDR2_A4

A4M/RLV5N/GREEN[8]

AB23

AE7

AC23

AF10

AC22

AD8

GPIO0/TCON15/HSYNC/VDD_ODD

FRC_DDR3_DQU4/DDR2_DQ15 FRC_DDR3_DQU5/DDR2_DQ9

GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU6/DDR2_DQ10

GPIO2/TCON7/LDE/GCLK4

FRC_DDR3_DQU7/DDR2_DQM1

GPIO3/TCON6/LCK/GCLK2

BCKM/TCON12/GREEN[0]

AA26 AA25

AF3

AA24

AF14

AB26

AD1

B1P/RLV7P/GREEN[5]

FRC_DDR3_BA1/DDR2_ODT

B1M/RLV7N/GREEN[4]

FRC_DDR3_BA2/DDR2_A12

AB25 AB24

B0P/RLV6P/GREEN[7] B0M/RLV6N/GREEN[6]

FRC_DDR3_BA0/DDR2_BA2

B2P/RLV8P/GREEN[3]

AD13

AC24

AE14

AD26

AE13

AD25

FRC_DDR3_MCLK/DDR2_MCLK

B3P/TCON11/BLUE[9] B3M/TCON10/BLUE[8] B4P/TCON9/BLUE[7]

AF4 AD4

FRC_GPIO1

AE26

FRC_DDR3_RASZ/DDR2_WEZ

AE8 Y11 Y19

Y25

URSA_DEBUG P3904

Y24

CCKP/LLV3P CCKM/LLV3N C0P/LLV0P/BLUE[5]

AE2 FRC_DDR3_RESETB/DDR2_A3

AF26 AF8 AD9

AF23 AD22

C1M/LLV1N/BLUE[2] FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

C2M/LLV2N/BLUE[0] C3P/LLV4P

AE9 AF9

AF22

FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

C4P/LLV5P

AE6 AF11

AE21

AD6

AF21

AD12

AE20

AE5 AF12

AF20

AF5

AF19

AE12

AD18 AE18

AF7

AB22

AD10

AD11

AB23

AE7

AC23

AF10

AC22

AD8

FRC_GPIO9/UART_TX

D0P/LLV6P

FRC_DDR3_DQL1/DDR2_DQ0 FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P D1M/LLV7N

FRC_DDR3_DQL4/DDR2_DQ4 FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

FRC_I2CM_DA

D4P/TCON1

FRC_DDR3_DQU1/DDR2_DQ14

D4M/TCON0

D3M/TCON2

FRC_DDR3_DQU4/DDR2_DQ15

GPIO2/TCON7/LDE/GCLK4

FRC_DDR3_DQU7/DDR2_DQM1

GPIO3/TCON6/LCK/GCLK2

AA11

FRC_GPIO1

AB14

FRC_PWM1

3 4

AF23 AD22 AE22 AF22

AE19 AD21 AE21 AF21 AD20 AE20 AF20 AF19 AD18 AE18 AF18

AB23 AC23 AC22

AA14 AC15 Y16

FRC_GPIO8

AC16 AC14

AE8

AA16

Y11

AA15

Y19

FRC_GPIO9/UART_TX FRC_DDR3_NC/DDR2_DQM0

FRC_TESTPIN

AA11

AC16 AC14

FRC_GPIO10 AA16

FRC_REXT

FRC_I2CM_DA

AA15

FRC_I2CM_CK Y10 FRC_I2CS_DA

AA11

FRC_I2CS_CK AB15

FRC_PWM1

2

FRC_SDA

AF25 AE24 AF24

FRC_GPIO3

FRC_I2CS_CK FRC_PWM0

AE26 AE25 AF26

AB16 FRC_GPIO0/UART_RX

Y10 FRC_I2CS_DA

FRC_SCL

AE23

AB22 GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU5/DDR2_DQ9 FRC_DDR3_DQU6/DDR2_DQ10

AA14

FRC_I2CM_CK

FRC_TESTPIN

AD24

FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU3/DDR2_DQ12

AC15

FRC_GPIO10

FRC_DDR3_NC/DDR2_DQM0 FRC_REXT

1

AC24 AD26 AD25

AD19 DCKP/TCON5 DCKM/TCON4

FRC_DDR3_DQL0/DDR2_DQ6

AE10

AF18

AB26 AB25 AB24

FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DMU/DDR2_DQ11

AE19 AD21

AA26 AA25 AA24

C4M/LLV5N

AE11

AD20

C0M/LLV0N/BLUE[4] C1P/LLV1P/BLUE[3]

AF25 AE24 AF24

AE22

12505WS-03A00

AC25

AD23

FRC_DDR3_CASZ/DDR2_CKE FRC_DDR3_WEZ/DDR2_BA0

Y16 FRC_GPIO8

AC16

AA15

V24 W24 Y26

FRC_DDR3_ODT/DDR2_BA1

FRC_GPIO3

AC14

U24 V26 V25

B4M/TCON8/BLUE[6]

AE4 AD23 AE23 AE25

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ FRC_DDR3_MCLKZ/DDR2_MCLKZ

AD24

AB16 FRC_GPIO0/UART_RX

AA14 AC15

AA16

W25 U26 U25

AC26 BCKP/TCON13/GREEN[1]

AC25

AD7

AB15 FRC_PWM0

AB14

Y25 Y24

FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU3/DDR2_DQ12

FRC_I2CS_CK AB15

FRC_PWM1

AF2 AD2

AD19 DCKP/TCON5 DCKM/TCON4

FRC_DDR3_DQL0/DDR2_DQ6

Y10 FRC_I2CS_DA

FRC_I2CS_CK

AD3

AE15

AF6

AE10

AF18

FRC_I2CM_CK

FRC_TESTPIN

AD14 AF15

V24 W24 Y26

FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DMU/DDR2_DQ11

AE19 AD21

FRC_GPIO10 FRC_I2CM_DA

FRC_REXT

U24 V26 V25

C4M/LLV5N

AE11

Y16 FRC_GPIO8

AA16

AF1 AE3

AD5

FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_CASZ/DDR2_CKE FRC_DDR3_WEZ/DDR2_BA0

FRC_GPIO3

AC16

AF16

FRC_DDR3_ODT/DDR2_BA1

AB16 FRC_GPIO0/UART_RX

AA14 AC15

AE1

W25 U26 U25

B4M/TCON8/BLUE[6]

AE4 AD23 AE23

AD7

FRC_DDR3_DQU6/DDR2_DQ10

B0P/RLV6P/GREEN[7] B0M/RLV6N/GREEN[6]

FRC_DDR3_BA0/DDR2_BA2 FRC_DDR3_BA2/DDR2_A12

FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU3/DDR2_DQ12 FRC_DDR3_DQU5/DDR2_DQ9

S7MR_RM IC101-*10 LGE107RC-R [S7MR RM]

W26

FRC_DDR3_A12/DDR2_A8

AD13

AD19 DCKP/TCON5

FRC_DDR3_DQL0/DDR2_DQ6

AE10

AF18

AB26 AB25 AB24

AF6

Y10

FRC_PWM0

A1P/RLV1P/RED[7] A1M/RLV1N/RED[6]

FRC_DDR3_A6/DDR2_A0 FRC_DDR3_A7/DDR2_A5 FRC_DDR3_A8/DDR2_A2

BCKM/TCON12/GREEN[0] AF3 AF14

FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DMU/DDR2_DQ11

AE19 AD21

FRC_I2CM_CK FRC_I2CS_DA

A0M/RLV0N/RED[8]

FRC_DDR3_A3/DDR2_A1 FRC_DDR3_A4/DDR2_CASZ FRC_DDR3_A5/DDR2_A10

AA26 AA25 AA24

C4M/LLV5N

AE11

FRC_GPIO10 FRC_I2CM_DA

A0P/RLV0P/RED[9]

AC26

AD5 CCKP/LLV3P CCKM/LLV3N

FRC_DDR3_RESETB/DDR2_A3

AF8 AD9

AE18

ACKM/RLV3N/RED[2]

BCKP/TCON13/GREEN[1]

B4M/TCON8/BLUE[6] FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_CASZ/DDR2_CKE FRC_DDR3_WEZ/DDR2_BA0

AF25 AE24 AF24

AE20

ACKP/RLV3P/RED[3]

FRC_DDR3_A1/DDR2_A6 FRC_DDR3_A2/DDR2_A7

AC25

FRC_DDR3_ODT/DDR2_BA1

AE2

AF26

AD20

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ

AE4 AD23 AE23

AD22

B1P/RLV7P/GREEN[5] B1M/RLV7N/GREEN[4]

FRC_DDR3_MCLKZ/DDR2_MCLKZ

AD24

AE22

B0M/RLV6N/GREEN[6]

B2P/RLV8P/GREEN[3]

AD13

AD25

AE25

FRC_DDR3_A0/DDR2_NC

FRC_DDR3_A12/DDR2_A8

Y16 FRC_GPIO8

AC16

W26

AC26

FRC_GPIO3

AB14

A2P/RLV2P/RED[5]

FRC_DDR3_A7/DDR2_A5 FRC_DDR3_A8/DDR2_A2

AB16 FRC_GPIO0/UART_RX

AA14

AA11

A0M/RLV0N/RED[8]

FRC_DDR3_A4/DDR2_CASZ FRC_DDR3_A5/DDR2_A10

BCKP/TCON13/GREEN[1]

AD7

FRC_DDR3_DQU6/DDR2_DQ10

AC15

S7MR_DivX_MS10 IC101-*9 LGE107DC-R [S7MR DIVX/MS10]

FRC_DDR3_A0/DDR2_NC

AC25

FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU3/DDR2_DQ12

AB15 FRC_PWM0

AB14

Y25 Y24

AD19 DCKP/TCON5

FRC_DDR3_DQL0/DDR2_DQ6

AE10

AF18

FRC_I2CS_CK

NC_24

AF2 AD2

AF6

Y10 FRC_I2CS_DA

AA11

AD3

AE15

FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DMU/DDR2_DQ11

AE19 AD21

FRC_I2CM_CK

FRC_TESTPIN

AD14 AF15

V24 W24 Y26

C4M/LLV5N

AE11

AD20

C0M/LLV0N/BLUE[4] C1P/LLV1P/BLUE[3]

AF25 AE24 AF24

FRC_GPIO10 FRC_I2CM_DA

FRC_REXT

U24 V26 V25

AD5

FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_CASZ/DDR2_CKE FRC_DDR3_WEZ/DDR2_BA0

Y16 FRC_GPIO8

AA16

AF1 AE3

FRC_DDR3_ODT/DDR2_BA1

FRC_GPIO3

AC16

AF16

B4M/TCON8/BLUE[6]

AE4 AD23 AE23

AE22

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ FRC_DDR3_MCLKZ/DDR2_MCLKZ

AD24

AE25

B1P/RLV7P/GREEN[5] B1M/RLV7N/GREEN[4] B2P/RLV8P/GREEN[3]

AD13

AD25

B0M/RLV6N/GREEN[6]

AB16 FRC_GPIO0/UART_RX

AA14

AE1

W25 U26 U25

FRC_DDR3_A12/DDR2_A8

BCKM/TCON12/GREEN[0]

AA26 AA25

AD7

FRC_DDR3_DQU6/DDR2_DQ10

AC15

W26

AC26

AA24

FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU3/DDR2_DQ12

AB15

AB14

ACKP/RLV3P/RED[3]

FRC_DDR3_A1/DDR2_A6 FRC_DDR3_A2/DDR2_A7

BCKP/TCON13/GREEN[1]

AD19 DCKM/TCON4

FRC_DDR3_DQL3/DDR2_DQ2 FRC_DDR3_DQL4/DDR2_DQ4

AF12

AF20 AF19

S7MR_DivX IC101-*8 LGE107DC-R-1 [S7MR DIVX]

FRC_DDR3_A0/DDR2_NC

AC25

AF6 DCKP/TCON5

FRC_DDR3_DQL0/DDR2_DQ6

NC_17 NC_25

FRC_DDR3_DQL1/DDR2_DQ0

D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

D3M/TCON2 FRC_DDR3_DQU1/DDR2_DQ14

FRC_DDR3_DQU4/DDR2_DQ15

AD1

FRC_DDR3_A1/DDR2_A6

ACKM/RLV3N/RED[2]

FRC_DDR3_A2/DDR2_A7

A0P/RLV0P/RED[9]

FRC_DDR3_A3/DDR2_A1

A0M/RLV0N/RED[8]

FRC_DDR3_A4/DDR2_CASZ

A1P/RLV1P/RED[7]

FRC_DDR3_A5/DDR2_A10

A1M/RLV1N/RED[6]

FRC_DDR3_A6/DDR2_A0 FRC_DDR3_A7/DDR2_A5 FRC_DDR3_A8/DDR2_A2 FRC_DDR3_A9/DDR2_A9 FRC_DDR3_A10/DDR2_A11 FRC_DDR3_A11/DDR2_A4

AB14

AB15 FRC_PWM0

AB14

FRC_PWM1

A2P/RLV2P/RED[5] A2M/RLV2N/RED[4] A3P/RLV4P/RED[1] A3M/RLV4N/RED[0] A4P/RLV5P/GREEN[9]

AC24

AE14

AD26

AE13

GPIO3/TCON6/LCK/GCLK2

FRC_DDR3_MCLK/DDR2_MCLK

AD23

AF4 AD4

B3P/TCON11/BLUE[9] B3M/TCON10/BLUE[8]

U24

AD14

V26

AD3

V25

AF15

V24

AF2

W24

AE15

Y26 Y25 Y24

AD2 AD16 AD15 AE16

CCKP/LLV3P CCKM/LLV3N C0P/LLV0P/BLUE[5]

FRC_DDR3_RESETB/DDR2_A3

C0M/LLV0N/BLUE[4] C1P/LLV1P/BLUE[3]

AF8 AD9

AF23 AD22

AE9

AE22

AF9

AF22

C1M/LLV1N/BLUE[2] FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

C2M/LLV2N/BLUE[0] C3P/LLV4P

FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

C4P/LLV5P

FRC_SPI_CZ FRC_GPIO1

FRC_SPI_CK

AE19

AE6

AD21

AF11

AE21

AD6

AF21

AD12 AE5 AF12

AF20

AF5

AF19

AE12

AD18 AE18

AE10

AF18

AF7

AB22

AD10

AD11

AB23

AE7

AC23

AF10

AC22

AD8

AB26

FRC_DDR3_A6/DDR2_A0 FRC_DDR3_A7/DDR2_A5 FRC_DDR3_A8/DDR2_A2 FRC_DDR3_A9/DDR2_A9 FRC_DDR3_A10/DDR2_A11 FRC_DDR3_A11/DDR2_A4

FRC_DDR3_DQL1/DDR2_DQ0

D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

D3M/TCON2 FRC_DDR3_DQU1/DDR2_DQ14

FRC_DDR3_DQU4/DDR2_DQ15 FRC_DDR3_DQU5/DDR2_DQ9

AD1

AC24

AE14

AD26

AE13

GPIO3/TCON6/LCK/GCLK2

FRC_DDR3_MCLK/DDR2_MCLK

AD23

AF4 AD4

B3P/TCON11/BLUE[9] B3M/TCON10/BLUE[8]

FRC_SPI_CZ FRC_GPIO1

Y19

FRC_SPI_DO FRC_DDR3_NC/DDR2_DQM0 FRC_VSYNC_LIKE FRC_TESTPIN

C0M/LLV0N/BLUE[4] C1P/LLV1P/BLUE[3]

AE9 AF9

AF22

C1M/LLV1N/BLUE[2] FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

C2M/LLV2N/BLUE[0] C3P/LLV4P

FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

C4P/LLV5P

V24

AF2

W24

AE15

Y26 Y25 Y24

FRC_SPI_CK

AD2 AD16 AD15 AE16

AE19

AE6 AF11

AE21

AD6

AF21

AD12 AE5 AF12

AF20

AF5

AF19

AE12

AD18 AE18

AE10

AF18

AF7

AB22

AD10

AD11

AB23

AE7

AC23

AF10

AC22

AD8

A0P/RLV0P/RED[9] A0M/RLV0N/RED[8]

FRC_DDR3_A4/DDR2_CASZ

A1P/RLV1P/RED[7]

FRC_DDR3_A5/DDR2_A10

A1M/RLV1N/RED[6]

FRC_DDR3_A6/DDR2_A0 FRC_DDR3_A7/DDR2_A5 FRC_DDR3_A8/DDR2_A2 FRC_DDR3_A9/DDR2_A9 FRC_DDR3_A10/DDR2_A11 FRC_DDR3_A11/DDR2_A4

FRC_DDR3_DQL1/DDR2_DQ0

DCKM/TCON4 D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

D3M/TCON2

AB26

FRC_DDR3_DQU1/DDR2_DQ14

FRC_DDR3_DQU4/DDR2_DQ15 FRC_DDR3_DQU5/DDR2_DQ9

GPIO3/TCON6/LCK/GCLK2

FRC_DDR3_BA1/DDR2_ODT FRC_DDR3_BA2/DDR2_A12

AC24

AE14

AD26

AE13

FRC_DDR3_MCLK/DDR2_MCLK

AD23

AF4 AD4

B3P/TCON11/BLUE[9] B3M/TCON10/BLUE[8]

FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_CASZ/DDR2_CKE

FRC_DDR3_RESETB/DDR2_A3

C0M/LLV0N/BLUE[4] C1P/LLV1P/BLUE[3]

AF8 AD9

AF23 AD22

AE9

AE22

AF9

AF22

C1M/LLV1N/BLUE[2] FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

C2M/LLV2N/BLUE[0] C3P/LLV4P

FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

C4P/LLV5P

AE6 AF11

AE21

AD6

AF21

AD12 AE5 AF12

AF20

AF5

AF19

AE12

AD18 AE18

AE10

AF18

AF7

AB22

AD10

AD11

AB23

AE7

AC23

AF10

AC22

AD8

FRC_SPI_CZ FRC_GPIO1

Y19

FRC_SPI_DO FRC_DDR3_NC/DDR2_DQM0 FRC_VSYNC_LIKE FRC_TESTPIN

FRC_SPI_CK

FRC_DDR3_DQL1/DDR2_DQ0

DCKM/TCON4 D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

D3M/TCON2 FRC_DDR3_DQU1/DDR2_DQ14

FRC_DDR3_DQU4/DDR2_DQ15 FRC_DDR3_DQU5/DDR2_DQ9

AMP_SDA AMP_SCL

AF25

C111 2.2uF

AE24 AF24 AF23 AD22 AE22 AF22

I2C_SDA I2C_SCL

R155 0 OPT

LD650 Scan

AE19 AD21 AE21 AF21 AD20 AE20 AF20 AF19 AD18 AE18

NEC_SDA NEC_SCL

SCAN_BLK2

R158

AF18

AB22

GPIO2/TCON7/LDE/GCLK4

FRC_DDR3_DQU7/DDR2_DQM1

GPIO3/TCON6/LCK/GCLK2

FRC_SPI_CZ

AA14

FRC_GPIO1

R159

AB23 AC23

100 OPT 100

AC22

AA14

SCAN_BLK1/OPC_OUT

FRC_PWM1 FRC_PWM0

OPT

AC15

FRC_SPI1_CK Y16 FRC_GPIO8

AC16 AC14

AE8

AA16

Y11

AA15

Y19

FRC_SPI_DO FRC_DDR3_NC/DDR2_DQM0

AA11

AC16 AC14

FRC_SPI1_DI AA16

FRC_VSYNC_LIKE FRC_TESTPIN

FRC_I2CS_CK

FRC_SPI_CK

AA15

FRC_SPI_DI Y10 FRC_I2CS_DA

AA11

FRC_I2CS_CK AB15

FRC_PWM1

AE26 AE25 AF26

D4M/TCON0

GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU6/DDR2_DQ10

Y10

FRC_PWM0

AE23

FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU3/DDR2_DQ12

AC15

FRC_SPI_DI

AB15

PWM0 PWM2

PWM_DIM

AD24

AB16

FRC_SPI1_DI

FRC_I2CS_DA

AC24 AD26 AD25

AD19 DCKP/TCON5

FRC_DDR3_DQL0/DDR2_DQ6

Y16 FRC_GPIO8 AE8 Y11

AA15

10K 100

AB26 AB25 AB24

FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DMU/DDR2_DQ11

AE19

R156 R157

A_DIM

AA26 AA25 AA24

C4M/LLV5N

AE11

AD21

AC25

AD23 CCKP/LLV3P CCKM/LLV3N C0P/LLV0P/BLUE[5]

AE2

AF25 AE24 AF24

FRC_SPI1_CK

AC14

Y25 Y24

B4M/TCON8/BLUE[6]

AB16

AA16

V24 W24 Y26

FRC_DDR3_ODT/DDR2_BA1

FRC_DDR3_WEZ/DDR2_BA0

AE26 AF26

AE20

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ

B4P/TCON9/BLUE[7]

AE23

AD20

B1P/RLV7P/GREEN[5] B1M/RLV7N/GREEN[4]

FRC_DDR3_MCLKZ/DDR2_MCLKZ

AE4

AE25

B0M/RLV6N/GREEN[6]

B2P/RLV8P/GREEN[3]

AD24

AD7

GPIO2/TCON7/LDE/GCLK4

FRC_DDR3_DQU7/DDR2_DQM1

B0P/RLV6P/GREEN[7] FRC_DDR3_BA0/DDR2_BA2

AD13

AD25

D4M/TCON0

GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU6/DDR2_DQ10

AC16

AB14

A3M/RLV4N/RED[0]

U24 V26 V25

AC26

AD1

AB25 AB24

FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU3/DDR2_DQ12

AA14

AA11

A2P/RLV2P/RED[5] A2M/RLV2N/RED[4] A3P/RLV4P/RED[1] A4P/RLV5P/GREEN[9]

W25 U26 U25

A4M/RLV5N/GREEN[8]

BCKM/TCON12/GREEN[0]

AD19 DCKP/TCON5

FRC_DDR3_DQL0/DDR2_DQ6

AC15

FRC_I2CS_CK

FRC_PWM1

ACKM/RLV3N/RED[2]

BCKP/TCON13/GREEN[1]

AF3 AF14

AF6

Y10

FRC_PWM0

FRC_DDR3_A1/DDR2_A6 FRC_DDR3_A2/DDR2_A7 FRC_DDR3_A3/DDR2_A1

AA26 AA25 AA24

FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DMU/DDR2_DQ11

AD21

FRC_SPI_DI FRC_I2CS_DA

DIMMING

ACKP/RLV3P/RED[3]

AC25

C4M/LLV5N

AE11

AE20

CCKP/LLV3P CCKM/LLV3N C0P/LLV0P/BLUE[5]

FRC_DDR3_RESETB/DDR2_A3

AF8 AD9

AF23 AD22 AE22

FRC_SPI1_DI

AB15 AB14

AD3

AD5

FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_CASZ/DDR2_CKE

AE2

AF25 AE24 AF24

Y16 FRC_GPIO8 AE8 Y11

AA15

AD14 AF15

B4M/TCON8/BLUE[6]

FRC_SPI1_CK

AC14

U24 V26 V25

FRC_DDR3_ODT/DDR2_BA1

FRC_DDR3_WEZ/DDR2_BA0

AE26 AF26

AD20

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ

B4P/TCON9/BLUE[7]

AE23 AE25

B1P/RLV7P/GREEN[5] B1M/RLV7N/GREEN[4]

AB16

AA16

AF1 AE3

FRC_DDR3_A0/DDR2_NC

FRC_DDR3_A12/DDR2_A8

FRC_DDR3_MCLKZ/DDR2_MCLKZ

AE4

AD7

GPIO2/TCON7/LDE/GCLK4

FRC_DDR3_DQU7/DDR2_DQM1

AC16

AA11

A3M/RLV4N/RED[0]

B0M/RLV6N/GREEN[6]

B2P/RLV8P/GREEN[3]

AD24

D4M/TCON0

GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU6/DDR2_DQ10

FRC_DDR3_BA1/DDR2_ODT FRC_DDR3_BA2/DDR2_A12

AD25

FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU3/DDR2_DQ12

AA14

FRC_I2CS_CK

A2P/RLV2P/RED[5] A2M/RLV2N/RED[4] A3P/RLV4P/RED[1] A4P/RLV5P/GREEN[9]

AF16

U26 U25

A4M/RLV5N/GREEN[8]

B0P/RLV6P/GREEN[7] FRC_DDR3_BA0/DDR2_BA2

AD13

AD19 DCKM/TCON4

Y10

FRC_PWM1

A1P/RLV1P/RED[7] A1M/RLV1N/RED[6]

W25

W26

AE1

AC26

AF6 DCKP/TCON5

FRC_DDR3_DQL0/DDR2_DQ6

AC15

FRC_SPI_DI

FRC_PWM0

FRC_DDR3_A4/DDR2_CASZ FRC_DDR3_A5/DDR2_A10

BCKM/TCON12/GREEN[0]

AB25 AB24

FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DMU/DDR2_DQ11

Y16 FRC_GPIO8 FRC_SPI_DO

A0P/RLV0P/RED[9] A0M/RLV0N/RED[8]

BCKP/TCON13/GREEN[1]

AF3 AF14

C4M/LLV5N

AE11

FRC_SPI1_DI

FRC_I2CS_DA

ACKM/RLV3N/RED[2]

AA26 AA25 AA24

AD5

FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_CASZ/DDR2_CKE

AE2

AF25 AE24 AF24

AE20

FRC_DDR3_A1/DDR2_A6 FRC_DDR3_A2/DDR2_A7 FRC_DDR3_A3/DDR2_A1

AC25

B4M/TCON8/BLUE[6]

FRC_SPI1_CK

FRC_DDR3_NC/DDR2_DQM0 Y11 FRC_VSYNC_LIKE

AF1 AE3

FRC_DDR3_ODT/DDR2_BA1

FRC_DDR3_WEZ/DDR2_BA0

AE26 AF26

AD20

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ FRC_DDR3_MCLKZ/DDR2_MCLKZ

B4P/TCON9/BLUE[7]

AE23 AE25

B1P/RLV7P/GREEN[5] B1M/RLV7N/GREEN[4]

AB16

Y19

AF16

ACKP/RLV3P/RED[3]

FRC_DDR3_A12/DDR2_A8

B0M/RLV6N/GREEN[6]

B2P/RLV8P/GREEN[3]

AE4

AD7

GPIO2/TCON7/LDE/GCLK4

FRC_DDR3_DQU7/DDR2_DQM1

FRC_DDR3_BA1/DDR2_ODT

AD24

D4M/TCON0

GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU6/DDR2_DQ10

AE8

W25 U26

FRC_DDR3_A0/DDR2_NC

+3.3V_Normal

S7M-PLUS_RM IC101-*14 LGE107RC-RP [S7M+ RM]

W26

AE1

U25

A4M/RLV5N/GREEN[8]

B0P/RLV6P/GREEN[7] FRC_DDR3_BA0/DDR2_BA2 FRC_DDR3_BA2/DDR2_A12

AD25

FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU3/DDR2_DQ12 FRC_DDR3_DQU5/DDR2_DQ9

I2C S7M-PLUS_DivX IC101-*13 LGE107DC-RP-1 [S7M+ DIVX] W26

AD13

AD19 DCKM/TCON4

FRC_DDR3_DQL3/DDR2_DQ2

FRC_TESTPIN

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

K23

PWM1

W25

FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DMU/DDR2_DQ11

AE19 AD21

AC26

AF6 DCKP/TCON5

AE6

AF7

4

PWM0

U26

C4M/LLV5N

AE11

Y10

BCKM/TCON12/GREEN[0]

AB25 AB24

FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DMU/DDR2_DQ11

AE10

VSS

C0M/LLV0N/BLUE[4] C1P/LLV1P/BLUE[3]

AF25 AE24 AF24

NC_20

GND_105

BCKP/TCON13/GREEN[1]

AF3 AF14

C4M/LLV5N

AE11

WP

AD6

22

CCKP/LLV3P CCKM/LLV3N C0P/LLV0P/BLUE[5] C0M/LLV0N/BLUE[4] C1P/LLV1P/BLUE[3]

AE5

E2

R129

B5

AD5 CCKP/LLV3P CCKM/LLV3N

Y16 NC_15

AC16

ACKP/RLV3P/RED[3]

AA26 AA25 AA24

AD5

FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_CASZ/DDR2_CKE

AF8 AD9

AF11

SDA

A5

22

U25

B4M/TCON8/BLUE[6] FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_CASZ/DDR2_CKE FRC_DDR3_WEZ/DDR2_BA0

NC_30

FRC_DDR3_A0/DDR2_NC

AC25

B4M/TCON8/BLUE[6]

FRC_DDR3_RESETB/DDR2_A3

2

22

R139

W26

FRC_DDR3_ODT/DDR2_BA1

AB16 NC_26

AA14 AC15

S7M-PLUS_MS10

U26

FRC_DDR3_ODT/DDR2_BA1

FRC_DDR3_WEZ/DDR2_BA0

22

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ FRC_DDR3_MCLKZ/DDR2_MCLKZ

AE9

R128

B1P/RLV7P/GREEN[5] B1M/RLV7N/GREEN[4] B2P/RLV8P/GREEN[3]

VCC AF9

SCL

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ

AE4 AD23 AE23

AD7

NC_73

B1P/RLV7P/GREEN[5] B1M/RLV7N/GREEN[4]

FRC_DDR3_MCLKZ/DDR2_MCLKZ

AD24

NC_42 NC_38

B0M/RLV6N/GREEN[6]

B2P/RLV8P/GREEN[3]

AD13

AD19 TCON3/OE/GOE/GCLK2

NC_53

NC_59

AD18 AE18 AF18

AF3 AF14

AF6

FRC_DDR3_A12/DDR2_A8

B0M/RLV6N/GREEN[6]

B4P/TCON9/BLUE[7]

AF4

E1

R138

FRC_DDR3_A12/DDR2_A8

BCKM/TCON12/GREEN[0]

AA26 AA25 AA24

NC_58 NC_69

AE19 AD21

AE1

U25

A4M/RLV5N/GREEN[8]

B0P/RLV6P/GREEN[7] FRC_DDR3_BA0/DDR2_BA2

AD13

4.7K I2C_SCL

N22

AC26 BCKP/TCON13/GREEN[1]

RLV5N/RED[2]

AE11

IC101-*12 LGE107C-RP [S7M+ MS10] W26

AF3 AF14

AD4

8

A3M/RLV4N/RED[0]

FRC_DDR3_A10/DDR2_A11 FRC_DDR3_A11/DDR2_A4

AC25

AD5

NC_36 NC_67 NC_35

NC_24

ACKP/RLV3P/RED[3]

AE4

1

A2P/RLV2P/RED[5]

FRC_DDR3_A7/DDR2_A5 FRC_DDR3_A8/DDR2_A2 FRC_DDR3_A9/DDR2_A9

AD15 AE16

A0M/RLV0N/RED[8]

FRC_DDR3_A4/DDR2_CASZ FRC_DDR3_A5/DDR2_A10 FRC_DDR3_A6/DDR2_A0

AD16

Y24

NC_51

AB15 NC_25

AB14

FRC_DDR3_A0/DDR2_NC

AE2

R127

22

IC101-*7 LGE107C-R [S7MR MS10]

FRC_DDR3_A0/DDR2_NC

FRC_DDR3_A3/DDR2_A1

AD14

V26 V25

LVB4N/LLV0N/GREEN[0]

AE4 AD23 AE23

NC_17

BCKM/TCON12/GREEN[0]

C105 0.1uF

AD12

VSS

LVB0P/RLV6P/RED[1] LVB0N/RLV6N/RED[0]

NC_66

Y10

AE1

AE3

NC

WP

R137

FRC_DDR3_A12/DDR2_A8

NC_32

AD25

AC26

A2

LVA4P/LLV8P LVA4N/LLV8N

AD13

NC_20

GND_105

BCKP/TCON13/GREEN[1]

7

LVA3N/LLV7N/BLUE[0]

Y16 NC_15

AC16

S7M-PLUS_BASIC

+3.3V_Normal

8

NC_33 NC_47 NC_46

NC_30

FRC_DDR3_A12/DDR2_A8

2

LVA2P/LLV5P/BLUE[5] LVA2N/LLV5N/BLUE[4] LVA3P/LLV7P/BLUE[1]

W26

S7MR-PLUS

AD15

1

LVA1P/LLV4P/BLUE[7] LVA1N/LLV4N/BLUE[6]

NC_77 NC_65 NC_62

AB16 NC_26

AA14 AC15

NC_24

AF1

$0.199

AD1

AB25 AB24

AD7

AB15 NC_25

LVA0N/LLV3N/BLUE[8]

NC_50 NC_45 NC_34

LVBCLKN/LLV0N/GREEN[4] AF3 AF14

NC_42 NC_38

NC_17 AB15

LVA0P/LLV3P/BLUE[9]

AA26 AA25 AA24

AD19 TCON3/OE/GOE/GCLK2

NC_53

Y10 NC_11

LVACLKN/LLV6N/BLUE[2]

AC26

AF6

NC_69

AE19 AD21

NC_20

GND_105

AE16

A1

M22

S7MR_BASIC

LVACLKP/LLV6P/BLUE[3]

NC_78 NC_64

LVBCLKP/LLV0P/GREEN[5]

NC_58

IC101-*11 LGE107C-RP-1 [S7M+ BASIC]

A0

M20

SDA

+3.3V_Normal

R113 4.7K

FRC_RESET

SCL

HDCP_EEPROM_ON_SEMI_NEW

C107 0.1uF

22

IC101-*6 LGE107C-R-1 [S7MR BASIC]

NC_48

AC25

RLV5N/RED[2]

AE11

Y16 NC_15

AC16

Y11

AF1 AE3

AD5

NC_36 NC_67 NC_35

NC_30

AA15

AF16

NC_51

AB16 NC_26

AA14

AC14

AE1

W25 U26 U25

LVB4N/LLV0N/GREEN[0]

AE4 AD23 AE23

AD7

AC15

AA16

W26

NC_63

AD13

NC_42 NC_38

Y10

NC_25

AB26 AB25 AB24

AD19 TCON3/OE/GOE/GCLK2

NC_53

AE10

AF18

NC_20 NC_11

LVA0N/LLV3N/BLUE[8]

NC_50 NC_45 NC_34

LVBCLKN/LLV0N/GREEN[4] AF3 AF14

AF6

NC_59

AD18 AE18

LVA0P/LLV3P/BLUE[9]

AA26 AA25 AA24

NC_58 NC_69

AE19 AD21

AE20

LVACLKN/LLV6N/BLUE[2]

AC26

RLV5N/RED[2]

AE11

AD20

LVACLKP/LLV6P/BLUE[3]

NC_78 NC_64

LVBCLKP/LLV0P/GREEN[5]

AD5

NC_36 NC_67 NC_35

AE2

AF26

AE22

NC_48

AC25

NC_51

NC_17

AB14

AE1

W25 U26 U25

LVB4N/LLV0N/GREEN[0]

AE4 AD23 AE23

Y16 NC_15

AC16

W26

NC_63

NC_30

AB15 NC_24

LVA1P/LLV4P/BLUE[7] LVA1N/LLV4N/BLUE[6]

NC_77 NC_65 NC_62

AB16 NC_26

AA14

NC_17 NC_25

LVA0N/LLV3N/BLUE[8]

NC_50 NC_45 NC_34

LVBCLKN/LLV0N/GREEN[4] AF3 AF14

AD7

Y10

WP

LVA0P/LLV3P/BLUE[9]

AA26 AA25 AA24

NC_42 NC_38

AC15

NC_20 NC_11

LVACLKN/LLV6N/BLUE[2]

IC101-*5 LGE101RC-R [S7R RM]

AC26

AD19 TCON3/OE/GOE/GCLK2

NC_53

NC_59

AD18 AE18

LVACLKP/LLV6P/BLUE[3]

NC_78 NC_64

LVBCLKP/LLV0P/GREEN[5]

AF6

NC_69

AE19 AD21

AD20

NC_48

AC25

NC_58

Y16 NC_15 NC_31

AE8

AD14 AF15

V24 W24 Y26

RLV5N/RED[2]

AE11

AB16 NC_26 NC_19

WP

U24 V26 V25

AD5 RLV3P/RED[7] RLV3N/RED[6]

NC_30

VCC

AF1 AE3

LVB4N/LLV0N/GREEN[0]

RLV1N/LCK AF8 AD9

AD22

LVB2N/RLV8N/GREEN[6] LVB3P/LLV1P/GREEN[3] LVB3N/LLV1N/GREEN[2]

NC_36 NC_67 NC_35

AF25 AE24 AF24

AD7

NC_73

VCC

AF16

NC_51

AE2

AF26

NC_42 NC_38

NC_44 NC_61

LVB4P/LLV0P/GREEN[1]

AF4 AD4

AE22

LVB1P/RLV7P/GREEN[9] LVB1N/RLV7N/GREEN[8]

NC_60

AE4 AD23 AE23 AE25

LVB0N/RLV6N/RED[0]

LVB2P/RLV8P/GREEN[7]

AD24

AD19 TCON15/SCAN_BLK1

NC_76 NC_32

AF6 TCON3/OE/GOE/GCLK2

NC_53

AD1

LVB0P/RLV6P/RED[1] NC_66

AD13

AD25

RLV5N/RED[2] NC_69

IC104-*1 AT24C1024BN-SH-T

AB26 AB25 AB24

NC_58

AE6 AF11

AF3 AF14

AD5 RLV3P/RED[7] RLV3N/RED[6]

RLV1N/LCK

AF9

AE1

W25 U26 U25

NC_63

LVBCLKN/LLV0N/GREEN[4]

AA26 AA25 AA24

LVB4N/LLV0N/GREEN[0] NC_36 NC_67 NC_35

AE11

W26

IC101-*4 LGE101DC-R [S7R DIVX/MS10]

AC26 LVBCLKP/LLV0P/GREEN[5]

AC25

NC_51

AF8 AD9

IC104 M24M01-HRMN6TP

L20

S7R_DivX_MS10

IC101-*3 LGE101DC-R-1 [S7R DIVX]

NC_63

LVB0P/RLV6P/RED[1] NC_66

AE2

IC103 CAT24WC08W-T

PCM_A5

3D SG

ET_RXER

S7MR S7R_DivX

IC101-*2 LGE101C-R [S7R MS10]

LVB4P/LLV0P/GREEN[1]

AD5 AF4

EEPROM_1MBIT_ST

GPIO42

MPIF_D0

S7R

NC_16

AD4

HDCP_EEPROM_CATALYST_OLD

GPIO41

PCM_A4

3D SG

M_REMOTE_TX

K20

NC_17

AE4

Addr:10101--

GPIO40

PCM_A3

M_REMOTE_RX

L23

MPIF_D3

AE14

HDCP EEPROM

PCM_A2

NC_18

AE13

5

GPIO39

MPIF_D2

NC_32

4

PCM_A1

MPIF_D1

AD1

SDA

GPIO38

NC_19

AD13

5

R136

M_RFModule_RESET

3D SG

I/O1

LVBCLKN/LLV0N/GREEN[4]

4

N23

/RST-PHY

AF3

VSS

22

PCM_5V_CTL

AF14

GND

R135

DSUB_DET

AC26

SCL

M23

MODEL_OPT_3 I/O3

LVBCLKP/LLV0P/GREEN[5]

6

22

SC_RE1

I/O4

NC_63

3

SIDEAV_DET

NC_20

AD16

A2

R134

SC_RE2

TO SCART1

NC_21

AD15

6

GPIO37/UART3_TX

DDCA_CK/UART0_RX

VCC_2

P21

K21 GPIO36/UART3_RX

PCM_A0

TS1_D1

AE16

3

PCM_D6

NC_23

AF2

A2

I2C_SCL RGB_DDC_SDA

NC_24

AD2

7

I2C_SDA

NC_25

AD3

2

AA19

for SYSTEM/HDCP EEPROM&URSA3

AE15

NC_2

/F_RB

S7_NEC_RXD

AD14

7

/PF_WP

AD17

I/O7

AF15

2

AB19

S7_NEC_TXD

5V_DET_HDMI_4

L21

PCM_D5

TS0_D4

AF1

A1

AB21

22

AE3

8

22

AR103

PF_ALE

I/O8

AE1

1

/PF_OE

AA18

NC_26

AF16

NC_1

AB20

NC_27

S7R_MS10

8

/PF_CE1 /PF_WE

IC101-*1 LGE101C-R-1 [S7R BASIC]

1

AC17

NC_28

GPIO151/TCON8

5V_DET_HDMI_2

L22

AA9

/PF_CE0

NC_29

S7R_BASIC

NC

C108 0.1uF OPT

AR104

EAN61508001 IC102-*3 TC58NVG0S3ETA0BBBH

GPIO149/TCON6

PCM_D4

5V_DET_HDMI_1

M21

PCM_RESET

C109 0.1uF

R140 1K

NAND_FLASH_1G_HYNIX EAN35669102 IC102-*1 H27U1G8F2BTR-BC

P22

PCM_RST

NAND_FLASH_1G_TOSHIBA

PCM_D3

AA20

/PCM_WAIT NAND_FLASH_1G_SS

GPIO147/TCON4

AA17

/PCM_CE /PCM_IRQA

R133 10K

PCM_D2

PCM_REG_N

/PCM_IOWR R132 10K

GPIO145/TCON2

W22

/PCM_REG /PCM_OE

GPIO143/TCON0

PCM_D1

PCM_D7

PCM_A[10]

NC_17

N21 PCM_D0

U21

AUD_SCK

PWM0

NC_18

PCM_D[7]

PCM_A[9]

PWM1

C112 100pF 50V

22

NC_19

AC20

AUD_LRCH

AUD_MASTER_CLK_0

56

PCM_A[0]

I/O0

AC19

PCM_A[6]

PCM_A[3]

I/O3

AC18

PCM_D[6]

PCM_A[0]

NC_22 NC_21

PCM_D[4] PCM_D[5]

PCM_A[1]

+3.3V_Normal

C103 0.1uF

VSS_2

25

PCM_D[0] PCM_D[2]

PCM_A[6]

NC_25

38

12

Boot from SPI flash : 1’b0 Boot from NOR flash : 1’b1

PCM_A[7]

I/O6

R145 2.2K

NC_8

OPT

R108 1K

NC_7

7

AR101 I/O7

R144 2.2K

/PF_CE0

43

R143 3.3K

E

6

NC_26

R142 3.3K

R

44

R141 1K

RB

/PF_OE

45

5

PCM_D[0-7]

<T3 CHIP Config(AUD_LRCH)>

R123 OPT1K R125 OPT 1K

NC_6

4

IC101 PCM_A[0-7]

NC_27

46

R126 1K

1K

3.9K

NC_5

R109

R107

/F_RB

NC_4

3

NC_28

R124 1K

NC_3

48 NAND_FLASH_1G_NUMONYX EAN60762401 47 2 1

R117 1K

NC_2

R115 1K

/PF_CE0 H : Serial Flash L : NAND Flash /PF_CE1 H : 16 bit L : 8 bit

NC_29

R116 1K OPT R118 1K OPT R121 1K

NC_1

AB14

AB15 FRC_PWM0

AB14

FRC_PWM1

GP3_Saturn7M FLASH/EEPROM/GPIO

Ver. 0.1 1


MODEL_OPT_2

F7

NON_DVB_T2

MODEL_OPT_3

B6

HD

FHD

MODEL_OPT_5

D18

Ready

default

MODEL_OPT_4 MODEL_OPT_5

0

MODEL_OPT_6

MODEL_OPT_6

F9

0.1uF OPT

C4024

C4011

0.1uF

0.1uF

C4006

C4013

0.1uF

0.1uF

C299

0.1uF

0.1uF

C283

C292

0.1uF C280

OPT

S7M-PLUS_DivX_MS10 IC101 [S7M+ DIVX/MS10]

OLED

LCD

Normal Power 3.3V

--> MODEL_OPT_5, MODEL_OPT_6 : Only 3D_SG GPIO OUTPUT CONTROL

NO_FRC R227 1K

+3.3V_Normal

VDD33

H11 H12 VDD33_T/VDDP/U3_VD33_2:47mA

F1

F4

DDC_SCL_1

E6

HPD1

IP

A_RX1P

IM

A_RX1N

C1

CK-_HDMI2

D1

D0+_HDMI2

D2

D0-_HDMI2 D1+_HDMI2

E2 E3

D1-_HDMI2

F3

D2+_HDMI2

E1

D2-_HDMI2

D4

DDC_SDA_2

E4

DDC_SCL_2

D5

HPD2

V1 +3.3V_Normal

0.1uF C4020

0.1uF

0.1uF C4014

C4031

0.1uF

0.1uF

0.1uF

L227 BLM18PG121SN1D

Y2

A_RX2P

SSIF/SIFP

A_RX2N

SSIF/SIFM

DDCDA_DA/GPIO24

L215 BLM18PG121SN1D

C4064 0.1uF

U3

DDCDA_CK/GPIO23

QP

HOTPLUGA/GPIO19

QM

TP203

V3

Close to MSTAR

R4019 1K

TP204

R4020 10K

Y5 B_RXCP

IFAGC

B_RXCN

RF_TAGC

B_RX0P

IF_AGC_MAIN

Y4 TP205 U1

B_RX0N

TGPIO0/UPGAIN

B_RX1P

TGPIO1/DNGAIN

B_RX1N

TGPIO2/I2C_CLK

B_RX2P

TGPIO3/I2C_SDA

B_RX2N

AMP_SCL AMP_SDA 22

FULL_NIM R291 FULL_NIM R292

U2

XTALIN

DDCDB_CK/GPIO25

XTALOUT

VDD33

C4065 0.022uF 16V

TU/DEMOD_I2C DEMOD_SCL

22

FRC_LPLL:13mA FRC_LPLL

L206 BLM18PG121SN1D

DEMOD_SDA

R3

C261

HOTPLUGB/GPIO20

FRC L222 BLM18PG121SN1D

27pF

C262

N18 N19 N20 P18 P19 P20

FRCVDDC

C4045

1uF

L7

AA4

DDC_SCL_4

AC3

HPD4

DM_P0

C_RX1N

DP_P0 DM_P1

DDCDC_DA/GPIO28

DP_P1

B3 A1 B2 C2 C3 B4 C4 E5 D6

CEC_REMOTE_S7

DSUB_R+

R228

33

C204

0.047uF

K1

R229

68

C205

0.047uF

L3

R230

DSUB_G+ DSUB_B+

C206

0.047uF

K3

68

C207

0.047uF

K2

R232

33

C208

0.047uF

J3

68

10K

10K

R4023

R4026

33

R231 R233

SCART1_RGB/COMP1

G6

C209

0.047uF

J2

C210

1000pF

J1

D_RXCP

I2S_IN_SD/GPIO176

D_RXCN

I2S_IN_WS/GPIO174

D_RX0P

0.1uF

C4017

0.1uF

C4008

0.1uF

NEC_SDA

F13

Y15

VDD33_DVI

I2S_OUT_BCK/GPIO181

D_RX1P

I2S_OUT_MCK/GPIO179

D_RX1N

I2S_OUT_SD/GPIO182

D_RX2P

I2S_OUT_SD1/GPIO183

D_RX2N

I2S_OUT_SD2/GPIO184

DDCDD_DA/GPIO30

I2S_OUT_SD3/GPIO185

DDCDD_CK/GPIO29

I2S_OUT_WS/GPIO180

Normal 2.5V

AUD_SCK

E20

AUD_MASTER_CLK_0

D19

AUD_LRCH

F18

LED_DRIVER_D/L_SCL

E18

MODEL_OPT_4

D18

MODEL_OPT_5

E19

+2.5V_Normal

C236

N1 LINE_IN_0R

HSYNC0

LINE_IN_1L

VSYNC0

LINE_IN_1R

RIN0P

LINE_IN_2L

RIN0M

LINE_IN_2R

GIN0P

LINE_IN_3L

GIN0M

LINE_IN_3R

BIN0P

LINE_IN_4L

BIN0M

LINE_IN_4R

SOGIN0

LINE_IN_5L

P3

C237

P1

C238

2.2uF

P2

C239

P4

C4059

2.2uF 2.2uF

P5

C4060

2.2uF

R6

C242

2.2uF

T6

C243

2.2uF

U5

C244

2.2uF

V5

C245 C246

U6

AV_L_IN AV_R_IN

AU33

SIDEAV_L_IN SIDEAV_R_IN COMP2_L_IN COMP2_R_IN

P8

L212 BLM18PG121SN1D

PC_L_IN

AU25:10mA

2.2uF OPT 2.2uF OPT

R9

AVDD25_PGA:13mA

W20 VDD_RSDS

MICCM MICIN

VRP

TU_CVBS SC1_CVBS_IN AV_CVBS_IN SIDEAV_CVBS_IN

Delete CHB_CVBS_IN AV_CVBS_IN2 C203 1000pF OPT

C225

0.047uF

N4

R245

33

C226

0.047uF

N6

R246

33

C227

0.047uF

L4

R4016

33

C4057 0.047uF

L5

R248

33

C229

0.047uF

L6

R249

33

C230

0.047uF

M4

R250

33

C231

0.047uF

M5

R251

33

C232

0.047uF

K7

ET_RXD0 ET_TXD0

68

C233

0.047uF

CVBS4P

D21

CVBS5P

ET_RXD1

CVBS6P

ET_TXD1

ET_TX_EN ET_MDC ET_MDIO

VCOM0

HEAD_PHONE

HEAD_PHONE

ET_REF_CLK ET_TX_EN ET_MDC ET_MDIO ET_CRS

D22 F22 D23 F23

ET_CRS

GND_32 AVDD2P5_ADC_1

GND_33

AVDD2P5_ADC_2

GND_34

AVDD25_REF

GND_35 GND_37

GND_40 PVDD_1

GND_41

PVDD_2

GND_42 GND_43

C285

0.1uF

C4038

0.1uF

0.1uF

C4036

C4032

0.1uF

C4028

10uF

C4022

C4018

10uF

0.1uF

AVDD_DDR0

W14

AVDD_DVI_1

GND_50

AVDD_DVI_2

GND_51

AVDD3P3_CVBS

GND_52

AVDD_DMPLL

GND_53 GND_55

AVDD_AU33

GND_56

AVDD_EAR33

GND_57 GND_59

100

K8

IR

A4

GND_61 GND_62

VDDP_2

GND_63

VDDP_3

GND_64 GND_66

FRC_VD33_2_1

GND_67

FRC_VD33_2_2

GND_68 GND_69

FRC_AVDD_RSDS_1

GND_70

FRC_AVDD_RSDS_2

GND_71

FRC_AVDD_RSDS_3

GND_72 GND_73

FRC_AVDD

GND_74

FRC_AVDD_LPLL

GND_75

FRC_AVDD_MPLL

GND_76 GND_77

GND_81 AVDD_MEMPLL

GND_82

FRC_AVDD_MEMPLL

GND_83

AVDD_DDR_FRC

FRC

22

10K

R4017

R4018

OPT

10K

MVREF

GND_85

D16

AVDD_DDR0_D_1

GND_86

AVDD_DDR0_D_2

GND_87

AVDD_DDR0_D_3

GND_88

AVDD_DDR0_D_4

GND_89

AVDD_DDR0_C

GND_90 GND_91

F16

G17 H17

AVDD_DDR1_D_1

GND_92

AVDD_DDR1_D_2

GND_93

AVDD_DDR1_D_3

GND_94

AVDD_DDR1_D_4

GND_95

AVDD_DDR1_C

GND_96

AVDD_DDR_FRC

GND_98

AB11 AB12 AC11 AC12

FRC_AVDD_DDR_D_1

GND_99

FRC_AVDD_DDR_D_2

GND_100

FRC_AVDD_DDR_D_3

GND_101

FRC_AVDD_DDR_D_4

GND_102

FRC_AVDD_DDR_C

GND_103 GND_105

+1.26V_VDDC

GND_106

MIU1VDDC L226 BLM18SG700TN1D

+3.3V_Normal

FRC_RESET

C4063 10uF

FRC R205

U3_RESET

GND_78

RSDS Power OPT

SOC_RESET

Y17

GND_60

VDDP_1

D15

G16

L228 BLM18SG700TN1D

OPT R298

GND_47 GND_49

R19

F17

AVDD_DDR_FRC:55mA

C4066 10uF

G8

GND_44 GND_46

Y14

E16

AVDD_DDR0

0.1uF

TP206

GND_38

GND_104

10K

RESET

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

T20

AA12

R4006

IRINT

TP211

GND_30

+1.26V_VDDC FRCVDDC FRC L225 BLM18SG700TN1D

MVREF

GND_107

G15 MVREF

GND_109 GND_110

Y7

FRC

GND_108

Y8

NC_1

GND_FU

NC_2

PGA_VCOM

H10 H18 H19 J10 J17 J18 J19 K9 K10 K11 K12 K13 K14 K15 K16 K17 K18 L9 L10 L11 L12 L13 L14 L15 L16 L17 M9 M10 M11 M12 M13 M14 M15 M16 M17 N10 N11 N12 N13 N14 N15 N16 N17 P10 P11 P12 P13 P14 P15 P16 P17 R10 R11 R12 R13 R14 R15 R16 R17 R18 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 U10 U11 U12 U13 U14 U15 U16 U17 V7 V8 V9 V10 V11 V12 V13 V14 V15 V16 V17 V18 W7 W8 W9 W10 W11 W12 W13 W16 W17 W18 Y13 Y18 AA13 AB13 AC13 D17 H23 AF13 J9

L223 U9 BLM18SG121TN1D

FRC

C4056

F8

TESTPIN

OPT

OPT

OPT

MIU0VDDC AVLINK

0.1uF

OPT

Close to MSTAR

AV_CVBS_IN2

GND_29

DVDD_NODIE

GND_97

ET_RXD1 ET_TXD1

F21 E23

ET_REFCLK

N5

HP_ROUT

ET_RXD0 ET_TXD0

E22

+1.5V_FRC_DDR

HP_LOUT

5.6uH

E21

CVBS3P

CVBS_OUT1

H/P OUT

HEAD_PHONE

HEAD_PHONE

CVBS2P

CVBS_OUT2 R252

L205

R2

CVBS0P

M6 M7

DTV/MNT_VOUT

CM2012F5R6KT 5.6uH L203 CM2012F5R6KT

CVBS7P TP210

U18

E17

HP_OUT_1R CVBS1P

OPT

P6 R1

HP_OUT_1L

33

AVDD1P2

W19

E15

0.1uF

BIN2M SOGIN2

R244

GND_28

H9

C4058

0.047uF

VAG

C263 10uF

0.1uF

C248

M3

R7

BIN2P

C256 0.1uF

C4061 10uF

1000pF

L1

GIN2M

C253 1uF

C249 4.7uF

GND_26

GND_80

AVDD_DDR0

C241

C224

L2

VRM

OPT

1/16W 1%

0.047uF

M1

GIN2P

P7

C4042

0.047uF 0.047uF

RIN2M

1/16W 1%

C223

0.047uF

M2

L202 BLM18SG121TN1D

R4014 1K

68

N2

GND_25

T4 AUCOM

0.1uF R4015 1K

R242

C221 C222

0.047uF

RIN2P

GND_24

VDD33

AVDD_DDR0

0.1uF C240 FRC

R241

COMP2_Pb+

68 33

C220

N3

GND_23

FRC_VDDC_8

GND_84 C4009

R240

33

C219

0.047uF

AVDD_DDR0

0.1uF

COMP2_Y+

68

C218

AVDD_DDR1:55mA

0.1uF

R238 R239

33

FRC_VDDC_7

GND_79

AVDD_DDR0:55mA

C4010 FRC

R237

OPT

HSYNC2

FRC_VDD33_DDR

0.1uF

H5

T5 C234 OPT 2.2uF R5 C235 2.2uF

C4062

NON_EU

COMP2_Pr+

R4 MIC_DET_IN

C4003

0

GND_22

U19 U20

0.1uF

BIN1M SOGIN1

GND_21

FRC_VDDC_6

AVDD_DDR0

+1.5V_DDR

0.1uF

J5

TP209

0.1uF

1000pF

FRC_VDDC_5

FRC_VDD33_DDR

C4004 OPT

C217

GND_20

V20

DDR3 1.5V

0.1uF

J6

LINE_OUT_3R

SCART1_Rout

W5

C4046

0.047uF

BIN1P

Y3

C297

R236

C216

LINE_OUT_2R

0.1uF

SC1_SOG_IN

68

LINE_OUT_0R

GIN1M

C290

R258

C215

GIN1P

OPT

SC1_B+/COMP1_Pb+

H4

FRC

K6

TP208

0.1uF

0.047uF 0.047uF

V4

C298

C214

FRC_VDDC_4

GND_65

FRC_LPLL

C291

68 33

TP207

BLM18PG121SN1D

R256 R257

SCART1_Lout

W4

C281

J4

LINE_OUT_3L

10uF

0.047uF

LINE_OUT_2L

RIN1M

10uF

C213

RIN1P

W3

BLM18PG121SN1D

33

GND_19

AVDD33_T

FRC_AVDD

FRC

R255

U4 LINE_OUT_0L

10uF

K4

HSYNC1

10uF

0.047uF

GND_18

FRC_VDDC_3

T9

L219 BLM18PG121SN1D

PC_R_IN

C282

C212

FRC_VDDC_2

GND_58 VDD33

T8

L209

68

GND_17

T7 U7

AVDD25_PGA

+2.5V_Normal

AU25

+2.5V_Normal

C278

R254

FRC_VDDC_1

R8

FRC L210

K5

GND_16

GND_54

SC1/COMP1_R_IN

2.2uF

C247

V6

SC1/COMP1_L_IN

2.2uF 2.2uF

AVDD_DMPLL

AVDD2P5

AVDD2P5

AVDD2P5

HOTPLUGD/GPIO22

FRC

0.047uF

GND_15 FRC_VDDC_0

N9 N8

L211 BLM18PG121SN1D

C279

C211

GND_14

M8

P9 AVDD2P5/ADC2P5:162mA

AUD_LRCK

C272 4.7uF

SC1_G+/COMP1_Y+

33

B_DVDD

GND_48

NEC_SCL

AUDIO OUT

SC1_R+/COMP1_Pr+

R253

GND_13

AVDD_NODIE

D20

D_RX0N

VSYNC1

GND_12 A_DVDD

U8

G4 H6

GND_11

W15

V19

SC1_FB

GND_10

VDDC_11

COMP2_DET

F15

LINE_IN_5R

SC1_ID

VDDC_10

GND_45

AUDIO IN

DSUB_VSYNC

GND_9

AVDD25_PGA

AVDD_DMPLL

F14 I2S_IN_BCK/GPIO175

G5

VDDC_9

SIDE USB

LINE_IN_0L R4024 22 R4025 22

SIDE_USB_DP

DDCDC_CK/GPIO27

CEC/GPIO5

DSUB_HSYNC

AVDD25_PGA

I2S_I/F

B1

GND_8

L8

AVDD_DMPLL/AVDD_NODIE:7.362mA SIDE_USB_DM

AE17

GND_7

VDDC_8

GND_39 AVDD2P5

OPT

AF17

C_RX2N

HOTPLUGC/GPIO21

A3

A7

AVDD2P5

C_RX2P

A2

C4002

B7

C_RX1P

0.1uF

AB4

DDC_SDA_4

B/T USB

VDDC_7

AVDD_AU25

C4026

AC1

D2-_HDMI4

C_RX0N

AU25

C288 0.1uF

0.1uF

AC2

D2+_HDMI4

C287 10uF

C4027

D1-_HDMI4

SPDIF_OUT

C_RX0P

GND_6

GND_36

0.1uF

AB2

SPDIF_OUT/GPIO178

100

C295

AB3

R296

0.1uF

AA3

D0-_HDMI4 D1+_HDMI4

C_RXCN

G13

VDDC_6

H7 J7

C296

AB1

D0+_HDMI4

LED_DRIVER_D/L_SDA

0.1uF

CK-_HDMI4

SPDIF_IN/GPIO177

GND_5

GND_31

L217 BLM18PG121SN1D

C289 10uF

AA1

G14 C_RXCP

GND_4

VDDC_5

J11

27pF

C294

AA2

VDDC_4

GND_27

J8 CK+_HDMI4

GND_3

U3_DVDD_DDR

AVDD_DMPLL

L207 BLM18PG121SN1D

GND_2

VDDC_3

Y12

AVDD2P5

VDD33_DVI:163mA VDD33_DVI +3.3V_Normal

X201 24MHz

M19

FRC_VDD33_DDR:50mA VDD33 FRC_VDD33_DDR

FRC_MPLL:4mA

OPT

TU_SDA

T1

FRC

M18

FRC

TU_SCL

T3 T2

DDCDB_DA/GPIO26

C4015 0.1uF OPT

Y1

GND_1

VDDC_2

L19

L221 BLM18PG121SN1D

0.1uF

A_RX0N

K19

MIU1VDDC

V2

D3 CK+_HDMI2

FRC_AVDD

C4040

F5

DDC_SDA_1

+2.5V_Normal

AU33

G18 VDDC_1

H16

MIU0VDDC

0.1uF

H2

D2-_HDMI1

FRC_AVDD:60mA

C4041

D2+_HDMI1

J16

AU33:31mA

0.1uF

H1

AVDD_MEMPLL:24mA VDD33

A_RX0P

J15

C4023

G1

D1-_HDMI1

TP202

J13

L18

0.1uF

H3

W1

OPT

J14

J12

C4016

D0-_HDMI1 D1+_HDMI1

VIFM

47

OPT

H15

C4025

0.1uF R4003

TU_SIF

OPT

0.1uF

G3

VIFP

A_RXCN

47

OPT

C286

D0+_HDMI1

A_RXCP

1M

G2

IF_N_MSTAR

C4012

0.1uF R4002

ANALOG SIF Close to MSTAR

TP201

R287

F2

CK-_HDMI1

W2

0.1uF

C4001 10uF

C250

C258

IF_P_MSTAR

C4007

100

0.1uF

C293 10uF

R289

C257

H13 H14

C284 10uF

100

0.1uF

R288

C4044

DTV_IF

Close to MSTAR

0.1uF

PHM_OFF R212 1K

1K HD R207

NON_DVB_T2 R209 1K

50/60Hz LVDS R297 1K

R293 OPT 1K

1K OPT R215

OPT

LGE107DC-RP +1.26V_VDDC

L204 BLM18PG121SN1D

CK+_HDMI1

HDMI

OPT

-->In case of GP2, This port was used for GIP/NON_GIP

C251

DSUB

C4005 0.1uF

DVB_T2

S7M-PLUS_DivX_MS10 IC101 LGE107DC-RP [S7M+ DIVX/MS10]

COMP2

FRC

VDDC : 2026mA

MODEL_OPT_2 MODEL_OPT_3

3D_SG

CVBS In/OUT

L214 BLM18PG121SN1D

VDD33

--> This option is only applied in EU. In case of NON_EU, default value set LOW.

10uF

PHM_OFF

PHM_ON

0.1uF

C5

C276

MODEL_OPT_1

+2.5V_Normal

LOW LOW HIGH HIGH

C277

100/120Hz LVDS

10uF

50/60Hz LVDS

10uF

E18

: LOW : HIGH :HIGH : LOW

C275

MODEL_OPT_4

OPT_0 OPT_4 NO_FRC U3_INTERNAL U5_EXTERNALBOOT reserved for FRC

C4043

R216

3D_GPIO_2

FRC_HW_OPT

+1.26V_VDDC

VDDC 1.26V

C228

PHM_ON R211 1K

FRC_H/W_OPT R226 1K

1K

DVB_T2 R208 1K

MODEL_OPT_1

100 OPT 100 OPT 0 3D_SG

HIGH

NO FRC

1000pF

R213

3D_GPIO_1

LOW

G19

OPT C264

R204 R210

PIN NO.

MODEL_OPT_0

R203 RF_SW_OPT 100

RF_SWITCH_CTL

PIN NAME MODEL_OPT_0

C268 4.7uF

LNA2_CTL

FHD R206

1K

1K IF_AGC_SEL

100/120Hz LVDS R294 1K

OPT R295

OPT R214 OPT 100 R201 R202 BOOSTER_OPT100

+1.26V_VDDC

VDD_RSDS:88mA VDD_RSDS OPT L213 BLM18PG121SN1D

0.1uF

MODEL OPTION MODEL OPTION

C4019

RSDS Power OPT

+3.3V_Normal

GP2R MAIN2, HW OPT

20101023 2


EAN61829001

EAN61857101

FRC_DDR_1600_HYNIX

P7

FRC_DDR_1333_SS_NEW

P2 R8 T8 R3

+1.5V_FRC_DDR

L7 R7 N7 T3

L8

T8

A8

R3

B2

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5 VDD_6

M7 A15

VDD_7 VDD_8

M2

Close to DDR Power Pin

BA0

N8

K9

C-TMA6

C-MA4

C-TMA4

C-MBA1

C-TMBA1

N1 N9 R1 R9

VDD_3

A11

VDD_4

A12/BC

VDD_5

C1 C9 D2 E9 F1 H2 H9

L1 L9 T7

L7 R7 N7 T3

M2 BA0

N8 M3

CK

VDDQ_3

CK

VDDQ_4

CKE

K7

CS

VDDQ_7

ODT

VDDQ_8

RAS

VDDQ_9

CAS

K1 J3 K3 L3

WE NC_1

G8 J2 J8 M1 M9 P1 P9 T1 T9

T2 RESET

F3 DQSL

G3 C7

DQSU

D1 D8 E2 E8 F9 G1 G9

B7

DQSU

VSS_3

E7

VSS_4

DML

VSS_5

DMU

VSS_6

D3 E3

VSS_7

DQL0

VSS_8

DQL1

VSS_9

DQL2

VSS_10

DQL3

VSS_11

DQL4

VSS_12

DQL5

F7 F2 F8 H3 H8 G2 H7

DQL7

B1

C-MA11

C-TMA11

AD15 AE16

A2P/RLV2P/RED[5]

FRC_DDR3_A7/DDR2_A5

A2M/RLV2N/RED[4]

FRC_DDR3_A8/DDR2_A2

A3P/RLV4P/RED[1]

FRC_DDR3_A9/DDR2_A9

A3M/RLV4N/RED[0]

FRC_DDR3_A10/DDR2_A11

A4P/RLV5P/GREEN[9]

FRC_DDR3_A11/DDR2_A4

A4M/RLV5N/GREEN[8]

C-MA5 C-MA6 C-MA7

C-TMBA2

C-MA7

C-TMA7

C-MRESETB

C-TMRESETB

AD1

AE14 AE13

C-TMCKB

C-TMCKB

C-MCKB 22

B1M/RLV7N/GREEN[4] B2P/RLV8P/GREEN[3]

FRC_DDR3_MCLK/DDR2_MCLK

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ

B3P/TCON11/BLUE[9]

FRC_DDR3_MCLKZ/DDR2_MCLKZ

B3M/TCON10/BLUE[8]

C-TMCKE

C-TMODT

AD5 AF4

C-TMCASB

AD4

C-TMWEB

22 C-TMRASB

C-MRASB

FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_CASZ/DDR2_CKE FRC_DDR3_WEZ/DDR2_BA0

C-MCKB

AE2

C-TMRESETB

C-TMDQSL

C-MODT

C-TMODT

C-TMDQSLB

C-MWEB

C-TMWEB C-TMBA0

FRC_DDR3_RESETB/DDR2_A3

22

AD9

FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

C2M/LLV2N/BLUE[0] C3P/LLV4P

AE9

C-TMDQSU

AF9

C-TMDQSUB C-TMDQSL

FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

C4P/LLV5P

C-MCASB C-MWEB

VCC1.5V_U3_DDR R333 10K

C-MDQSL C-MDQSLB

22 R314 C-TMDQSUB

C-MDQSUB C-MDML

C-TMDQL4 C-TMDQL5 C-TMDMU

22 C-TMDQL7

C-MDQL3

C-TMDQL3

C-MDQL1

C-TMDQL1 C-TMDML

C-MDML

C-MDQL0

C-TMDQL0

C-MDQL1

C-MDQL2

C-TMDQL2

C-MDQL3

C-MDQL4

AE12

C-TMDQL6

FRC_DDR3_DQL0/DDR2_DQ6 FRC_DDR3_DQL1/DDR2_DQ0

D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

D3P/TCON3 D3M/TCON2

AE10

C-TMDQU0

AF7

C-TMDQU1

AD11

C-TMDQU2

AD7 AD10 AE7

C-TMDQU5

AF10

C-TMDQU6

AD8

C-TMDQU7

DCKM/TCON4

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

FRC_DDR3_DQU1/DDR2_DQ14

D4M/TCON0

FRC_DDR3_DQU3/DDR2_DQ12 FRC_DDR3_DQU4/DDR2_DQ15 FRC_DDR3_DQU5/DDR2_DQ9

Y26

RXB3-

Y25 Y24

F2 F8

AA24 AB26 AB25 AB24 AC24 AD26 AD25 AD24

D7

VSSQ_2

DQU0

VSSQ_3

DQU1

VSSQ_4

DQU2

VSSQ_5

DQU3

VSSQ_6

DQU4

VSSQ_7

DQU5

VSSQ_8

DQU6

VSSQ_9

DQU7

C3 C8 C2 A7 A2 B8 A3

C-MDQU0 C-MDQU1 C-MDQU2 C-MDQU3

C-MDQU7

G3

DML

VSS_4

DMU

VSS_5

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

D7 C3

RXA1-

C8

RXA2+

C2

RXA2-

A7

RXA3+

A2

RXA3-

B8

RXA4+

A3

RXA4-

GPIO2/TCON7/LDE/GCLK4

FRC_DDR3_DQU7/DDR2_DQM1

GPIO3/TCON6/LCK/GCLK2

FRC_SPI_CZ FRC_GPIO1

C-TMDQL5

C-TMDQU2

C-MDQU6

C-TMDQU6

C-MDQU0

C-TMDQU0 C-TMDQU4 22 AR309

B7

B3 E1

C-MDQU1

C-TMDQU1

C-MDQU5

C-TMDQU5 C-TMDQU3 22

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

VSSQ_2 VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

J7

C9

K7

D2

K9

F1

L2

H2

K1

H9

J3 K3

J1

L3

D3

J2 J8

VSS_5

F7

M9

F2

P1

F8

P9

H3

T1

H8

T9

G2

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

C3

D1

C8

D8

C2

E2

A7

E8

A2

F9

B8

G1

A3

G9

B3

C7

E1

B7

J2

E7

J8

D3

M1 M9

E3

P1

F7

P9

F2

T1

F8

T9

H3 H8

DQL6

G2 H7

B1 VSSQ_1

D7

B9

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

FRC_L/DIM 33 R332

FRC_GPIO8 FRC_SPI_DO

AE8 FRC_DDR3_NC/DDR2_DQM0

R317 820

Y11

S7M-R

Y19

R317-*1 4.7K S7M-PLUS

NC_6

VDD_5 VDD_6 VDD_7 VDD_8

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4 VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

NC_2 NC_4

DQSL

VSS_1

DQSU

VSS_2 VSS_3

DML

VSS_4

DMU

VSS_5 VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

DQL7

B9 D1

D7

D8

C3

E2

C8

E8

C2 A7

F9 G1

A2

G9

B8 A3

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

RXC4+

AF22

RXC4-

+3.3V_Normal

RXDCK+

AE19

RXDCK-

AD21

RXD0+

AE21

RXD0-

AF21

RXD1+

AD20

RXD1-

AE20

RXD2+

AF20

RXD2-

AF19

RXD3+

AD18

RXD4+

AF18

RXD4-

AB23 AC23 AC22

FRC_MODEL_OPT_0 FRC_MODEL_OPT_1 FRC_MODEL_OPT_2 2D/3D_CTL

(FRC_CONF0) HIGH : I2C ADR = B8 LOW : I2C ADR = B4

(FRC_CONF1,FRC_PWM1, FRC_PWM0) FRC_MODEL_OPT_1

3’d5 : boot from internal SRAM 3’d6 : boot from EEPROM 3’d7 : boot form SPI flash

FRC_MODEL_OPT_2

RXD3-

AE18

<U3 CHIP Config>

FRC_MODEL_OPT_0

2D/3D_CTL

AA14 AC15

+3.3V_Normal

FRC_CONF0 FRC_CONF1 FRC_PWM1

AC16

FRC_PWM0

FRC_/SPI_CS FRC_CONF0 R300 33 FRC_L/DIM

L/DIM_SCLK

FRC_CONF1

AC14

R348 33 FRC_L/DIM

FRC_SPI1_DI

FRC_SPI_SDO L/DIM_MOSI

AA16 FRC_VSYNC_LIKE

FRC_SPI_CK

FRC_TESTPIN

FRC_SPI_DI

FRC_SPI_SCK

AA15

FRC_SPI_SDI R326 22 R331 22

Y10 FRC_I2CS_DA

AA11

FRC_I2CS_CK AB15 FRC_PWM0

AB14

R335 FRC_PWM0

FRC FRC 22

I2C_SDA I2C_SCL FRC_SCL

OPT

FRC_PWM1 R334 OPT

22

FRC_SDA

+3.3V_Normal +3.3V_Normal S7M-PLUS_S_FLASH_2MBIT_WIN

R344 0

S7M-PLUS

3D_SYNC_RF 3D_SG

R329 10 FRC_/SPI_CS

FRC_SPI_SDO

R330 10

IC302 W25X20BVSNIG CS

DO

1

$ 0.17

8

2

7

3

6

4

5

VCC

HOLD

S7M-PLUS WP

GND

CLK

S7M-PLUS R328 10

DIO

R327 10

FRC_SPI_SCK

S7M-PLUS

GP2R FRC_DDR

A8 C1 C9 D2 E9 F1 H2 H9

J9 L1 L9 T7

B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 VSSQ_1

DQU0

RXC3-

AE22

R9

DQL6

RXC3+

AD22

R1

A9 DQSU

RXC2-

AF23

N9

NC_7

RXC2+

AF24

N1

J1 NC_1

RXC1-

AE24

K8

A1 VDDQ_1

CK

RXC1+

AF25

K2

BA1

RXC0-

AF26

G7

VDD_9

BA0

RXC0+

AE25

D9

DQSL

G8

VSS_6

E3

M1

VDD_4

F3

VSS_3 DMU

VDD_3

A12

NC_3

A9

VSS_4

A11

T7 G3

VSS_2

VDD_2

RESET

L9

NC_6

DML

VDD_1

A10/AP

T2

L1

NC_4

DQSU

B2

A9

WE

J9

NC_2

VSS_1

A8

RXCCK-

AE26

Y16 V_SYNC

FRC_PWM1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

C1

E9

NC_1

DQSU

A7

BA2

A8

VDDQ_5

E7

G8

C-TMDQU7

C-MDQU3

VDDQ_4

L8 ZQ

A6

RXCCK+

AE23

FRC_SPI1_CK

C-MDQU2

C-MDQU7

CKE

DQSL

M3

AB16

22

C-MDQU4

VDDQ_1 VDDQ_3

A5

M2 A1

VDDQ_2

A4

NC_5

N8

CK

H1 VREFDQ

A3

M7

R9

DQL7 VSSQ_1

T3

R1

C7

B1

DQU1

N7

DQSL

H7

DQU0

K8

VDD_9

CK

F3

C-TMDQL4

C-MDQL5

C-MDQU4 C-MDQU5 C-MDQU6

VSS_2

DQL7

RXA0-

VDD_7

NC_3

T7

R7

BA1

RESET

L9

L7

K2

N9

VDD_8 BA0

R3

G7

N1

VDD_6

L1

DQL6

H7

RXA1+

AR308

VSSQ_1

G2

RXA0+

AA25

VSS_1

DQSU

VSS_6

F7

RXB4-

RXACK-

AA26

DQSU

E3

RXB4+

RXACK+

J9

NC_6

VSS_3

H8

AC25

AB22 GPIO0/TCON15/HSYNC/VDD_ODD GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU6/DDR2_DQ10

R316

C-MDQL5 C-MDQL7

D3

VDD_5

T2

FRC_DDR3_DQU2/DDR2_DQ13

22

C-MDQL4 C-MDQL6

AF5

C-TMDQL6

C-TMDQU4

C-MDQL0

C-MDQL6

AE5 AF12

C-TMDQU3

22 AR307

C-MDQL2

AD12

C-TMDQL7

C-MDQL7

C-MDMU

AD6

C-TMDQL3

22 C-MDMU

AF11

C-TMDQL1

R315

RXB2+ RXB3+

AD19 DCKP/TCON5

AE6

C-TMDQL2

AR306 C-MDQSU

FRC_DDR3_DMU/DDR2_DQ11

C-TMDQL0 C-TMDQSU

C-MDQSU

C-MRESETB

AF6

C-TMDMU

22 R313

E7

VDD_4

A13

WE

FRC_DDR3_DML/DDR2_DQ7

C-TMDQSLB

C-MDQSLB

B7

RXB2-

W24

C4M/LLV5N

AE11

C-TMDML

22 R312

C-MRASB

C0M/LLV0N/BLUE[4] C1M/LLV1N/BLUE[2]

AF8

R311 C-MDQSL C-MODT

CCKM/LLV3N

C1P/LLV1P/BLUE[3] C-TMCASB

C-MBA0

V24

AD23 CCKP/LLV3P C0P/LLV0P/BLUE[5]

AR305 C-MCASB

RXB0RXB1-

A12/BC

D9

A2

FRC_DDR3_ODT/DDR2_BA1

22

C-MBA1 C-MBA2

V25

L3

A9

RXB1+

V26

B4M/TCON8/BLUE[6]

AE4

C-TMRASB

C-MCKE

C-MBA0

B1P/RLV7P/GREEN[5]

FRC_DDR3_BA2/DDR2_A12

B4P/TCON9/BLUE[7]

22 R308

C-MA12

B0M/RLV6N/GREEN[6]

FRC_DDR3_BA1/DDR2_ODT

C-TMCK

C-MCK

C-MA11

FRC_DDR3_BA0/DDR2_BA2

AD13

C-TMCKE

R307

C-MA9

AF14

C-TMCK

22

B0P/RLV6P/GREEN[7]

AF3

C-TMBA0 C-TMBA1

C-TMA5

DQSL

H3

BCKM/TCON12/GREEN[0]

C-TMA3

C-MA10

U24

FRC_DDR3_A12/DDR2_A8 BCKP/TCON13/GREEN[1]

C-MA3

C-MA8

U25

AC26

C-MA5

C-MDQSUB

NC_4

DQL6

B9

C-MA4

NC_3

VSS_2

AD16

C-TMA12

AR304

C-MA3

K9

DQSL

E1

C-TMA1

L2

VDDQ_6

VSS_1

C-MA1

C-MCKE

VDDQ_5

A9 B3

C-TMA9

FRC_DDR3_A6/DDR2_A0

22

C-MCK J7

VDDQ_2

NC_6

AD2

R310

VDDQ_1

NC_2

C-TMA12

R309

BA2

J1 J9

R3

C-MA12

C-MA2

M7

BA1 A1 A8

T8

AE15

C-TMA10 C-TMA10

NC_5

VDD_8 VDD_9

C-TMA7 C-TMA8

C-TMA11

C-MA10

A13

VDD_6 VDD_7

R2

AF2

A1M/RLV1N/RED[6]

VDD_3

R323 1K

C-MA6

AF15

C-TMA6

A1P/RLV1P/RED[7]

FRC_DDR3_A5/DDR2_A10

C7

VDD_2

A11

A1

R322 OPT1K

C-TMA8

A0M/RLV0N/RED[8]

FRC_DDR3_A4/DDR2_CASZ

H9

DQSL

RXB0+

VDD_1

A10/AP

FRC

C-MA8

FRC_DDR3_A3/DDR2_A1

NC_4

RXBCK-

U26

A9

T8

R324 OPT 1K

K8

A10/AP

R8

AD3

A0P/RLV0P/RED[9]

R2

VREFCA

A0

R318 FRC 1K

K2

VDD_2

A9

P2

AD14

C-TMA5

ACKM/RLV3N/RED[2]

FRC_DDR3_A2/DDR2_A7

R8 B2

R320 FRC 1K R321 1K

G7

VDD_1

P8

C-MA1

AE3

C-TMA3 C-TMA4

FRC_DDR3_A1/DDR2_A6

ZQ

A8

S7M-PLUS

D9

N2

C-MA0

AF1

K3

P2

A7

R319 OPT1K R325 1K

A8

P3

NC_2

F3

W25

J3

H2

J1 NC_1

G3

P8

S7M-R

A7 B2

VCC1.5V_U3_DDR

A6

VDDQ_9

F1

R336 1K

ZQ 240 1%

CAS

K1

L/DIM_EDGE_32/37

A5

L8

P7

150

R303

VDDQ_8

E9

R337 1K

A4

RAS

RESET

RXBCK+

N2 L8

A6

L2

4.7K

A3

VDDQ_7

D2

R350

A2 VREFDQ

ODT

C9

OPT

N3

H1

VDDQ_6

K9

L/DIM_EDGE_42/47/55

C-TMBA2

AR303

OPT R306

C-MVREFDQ

CS

K7

C1

P3

H1 VREFDQ

A5

J7

A8

R340 LVDS_EXT_URSA5 1K R338 OPT 1K

C-TMA2

AF16

ACKP/RLV3P/RED[3]

N8

LVDS_S7M-PLUS

C-TMA1

C-TMA0

22

FRC_DDR_1333_HYNIX A1

VDDQ_4

T2

W26 FRC_DDR3_A0/DDR2_NC

R9

P7

A4

M2

OPT

C-TMA2

C-MA0

IC301 H5TQ1G63DFR-H9C

A0

L3

A3

M8

N3

A2

NC_5

R1

OPT

C-MA2

22 AR302

EAN61828901

VREFCA

K3

AE1

C-TMA0

N9

FRC_DDR_1333_NANYA_NEW

VREFCA

A1

M7

R349 S7M-PLUS 10K

1000pF

0.1uF C314

C-TMA9

N1

R339 1K

1K 1%

R301

R304 R305

1K

C312

AR301 C-MA9

C-MBA2

C-MVREFCA

CKE

NC_3

CLose to Saturn7M IC

M8

VDDQ_3

WE

1%

1000pF

0.1uF C302

C304

1% 1K

R302

1K 1%

J3

CLose to DDR3

VDDQ_2

CK

VDDQ_5

K1

IC101 LGE107DC-RP [S7M+ DIVX/MS10]

T3

K8

A1

CK

L2

C-MVREFCA

K2

M8 A0

BA2 VDDQ_1

K7

C-MVREFDQ

N7

M3

J7

S7M-PLUS_DivX_MS10

R7

G7

VDD_9

BA2

VCC1.5V_U3_DDR

L7

D9

BA1

M3

VCC1.5V_U3_DDR

R2

ZQ

A7

R341 1K

OPT

C325 0.1uF 16V

R8

R342 1K

C324 10uF 10V

P2

A5

R343 1K

0.1uF

0.1uF

C323

0.1uF

C322

0.1uF

C321

0.1uF

C320

0.1uF

C319

0.1uF

C318

0.1uF

C317

0.1uF C316

0.1uF C315

0.1uF

C313

0.1uF

C311

0.1uF

C310

0.1uF

C309

0.1uF

C308

0.1uF

C307

0.1uF

C306

0.1uF

C305

C303

10uF

C301

L301

P8

VREFDQ

A4 A6

R2 VCC1.5V_U3_DDR

N2

H1

A3

P8

DDR3 1.5V By CAP - Place these Caps near Memory

P3

A2

N2

VCC1.5V_U3_DDR

P7

VREFCA

A1

P3

IC301-*4 NT5CB64M16DP-CF

N3

M8

N3 A0

EAN61857201

IC301-*3 K4B1G1646G-BCH9

IC301-*2 H5TQ1G63DFR-PBC

FRC_SPI_SDI

20101023 3

B9 D1 D8 E2 E8 F9 G1 G9


ST_3.5V--> 3.375V --> 3.46V 20V-->3.51V --> 3.76V (3.59V)

R450 0

PD_+12V 1%

R448 2.7K C412 0.1uF 16V PD_+12V

POWER_+24V

3

2

1%

R482 8.2K

PD_+12V R480 100

RESET

1 GND

PD_+12V_PWR_DET_ON_SEMI

R440 5.6K

Power_DET

+3.3V_Normal

S7M DDR 1.5V

OPT

R421 10K

Q405 2SC3052

E

R427 10K OPT

POWER_18_A_DIM 0 R451

L420

R484 0

VIN_1

1

VIN_2

2

GND_1

3

PWM_DIM C461 10uF 10V

C468 0.1uF 16V

GND_2

11

PH_2

10 IC407 TPS54319TRE 9

PH_1

THERMAL 17

4

5

R606-*1 1K PWM_PULL-DOWN_1K

+3.3V_Normal

C492 0.1uF AGND 16V

L423 3.6uH

C472 22uF 10V

C465

C470 0.1uF 16V

C476 22uF 10V

0.01uF 50V

R1

R452 1/16W 330K 5%

8

2

7

LX_2

1/16W

L424 CIC21J501NE

5%

3A

3

6

LX_1

POWER_ON/OFF2_2

EN

R456 10K

C459 10uF 25V

FB

5

4

COMP 12K R454

C469 22uF 16V

R1

C485 0.1uF 16V

C473 0.1uF 16V

OPT C423 100pF 50V

2200pF C464

C463 100pF 50V

C467 4700pF

R455 15K ERROR_OUT

C457 10uF 25V

NR8040T3R6N

R2

Vout=(1+R1/R2)*0.8

50V

R2

100

R420

1

NR8040T3R6N

SS/TR

OPT

R486 4.7K

100

POWER_24_ERROR_OUT

PGND

VIN

PH_3

POWER_20_ERROR_OUT R437

+1.5V_DDR

1934 mA L421 3.6uH

16V

12

AGND

R471 0 PWM_PULL-DOWN_3.9K POWER_22_PWM_DIM R606 3.9K C416 OPT 0.1uF 16V

C462 0.1uF

A_DIM

POWER_20_A_DIM 0 POWER_20_PWM_DIM R453 POWER_24_PWM_DIM R472 0

IC405 AOZ1073AIL-3

0.1uF 16V

+3.5V_ST

POWER_22_A_DIM R485 0

+3.3V_Normal

+12V/+15V C475

INV_CTL

R460 27K

B

R462 10K

C R418 POWER_24_INV_CTL 6.8K

+3.3V_Normal

1074 mA

POWER_ON/OFF1

OPT

R425 100

L416

R426 10K

R461 4.7K

+3.5V_ST

R419 1K

POWER_18_INV_CTL R415 100

R457

POWER_24_GND R475 0

SLIM_32~52 P401 SMAW200-H24S2

VCC

BOOT

Err OUT

PWRGD

24

13

23

14

P.DIM1

GND/P.DIM2

7

A.DIM

22

8

INV ON

20

COMP

18

21

RT/CLK

17 19

12V

OPT

E

NCP803SN293

R407 2.2K OPT

1:AK10

0

12V 12V

E

R435 22K

Q406 2SC3052

R405 2.2K

C455 0.1uF 16V

1%

16

R429 47K B

PANEL_CTL

C474 0.1uF

PD_+12V

1%

15

GND/V-sync

POWER_DET

PWR_DET_ON_SEMI

1%

GND

R404

1%

3.5V

14

POWER_+24V

Q407 2SC3052

C

R402 100

RESET

100K IC409

R403 1.5K

12

13

25

R476 0

D

S 11

GND

POWER_23_GND

L402-*1 CIS21J121

R439 33K

3.5V GND

C407 0.1uF 16V OPT

C404 0.1uF 16V

3.5V

GND

+24V

C

10K R464

10

2

G C451 0.1uF 50V 1608 OPT

B

EN

9

OPT R430 10K

C426 68uF 35V

VIN_3

3.5V

C418 0.1uF 50V

15

GND

6

8

VSENSE

7

EP[GND]

GND

GND

16

6

C408 0.1uF 16V OPT

L402 MLB-201209-0120P-N2

24V 24V

5

3 1

+24V

L407 MLB-201209-0120P-N2

POWER_16_GND

C406 0.1uF 16V

2 4

GND

+12V/+15V

C402 100uF 16V

L407-*1 CIS21J121

R412

PWR ON 1 24V 3

L404 MLB-201209-0120P-N2

C401 100uF 16V

NORMAL_32 P404 FM20020-24

R431 22K

L404-*1 CIS21J121

E

+3.5V_ST

NORMAL_EXPEPT_32 P403 FW20020-24S

2 Q401 2SC3052

B

C411 0.1uF 16V

PANEL_VCC C443 10uF 25V

47K 1%

C

R401 10K

RL_ON

3

IC408 NCP803SN293 VCC

Q409 AO3407A

Q402

1

R407-*1 3K

PANEL_DISCHARGE_RES PANEL_DISCHARGE_RES

New item

1/10W 1% PD_+12V

C442 10uF 16V OPT

C438 0.1uF 16V

RT1P141C-T112

R406 4.7K

+3.5V_ST R488 100K OPT R463 10K

L412

R405-*1 3K

0.01uF C409 C436 0.015uF 0.01uF 50V 25V

+3.5V_ST -> 3.375V

+3.5V_ST

12V -->3.58V --> 3.82V (3.68V) 18.5V-->3.5V --> 3.75V (3.59V)

0.015uF +3.5V_ST

+12V/+15V

24V-->3.78V --> 3.92V (3.79V)

R447 1.21K

FROM LIPS & POWER B/D

PANEL_POWER

PD_+3.5V 5%

+12V/+15V

R449 56K 1/16W

1% 3A $ 0.145 Vout=0.827*(1+R1/R2)=1.521V

<MODULE PIN MAP>

18

INV_ON

A-DIM

INV_ON

20

VBR-A

NC

GND

INV_ON

TP5303

V_SYNC

TP5304

SCAN_BLK2

INV_ON

+2.5V/+1.8V

SCAN_BLK1/OPC_OUT

TP5305

+3.3V_Normal 52/60:ERROR

Err_out

26/32HD:NC

TP5306

Err_out

OPC_OUT

IC402

PGND

23

C490 0.1uF AGND 16V

Err_out INV_ON PWM_DIM GND

GND

GND

GND

VIN

NC

60:NC 26/32/52:GND 60:PWM

VOUT

1 Vd=550mV3

300 mA

2

PWM_DIM

C432 0.1uF 16V

GND

<LED MODULE PIN MAP -> latest update 20100618> 32LE5300-TA CMO10"LED

(PSU) NC

32LE4500-TA AUO 10"LED

NC

16

NC

18

INV_ON

INV_ON INV_ON

INV_ON

20

NC

err_out err_out --> NC --> NC

NC

22

PWM_DIM

24

err_out --> NC PWM_DIM PWM_DIM

23

NC

NC

NC

INV #11 #12 #13 #14

(PSU)

NC

NC

7

3

2A

6

LX_1

POWER_ON/OFF2_2

EN

FB

5

4

COMP 12K R458

<--> <--> <--> <--> <-->

2200pF C466

Vout=0.8*(1+R1/R2)

MAIN #24 #18 #20 #22

R1

C471 22uF 16V

C477 0.1uF 16V

OPT C427 100pF 50V

C440 0.1uF 16V

<Module Inv to Main Pin Connection>

32LE5300-TA LGD 10"LED

(PSU)

2

L422 3.6uH

LX_2

GND C403 10uF 10V

PIN No LGD LPB/ OS LPB

8

R459 10K

C460 10uF 25V

C458 10uF 25V

1

NC

R473

24

PWM_DIM PWM_DIM

1

NR8040T3R6N VIN

+2.5V_Normal

AZ2940D-2.5TRE1

26/32/52:PWM

22

MAX 1A

IC406 AOZ1072AI-3

1%

GND

R465 24K

GND

+12V/+15V

1%

GND

+5V_Normal

OLP

TP5302

R466 51K

GND

16

IPS-@ (PSU)

1%

SHARP (PSU)

AUO 10"Lamp

R467 10K

(PSU)

CMO10"Lamp

L417

LGD(PSU) or LIPS

(PSU)

PIN No

R2

+5V_TUNER IC410 AP1117EG-13

PWM_DIM

IN

NC

OUT

IN

ADJ/GND

err_out --> NC

S7M core 1.26V volt

NC

C491 0.1uF 50V

IC411 AP1117EG-13

+5V_Normal

110 R417

330 R411

C414 0.1uF 16V

R424 1 5% C422 0.1uF 50V

C415 10uF 10V

330 R409

110 R408

C417 0.1uF 16V

10K R445

POWER_ON/OFF2_1

OUT

ADJ/GND

R422 1 5%

LGD edge led error-out use or not? checking is necessary...

C419 10uF 10V

C447 0.1uF 16V

+3.5V_ST

2200pF C413

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BOOT

0.01uF 50V R432 1/16W 330K 5%

1/16W

5%

R1

50V 100pF C439

OPT

C435 4.7uF 10V

4.7uF OPT

C456 22uF 10V

C445

C453 22uF 10V

S

C488

SS

R443 FRC 10K

PH_1

D

IC403 10 SN1007054RTER 9

+1.5V_FRC_DDR Q408 AO3438 FRC

C444 0.1uF 16V

G

4

+1.5V_DDR

NR8040T3R6N

R442

3

GND_2

C448 3300pF 50V

R2

POWER_ON/OFF2_1

R2

4A Vout=(1+R1/R2)*0.8

13

14

PWRGD

EN

VIN_3

GND_1

R436 7.5K R423 10K

12K R413

R1

C428 0.1uF 16V OPT

PH_2

$ 0.165

Vout=0.8*(1+R1/R2)=1.29V

R441 75K 1/8W 1%

OPT

COMP

C424 0.1uF 16V

11

R434 120K

5

C420 22uF 16V

2

22K 1% 24K 1%

4

OPT C429 100pF 50V

VIN_2

L415 3.6uH

R444

R410 10K FB

1%

POWER_ON/OFF2_1

C431 0.1uF 16V

8

EN

C430 10uF 10V

PH_3

THERMAL 17

RT/CLK

6

R414 51K

7

3A

1%

C410 10uF 25V

3

R416 1.5K

C405 10uF 25V

2

1%

C489 0.1uF 16V AGND

LX_1

16V

12

1

7

NR8040T3R6N VIN

15

VIN_1

6

L406 3.6uH

LX_2

COMP

8

VSENSE

1

L413

5

PGND

2000 mA

AGND

L401

IC401 AOZ1073AIL-3

C421,C422 Close to LDO

+1.26V_VDDC C441 0.1uF

EP[GND]

+12V/+15V

16

+5V_USB

+5V_USB

+1.5V_DDR_FRC GP2R POWER_LARGE

20101023 4


FLMD0

CRYSTAL_KDS X1002-*1

15pF X1002 32.768KHz

CRYSTAL_EPSON R1034

NEW_SUB R4035 4.7K

4.7M CRYSTAL_KDS

P124/XT2/EXCLKS

RESET

P40

P41

P120/INTP0/EXLVI

42

41

40

39

38

37

R1048

22

R1019

22

P61/SDA0

2

35

P00/TI000

R1049

22

34

P01/TI010/TO00

OPT R1050 10K

33

P130

R1090

32

P20/ANI0

R1055

22

31

ANI1/P21

R1056

22

30

ANI2/P22

R1057

22

29

ANI3/P23

P62/EXSCL0

3

P63

4

P33/TI51/TO51/INTP4

5

P75

6

P74

7

P73/KR3

8

CEC_REMOTE_NEC 22

POWER_ON/OFF2_1 AMP_MUTE

IC1001-*1 AT24C16BN-SH-B

28

ANI4/P24

R1054

22

10

27

ANI5/P25

R1052

10K

P70/KR0

11

26

ANI6/P26

P32/INTP3/OCD1B

12

25

ANI7/P27

13

M24C16-WMN6T

5

SDA

EEPROM_NEC_16KBIT_ATMEL EEPROM_NEC_16KBIT_STM

B/L_LED R1071 10K

MODEL_OPT_0

PANEL_CTL

22

AMP_RESET

PWM_BUZZ/IIC_LED R1009 10K

GP2 R1079 10K

TOUCH_KEY R1075 10K

+3.5V_ST

MICOM MODEL OPTION

AVSS

4

NEC_EEPROM_SDA 22

AVREF

0.1uF

C1002

GND

R1008

19-22_LAMP OLP SIDE_HP_MUTE KEY2 KEY1

+3.5V_ST

C1009 1uF

TP1003

P10/SCK10/TXD0

SDA

22

5

SCL

R1068

4

6

NEC_EEPROM_SCL 22

VSS

3

WP

R1041

R1080

7

P11/SL10/RXD0

TP1002

2

MODEL1_OPT_2

VCC

22

SCL

NC_3

8

R1037

6

WC

1

22

3

7

R1015 2.7K

NC/E2

2

R1014 2.7K

R1001 47K TP1001

NC/E1

NC_2

P31/INTP2/OCD1A

NC_1 VCC

P12/SO10

IC1001

OCD1B

CEC_ON/OFF (MODEL_OPT_3)

POWER_ON/OFF1

9

22

PANEL_CTL (MODEL_OPT_1)

SCART1_MUTE

24

R1063

+3.5V_ST

22

P71/KR1 INV_CTL

RL_ON

OPT

P72/KR2

22

SOC_RESET

EEPROM for Micom

NEC_MICOM

23

R1023

22

22

OCD1B

P13/TXD6

10K

uPD78F0514

21

R1065

OCD1A

IC1002

20

0

19

R1020

18

10K 10K

NEC_EEPROM_SDA

17

OPT R1084

NEC_ISP_Rx

P14/RXD6

10K

R1066

8

R1039

P140/PCL/INTP6

NEC_EEPROM_SCL

AMP_RESET (MODEL_OPT_0)

1

1/16W 1%

P123/XT1

43

36

NEC_ISP_Tx

OPT

NC/E0

Q1001 2SC3052 E

1

P15/TOH0

10K

OPT

R1005

EDID_WP C B

P60/SCL0

16

+3.5V_ST

R1073

20K

1/16W 1%

22

OPT R1072

R1047

R1089 20K

FLMD0

44

0.1uF C1006

NEC_SCL NEC_SDA R1006

TOP SIDE for reset.

R1018

NEC CONFIGURATION

OPT

+3.5V_ST

TP1601 C1010 0.1uF TP1602

FLMD0

MICOM_DEBUG R1002 10K

R1069

12

OCD1B

MICOM_DEBUG R1013 22

11

47K

P122/X2/EXCLK/OCD0B

45

MICOM_DEBUG R1081 22

9

10

C1003 0.1uF

OCD1A

R1046

P121/X1/OCD0A

8

P16/TOH1/INTP5

7

13

NEC_ISP_Rx

MICOM_DEBUG R1010 22

15

6

NEW_SUB

22

REGC 46

MICOM_DEBUG R1078 22

5

+3.5V_ST

NEC_ISP_Tx

P17/TI50/TO50

4

MICOM_RESET

MICOM_DEBUG R1076 22

14

3

P30/INTP1

+3.5V_ST

1

2

R1060

VSS 47

+3.5V_ST

12505WS-12A00

22

VDD 48

GND

for Debugger P1001

NEW_SUB 22 R1043

+3.5V_ST

R1091 10K

MICOM_DEBUG_WAFER

+3.5V_ST

NEW_SUB R4034 4.7K

MICOM_RESET

C1008

15pF C1007

10K R1030

S/T_SDA

S/T_SCL

32.768KHz

+3.5V_ST

R1083

MODEL_OPT_1

10K OPT

MODEL1_OPT_2 CEC_ON/OFF

S7_NEC_RXD

S7_NEC_TXD

POWER_ON/OFF2_2

NEC_ISP_Tx

LED_R/BUZZ

NEC_ISP_Rx

IR

POWER_DET

LED_B/LG_LOGO

OCD1A

B/L_LAMP R1012 10K

PWM_LED R1004 10K

TACT_KEY R1011 10K

GP3 R1074 10K

MODEL_OPT_3

2010Y,GP2

2011Y,GP2R, 101125 Update MODEL OPTION

MODEL OPTION MODEL_OPT_0 PIN NAME

PIN NO.

HIGH

LOW MODEL_OPT_0

8

B/L_LED

11

MODEL_OPT_2

30

MODEL_OPT_3

31

PWM_BUZZ/IIC_LED TOUCH_KEY GP2

PWM_LED

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LOW

MODEL_OPT_3 LOW

LOW : LED HIGH : LAMP

LOW

LOW

HIGH

Description PIN NAME LK330/LK430 for KR/US 10Y EYE-Q Sensor KEY & PWM LED & No Buzz & No LED Blink LK330/LK430/LK530 KEY & PWM LED & No Buzz & No LED Blink

HIGH

HIGH

LOW

LV25/LV35/LV45/LW45/LV55/LK45/LK55 S/T & IIC LED & NO BUZZ & LED Blink

HIGH

LOW

LOW

TBD IIC LED(09Y IIC Protocol) & No BUZZ

Low

HIGH

LOW

TBD S/T & IIC LED & No Buzz & LED Blink

MODEL_OPT_0 MODEL_OPT_1 MODEL_OPT_2

TACT_KEY GP3

PWM_BUZZ/IIC_LED :Using IIC for LED Breathing & PWM Buzz PWM_LED : Using PWM Signal for LED Lighting

LOW

B/L_LAMP LOW

MODEL_OPT_1

MODEL_OPT_1 MODEL_OPT_2

LOW

MODEL_OPT_3

PIN NO. 8 11 30 31

HIGH B/L_LED PWM_BUZZ/IIC_LED TOUCH_KEY GPIO_LED

LOW

MODEL_OPT_3

MODEL_OPT_0

MODEL_OPT_1

MODEL_OPT_2

LOW

LOW

LOW

LOW

LD350/450/550 PWM LED & No Buzz & No LED Blink

HIGH

LOW

HIGH

LOW

19/22/26LE5300/5300 IIC LED & PWM IIC BUZZ

HIGH

HIGH

HIGH

LOW

LOW

HIGH

LOW

LOW

LD420 IIC LED(09Y IIC Protocol) & No BUZZ

HIGH

LOW

LOW

HIGH

LE7300 GPIO LED & NO BUZZ

B/L_LAMP PWM_LED TACT_KEY

32/37/42/47/55LE5300 IIC LED & PWM BUZZ

NON_GPIO_LED

PWM_BUZZ/IIC_LED : For model that use LED Lighting used IIC PWM_LED : For model that use LED Lighting used PWM Signal

GP2R MICOM Rev.4

20101125 5


CONTROL IR & LED

+3.5V_ST

R2404 10K 1%

EYEQ/TOUCH_KEY R2411 100

R2405 10K 1%

EYEQ/TOUCH_KEY

OLD_SUB

NEC_EEPROM_SCL C2408 18pF 50V OPT

L2401 BLM18PG121SN1D

R2401 100 KEY1

EYEQ/TOUCH_KEY 100

L2402 BLM18PG121SN1D

R2402 100

C2401 0.1uF

R2412

C2402 0.1uF D2401 5.6V AMOTECH

P2402 12507WR-15L

5.6V D2403 1

1

2

2

EYEQ/TOUCH_KEY

NEC_EEPROM_SDA

D2402 5.6V AMOTECH

KEY2

NEW_SUB

P2401 12507WR-12L

C2409 18pF 50V OPT

5.6V D2404 3

3

JP2407

4

4

JP2408

5

5

6

6

7

7

JP2409

8

8

JP2410

9

9

10

10

11

11

+3.5V_ST +3.5V_ST L2403 BLM18PG121SN1D +3.5V_ST

R2425 47K OPT

R2428 22 IR

Q2406 2SC3052 OPT

R2430 10K

C

+3.5V_ST

R2429 47K OPT

B E

OPT

R2431 47K

C

C2403 0.1uF 16V

C2404 1000pF 50V

R2413 LED_B/LG_LOGO

1.5K OPT C2410 0.1uF 16V

R2426 47K

B Q2405 2SC3052 OPT

E

OPT

C2407 100pF 50V

+3.3V_Normal

D2405 5.6V

L2404 BLM18PG121SN1D JP2411

R2427 0 R2414 C2405 0.1uF 16V

LED_R/BUZZ C2406 1000pF 50V

1.5K

12 OPT R2416 10K

12 13

13

14

15 16

S/T_SCL

NEW_SUB C906 18pF 50V OPT

D902 CDS3C05HDMI1 5.6V

S/T_SDA

C907 18pF 50V OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

NEW_SUB D903 CDS3C05HDMI1 5.6V

GP2R IR/CONTROL-L

20101023 6


USB_DIODES EAN61849601

IC1450 AP2191DSG

L1451-*1 CIS21J121 NC L1451 MLB-201209-0120P-N2

OUT_2

1

8 $0.077 7

2

6

3

GND

+5V_USB

IN_1

120-ohm

22uF 16V

FLG

4

5

C1453 0.1uF +3.3V_Normal

EN

SIGN6409

R1455 4.7K OPT

USB1_CTL

R1451

47

USB1_OCD

1 2

SIDE_USB_DM

3

1 2 3

C1452 10uF 10V

IN_2

C1451

JK1450

5

4 5

OUT_1

R1454 10K

USB DOWN STREAM

USB DOWN STREAM

3AU04S-345-ZC-H-LG

JK1450-*1

USB_JACK

R1459 2K 1/8W 1%

SIDE_USB_DP

4

USB_JACK_LV3400

3AU04S-305-ZC-(LG)

R1458 2K 1/8W 1%

D1451 RCLAMP0502BA OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP2R USB_OCP_DIODE

20101023 7


HDMI EEPROM

A1

A2

5V_HDMI_1 +5V_Normal

C

ENKMC2838-T112 D821 HDMI_1_RENESAS

C

A0

SHIELD

1

R830 A1

2

E

17

3.3K

R802

1.8K

VCC

8

C802 0.1uF 16V

A2

7

3

VSS

6

4

DDC_SDA_1

A0

1

VCC

8

$0.055

WP

A1

SCL

A2

SDA

5

EDID_WP

AT24C02BN-SH-T

HPD1 10K

1K R804

18

B

Q802 2SC3052

R896 20 19

HDMI_1_ATMEL IC801

IC801-*1 R1EX24002ASAS0A

10K

5V_DET_HDMI_1

R874

HDMI_1

5V_HDMI_1

2

3

GND

WP

7

6

4

C806

R884

R888

0.1uF

2.7K

2.7K

SCL R876

22

R875

22

DDC_SCL_1

SDA

5

16

DDC_SDA_1

DDC_SCL_1 15 R824

0

5V_HDMI_2 +5V_Normal

HDMI_CEC

13 12

9 8 7 6 5 4 3 2

HDMI_2_RENESAS

D0+_HDMI1

D1-

HDMI_2_ATMEL IC802

IC802-*1 R1EX24002ASAS0A

D0-_HDMI1

D0_GND D0+

C

CK+_HDMI1

D0-

A0

1

8

AT24C02BN-SH-T

VCC

A0

WP

A1

1

D1-_HDMI1

D1_GND

A1

D1+

2

7

EDID_WP

VCC

8

$0.055 2

A2

D2-

D2-_HDMI1

3

SCL

6

A2

3

D2+

SDA

5

4

GND

4

D2+_HDMI1

R885

R889

2.7K

2.7K

JP810

SCL

6

DDC_SCL_2

D2_GND VSS

C807 0.1uF

WP

7

D1+_HDMI1

R878

22

R877

22

SDA

5

DDC_SDA_2

OPT D802

1

ENKMC2838-T112 D822

CK+

10K

11 10

A1

A2

CK-_HDMI1

R873

HDMI_1

EAG59023302

14

JK802

HDMI_2

SIDE_HDMI 5V_HDMI_2

5V_HDMI_4 +5V_Normal

5V_DET_HDMI_2 5V_HDMI_4

1.8K

17

JP805 DDC_SDA_4

14

6 5 4 3 2

9

D0_GND

8

D0+ D1-

D0+_HDMI2

7

D1-_HDMI2

6

D1_GND

5

D1+ D2-

D1+_HDMI2

4

D2-_HDMI2

3

D2_GND

2

D2+

D2+_HDMI2

JK801

8

1

3

6

C 10K

EDID_WP VCC

$0.055

WP

A1

2

SCL

A2

7

WP

3

6

C809

R887

R891

0.1uF

2.7K

2.7K

JP812

SCL

DDC_SCL_4 R881 22

0 HDMI_CEC

VSS

4

5

SDA

GND

4

5

SDA DDC_SDA_4

CK-_HDMI4

12 11 10

A2 R841

13

OPT D801

1

D0-_HDMI2

7

1

R882 22

CK+ CK+_HDMI4 D0D0-_HDMI4 D0_GND D0+ D0+_HDMI4

+3.3V_Normal

D1D1-_HDMI4

68K

D1_GND D1+ D1+_HDMI4

R854

For CEC

D2D2-_HDMI4 D2_GND

R855 0

R856 10K

OPT

R857 68K OPT

D2+ D2+_HDMI4 S B D

7

CK+_HDMI2

D0-

2

A0

JK803

G

CK-_HDMI2 12

8

OPT D811

13

CK+

JP806

HDMI_CEC EAG62611201

0

HDMI_SIDE

HDMI_2

EAG59023302

R815

1

AT24C02BN-SH-T

VCC

DDC_SCL_4 15

14

8

A1

16 DDC_SCL_2

15

9

10K

HDMI_SIDE_ATMEL IC804

IC804-*1 R1EX24002ASAS0A A0

DDC_SDA_2 16

11 10

HPD4

C803 0.1uF 16V

R837

18

HDMI_SIDE_RENESAS

R862

E

1K 19

B

R871

20

3.3K

17

R801

1.8K

Q803 2SC3052

R897

E C801 0.1uF 16V

R803

18

BODY_SHIELD HPD2

D804

1K 19

ENKMC2838-T112 D824

C

R828 10K

D803 AVRL161A1R1NT

20

B

3.3K

Q801 2SC3052

R895

R835

C SHIELD

A1

A2

5V_DET_HDMI_4

CEC_REMOTE_S7

Q806 BSS83

OPT C805 0.1uF 16V GND

GND

CEC_ON/OFF 68K

+3.5V_ST

D825

R892 R883 0

R893 10K

OPT

R853 68K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

G

D826 AVRL161A1R1NT

S B D

HDMI_CEC CEC_REMOTE_NEC

Q805 BSS83

OPT

C810 0.1uF 16V

GND

GND

GP2R HDMI

20101023 8


RGB/SPDIF/PC/HP New Item Development EARPHONE BLOCK HP_LOUT

HEAD_PHONE C Q1101 MMBT3904-(F)

E B B

MMBT3904-(F) Q1104

E

JK3301 KJA-PH-0-0177

+3.3V_Normal

C

R1155 1K HP_ROUT

5

L

4

DETECT

3

R

1

HP_DET C

C1119 10uF 16V

C1116 1000pF 50V OPT

C R1128 1K

Q1102 MMBT3904-(F)

E B B

C

MMBT3904-(F) Q1103

E

+3.5V_ST

B R1129 3.3K

B

C E

SIDE_HP_MUTE

Q1106 2SC3052

RGB PC

PC AUDIO

+3.3V_Normal

5.15 Mstar Circuit Application

PEJ027-01

C A2

GND

5

R_SPRING T_SPRING

C1107 100pF 50V

R1107 15K R1102 470K

002:S12 VCC

R1110 10K VINPUT

SPDIF_OUT 7B 6B

R1108 15K

B_TERMINAL2

C1131 PC_L_IN

T_TERMINAL2

D1102 AMOTECH 5.6V OPT

C1108 100pF 50V

R1103 470K R1111 10K

002:S12

002:T18

0.1uF 16V

C1121 100pF 50V

RGB_EEMPROM_ATMEL IC1105

RGB_EEMPROM_RENESAS

A0 A0

1

8

2

7

3

6

4

5

7

3

6

4

5

WP

EDID_WP SCL

RGB_DDC_SCL

SCL GND

VSS

2

C1129 0.1uF 16V

R1142 10K

VCC

WP A2

A2

8

VCC A1

A1

1

R1140 2.2K

R1139 2.2K

AT24C02BN-SH-T

IC1105-*1 R1EX24002ASAS0A

4

4

PC_R_IN D1101 AMOTECH 5.6V OPT

JST1223-001 JK1103

B_TERMINAL1

2

7A

Fiber Optic

6A

T_TERMINAL1 1

E_SPRING

3

3

+5V_Normal D1115 ENKMC2838-T112 A1

SPDIF OPTIC JACK

JK1102

FIX_POLE

002:V7

GND

Q1105 ISA1530AC1

R1125 1K

E

C1115 1000pF 50V OPT

R1130 10K

C1118 10uF 16V

002:V7

SDA

RGB_DDC_SDA

SDA

C1127 18pF 50V

R1141 22

C1128 18pF 50V

R1143 22

DSUB_VSYNC

DSUB_HSYNC C1122 68pF 50V OPT

C1126 68pF 50V OPT

D1109 30V

D1113

D1116

D1114

5.6V OPT

5.6V OPT

30V

DSUB_B+ R1133 75

D1110 30V

DSUB_G+ R1135 75

D1111 30V +3.3V_Normal

R1146 10K DSUB_DET R1147 1K

DSUB_R+ R1137 75

D1112 30V

D1117 5.6V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

RGB/SPDIF/HP

16

SHILED

DDC_GND

DDC_CLOCK

SYNC_GND

15

GP2R

5

V_SYNC

GND_1

10

BLUE

H_SYNC

NC

14 4

9

GREEN

BLUE_GND

13 8 3

GREEN_GND

RED

DDC_DATA

12 7 2

GND_2

11 6 1

SPG09-DB-010

JK1104

RED_GND

OPT

20101023 9


RS232C 10 5 9 4 8

R1123 100

JP1121

R1124 100

JP1122

3

+3.5V_ST

7 2

D1107 CDS3C30GTH 30V OPT

6

D1108 CDS3C30GTH 30V OPT

1

C1101 0.33uF

SPG09-DB-009 IC1101

C1+ C1102 0.1uF C1103 0.1uF

V+

C1-

C2+ C1104 0.1uF

C2-

VC1105 0.1uF

DOUT2

1

16

2

15

3

14

4

13

5

12

6

11

7

10

8

9

JK1101

C1106 0.1uF

MAX3232CDR

VCC

GND

DOUT1

RIN1

ROUT1 S7_NEC_RXD DIN1

DIN2 S7_NEC_TXD

RIN2

ROUT2

EAN41348201

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP2R RS232C_9PIN

20101023 10


[51Pin LVDS Connector] (For FHD 60/120Hz) PANEL_VCC

[41Pin LVDS Connector] (For FHD 120Hz)

L702 120-ohm WAFER_FHD

P705

P704

P703

FF10001-30

FI-RE41S-HF-J-R1500

FI-RE51S-HF-J-R1500 WAFER_FHD

C709 1000pF 50V OPT

C700 10uF 16V OPT

1

HD

WAFER_FHD_120HZ

C710 0.1uF 16V WAFER_FHD

1

1

OPT 2

2

2

3

3

4

4

RXD4+

5

5

RXD3-

6

6

RXD3+

7

7

8

8

RXDCK-

9

9

RXDCK+

10

10

3 RXD44

11

RXD2-

RXA4+

12

RXD2+

13

RXA3-

13

RXD1-

16

RXACK-

17

RXACK+

14

RXD1+

15

RXD0-

16

RXD0+

18 RXA2-

19

RXC4-

20

RXA2+

20

RXC4+

21

RXC3-

22

RXC3+

RXA1RXA1+

22

23

RXA0-

23

24

RXA0+

BIT_SEL

24 25

25 26

RXC1+

31

RXC0RXC0+

32 33

LVDS_SEL +3.3V_Normal

18

RXA0-

19

RXA0+

R712 3.3K OPT R711 10K OPT

L701 120-ohm HD

27

30

RXBCK-

RXA1+

26

RXB3+

RXBCK+

RXA1-

16

RXCCK+

RXC1-

33

15

PANEL_VCC

RXC2+

32

RXA2+

25

29

31

RXA2-

13

24

28

30

12

RXCCK-

RXB3-

29

RXACKRXACK+

23

RXB4+

28

9 10

22

RXC2-

RXB4-

RXA3+

21

27

27

RXA3-

7

20

26

R709 10K BIT_SEL_LOW

6

17

19

21

OPC_OUT

14

17

18

PWM_DIM

TP722

11

RXA4-

RXA3+

TP721

8

12

15

0 R713

5

11

14

[30Pin LVDS Connector] (For HD 60Hz_Normal)

28 29

C701 10uF 16V OPT

OPT C702 1000pF 50V

HD C703 0.1uF 16V

30 31

34

34 35

RXB2-

35

36

RXB2+

36

37

RXB1-

37

38

RXB1+

38

39

RXB0-

39

40

RXB0+

40 LVDS_SEL

41

+3.3V_Normal

42

42

43 44

41

SCAN_BLK2

SCAN_BLK1/OPC_OUT R703 0 LVDS_PWM_44

R705 PWM_DIM

45 46

R710 10K OPT

47 48

3.3K OPT

R701

0 3D_SG

LED_DRIVER_D/L_SDA

49 50 51 52

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R702

0 3D_SG

LED_DRIVER_D/L_SCL 100 2D/3D_CTL LVDS_51PIN_GPIO R706 R707 0 LVDS_51PIN_GND

GP2R LVDS_LARGE

20101023 11


R1227

1K 1% 1K

1%

0.1uF C1250

1000pF

C1249

R1228

R1224

1K 1% 1% 1K

C1248

1000pF

C1246

10uF

0.1uF

C1245

0.1uF

C1244

0.1uF

C1243

0.1uF

C1242

0.1uF

C1241

0.1uF

C1239

0.1uF

C1238

0.1uF

C1237

C1236

C1235 0.1uF

0.1uF

C1234 0.1uF

0.1uF

C1233

0.1uF

C1232

0.1uF

C1231

0.1uF

C1230

0.1uF

C1229

0.1uF

C1228

0.1uF

C1227

0.1uF

0.1uF

C1224

C1223

0.1uF

0.1uF

C1222

0.1uF

C1221

0.1uF

C1220

C1219

0.1uF

0.1uF

C1218

0.1uF C1217

0.1uF C1216

0.1uF

C1215

0.1uF

C1214

0.1uF

C1213

0.1uF

C1212

0.1uF

C1211

0.1uF

C1210

0.1uF

C1208

0.1uF

C1207

C1206

10uF

Close to DDR Power Pin

0.1uF

B-MVREFDQ R1225

DDR3 1.5V By CAP - Place these Caps near Memory

B-MVREFCA C1205

0.1uF

VCC_1.5V_DDR

C1247

DDR3 1.5V By CAP - Place these Caps near Memory

A-MVREFCA

1000pF

C1204

1%

R1205

1K

C1203

1000pF

0.1uF C1202

A-MVREFDQ

Close to DDR Power Pin

CLose to Saturn7M IC

CLose to DDR3

VCC_1.5V_DDR

VCC_1.5V_DDR VCC_1.5V_DDR

1K 1%

R1204

VCC_1.5V_DDR

1K 1% 1%

R1202

1K

C1201

R1201

VCC_1.5V_DDR

CLose to Saturn7M IC

CLose to DDR3

IC1201-*1 K4B1G1646G-BCH9

IC1202-*1 K4B1G1646G-BCH9

DDR_1333_SS_NEW

DDR_1333_SS_NEW M8

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7

VCC_1.5V_DDR

N7

+1.5V_DDR

T3

VREFCA

A0 A2

H1 VREFDQ

A3

B-TMA0

L8 ZQ

A6

C1225 10uF 10V

R1213

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5 VDD_6

A-TMA11

A-MA11

A0 A1

VREFDQ

A3 A4

R1203

A5

L8 ZQ

240 1%

A7 A8

B2 D9 G7 K2 K8 N1 N9 R1 VCC_1.5V_DDR

A6

R9

VDD_1

A9

VDD_2

A10/AP

VDD_3

A11

VDD_4

A12/BC

VDD_5

A13

C9 D2 E9 F1 H2 H9

L1 L9 T7

T8 R3 L7 R7 N7 T3

VDDQ_2

M2 BA0

CK

VDDQ_4

CKE

VDDQ_5

N8 M3

CS

VDDQ_7

ODT

VDDQ_8

RAS

VDDQ_9

CAS

K9

K1 J3 K3 L3

WE NC_1

T2 RESET

J2 J8 M1 M9 P1 P9 T1 T9

DQSL

G3 C7

VSS_1

DQSU

VSS_2

DQSU

VSS_3 VSS_4 VSS_5

D8 E2 E8 F9 G1 G9

D3

DMU E3 DQL0 DQL1

VSS_9

DQL2

VSS_10

DQL3

VSS_11

DQL4

VSS_12

DQL5

F7 F2 F8 H3 H8 G2 H7

DQL7 VSSQ_1

D7

VSSQ_2

DQU0

VSSQ_3

DQU1

VSSQ_4

DQU2

VSSQ_5

DQU3

VSSQ_6

DQU4

VSSQ_7

A-TMA1 A-TMA4 A-TMA12

A-MA12

A-MA10 A-MA11

A-TMA4

A-MA10

A-TMA10

A-TMA5

A-MA12

A-TMA6

AR1201

A-MA13

A-TMA7

A-MBA2

A-MBA0 A-MBA2

A-MCK

A-TMA8

A-TMBA2

A-TMA9

A-TMA13 A-TMA9

A-MA9 56

0.01uF 25V

A-MCKB

A-TMBA0 A-TMRASB

56

A-TMDQSLB

DQU5

VSSQ_8

DQU6

VSSQ_9

DQU7

C3

A-TMDQSU A-TMDQSUB

A-MDQSUB

C8 C2 A7 A2 B8 A3

A-MDQU3

C9 C23 B11 A9 C10 B23

A_DDR3_A3/DDR2_A1

B_DDR3_A3/DDR2_A1

A_DDR3_A4/DDR2_A2

B_DDR3_A4/DDR2_A2

A_DDR3_A5/DDR2_A10

B_DDR3_A5/DDR2_A10

A_DDR3_A6/DDR2_A4

B_DDR3_A6/DDR2_A4

A_DDR3_A7/DDR2_A3

B_DDR3_A7/DDR2_A3

A_DDR3_A8/DDR2_A6

B_DDR3_A8/DDR2_A6

A_DDR3_A9/DDR2_A12 A_DDR3_A10/DDR2_RASZ A_DDR3_A11/DDR2_A11

B_DDR3_A9/DDR2_A12 B_DDR3_A10/DDR2_RASZ B_DDR3_A11/DDR2_A11

A_DDR3_A12/DDR2_A0

B_DDR3_A12/DDR2_A0

A_DDR3_A13/DDR2_A7

B_DDR3_A13/DDR2_A7

A24 P25 C24 P26 B26 R24 B25 T26 D24 A26 C25 T25

B-TMA4 B-TMA12

B-MA12

B-TMA1

B-TMBA1

B-MBA1

B-TMA10

B-MA10

B-TMA3 B-TMA4 B-TMA5 B-TMA6 B-TMA7 B-TMA8

B21 A11 A23

P24 A_DDR3_BA0/DDR2_BA2 A_DDR3_BA1/DDR2_CASZ A_DDR3_BA2/DDR2_A5

B_DDR3_BA0/DDR2_BA2 B_DDR3_BA1/DDR2_CASZ

C26 R26

B_DDR3_BA2/DDR2_A5

A12 C11 B12

D26 A_DDR3_MCLK/DDR2_MCLK A_DDR3_MCLKZ/DDR2_MCLKZ A_DDR3_CKE/DDR2_DQ5

B_DDR3_MCLK/DDR2_MCLK B_DDR3_MCLKZ/DDR2_MCLKZ

D25 E24

B_DDR3_CKE/DDR2_DQ5

A-TMODT

A-TMWEB A-TMRESETB

A-TMDQSL

A-MDQL3

A-TMDQL3

A-TMDQSLB

B-TMA13

B-MA13

B-TMA9

A-TMDQU2 22

A-TMDQSU A-TMDQSUB

A-MCKE

A-TMCKE

A-TMDML

A-TMDQL7

A-TMDMU A-TMDQL0

22

A-TMDQL1

AR1205

A-TMDQL2

A-MDQL0

A-TMDQL0

A-TMDQL3

A-MDQL2

A-TMDQL2

A-TMDQL4

A-MDQL6

A-TMDQL6

A-TMDQL5

A-MDQL4

A-TMDQL4

A-TMDQL6

22

A-TMDQL7

B-MCK 22 R1223

B-TMCKB

B-MCKB

A-TMDQU7

A-TMDQU0

A-MDQU3

A-TMDQU3

A-MDQU5

A-TMDQU5

A-TMDQU2

A-TMDMU

A-TMDQU3

A-MDMU 22

A-TMDQU1

A-TMDQU4

AR1207

A-TMDQU5 A-TMDQU6

A-MDQU6 A-MDQU0

A-TMDQU0

A-MDQU4

A-TMDQU4

C1240 0.01uF 25V

B-MCKB B-MRASB

B-TMODT

B-MODT

B-TMBA2

B-TMWEB

B-MWEB VCC_1.5V_DDR

B-MBA1 B-MBA2

22 R1220

B-TMCKE

K3 L3

C20 A20 B20 A21

N25 A_DDR3_ODT/DDR2_ODT A_DDR3_RASZ/DDR2_WEZ A_DDR3_CASZ/DDR2_BA1 A_DDR3_WEZ/DDR2_BA0

B_DDR3_ODT/DDR2_ODT B_DDR3_RASZ/DDR2_WEZ B_DDR3_CASZ/DDR2_BA1

M26 N24 N26

B_DDR3_WEZ/DDR2_BA0

C22

R25 A_DDR3_RESETB

B_DDR3_RESETB

B-TMODT

C16 B16

J25 A_DDR3_DQSL/DDR2_DQS0 A_DDR3_DQSLB/DDR2_DQSB0

B_DDR3_DQSL/DDR2_DQS0

J24

B_DDR3_DQSLB/DDR2_DQSB0

B-TMDQSU

B-MDQSU 22 R1218

B-TMRASB B-TMCASB

B-TMDQSUB

B-MDQSUB 22

B-TMWEB

B-TMDQL1

B-MDQL1

B-TMDQL3

B-MDQL3

B-TMDML B-TMDQSL

B-MDML

B-TMDQU2

B-MDQU2

B-TMDQSLB

A16 C15

H26 A_DDR3_DQSU/DDR2_DQSB1 A_DDR3_DQSUB/DDR2_DQS1

B_DDR3_DQSU/DDR2_DQSB1

22

H25

B_DDR3_DQSUB/DDR2_DQS1

B-TMDQSUB

A14 B18

F26 A_DDR3_DML//DDR2_DQ13 A_DDR3_DMU/DDR2_DQ6

B_DDR3_DML/DDR2_DQ13

L24

B_DDR3_DMU/DDR2_DQ6

B-TMCKE

B-MCKE

B-TMDQL7

B-MDQL7

B-TMDQL5

B-MDQL5

B-TMDML B-TMDMU

VDDQ_2

CK

VDDQ_3

C18 B13 A19 C13 C19 A13 B19 C12

L25 A_DDR3_DQL0/DDR2_DQ3

B_DDR3_DQL0/DDR2_DQ3

CS

VDDQ_6

ODT

VDDQ_7

A_DDR3_DQL1/DDR2_DQ7

B_DDR3_DQL1/DDR2_DQ7

A_DDR3_DQL2/DDR2_DQ1

B_DDR3_DQL2/DDR2_DQ1

A_DDR3_DQL3/DDR2_DQ10 A_DDR3_DQL4/DDR2_DQ4

B_DDR3_DQL3/DDR2_DQ10 B_DDR3_DQL4/DDR2_DQ4

A_DDR3_DQL5/DDR2_DQ0

B_DDR3_DQL5/DDR2_DQ0

A_DDR3_DQL6/DDR2_CKE

B_DDR3_DQL6/DDR2_CKE

A_DDR3_DQL7/DDR2_DQ2

B_DDR3_DQL7/DDR2_DQ2

F24 L26 F25 M25 E26 M24 E25

A-TMDQU6 A-TMDQU7

A15 A17 B14 C17 B15 A18 C14 B17

G26 A_DDR3_DQU0/DDR2_DQ15 A_DDR3_DQU1/DDR2_DQ9 A_DDR3_DQU2/DDR2_DQ8 A_DDR3_DQU3/DDR2_DQ11 A_DDR3_DQU4/DDR2_DQM1

B_DDR3_DQU0/DDR2_DQ15 B_DDR3_DQU1/DDR2_DQ9 B_DDR3_DQU2/DDR2_DQ8 B_DDR3_DQU3/DDR2_DQ11 B_DDR3_DQU4/DDR2_DQM1

A_DDR3_DQU5/DDR2_DQ12

B_DDR3_DQU5/DDR2_DQ12

A_DDR3_DQU6/DDR2_DQM0

B_DDR3_DQU6/DDR2_DQM0

A_DDR3_DQU7/DDR2_DQ14

B_DDR3_DQU7/DDR2_DQ14

J26 G24 K25 H24 K26 G25 K24

B-TMDQL0

B-MDQL0

B-TMDQL1

B-TMDQL2

B-MDQL2

B-TMDQL2

B-TMDQL6

B-MDQL6

B-TMDQL3

B-TMDQL4

B-MDQL4

B-TMDQL4

22

B-TMDQL5 B-TMDQL6 B-TMDQL7

RAS

VDDQ_8

CAS

VDDQ_9

B-TMDQU7

B-MDQU7

B-TMDQU3

B-MDQU3

B-TMDQU0

B-MDQU5

B-TMDMU

B-TMDQU5

B-MDQL2

T7

B-MDQL3

H3

B-MDQL4

H8

B-MDQL5

G2

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

DMU

VSS_5

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

B-MDQU2

C2

B-MDQU3

A7 A2

B-MDQU5

B8

B-MDQU6

A3

B-MDQU7

VDDQ_9

B8 A3

VSS_1

DQSU

VSS_2 VSS_4

DMU

VSS_5

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

VSSQ_2 VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

R2 R3 L7 R7 N7 T3

M1

K3

M9 P1 P9 T1

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

A3

N8 M3

J2

A6

B9 D1 D8 E2

K1 J3 K3

F7

P1

F2

P9

F8

T9

P2 R2 T8 R3 L7 R7 N7

A6

P2 L8 ZQ

T8

A8

B2 VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5 VDD_6

NC_5

VDD_7 VDD_8

BA0

K9

J3 K3 L3

N7 T3

F9

L3

VDDQ_2 VDDQ_3

CKE

VDDQ_4

G9

CS

VDDQ_6

VDDQ_5 ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE NC_2 NC_3 NC_4

F3 DQSL

A8

J7 K7 K9

D2 E9

L2

F1

K1

H2

J3

H9

K3 L3

D3

VSS_4

VSS_3

F2 F8 H3 H8 G2 H7

VSS_5 VSS_6

E3 F7

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

C8 C2 A7 A2 B8 A3

A8 A9

B2 VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4 VDD_5 VDD_6 VDD_7 VDD_8

D7 C3 C8

E2

C2

E8

A7

F9

A2

VDDQ_9

F1 H2 H9 J1 J9

NC_2

L1 L9 T7

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

B3

DMU

VSS_5

E1 G8

DQL0

VSS_7

J2

DQL1

VSS_8

J8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

M1 M9 P1 P9 T1 T9

DQL6 B1 VSSQ_1

B8 A3

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9 D1 D8 E2 E8 F9 G1 G9

IC1202-*2 NT5CB64M16DP-CF

VREFDQ

P2 L8

T8

A12

VDD_4

NC_6

VDD_5 VDD_6 VDD_7 VDD_8

R3

D9

L7

G7

R7

K2

N7

K8

T3

N1 N9 R9

VDD_9

M3 VDDQ_1 VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4 VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

J7

C1

K7

C9

K9

D2 E9

L2

F1

K1

H9

J3 K3 L3

NC_2 NC_4

J9

H3 G2

BA0

K2 K8 N1 N9 R1 R9

C3 C8 C2

A1

CK

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4

CS

VDDQ_6

VDDQ_5 ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

A8 C1 C9 D2 E9 F1 H2

A7 A2 B8 A3

H9

L8 ZQ

A7 A8

B2

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12

VDD_4

NC_6

VDD_5 VDD_6 VDD_7 VDD_8

BA0

G7 K2 K8 N1 N9 R1 R9

VDD_9

BA1 A1 VDDQ_1 CK

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4 VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

NC_2 NC_3 NC_4

F3 DQSL

A8 C1 C9 D2 E9 F1 H2 H9 J1

NC_1 RESET

G3

D9

J9 L1 L9 T7

NC_7

DQSL

DQSU

VSS_1

DQSU

VSS_2 VSS_3

DML

VSS_4

DMU

VSS_5 VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

A9

C7

B3

B7

E1 G8 J2

D3

M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8 G2 H7

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1 G9

VSS_1

DQSU

VSS_2 VSS_3

DML

VSS_4

DMU

VSS_5 VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

B8 A3

B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

DQL6 DQL7

B1 VSSQ_1

A9 DQSU

E7

J8

DQL6

D7

A6

L9

NC_7

DQL7

VDD_9

VDDQ_1

B1 VSSQ_1

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9 D1 D8 E2 E8 F9 G1 G9

J1 NC_1 NC_2 NC_4

DQSL

H7

D9

A5

T2

L1 T7

H1 VREFDQ

A4

WE

J1 NC_1

A3

BA2

A8

H2

VREFCA

A2

M2 N8

EAN61857201

A1

NC_5

A1

CK

A0

M7

R1

BA1

DQSL

R8 R2

B2

VDD_3

BA0

N2 P8

ZQ

M8

N3 P7

H1

VDD_2

G7

BA1

F3

C7

B3

B7

E1 G8

J9 L1 L9 T7

NC_6

J2

D3

DQU0

VSSQ_2 VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

VSS_1 VSS_2

DML

VSS_4

VSS_3 DMU

J8 M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8 G2

VSS_5 VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

A3

B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

DQL6 DQL7

B1

DQU1

A9 DQSU DQSU

E7

H7 VSSQ_1

D7

ZQ

NC_3

A9

DQL6 DQL7

C3

CAS

E9

DQSL VSS_1 VSS_2

DML DMU

A6

RESET

G3

F8 H8

L8

WE

L1 T7

VDDQ_8

DDR_1333_NANYA_NEW

A11

F3

A7

L9

NC_6

DQSU DQSU

E7

H1

A4

T2

DQSL C7 B7

RAS

VSS_6

P3

NC_3

VREFDQ

BA2

C1

J9

VREFCA

A5

NC_5

J1 NC_1

RESET

D2

DQL7

D8

EAN61857201 VREFCA

A10/AP

RESET

G3

A2 A3

M2 N8

C9

VDDQ_7

A9

H8

D1

G9

VDD_1

T2

A1

M7

R1 R9

C9

VSS_3

H3

B9

G1

A9

G1

M8 A0

A13

N1 N9

M3

CK

T2

G3

K2 K8

A1

CK

L2 K1

L7 R7

VDD_9

VDDQ_1

J7

R3

D9 G7

BA1 BA2

K7

R8 R2

A7 A9

N2 P8

A4

M2 M3

H1

A5

M7

N8

P7

VREFDQ

ODT

DQSL

G2

WE

N3 P3

A2

C1

NC_4

D3

M9

T1

A8

E8

F7

A3

VDDQ_6

E7

E3

A7

L2

IC1202-*3 K4B2G1646C

N2

CS

F3

M1

A5

J7

IC1201-*3 K4B2G1646C

P8

A8

NC_1

J8

BA2

E3

A1

VDDQ_4

NC_3

B7

A4

M2

DDR_DVB_T2_2G

P7

CKE

RESET

C7

G8

A2

NC_5

DDR_DVB_T2_2G

P3

VDDQ_3

T2

B3

A1

T9

VSSQ_2 VSSQ_3

M8

VDDQ_2

CK

WE

A9

M8 A0

M7

F2

B-MCKE

J3

E1

VSSQ_1

R8 T8

J8

22

R1234

K1

B1

DQU1

B1

DQU1

VREFCA

R9

VDDQ_5

H7

DQU0

N2

D3

10K

F1

DQL6

P3

B-MDQU0

A-TMDQU1

L2

G3

C7

A0

R1

A1

CK

L9

VSS_6

P7

B-TMDQU0

B-MDQU1

E9

DQSL

N3

N9

VDD_9

VDDQ_1

L1

VSS_3 DML

B7

R1221

K9

N3

E7

B-TMDQU7

N1

BA1

DDR_1333_NANYA_NEW

B-MDQU6

B-TMDQU6

K8

DQSL

DQSU

AR1218

B-MDQU4

K7

NC_6

K2

VDD_7

BA0

IC1201-*2 NT5CB64M16DP-CF

B-TMDQU6 B-TMDQU4

J7

T7

G7

VDD_8

L3

NC_4 DQSL

VDD_5 VDD_6

J1 NC_2

A13

D9

BA2

C9

J9

VDD_4

M2

C1

H9

A12/BC

NC_5

A8

H2

NC_1

K9

DQU0

C8

CAS

K7

D7

B-MDQU1

A2

E1 J2

VSSQ_1

C3

A7

B3 G8

DQL7

B-MDQU0

VDDQ_8

P2

DQL6

H7

RAS

P8

VSS_6

F8

T3

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

L9

22

B-TMDQU2 B-TMDQU4

L1

VSS_3

F2

VDDQ_7

J9

A9

F7

ODT

H9

B-MDMU

B-TMDQU1 B-TMDQU3

C1

C2

NC_6

E3

B-MDQL0

VDDQ_6

VDD_3

H2

NC_2

DQSL

D3

CS

VDD_2

A11

M7

D2

VDDQ_5

VDD_1

A10/AP

J1

E7

B-MDQU4

AR1217

B-TMDQU5

VDDQ_4

B2

A9

F1

NC_4

B7

B-MDMU

G2

C8

E9

C7

B-MDML

VCC_1.5V_DDR

C3

DQSL

B-MDQSU

H8

A8

D2

NC_1

G3

B-MDQL7

AR1216 B-TMDQL0

B-MDQSL

H3

A1

C9

VDDQ_4

F3

B-MDQSLB

F8

H7

NC_3

B-MDQL6

22

22

10K

CK

RESET

B-MDQL1

AR1213 B-TMDQSU

CKE

D7

T2

B-MDQSUB

AR1212 B-TMRESETB

VDDQ_3

DQL7

B-MDQSLB R1217

N1

F2

R9

WE

B-MRESETB

F7

VDD_9

VDDQ_5

J3

B-MWEB

K8

R1

VDDQ_1

K1

B-MDQSL

E3

N9

VDD_7

CKE

B-MRASB

K2

BA1

K9

B-MODT

R1232 10K

R1219 B-TMDQSL

R1210

R1233

VDD_5

BA0

K7

R8

A-MCKE

A13

BA2

B-MCKE

B7

D3

G7

VDD_8

M3

B-MCASB

56 B-TMCK

VDDQ_2

CK

E7

D9

VDD_6

N8

B-MCASB

22

22

VDD_4

L2

B-TMCASB

B-TMDQU1

A-MDQU1

A12/BC

J7

B-TMBA0

AR1206 A-MDQU7

VDD_3

M2

B-MBA0

B-MCK

R1222 B-TMCK

A-TMDQL5

A-MDQL5

A11

NC_5

B-TMBA1

AR1210 A-MDQL7

VDD_2

M7

B-MA9 56

B-TMA12

B-TMCKB

T3

B-MA13 B-MBA2

A-TMDML

A-MDQU2

B-MA12

B-TMBA2

B-TMA10

B-TMA13

N7

A10/AP

B-MRESETB

B-TMA9 B-TMA11

R7

B-MA11

AR1219 B-TMRESETB

VDDQ_1 CK

C7

B2 VDD_1

A9

L7

B-MA10

56

A8

R3

B-MA9

T3

DQSL

240 1%

A7

T8

B-MA8

L8

G3

K8

A8

N8

NC_3

ZQ

A6

R2

B-MA7

B-MA4

B-TMA0 B-TMA2

R8

R1226

A7

A1

F3

A5

N7

L8 ZQ

A6

M3

RESET

B-MVREFDQ

R7

K2

BA1

T2

A4

P2

22

A-TMDQL1

A-MDQU5 A-MDQU7

B22

B_DDR3_A2/DDR2_A9

B24

B-TMDQSLB

A-MDQL1

A-MDQU4 A-MDQU6

A10

B_DDR3_A1/DDR2_A8

22

A-MDQL7

A-MDQU2

A22

A_DDR3_A2/DDR2_A9

B_DDR3_A0/DDR2_A13

AR1209

A-MDQL6

A-MDQU0

A-TMCKB

A-TMCASB

R1211

A-MDQL2

A-MDQU1

A-TMCK

A-TMRASB

22 R1212

A-MDQL1

A-MDQL5

A-TMBA2

A-TMCKE

A-MDQSU

A-MDQSUB

A-MDQL3

B10

A_DDR3_A1/DDR2_A8

A-TMDQSL 22 R1209

A-MDQSL

A-MDQL4

C21

A25 A_DDR3_A0/DDR2_A13

R1208

A-MRESETB

A-MDQL0

A8

A-TMCASB A-TMODT A-TMWEB

A-MDQSL

A-MDMU

B9

B-TMRASB A-TMBA1

A-MWEB

R1231 10K

A-MDML

B8

H1 VREFDQ

L7

G7

R9

WE

A3

P8

B-MA6

K3 L3

A2

N2

B-MA5

B-MVREFCA

A1

P3

B-MA4

B-MA7

22 AR1220

A-TMCKB

A-MODT

A-MCASB

A-MDQSU

B-MA3

B-MA5

22 R1207

A-MCASB

A-MDQSLB

B-MA3

B-TMA5 B-TMA7

A-TMCK

A-MCKB A-MRASB

VCC_1.5V_DDR

A-TMA11 A-TMA13

22 AR1202

A-MODT

A-TMA10 A-TMA12

A-MCK

A-MCKE

A-MRASB

A-TMRESETB

R1206 C1209

A-TMA3

A-TMBA1 56

A-MBA1

A-TMA2

A-MBA1

A-MDML

VSS_8

B1 D1

B7 E7

DML

VSS_6 VSS_7

A-TMA0

A-MA4

A-MA9

B-TMA3

56 AR1215

A-TMA7

22 F3

S7M-PLUS_DivX_MS10 IC101 LGE107DC-RP [S7M+ DIVX/MS10]

VREFCA

A0

P7

B-MA1 B-MA2

J3

M8

N3

B-MA0 B-MBA0

A-TMA5 56 AR1204

A-MA8

A-MWEB

B-TMBA0

K1

DDR_1333_HYNIX

B-MA6

A-TMA3

A-MDQSLB

NC_4

DQL6

B9

A-MA7

A-MA6 A-MA7

NC_3

A9

G8

A-MA5

K7

DQSL

E1

A-MA5

L2

VDDQ_6

NC_6

B3

A-MA4

J7 CK

VDDQ_3

NC_2

A-MA3

A-MA3

B-MA8

K9

D9

VDD_9

BA0

L2

56 AR1214

A-TMBA0

A-MA13

VDDQ_1

J1 J9

R2

BA2

A1 C1

R8

A-MBA0

M7

BA1

A8

P2

A-MA2

B-TMA8 B-TMA6

56 AR1203

A-MA0

NC_5

VDD_8 VDD_9

P8

A-TMA6

A-MRESETB

VDD_6 VDD_7

N2

A-TMA8

1%

H1

P3

A-MA8 A-MA6 A-MA1

R1235 56

A-MVREFDQ

A2

P7

1%

VREFCA

R1236 56

A-MVREFCA

N3

M8

B-MA1

A-TMA1

A-MA1 DDR_1333_HYNIX

B-MA11

B-TMA1

K7

R3

R1

VDD_8

J7

EAN61828901

IC1202 H5TQ1G63DFR-H9C

R8

B2

N9

VDD_7

B-MA2

56 R1237

IC1201 H5TQ1G63DFR-H9C

1%

A5

N1

BA2

B-TMA11

A-TMA2

1%

56 AR1211

M3

56 R1238

56 AR1208

B-TMA2

N8

1%

A-MA2 EAN61828901

A-TMA0

1% 56 R1214

1%

1%

A-MA0

56 R1216

C1226 0.1uF 16V

A4

T8

A8

H1 VREFDQ

A3

R2

A7

M2

B-MA0

A2

N2 P2

A5

NC_5

R1215

A1

P8

A4

VREFCA

A0

P3

M7

L1201

M8

N3 P7

A1

B1 VSSQ_1

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9 D1 D8 E2 E8 F9 G1 G9

GP2R DDR_256

20101023 12


+3.3V_Normal

+3.3V_Normal

4.7K

+3.3V_Normal

R1404

S_FLASH_MAIN_MACRONIX

IC1401 MX25L8006EM2I-12G

R1403 10K

CS# /SPI_CS

SPI_SDO WP# /FLASH_WP GND

C R1401

1

8

VCC

C1401 0.1uF

SO/SIO1

2

7

3

6

4

5

HOLD#

SCLK SPI_SCK R1405 SI/SIO0 33 SPI_SDI

Q1401 KRC103S

B

OPT 0 E

OPT

S_FLASH_MAIN_WINBOND

IC1401-*1 W25Q80BVSSIG CS

DO[IO1]

%WP[IO2]

GND

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

1

8

2

7

3

6

4

5

VCC

HOLD[IO3]

CLK

DI[IO0]

GP2R SFLASH_1MB

20101023 13


GP2R_LARGE_TUNER +5V_TU

BOOSTER : CHINA OPT

RF_SWITCH_CTL Pull-up can’t be applied because of MODEL_OPT_2

L3701 BOOSTER_OPT BLM18PG121SN1D

BOOSTER_OPT R3734

BOOSTER_OPT R3743

0

close to TUNER

10K Q3701

BOOSTER_OPT ISA1530AC1 R3737 2.2K

E

OPT R3762 0 CONTROL_ATTEN

B C

CN_2INPUT_H_LG3911

TU3701 TDFR-C036D 1

BST_CNTL

2

+B

3

NC[RF_AGC]

4

4

AS

5

5

SCL

6

6

SDA

7

7

NC[IF_TP]

8

8

SIF

9

9

NC

10

10

VIDEO

11

11

GND

12

12

1.2V

13

13

3.3V

14

14

RESET

15

15

IF_AGC_CNTL

16

16

DIF_1

17

17

DIF_2

18

18 19

19

20

SHIELD

21 22 23 24 25 TUNER MULTI-OPTION

26

GP3_ATSC_1INPUT_H_SANYO

TU3702-*3 UDA55AL

27

TU3702-*1 TDVJ-H101F

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

ANT_PWR[OPT] 1 BST_CNTL 2 +B 3 NC[RF_AGC] 4 AS 5 SCL 6 SDA 7 NC(IF_TP) 8 SIF 9 NC 10 VIDEO 11 GND 12 1.2V 13 3.3V 14 RESET 15 IF_AGC_CNTL 16 DIF_1 17 DIF_2 18

19

28

NC_1

R3705

C3701 0.1uF 16V

BST_CNTL

R3707

+5V_TU

OPTION : RF AGC

RF_SW_OPT C3703 100pF 50V

C3704 0.1uF 16V

C3728 0.1uF 16V OPT

C B

R3754 10K

TU_IIC_NON_ATSC_SANYO FE_AGC_SPEED_CTL IF_AGC_SEL

OPT

TU_IIC_NON_ATSC_SANYO

OPT

TU_IIC_ATSC_SANYO R3740 1.2K

TU_I2C_NON_FILTER C3713 33 R3736 18pF TU_I2C_NON_FILTER 50V TU_I2C_NON_FILTER C3742 C3711 20pF 18pF 50V 50V

NC_2 C3702 0.1uF

NC_3

TU_IIC_ATSC_SANYO R3741 1.2K TU_SCL

close to TUNER

C3743 20pF 50V TU_I2C_FILTER

TU_SDA

R3751 220

R3752 220

TU_CVBS

TU_I2C_FILTER E R3749

+3.3V_TU

VIDEO +1.2V/+1.8V_TU

GND +B2[1.2V] C3738 0.1uF 16V

FULL_NIM C3705 100uF 16V

CN C3739 10uF 6.3V

C3707 100pF 50V

C3708 0.1uF 16V R3732 100

TU_I2C_FILTER R3735-*1

R3733 100K TUNER_RESET

B C

Q3703 ISA1530AC1

TU_I2C_FILTER R3736-*1

COIL

COIL DEMOD_RESET

C3710 0.1uF 16V

close to the tuner pin, add,09029

0 R3750 1K OPT

C3711-*1 C3713-*1 20pF 20pF 50V 50V TU_I2C_FILTER TU_I2C_FILTER

+3.3V_TU

+B3[3.3V]

+3.3V_TU

This was being applied to the only china demod, so this has to be deleted in both main and ISDB sheet.

RESET NC_4 R3704

SDA

0

IF_AGC_MAIN

HALF_NIM

SCL

FULL_NIM R3702 100

R3701

ERR

R3742 4.7K FULL_NIM

R3744 4.7K FULL_NIM

should be guarded by ground

FULL_NIM

HALF_NIM_1.2V_BCD IC3703

DEMOD_SCL

100

DEMOD_SDA

close to IF line C3712 22pF 50V FULL_NIM

SYNC HALF_NIM R3760 0

INPUT

C3714 22pF 50V FULL_NIM

IC3703-*1 AP1117EG-13

29

NC[RF_AGC]

1. should be guarded by ground 2. No via on both of them 3. Signal Width >= 12mils Signal to Signal Width = 12mils Ground Width >= 24mils

SDA NC(IF_TP)

31

30

OUT

R3766 1 1/10W

D3

1

R3770

EN

10K

2

FULL_NIM_SEMTEK

D5

VIN R3769

D6

8

FULL_NIM_BCD

VIDEO GND

SHIELD

+3.3V

380mA

R3764 0 1/10W FULL_NIM

R3748

ADJ

7

5.1K

3

6

4

5

R1

VOUT

NC

D7

NC_3

+1.2V/+1.8V_TU

FULL_NIM_SEMTEK

10K VCTRL

+5V_Normal

GND

FULL_NIM_BCD

FULL_NIM_BCD

C3717 0.1uF 16V

D4

PG

R3747 9.1K 1005

FULL_NIM C3730 10uF 10V

FULL_NIM C3729 0.1uF 16V

R2

IC3701-*1 SC4215ISTRT Vo=0.8*(1+R1/R2)

RESET

NC_1

IF_AGC_CNTL DIF_1

FULL_NIM

DIF_2

R3724

0

FE_TS_SYNC

FE_TS_DATA[0-7]

EN

19 SHIELD

FULL_NIM_BCD R3748-*1 10K

Close to the tuner 10K

C3741 10uF 10V HALF_NIM

C3740 0.1uF 16V HALF_NIM

IC3701 AP2132MP-2.5TRG1 [EP] R3771

R3703 150 OPT

HALF_NIM

HALF_NIM_1.2V_DIODES

SIF

+1.2V

HALF_NIM R3768 1.2K R1

OUTPUT

Please, check multi Item! 10/12

AS SCL

+1.2V/+1.8V_TU

ADJ/GND

IF_P_MSTAR R3761 0 HALF_NIM

D1 D2

1 2

IN

MCL D0

3

ADJ/GND

IF_N_MSTAR

VALID

R2 HALF_NIM R3767 10

AZ1117BH-ADJTRE1

+3.3V_TU

NC_2 +B[+5V]

Q3705

C

+5V_TU

16V

C3737 100pF 50V

ISA1530AC1

R3753 4.7K

R3741-*1 1K

33 R3735 TU_I2C_NON_FILTER

SDAT

SIF

TU_SIF

B

+3.3V_TU R3740-*1 1K

C3706 0.1uF 16V

SCLT

R3758 82 E

GPIO must be added.

Q3704 2SC3052 OPT

0

R3755 470

C3731 10uF 10V OPT

E

NC_1

FE_BOOSTER_CTL LNA2_CTL The pull-up/down of LNA2_CTL is depended on MODLE_OPT_1. GPIO must be added for FE_BOOSTER_CTL

+5V_TU

0

+B1[+5V] NC[RF_AGC]

BOOSTER_OPT

L3704

3

close to TUNER RF_S/W_CNTL

E

BOOSTER_OPT R3745 10K

FULL_NIM_BCD

2

C3709 0.01uF 25V BOOSTER_OPT

B

FULL_NIM

ANT_PWR[OPT]

Q3702 2SC3052

9

DVB_1INPUT_H_LGIT

BOOSTER_OPT

THERMAL

TU3702 TDTJ-S001D

1

C

SHIELD

FULL_NIM

R3730

0

FE_TS_VAL_ERR

VIN

GP3_ATSC_1INPUT_H_LGIT

FULL_NIM

R3731

0

R3725

0

1 8 FULL_NIM_SEMTEK 2

7

3

6

4

5

ADJ

VO

FE_TS_CLK NC_2

FULL_NIM_CHINA

GND

NC_3

FE_TS_DATA[0]

NTSC_2INPUT_H_LGIT

CN_2INPUT_H_ALTO

GP2R_AU_1INPUT_H_LGIT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

FULL_NIM

R3727

TU3702-*4 TDTJ-S101D

RF_S/W_CTL

0

TU3701-*4 TDFR-C236D

FE_TS_DATA[1]

BST_CTL +B1[5V]

1

NC_1[RF_AGC]

2

NC_2

3

SCLT

4

SDAT

5

NC_3

6

SIF

7

NC_4

8

VIDEO

9

GND

10

+B2[1.2V]

11

+B3[3.3V]

12

RESET

13

IF/AGC

14

DIF_1[N]

15

DIF_2[P]

16 17

19 18

ANT_PWR

FULL_NIM

R3728

0

NC_1

FE_TS_DATA[2]

2

TU3701-*2 TDFR-B036F

+B1[5V] RF_AGC

FULL_NIM

R3729

0

FE_TS_DATA[3]

1 2

SCL 3

FULL_NIM

R3726

0

FE_TS_DATA[4]

4

NC_2

5 6

SIF NC_3

FULL_NIM

R3721

7

0

VIDEO

FE_TS_DATA[5]

8 9

GND +B2[1.2V]

10

FULL_NIM

R3722

11

0

+B3[3.3V]

FE_TS_DATA[6]

12 13

RESET IF_AGC

14

FULL_NIM_CHINA

R3723

0

DIF_1[N]

15

FE_TS_DATA[7]

16 17

DIF_2[P] 18

SHIELD 19

19

TU3702-*2 TDTR-T036F

Close to the CI Slot

20

SHIELD

21 22 23

R3706

3 4

MOPLL_AS

SDA

1

FULL_NIM_BR

24

0

25 26

FULL_NIM_BR

27 28 29 31

30

RF_S/W_CNTL

5

BST_CNTL

6

BST_CNTL +B1[+5V] NC[RF_AGC] NC_1 SCLT

+B1[5V] NC_1[RF_AGC]

7

NC_2

8

SCLT

9

SDAT

10

SDAT NC_2 SIF NC_3

NC_3 SIF

11

NC_4

12

VIDEO

13

GND

14

VIDEO GND +B2[1.2V] +B3[3.3V]

+B2[1.2V] +B3[3.3V]

15

RESET

16

NC_5

17

SCL

18

RESET NC_4 SCL SDA

+5V_TUNER

SDA ERR

19

SYNC

20

VALID

21

MCL

22

ERR

+3.3V_Normal

SYNC

+5V_TU

VALID MCL

D1

23

D2

24

D3

25

D4

26

D0 D1

200mA

27

D7

28 29 31

30

SHIELD

60mA

MLB-201209-0120P-N2

D2

Size change L3703 MLB-201209-0120P-N2

D3

D5 D6

+3.3V_TU

Size change L3702

D0

SHIELD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

RF_S/W_CNTL

D4 D5 D6

C3719 22uF 10V

C3724 0.1uF 16V

C3722 22uF 16V

C3726 0.1uF 16V

D7

location movement,0929

GP2R TUNER_L

C3723 22uF 10V

C3725 0.1uF 16V

C3715 C3727 22uF 0.1uF 10V 16V

Add,0929

20101023 14


+1.8V_AMP +3.3V_Normal IC404

IN

3 Vd=1.4V 1

R474 1

AP1117E18G-13 ADJ/GND

120 mA

2 C434 0.1uF 16V

OUT

C446 0.1uF 16V

C421 10uF 10V

+24V

SPK_L+ D501 1N4148W 100V OPT

OPT R535 3.3

C515 0.1uF 50V

1 2

CLK_I

AUD_LRCK AUD_SCK AMP_SDA AMP_SCL

R504

100

R505

100

R506

33

R507

33

PVDD1B_2

PVDD1B_1

OUT1B_2

OUT1B_1

PGND1B_2

PGND1B_1

BST1B

VDR1B

48

47

46

45

44

43

PVDD1A_1

49

PVDD1A_2

OUT1A_1

OUT1A_2

PGND1A_1

51 50

52

53

PGND1A_2

36

OUT2A_1

VDD_IO

8

35

PVDD2A_2

DGND_PLL

9

34

PVDD2A_1

33

PVDD2B_2

AGND_PLL

SPEAKER_L C537 0.1uF 50V

L507 NRS6045T100MMGK R524 12

10

EAN60969603

LF

11

32

PVDD2B_1

12

31

OUT2B_2

DVDD_PLL

13

30

OUT2B_1

GND

14

29

PGND2B_2

D503 1N4148W 100V OPT

50V

R521 12

R525 12

R522 12

NRS6045T100MMGK L508 10.0uH

L509 10.0uH

C532 390pF 50V

D504 1N4148W 100V OPT

R528 4.7K

NRS6045T100MMGK R523 12

C535 0.47uF 50V

C538

R529

0.1uF 50V

4.7K

C539

R530

0.1uF 50V

4.7K

SPEAKER_R

SPK_R-

28

+24V

PGND2B_1

27 BST2B

26 VDR2B

24

25 /FAULT

MONITOR2

23 MONITOR1

22 MONITOR0

21 SCL

20 SDA

19 BCK

15

NTP-7100

C525 22000pF

C531 390pF 50V

AVDD_PLL

C513 0.1uF 16V

R520 12

4.7K

C534 0.47uF 50V

SPK_R+

C522 25V1uF

7

OPT C511 10uF 10V

100

BST2A

OUT2A_2

C505 0.1uF 16V

R503

VDR2A

40

PGND2A_1

+1.8V_AMP

AUD_LRCH

NC

41

PGND2A_2

IC501

18

OPT C503 10uF 10V

6

42

37

3.3K

C502 0.1uF 16V

5

WCK

R508

C433 10uF 10V OPT

4

GND_IO

17

100pF 50V

AD DGND_1

SDATA

C504

THERMAL 57

3

DGND_2

OPT C501 10uF 10V

BLM18PG121SN1D

BLM18PG121SN1D

L501

C508 1000pF 50V

C530 390pF 50V

R527

C520 1uF 25V

38

L502

10.0uH

D502 1N4148W 100V OPT

39

C509 0.1uF

+1.8V_AMP

54

EP_PAD BST1A VDR1A 25V /RESET

55

56 C512 1uF

+1.8V_AMP

NRS6045T100MMGK

C536 0.1uF 50V

SPK_L-

16

C506 1000pF 50V AUD_MASTER_CLK

L506 10.0uH

C518 22000pF 50V

L504

TP502

AMP_RESET

C514 22000pF 50V

DVDD

BLM18PG121SN1D

+3.3V_Normal

R526 12

C529 390pF 50V

OPT C547 0.01uF 50V

C521 10uF 35V

C519 0.1uF 50V

R519 12

C517 1uF 25V

C526

C527

0.1uF 50V

0.1uF 50V

C528 10uF 35V

C524 22000pF 50V

R513 0 POWER_DET C516 1000pF 50V

OPT

+3.5V_ST C507 18pF 50V

C510 18pF 50V

C546 22pF 50V

C544 22pF 50V

C545 22pF 50V

OPT

OPT

OPT

R514

100

WAFER-ANGLE

R515 10K C B

Q501 2SC3052

R517

SPK_L+

4

AMP_MUTE 10K

E

SPK_L-

3

SPK_R+

2

SPK_R-

1 P501

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP2R AMP_NTP

20101023 16


Rear AV COMPONENT2

AV_CVBS_IN REAR_AV D1619 R1654 30V 75 REAR_AV

+3.3V_Normal

C1648 220pF 50V +3.3V_Normal OPT

C1643 47pF 50V REAR_AV

R1612 10K

R1615 1K COMP2_DET

JK1604 PPJ233-01 5C

[RD]E-LUG

4C

[RD]O-SPRING

3C

[RD]CONTACT

D1624 5.6V OPT

OPT AV_CVBS_DET

R1666 1K REAR_AV

C1646 0.1uF 16V REAR_AV

[GN]E-LUG [GN]O-SPRING

L-MONO

[YL]CONTACT

4A

[YL]O-SPRING

5A

[YL]E-LUG

D1625 5.6V REAR_AV

L1609 120-ohm REAR_AV

R1671 470K REAR_AV

C1663 330pF 50V REAR_AV

R1689 12K

3A

COMP2_Y+

D1612 30V

5A [GN]CONTACT 4A

AV_R_IN

REAR_AV

[WH]C-LUG

R1619 75

6A

REAR_AV R1685 10K

4B

ETHERNET FOR DVB_T2

D1613 5.6V

R1660 10K REAR_AV

TP1610

[BL]E-LUG-S

D1614

R1620 75

[BL]O-SPRING

TP1611 COMP2_Pb+

5B

TP1612

[RD]E-LUG-S L1610 120-ohm

REAR_AV D1626 5.6V

REAR_AV R1684 10K

[RD]O-SPRING_1

C1662 330pF 50V REAR_AV

[WH]O-SPRING

470K REAR_AV

R1688 12K REAR_AV

TP1614

ET_RXD1 ET_TXD1 ET_REF_CLK

TP1615

ET_TX_EN

TP1616

TP1618

ET_MDC ET_MDIO ET_CRS

TP1619

ET_RXER

TP1620

/RST-PHY

TP1613 COMP2_Pr+

D1615 30V

5C

REAR_AV R1672

R1621 75

7C

AV_L_IN

REAR_AV

ET_RXD0 ET_TXD0

30V

7B

R1633 10K

5D [RD]CONTACT

COMP2_L_IN D1616 5.6V

4E [RD]O-SPRING_2

R1625 470K

C1616 1000pF 50V OPT

R1636 12K

TP1617

5E [RD]E-LUG R1632 10K

6E

COMP2_R_IN PPJ234-01 JK1603 REAR_COMP2

D1617 5.6V

R1626 470K

C1617 1000pF 50V OPT

R1634 12K

IC1601-*1 SN324

OUT1

1

14

OUT4

EU_OPT_AUK INV_IN1

NON_INV_IN1

+3.3V_Normal

R1613 10K

VCC

SC1/COMP1_DET R4223 0

D1611 5.6V OPT

C1607 0.1uF 16V

COMPONENT1

NON_INV_IN2

R1614 1K

EU_OPT L1606

EU_OPT R4210 0

AV_DET FIX-TER

22 21

10

SYNC_IN [GN]G

20

[GN]C_DET

19

8

SYNC_GND2 18 17

7

RGB_IO [RD]R [WH]L_IN

EU_OPT R1628 75

D1610 30V OPT

5

D1604 30V

RGB_GND 14 13 D2B_OUT

[RD]MONO

INV_IN2

+12V/+15V

EU_OPT C1625 0.1uF 50V

OUT2

Rf

12 G_OUT D2B_IN

PPJ-230-01 10

EU_OPT R1656 2.2K

CLOSE TO MSTAR

Rg

EU_OPT R1639 180

EU_OPT R1642 15K

C1664 0.01uF

+12V/+15V SC1_FB

SCART1_Lout

R4219

EU_OPT C1644 10uF 16V R4218 22K

EU_OPT R1657 5.6K

C1642 0.1uF 50V SCART1_Rout

R4216

EU_OPT C1654 33pF

EU_OPT

IN2+ EU_OPT R1665 33K

R4217 22K EU_OPT R1655 2.2K

D1716

ID B_OUT SC1_B+/COMP1_Pb+ AUDIO_L_IN 6

D1606 30V

B_GND

OPT EU_OPT D1618 R1623 30V 15K

R1605 75

SC1_ID

C1655 33pF

11

5

10

6

9

7

8

GND

NON_INV_IN3

INV_IN3

OUT3

1

14

2

13

3

12

4

11

5

10

6

9

7

8

OUT4

IN4-

IN4+

GND

IN3+

IN3-

OUT3

EU_OPT EU_OPT

OPT R1661 470K

C1645 10uF 16V EU_OPT

EU_OPT R1629 3.9K

IN2R1668 10K OUT2

DTV/MNT_R_OUT

7

EU_OPT R1667 10K IN1+

EU_OPT R1658 5.6K

100 C1665 0.01uF

9 8

IN1-

VCC

REC_8

R1604

EU_OPT R1664 33K

OPT R1662 470K

100

75

G_GND

OUT1

DTV/MNT_L_OUT

OPT 30V

SC1_G+/COMP1_Y+ D1605 30V

4

NON_INV_IN4

EU_OPT_BCD

R4221 0 EU_OPT

11

12

IC1601 AS324MTR-E1 DTV/MNT_VOUT

E

Gain=1+Rf/Rg

EU_OPT R1627 22

EU_OPT R1641 47K EU_OPT C1621 47uF 16V

R_GND

[RD]R_IN 4

EU_OPT R1616 75

SC1_R+/COMP1_Pr+ R1608 75

EU_OPT C1620 100uF 16V

EU_OPT Q1602 2SC3052 B

EU_OPT R1635 390

16 15

C

R4211 390

R_OUT

6

JK1601 COMPONENT1

D1603 30V OPT

SYNC_GND1

[BL]B

13

EU_OPT

SYNC_OUT

9

EU_OPT C1623 0.1uF 50V

EU_OPT R1640 470

C

C1608 220pF 50V OPT

D1602 30V OPT

COM_GND

[GN]GND

11

EU_OPT C1604 47pF 50V

3

INV_IN4

B

SC1_CVBS_IN EU_OPT R1609 75

13

IN CASE OF SMALL= 15V

SC1_SOG_IN EU_OPT E ISA1530AC1 Q1601

EU_OPT

2

5 AUDIO_GND 4 AUDIO_L_OUT

R1617 10K

3 AUDIO_R_IN 2 AUDIO_R_OUT 1

SC1/COMP1_L_IN D1607 5.6V NON_EU

R1606 470K

L1604 120-ohm

C1611 330pF 50V

PSC008-01 JK1602

R1618 10K

OPT R1687 10K

SC1/COMP1_R_IN D1609 5.6V NON_EU

L1603 120-ohm R1607 470K

C1612 330pF 50V

R1631 12K

OPT R1675 2K

Full Scart/ Comp1

[SCART AUDIO MUTE] +3.5V_ST EU_OPT L1601 BLM18PG121SN1D

EU_OPT C1609 1000pF 50V

EU_OPT C1618 4700pF

DTV/MNT_L_OUT EU_OPT Q1607 2SC3052

EU_OPT R1648 2K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EU_OPT L1602 BLM18PG121SN1D

EU_OPT C1610 1000pF 50V

EU_OPT C1619 4700pF

EU_OPT Q1608 2SC3052

1 2

EU_OPT C1636 0.1uF

OPT Q1615 2SC3052 E

REC_8 B

C

SCART1_MUTE 3

DTV/MNT_R_OUT

C

R4207 51K OPT

OPT Q1613 E 2SC3052

OPT Q1611 2SC3052

B

SC_RE2

DTV/MNT_R_OUT D1601 5.6V OPT

OPT R1695 12K

OPT R1676 560

EU_OPT R1652 10K

EU_OPT RT1P141C-T112 Q1610

C B

OPT R1677 10K OPT R1680 1K

SC_RE1

DTV/MNT_L_OUT D1608 5.6V OPT

+12V/+15V IN CASE OF SMALL= 15V

[SCART PIN 8]

R1630 12K

OPT R1678 680

OPT R1681 1K

E

EU_OPT R1650 2K

GP2R REAR_JACK

20101023 17


SIDE CVBS PHONE JACK (New Item Development) SIDE_CVBS L9903 BLM18PG121SN1D

JK9901 KJA-PH-1-0177 5A

[YL]E-LUG

4A

[YL]O-SPRING

3A

[YL]CONTACT

4B

[WH]O-SPRING

3C

[RD]CONTACT

SIDEAV_CVBS_IN

5

M5_GND

4

M4

3

M3_DETECT

1

M1

6

M6

SIDE_CVBS R9907 75

SIDE_CVBS D9901 30V ADUC30S03010L_AMODIODE

+3.3V_Normal SIDE_CVBS 10K R9911

[RD]O-SPRING

5C

[RD]E-LUG

SIDE_CVBS R9915 1K SIDEAV_DET

C9901 100pF SIDE_CVBS

OPT D9902 5.6V ADMC5M03200L_AMODIODE

SIDE_CVBS L9902 BLM18PG121SN1D

SIDE_AV_GENDER

4C

C9907 100pF OPT

SIDE_CVBS R9914 SIDEAV_L_IN

SIDE_CVBS R9906 470K

SIDE_CVBS D9903 5.6V ADMC5M03200L_AMODIODE

PPJ235-01 JK9903 SIDE_AV_3HOLE

SIDE_CVBS L9901 BLM18PG121SN1D

SIDE_CVBS 10K C9906 100pF 50V SIDE_CVBS R9913

SIDE_CVBS R9917 12K

SIDEAV_R_IN SIDE_CVBS D9904 5.6V ADMC5M03200L_AMODIODE

SIDE_CVBS C9905 100pF 50V

SIDE_CVBS R9905 470K

10K

SIDE_CVBS R9916 12K

SIDE COMPONENT PHONE JACK (New Item Developmen) +3.3V_Normal

R9904 10K SIDE_COMP

R9912 1K COMP2_DET SIDE_COMP

D9908 5.6V OPT JK9902 KJA-PH-1-0177 5

M5_GND

4

M4

3

M3_DETECT

1

M1

6

M6

R9910 75 D9907 30V SIDE_COMP

COMP2_Y+ SIDE_COMP

D9905 30V 75 R9909 SIDE_COMP

SIDE_COMP

COMP2_Pb+

SIDE_COMP

75 R9908 D9906 30V SIDE_COMP

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

COMP2_Pr+ SIDE_COMP

GP2R SIDE_JACK

20101023 18


* Option name of this page : CI_SLOT (because of Hong Kong) CI Region CI SLOT

+5V_CI_ON

CI TS INPUT

CI_DATA[0-7]

CI_DATA[0-7]

EAG41860102 CI_SLOT_JACK_LV3400 P1901 P1902 10067972-050LF 10067972-000LF

R1908

100

33

CI_TS_DATA[5]

1

R1905

2 3 4

CI_DATA[4] CI_DATA[5]

39

5

CI_DATA[6]

6

CI_DATA[7]

10K

41

7

42

8

43

R1919

47

9 CI_ADDR[11]

44

10

45

11

CI_ADDR[9]

12

CI_ADDR[8]

CI_MDI[0]

47

13

CI_ADDR[13]

CI_MDI[1]

48

14

CI_ADDR[14]

CI_MDI[2]

49

15

0.1uF

C1905

0

R1910

50

16

51

17

54

20

CI_MDI[6]

55

21

CI_ADDR[12]

CI_MDI[7]

56

22

CI_ADDR[7] CI_ADDR[6]

R1906 R1901

REG

10K

57

23 24

59

25

CI_ADDR[4]

AR1902

60

26

CI_ADDR[3]

61

27

CI_ADDR[2]

62

28

CI_ADDR[1]

63

29

CI_ADDR[0]

64

30

65

31

CI_DATA[1]

66

32

CI_DATA[2]

67

33

33

CI_TS_CLK CI_TS_VAL CI_TS_SYNC

CI_TS_DATA[0]

33

CI_TS_DATA[1] CI_TS_DATA[2] CI_TS_DATA[3]

0 100

OPT

R1909

R1907

/CI_CD2

CI HOST I/F

CI_ADDR[5]

CI_DATA[0] CI_ADDR[0-14]

34

68 AR1903

FE_TS_CLK

CI_MCLKI

CI_OE

GND

58

47

FE_TS_SYNC FE_TS_VAL_ERR

CI_MIVAL_ERR

/PCM_CE

C1909 0.1uF

OPT

47

R1902

PCM_RST

33

/PCM_IRQA

CI_MDI[5]

/PCM_WAIT

FE_TS_DATA[0]

0

R1916

18 19

CI_MDI[4]

FE_TS_DATA[2] FE_TS_DATA[1]

CI_MDI[1]

FE_TS_DATA[0-7]

100

52

OPT

G2 2

69

G1 1 CI_DET

+5V_Normal

IC1902

GND 1OE GND

10K

20

1

+3.3V_CI C1913 0.1uF VCC 16V

TOSHIBA 1A1

R1904

PCM_A[0]

GND

19

2

2OE

0ITO742440D

C1904 0.1uF 16V

2Y4 CI_ADDR[7] 1A2 PCM_A[1]

CI_MISTRT CI_MIVAL_ERR

2Y3 CI_ADDR[6]

3

18

4

17

5

CI_MCLKI 1A3 PCM_A[2] 2Y2 CI_ADDR[5] 1A4 PCM_A[3] 2Y1

CI DETECT

CI_ADDR[4] GND

+3.3V_Normal

FE_TS_DATA[3]

CI_WE

R1920

53

GND

AR1906

CI_MISTRT CI_ADDR[10]

CI_IORD

CI_MDI[3]

33

CI_MDI[2]

AR1904

CI_IOWR

46

FE_TS_DATA[4]

CI_MDI[0]

CI_DATA[3]

36 38 40

CI_TS_DATA[6] CI_TS_DATA[7]

FE_TS_DATA[6] FE_TS_DATA[5]

CI_MDI[5] CI_MDI[4] CI_MDI[3]

37

FE_TS_DATA[7]

TC74LCX244FT

AR1901 CI_TS_DATA[4]

CI_SLOT_JACK

35

AR1905

R1921 10K

C1903 0.1uF 16V

CI_DATA[0-7]

/CI_CD1

33

CI_MDI[7] CI_MDI[6]

@netLa

C1906 10uF 10V 10K

R1903

+5V_Normal

+3.3V_CI

+3.3V_CI

6

16

15

7

14

8

13

9

12

10

11

1Y1 CI_ADDR[0] 2A4 PCM_A[7] 1Y2 CI_ADDR[1] 2A3 PCM_A[6] 1Y3 CI_ADDR[2] 2A2 PCM_A[5] 1Y4 CI_ADDR[3] 2A1 PCM_A[4]

+3.3V_CI

CI_SLOT_OR_GATE_NXP IC1901 74LVC1G32GW

1

2

3

5

VCC

4

Y

R1917

0.1uF 16V

C1908

/CI_CD1

OPT

C1902 0.1uF

CI_DATA[0] GND

R1915

33

AR1907

PCM_D[0]

CI_DATA[1] CI_DET

CI_DATA[0-7]

C1901 0.1uF

47 R1918

OPT

/PCM_CD 47

PCM_D[1]

CI_DATA[2]

PCM_D[2]

CI_DATA[3]

PCM_D[3]

CI_DATA[4]

33

AR1908

PCM_D[4]

CI_DATA[5]

PCM_D[5]

CI_DATA[6]

PCM_D[6]

CI_DATA[7]

PCM_D[7]

PCM_D[0-7]

B

A

GND

/CI_CD2

10K

L1901 BLM18PG121SN1D

CI POWER ENABLE CONTROL PCM_D[0-7] CI_DATA[0-7]

+5V_CI_ON +5V_Normal

Q1902 RSR025P03 S

L1902 BLM18PG121SN1D

CI_ADDR[8]

D

33

AR1912 PCM_A[8]

R1914 22K

R1912 10K OPT

C1911 4.7uF 16V

C1910

G

0.1uF 16V

0.1uF

C1907

CI_ADDR[9]

16V

R1923 10K OPT

C1912 0.1uF 16V OPT

PCM_A[9]

CI_ADDR[10]

PCM_A[10]

CI_ADDR[11]

PCM_A[11]

CI_ADDR[12]

33

AR1913

CI_ADDR[13] R1922

PCM_A[12] PCM_A[13] PCM_A[14]

CI_ADDR[14]

/PCM_REG

REG

2.2K R1913 10K PCM_5V_CTL

C

R1924 10K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Q1901 2SC3052

B

E

CI_OE CI_WE

AR1909 33

/PCM_OE /PCM_WE

CI_IORD

/PCM_IORD

CI_IOWR

/PCM_IOWR

GP2R PCMCI

20101023 20


THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 6.5T_GAS

GAS1-*5 8.5T_GAS

12.5T_GAS MDS61887708 GAS1-*4 12.5T_GAS

9.5T_GAS

7.5T_GAS

5.5T_GAS

MDS61887710

MDS62110205

MDS62110204

GAS1

GAS1-*3

GAS1-*2 7.5T_GAS

GAS1-*1 5.5T_GAS

6.5T_GAS

MDS62110205

MDS62110204

GAS2-*2

GAS2-*1

9.5T_GAS

MDS62110209

MDS61887708

MDS61887710

GAS2-*5

GAS2-*4

GAS2-*3

8.5T_GAS

12.5T_GAS

9.5T_GAS

7.5T_GAS

MDS62110206

MDS62110206 GAS2

5.5T_GAS

MDS62110209

MDS61887708

MDS61887710

MDS62110205

MDS62110204

6.5T_GAS

GAS3-*5

GAS3-*4

GAS3-*3

GAS3-*2

GAS3-*1

MDS62110206

8.5T_GAS MDS62110209 GAS4-*5

12.5T_GAS MDS61887708 GAS4-*4

9.5T_GAS

7.5T_GAS

5.5T_GAS

MDS61887710

MDS62110205

MDS62110204

GAS4-*3

GAS4-*2

GAS4-*1

9.5T_GAS

7.5T_GAS

5.5T_GAS

MDS61887710

MDS62110205

MDS62110204

GAS5-*3

GAS5-*2

GAS5-*1

9.5T_GAS

7.5T_GAS

5.5T_GAS

MDS61887710

MDS62110205

MDS62110204

GAS6-*3

GAS6-*2

GAS6-*1

GAS3

6.5T_GAS MDS62110206

8.5T_GAS MDS62110209 GAS5-*5

12.5T_GAS MDS61887708 GAS5-*4

GAS4

6.5T_GAS MDS62110206 GAS5

8.5T_GAS

12.5T_GAS

MDS62110209

MDS61887708

GAS6-*5

GAS6-*4

6.5T_GAS MDS62110206 GAS6

8.5T_GAS

12.5T_GAS

MDS62110209

MDS61887708

GAS7-*5

GAS7-*4

9.5T_GAS

7.5T_GAS

5.5T_GAS

MDS61887710

MDS62110205

MDS62110204

GAS7-*3

GAS7-*2

GAS7-*1

6.5T_GAS MDS62110206 GAS7

SMD GASKET

8.5T_GAS MDS62110209

GP2R

SMD_GAS

20101023

20


+3.3V_Normal

L/DIM_LED/DRIVER

+3.3V_Normal P2100 12507WR-08L

3

R2100 2.2K

R2103 10K FRC_L/DIM_REVERSE_SEL

2

LED_DRIVER_D/L

OPT

R2101 2.2K

LED_DRIVER_D/L

R2102 10K 1

L/DIM_SCLK

4

5

L/DIM_MOSI

LED_DRIVER_D/L R4029 22

6

LED_DRIVER_D/L_SCL R4028 22

7

LED_DRIVER_D/L_SDA LED_DRIVER_D/L

8 9

V_SYNC C2100 18pF 50V OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

C2101 18pF 50V OPT

C2102 18pF 50V OPT

C2103 18pF 50V OPT

C2104 18pF 50V OPT

GP2R L/DIM_LED

20101023 21


TI solution RF-3D OPTION +3.3V_Normal

+3.3V_Normal P3401 12507WR-12L

L3401 120-ohm

3D_SG 1

2

3

4

5

6

7

8

9

10

11

12

3D_SG

3.3V

GND

RX

3D_SG R3402 100

M_REMOTE_RX

TX

3D_SG R3408 100

RESET

3D_SG R3409 100

DC

3D_SG R3407 100

R3410

R3411

2.7K 3D_SG

2.7K 3D_SG

R3412 2.7K 3D_SG

M_REMOTE_TX

M_RFModule_RESET

FREQ. GPOIO_0

DC_MREMOTE DD

3D_SG R3401 100

GPOIO_1

GPOIO_2

3D Off

0

0

0

60Hz

0

0

1

59.94Hz

0

1

0

50Hz

0

1

1

RESERVED

1

0

0

RESERVED

1

0

1

DD_MREMOTE GND

GPIO_0

3D_SG R3406 22

GPIO_1

3D_SG R3404 22

GPIO_2

3D_SG R3405 22

3D_SYNC

3D_SG R3403 22

3D_GPIO_0

3D_GPIO_1

3D_GPIO_2

3D_SYNC_RF

RESERVED

1

1

0

RESERVED

1

1

1

13 .

ALL 3D-SG OPTION

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.



Training Manual (GP2R Mstar)

< Contents > Overall Overall Block Block Diagram Diagram Video Video Signal Signal Block Block Audio Audio Signal Signal Block Block Flash Flash Block Block & & Reset Reset I2C I2C Block Block GPIO GPIO Block Block LVDS LVDS 출력 출력 Block Block POWER POWER Block Block Trouble Trouble Shooting Shooting

LG Electronics/ LCD TV Division LCD TV Gr. Copyright ⓒ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

LGE Internal Use Only


LCD Module LVDS

(51pin,FHD) IF +/-

(30pin, HD)

TU_CVBS

RF

TDTR - T036F

120Hz Option

SIF

LCD Module TU_SDA/SC

(41pin,FHD, 120Hz)

Reset / IF_AGC …

Side AV2 AV1

CVBS, L/R

DDR_Data[0:15], DQS, DM …

CVBS, L/R

Addr.[ ], ctrl. data

Y Pb Pr, L/R

Component 1/2

Data[16:31]

RGB/H/V

D-sub RGB Audio L/R (for RGB)

S7R(LGE101) & S7MR (LGE107)

Audio L/R

NVRAM Audio L/R

I2S

Digital Audio (Optic)

USB

NAND Flash(1 G bit) NAND01GW3A2CN6E

SCL, SDA_3.3V

HDMI 3 (side HDMI)

RS-232C (CTRL./SVC)

DDR2 (1 G bit) H5TQ1G63DFR-H9C

PCM_A [0 … 7] CS ,RE,WE……

HDMI 1/2 JACK PACK at REAR

DDR2 (1 G bit) H5TQ1G63DFR-H9C

SPDIF

RX/TX

RX/TX

MAX3232

H/P

Digital AMP NTP7100L

I2C(SCL/SDA) S/W Reset

Micom (UPD78F0514)

Reset Switch

DP/DM/ +5V 24MHz

X-tal

Copyright ⓒ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

LGE Internal Use Only


Video Video Signal Signal Block Block

IF +/-

RF

IP/IF

IF_AGC

TDTR - T036F

RXCAKP

IFAGC

TU_SIF

RXA0P

SIFP

TU_CVBS

CK+/-_HDMI1

RXCAKN

RXA0N

CVBS0P

RXA1P

D0+/-_HDMI1 D1+/-_HDMI1 D2+/-_HDMI1

RXC1N RXA2P

DSUB_R

CEC_REMOTE

RXA2N

RIN0P/M DSUB_G

GIN0P/M DSUB_B

BIN0P/M DSUB_HSYNC

HSYNC0 DSUB_VSYNC

VSYNC0

S7R(LGE101) & S7MR(LGE107)

COMP1_Y

GIN1P/M COMP1_Pr

RIN1P/M COMP1_Pb

BIN1P/M

RXCCKP

CK+/-_HDMI4

RXCCKN RXC0P RXC0N RXC1P

AV_CVBS_IN

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

D1+/-_HDMI4 D2+/-_HDMI4

RXC1N

CVBS0P SIDEAV_CVBS_I N

D0+/-_HDMI4

CVBS1P

RXC2P

CEC_REMOTE

RXC2N

LGE Internal Use Only


Audio Audio Signal Signal Block Block

IF +/-

RF

IP/IF

IF_AGC

TDTR - T036F

IFAGC

TU_SIF

SIFP

TU_CVBS

CVBS0P

I2S_OUT_MCK

AV_L_IN

I2S_MASTER_CL K I2S_LCRK

AUL2

I2S_OUT_WS

AV_R_IN

Digital AMP NTP7100N

I2S_SCK

AUR2 I2S_OUT_BCK

COMP1_L_IN

I2S_LCRH AUL1

COMP1_R_IN

S7R(LGE101)

I2S_OUT_SD

AUR1

& S7MR (LGE107) HP_ROUT Audio R SIDEAV_L_IN AUL0

H/P

HP_LOUT Audio L

SIDEAV_R_IN AUR0

PC_L_IN

+3.3V

AUL4

PC_R_IN

1K

AUL5

SPDIF_OUT SPDIF_OUT

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

LGE Internal Use Only


Flash Flash & & EJTAG EJTAG Block Block

PCM_A0

I/O 0

PCM_A1

I/O 1

PCM_A2

I/O 2

PCM_A[0-7]

I/O 3

PCM_A3 PCM_A4

I/O 4

8

I/O 5

PCM_A5 PCM_A6

I/O 6

PCM_A7

I/O 7

S7R(LGE101) & S7MR (LGE107)

NAND FLASH (NAND01GW3A2CN6E) /F_RB RB

F_RBZ

/PF_OE RE

/PF_OE

/PF_CE0 CE

/PF_CE0

/PF_CE1 CLE

/PF_CE1

+3.3V

PF_ALE ALE

PF_ALE

+3.5V_ST

/PF_WE WE

/PF_WE

PF WP WP

SOC_RESET PF_AD15

HWRESET

Micom (UPD78F0514) Reset Switch

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

LGE Internal Use Only


I2C I2C Block Block

1k ohm

1k ohm

1k ohm

Tuner TDTR-T036F TU3702

TGPIO2

33 ohm

TGPIO0

TU_SCL/SDA

33 ohm

TGPIO3

TGPIO1

1k ohm

+3.3V_Nor

+3.3V_TU

0 ohm

33 ohm

0 ohm

33 ohm

AMP_SCL/SDA

AUDIO AMP (NTP7100) IC501

22 ohm

+3.3V_Nor

0 ohm

22 ohm

0 ohm

DDCR_CK DDCR_DA

EEPROM (CAT24WC08W) IC103

22 ohm

S7R(LGE101)

22 ohm

3.3k ohm

I2C_SCL/SDA 3.3k ohm

EEPROM (M24M01) IC104

2.2k ohm

2.2k ohm

+3.3V_Nor.

GPIO 174

22 ohm NEC_SCL/SDA

& S7MR(LGE107)

22 ohm

GPIO 175

+5V_Gen.

Micom

RGB_DDC_SCL/S DA

22 ohm

DDCA_CK

22 ohm

DDCA_DA

0ohm 0 ohm

DDCDA_CK/DDCDC_CK

22 ohm DDC_SCL/SDA 22 ohm

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

DDCDA_DA/DDCDC_DA

22 ohm

22 ohm

2.7k ohm

2.7k ohm

+5V_Gen.

EEPROM AT24C02BN8 IC801/IC802/IC804

(UPD78F05134) IC1002

2.7k ohm

EEPROM AT24C02BN8 IC1105

2.7k ohm

2.2k ohm

2.2k ohm

+3.3V_Nor

EEPROM (AT24C512BW) IC1001

LGE Internal Use Only


GPIO GPIO Block Block

DSUB_DET

GPIO31

PWM0 PWM2

COMP1_DET AV_CVBS_DET SIDEAV_DET

5V_HDMI_1

5V_HDMI_4

GPIO 41

A_DIM PWM_DIM

P403 or P402 ( POWER WAFER)

Error_DET

GPIO40 GPIO17/PM11 GPIO151/TCON8

GPIO143/TCON0

S7R(LGE101)

GPIO147/TCON4

& S7MR(LGE107) UART_RX2 HP_DET

GPIO 8/PM2

UART_TX2

USB_DM1 USB_DP1

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

S7_RXD R2619

S7_TXD R2618

RS232C (MAX3232CDR)

USB_DM USB_DP

JK1450 (USB JACK)

LGE Internal Use Only


GPIO GPIO Block Block

Pin Number

Pin Name

Signal Name

41 42

UART_TX2/GPIO65 UART_RX2/GPIO64

M23 N23

S7_TXD S7_RXD

43 44

DDCR_DA/GPIO71 DDCR_CK/GPIO72

M22 N22

I2C_SDA I2C_SCL

45 46

DDCA_DA/UART0_TX DDCA_CK/UART0_RX

A5 B5

RGB_DDC_SDA RGB_DDC_SCL

47 48 49 50 51

PWM0/GPIO66 PWM1/GPIO67 PWM2/GPIO68 PWM3/GPIO69 PWM4/GPIO70

K23 K22 G23 G22 G21

PWM0 PWM1 PWM2 SC_RE2 SC_RE1

52 53 54 55 56

SAR0/GPIO31 SAR1/GPIO32 SAR2/GPIO33 SAR3/GPIO34 SAR4/GPIO35

C6 B6 C8 C7 A6

DSUB_DET MODEL_OPT_ PCM_5V_CTL RST_PHY RST_HUB

62 63

MPIF_CS_N MPIF_CLK

D14 D12

PIF_SPI_CS .

86 87 88 89

PM_SPI_DO/GPIO3 PM_SPI_DI/GPIO2 GPIO0/PM_SPI_CZ PM_SPI_CK/GPIO1

D10 E10 D11 D9

SPI_SDO SPI_SDI . SPI_SCK

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

90 91 92 93 94 95 96 97 98 99 100 101 102

Pin Number GPIO18/PM12/INT4 GPIO17/PM11/INT3 PM_SPI_CS2/GPIO16/PM10 GPIO15/PM9 PM_SPI_WP2/GPIO14/PM8/INT2 PM_SPI_WP1/GPIO13/PM7 PM_SPI_CS1/GPIO12/PM6 GPIO11/PM5/PM_UART_RX/INT1 GPIO10/PM4 GPIO9/PM3 GPIO8/PM2 GPIO7/PM1/PM_UART_TX GPIO6/PM0/INT0

Pin Name F10 G12 D8 F6 F7 E9 E8 C5 F9 G9 E11 D7 E7

Signal Name . AV_CVBS_DET DEMOD_RESET TUNER_RESET MODEL_OPT_2 FLASH_WP SPI_CS MODEL_OPT_1 MODEL_OPT_6 CONTROL_ATTEN HP_DET USB1_CTL USB1_OCD

103 104

GPIO51/UART1_TX GPIO50/UART1_RX

F19 F20

M_REMOTE_TX M_REMOTE_RX

105 106 107 108 109 110 111

GPIO42 GPIO41 GPIO40 GPIO39 GPIO38 GPIO37/UART3_TX GPIO36/UART3_RX

G19 G20 M20 L20 K20 L23 K21

MODEL_OPT_0 ERROR_OUT SC1/COMP1_DET FRC_RESET ET_RXER WIRELESS_DL_TX WIRELESS_DL_RX

112 113 114 115 116

GPIO151/TCON8 GPIO149/TCON6 GPIO147/TCON4 GPIO145/TCON2 GPIO143/TCON0

P21 L21 L22 M21 N21

SIDEAV_DET 5V_DET_HDMI_3 5V_DET_HDMI_4 5V_DET_HDMI_2 5V_DET_HDMI_1

LGE Internal Use Only


GPIO GPIO Block(MICOM) Block(MICOM)

INT_CTL

P71 P140

P73

Micom

P74

P403 or P402 ( POWER WAFER)

RL_ON

AMP_RESET_N

AUDIO AMP ( NTP7100L)

AMP_MUTE

(UPD78F0514) IC1002

KEY1 KEY2

IR

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

RXD0 TXD0

NEC_RXD R2619

NEC_TXD R2618

RS232C (MAX3232CDR)

ANI6 ANI7

INTP5

LGE Internal Use Only


GPIO GPIO Block(MICOM) Block(MICOM)

P n iN u m b e r 1 2 3 4 5 6 7 8 9 0 1 1 2 1

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

P n i N m e a P 6 / S 0 C L 0 P 6 / S 1 D A 0 P 6 2 /E X S C L 0 P 6 3 3 /T P I 5 / T 1 5 1 O /I N T P 4 P 7 5 P 3 7 7 4 /K R 3 P 2 /K 7 R 2 P 1 /K 7 R 1 P 0 /K 7 R 0 3 2 P /I N P 3 T / O C D B 1

S g in a lN a m e E C N _S C L E C N _S D A E C N _ E P R O M _S C L E C N _ E P R O M _S D A E C C _ R E M O T E _N E C O W P E R _ O N /O F 2 _1 M A O M P D E _L M 1 U T O P E T _ 0 O C _R S E S E T V _C T IN L M O D E _L 1 O P T _ 1 O C D 1 , R B F _R E S E T

3 1 4 1 5 1 6 1 7 8 1 9 1 0 2 2 1 2

3 1 P /I N P 2 T / O C D A 1 P 3 / IN 0 T P 1 P 7 /T 1 I 5 / T 0 5 0 O P 1 /P T 6 1 O / T 5 H /O IN 1 T H 0 P 5 P 1 / R 4 X D 6 P 1 / T 3 X D 6 P 1 / S 2 O 1 0 P 1 /S L 1 / R 0 X D 0 P 1 / S 0 C K 0 /T 1 X D 0

F _E R N A B L E ,O C D 1 A O W E P R _D E T L E D _B / L G _L O G O E D L _ IR / B U Z E C _IS P N _ R x E C _IS P N _ T x O W P E R _ O N /O F 2 _ E C N _R X D E C N _T X D

2 5 6 2 7 2 8 2 9 0 3 1 3 2 3 3 4 3 5 3 6 3

A N I 7 /P 2 7 A N I 6 /P 2 6 A N I 5 /P 2 5 A N I 4 /P 2 3 4 3 A N I 2 /P 2 A N I 1 /P 2 1 P 2 0 /A N I0 P 1 0 3 P 0 1 /T I0 1 / T 0 O 0 P 0 /T I0 0 P 1 0 /P C 4 / IN L T P 6

K E Y 1 K E Y 2 S ID E _ H P _M U T E P O W O E R _L P O N / O F F 1 M O D E L _ O 1 P T _ 2 M O D E L _ O 1 P T _ 3 S C A R T _ M 1 U T E W IR E L E S _S S W _C T R L D ID E _ W P P C O _ E N R L _O N

3 7 8 9 3 0 4

1 2 P / IN 0 T P P 0 4 1 /E X L V I P 4 0 R E S E T

W E IR L K E S E Y S _ 2 P W R _ E N IR E W L E S S _ D E T E C T M IC O M _ R E S E T

LGE Internal Use Only


LVDS LVDS Output Output Block Block

Panel_Vcc(+12V) LVDS TXA0+/LVDS TXA1+/LVDS TXA2+/-

P705(30pin)

LVDS TXAC+/-

LVDS Wafer

LVDS TXA3+/-

(HD, 60Hz)

LVDS TXA4+/-

Panel_Vcc(+12V)

P703(51pin)

S7R(LGE101) & S7MR(LGE107)

LVDS Wafer LVDS

(FHD, 60Hz)

OUT Block

LVDS TXB0+/LVDS TXB1+/-

P704(41pin)

LVDS TXB2+/-

LVDS Wafer

LVDS TXBC+/-

(FHD, 120Hz)

LVDS TXB3+/-

120Hz OPT

LVDS TXB4+/-

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

LGE Internal Use Only


POWER POWER Block Block (+3.5V_ST) (+3.5V_ST)

+3.3V_ST

P403 or P402 (#9~12), (#10,12)

+3.5V_ST L404

IC1002 UPD78F0514 (Micom) IC1001 M24C16-WMN6T (EEPROM)

IC403 SN1007054 (DCDC)4A IC407 TPS54319 (DCDC)3A

+1.26V_VDDC

+1.5V_DDR

IC100 Main SOC S7(LGE101D) & S7 T(LGE105)

IC1, IC2 H5PS5162FFR-S6C DDR2 IC1101 MAX3232CDR (RS-232C)

IC408 APX803D (RESET IC)

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

Power_DET

LGE Internal Use Only


POWER POWER Block Block (+24V (+24V & & 12V) 12V)

+24V

P403 or P402 (#2,4,3), (#1,2)

+24V L407

IC409 APS803D (RESET IC)

Power_DET

IC501 NTP-7100

+12V

P403 (#17,19,21)

+12V/+15V L402

IC401 AOZ1073A (DCDC)3A IC405 AOZ1073AIL (DCDC)3A

+3.3V_Normal

IC406 AOZ1072AIL (DCDC)2A

+5V_Normal

Q409 AO3407A (FET)

IC408 APX803D

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

+5V_USB

IC1450 AP2191SG-13 (OPC)

P1450 USB JACK

PANEL_VCC

P703/P705

Power_DET

LGE Internal Use Only


POWER POWER Block Block (+3.3V_Normal) (+3.3V_Normal)

+3.3V_Nor mal

IC405 AOZ1073AIL (DCDC)3A

+3.3V_Normal L424

IC104 AT24C1024BN EEPROM IC103 CAT24WC08W HDCP EEPROM IC102 NAND01GW3A2CN6E Flash IC1401 MX25L3205DM2I Serial Flash JK1103 SPDIF IC501 NTP7100 AMP IC404 AZ1117H-1.8TRE1 LDO

+1.8V_AMP

TU6600 TDVJ-H001F Tuner

+3.3V_TU

L3703

IC402 AZ2940D-2.5TRE1 LDO

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

IC501 NTP7100

+2.5V_Normal

IC100 Main SOC S7R(LGE101) & S7MR(LGE107)

LGE Internal Use Only


POWER POWER Block Block (+5V_Normal) (+5V_Normal)

+5V_Norm al

IC406 AOZ1072AI (DCDC)2A

+5V_Normal L422

IC801/802/804 AT24C02BN EDID EEPROM

For HDMI

IC1105 AT24C02BN EDID EEPROM

For RGB PC

+5V_TU

L3702

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

TU3702 TDTR-T036F Tuner

LGE Internal Use Only


1. Power-up boot check Check stand-by Voltage. P403 9~12pin : +3.5V_ST

No

Check Power connector

No

Replace L404

ok

Main B/D 3.5V Line Short Check

ok

Replace Power board.

ok Check Micom Voltage IC1002 pin 48 : +3.5V

ok Check X1002 Crystal 32.768 KHz

No Replace X1002

ok Check P404 PWR_ON. 1pin : 3.3V

No

Re-download Micom software.

No

Replace Micom(IC1002) or Main board

ok Check Multi Voltage P404 2 pin : *20 or 24V , 17 pin : 12V

No

Replace Power Board

ok Check IC402/3/5/7 Output Voltage IC402 : 2.5V IC403 : 1.26V IC405 : 3.3V IC407 : 1.5V

No

Replace IC402/ 3 / 5 / 7

No

Replace X201

No

Replace Q409

No

Replace Mstar(IC101) or Main Board

ok Check X201 Crystal 24 MHz

ok Check LVDS Power Voltage Q409 : 12V

ok Check Mstar LVDS Output

ok Check Inverter Control & Error Out P404 18 pin : High P404 *24 pin : low

No

Check Power Board or Module

ok Change Module Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

LGE Internal Use Only


2. Digital TV Video Check RF Cable & Signal

ok Check Tuner No.3 pin (5V Power)

No

Check IC406

ok Check Tuner No 14 pin (3.3V Power)

No Check IC405

ok Check Tuner No 13 pin (1.2V Power )

No

Check IC3703

ok Check IF_P/N Signal TU5001 17/18 Pin

No

No

Replace IC406

ok

Replace Tuner

No

Replace IC405

ok

Replace Tuner

No

Replace IC3703

ok

Replace Tuner

Bad Tuner. Replace Tuner.

ok Check Mstar LVDS Output

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

No

Replace Mstar(IC101) or Main Board.

LGE Internal Use Only


3. Analog TV Video Check RF Cable & Signal

ok Check Tuner No.3 pin (5V Power)

No

Check IC406

ok Check Tuner No 14 pin (3.3V Power)

No Check IC405

ok Check Tuner No 13 pin (1.2V Power )

No

Check IC3703

ok Check Tuner No 11 pin (CVBS signal)

No

No

Replace IC406

ok

Replace Tuner

No

Replace IC405

ok

Replace Tuner

No

Replace IC3703

ok

Replace Tuner

Bad Tuner. Replace Tuner.

ok Check Mstar LVDS Output

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

No

Replace Mstar(IC101) or Main Board.

LGE Internal Use Only


4. AV Video Check input signal format. Is it supported?

ok Check AV Cable for damage or open connector

ok Check JK1604 , JK9903 CVBS Signal Line R246 , R4016

No

Replace Jack

ok Check CVBS_DET Signal

No

Replace R1660 or R1666

ok Check Mstar LVDS Output

No

Replace Mstar(IC100) or Main Board.

5. Component Video Check input signal format. Is it supported?

ok Check Component Cable for damage or open connector.

ok Check JK1601/JK1603 Y/PB/PR signal Line

No

Replace Jack

ok Check COMP_DET Signal

No

Replace R1612 or R1615 or R1613,R1614

ok Check Mstar LVDS Output

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

No

Replace Mstar(IC100) or Main Board.

LGE Internal Use Only


6. RGB Video Check input signal format. Is it supported?

ok Check RGB Cable conductors for damage or open connector

ok Check EDID & EEPROM IC1105 I2C Signal R1411, R1413(SDA,SCL)

No

Replace the defective IC or re-download EDID data

ok Check JK1104 H/V_Sync/R/G/B Signal Line

No

Replace Jack

ok Check DSUB_DET

No

Replace R1146 or R1147

ok Check Mstar LVDS Output

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

No

Replace Mstar(IC100) or Main Board.

LGE Internal Use Only


7. HDMI Video Check input signal format. Is it supported?

ok Check HDMI Cable for damage or open connector.

ok Check EDID & EEPROM IC801, IC802, IC804 I2C Signal

No

Replace the defective IC or re-download EDID data

ok Check JK801, JK802, JK903

No

Replace Jack

No

Replace R895, R896, R897

ok Check HPD

ok Check HDCP Key EEPROM(IC103) Power & I2C Signal

No

Replace the defective IC.

ok Check HDMI Signal

No

Check other set If no problem, check signal line

No

Replace Main Board

ok Check Mstar LVDS Output

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

No

Replace Mstar(IC101) or Main Board.

LGE Internal Use Only


8. All Source Audio Check the TV Speaker Menu (Menu -> Sound -> TV Speaker)

Off

Toggle the Menu

On Check AMP IC(IC501) Power 24V(or 20V), 3.3V, 1.8V.

No

Check Regulator IC404(1.8V), IC405(3.3V), POWER B/D(24V)

ok No

Check Mstar AUDIO_MASTER_CLK R148

Replace Mstar(IC101) or Main Board.

ok Check AMP I2C Line R506, R507

No

Check signal line. Or replace Mstar(IC101) or IC501

ok Check Mstar I2S Output R503, R504, R505

No

Check signal line. Or replace Mstar(IC101) or IC501

ok Check Output Signal P501 1, 2, 3, 4 pin.

No

Replace Audio AMP IC(IC501)

ok Check Speaker cable

No

Replace connector if found to be damaged.

ok Check speaker.

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

No

Replace speaker if found to be damaged.

LGE Internal Use Only


9. Digital TV Audio Check RF Cable & Signal

ok Check Tuner No.3 pin (5V Power)

No

Check IC406

ok Check Tuner No 14 pin (3.3V Power)

No Check IC405

ok Check Tuner No 13 pin (1.2V Power )

No

Check IC3703

ok Check IF_P/N Signal TU5001 17/18 Pin

No

No

Replace IC406

ok

Replace Tuner

No

Replace IC405

ok

Replace Tuner

No

Replace IC3703

ok

Replace Tuner

Bad Tuner. Replace Tuner.

ok Check Mstar LVDS Output

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

No

Replace Mstar(IC101) or Main Board.

LGE Internal Use Only


10. Analog TV Audio Check RF Cable & Signal

ok Check Tuner No.3 pin (5V Power)

No

Check IC406

ok Check Tuner No 14 pin (3.3V Power)

No Check IC405

ok Check Tuner No 13 pin (1.2V Power )

No

Check IC3703

ok Check Tuner No 9 (SIF)

No

No

Replace IC406

ok

Replace Tuner

No

Replace IC405

ok

Replace Tuner

No

Replace IC3703

ok

Replace Tuner

Bad Tuner. Replace Tuner.

ok Check Q3709

No

Replace Q3709 TR

ok Replace the IC101 or main b;d

Copyright â“’ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

LGE Internal Use Only


11. AV Audio Check AV Cable for damage for damage or open connector

ok Check JK1604 , JK9903 or JK9901 & Audio Line

No

Replace Jack

ok Follow procedure ‘8. All source audio’ trouble shooting guide.

12. Component Audio Check Component Cable for damage or open connector.

ok Check JK1603, JK1601 & Audio Line

No

Replace Jack

ok Follow procedure ‘8. All source audio’ trouble shooting guide.

13. RGB Audio Check Cable conductors for damage or open connector

ok Check JK1102 & Audio Line

No

Replace Jack

ok Follow procedure ‘8. All source audio’ trouble shooting guide.

Copyright ⓒ 2011 LG Electronics. Inc. All right reserved. Only for training and service purposes

LGE Internal Use Only


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