Manual de serviço tvs philips 32pfl7404h 12, 42pfl7404h 12, 47pfl7404h 12, 52pfl7404h 12, 32pfl8404h by Portal da Eletrônica

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Chassis

Q548.1E LA

18560_000_090401.eps 090401

Contents

Page

1. 2. 3. 4. 5. 6. 7. 8. 9.

2 2 5 9 16 34 39 49

Revision List Technical Specifications and Connections Precautions, Notes, and Abbreviation List Mechanical Instructions Service Modes, Error Codes, and Fault Finding Alignments Circuit Descriptions IC Data Sheets Block Diagrams Wiring Diagram 32" (Frame) Wiring Diagram 37" (Roadrunner) Wiring Diagram 42" (Frame/Roadrunner) Wiring Diagram 47" (Frame) Wiring Diagram 47" (Roadrunner) Wiring Diagram 52" (Frame) Block Diagram Video Block Diagram Audio Block Diagram Control & Clock Signals Block Diagram I2C Supply Lines Overview 10. Circuit Diagrams and PWB Layouts Interface Ambilight: Interface + Single DC-DC Interface Ambilight: Dual DC-DC Interface Ambilight: Microcontrollerblock 6 LED Low-Pow: Microcontroller Block Liteon 6 LED Low-Pow: Microcontroller Block Liteon 6 LED Low-Pow: LED Liteon 8 LED Low-Pow: Microcontroller Block Liteon 8 LED Low-Pow: Microcontroller Block Liteon 8 LED Low-Pow: LED Liteon 8 LED Low-Pow: LED Drive Liteon 10 LED Low-Pow: Microcontroller Block Liteon 10 LED Low-Pow: Microcontroller Block Liteon 10 LED Low-Pow: LED Liteon

57 58 59 60 61 62 63 64 65 66 67 Drawing 68 69 70 72 73 74 76 77 78 79 81 82 83

Contents

PWB 71 71 71 75 75 75 80 80 80 80 85 85 85

Page

10 LED Low-Pow: LED Drive Liteon 12 LED Low-Pow: Microcontroller Block Liteon 12 LED Low-Pow: Microcontroller Block Liteon 12 LED Low-Pow: LED Liteon 12 LED Low-Pow: LED Drive SSB: DC/DC +3V3 +1V2 SSB: DC/DC +3V3 +1V2 Standby SSB: Front End SSB: PNX8543 - Power SSB: PNX8543 - Video Streams/LVDS Output SSB: PNX8543 Audio Amplifier SSB: PNX8543 Audio SSB: PNX8543 Analog AV SSB: PNX8543 SDRAM SSB: PNX8543 Control MIPS/Flash/PCI SSB: PNX8543 Standby Control/Debug SSB: Bolt-on SSB: Analog IO - Scart 1 & 2 SSB: YPbPr / Side I/O / S-video SSB: HDMI SSB: Ethernet SSB: PCMCIA SSB: Class-D SSB: Display Interface (Common) SSB: Display Supply SSB: PNX5100 - Power SSB: PNX5100 - SDRAM SSB: PNX5100 - Control / PCI / Debug SSB: PNX5100 - LVDS In/Out SSB: PNX5100 - AmbiLight SSB: SRP List Explanation SSB: SRP List Part 1 SSB: SRP List Part 2

84 86 87 88 89 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118

85 90 90 90 90 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119 119

Â© Copyright 2009 Koninklijke Philips Electronics N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.

Published by ER/TY 0964 BU TV Consumer Care, the Netherlands

Subject to modification

EN 3122 785 18560 2009-Apr-03

EN 2

Q548.1E LA

Revision List

1. Revision List Manual xxxx xxx xxxx.0 • First release.

2. Technical Specifications and Connections Index of this chapter: 2.1 Technical Specifications 2.2 Directions for Use 2.3 Connections 2.4 Chassis Overview Notes: • Figures can deviate due to the different set executions. • Specifications are indicative (subject to change).

2.1

Technical Specifications For on-line product support please use the links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers. Table 2-1 Described Model numbers CTN

2.2

Styling

Published in:

32PFL7404H/12 Frame

3122 785 18560

42PFL7404H/12

3122 785 18560

47PFL7404H/12

3122 785 18560

52PFL7404H/12

3122 785 18560

32PFL8404H/12 Roadrunner

3122 785 18560

37PFL8404H/12

3122 785 18560

42PFL8404H/12

3122 785 18560

47PFL8404H/12

3122 785 18560

Directions for Use You can download this information from the following websites: http://www.philips.com/support http://www.p4c.philips.com

2009-Apr-03

Technical Specifications and Connections 2.3

Q548.1E LA

EN 3

Connections

Side connectors 26-52”

Back connectors

11 10

19-22”

AUDIO OUT

2 3 4

SPDIF OUT

9 EXT 2

(RGB/CVBS)

EXT 1

(RGB/CVBS)

12 VGA

6 AUDIO IN : LEFT / RIGHT HDMI 1 / DVI HDMI 2 / DVI HDMI 3 / DVI VGA

HDMI 3

EXT 3

HDMI 2

HDMI 1 TV ANTENNA

16 18440_001_090217.eps 090217

Figure 2-1 Connection overview Note: The following connector colour abbreviations are used (according to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow. 2.3.1

Side Connections 1 - Cinch: Audio - In Rd - Audio R Wh - Audio L

0.5 VRMS / 10 kΩ 0.5 VRMS / 10 kΩ

2 - Cinch: Video CVBS - In Ye - Video CVBS 1 VPP / 75 Ω

jq jq

3 - S-Video (Hosiden): Video Y/C - In 1 - Ground Y Gnd 2 - Ground C Gnd 3 - Video Y 1 VPP / 75 Ω 4 - Video C 0.3 VPP / 75 Ω 4 - Head phone (Output) Bk - Head phone 32 - 600 Ω / 10 mW 5 - Common Interface 68p - See diagram B05C SSB: PCMCIA

H H j j

jq 2009-Apr-03

EN 4

Q548.1E LA

Technical Specifications and Connections 12 - VGA: Video RGB - In

6 - USB2.0

5 10

10000_002_090121.eps 090127

10000_022_090121.eps 090121

Figure 2-4 VGA Connector Figure 2-2 USB (type A) 1 2 3 4

- +5V - Data (-) - Data (+) - Ground

k jk jk H

Gnd

7 - HDMI: Digital Video, Digital Audio - In (see connector 15) 8 - Service Connector (UART) 1 - Ground Gnd 2 - UART_TX Transmit 3 - UART_RX Receive 2.3.2

H k j

Rear Connections 9 - EXT1 & 2: Video RGB - In, CVBS - In/Out, Audio - In/Out 20

10000_001_090121.eps 090121

Figure 2-3 SCART connector 1 2 3 4 5 6 7 8

- Audio R - Audio R - Audio L - Ground Audio - Ground Blue - Audio L - Video Blue - Function Select

9 10 11 12 13 14 15 16

- Ground Green - n.c. - Video Green - n.c. - Ground Red - Ground P50 - Video Red - Status/FBL

17 18 19 20 21

- Ground Video - Ground FBL - Video CVBS/Y - Video CVBS - Shield

0.5 VRMS / 1 kΩ 0.5 VRMS / 10 kΩ 0.5 VRMS / 1 kΩ Gnd Gnd 0.5 VRMS / 10 kΩ 0.7 VPP / 75 Ω 0 - 2 V: INT 4.5 - 7 V: EXT 16:9 9.5 - 12 V: EXT 4:3 Gnd

j H j

Gnd Gnd 0.7 VPP / 75 Ω 0 - 0.4 V: INT 1 - 3 V: EXT / 75 Ω Gnd Gnd 1 VPP / 75 Ω 1 VPP / 75 Ω Gnd

H H j j H H k j H

10 - Cinch: S/PDIF - Out Bk - Coaxial 0.4 - 0.6VPP / 75 Ω

kq kq

Chassis Overview Refer to chapter Block Diagrams for PWB/CBA locations.

2009-Apr-03

- Video Red - Video Green - Video Blue - n.c. - Ground - Ground Red - Ground Green - Ground Blue - +5VDC - Ground Sync - n.c. - DDC_SDA - H-sync - V-sync - DDC_SCL

0.7 VPP / 75 Ω 0.7 VPP / 75 Ω 0.7 VPP / 75 Ω

j j j

Gnd Gnd Gnd Gnd +5 V Gnd

H H H H j H

DDC data 0-5V 0-5V DDC clock

j j j j

13 - Mini Jack: Audio - In Wh - Audio L 0.5 VRMS / 10 kΩ Rd - Audio R 0.5 VRMS / 10 kΩ

jo jo

14 - EXT3: Cinch: Video YPbPr - In, Audio - In Gn - Video Y 1 VPP / 75 Ω Bu - Video Pb 0.7 VPP / 75 Ω Rd - Video Pr 0.7 VPP / 75 Ω Rd - Audio - R 0.5 VRMS / 10 kΩ Wh - Audio - L 0.5 VRMS / 10 kΩ

jq jq jq jq jq

15 - HDMI 1, 2 & 3: Digital Video, Digital Audio - In 19 18

1 2 E_06532_017.eps 250505

Figure 2-5 HDMI (type A) connector

0.7 VPP / 75 Ω

11 - Cinch: Audio - Out Rd - Audio - R 0.5 VRMS / 10 kΩ Wh - Audio - L 0.5 VRMS / 10 kΩ

2.4

k j k H H j jk

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

- D2+ - Shield - D2- D1+ - Shield - D1- D0+ - Shield - D0- CLK+ - Shield - CLK- Easylink - n.c. - DDC_SCL - DDC_SDA - Ground - +5V - HPD - Ground

16 - Aerial - In - - IEC-type (EU)

Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel Control channel

j H j j H j j H j j H j jk

DDC clock DDC data Gnd

j jk H j j H

Hot Plug Detect Gnd

Coax, 75 Ω

Precautions, Notes, and Abbreviation List

Q548.1E LA

EN 5

3. Precautions, Notes, and Abbreviation List Index of this chapter: 3.1 Safety Instructions 3.2 Warnings 3.3 Notes 3.4 Abbreviation List

3.1

Safety Instructions Safety regulations require the following during a repair: • Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA). • Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Of de set ontploft! Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points: • Route the wire trees correctly and fix them with the mounted cable clamps. • Check the insulation of the Mains/AC Power lead for external damage. • Check the strain relief of the Mains/AC Power cord for proper function. • Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply): 1. Unplug the Mains/AC Power cord and connect a wire between the two pins of the Mains/AC Power plug. 2. Set the Mains/AC Power switch to the “on” position (keep the Mains/AC Power cord unplugged!). 3. Measure the resistance value between the pins of the Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 MΩ and 12 MΩ. 4. Switch “off” the set, and remove the wire between the two pins of the Mains/AC Power plug. • Check the cabinet for defects, to prevent touching of any inner parts by the customer.

3.2

•

Warnings •

• • •

All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential. Be careful during measurements in the high voltage section. Never replace modules or other components while the unit is switched “on”. When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.

3.3

Notes

3.3.1

General •

Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and

3.3.2

Schematic Notes •

• • • • •

3.3.3

picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3). Where necessary, measure the waveforms and voltages with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.

All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kΩ). Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω). All capacitor values are given in micro-farads (μ = × 10-6), nano-farads (n = × 10-9), or pico-farads (p = × 10-12). Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF). An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values. The correct component values are listed on the Philips Spare Parts Web Portal.

Spare Parts For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4

BGA (Ball Grid Array) ICs Introduction For more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com. Select “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs. BGA Temperature Profiles For BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.

3.3.5

Lead-free Soldering Due to lead-free technology some rules have to be respected by the workshop during a repair: • Use only lead-free soldering tin. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle. • Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: – To reach a solder-tip temperature of at least 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications. • Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat. • Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

2009-Apr-03

EN 6 3.3.6

Q548.1E LA

Precautions, Notes, and Abbreviation List 3.4

Alternative BOM identification It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”. The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number. Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number. MODEL

: 32PF9968/10

PROD.NO: AG 1A0617 000001

MADE IN BELGIUM 220-240V ~ 50/60Hz 128W VHF+S+H+UHF

BJ3.0E LA 10000_024_090121.eps 090121

Abbreviation List 0/6/12

AARA

ACI

ADC AFC

AGC

AM AP AR ASF

ATSC

ATV Auto TV

AV AVC AVIP B/G BLR BTSC

Figure 3-1 Serial number (example) 3.3.7

Board Level Repair (BLR) or Component Level Repair (CLR) If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

3.3.8

Practical Service Precautions •

•

It makes sense to avoid exposure to electrical shock. While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard. Always respect voltages. While some may not be dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

B-TXT C CEC

CL CLR ComPair CP CSM CTI

CVBS DAC DBE DDC D/K DFI DFU DMR DMSD DNM

2009-Apr-03

SCART switch control signal on A/V board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format Automatic Aspect Ratio Adaptation: algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio Automatic Channel Installation: algorithm that installs TV channels directly from a cable network by means of a predefined TXT page Analogue to Digital Converter Automatic Frequency Control: control signal used to tune to the correct frequency Automatic Gain Control: algorithm that controls the video input of the feature box Amplitude Modulation Asia Pacific Aspect Ratio: 4 by 3 or 16 by 9 Auto Screen Fit: algorithm that adapts aspect ratio to remove horizontal black bars without discarding video information Advanced Television Systems Committee, the digital TV standard in the USA See Auto TV A hardware and software control system that measures picture content, and adapts image parameters in a dynamic way External Audio Video Audio Video Controller Audio Video Input Processor Monochrome TV system. Sound carrier distance is 5.5 MHz Board-Level Repair Broadcast Television Standard Committee. Multiplex FM stereo sound system, originating from the USA and used e.g. in LATAM and AP-NTSC countries Blue TeleteXT Centre channel (audio) Consumer Electronics Control bus: remote control bus on HDMI connections Constant Level: audio output to connect with an external amplifier Component Level Repair Computer aided rePair Connected Planet / Copy Protection Customer Service Mode Color Transient Improvement: manipulates steepness of chroma transients Composite Video Blanking and Synchronization Digital to Analogue Converter Dynamic Bass Enhancement: extra low frequency amplification See “E-DDC” Monochrome TV system. Sound carrier distance is 6.5 MHz Dynamic Frame Insertion Directions For Use: owner's manual Digital Media Reader: card reader Digital Multi Standard Decoding Digital Natural Motion

Precautions, Notes, and Abbreviation List DNR DRAM DRM DSP DST

DTCP

DVB-C DVB-T DVD DVI(-d) E-DDC

EDID EEPROM EMI EPLD EU EXT FDS FDW FLASH FM FPGA FTV Gb/s G-TXT H HD HDD HDCP

HDMI HP I I2 C I2D I2S IF IR IRQ ITU-656

Digital Noise Reduction: noise reduction feature of the set Dynamic RAM Digital Rights Management Digital Signal Processing Dealer Service Tool: special remote control designed for service technicians Digital Transmission Content Protection; A protocol for protecting digital audio/video content that is traversing a high speed serial bus, such as IEEE-1394 Digital Video Broadcast - Cable Digital Video Broadcast - Terrestrial Digital Versatile Disc Digital Visual Interface (d= digital only) Enhanced Display Data Channel (VESA standard for communication channel and display). Using E-DDC, the video source can read the EDID information form the display. Extended Display Identification Data (VESA standard) Electrically Erasable and Programmable Read Only Memory Electro Magnetic Interference Erasable Programmable Logic Device Europe EXTernal (source), entering the set by SCART or by cinches (jacks) Full Dual Screen (same as FDW) Full Dual Window (same as FDS) FLASH memory Field Memory or Frequency Modulation Field-Programmable Gate Array Flat TeleVision Giga bits per second Green TeleteXT H_sync to the module High Definition Hard Disk Drive High-bandwidth Digital Content Protection: A “key” encoded into the HDMI/DVI signal that prevents video data piracy. If a source is HDCP coded and connected via HDMI/DVI without the proper HDCP decoding, the picture is put into a “snow vision” mode or changed to a low resolution. For normal content distribution the source and the display device must be enabled for HDCP “software key” decoding. High Definition Multimedia Interface HeadPhone Monochrome TV system. Sound carrier distance is 6.0 MHz Inter IC bus Inter IC Data bus Inter IC Sound bus Intermediate Frequency Infra Red Interrupt Request The ITU Radio communication Sector (ITU-R) is a standards body subcommittee of the International Telecommunication Union relating to radio communication. ITU-656 (a.k.a. SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used. The SDI signal is self-synchronizing,

ITV LS

LATAM LCD LED L/L'

LPL LS LVDS Mbps M/N MIPS

MOP MOSFET MPEG MPIF MUTE NC NICAM

NTC NTSC

NVM O/C OSD OTC P50 PAL

PCB PCM PDP PFC PIP PLL

POD

POR PTC PWB

Q548.1E LA

EN 7

uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz. Institutional TeleVision; TV sets for hotels, hospitals etc. Last Status; The settings last chosen by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's preferences Latin America Liquid Crystal Display Light Emitting Diode Monochrome TV system. Sound carrier distance is 6.5 MHz. L' is Band I, L is all bands except for Band I LG.Philips LCD (supplier) Loudspeaker Low Voltage Differential Signalling Mega bits per second Monochrome TV system. Sound carrier distance is 4.5 MHz Microprocessor without Interlocked Pipeline-Stages; A RISC-based microprocessor Matrix Output Processor Metal Oxide Silicon Field Effect Transistor, switching device Motion Pictures Experts Group Multi Platform InterFace MUTE Line Not Connected Near Instantaneous Compounded Audio Multiplexing. This is a digital sound system, mainly used in Europe. Negative Temperature Coefficient, non-linear resistor National Television Standard Committee. Color system mainly used in North America and Japan. Color carrier NTSC M/N= 3.579545 MHz, NTSC 4.43= 4.433619 MHz (this is a VCR norm, it is not transmitted off-air) Non-Volatile Memory: IC containing TV related data such as alignments Open Circuit On Screen Display On screen display Teletext and Control; also called Artistic (SAA5800) Project 50: communication protocol between TV and peripherals Phase Alternating Line. Color system mainly used in West Europe (color carrier= 4.433619 MHz) and South America (color carrier PAL M= 3.575612 MHz and PAL N= 3.582056 MHz) Printed Circuit Board (same as “PWB”) Pulse Code Modulation Plasma Display Panel Power Factor Corrector (or Preconditioner) Picture In Picture Phase Locked Loop. Used for e.g. FST tuning systems. The customer can give directly the desired frequency Point Of Deployment: a removable CAM module, implementing the CA system for a host (e.g. a TV-set) Power On Reset, signal to reset the uP Positive Temperature Coefficient, non-linear resistor Printed Wiring Board (same as “PCB”) 2009-Apr-03

EN 8

PWM QRC QTNR QVCP RAM RGB

RC RC5 / RC6 RESET ROM RSDS R-TXT SAM S/C SCART

SCL SCL-F SD SDA SDA-F SDI SDRAM SECAM

SIF SMPS SoC SOG SOPS SPI

S/PDIF SRAM SRP SSB STBY SVGA SVHS SW SWAN SXGA TFT THD TMDS TXT TXT-DW UI uP UXGA V VESA VGA VL VSB WYSIWYR

WXGA XTAL XGA 2009-Apr-03

Q548.1E LA

Precautions, Notes, and Abbreviation List

Pulse Width Modulation Quasi Resonant Converter Quality Temporal Noise Reduction Quality Video Composition Processor Random Access Memory Red, Green, and Blue. The primary color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are reproduced. Remote Control Signal protocol from the remote control receiver RESET signal Read Only Memory Reduced Swing Differential Signalling data interface Red TeleteXT Service Alignment Mode Short Circuit Syndicat des Constructeurs d'Appareils Radiorécepteurs et Téléviseurs Serial Clock I2C CLock Signal on Fast I2C bus Standard Definition Serial Data I2C DAta Signal on Fast I2C bus Serial Digital Interface, see “ITU-656” Synchronous DRAM SEequence Couleur Avec Mémoire. Color system mainly used in France and East Europe. Color carriers= 4.406250 MHz and 4.250000 MHz Sound Intermediate Frequency Switched Mode Power Supply System on Chip Sync On Green Self Oscillating Power Supply Serial Peripheral Interface bus; a 4wire synchronous serial data link standard Sony Philips Digital InterFace Static RAM Service Reference Protocol Small Signal Board STand-BY 800x600 (4:3) Super Video Home System Software Spatial temporal Weighted Averaging Noise reduction 1280x1024 Thin Film Transistor Total Harmonic Distortion Transmission Minimized Differential Signalling TeleteXT Dual Window with TeleteXT User Interface Microprocessor 1600x1200 (4:3) V-sync to the module Video Electronics Standards Association 640x480 (4:3) Variable Level out: processed audio output toward external amplifier Vestigial Side Band; modulation method What You See Is What You Record: record selection that follows main picture and sound 1280x768 (15:9) Quartz crystal 1024x768 (4:3)

Y Y/C YPbPr

YUV

Luminance signal Luminance (Y) and Chrominance (C) signal Component video. Luminance and scaled color difference signals (B-Y and R-Y) Component video

Mechanical Instructions

Q548.1E LA

EN 9

4. Mechanical Instructions Index of this chapter: 4.1 Cable Dressing 4.2 Service Positions 4.3 Assy/Panel Removal 4.4 Set Re-assembly

4.1

Notes: â&#x20AC;˘ Figures below can deviate slightly from the actual situation, due to the different set executions.

Cable Dressing

18560_104_090401.eps 090402

Figure 4-1 Cable dressing 32PFL7404H/12

18560_102_090401.eps 090402

Figure 4-2 Cable dressing 42PFL7404H/12

2009-Apr-03

EN 10

Q548.1E LA

Mechanical Instructions

18560_101_090401.eps 090402

Figure 4-3 Cable dressing 47PFL7404H/12

18560_100_090401.eps 090401

Figure 4-4 Cable dressing 52PFL7404H/12

2009-Apr-03

Mechanical Instructions

Q548.1E LA

EN 11

18560_103_090401.eps 090402

Figure 4-5 Cable dressing 32PFL8404H/12

18560_105_090401.eps 090402

Figure 4-6 Cable dressing 37PFL8404H/12

2009-Apr-03

EN 12

Q548.1E LA

Mechanical Instructions

18560_106_090401.eps 090402

Figure 4-7 Cable dressing 42PFL8404H/12

18560_107_090401.eps 090402

Figure 4-8 Cable dressing 47PFL8404H/12

2009-Apr-03

Mechanical Instructions 4.2

EN 13

Service Positions For easy servicing of this set, there are a few possibilities created: â&#x20AC;˘ The buffers from the packaging. â&#x20AC;˘ Foam bars (created for Service).

4.2.1

Q548.1E LA

1 2

Foam Bars

1 3

Required for sets 42"

1 18560_408_090401.eps 090402

Figure 4-10 Ambi Light unit 1. Remove the Ambi Light cover [1]. 2. Unplug the connector(s) [2]. 3. Remove the subframe [3]. 4. The PWB can now be taken from the subframe. When defective, replace the whole unit.

E_06532_018.eps 171106

Figure 4-9 Foam bars The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See figure Figure 4-9 for details. Sets with a display of 42" and larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, you can monitor the screen.

4.3

4.3.4

Main Supply Panel 1. Unplug all connectors. 2. Remove the fixation screws. 3. Take the board out. When defective, replace the whole unit.

4.3.5

IR & LED Board / Stand Support Refer to Figure 4-11 for details.

Assy/Panel Removal The instructions apply to the 8000 series (Roadrunner - with AmbiLight).

4.3.1

Rear Cover Warning: Disconnect the mains power cord before you remove the rear cover. Note: it is not necessary to remove the stand while removing the rear cover. 1. Remove all screws of the rear cover. 2. Lift the rear cover from the TV. Make sure that wires and flat coils are not damaged while lifting the rear cover from the set.

4.3.2

Speakers Each speaker unit is mounted with two screws. When defective, replace the whole unit.

4.3.3

Ambi Light

1 18560_109_090401.eps 090402

Figure 4-11 IR & LED Board / Stand Support 1. Remove the stand. 2. Remove the IR/LED cover [1]. 3. Remove the connectors on the IR/LED board. 4. Remove the fixation screws from the IR/LED board. When defective, replace the whole unit.

Each Ambi Light unit is mounted on a subframe. Refer to Figure 4-10 for details. 2009-Apr-03

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Mechanical Instructions

Stand Support Removal for LCD panel removal 1. Remove the Main Supply Panel as earlier described. 2. Remove the screws [2] and take the support out. 4.3.6

Small Signal Board (SSB) Caution: It is mandatory to remount screws at their original position during re-assembly. Failure to do so may result in damaging the SSB. 1. Unplug all connectors. 2. Remove the screws that secure the board. 3. The SSB can now be taken out of the set.

4.3.7

Keyboard Control Panel

1. Remove the right AmbiLight unit. 2. Follow instructions for removing the IR/LED board until 3. 3. Remove the connector on the IR/LED board. 4. Release the cable. 5. Release the clip on top of the unit and take the unit out. When defective, replace the whole unit. 4.3.8

LCD Panel Refer to Figure 4-12 to Figure 4-15 for details. 1. Remove the AmbiLight units as earlier described. 2. Remove the subwoofer as earlier described. 3. Remove the Top Support [1]. 4. Release the LVDS [2] - and other connectors [3] from the SSB. 5. Remove the subframe of the SSB [4] with the SSB still mounted on it. 6. Release all connectors [5] from the PSU. 7. Remove the subframe of the PSU [6] with the PSU still mounted on it. 8. Remove the stand support as earlier described. 9. Release the connectors [7] on the IR/LED Panel as earlier described. 10. Remove the clips that secure the flare [8]. 11. Remove the flare. 12. Now the LCD Panel can be lifted from the front cabinet.

4 18560_111_090401.eps 090402

Figure 4-13 LCD Panel - SSB subframe

5 1

6 5 18560_112_090401.eps 090402

Figure 4-14 LCD Panel - PSU subframe

18560_110_090401.eps 090402

Figure 4-12 LCD Panel - top support

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18560_113_090401.eps 090402

Figure 4-15 LCD Panel - panel removal

4.4

Set Re-assembly To re-assemble the whole set, execute all processes in reverse order. Notes: â&#x20AC;˘ While re-assembling, make sure that all cables are placed and connected in their original position. See Figure 4-1, Figure 4-2 and Figure 4-3 â&#x20AC;˘ Pay special attention not to damage the EMC foams in the set. Ensure that EMC foams are mounted correctly.

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Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding •

Index of this chapter: 5.1 Test Points 5.2 Service Modes 5.3 Step by step Start-up 5.4 Service Tools 5.5 Error Codes 5.6 The Blinking LED Procedure 5.7 Protections 5.8 Fault Finding and Repair Tips 5.9 Software Upgrading

5.1

Test Points As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective. Perform measurements under the following conditions: • Service Default Mode. • Video: Colour bar signal. • Audio: 3 kHz left, 1 kHz right.

5.2

All service-unfriendly modes (if present) are disabled, like: – (Sleep) timer. – Child/parental lock. – Picture mute (blue mute or black mute). – Automatic volume levelling (AVL). – Skip/blank of non-favourite pre-sets.

How to Activate SDM For this chassis there are two kinds of SDM: an analog SDM and a digital SDM. Tuning will happen according to Table 5-1. • Analog SDM: use the standard RC-transmitter and key in the code “062596”, directly followed by the “MENU” (or HOME) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or HOME) button again. • Digital SDM: use the standard RC-transmitter and key in the code “062593”, directly followed by the “MENU” (or HOME) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or HOME) button again. • Analog SDM can also be activated by, on the SSB, shorting for a moment the solder pads SDM [1] (see Figure 5-1).

Service Modes Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer.

SDM

This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis. (see also section 5.4.1 ComPair). Note: For the new model range, a new remote control (RC) is used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old “MENU” button is now called “HOME” (or is indicated by a “house” icon). 5.2.1

18440_200_090225.eps 090306

Service Default Mode (SDM) Purpose • To create a pre-defined setting, to get the same measurement results as given in this manual. • To override SW protections detected by stand-by processor and make the TV start up to the step just before protection (a sort of automatic step by step start up). See section 5.3 Step by step Start-up. • To start the blinking LED procedure where only layer 2 errors are displayed (see also section 5.5 Error Codes). Specifications Table 5-1 SDM default settings

Freq. (MHz)

Default system

Europe, AP(PAL/Multi)

475.25

PAL B/G

Europe, AP DVB-T

546.00 PID DVB-T Video: 0B 06 PID PCR: 0B 06 PID Audio: 0B 07

Region

• • 2009-Apr-03

All picture settings at 50% (brightness, colour, contrast). All sound settings at 50%, except volume at 25%.

Figure 5-1 Service mode pads After activating this mode, “SDM” will appear in the upper right corner of the screen (when a picture is available). How to Navigate When the “MENU” (or HOME) button is pressed on the RC transmitter, the set will toggle between the SDM and the normal user menu (with the SDM mode still active in the background). How to Exit SDM Use one of the following methods: • Switch the set to STAND-BY via the RC-transmitter. • Via a standard customer RC-transmitter: key in “00”sequence.

Service Modes, Error Codes, and Fault Finding Service Alignment Mode (SAM) Purpose • To perform (software) alignments. • To change option settings. • To easily identify the used software version. • To view operation hours. • To display (or clear) the error code buffer. How to Activate SAM Via a standard RC transmitter: key in the code “062596” directly followed by the “INFO” or “I+” button. After activating SAM with this method a service warning will appear on the screen, continue by pressing the red button on the RC. Contents of SAM (see also Table 6-5): • Hardware Information – A. SW Version. Displays the software version of the main software (example: Q5431-0.26.2.0= AAAaB_X.Y.W.Z). • AAAA= the chassis name, where “a” indicates the chip version: e.g. TV543/32= Q543, TV543/82= Q548, Q543/92= Q549. • B= the SW branch version. This is a sequential number (this is no longer the region indication, as the software is now multi-region). • X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always compatible with a lower number). – B. SBY PROC Version. Displays the software version of the stand-by processor. – C. Production Code. Displays the production code of the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this. • Operation Hours. Displays the accumulated total of operation hours (not the stand-by hours). Every time the TV is switched “on/off”, 0.5 hours is added to this number. • Errors (followed by maximum 10 errors). The most recent error is displayed at the upper left (for an error explanation see section 5.5 Error Codes). • Reset Error Buffer. When “cursor right” (or the “OK button) is pressed and then the “OK” button is pressed, the error buffer is reset. • Alignments. This will activate the “ALIGNMENTS” submenu. See chapter 6. Alignments. • Dealer Options. Extra features for the dealers. See Table 6-5. • Options. Extra features for Service. For more information regarding option codes, see chapter 6. Alignments. Note that if the option code numbers are changed, these have to be confirmed with pressing the “OK” button before the options are stored. Otherwise changes will be lost. • Initialize NVM. The moment the processor recognizes a corrupted NVM, the “initialize NVM” line will be highlighted. Now, two things can be done (dependent of the service instructions at that moment): – Save the content of the NVM via ComPair for development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this). – Initialize the NVM. •

Note: When the NVM is corrupted, or replaced, there is a high possibility that no picture appears because the display code is not correct. So, before initializing the NVM via the SAM, a picture is necessary and therefore the correct display option has to be entered. Refer to chapter 6. Alignments for details. To adapt this option, it’s advised to use ComPair (the correct HEX values

EN 17

for the options can be found in chapter 8 “Alignments”) or a method via a standard RC (described below). Changing the display option via a standard RC: Key in the code “062598” directly followed by the “MENU” (or HOME) button and “XXX” (where XXX is the 3 digit decimal display code as mentioned in Table 6-4. Make sure to key in all three digits, also the leading zero’s. If the above action is successful, the front LED will go out as an indication that the RC sequence was correct. After the display option is changed in the NVM, the TV will go to the Stand-by mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.

Display Option Code

39mm

PHILIPS 27mm

5.2.2

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040

MODEL: 32PF9968/10 PROD.SERIAL NO: AG 1A0620 000001

(CTN Sticker)

E_06532_038.eps 240108

Figure 5-2 Location of Display Option Code sticker •

•

• •

•

Store - go right. All options and alignments are stored when pressing “cursor right” (or the “OK” button) and then the “OK”-button. SW Maintenance. – SW Events. Not useful for Service purposes. In case of specific software problems, the development department can ask for this information. – HW Events. Not useful for Service purposes. In case of specific software problems, the development department can ask for this information. Test settings. For development purposes only. Development file versions. Not useful for Service purposes, this information is only used by the development department. Upload to USB. To upload several settings from the TV to an USB stick, which is connected to the SSB. The items are “Channel list”, “Personal settings”, “Option codes”, “Display-related alignments” and “History list”. First a directory “repair\” has to be created in the root of the USB stick. To upload the settings select each item separately, press “cursor right” (or the “OK button), confirm with “OK” and wait until “Done” appears. In case the download to the USB stick was not successful “Failure” will appear. In this case, check if the USB stick is connected properly and if the directory “repair” is present in the root of the USB stick. Now the settings are stored onto the USB stick and can be used to download onto another TV or other SSB. Uploading is of course only possible if the software is running and if a picture is available. This method is created to be able to save the customer’s TV settings and to store them into another SSB. Download from USB. To download several settings from the USB stick to the TV. Same way of working as with uploading. To make sure that the download of the channel list from USB to the TV is executed properly, it is necessary to restart the TV and tune to a valid preset if necessary. Note: The “History list item” can not be downloaded from USB to the TV. This is a “read-only” item. In case of specific problems, the development department can ask for this information.

How to Navigate • In SAM, the menu items can be selected with the “CURSOR UP/DOWN” key (or the scroll wheel) on the RCtransmitter. The selected item will be highlighted. When not

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all menu items fit on the screen, move the “CURSOR UP/ DOWN” key to display the next/previous menu items. With the “CURSOR LEFT/RIGHT” keys (or the scroll wheel), it is possible to: – (De) activate the selected menu item. – (De) activate the selected sub menu. With the “OK” key, it is possible to activate the selected action.

How to Exit SAM Use one of the following methods: • Switch the set to STAND-BY via the RC-transmitter. • Via a standard RC-transmitter, key in “00” sequence, or select the “BACK” key. 5.2.3

•

• • • •

Customer Service Mode (CSM) Purpose When a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer. The CSM is a read only mode; therefore, modifications in this mode are not possible. When CSM is activated, the layer 1 error is displayed via blinking LED. Only the latest error is displayed. (see also section 5.5 Error Codes). When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. This information can be handy if no information is displayed. Only for Q548.1: When in the Q548.1 chassis CSM is activated, a test pattern will be displayed during 5 s.: 1 s. blue, 1 s. green, and 1 s. red, then again 1 s. blue and 1 s. green. This test pattern is generated by the PNX5120. So if this test pattern is shown, it could be determined that the back end video chain (PNX5120, LVDS, and display) of the SSB is working. For LED backlight TV sets, the test pattern is build as follows: 1 s. blue, 1 s. green, 1 s. red (generated by the PNX5120) and further on with 3 seconds RGB pattern from the LED Dimming Panel. How to Activate CSM Key in the code “123654” via the standard RC transmitter. Note: Activation of the CSM is only possible if there is no (user) menu on the screen! How to Navigate By means of the “CURSOR-DOWN/UP” knob (or the scroll wheel) on the RC-transmitter, can be navigated through the menus. Contents of CSM The contents are displayed on three pages: General, Software versions, and Quality items. However, these group names itself are not shown anywhere in the CSM menu. General • Set Type. This information is very helpful for a helpdesk/ workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialized after corruption, this set type has to be re-written to NVM. ComPair will foresee in a possibility to do this.

2009-Apr-03

• • • •

Production Code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee a in possibility to do this. Installed date. Indicates the date of the first installation of the TV. This date is acquired via time extraction. Options 1. Gives the option codes of option group 1 as set in SAM (Service Alignment Mode). Options 2. Gives the option codes of option group 2 as set in SAM (Service Alignment Mode). 12NC SSB. Gives an identification of the SSB as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. ComPair will foresee in a possibility to do this. This identification number is the 12nc number of the SSB. Remark: the content here can also be a part of the 12NC of the SSB in combination with the serial number. 12NC display. Shows the 12NC of the display 12NC supply. Shows the 12NC of the supply. 12NC “fan board”. Shows the 12NC of the “fan board”module (for sets with LED backlight). 12NC “LED Dimming Panel”. Shows the 12NC of the LED dimming Panel (for sets with LED backlight).

Software versions • Current main SW. Displays the built-in main software version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet. Example: Q5431E_1.2.3.4. • Stand-by SW. Displays the built-in stand-by processor software version. Upgrading this software will be possible via ComPair or via USB (see section Software Upgrading). Example: STDBY_1.2.3.4. • MOP ambient light SW. Displays the MOP ambient light EPLD SW. • MPEG4 software. Displays the MPEG4 software (for sets with MPEG4). • PNX5120 boot NVM. Displays the SW-version that is used in the PNX5120 boot NVM (for sets with PNX5120). • LED Dimming SW. Displays the LED dimming EPLD SW (for sets with LED backlight). Quality items • Signal quality. Poor/average/good • Child lock. Not active/active. This is a combined item for locks. If any lock (Preset lock, child lock, lock after or parental lock) is active, the item shall show “active”. • HDMI HDCP key. Indicates of the HDMI keys (or HDCP keys) are valid or not. In case these keys are not valid and the consumer wants to make use of the HDMI functionality, the SSB has to be replaced. • Ethernet MAC address. Not applicable. • Wireless MAC address. Not applicable. • BDS key. Indicates if the “BDS level 1” key is valid or not. • CI slot present. If the common interface module is detected the result will be “YES”, else “NO”. • HDMI input format. The detected input format of the HDMI. • HDMI audio input stream. The HDMI audio input stream is displayed: present / not present. • HDMI video input stream. The HDMI video input stream is displayed: present / not present. How to Exit CSM Press the “MENU” (or HOME) button twice on the RCtransmitter.

Service Modes, Error Codes, and Fault Finding 5.3

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Step by step Start-up When the TV is in a protection state due to an error detected by stand-by software (error blinking is displayed) and SDM is activated via short cutting the pins on the SSB, the TV starts up until it reaches the situation just before protection. So, this is a kind of automatic step by step start-up. In combination with the start-up diagrams below, it is shown which supplies are present at a certain moment. Important to know is, that if e.g. the 3V3 detection fails and thus layer 2 error = 18 is blinking while the TV is restarted via SDM, the Stand-by Processor will enable the 3V3, but the TV set will not go to protection now. The TV will stay in this situation until it is reset (Mains/AC Power supply interrupted). Caution: in case the start-up in this mode with a faulty FET 7101-1 is done, all ICs supplied by the +3V3 could be destroyed, due to over voltage (12V on 3V3-line). It is recommended to measure first the FET 7101-1 or others FETs on short-circuit before activating SDM via the service pads.

The abbreviations “SP” and “MP” in the figures stand for: • SP: protection or error detected by the Stand-by Processor. • MP: protection or error detected by the MIPS Main Processor.

Mains off

Mains on

- WakeUp requested - Acquisition needed - Tact switch pushed

St by

- stby requested and no data Acquisition required

WakeUp requested

Semi St by

Active - St by requested - tact SW pushed

Tact switch pushed

Hibernate

WakeUp requested (SDM)

- Tact switch pushed - last status is hibernate after mains ON

GoToProtection

Protection

18440_215_090227.eps 270209 Figure 5-3 Transition diagram 2009-Apr-03

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Q548.1E LA

Off

Stand by or Protection

Mains is applied

Standby Supply starts running. All standby supply voltages become available.

st-by µP resets

If the protection state was left by short circuiting the SDM pins, detection of a protection condition during startup will stall the startup. Protection conditions in a playing set will be ignored. The protection mode will not be entered.

Initialise I/O pins of the st-by µP: - Switch reset-AVC LOW (reset state) - Switch WP-NandFlash LOW (protected) - Switch reset-system LOW (reset state) - Switch reset-5100 LOW (reset state) - Switch reset-Ethernet LOW (reset state) - keep reset-NVM high, Audio-reset and Audio-Mute-Up HIGH

- Switch Audio-Reset high. It is low in the standby mode if the standby mode lasted longer than 10s.

start keyboard scanning, RC detection. Wake up reasons are off.

Confirmation received from NXP that there does not need to be a delay between the rise of the +1V2 and the +3V3. Only requirement is to have the +1V2 before or at the same time as the +3V3. 150ms delay is deleted.

Reset detect2_delay_flag

Switch ON Platform and display supply by switching LOW the Standby line.

+12V, +24Vs, AL and Bolt-on power is switched on, followed by the +1V2 DCDC converter Detect2 should be polled on the standard 40ms interval and startup should be continued when detect2 becomes high.

Carefull we don’t hit this error directly if the delay flag is set.

Delay 1.5 second before checking detect2 line if the detect2_delay_flag is set

Detect2 high received within 2 seconds?

Power-OK error: Layer1: 3 Layer2: 16

Yes

Enter protection Wait fixed time of 15ms

If the supply is hicking, the first detect2 could be positive (12V still present), followed by negative Supply-fault (already low). Adding a fixed delay brings us behind this delay gap.

Detect2 high?

Yes This enables the +3V3 and +5V converter. As a result, also +5V-tuner, +2V5, +1V8-PNX8541 and +1V8-PNX5100 (if present) become available.

Reset detect2_delay_flag

Enable the DCDC converter for +3V3 and +5V. (ENABLE-3V3) Delay of 50ms needed because of the latency of the detect-1 circuit. This delay is also needed for the PNX5100. The reset of the PNX5100 should only be released 10ms after powering the IC.

Set detect2_delay_flag Wait 50ms

Detect-1 I/O line High?

Detect-2 I/O line High?

Disable 3V3, switch standby line high and wait 4 seconds

Yes

These checks prevent the set from going in to standby on the false error condition where the first 3V3 is negative because of a hickup, although the 12V was about to reappear. Because of this reappearance, the 12V check is OK which would cause protection. If we wait 50ms, the 3V3 should be back as well.

Wait 50ms

Yes

Detect-1 I/O line High?

Detect-2 I/O line High?

Yes

Enable the supply detection algorithm

Voltage output error: Layer1: 2 Layer2: 18

Enter protection

Set I²C slave address of Standby µP to (A0h)

This will allow access to NVM and NAND FLASH and can not be done earlier because the FLASH needs to be in Write Protect as long as the supplies are not available.

Switch LOW the RESET-NVM line to allow access to NVM. (Add a 2ms delay before trying to address the NVM to allow correct NVM initialization, this is no issue in this setup, the delay is automatically covered by the architectural setup)

Switch HIGH the WP-NandFlash to allow access to NAND Flash

Release Reset-PNX5100. PNX5100 will start booting.

Only usefull in case of PNX5100 present. To avoid diversity in standby µP, the reset-PNX5100 will still be switched by the standby µP.

Wait 10 ms

This 10ms delay is still present to give some relaxation to the supplies. (The PCI arbiter on the PNX5100 is never used and is not the reason anymore)

Detect EJTAG debug probe (pulling pin of the probe interface to ground by inserting EJTAG probe)

An EJTAG probe (e.g. WindPower ICE probe) can be connected for Linux Kernel debugging purposes.

EJTAG probe connected ?

Yes

Cold boot?

Yes Release AVC system reset Feed warm boot script

To: 18440_216b_090227.eps

Release AVC system reset Feed cold boot script

Release AVC system reset Feed initializing boot script disable alive mechanism

To: 18440_216b_090227.eps

Figure 5-4 “Off/Stand-by” to “Semi Stand-by” flowchart (part 1) 2009-Apr-03

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Service Modes, Error Codes, and Fault Finding

From: 18440_216a_090227.eps

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From: 18440_216a_090227.eps

Reset-system is connected to the Micronas MultiStandard decoder.

This cannot be done through the bootscript, the I/O is on the standby µP

Timing need to be updated if more mature info is available.

Reset-system is switched HIGH by the AVC at the end of the bootscript

AVC releases Reset-Ethernet when the end of the AVC boot-script is detected

Reset-Audio and Audio-Mute-Up are switched by MIPS code later on in the startup process

Bootscript ready in 1250 ms?

Yes

Set I²C slave address of Standby µP to (60h)

RPC start (comm. protocol)

Flash to Ram image transfer succeeded within 30s?

Code = Layer1: 2 Layer2: 15

Switch AVC PNX8543 in reset (active low)

Timing needs to be updated if more mature info is available.

Yes

Code = Layer1: 2 Layer2: 53

SW initialization succeeded within 20s?

Timing needs to be updated if more mature info is available.

Yes

Wait 10ms

Enable Alive check mechanism

Switch the NVM reset line HIGH. MIPS reads the wake up reason from standby µP.

Disable all supply related protections and switch off the +3V3 +5V DC/DC converter.

Wait until AVC starts to communicate

5100 SW start Wait 5ms

Wake up reason coldboot & not semistandby?

switch off the remaining DC/DC converters

Startup screen shall only be visible when there is a coldboot to an active state end situation. The startup screen shall not be visible when waking up for reboot reasons or waking up to semi-standby conditions.

yes 3-th try?

Switch Standby I/O line high and wait 4 seconds

Startup screen cfg file present?

The first time after the option turn on of the startup screen or when the set is virgin, the cfg file is not present and hence the startup screen will not be shown.

Yes

yes Blink Code as error code

MIPS sends display parameters and Bitmap to 5100

No MIPS triggers 5100 to display the startup screen

Enter protection No

To keep this flowchart readable, the exact display turn on description is not copied here. Please see the Semi-standby to On description for the detailed display startup sequence. During the complete display time of the Startup screen, the preheat condition of 100% PWM is valid.

Startup screen visible

Initialize audio

Switch on the display in case of a LED backlight display by sending the TurnOnDisplay(1) (I²C) command to the PNX5100

Enable the PWM output towards the display LVDS cable in case of a LED Backlight set. (CTRL4-PNX5100)

In case of a LED backlight display, a LED DIM panel is present which is fed by the Vdisplay. To power the LED DIM Panel, the Vdisplay switch driven by the PNX5100 must be closed. The display startup sequence is taken care of by the LED DIM panel. Secondly, this cmd will also enable the LVDS output of the 5100 towards the LED DIM panel.

In case of a LED backlight display, the PWM-dimming signal needs to be routed to the LVDS cable. This routing is not allowed in non-LED sets (see also display configuration)

Initialize tuner and Multi Standard decoder

Initialize source selection

Initialize video processing IC's : - local contrast FPGA - PNX5100 (if present)

Initialize AutoTV

Initialize Ambilight with Lights off.

18440_216b_090227.eps 270209

Semi-Standby Figure 5-5 “Off/Stand-by” to “Semi Stand-by” flowchart (part 2)

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Constraints taken into account: - Display may only be started when valid LVDS output clock can be delivered by the AVC. - To have a reliable operation of the backlight, the backlight should be driven with a PWM duty cycle of 100% during the first seconds. Only after this first one or two seconds, the PWM may be set to the required output level (Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts, the picture should only be unblanked after these first seconds.

Semi Standby The assumption here is that a fast toggle (<2s) can only happen during ON->SEMI ->ON. In these states, the AVC is still active and can provide the 2s delay. A transition ON->SEMI->STBY->SEMI->ON cannot be made in less than 2s, because the standby state will be maintained for at least 4s.

Wait until previous on-state is left more than 2 seconds ago. (to prevent LCD display problems)

Assert RGB video blanking and audio mute

CPipe already generates a valid output clock in the semi-standby state: display startup can start immediately when leaving the semi-standby state.

Display already on? (splash screen) No

The exact timings to switch on the display (LVDS delay, lamp delay) are defined in the display file.

PNX5100 present?

Switch on the display power by switching LCD-PWR-ON low

Wait x ms

Switch on LVDS output in 8543

Yes Initialize audio and video processing IC's and functions according needed use case.

Delay Lamp-on with the sum of the LVDS delay and the Lamp delay indicated in the display file

Switch off the dimming backlight feature, set the BOOST control to nominal and make sure PWM output is set to 100%

The sum of the LVDS delay and the Lamp delay needs to be used because the Lamp delay is specified with the appearance of the LVDS on the display as reference. This moment is not known by ceplf, only the switch on of the LCD power is known. The delta between both is the LVDS delay.

The complete algorithm description is removed here. Only the start of the algorithm is mentioned here as reminder.

Yes Switch on the display by sending the TurnOnDisplay(1) (I²C) cmd to the PNX5100

Switch on LCD backlight (Lamp-ON)

Start POK line detection algorithm Wait until valid and stable audio and video, corresponding to the requested output is delivered by the AVC AND the backlight has been switched on for at least the time which is indicated in the display file as preheat time. return

Switch Audio-Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)

The higher level requirement is that audio and video should be demuted without transient effects and that the audio should be demuted maximum 1s before or at the same time as the unblanking of the video.

Restore dimming backlight feature, PWM and BOOST output and unblank the video.

Switch on the Ambilight functionality according the last status settings. The higher level requirement is that the ambilight functionality may not be switched on before the backlight is turned on in case the set contains a CE IPB inverter supply.

Startup screen Option and Installation setting Photoscreen ON? Yes Display cfg file present and up to date, according correct display option? No No Yes Prepare Start screen Display config file and copy to Flash

Active Figure 5-6 “Semi Stand-by” to “Active” flowchart

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EN 23

Active Mute all sound outputs via softmute

Wait 100ms

Set main amplifier mute (I/O: audio-mute)

Force ext audio outputs to ground (I/O: audio reset) a nd wait 5ms

Switch off Ambilight

Wait until Ambilight has faded out: Output power Observer on PNX5100 should be zero

The higher level requirement is that the backlight may not be switched off before the ambilight functionality is turned off in case the set contains a CE IPB inverter supply.

Switch off POK line detection algorithm

Switch off LCD backlight

Mute all video outputs

Wait x ms (display file)

PNX5100 present?

Yes Switch off LVDS output in 8543

Wait x ms

Switch off the display by sending: - TurnOnDisplay(0) (I²C) command to the PNX5100 - or sending OUTPUT-ENABLE(0) to the LED DIM panel in case of a LED BL set.

The exact timings to switch off the display (LVDS delay, lamp delay) are defined in the display file.

Switch off the display power by switching LCD-PWR-ON high

Semi Standby

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Figure 5-7 “Active” to “Semi Stand-by” flowchart

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Service Modes, Error Codes, and Fault Finding

Semi Stand by

If ambientlight functionality was used in semi-standby (lampadaire mode), switch off ambient light

Delay transition until ramping down of ambient light is finished. *)

*) If this is not performed and the set is switched to standby when the switch off of the ambilights is still ongoing, the lights will switch off abruptly when the supply is cut.

Transfer Wake up reasons to the Stand by µP.

Switch Memories to self-refresh (this creates a more stable condition when switching off the power).

Switch AVC system in reset state (reset-system and reset-AVC lines) Switch reset-PNX5100 LOW Switch Reset-Ethernet LOW

Wait 10ms

Switch the NVM reset line HIGH Switch WP-Nandflash LOW

Disable all supply related protections and switch off the DC/DC converters (ENABLE-3V3)

Wait 5ms

Switch OFF all supplies by switching HIGH the Standby I/O line

Important remarks: release reset audio 10 sec after entering standby to save power Also here, the standby state has to be maintained for at least 4s before starting another state transition.

Stand by Figure 5-8 “Semi Stand-by” to “Stand-by” flowchart

2009-Apr-03

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Service Modes, Error Codes, and Fault Finding 5.4

Service Tools

5.5

Error Codes

5.4.1

ComPair

5.5.1

Introduction

Introduction ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following: 1. ComPair helps to quickly get an understanding on how to repair the chassis in a short and effective way. 2. ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. No knowledge on I2C or UART commands is necessary, because ComPair takes care of this. 3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available. 4. ComPair features TV software up possibilities. Specifications ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure. How to Connect This is described in the chassis fault finding database in ComPair. TO TV TO UART SERVICE CONNECTOR

ComPair II RC in

RC out

TO I2C SERVICE CONNECTOR

TO UART SERVICE CONNECTOR

Multi function

Optional Power Link/ Mode Switch Activity

I2C

RS232 /UART

ComPair II Developed by Philips Brugge

HDMI I2C only

Optional power 5V DC

E_06532_036.eps 150208

Figure 5-9 ComPair II interface connection Caution: It is compulsory to connect the TV to the PC as shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown! How to Order ComPair II order codes: • ComPair II interface: 3122 785 91020. • Software is available via the Philips Service web portal. • ComPair serial interface cable for Q52x.x. (using 3.5 mm Mini Jack connectors): 3138 188 75051.

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EN 25

The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained). To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them. New in this chassis is the way errors can be displayed:

There is a simple blinking LED procedure for board level repair (home repair) so called LAYER 1 errors next to the existing errors which are LAYER 2 errors (see Table 5-3). – LAYER 1 errors are one digit errors – LAYER 2 errors are two digit errors. • In protection mode. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2. • Fatal errors, if I2C bus is blocked and the set re-boots, CSM and SAM are not selectable. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2. Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins. • In CSM mode – When entering CSM: error LAYER 1 will be displayed by blinking LED. Only the latest error is shown. • In SDM mode – When SDM is entered via Remote Control code or the hardware pins, LAYER 2 is displayed via blinking LED. • In the ON state – In “Display error mode”, set with the RC commands “mute_06250X _OK” LAYER 2 errors are displayed via blinking LED. • Error display on screen. – In CSM no error codes are displayed on screen. – In SAM the complete error list is shown. Basically there are three kinds of errors: • Errors detected by the Stand-by software which lead to protection. These errors will always lead to protection and an automatic start of the blinking LED LAYER 1 error. (see section 5.6 The Blinking LED Procedure). • Errors detected by the Stand-by software which not lead to protection. In this case the front LED should blink the involved error. See also section Extra Information. Note that it can take up several minutes before the TV starts blinking the error (e.g. LAYER 1 error = 2, LAYER 2 error = 15 or 53). • Errors detected by main software (MIPS). In this case the error will be logged into the error buffer and can be read out via ComPair, via blinking LED method LAYER 1-2 error, or in case picture is visible, via SAM.

Note: When having problems, please contact your local support desk. 2009-Apr-03

EN 26 5.5.2

Service Modes, Error Codes, and Fault Finding

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How to Read the Error Buffer

content, as this history can give significant information). This to ensure that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g. a fault in the protection detection circuitry can also lead to a protection).

Use one of the following methods: • On screen via the SAM (only when a picture is visible). E.g.: – 00 00 00 00 00: No errors detected – 23 00 00 00 00: Error code 23 is the last and only detected error. – 37 23 00 00 00: Error code 23 was first detected and error code 37 is the last detected error. – Note that no protection errors can be logged in the error buffer. • Via the blinking LED procedure. See section 5.5.3 How to Clear the Error Buffer. • Via ComPair. 5.5.3

There are several mechanisms of error detection: • Via error bits in the status registers of ICs. • Via polling on I/O pins going to the stand-by processor. • Via sensing of analogue values on the stand-by processor or the PNX8543. • Via a “not acknowledge” of an I2C communication. Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.

How to Clear the Error Buffer Use one of the following methods: • By activation of the “RESET ERROR BUFFER” command in the SAM menu. • With a normal RC, key in sequence “MUTE” followed by “062599” and “OK”. • If the content of the error buffer has not changed for 50+ hours, it resets automatically.

5.5.4

Table 5-2 Layer 1 code overview (multi chassis overview) LAYER 1 codes

Error Buffer

SSB

Display supply

Platform supply

4 Only for display option 196 and 197

Fan

AmbiLight or DC/DC or 3D LED dim panel 8

In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the

EB: in Error Buffer BL: Blinking LED

Device

Defective board

Special Remarks

SSB

TV shut down with red LED blinking 2.

BL/EB

SSB

BL/EB

SSB

TV is rebooting endlessly with red LED blinking “2”

Supply

TV shut down with red LED blinking “3”.

Platform Supply

Main NVM

MIPS

Temp. protection

12 MIPS

I2C3 I2C2

13 MIPS

14 MIPS

PNX does not boot (HW cause) PNX 5100 does not boot

15 St-by µP

12V

16 St-by µP I/O

12V

16 St-by µP I/O

Inverter or display supply

17 Mips

I/O

Supply Display Supply

Medium

Monitored

STM24C128

BL/EB

LAYER 2 error

LAYER 1 error

Description

Error/Prot.

Table 5-3 Error code overview (multi chassis overview)

I2C1 I2C4 I2C3 I2C2 I2C1

Supply TV is rebooting endlessly with red LED blinking “2”.

TV still in normal operation mode, but without backlights. Enter CSM Layer 1 red LED blinking “3”.

Only for display option 196 and 197

17 Mips

I/O

1V2, 1V2, 3V3, 5V to low

18 St-by µP I/O

PNX 5100

21 MIPS

I2C3

HDMI MUX

23 MIPS

24 Mips

Boot-NVM PNX5120

25 MIPS

I2C3 I2C2 I2C3

I2C switch

STM24C08

SSB

TV is rebooting endlessly, with red LED blinking “2” (shown every minute).

DRX3616K DRX3626K

SSB

TV is in normal operation but without video displayed (RF).

NXP LPC2103 AL mod. or DC/DC TV is in normal operation but without AMBILIGHT “on”. Altera SSB

UV1783S HD1816

PCA 9533

FAN mod.

LM 75

T×sensor

PNX8543

SSB

BL/EB

Altera

Display

Xilinx

SSB

Altera

SSB

Multi Standard demodulator (Micronas IF) 2

27 MIPS

ARM (AL)

28 MIPS

FPGA (Local contrast)

29 MIPS

Tuner1

34 MIPS

FAN I2C expander

41 MIPS

T× sensor

42 MIPS

FAN 1

43 MIPS

FAN 2

44 MIPS

MIPS does not boot (SW cause)

53 St-by µP

Display

64 MIPS

FPGA LED dim 2D

65 MIPS

FPGA LED dim 3D

65 MIPS

2009-Apr-03

I C3 I C3 I2C3 I2C3 I2C2 I2C2 I2C2 I2C2 I2C1 I2C2 I2C3 I2C2

SSB

TV shut down with red LED blinking “2”.

SSB

TV is rebooting endlessly, with red LED blinking “2” (shown every 20 second).

TDA9996

SSB

Activate CSM red LED blinking “2”.

PCA9540

SSB

PNX 5100

SSB

TV is in normal operation but without video displayed (RF).

FAN FAN TV is rebooting endlessly with white LED blinking.

Service Modes, Error Codes, and Fault Finding Extra Information • Rebooting. When a TV is constantly rebooting due to internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section 5.8.6 UART Logging). It’s shown that the loggings which are generated by the main software keep continuing. In this case diagnose has to be done via ComPair. • Main NVM. When there is no I2C communication towards the main NVM, LAYER 1 error = “2” will be displayed via the blinking LED procedure. In SDM, LAYER 2 error can be “19”. Check the logging for keywords like “I2C bus blocked”. • Error 13 (I2C bus 3 blocked). When this error occurs, the TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair. • Error 15 (PNX8543 doesn’t boot). Indicates that the main processor was not able to read his bootscript. This error will point to a hardware problem around the PNX8543 (supplies not OK, PNX 8541 completely dead, I2C link between PNX and Stand-by Processor broken, etc...). When error 15 occurs it is also possible that I2C2 bus is blocked (NVM). I2C2 can be indicated in the schematics as follows: SCL-UP-MIPS, SDA-UP-MIPS, SCL-2 or SDA-2. Other root causes for this error can be due to hardware problems with: NVM PNX5120, PNX5120 itself, or DDRs. • Error 16 (12V). This voltage is made in the power supply and results in protection (LAYER 1 error = “3”). When SDM is activated we see blinking LED LAYER 2 error = “16”. • Error 17 (POK). The display is switched “on” with the signal “Lamp On”. If the inverter starts (or 24V display is OK) the POK line becomes “high”. If the POK line is not “high”, the set backlight will be switched “off” and “on” again for 3 times (start-up). If the set POK line becomes “high” after the retries, no error is logged; if the POK stays “low”, error is logged: LAYER 1 error = “3”, LAYER 2 error = “17”. No protection is required, the start-up goes on. • Error 18 (1V2-3V3-5V too low). All these supplies are generated by the DC/DC supply on the SSB. If one of these supplies is too low, protection occurs and blinking LED LAYER 1 error = “2” will be displayed automatically. In SDM this gives LAYER 2 error = “18”. • Error 21 (PNX5120). When there is no I2C communication towards the PNX5120 after start-up (power “off” by disconnection of the mains cord), LAYER 2 error will blink continuously via the blinking LED procedure in SDM. (startup the TV with the solder paths short to activate SDM). • Error 23 (HDMI). When there is no I2C communication towards the HDMI multiplexer after start up, LAYER 2 error = “23” will be logged and displayed via the blinking LED procedure if SDM is switched “on”. • Error 25 (Boot-NVM PNX5120). When there is no I2C communication towards the PNX5120 NVM after start-up, TV is rebooting endlessly with blinking LAYER 1 error = 2 (shown every minute). When SDM is activated we see blinking LED LAYER 2 error = “25”. • Error 27 (Multi Standard demodulator). When there is no I2C communication towards the Multi Standard demodulator after start up, LAYER 2 error = “27” will be logged and displayed via the blinking LED procedure when SDM is switched “on”. • Error 28 (FPGA ambilight). When there is no I2C communication towards the FPGA ambilight after start up, LAYER 2 error = “28” will be logged and displayed via the blinking LED procedure if SDM is switched “on”. Note that it can take up several minutes before the TV starts blinking LAYER 1 error = “2” in CSM or in SDM, LAYER 2 error = “28”. • Error 34 (Tuner). When there is no I2C communication towards the tuner after start up, LAYER 2 error = “34” will be logged and displayed via the blinking LED procedure when SDM is switched on. • Error 53. This error will indicate that the PNX8543 has read his bootscript (when this would have failed, error 15 would blink) but initialization was never completed because

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EN 27

of hardware problems (NAND flash,...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take up to 2 minutes before the TV starts blinking LAYER 1 error = “2” or in SDM, LAYER 2 error = “53”.

5.6

The Blinking LED Procedure

5.6.1

Introduction The blinking LED procedure can be split up into two situations: • Blinking LED procedure LAYER 1 error. In this case the error is automatically blinked when the TV is put in CSM. This will be only one digit error, namely the one that is referring to the defective board (see table 5-3 Error code overview (multi chassis overview)) which causes the failure of the TV. This approach will especially be used for home repair and call centres. The aim here is to have service diagnosis from a distance. • Blinking LED procedure LAYER 2 error. Via this procedure, the contents of the error buffer can be made visible via the front LED. In this case the error contains 2 digits (see table 5-3 Error code overview (multi chassis overview)) and will be displayed when SDM (hardware pins) is activated. This is especially useful for fault finding and gives more details regarding the failure of the defective board. Important remark: For all errors detected by MIPS which are fatal (rebooting of the TV set, with reboot starts after LAYER 1 error blinking), one should short the SDM solder paths at startup from the power OFF state by mains interruption and not via the power button, to trigger the SDM via the hardware pins. When one of the blinking LED procedures is activated, the front LED will show (blink) the contents of the error-buffer. Error codes greater then 10 are shown as follows: 1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit 2. A pause of 1.5 s 3. “n” short blinks (where “n”= 1 to 9) 4. A pause of approximately 3 s, 5. When all the error codes are displayed, the sequence finishes with a LED blink of 3 s 6. The sequence starts again. Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show: 1. One long blink of 750 ms (which is an indication of the decimal digit) followed by a pause of 1.5 s 2. Two short blinks of 250 ms followed by a pause of 3 s 3. Eight short blinks followed by a pause of 3 s 4. Six short blinks followed by a pause of 3 s 5. One long blink of 3 s to finish the sequence 6. The sequence starts again.

5.6.2

How to Activate Use one of the following methods: • Activate the CSM. The blinking front LED will show only the latest layer 1 error, this works in “normal operation” mode or automatically when the error/protection is monitored by the stand-by processor. At the time of this release, this layer 1 error blinking was not working as expected. In case no picture is shown and there is no LED blinking, read the logging to detect whether “error devices” are mentioned. (see section 5.8.6 UART Logging). • Activate the SDM. The blinking front LED will show the entire contents of the layer 2 error buffer, this works in “normal operation” mode or when SDM (via hardware pins) is activated when the tv set is in protection. 2009-Apr-03

EN 28

•

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Service Modes, Error Codes, and Fault Finding

Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins. Transmit the commands “MUTE” - “062500” - “OK” with a normal RC. The complete error buffer is shown. Take notice that it takes some seconds before the blinking LED starts. Transmit the commands “MUTE” - “06250x” - “OK” with a normal RC (where “x” is a number between 1 and 5). When x = 1 the last detected error is shown, x = 2 the second last error, etc.... Take notice that it takes some seconds before the blinking LED starts.

5.7

Protections

5.7.1

Software Protections Most of the protections and errors use either the stand-by microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections. There are several types of software related protections, solving a variety of fault conditions: • Protections related to supplies: check of the 12V, +5V, +3V3 and 1V2. • Protections related to breakdown of the safety check mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more.

5.7.3

As for the blinking LED indication, the blinking LED of layer 1 error displaying can be switched “off” by pushing the power button on the keyboard. This condition is not valid after the set was unpowered (via mains interruption). The blinking LED starts again and can only be switched “off” by unplugging the mains connection. This can be explained by the fact that the MIPS can not load the keyboard functionality from software during the start-up and does not recognise the keyboard commands at this time.

5.8

5.8.1

Hardware Protections The only real hardware protection in this chassis appears in case of an audio problem e.g. DC voltage on the speakers. The audio protection circuit pulls the “supply-fault” low and the tv set will blink LAYER 1 error = 2 or in SDM, LAYER 2 error = 19. Be very careful to overrule this protection via SDM (not to cause damage to the Class D audio amplifier). Check audio part first before activating via SDM. In case one of the speakers is not connected, the protection can also be triggered. Repair Tips • It is also possible that the set has an audio DC protection because of an interruption in one or both speakers (the DC voltage that is still on the circuit cannot disappear through the speakers). Caution: (Dis)connecting the speakers during the ON state of the TV can damage the audio amplifier.

2009-Apr-03

Ambilight Due to degeneration process of the AmbiLights, there can be a difference in the colour and/or light output of the spare ambilight module in comparison with the originals ones contained in the TV set. Via ComPair, the light output can be adjusted.

5.8.2

CSM When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. If this mechanism works it can be concluded that a large part of the operating system is already working (MIPS, USB...)

5.8.3

5.7.2

Fault Finding and Repair Tips Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra Information”.

Remark on the Supply Errors The detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection. Protections during Start-up During TV start-up, some voltages and IC observers are actively monitored to be able to optimise the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start-up, they are described in the start-up flow in detail (see section 5.3 Step by step Startup).

Important remark regarding the blinking LED indication

Exit “Factory Mode” When an “F” is displayed in the screen’s right corner, this means the set is in “Factory” mode, and it normally happens after a new SSB is mounted. To exit this mode, push the “VOLUME minus” button on the TV’s local keyboard for 10 seconds (this disables the continuous mode). Then push the “SOURCE” button on the TV’s local keyboard for 10 seconds until the “F” disappears from the screen.

5.8.4

DC/DC Converter Introduction • The best way to find a failure in the DC-DC converters is to check their starting-up sequence at “power-on via the mains cord”, presuming that the stand-by microprocessor is operational. • If the input voltage of DC-DC converters is around 12.7 V (measured on decoupling capacitors 2107 and 2123 and the enable signals are “low” (active), then the output voltages should have their normal values. The +12V and +5VPOD supplies start-up first (enabled by PODMODE signal from the stand-by microprocessor). There is a supplementary condition for 12V to start-up: if the +5VPOD does not start up due to a local defect, then +12V will not be available as well. The +5V-ON supply is enabled by the ONMODE signal (coming also from the stand-by microprocessor). The +1V2 supply starts up when the +12V appears, then at least 100 ms later, the +3V3 will be activated via the ENABLE-3V3 signal from the stand-by microprocessor. If the +12V value is less than 10 V, the last enumerated voltages will not show up due to the undervoltage detection circuit 7105-1 + 6101 and surrounding components. Furthermore, if the +12V is less than 8 V, then also the +1V2 will not be available. The +5V5-TUN generator 7202 (present only for the analogue version of China platforms) will start to operate as soon as the 12V (PSU) is present.

Service Modes, Error Codes, and Fault Finding •

• •

The consumption of controller IC 7103 is around 19 mA (that means almost 200 mV drop voltage across resistor 3108). The current capability of DC-DC converters is quite high (short-circuit current is 7 to 10 A). The DETECT1 signal (active “low”) is an internal protection (error 18) of the DC-DC convertor and will occur if the output voltage of any DC-DC convertor is out of limits (10% of the normal value).

5.8.5

EN 29

Fan self test (only for sets with LED backlight) In case fans are present, a softest can be done by pushing the red coloured button on the remote control while the TV set is in CSM. Exit CSM and check the status of the fans in the error buffer by entering SAM (062596 + info button on the RC). In case of failure (fully red screen) more detailed information is available in the error buffer (error 41, 42, 43, 44).

5.8.6 Fault Finding • Symptom: +1V2 not present (even for a short while ~10 ms) – Check 12 V availability (resistor 3108, MOS-FETs 7101 and 7102), value of +12 V, and surrounding components) – Check the voltage on pin 9 (1.5 V), – Check for +1V2 output voltage short-circuit to GND that can generate pulsed over-currents 7...10 A through coil 5103. – Check the over-current detection circuit (2106 or 3131 interrupted). • Symptom: +1V2 present for about 100ms, +3V3 not rising. – Check the ENABLE-3V3 signal (active “low”), – Check the voltage on pin 8 (1.5 V), – Check the under-voltage detection circuit (the voltage on collector of transistor 7105-1 should be less than 0.8 V), – Check for output voltages short-circuits to GND (+3V3) that can generate pulsed over currents 7...10 A through coil 5101, – Check the over-current detection circuit (2105 or 3127 interrupted). • Symptom: +1V2 OK, +3V3 present for about 100 ms. Possible cause: SUPPLY-FAULT line stays “low” even though the +3V3 and +1V2 is available - the stand-by microprocessor is detecting that and switching “off” all supply voltages. – Check the drop voltage across resistor 3108 (they could be too high, meaning a defective controller IC or MOS-FETs), – Check if the boost voltage on pin 4 of controller IC 7103 is less than 14 V (should be 19 V), – Check if +1V2 or +3V3 are higher than their normal values - that can be due to defective DC feedback of the respective DC-DC convertor (ex. 3152, 3144). • Symptom: +1V2 and +3V3 show a high level of ripple voltage (audible noise can come from the filtering coils 5101, 5103). Possible cause: instability of the frequency and/or duty cycle of a DC-DC converter or stabiliser. – Check the resistor 3164, capacitors 2102 and 2103, input and output decoupling capacitors. – Check AC feedback circuits (2120, 2129, 3141, 3153, 2110, 2114 and 3135). • Symptom: +1V2, +3V3 ok, no +5V5-TUN (analogue sets only). Possible cause: the “+5V5-TUN GENERATOR” circuit (7202 and surroundings components) is defective: check transistor 7202 (it has to have gate voltage pulses of about 10 V amplitude and drain voltage pulses of about 35 V amplitude) and surrounding components. A high consumption (more than 6 mA) from +5V5-TUN voltage can cause also +5V5-TUN voltage to be too low or zero.

Q548.1E LA

UART Logging When something is wrong with the TV set (f.i.the set is rebooting) checking the UART logging using hyperterminal can be done to find more information. Hyperterminal is a standard Windows application. It can be found via Programs, Accessories, Communications, Hyperterminal. Connect a “ComPair UART”-cable (3138 188 75051) from the Service connector in the TV set, via the ComPair interface (this is compulsory, otherwise ICs are blown in the PC), to the “COMx”-port of the PC. After start-up of Hyperterminal, fill in a name (f.i. “logging”) in the “Connection Description” box, then apply the following settings: 1. COMx 2. Bits per second = 115200 3. Data bits = 8 4. Parity = none 5. Stop bits = 1 6. Flow control = none During the start-up of the TV set, the logging will be displayed. This is also the case during rebooting of the TV set (the same logging appears time after time). Also available in the logging is the “Display Option Code” (useful when there is no picture), look for item “DisplayRawNumber” in the beginning of the logging. Tip: When there is no picture available during reboot, it is possible to check for “error devices” in the logging (LAYER 2 error). This can be very helpful to determine the failure cause of the reboot. For protection state, there is no logging.

5.8.7

Loudspeakers Make sure that the volume is set to minimum during disconnecting the speakers in the “on” state of the TV. The audio amplifier can be damaged by disconnecting the speakers during “on” state of the set! Sometimes the set can go into protection, but that is not always the case.

5.8.8

Tuner Attention: In case the tuner is replaced, always check the tuner options!

5.8.9

Display option code Attention: In case the SSB is replaced, always check the display option code in SAM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions. See also Table 6-4 for the code.

5.8.10 Upgrade HDMI EDID NVM Note: when a pair of power MOSFETs (7101 or 7102) becomes defective, the controller IC 7103 should be replaced as well.

To upgrade the HDMI EDID, see ComPair for further instructions.

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Service Modes, Error Codes, and Fault Finding

Q548.1E LA

5.8.11 Upgrade VGA EDID NVM To upgrade the VGA EDID NVM, pin 7 of the EDID NVM [2] has to be short circuited to ground. See ComPair for further instructions.

EDID SDM

2 1

18440_201_090225.eps 090306

Figure 5-10 VGA EDID NVM

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Service Modes, Error Codes, and Fault Finding

Q548.1E LA

EN 31

5.8.12 SSB Replacement Follow the instructions in the flowchart in case a SSB has to be exchanged. See Figure 5-11.

Instruction note: SSB replacement Q528.x, Q522.x, Q529.x, Q54x.x START

Set is going into protection after replacing the SSB (blinking LED, error 2). Take care that speakers are connected! In some sets, the speakers are in the rear cover, and when the set is switched “on” without speakers, it is possible that the Audio protection is triggered. Advise: remount rear cover before switching “on” (see also SCC_71772).

Set is still operating? No Create “repair” directory on USB stick and connect USB stick to TV-set Go to SAM mode (062596 i+) and save the TV settings via “Upload to USB”.

- Replace SSB board by a Service SSB. - Make the SSB fit mechanically to the set.

Start-up set. Set behaviour?

Set is starting up but no display.

Set is starting up & display is OK.

Set is starting up in “Factory” mode.

Update main software in this step, by using “autorun.upg” file.

Noisy picture with bands/lines is visible and the red LED is continuous “on” (sometimes also the letter “F” is visible).

Program “Display Option” code via 062598 MENU/HOME, followed by 3 digits code (this code can be found on a sticker inside the set).

Press 5 s. the “Volume minus” button on the local cntrl until the red LED switches “off”, and then press 5 s. the MENU (*) button of the local cntrl. (* in some chassis this button is named SOURCE) The picture noise is replaced by blue mute!

After entering “Display Option” code, set is going to Standby (= validation of code).

Unplug the mainscord to verify the correct disabling of the factory-mode.

Program “Display Option” code via 062598 MENU/ HOME, followed by 3 digits code (this code can be found on a sticker inside the set).

Restart the set.

Saved settings on USB stick?

After entering “Display Option” code, set is going to Standby (= validation of code).

Connect PC via ComPair interface to Service connector. Yes Start TV in Jett mode (DVD i+/OSD) Open ComPair browser Q52x. Go to SAM mode, and reload settings via “Download from USB”.

Restart the set.

In case of settings reloaded from USB, the set type, serial number, Display 12NC, are automatically stored when entering display options.

Program “set type number”, “serial number”, and “display 12NC”. If not already done; Check latest software on Service website. Update Main and Standby software via USB.

Check and perform alignments in SAM according to the Service Manual. E.g. option codes, colour temperature...

- Check if correct “Display Option” code is programmed. - Verify “Option Codes” according sticker inside the set. - Default settings for White drive ...see Service Manual

Final check of all menus in CSM. Special attention for HDMI Keys.

END

Q52xE SSB Board swap – v5.1 VDS/JA Updated 18-03-2009 (changes are indicated in red) H_16771_007.eps 090318

Figure 5-11 SSB replacement flowchart 2009-Apr-03

EN 32

Q548.1E LA

5.9

Software Upgrading

5.9.1

Introduction

Service Modes, Error Codes, and Fault Finding 5. The renamed “upg” file will be visible and selectable in the upgrade application. Back-up Software Upgrade Application If the default software upgrade application does not start (could be due to a corrupted boot 2 sector) via the above described method, try activating the “back-up software upgrade application”. How to start the “back-up software upgrade application” manually: 1. Disconnect the TV from the Mains/AC Power. 2. Press the “INFO”-button on a Philips remote control or “CURSOR DOWN” button on a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “INFO”-button (or “cursor down” button) pressed while reconnecting the TV to the Mains/AC Power. 3. The software upgrade application will start.

The set software and security keys are stored in a NANDFlash, which is connected to the PNX8543 via the PCI bus. It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the DFU. Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys! (copy protection keys, MAC address, ...). It is not possible anymore to replace the NAND-Flash with another one from a scrap-board. Perform the following actions after SSB replacement: 1. Set the correct option codes (see sticker inside the TV). 2. Update the TV software (see the DFU for instructions). 3. Perform the alignments as described in section Reset of Repaired SSB. 4. Check in CSM if the HDMI keys are valid. For the correct order number of a new SSB, always refer to the Spare Parts list, available on the Philips Spare Part web portal. 5.9.2

5.9.3

In this chassis it is possible to upgrade the Stand-by software via a USB stick. The method is similar to upgrading the main software via USB. Use the following steps: 1. Create a directory “UPGRADES” on the USB stick. 2. Copy the Stand-by software (part of the one-zip file, e.g. StandbySW_CFT69_84.0.0.0.upg) into this directory. 3. Insert the USB stick into the TV. 4. Start the download application manually (see section Manual Software Upgrade. 5. Select the appropriate file and press the “red” button to upgrade.

Main Software Upgrade • •

The “UpgradeAll.upg” file is only used in the factory. The “FlashUtils.upg” file is only used by Service centres that are allowed to do component level repair on the SSB. 5.9.4

Automatic Software Upgrade In “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “AUTORUN.UPG” (FUS part of the one-zip file: e.g. FUS _Q5431E_ 1.25.5.0_commercial.zip). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see DFU). The “autorun.upg” file must be placed in the root of the USB stick. How to upgrade: 1. Copy “AUTORUN.UPG” to the root of the USB stick. 2. Insert USB stick in the set while the set is in ON MODE. The set will restart and the upgrading will start automatically. As soon as the programming is finished, a message is shown to remove the USB stick and restart the set. Manual Software Upgrade In case that the software upgrade application does not start automatically, it can also be started manually. How to start the software upgrade application manually: 1. Disconnect the TV from the Mains/AC Power. 2. Press the “OK” button on a Philips TV remote control or a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “OK” button pressed while reconnecting the TV to the Mains/AC Power. 3. The software upgrade application will start. Attention! In case the download application has been started manually, the “autorun.upg” will maybe not be recognized. What to do in this case: 1. Create a directory “UPGRADES” on the USB stick. 2. Rename the “autorun.upg” to something else, e.g. to “software.upg”. Do not use long or complicated names, keep it simple. Make sure that “AUTORUN.UPG” is no longer present in the root of the USB stick. 3. Copy the renamed “upg” file into this directory. 4. Insert USB stick into the TV. 2009-Apr-03

Stand-by Software Upgrade via USB

Content and Usage of the One-Zip Software File Below the content of the One-Zip file is explained, and instructions on how and when to use it. File name

Description

907.5_PnSEsticker.zip

Contains the E-sticker data. Not to be used by Service technicians.

cabinet_TV543_x.x.x.x.zip

Contains acoustic parameters per cabinet. Not to be used by Service technicians.

ceisp2padll_P2PAD_x.x.x.x.zip

Not to be used by Service technicians. For ComPair development only.

display_TV543_x.x.x.x.zip

Not to be used by Service technicians.

EJTAGDownload_Q5431_x.x.x.x.zip

Only used by service centra which are allowed to do Component Level Repair.

Factory_Q5431_x.x.x.x.zip

Only for production purposes, not to be used by Service technicians.

FlashUtils_Q5431_x.x.x.x.zip

Not to be used by Service technicians.

FUS_Q5431_x.x.x.x.zip

Contains the “autorun.upg” which is needed to upgrade the TV main software and the software download application.

HDMI_FHD_EDID_Q5431_x.x.x.x.zip

Contains the EDID content of the different (FHD) HDMI NVM’s. See ComPair for further instructions.

HDMI_HD_EDID_Q5431_x.x.x.x.zip

Contains the EDID content of the different (HD) HDMI NVM’s. See ComPair for further instructions.

lightGuide_TV543_x.x.x.x.zip

Not to be used by Service technicians.

OAD_Q5431_x.x.x.x.zip

Not to be used by Service technicians.

Pgamma_xxxxxxxx_Q5431_x.x.x.x.zip Contains NVM data for the specific display control board. Not to be used by Service technicians. PQ_Q5431_x.x.x.x.zip

Not to be used by Service technicians.

processNVM_Q5431_x.x.x.x.zip

Default NVM content. Must be programmed via ComPair.

Service Modes, Error Codes, and Fault Finding File name

Description

StandbySW_CFT69_x.x.x.x.zip

Contains the Stand-by software in “upg” and “hex” format.

Q548.1E LA

EN 33

- The “StandbySW_xxxxx_prod.upg” file can be used to upgrade the Stand-by software via USB. - The “StandbySW_xxxxx.hex” file can be used to upgrade the Stand-by software via ComPair. - The files “StandbySW_xxxxx_exhex.hex” and “StandbySW_xxxxx_dev.upg” may not be used by Service technicians (only for development purposes). Tcon_xxxxxxxx_Q5431_x.x.x.x.zip

Contains NVM data for the specific display control board. Not to be used by Service technicians.

UpgradeAll_Q5431_x.x.x.x.zip

Only for production purposes, not to be used by Service technicians. Caution: Never try to use this file, because it will overwrite the HDCP keys! Only for production purposes, not to be used by Service technicians.

UpgradeExe_Q5431_x.x.x.x.zip VGA_FHD_EDID_TV543_x.x.x.x.zip

Contains the EDID content of the different (FHD) VGA NVM. See ComPair for further instructions.

VGA_HD_EDID_TV543_x.x.x.x.zip

Contains the EDID content of the different (HD) VGA NVM. See ComPair for further instructions.

2009-Apr-03

EN 34

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Alignments

6. Alignments Index of this chapter: 6.1 General Alignment Conditions 6.2 Hardware Alignments 6.3 Software Alignments 6.4 Option Settings 6.5 Reset of Repaired SSB 6.6 Total Overview SAM modes

6.1

General Alignment Conditions Perform all electrical adjustments under the following conditions: • Power supply voltage (depends on region): – AP-NTSC: 120 VAC or 230 VAC / 50 Hz (± 10%). – AP-PAL-multi: 120 - 230 VAC / 50 Hz (± 10%). – EU: 230 VAC / 50 Hz (± 10%). – LATAM-NTSC: 120 - 230 VAC / 50 Hz (± 10%). – US: 120 VAC / 60 Hz (± 10%). • Connect the set to the mains via an isolation transformer with low internal resistance. • Allow the set to warm up for approximately 15 minutes. • Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground. • Test probe: Ri > 10 MΩ, Ci < 20 pF. • Use an isolated trimmer/screwdriver to perform alignments.

6.1.1

Alignment Sequence •

•

6.2

First, set the correct options: – In SAM, select “Options”, and then “Option numbers”. – Fill in the option settings for “Group 1” and “Group 2” according to the set sticker (see also section Option Settings). – Press OK on the remote control before the cursor is moved to the left. – In submenu “Option numbers” select “Store” and press OK on the RC. OR: – In main menu, select “Store” again and press OK on the RC. – Switch the set to Stand-by. Warming up (>15 minutes).

Hardware Alignments Not applicable.

6.3

Software Alignments Put the set in SAM mode (see chapter 5. Service Modes, Error Codes, and Fault Finding). The SAM menu will now appear on the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below. The following items can be aligned: • Tuner AGC. • White point. To store the data: • Press OK on the RC before the cursor is moved to the left. • In main menu select “Store” and press OK on the RC. • Press MENU on the RC to switch back to the main menu. • Switch the set to stand-by mode. For the next alignments, supply the following test signals via a video generator to the RF input:

2009-Apr-03

• •

•

6.3.1

EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3). LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

Tuner AGC (RF AGC Take Over Point Adjustment) Purpose: To keep the tuner output signal constant as the input signal amplitude varies. No alignment is necessary, as the AGC alignment is done automatically (standard value: “64”). Store settings and exit SAM.

6.3.2

White Point • •

Set “Active control” to “Off”. Choose “TV menu”, “TV Settings” and then “Picture” and set picture settings as follows:

Picture Setting Dynamic backlight

Off

Dynamic Contrast

Off

Colour Enhancement

Off

Picture Format

Un scaled

Light Sensor

Off

Brightness

Colour

Contrast

100

•

Go to the SAM and select “Alignments”-> “White point”.

White point alignment LCD screens: • Use a 100% white screen as input signal and set the following values: – “Colour temperature”: “Normal”. – All “White point” values to: “127”. – “Red BL offset” values to “7”. – “Green BL offset” values to “7”. In case you have a colour analyser: • Measure with a calibrated contactless colour analyser in the centre of the screen. Consequently, the measurement needs to be done in a dark environment. • Adjust the correct x, y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x, y coordinates (see Table 6-1). Tolerance: dx: ± 0.004, dy: ± 0.004. • Repeat this step for the other colour temperatures that need to be aligned. • When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM. • Restore the initial picture settings after the alignments. Table 6-1 White D alignment values Value

Cool (11000K)

Normal (9000K)

Warm (6500K)

0.278

0.289

0.314

0.278

0.291

0.319

If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production. • Select a COLOUR TEMPERATURE (e.g. COOL, NORMAL, or WARM).

Alignments • • •

Set the RED, GREEN and BLUE default values according to the values in Table 6-1. When finished press OK on the RC, then press STORE (in the SAM root menu) to store the aligned values to the NVM. Restore the initial picture settings after the alignments.

6.4.4

(7000 series) 32"

Colour Temp

42"

Black level offset

Normal

127

100

127

116

112

Cool

127

122

125

114

124

Warm

127

108

Table 6-3 White tone default settings Roadrunner sets (8000 series) White Tone Colour Temp

32"

42"

Black level offset

Normal

127

103

Cool

127

100

120

127

109

118

Warm

127

LCD Panel Flicker Alignment Note: This is only necessary for Forward Integration models (sets that have the LCD Timing Controller (TCON) located on the SSB) - not applicable to sets in this chassis.

EN 35

Opt. No. (Option numbers)

Diversity Not all sets with the same Commercial Type Number (CTN) necessarily have the same option code! Use of Alternative BOM An alternative BOM number usually indicates the use of an alternative display or power supply. This results in another display code thus in another Option code. For the power supply there is no difference. Refer to Chapter 3. Precautions, Notes, and Abbreviation List.

Note: tint settings Frame sets (7000 series) 47" and 52", as well as Roadrunner sets (8000 series) 37" and 47", were not available at time of publishing. 6.3.3

Select this sub menu to set all options at once (expressed in two long strings of numbers). An option number (or “option byte”) represents a number of different options. When you change these numbers directly, you can set all options very quickly. All options are controlled via eight option numbers. When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on a sticker inside the TV set and in Table 6-4. Example: The options sticker gives the following option numbers: • 08192 00133 01387 45160 • 12232 04256 00164 00000 The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicate software options 5 to 8. Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set). When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number. SeeTable 6-4 for the options.

Table 6-2 White tone default settings Frame sets

White Tone

Q548.1E LA

6.4.5

Option Code Overview Table 6-4 Option and display code overview

See ComPair for further instructions.

CTN (Alt. BOM#)

Options Group 1

Options Group 2

Disp. code

32PFL7404H/12 08193 00649 01391 45288 10165 28832 00162 00000 181

6.4

Option Settings

6.4.1

Introduction

42PFL7404H/12 08193 00651 01391 45288 10167 28832 00178 00000 183 47PFL7404H/12 08193 00651 01391 45288 10170 28832 00162 00000 186 52PFL7404H/12 08193 00651 01391 45288 10192 28832 00186 00000 208 32PFL8404H/12 08209 00656 02031 45288 26549 28834 00162 00000 181

The microprocessor communicates with a large number of I2C ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence / absence of these PNX5120 ICs (back-end advanced video picture improvement IC which offers motion estimation and compensation features (commercially called HDNM) plus integrated Ambilight control) is made known by the option codes. Notes: • After changing the option(s), save them by pressing the OK button on the RC before the cursor is moved to the left, select STORE in the SAM root menu and press OK on the RC. • The new option setting is only active after the TV is switched “off” / “stand-by” and “on” again with the mains switch (the NVM is then read again). 6.4.2

Dealer Options

37PFL8404H/12 08209 00656 02031 45288 26549 28834 00170 00000 161 42PFL8404H/12 08209 00657 02031 45288 26551 28834 00178 00000 183 47PFL8404H/12 08209 00657 02031 45288 26554 28834 00162 00000 186

Important: after having edited the option numbers as described above, you must press OK on the remote control before the cursor is moved to the left!

6.5

Reset of Repaired SSB A very important issue towards a repaired SSB from a service repair shop implies the reset of the NVM on the SSB. A repaired SSB in service should get the service Set type “00PF0000000000” and Production code “00000000000000”. Also the virgin bit is to be set. To set all this, you can use the ComPair tool. In case of a display replacement, reset the “Operation hours” to “0”, or to the operation hours of the replacement display.

For dealer options, in SAM select “Dealer options”. See Table 6-5. 6.4.3

(Service) Options Select the sub menu's to set the initialisation codes (options) of the model number via text menus. See Table 6-5.

2009-Apr-03

EN 36 6.5.1

Q548.1E LA

Alignments

SSB identification Whenever ordering a new SSB, it should ne noted that the correct ordering number (12nc) of a SSB is located on a sticker on the SSB. The format is <12nc SSB><serial number>. The ordering number of a “Service” SSB is the same as the ordering number of an initial “factory” SSB.

18310_221_090318.eps 090319

Figure 6-1 SSB identification

6.6

Total Overview SAM modes Table 6-5 SAM mode overview Main Menu

Sub-menu 1

Sub-menu 2

Hardware Information

A. SW VERSION

e.g. “Q5431_0.26.10.0”

Sub-menu 3

B. Stand-by processor version e.g. “STDBY_84.69.0.0” C. Production code

Description Display TV & Stand-by SW version and CTN serial number.

e.g. “See type plate”

Operation hours

Displays the accumulated total of operation hours.TV switched “on/off” & every 0.5 hours is increase one

Error

Displayed the most recent error.

Reset error buffer Alignment

Clears all content in the error buffer. Tuner AGC White point

RF-AGC Take over point adjustment (AGC default value is 64) Colour temperature

Normal Warn

3 difference modes of colour temperature can be selected

Cool White point red White point green

LCD White Point Alignment. For values, see Table 6-1.

White point blue Red black level offset Green black level offset Dealer options

2009-Apr-03

Picture mute

Off/On

Select Picture mute On/Off. Picture is muted / not muted in case no input signal is detected at input connectors.

Virgin mode

Off/On

E-sticker

Off/On

Select Virgin mode On/Off. TV starts up / does not start up (once) with a language selection menu after the mains switch is turned “on” for the first time (virgin mode) Select E-sticker On/Off (USP’s on-screen)

Auto store mode

None

Autostore mode disabled (not in installation menu)

PDC/VPS

Autostore mode via ATS (PDC/VPS) enabled

TXT page

Autostore mode via ACI enabled

PDC/VPS/TXT

Autostore mode via ACI or ATS enabled

Alignments

Q548.1E LA

EN 37

Main Menu

Sub-menu 1

Sub-menu 2

Sub-menu 3

Options

Digital broadcast

DVB

Off/On

Select DVB On/Off

DVB - T installation

Off/On or Country dependent

Select DVB T installation On/Off or by country

Digital features

Display

Video reproduction

Description

DVB - T light

Off/On

Select DVB T light On/Off

DVB - C

Off/On

Select DVB C On/Off

DVB - C installation

Off/On or Country dependent

Select DVB C installation On/Off or by country

Over the air download

Off/On or Country dependent

Select Over the air download On/Off or by country

8 days EPG

Off/On

Select 8 day EPG On/Off

USB

Off/On

Select USB On/Off

Ethernet

Off/On

Select Ethernet On/Off

Wi-Fi

Off/On

Select Wi-Fi On/Off

DLNA

Off/On

Select DLNA On/Off

On-line service

Off

On-line service is Off

PTP (Picture Transfer Protocol)

Off/On

Select PTP On/Off

Update assistant

Off/On

Select Update assistant On/Off Internet software update is Off

Internet software update

Off

Screen

201 / LCD LGD WUE SBA1 37"

Displayed the panel code & type model.

LightGuide

Off/On

Select LightGuide On/Off

Display fans

Not present/Present

Select Display fans Present/Not present.

Temperature sensor

No sensor

N.A

Temperature LUT

N.A

E-box & monitor

Off/On

Select E-box & monitor On/Off

Picture processing

None/PNX5120

Select Picture processing None/PNX5120 (Q543.xE chassis).

MOP local contrast

Off/On

Select MOP local contrast On/Off

Light sensor

Off/On

Select Light sensor On/Off

Light sensor type

0/1/2/3

Select Light sensor type form 0 to 3 (for difference styling).

Pixel Plus type

Pixel Plus HD

Select type of picture improvement.

Perfect Pixel HD Pixel Precise HD Pixel Plus HD (used in Q543.xE) Pixel Precise HD (used in Q548.1E) Ambilight

None,

Select type of Ambilight modules use.

2 sided 2/2

For 8400 series only

2 sided 4/4 3 sided 2/3/2 3 sided 4/3/4 3 sided 4/5/4 4 sided 4/3/4/3 Ambilight technology

LED/Future use

MOP ambilight

Off/On

Audio reproduction

Acoustic system

Source selection

EXT1/AV1 type

Ambilight technology LED is in use. Select MOP ambilight On/Off Cabinet design used for setting dynamic audio parameters.

SCART CBVS RGB LR

Select input source when connected with external equipment.

CVBS Y/C YPbPr LR CVBS Y/C YPbPr HV LR (CVBS) YPbPr LR EXT2/AV2 type

SCART CBVS RGB LR

Select input source when connected with external equipment.

CVBS Y/C LR (CVBS) YPbPr LR CVBS Y/C LR EXT3/AV3 type

None

Select input source when connected with external equipment.

CVBS CVBS LR YPbPr YPbPr LR YPbPr HV LR VGA

Off/On

Select VGA On/Off

SIDE I/O

Off/On

Select SIDE I/O On/Off

HDMI 1

Off/On

Select HDMI 1 On/Off

HDMI 2

Off/On

Select HDMI 2 On/Off

HDMI 3

Off/On

Select HDMI 3 On/Off

HDMI 4

Off/On

Select HDMI 4 On/Off

HDMI side

Off/On

Select HDMI side On/Off

HDMI CEC

Off/On

Select HDMI CEC On/Off

HDMI CEC RC pass through

Off/On

Select HDMI CEC RC pass through On/Off

HDMI CEC Pixel Plus link

Off/On

Select Pixel Plus link On/Off

2009-Apr-03

EN 38

Main Menu

Option number

Q548.1E LA

Alignments

Sub-menu 1

Sub-menu 2

Sub-menu 3

Miscellaneous

Region

Europe/AP-PAL-MULTI/Australia

Description Select Region/country.

Tuner type

HD1816-MK1/TD1716-MK4/ TD1716-MK3/HD1816-MK2

Select type of Tuner used.

System RC support

Off/On

Select System RC support On/Off.

Embedded user manual

Off/On

Select Embedded user manual On/Off.

Start-up screen

Off/On

Select Start-up screen On/Off.

Wallpaper

Off/On

Select Wallpaper On/Off.

Hotel mode

Off

Hotel mode is Off.

Group 1

e.g. “08192.02181.01387.45160”

The first line (group 1) indicates hardware options 1 to 4.

Group 2

e.g. “10185.12448.00164.00000”

The second line (group 2) indicates software options 5 to 8.

Store

Store after changing.

Initialise NVM

N.A

Store

Select Store in the SAM root menu after making any changes. Display information is for development purposes.

Software maintenance

Software events

Display Clear Test reboot Test reboot is to restart the TV.

Hardware events

Display

Display information is for development purposes.

Clear Operation hours display

Test setting

Digital information

0003

In case the display must be swapped for repair, you can reset the “Display operation hours” to “0”. So, this one does keeps up the lifetime of the display itself (mainly to compensate the degeneration behaviour).

QAM modulation: 64-QAM

Display information is for development purposes.

Symbol rate: 23:29 Original network ID: 12817 Network ID:12817 Transport stream ID: 2 Service ID: 3 Hierarchical modulation: 0 Selected video PID: 35 Selected main audio PID: 99 Selected 2nd audio PID: -1 Install start frequency

000

Install start frequency from 0 MHz

Install end frequency

999

Install end frequency as 999 MHz

Digital only Digital + Analogue

Select Digital only or Digital + Analogue before installation.

Display parameters DISPT 4.0.8.11

Display information is for development purposes.

Default install frequency Installation Development file versions

Development 1 file version

Acoustics parameters ACSTS 3.0.6.1 PQF - Fixed settings 1 “4.54.34.32.34” PQS - Profile set 1 “4.57.34.32.34” PQU - User styles 1 “4.56.34.32.34” Development 2 file version

12NC one zip software

Display information is for development purposes.

Initial main software NVM version Q5431_0.4.3.0 Flash units SW Q5431_0.16.48.24 Upload to USB

Channel list Personal settings

To upload several settings from the TV to an USB stick

Option codes Display-related alignment History list Download from USB

Channel list Personal settings Option codes Display-related alignment

2009-Apr-03

To download several settings from the USB stick to the TV.

Circuit Descriptions

Q548.1E LA

EN 39

7. Circuit Descriptions Index of this chapter: 7.1 Introduction 7.2 Power Supply 7.3 DC-DC Converter 7.4 Front-End 7.5 HDMI 7.6 Video and Audio Processing - PNX8543 7.7 Common Interface CI+ Notes: • Only new circuits (circuits that are not published recently) are described. • Figures can deviate slightly from the actual situation, due to different set executions. • For a good understanding of the following circuit descriptions, please use the wiring, block (see chapter 9. Block Diagrams) and circuit diagrams (see chapter 10. Circuit Diagrams and PWB Layouts).Where necessary, you will find a separate drawing for clarification.

7.1

Introduction

Main difference with the previous chassis is the addition of the PNX5120 Video Back-End Processor. Roadrunner sets (8000 series) are equipped with AmbiLight. 7.1.1

Implementation Key components of this chassis are: • PNX8543 Digital Colour Decoder • HD1816AF Hybrid Tuner • DRX3926K Demodulator • TDA9996 HDMI Switch • TPA3123D2PWP Class D Power Amplifier • PNX5120 Video Back-End Processor.

7.1.2

TV543 Architecture Overview •

For details about the chassis block diagrams refer to chapter 9. Block Diagrams. An overview of the TV543 architecture can be found in Figure 7-1.

The Q548.1E LA chassis (platform name TV543/82) is a derivative from the Q543.1E LA chassis.

Optional for Q548 chassis

18540_200_090327.eps 090402

Figure 7-1 Architecture of TV543/82 platform

2009-Apr-03

EN 40 7.1.3

Q548.1E LA

Circuit Descriptions

SSB Cell Layout

18540_201_090327.eps 090327

Figure 7-2 SSB layout cells (top view)

2009-Apr-03

Circuit Descriptions 7.2

Q548.1E LA

EN 41

Power Supply All power supplies described below are a black box for Service. When defective, a new board must be ordered and the defective one must be returned, unless the main fuse of the board is broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market. Consult the Service Spare Parts website for the order codes of the boards.

Max 1.0sec

Max 0.5 sec

Min 20 msec Max 5.0 sec

Vin AC

STANDBY

+3V3-STANDBY

+12V, +Vsnd, +24V

7.2.1

Specifications 18440_209_090226.eps 090227

Most sets in the TV543 platform use the Integrated Power Board (IPB) - incl. inverter. The 52" sets in this chassis have a conventional PSU - with separate inverter. In this Service Manual, no detailed information is available because of design protection issues. 7.2.2

Figure 7-4 PSU Timing Diagram 7.2.5

Power supply protection is implemented via the stand-by controller of the PNX8543 via the following signals: • POWER-OK: signal from PSU to indicate if the supply output from the IPB is normal • DETECT1: signal to indicate if the +5V, +3V3 and +1V2 voltages on the chassis are present • DETECT2: signal to indicate if the +12V voltage on the chassis is present.

Diversity Below find an overview of the different PSUs that are used: Table 7-1 Supply diversity

7.2.3

Supplier

PSU

Model

Input Voltage Range

LGIT

PLHL-T826B

32PFL7404H/12

High Mains (198 to 265 VAC)

Delta

DPS-298CP-4 A 42PFL7404H/12

High Mains (198 to 265 VAC)

Delta

DPS-298CP-2 A 47PFL7404H/12

High Mains (198 to 265 VAC)

Delta

DPS-411AP-3 A 52PFL7404H/12

High Mains (198 to 265 VAC)

LGIT

PLHL-T826B

32PFL8404H/12

High Mains (198 to 265 VAC)

Delta

DPS-298CP A

37PFL8404H/12

High Mains (198 to 265 VAC)

Delta

DPS-298CP-4 A 42PFL8404H/12

High Mains (198 to 265 VAC)

Delta

DPS-298CP-2 A 47PFL8404H/12

High Mains (198 to 265 VAC)

Application An application diagram can be found below:

Power Supply Protection

7.3

DC-DC Converter Input power is obtained from the IPB module via the following voltages: • +3V3-STANDBY (stand-by-mode only) • +12V (on-mode) • +Vsnd (audio power) (on-mode) • +24V (bolt-on power) (on-mode). Control is achieved by the PNX8543 controller via the STANDBY signal. Audio power is specifically for audio supply usage only and does not go through any DC conversion.

Inverter

Below find a block diagram of the on-board DC-DC converters. To Lamps

AC Input

RELAY

+12V

Vo=400V PFC

Audio Supply (+12V)

+12V

+24V

Flyback

NCP5422 + 2x Si4936 (Sync Dual Controller + Dual FETs)

STANDBY (HIIGH=OFF, LOW=ON)

+3V3_STANDBY

+1V2-PNX8543 +3V3 LD1117 (Linear Regulator)

+1V8-PNX8543

LD1117 (Linear Regulator)

+1V8-PNX5100

ENABLE-3V3 Non- Isolated/Hot

Isolated/Cold

18440_208_090226.eps 090327

Figure 7-3 Application Integrated Power Board +3V3-STANDBY

7.2.4

ST1S10 (Sync Power IC)

+5V_+5V5-TUN

ST1S10 (Sync Power IC)

+1V2-PNX5100

LD3985M (Linear Regulator)

+1V2-STANDBY

Power Supply Timing The STANDBY signal controls the on-mode voltages +12V, +Vsnd and +24V. During chassis cold start from AC mains, +12V can be expected to be stable within 1.0 seconds, while for a warm start, i.e. wake up from stand-by power state, this timing becomes 0.5 seconds maximum. During AC switch off, stand-by power +3V3-STANDBY decay is at least 20 ms but not more than 5.0 seconds compared to +12V. Refer to Figure 7-4:

18440_210_090227.eps 090227

Figure 7-5 DC-DC converters

2009-Apr-03

EN 42 7.4

Circuit Descriptions

Q548.1E LA

Front-End

P la tfo rm w ith e m b e d d e d E D ID The Front-End consist of the following key components: • • • •

Tuner HD1816AF IF demodulator DRX3926K AGC amplifier UPC3221GV SAW filter 36M125.

E D ID : 2 5 3 B

IIC

TDA 9996 3B

Below find a block diagram of the front-end application.

I2C-SSB NXP Hybrid Tuner

SAW Filter

CVBS IF Amplifier

DRX3926K

2nd SIF

PNX8543

18440_211_090227.eps 090227

Figure 7-6 Front-End block diagram The DRX3926K is a multi-standard demodulator supporting DVB-C, DVB-T and analogue standards. The demodulated digital stream is fed into the parallel transport stream data ports of the PNX8543. The demodulated analogue signal in the form of CVBS is connected to the analogue video CVBS/Y input channel, while the SIF is connected via the SSIF2 positive input port.

HDMI In this platform, the TDA9996 HDMI multiplexer is implemented. The EDID contents are no longer stored in a separate EEPROM, but directly in the multiplexer. Each input has its own physical sub address: the first 253 bytes are common, where the last 3 bytes define the specific input. The EDID contents are, at +5V power-up, downloaded to RAM. The following figures show the HDMI input configuration and EDID control.

PNX8543

B H D M IB-R X DRX D

Out

TDA9996

H D M I Side (optional)

H D M IA-R X

1P 05

CRX

AR X

E d id

1M 96

HDMI 3 (optional)

1P02

1P03

1P04

1P06

BR X

HDMI 4 (optional)

HDMI 2

HDMI 1 18440_213_090227.eps 090227

Figure 7-7 HDMI input configuration

2009-Apr-03

4 * HDMI inputs

2 5 3 co m m o n B yte s + 1 B su b a d d re s o f S o u rce P h ysica l A d d re ss +3 B fo r inp u t A +3 B fo r inp u t B +3 B fo r in p u t C +3 B fo r in p u t D 18440_214_090227.eps 090227

IF-AGC I2C-TUNER

7.5

CPU

Figure 7-8 EDID control (embedded EDID) Some delta’s w.r.t. TDA9996 compared to earlier chassis/ platforms are: • +5V detection mechanism • stable clock detection mechanism • integrated EDID • RT control • HPD control • TMDS output control • CEC control • new hot-plug control for PNX8543 for 5th HDMI input • new EDID structure: EDID stored in TDA9996, therefore there are no EDID pins on the SSB. Only in the event of a 5th HDMI input, an additional EEPROM is foreseen, as was implemented in previous platforms. Some delta’s with respect to PNX8543 compared to earlier chassis/platforms are: • 2 HDMI inputs (A & B) • HDMI deep colour RGB/YCbCr 4:4:1 10/12 bit detection. After replacement of the TDA9996 HDMI multiplexer, the default I2C address should be reprogrammed from C0 to CE, and the HDMI EDIDs should be reprogrammed as well. Both actions should be executed via ComPair.

Circuit Descriptions 7.6

Video and Audio Processing - PNX8543

EN 43

â&#x20AC;¢

For a functional diagram of the PNX8543, refer to Figure 7-9.

MEMORY CONTROLLER

TS in from channel decoder

MPEG SYSTEM PROCESSOR

CI/CA

TS out/in for PCMCIA

The PNX8543 handles the digital and analogue audio- and video decoding and processing. The processor is a MIPS32 general purpose CPU and a 8051-based TV controller for power management and user event handling.

The PNX8543 is the main audio and video processor (or System-on-Chip) for this platform. It is a member of the PNX85xx SoC family (described in earlier chassis) with the addition of the MPEG4 functionality; the separate STi710x MPEG4 decoder is no longer implemented in this platform.

PNX8543x

Q548.1E LA

DV-ITU-656

PRIMARY VIDEO OUTPUT

LVDS for flat panel display (single or dual channel)

LVDS

DV INPUT AV-PIP SUB-PICTURE VIDEO DECODER

CVBS, Y/C, RGB

3D COMB SECONDARY VIDEO OUTPUT

Low-IF

SSIF, LR

DIGITAL IF

MPEG/H.264 VIDEO DECODER

VIDEO ENCODER

analog CVBS

AUDIO DACS

analog audio

SCALER, DE-INTERLACE AND NOISE REDUCTION

AUDIO DEMOD AND DECODE AUDIO DSP

Dual SPDIF

AUDIO OUT

AUDIO IN

I2S

300 MHz AV-DSP HDMI RECEIVER

Dual HDMI

PWM GPIO x 22

SPDIF

DRAWING ENGINE 300 MHz MIPS32 4KEc CPU

SYSTEM CONTROLLER (8051)

I 2C

I2S

ADC

SPI

DMA BLOCK

UART

I2C

GPIO Flash USB 2.0 CA x 10

PCI 2.2 18440_202_090226.eps 090226

Figure 7-9 PNX8543 functional diagram

2009-Apr-03

EN 44 7.6.1

Circuit Descriptions

Q548.1E LA

Video Subsystem Refer to Figure 7-10 for the main video interfaces for the PNX8543 and the video signal flow between blocks and memory.

DDR2-SDRAM

PNX8543x MCU-DDR

A VCP/PC

VCP_RX AFE (ADC)

GFX2

CPIPE_ L2QTV

PIP PC_ UIP

PC_RX

HDMI Dual HDMI

GFX1

VCP_ WIFD

HDMI_ RX

DMA BUS

LOW IF CVBS RGB YPbPr VGA

2D_DE

VCP_ UIP

LVDS_BUF LVDS_TX

LCD panel FPD-LVDS1 LCD panel FPD-LVDS2

main MBVP_ L2QTV

HDMI_UIP MBVP_ L2VO1

DV (including ITU-656)

MBVP_ L2VO2

VIP (ITU-656)

CPIPE_ L2VO

CVBS/Y DENC C

MUX A

TS PCMCIA TSDO TSDI CMD

DAC

monitor CVBS1/Y

DAC

monitor CVBS2/C

TSI CAI

MSVD VMSP

18440_203_090226.eps 090226

Figure 7-10 PNX8543 video flow diagram The Video Subsystem consist of the following blocks: • Analogue Front-End (AFE) block • Video and PC Capture (VPC/PC) pipe • HDMI Receiver interface • Memory-Based Video Processor MBVP) • Video Composition Pipe (CPIPE) • Memory Based Video Processor (MBVP) VO-1 • Memory Based Video Processor (MBVP) VO-2 • Video Composition Pipe (CPIPE) • Dual Flat Panel Display-LVDS (FPD-LVDS) • Digital Encoder (DENC) • Digital Video VIP • 2D graphics block.

2009-Apr-03

Circuit Descriptions

EN 45

Audio Subsystem Refer to Figure 7-11 for the main audio interfaces for the PNX8543 and the audio signal flow between blocks and memory.

DDR2-SDRAM

PNX8543x MCU

TS-IN

CAI

TM2270 (MPEG, AC-3, MP3 DECODER)

VMSP

XB4

XB1 SPDIF-IN1 SPDIF-IN2

SPDIF-IN

fast SPDIF I2S-IN-SD1 I2S-IN-SD2 I2S-IN-SD3 I2S-IN-SD4

SPDIF-Out

SPDIF-OUT

DMA BUS

7.6.2

Q548.1E LA

XB2 AI

I2S-IN-WS I2S-IN-SCK I2S-IN-OSC 4 × I2 S

HDMI

SPDIF HDMI_RX I 2S

4 × I2S

XB3

4 × I2S 4

IF SSIF from XB4

L, R

ADC ASDEC DigIF (DEMODULATION AND DECODING) SPDIF

APP - AUDIO DSP (POST PROCESSING)

ADC

I2S-OUT-SD1 I2S-OUT-SD2 I2S-OUT-SD3 I2S-OUT-SD4 I2S-OUT-WS I2S-OUT-SCK I2S-OUT-OSC

2 DAC 2 DAC 2 DAC 2 DAC

Main L, R HP L, R SCART2 L, R SCART1 L, R

18440_204_090226.eps 090226

Figure 7-11 PNX8543 audio flow diagram The Audio Subsystem consist of the following blocks: • Analogue Audio Front End (AAFE) used to capture Baseband Audio Inputs and to sample Secondary Sound IF (SSIF) directly or via Low-IF input • HDMI Receiver interface block • SPDIF input block • Audio Input (AI) block • Audio Output (AO) block • Demodulation & Decoding (ASDEC) DSP for decoding all analogue terrestrial TV sound standards • Audio Post-Processing (APP) block • Digital Audio decoder.

2009-Apr-03

EN 46 7.6.3

Q548.1E LA

Circuit Descriptions

Connectivity and Compute Subsystem Refer to Figure 7-12 for the connectivity and compute subsystem.

DDR2-SDRAM

PNX8543x MCU_DDR

IIC4_DMA

I2C-2

IIC2_DMA

UART-1

IIC3_DMA

UART1

DMA BUS

I2C-3

MIPS 4KEc EJTAG

DCS-NETWORK

I2C-1

AVDSP

PCI_XIO PCI/XIO

UART-2

UART2 CAI

USB

CI/CA

USB2.0 I2C-MC

EJTAG

SYSTEM CONTROLLER 80C51

JTAG_MMIO

UART-3 PWMs GPIOs

18440_205_090226.eps 090226

Figure 7-12 PNX8543 connectivity and compute subsystem The Connectivity Subsystem consists of: • PCI/XIO interface • USB2.0 interface • Three 2-wire UARTs • Four Master/Slave I2C interfaces • Common Interface/Conditional Access Interface. The Computing Subsystem consists of: • 32-bit MIPS RISC core • Enhanced JTAG (EJTAG) block inside the MIPS • JTAG_MMIO blocks • TV controller • Audio/Video DSP (AV_DSP) • Memory Control Unit (MCU).

7.6.4

Service Notice - FLASH RAM / PNX8543 exchange The FLASH RAM (item 7M00) and/or PNX8543 (item 7600) can only be exchanged by an authorised central workshop with dedicated programming tools. Due to the presence of (CI+) keys in the components, unauthorised exchange of these components will always result in a defective board.

7.7

Common Interface CI+ Together with this platform, an extension to the Common Interface (CI) Conditional Access system is added, called CI+. CI+ or Common Interface Plus is a specification that extends the Common Interface (DVB-CI) as described in the digital broadcasting standard DVB.

2009-Apr-03

Circuit Descriptions

tuner

channel decoder

TS -IN P U T d em u x

D E S /AE S d escram b ler

EN 47

M Matrix atrix

d eco d er

M H E G C I+

C om m and interface

MHEG MMI ap p licatio n

D E S /AE S scram b ler

P C I/X IO

C A-M D O

C A-M D I

C A-C TR L

P N X 8543 T ransport stream interface

C A clien t

The weakness of the conventional CI module used in a Conditional Access system was the absence of a Copy Protection mechanism, as decrypted content could be sent over the PCMCIA interface unscrambled. With the CI+ extension, a form of copy protection is established between the Conditional Access Module (CAM) and the Integrated Digital Television (IDTV). The security mechanisms in CI+ are derived/copied from POD (with the exception of Out Of Band (OOB) used in US CA systems). For more information about conventional CA systems using a CI module, refer to the BJ3.0E L/PA or BL2.xU Service Manual.

Q548.1E LA

Tran sp o rt S tream s

C A-C o n tro l

CAM

The CI+ standard is downwards compatible with the existing CI standard.

P ro p rietary C A scram b ling

(S C )

C I + S tan d ard ised C C S scram b ling

18440_221_090227.eps 090227

The following figure shows the implementation of the CI+ Conditional Access system in the TV543 platform.

7.8

Figure 7-13 CI+ Conditional Access implementation

Ambi Light The Ambi Light architecture in this platform has been entirely renewed. The characteristics are: • Additional DC/DC board generating 12/16/24 V (optional) • ARM processor (on DC/DC panel or AL board) • Low-power LEDs • SPI interface from ARM to LED drivers • I2C upgradeable via USB • Each AL module has a temperature sensor.

The use of the DC/DC board is optional. In case no DC/DC board is implemented, the ARM processor is located on one of the AL boards. Refer to Figure 7-14 for the Ambi Light architecture.

18310_203_090317.eps 090317

Figure 7-14 Interface between Ambi Light and SSB 7.8.1

ARM controller Refer to Figure 7-15 below for signal interfacing to and from the ARM controller. The ARM controller is located on the DC/DC board (item no. 7302) or AL panel (item no. 7102).

SD A SC L S E L1 S E L2

S da1 S c l1 t bd

Sck P 0. 7 P 0. 8

M A T0.0

AR M

M ISO M A T1.0 t bd

RxD

SPI LATC H SPI LATC H 2 (only on dc/dc for aurea)

t bd M OSI

Tx D

SPI C LO C K

Tx d0 R x d0

t bd P 0. 10

SPI D ATA O U T PW M C LO C K SPI D ATA R ETU R N BLAN K PR O G C S EEPR O M TEM P

18310_204_090318.eps 090318

Figure 7-15 ARM controller interface Data transfer between ARM processor and LED drivers is executed by a Serial Peripheral Interface (SPI) bus interface. 2009-Apr-03

Circuit Descriptions

Q548.1E LA

The SPI bus is a synchronous serial data link standard that operates in full duplex mode.

Also PWM clock and BLANK signals are generated by the controller. The controller can be reprogrammed via I2C (via USB). The controller can receive matrix values via I2C, which will be stored in the EEPROM of each AL module via the SPI bus. The temperature sensor in each AL module controls the TEMP line; in case of a too high temperature the controller will reduce the overall brightness.

For debugging purposes, the working principle is given below: • At startup the controller will read-out matrix data from the EEPROM devices (via SPI DATA RETURN) • Before operation, the driver current is set via SPI, with driver in DC mode • During normal operation the controller receives RGB-, configuration-, operation mode- and topology data via I2C • The controller converts the I2C RGB data via the matrixes to SPI LED data • Via data return the controller receives error data (if applicable).

A m b ilig h t m o d u le 2

S o ut

S in

S P I d ata in

LED D R IV E R 1

LED driver communication (via SPI bus) Refer to Figure 7-16 below for signal interfacing between the ARM controller and the LED drivers on the AL boards, and the LED drivers and the EEPROMs on the AL boards.

o ut16

Am b ilig h t m o d u le 1

7.8.2

LED D R IV E R 2

S o ut

A m b ilig h t m o d u le N

S in

o ut16

EN 48

LED D R IV E R N

S o ut

SPI d ata return SPI c lo c k (SC LK) SPI latc h (XLAT ) PR O G (VPR G ) BLAN K PW M C LO C K ( G SC LK)

ARM

18310_205_090318.eps 090318

Figure 7-16 SPI communication between ARM controller and LED drivers The ARM controller communicates with the LED drivers (on each AL module) via an SPI bus. For debugging purposes, the working principle is given below: • Data from the ARM controller is linked through the drivers, which are connected in cascade • SPI CLK, SPI LATCH, PROG, BLANK and PWM CLOCK are going directly from the controller to each driver • SPI DATA RETURN is linked from the last driver to the controller: controller decides which driver returns data. 7.8.3

Temperature Control Refer to Figure 7-17 for signal interfacing between the ARM controller and the temperature sensor on the AL boards.

Am bilight m odule 1 Vcc

Am bilight m odule 2 Vcc

Pull-up

TEMP SENSOR

Am bilight m odule N Vcc

Pull-up

TEMP SENSOR

Pull-up

TEMP SENSOR

ARM

18310_206_090318.eps 090318

Figure 7-17 Communication between ARM controller and temperature sensor

2009-Apr-03

Each AL board is equipped with a temperature sensor. If one of the sensors detects a temperature over the threshold, the TEMP line is pulled LOW which results in brightness reduction.

IC Data Sheets

Q548.1E LA

EN 49

8. IC Data Sheets This chapter shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the

Diagram SSB: DC/DC +3V3 +1V2 B01A, NCP5422AD (IC 7103)

Block Diagram

VCC

ROSC

BIAS

VCC

8.6 V − 7.8 V

CURRENT SOURCE GEN

− +

RAMP2

RAMP1

BST

IS+1 CLK1

+ IS−1

−

CLK2

non−overlap VCC

GATE(H)1

GATE(L)1

−

FAULT

PWM Comparator 1

FAULT

70 mV

Q FAULT

−

Set Dominant

RAMP1 BST

0.425 V

− +

− 0.25 V

GATE(L)2

R FAULT GND E/A OFF

0.425 V

1.2 mA

−

E/A1

−

1.0 V

non−overlap VCC

Reset Dominant

FAULT

RAMP2

E/A OFF

5.0 A

GATE(H)2

PWM Comparator 2

− +

IS−2

S Reset Dominant

70 mV

−

IS+2

BST

OSC

−

8.1

electrical diagrams (with the exception of “memory” and “logic” ICs).

FAULT

E/A2

1.0 V

VFB1

COMP1

COMP2

VFB2

Pin Configuration SO−16 16

A WL Y WW

NCP5422A AWLYWW

GATE(H)1 GATE(L)1 GND BST IS+1 IS−1 VFB1 COMP1

GATE(H)2 GATE(L)2 VCC ROSC IS+2 IS−2 VFB2 COMP2

= Assembly Location = Wafer Lot = Year = Work Week

F_15400_129.eps 240505

Figure 8-1 Internal block diagram and pin configuration

2009-Apr-03

EN 50 8.2

IC Data Sheets

Q548.1E LA

Diagram SSB: DC/DC +3V3 +1V2 Standby B01B, ST1S10PH (IC 7202/7222)

Block Diagram

Pin Configuration

DFN8 (4x4)

PowerSO-8 I_18010_083.eps 130608

Figure 8-2 Internal block diagram and pin configuration 2009-Apr-03

IC Data Sheets 8.3

Q548.1E LA

EN 51

Diagram SSB: DC/DC +3V3 +1V2 Standby B01B, LD3985M (IC 7201)

Block Diagram

Pin Configuration

TSOT23-5L/SOT23-5L

Flip-Chip G_16290_084.eps 020206

Figure 8-3 Internal block diagram and pin configuration

2009-Apr-03

EN 52 8.4

IC Data Sheets

Q548.1E LA

Diagram SSB: Front End B02A, DRX3926K (IC 7303)

Block Diagram

RF AGC DVB-T/QAM FEC

IF AGC

SAW Main Tuner

IF AMP

ADC DVB-T/QAM/ATV Demodulator

DAC

Stereo Decoder Integrated Tuner

DAC

MPEG-2 TS

CVBS

SIF I2S Audio

Presaw Sense I2 C I2C

System Controller GPIO

Pin Configuration VSSAH_CVBS

INP

VDDAH_CVBS

INN

CVBS

VSSAH_AFE1

SIF

VDDAH_AFE1

VSSAL_AFE2

VDDAL_AFE1 VSSAL_AFE1

VDDAL_AFE2

IF_AGC

PDP PDN

RF_AGC

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 XI

RSTN

SAW_SW

VSSAH_OSC

GPIO2

VDDAH_OSC

VSYNC

VDDH

VSSL

VSSH

VDDL

VSSL

VDDH

VDDL

VSSH

TDO

I2C_SDA1

TMS

I2C_SCL1

TCK

MD7

TDI

MD6

I2C_SDA2

MD5

I2C_SCL2

MD4

I2S_CL

VDDH

I2S_DA

VSSH

DRXK

10 11 12 13 14 15 16

I2S_WS

VDDL

VSSL

MD3

GPIO1

MD2

MSTRT

MD1

MERR

MD0

VSSH VDDH

MVAL MCLK

Figure 8-4 Pin configuration

2009-Apr-03

18440_300_090303.eps 090303

IC Data Sheets 8.5

Q548.1E LA

EN 53

Diagram SSB: PNX8543 - Power B03A-B03H, PNX8543 (IC7600)

Block Diagram PNX8543x

MEMORY CONTROLLER

TS in from channel decoder

MPEG SYSTEM PROCESSOR

CI/CA

TS out/in for PCMCIA DV-ITU-656

PRIMARY VIDEO OUTPUT

LVDS for flat panel display (single or dual channel)

LVDS

DV INPUT AV-PIP SUB-PICTURE VIDEO DECODER

CVBS, Y/C, RGB

3D COMB SECONDARY VIDEO OUTPUT

Low-IF

SSIF, LR

DIGITAL IF

MPEG/H.264 VIDEO DECODER

VIDEO ENCODER

analog CVBS

AUDIO DACS

analog audio

SCALER, DE-INTERLACE AND NOISE REDUCTION

AUDIO DEMOD AND DECODE AUDIO DSP

Dual SPDIF

I2S

AUDIO OUT

AUDIO IN

I2S

SPDIF

300 MHz AV-DSP HDMI RECEIVER

Dual HDMI

DRAWING ENGINE 300 MHz MIPS32 4KEc CPU

SYSTEM CONTROLLER (8051)

I2C

PWM GPIO x 22

ADC

SPI

DMA BLOCK

UART

I2C

GPIO Flash USB 2.0 CA x 10

PCI 2.2

Pin Configuration ball A1 index area

2 1

B D F H K M P T V Y AB AD AF AH AK AM AP

4 3

6 5

8 10 12 14 16 18 20 22 24 26 28 30 32 34 9 11 13 15 17 19 21 23 25 27 29 31 33

A C E G J L

PNX8543xEH

N R U W AA AC AE AG AJ AL AN Transparent top view 18440_301_090303.eps 090303

Figure 8-5 Internal block diagram and pin configuration

2009-Apr-03

EN 54 8.6

IC Data Sheets

Q548.1E LA

Diagram SSB: Ethernet B05B, DP83816 (IC7N04)

Pin Configuration NC VSS NC AUXVDD VSS TXCLK TXEN C RS COL/MA16 AUXVDD VSS TXD3/MA15 TXD2/MA14 TXD1/MA13 TXD0/MA12 AUXVDD VSS C1 X2 X1 VSS RXDV/MA11 RXER/MA10 RXOE RXD3/MA9 RXD2/MA8 RXD1/MA7 AUXVDD VSS RXD0/MA6 RXCLK M DC MDIO M A5 MA4/EECLK MA3/EEDI

Block Diagram

RAM BIST Logic

SRAM RXFilter .5 KB

Test data in

MII TX

SRAM RX-2 KB

Test data out

MII Mgt

MII RX

25 MHz Clk

Interface Logic

BROM/EE

MII TX

MII Mgt

MII RX

R x A ddr

Rx wr data

Tx Addr

Tx wr data

Rx rd data

Tx rd data

SRAM TX-2 KB

PCI CLK

MAC/BIU

BIOS ROM Cntl BIOS ROM Data EEPROM/LEDs

NC VSS IAUXVDD VREF RESERVED NC NC VSS TPRDM TPRDP IAUXVDD REGEN VSS RESERVED VSS VSS TPTDM TPTDP VSS AUXVDD VSS AUXVDD PMEN/CLKRUNN PCICLK INTAN RSTN GNTN REQN VSS AD31 AD30 AD29 PCIVDD AD28 AD27 AD26

37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72

Pin1 Identification

DP83816

144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109

MA2/LED100N MA1/LED10N MA0/LEDACTN MD7 MD6 MD5 MD4/EEDO AUXVDD VSS MD3 MD2 MD1/CFGDISN MD0 MWRN MRDN MCSN EESEL RESERVED NC NC NC PWRGOOD 3VAUX AD0 AD1 AD2 AD3 PCIVDD AD4 AD5 VSS AD6 AD7 CBEN0 AD8 AD9

73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108

PCI CNTL

MII RX MII TX MII Mgt

36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

TPTDP/M

3V DSP Physical Layer

PCI AD

DP83816

AD25 AD24 C B EN 3 IDSEL VSS AD23 AD22 PCIVDD AD21 AD20 AD19 NC NC AD18 AD17 AD16 CBEN2 VSS FRAMEN IRDYN TRDYN PCIVDD DEVSELN STOPN PERRN SERRN PAR CBEN1 AD15 AD14 VSS AD13 AD12 AD11 PCIVDD AD10

TPRDP/M

F_15710_167.eps 230905

Figure 8-6 Internal block diagram and pin configuration

2009-Apr-03

IC Data Sheets 8.7

Q548.1E LA

EN 55

Diagram SSB: Class-D B06A, TPA3123D (IC 7L10)

Block Diagram 1 F

0.22 F LIN

BSR

RIN

ROUT

1 F

22 H 0.68 F

PGNDR

0.68 F

PGNDL

1 F

470 F

LOUT

BYPASS AGND

22 H

BSL

470 F

0.22 F

PVCCL

AVCC

PVCCR

VCLAMP Shutdown Control

1 F

MUTE

}

GAIN0 GAIN1

Control

Pin Configuration PVCCL SD PVCCL MUTE LIN RIN BYPASS AGND AGND PVCCR VCLAMP PVCCR

1 2 3 4 5 6 7 8 9 10 11 12

24 23 22 21 20 19 18 17 16 15 14 13

PGNDL PGNDL LOUT BSL AVCC AVCC GAIN0 GAIN1 BSR ROUT PGNDR PGNDR

TERMINAL 24-PIN (PWP)

I/O/P

DESCRIPTION

Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance to AVCC

RIN

Audio input for right channel

LIN

Audio input for left channel

GAIN0

Gain select least-significant bit. TTL logic levels with compliance to AVCC

GAIN1

Gain select most-significant bit. TTL logic levels with compliance to AVCC

MUTE

Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low = outputs enabled). TTL logic levels with compliance to AVCC

BSL

I/O

PVCCL

1, 3

LOUT

Class-D 1/2-H-bridge positive output for left channel

23, 24

Power ground for left-channel H-bridge

NAME

PGNDL

Bootstrap I/O for left channel Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC

VCLAMP

BSR

I/O

Bootstrap I/O for right channel

ROUT

Internally generated voltage supply for bootstrap capacitors

Class-D 1/2-H-bridge negative output for right channel

PGNDR

13, 14

Power ground for right-channel H-bridge.

PVCCR

10, 12

Power supply for right-channel H-bridge, not connected to PVCCL or AVCC

AGND

Analog ground for digital/analog cells in core

AGND

Analog ground for analog cells in core

BYPASS

Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via external capacitor sizing.

AVCC Thermal pad

19, 20

High-voltage analog power supply. Not internally connected to PVCCR or PVCCL

Die pad

Connect to ground. Thermal pad should be soldered down on all applications to properly secure device to printed wiring board.

18440_302_090303.eps 090303

Figure 8-7 Internal block diagram and pin configuration 2009-Apr-03

EN 56 8.8

IC Data Sheets

Q548.1E LA

Diagram SSB: Ethernet B08D, PNX51xx (IC7C00)

Block Diagram PNX51xx MEMORY CONTROLLER

TM327x 1 LVDS RX 1

GIC 1 UIP L3K7

Video TM327x 2 GIC 2

LVDS RX 2

TM327x 3 GIC 3 PCI/XIO

LVDS TX 1 Video

I2C

LVDS TX 2

I2C-DMA I2C

CPIPE L3K7 GFX

LVDS TX 3 LVDS TX 4 UART

UART

16 X GPIO EJTAG CLOCK

CAB

AUDIO IN AUDIO OUT

Pin Configuration ball A1 index area

2 4 6 8 10 12 14 16 18 20 22 24 26 1 3 5 7 9 11 13 15 17 19 21 23 25

C D E F G H J K L M N P R T U V W Y AA AB AC AD AE AF

PNX51xx

Transparent top view 18560_300_090403.eps 090403

Figure 8-8 Internal block diagram and pin configuration

2009-Apr-03

Block Diagrams

Q548.1E LA

EN 57

9. Block Diagrams Wiring Diagram 32" (Frame) WIRING DIAGRAM 32" (FRAME / ROADRUNNER)

8M85

1M83 (AL1) 1. SCL 2. SPI-DATA-IN 3. SDA 4. CONTROL-1 5. CONTROL-2 6. +3V3 7. BLANK 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND

8319

TO BACKLIGHT

LCD DISPLAY (1004) 8M85

TO BACKLIGHT

+ -

1G50 (B07B)

1M59 (B08E)

8G50

1. N.C 2. N.C ... ... ... 39. N.C 40. N.C 41. N.C

1. 2. 3. 4. 5. 6. 7.

8G51

1G51 (B07B) 1. +VDISP-OUT 2. +VDISP-OUT 3. +VDISP-OUT 4. +VDISP-OUT ... ... ... 51. GND

SUBWOOFER (5214)

8316

8M85

1M85 (AL4) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BUF 6. +3V3 5. PWM-CLOCK-BUF 4. SPI-LATCH 3. SPI-DATA-RETURN 2. SPI-DATA-OUT 1. SPI-CLOCK-BUF

SCL-AMBI-3V3 GND SDA-AMBI-3V3 GND GND +3V3 GND

SSB (1150)

+5V KEYBOARD LED1 +3V3-STANDBY LED2 RC GND LIGHT-SENSOR

CN4

1M95 (B01B)

11. FAN_PWM 10. GND_SND 9. +VSND 8. +12V 7. +12V 6. +12V 5. GND1 4. GND1 3. GND1 2. STANDBY 1. 3V3_ST

11. N.C 10. GNDSND 9. +AUDIO-POWER 8. +12V 7. +12V 6. +12V 5. GND 4. GND 3. GND 2. STANDBY 1. +3V3-STANDBY

8M95

(OPTIONAL)

CN3 1. HV2 2. N.C. 3. HV2

MAIN POWER SUPPLY IPB PLHL-T826B

8. 7. 6. 5. 4. 3. 2. 1.

(1005)

12. GND1 11. I2C_DATA 10. I2C_SCL 9. INV_OK 8. A/P_DIM 7. BOOST 6. DIM 5. BL_ON_OFF 4. GND1 3. GND1 2. +12V 1. +12V

8M99

AMBI-LIGHT MODULE

1M99 (B01B)

CN5

12. GND 11. SDA-SET 10. SCL-SET 9. POWER-OK 8. GND 7. BACKLIGHT-BOOST 6. BACKLIGHT-OUT 5. LAMP-ON-OUT 4. GND 3. GND 2. +12VD 1. +12VD

RIGHT-SPEAKER GNDSND GNDSND LEFT-SPEAKER

1. N 2. L

CN1

T3.15A

1736 (B06A) 3. RIGHT-SPEAKER 2. GNDSND 1. LEFT-SPEAKER

1M83 (AL1) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. GND 6. +3V3 5. CONTROL-2 4. CONTROL-1 3. SDA 2. GND 1. SCL

Board Level Repair 8308

RIGHT SPEAKER (5213)

INLET

(1176)

8736

AMBI-LIGHT MODULE

(OPTIONAL)

1735 (B06A) 4. 3. 2. 1.

Component Level Repair Only For Authorized Workshop

IR LED PANEL (1112)

(1175)

CN2 1. HV1 2. N.C. 3. HV1

8M20

6. GND 5. +24V 4. GND 3. +24V 2. GND 1. +24V

DANGEROUS HIGH VOLTAGE

CN7

DANGEROUS HIGH VOLTAGE

(1114)

KEYBOARD CONTROL

1M20 (B03G)

LEFT SPEAKER (5213)

18560_400_090326.eps 090401

2009-Apr-03

Block Diagrams

Q548.1E LA

EN 58

Wiring Diagram 37" (Roadrunner) WIRING DIAGRAM 37" (ROADRUNNER)

8M85

1M83 (AL1) 1. SCL 2. SPI-DATA-IN 3. SDA 4. CONTROL-1 5. CONTROL-2 6. +3V3 7. BLANK 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND

8319

TO BACKLIGHT

LCD DISPLAY (1004) 8M85

TO BACKLIGHT

8G50

1G50 (B07B)

1M59 (B08E)

1. N.C 2. N.C ... ... ... 39. N.C 40. N.C 41. N.C

1. 2. 3. 4. 5. 6. 7.

SCL-AMBI-3V3 GND SDA-AMBI-3V3 GND GND +3V3 GND

1G51 (B07B) 1. +VDISP-OUT 2. +VDISP-OUT 3. +VDISP-OUT 4. +VDISP-OUT ... ... ... 51. GND

8G51 8316

8M85

1M85 (AL4) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BUF 6. +3V3 5. PWM-CLOCK-BUF 4. SPI-LATCH 3. SPI-DATA-RETURN 2. SPI-DATA-OUT 1. SPI-CLOCK-BUF

SSB (1150)

8M20

6. GND 5. +24V 4. GND 3. +24V 2. GND 1. +24V

CN7

1. HV2 2. N.C. 3. HV2

CN3

1. HV1 2. N.C. 3. HV1

MAIN POWER SUPPLY IPB DPS-298CPA B

8. 7. 6. 5. 4. 3. 2. 1.

+5V KEYBOARD LED1 +3V3-STANDBY LED2 RC GND LIGHT-SENSOR

CN4

1M95 (B01B)

11. FAN_PWM 10. GND_SND 9. +VSND 8. +12V 7. +12V 6. +12V 5. GND1 4. GND1 3. GND1 2. STANDBY 1. 3V3_ST

11. N.C 10. GNDSND 9. +AUDIO-POWER 8. +12V 7. +12V 6. +12V 5. GND 4. GND 3. GND 2. STANDBY 1. +3V3-STANDBY

8M95

12. GND1 11. I2C_DATA 10. I2C_SCL 9. INV_OK 8. A/P_DIM 7. BOOST 6. DIM 5. BL_ON_OFF 4. GND1 3. GND1 2. +12V 1. +12V

8M99

AMBI-LIGHT MODULE

1M99 (B01B) CN5

12. GND 11. SDA-SET 10. SCL-SET 9. POWER-OK 8. GND 7. BACKLIGHT-BOOST 6. BACKLIGHT-OUT 5. LAMP-ON-OUT 4. GND 3. GND 2. +12VD 1. +12VD

1735 (B06A)

1. N 2. L

CN1

1736 (B06A)

1M83 (AL1) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. GND 6. +3V3 5. CONTROL-2 4. CONTROL-1 3. SDA 2. GND 1. SCL

Board Level Repair 8308

RIGHT SPEAKER (5213)

Component Level Repair Only For Authorized Workshop

INLET

8736

(1176)

3. RIGHT-SPEAKER 2. GNDSND 1. LEFT-SPEAKER

AMBI-LIGHT MODULE

RIGHT-SPEAKER GNDSND GNDSND LEFT-SPEAKER

4. 3. 2. 1.

FUSE

(1175)

(1005)

(1114)

KEYBOARD CONTROL

CN2

1M20 (B03G)

IR LED PANEL (1112)

SUBWOOFER (5214)

+ -

LEFT SPEAKER (5213)

18560_410_090331.eps 090403

2009-Apr-03

Block Diagrams

Q548.1E LA

EN 59

Wiring Diagram 42" (Frame/Roadrunner) WIRING DIAGRAM 42" (FRAME / ROADRUNNER) 8M85

1M83 (AL1) 1. SCL 2. SPI-DATA-IN 3. SDA 4. CONTROL-1 5. CONTROL-2 6. +3V3 7. BLANK 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND

8319

LCD DISPLAY (1004) TO BACKLIGHT TO BACKLIGHT

8M85

1G50 (B07B)

8G50

1. N.C 2. N.C ... ... ... 39. N.C 40. N.C 41. N.C

8G51

1G51 (B07B) 1. +VDISP-OUT 2. +VDISP-OUT 3. +VDISP-OUT 4. +VDISP-OUT ... ... ... 51. GND

8316 8M85

1M85 (AL4) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BUF 6. +3V3 5. PWM-CLOCK-BUF 4. SPI-LATCH 3. SPI-DATA-RETURN 2. SPI-DATA-OUT 1. SPI-CLOCK-BUF

1M59 (B08E) 1. 2. 3. 4. 5. 6. 7.

SCL-AMBI-3V3 GND SDA-AMBI-3V3 GND GND +3V3 GND

1M20 (B03G) 8. 7. 6. 5. 4. 3. 2. 1.

8M20

(1150)

(OPTIONAL)

1M99 (B01B) 12. GND 11. SDA-SET 10. SCL-SET 9. POWER-OK 8. GND 7. BACKLIGHT-BOOST 6. BACKLIGHT-OUT 5. LAMP-ON-OUT 4. GND 3. GND 2. +12VD 1. +12VD

8308

INLET

RIGHT-SPEAKER GNDSND GNDSND LEFT-SPEAKER

FUSE

8735

1. N 2. L

CN1

(OPTIONAL)

1735 (B06A) 4. 3. 2. 1.

(1175)

8M95

8M99

1736 (B06A) 3. RIGHT-SPEAKER 2. GNDSND 1. LEFT-SPEAKER 1M83 (AL1) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. GND 6. +3V3 5. CONTROL-2 4. CONTROL-1 3. SDA 2. GND 1. SCL

(1176)

Board Level Repair + -

SPEAKER RIGHT (5212)

Component Level Repair Only For Authorized Workshop

IR LED PANEL (1112)

+ -

AMBI-LIGHT MODULE

SSB

11. N.C 10. GNDSND 9. +AUDIO-POWER 8. +12V 7. +12V 6. +12V 5. GND 4. GND 3. GND 2. STANDBY 1. +3V3-STANDBY

12. GND1 11. I2C_DATA 10. I2C_SCL 9. INV_OK 8. A/P_DIM 7. BOOST 6. DIM 5. BL_ON_OFF 4. GND1 3. GND1 2. +12V 1. +12V

(1005)

1M95 (B01B)

CN5

MAIN POWER SUPPLY IPB DPS-298CP-4A

+5V KEYBOARD LED1 +3V3-STANDBY LED2 RC GND LIGHT-SENSOR

AMBI-LIGHT MODULE

6. GND 5. +24V 4. GND 3. +24V 2. GND 1. +24V

CN7

1. HV2 2. N.C. 3. HV2

CN3

1. HV1 2. N.C. 3. HV1

11. FAN_PWM 10. GND_SND 9. +VSND 8. +12V 7. +12V 6. +12V 5. GND1 4. GND1 3. GND1 2. STANDBY 1. 3V3_ST

(1114)

KEYBOARD CONTROL

CN2

CN4

SPEAKER LEFT (5211) 18560_412_090331.eps 090403

2009-Apr-03

Block Diagrams

Q548.1E LA

EN 60

Wiring Diagram 47" (Frame) WIRING DIAGRAM 47" (FRAME) Board Level Repair 8319

Component Level Repair Only For Authorized Workshop

LCD DISPLAY (1004)

TO BACKLIGHT

1G50 (B07B) 1. N.C 2. N.C ... ... ... 39. N.C 40. N.C 41. N.C

8G50

1G51 (B07B) 1. +VDISP-OUT 2. +VDISP-OUT 3. +VDISP-OUT 4. +VDISP-OUT ... ... ... 51. GND

8G51 8316

1M20 (B03G) 8. 7. 6. 5. 4. 3. 2. 1.

1. HV2 2. N.C. 3. HV2

CN3

1. HV1 2. N.C. 3. HV1

11. FAN_PWM 10. GND_SND 9. +VSND 8. +12V 7. +12V 6. +12V 5. GND1 4. GND1 3. GND1 2. STANDBY 1. 3V3_ST

8M20

(1005)

SSB (1150)

11. N.C 10. GNDSND 9. +AUDIO-POWER 8. +12V 7. +12V 6. +12V 5. GND 4. GND 3. GND 2. STANDBY 1. +3V3-STANDBY

8M95

12. GND1 11. I2C_DATA 10. I2C_SCL 9. INV_OK 8. A/P_DIM 7. BOOST 6. DIM 5. BL_ON_OFF 4. GND1 3. GND1 2. +12V 1. +12V

MAIN POWER SUPPLY IPB DPS-298CP-2A

+5V KEYBOARD LED1 +3V3-STANDBY LED2 RC GND LIGHT-SENSOR

1M95 (B01B)

CN5

(1114)

1M99 (B01B) 12. GND 11. SDA-SET 10. SCL-SET 9. POWER-OK 8. GND 7. BACKLIGHT-BOOST 6. BACKLIGHT-OUT 5. LAMP-ON-OUT 4. GND 3. GND 2. +12VD 1. +12VD

8M99

FUSE

4. 3. 2. 1.

8308 8735

1. N 2. L

1735 (B06A)

CN1

+ IR LED PANEL (1112)

1736 (B06A) 3. RIGHT-SPEAKER 2. GNDSND 1. LEFT-SPEAKER

INLET

SPEAKER RIGHT (5212)

RIGHT-SPEAKER GNDSND GNDSND LEFT-SPEAKER

+ -

KEYBOARD CONTROL

CN2

CN4

SPEAKER LEFT (5211) 18560_401_090326.eps 090331

2009-Apr-03

Block Diagrams

Q548.1E LA

EN 61

Wiring Diagram 47" (Roadrunner) WIRING DIAGRAM 47" (ROADRUNNER)

1M83 (AL1) 1. SCL 2. SPI-DATA-IN 3. SDA 4. CONTROL-1 5. CONTROL-2 6. +3V3 7. BLANK 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND

1M85 (AL4) 8M85

14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BUF 6. +3V3 5. PWM-CLOCK-BUF 4. SPI-LATCH 3. SPI-DATA-RETURN 2. SPI-DATA-OUT 1. SPI-CLOCK-BUF

8319

LCD DISPLAY (1004) TO BACKLIGHT

1M59 (B08E)

1. N.C 2. N.C ... ... ... 39. N.C 40. N.C 41. N.C

1. 2. 3. 4. 5. 6. 7.

SCL-AMBI-3V3 GND SDA-AMBI-3V3 GND GND +3V3 GND

8G50

1G50 (B07B)

(1178)

AMBI-LIGHT MODULE

8316

(1178)

8M59

AMBI-LIGHT MODULE

TO BACKLIGHT

1G51 (B07B)

8M90

1M83 (AL1) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK 6. +3V3 5. CONTROL-2 4. CONTROL-1 3. SDA 2. SPI-DATA-IN 1. SCL

CN4

7. GND 6. +3V3 5. CONTROL2 4. CONTROL1 3. SDA 2. GND 1. SCL (1179)

14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BUF 6. +3V3 5. PWM-CLOCK-BUF 4. SPI-LATCH1CONN 3. SPI-DATA-RETURN 2. SPI-CLOCK-BUF 1. SPI-LATCH2CONN

INLET

8M20

1M84 (AB1)

1735 (B06A) 4. 3. 2. 1.

RIGHT-SPEAKER GNDSND GNDSND LEFT-SPEAKER

1736 (B06A) 3. RIGHT-SPEAKER 2. GNDSND 1. LEFT-SPEAKER

(1177)

1. N 2. L

CN1

DC-DC INTERFACE

14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BUF 6. +3V3 5. PWM-CLOCK-BUF 4. SPI-LATCH 3. SPI-DATA-RETURN 2. SPI-DATA-OUT 1. SPI-CLOCK-BUF

AMBI-LIGHT MODULE

1M84 (AL1)

(1177)

(1150)

1M99 (B01B) 12. GND 11. SDA-SET 10. SCL-SET 9. POWER-OK 8. GND 7. BACKLIGHT-BOOST 6. BACKLIGHT-OUT 5. LAMP-ON-OUT 4. GND 3. GND 2. +12VD 1. +12VD

8M99

8308

FUSE

SSB

11. N.C 10. GNDSND 9. +AUDIO-POWER 8. +12V 7. +12V 6. +12V 5. GND 4. GND 3. GND 2. STANDBY 1. +3V3-STANDBY

8735

(1005)

1M59 (AB1)

12. GND1 11. I2C_DATA 10. I2C_SCL 9. INV_OK 8. A/P_DIM 7. BOOST 6. DIM 5. BL_ON_OFF 4. GND1 3. GND1 2. +12V 1. +12V

1M95 (B01B)

8M95

CN5

MAIN POWER SUPPLY IPB DPS-298CP-2A

+5V KEYBOARD LED1 +3V3-STANDBY LED2 RC GND LIGHT-SENSOR

8M81

11. FAN_PWM 10. GND_SND 9. +VSND 8. +12V 7. +12V 6. +12V 5. GND1 4. GND1 3. GND1 2. STANDBY 1. 3V3_ST

6. GND 5. +24V 4. GND 3. +24V 2. GND 1. +24V

1. SCL 2. SPI-DATA-IN 3. SDA 4. CONTROL-1 5. CONTROL-2 6. +3V3 7. BLANK 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND

8. 7. 6. 5. 4. 3. 2. 1.

1M90 (AB1)

6. GND 5. +24V 4. GND 3. +24V 2. GND 1. +24V

CN7

1. HV2 2. N.C. 3. HV2

CN3

1. HV1 2. N.C. 3. HV1

8M82

CN2

1M20 (B03G)

1M83 (AL1)

AMBI-LIGHT MODULE

1. +VDISP-OUT 2. +VDISP-OUT 3. +VDISP-OUT 4. +VDISP-OUT ... ... ... 51. GND

8G51

1. SPI-CLOCK-BUF 2. SPI-DATA-OUT 3. SPI-DATA-RETURN 4. SPI-LATCH 5. PWM-CLOCK-BUF 6. +3V3 7. BLANK-BU 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND

8M84

1M84 (AL1) 1. SPI-CLOCK-BUF 2. SPI-DATA-OUT 3. SPI-DATA-RETURN 4. SPI-LATCH 5. PWM-CLOCK-BUF 6. +3V3 7. BLANK-BUF 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND

1M83 (AL1) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK 6. +3V3 5. CONTROL-2 4. CONTROL-1 3. SDA 2. SPI-DATA-IN 1. SCL

Board Level Repair + -

SPEAKER RIGHT (5212)

Component Level Repair Only For Authorized Workshop

IR LED PANEL (1112)

+ -

(1114)

KEYBOARD CONTROL

1M85 (AL4)

SPEAKER LEFT (5211) 18560_411_090331.eps 090401

2009-Apr-03

Block Diagrams

Q548.1E LA

EN 62

Wiring Diagram 52" (Frame) WIRING DIAGRAM 52" (FRAME) Board Level Repair

LCD DISPLAY (1004)

1G50 (B07B) CN2/1319 8316

INVERTER CONNECTOR

Component Level Repair Only For Authorized Workshop

INVERTER

8G50

14. PDIM_Select 13. PWM 12. On/Off 11. Vbri 10. GND3 9. GND3 8. GND3 7. GND3 6. GND3 5. 24Vinv 4. 24Vinv 3. 24Vinv 2. 24Vinv 1. 24Vinv

CN6/1M95 11. FAN_PWM 10. GND_SND 9. +VSND 8. +12V 7. +12V 6. +12V 5. GND1 4. GND1 3. GND1 2. STANDBY 1. 3V3_ST

1. +VDISP-OUT 2. +VDISP-OUT 3. +VDISP-OUT 4. +VDISP-OUT ... ... ... 51. GND

8G51

1M20 (B03G)

12. GND1 11. I2C_DATA 10. I2C_SCL 9. INV_OK 8. A/P_DIM 7. BOOST 6. DIM 5. BL_ON_OFF 4. GND1 3. GND1 2. +12V 1. +12V

MAIN POWER SUPPLY PSU DPS-411AP3A B

8. 7. 6. 5. 4. 3. 2. 1.

+5V KEYBOARD LED1 +3V3-STANDBY LED2 RC GND LIGHT-SENSOR

SSB (1150)

1M95 (B01B)

8319

(1005)

8M20

8M95

11. N.C 10. GNDSND 9. +AUDIO-POWER 8. +12V 7. +12V 6. +12V 5. GND 4. GND 3. GND 2. STANDBY 1. +3V3-STANDBY

INVERTER CONNECTOR

1M99 (B01B)

1. N 2. L

FUSE

8M99

CN1/1308

1735 (B06A) 4. 3. 2. 1.

8308

RIGHT-SPEAKER GNDSND GNDSND LEFT-SPEAKER

1736 (B06A) 3. RIGHT-SPEAKER 2. GNDSND 1. LEFT-SPEAKER

INLET

+ IR LED PANEL

SPEAKER RIGHT (5212)

12. GND 11. SDA-SET 10. SCL-SET 9. POWER-OK 8. GND 7. BACKLIGHT-BOOST 6. BACKLIGHT-OUT 5. LAMP-ON-OUT 4. GND 3. GND 2. +12VD 1. +12VD

(1112)

+ -

(1114)

KEYBOARD CONTROL

1G51 (B07B)

CN7/1M99

CN3/1316 12. N.C. 11. N.C. 10. GND3 9. GND3 8. GND3 7. GND3 6. GND3 5. 24Vinv 4. 24Vinv 3. 24Vinv 2. 24Vinv 1. 24Vinv

1. N.C 2. N.C ... ... ... 39. N.C 40. N.C 41. N.C

SPEAKER LEFT (5211) 18560_402_090326.eps 090401

2009-Apr-03

Block Diagrams

Q548.1E LA

EN 63

Block Diagram Video VIDEO B02A FRONT END

B05C PCMCIA

B03 PNX8543

7K04-7K05 74LVC245APW 20

1K00

B08D PNX5100 - LVDS IN/OUT

B03B TUN_CA MDO(0-7)

CA-MDO(0-7)

BUFFER

4302

4303

2364

3306

2367

2365

33AA

2368

33AC

PDN

1 2

2306

SIF

DEMODULATOR CVBS

2307

3 IN 4

3303

IF-N

3304

IF-P

40 49

AGC CONTROL

3301

IF-AGC 3

DRX1DRX0+

4314

AI51 AI44

CVBS-TER-OUT

+3V3B +1V2 +3V3A +3V3E +3V3D +1V2A

IREF_LVDS

HD-NM FHD 100Hz

DRXC+

DRXC-

CVBS-TER-OUT

Y_CVBS-MON-OUT-SC

CRX2+

CRX2CRX1+

4 3 2

VDDA-LVDS

AB20 AA5 L16

L5 T5 M22 AE25

CRXC+

CRXC-

H264 USB 2.0

AV1_BLK

SC1-R

16 20

CRX0-

AV1_STATUS 7F06

SC1-B

SC1-G

SCART1

CVBS1

1F02

VDDA_3V3_ADAC

AI22

VDD_3V3_LVDS

AI12

VDDA_HDMI_3V3_BIAS

AI41

7F04

VDD_3V3_SBPER VDD_1V2_CORE

19 VDD_1V2_SBCORE

BRX2+

BRX2BRX1+

BRX1BRX0+

4 6 7 9 10

EXT 2

AV2-PR_SC2-R

AV2-Y_SC2-G

CVBS2

BRX015

BRXC+

BRXC-

7F05 16

AV2-BLK_LCD-SDA

AV2-STATUS

SCART2

1H02 1

ARX2+

ARX2ARX1+

4 6 7

ARXC+

ARXC-

AI33

VDD_3V3_PER VDD_1V8_DDR

3 13 14

R-VGA G-VGA B-VGA H-SYNC-VGA

K4 PC3_AI3 P4 PC1_AI3 M4 PC2_AI3 T1 HSYNCIN T2 VSYNCIN

V-SYNC-VGA

DRX2+

CRX2CRX1+

71 69

89 87

DRX2DRX1+

CRX1CRX0+

68 RXC 66

86 RXD 84

DRX1DRX0+

CRX0-

DRX0-

CRXC+

DRXC+

CRXC-

DRXC-

HDMI SWITCH

BRX2+

BRX2BRX1+

41 39

BRX1BRX0+

39 RXB 36

BRX0-

BRXC+

BRXC-

ARX2+

ARX2ARX1+

22 20

ARX1ARX0+

19 RXA 17

ARX0-

ARXC+

ARXC-

8,45,91,24, 75,95 VDDx_1V8 4 VDDO_3V3 46,55 VDDx_3V3 15,21,34,40, 64,70,85,88 VDDH_3V3

EXT 3

AC6

AV3-PR

AV3-Y

AV3-PB

VDD_1V8 VDDO_3V3 VDDS_3V3

SIDE I/O

1G37 1

FRONT-Y_CVBS

FRONT-C

USB_VBUS

AF5

7C02 EDE5116AJBG

1V2-STANDBY

PNX5100-DDR2-A(0-12)

+3V3-PER (16-31)

AG30

1V8-PMNX85XX

AL16

USB-OC

1M09 1

USB20-DM USB20-DP

AN16 AP16 AM17

3M21

DDR2 SDRAM J1 VDDL J2 VREF

+1V8-PNX5100 PNX5100-DDR2-VREF-DDR

AN17

3M23

2 3 4

USB 2.0 CONNECTOR SIDE SW UPLOAD JPEG MP3

+3V3-PER +3V3-PER

PCI-AD<->NAND-AD

PC3_AI1

NAND FLASH 1G VCC

12,37

+3V3-NAND

PC1_AI1 PC2_AI1

AI43

B03F MEMORY

B03F PNX8543 - SDRAM

M_IREF M_VREF

AA31 AB32

3B03 +1V8-PNX85XX DDR2-VREF-CTRL 7B01 EDE1116AEBG

AI54

(0-12)

B05A HDMI_DV 2 C_+ 3 C_99 D0_+ 100 D0_96 D1_+ 97 D1_93 D2_+ 94 D2_-

+1V8-PNX5100 PNX5100-DDR2-VREF-DDR

7M00 NAND01GW3B2BN6F

SVHS IN 5 VDDH_3V3

J1 VDDL J2 VREF

+1V2-PNX85XX

AJ21

1G20 2

PNX5100-DDR2-D(0-15)

+3V3-STANDBY

AJ12

PCI

CVBS

DDR2 SDRAM

+5V

USB_RPU

1G22 PR

PNX5100-DDR2-VREF-CTRL 7C01 EDE5116AJBG

(0-12)

VDDA-LVDS

B03G PCI

CRX2+

+3V3-PNX5100-CLOCK

RREF-PNX85XX

VGA CONNECTOR

7H11 TDA9996

+1V2-PNX5100-CLOCK

B03G PNX8543 - CONTROL MIPS/FLASH/PCI

USB_DM USB_DP

AK20 F16

B03G CONROL

USB_FAULT

+1V2-PNX-TRI-PLL3 +1V2-PNX5100-DLL +3V3-PNX5100-DDR-PLL0

VDDA-ADC

AI42

B03H CONTROL B03H CONTROL

1G30

ARX0-

P24

VDDA-DAC

AK12

+1V2-PNX-TRI-PLL2

AI13

B04C YPBR / SIDE IO / S-VIDEO

ARX1ARX0+

9 10

L3 AI23

AV2-PB_SC2-B

AJ6

+3V3-PNX5100-LVDS-IN +1V2-PNX-TRI-PLL1

B08B PNX5100 - SDRAM

B08B DDR2

VDDA_3V3_AADC AI32

+1V2-PNX5100-DDR-PLL1

+3V3-PNX5100-LVDS-PLL

B03A VDD

+3V3 +1V2-PNX5100 +1V8-PNX5100

+1V2-PNX5100-LVDS-PLL

AE14 AD14

VREF

B03H CONTROL B03H CONTROL B03H

+VDISP-OUT

SUPPLY

REGIMBEAU_CVBS-SWITCH

CRX1CRX0+

9 10

CVBS1Y_P

TO DISPLAY 1080p 100/120Hz

9,10,11 7F01

Y-CVBS-MON-OUT

49 40

B15

50 I2C

E15 +5V

1G51 51

TX4

PNX8543

RF_AGC

QUAD LVDS 1920x1080 100/120HZ TX3

AB18 J5

EXT 1

+3V3

P22

7F07-7F08

7F03

DRX0-

E14

B08A

AK19

N.C. +3V3

9 10

1F01

39 40

E17

IF_AGC

1 2

8,18,26,53 VDDH 2,16,27,56 VDDL 37 VDDAH_AFE1 42 VDDAH_CVBS 52 VDDAH_OSC 36,46 VDDAL_AFE

CVBS

7345

AE17 AF17 AC17 AD17 AC16 AD16 AE16 AF16 AE15 AF15 AC15 AD15

3 2

DRX2DRX1+

1H00

19 18

3348

RX51002A+ RX51002ARX51002B+ RX51002BRX51002C+ RX5100CRX51002D+ RX51002DRX51002E+ RX51002ERX51002CLK+ RX51002CLK-

TO DISPLAY 1080p 50/60Hz 37

DRX2+

4 6 7

1 2

7F02 74HC4053PW 16 MDX

1H01

19 18

SIF

AP22 AN22 AL22 AK22 AP23 AN23 AP24 AN24 AM24 AL24 AM23 AL23

2 3

TX2

PNX5100

3M31

1 2

1 4 6 7

19 18

3311

RX51001A+ RX51001ARX51001B+ RX51001BRX51001C+ RX51001CRX51001D+ RX51001DRX51001E+ RX51001ERX51001CLK+ RX51001CLK-

TX1

B08D LVDS TX

B04B ANALOG IO - SCART 1&2

1H03

1 2

RF-AGC

19 18

3305

50 +5V-TUNER

1304 27M

+3V3A

4315

OUT

LOUT2_A_P LOUT2_A_N LOUT2_B_P LOUT2_B_N LOUT2_C_P LOUT2_C_N LOUT2_D_P LOUT2_D_N LOUT2_E_P LOUT2_E_N LOUT2_CLK_P LOUT2_CLK_N

B03E ANALOG VIDEO

VCC 1303

TNR_TSDI

PD_N

AGC AMPLIFIER

SAW 36M125

HDMI 3 CONNECTOR

FE-DATA(0-7)

PD_P

7302 UPC3221GV

+5V-TUNER

MAIN HYBRID TUNER

PDP

AP18 AN18 AL18 AK18 AP19 AN19 AP20 AN20 AM20 AL20 AM19 AL19

B08D LVDS AE20 RX AF20 AC20 AD20 AC19 AD19 AE19 AF19 AE18 AF18 AC18 AD18

I2C

IF-OUT2

5311

IF-OUT1

HDMI 2 CONNECTOR

CA_MDI

7303 DRX3926K

1301 HD1816AF/BHXP

HDMI 1 CONNECTOR

A_P A_N B_P B_N C_P C_N D_P D_N E_P E_N CLK_P CLK_N

PCMCIA-VCC-VPP

18 33 51 52

CONDITIONAL ACCESS

HDMI SIDE CONNECTOR

B03B LVDS

CA_MD0

CA-MDI(0-7)

B05A HDMI

7C00 PNX5100EH/M2

68P

PCMCIA

B07B DISPLAY INTERFACE 1G50 1

7600 PNX85433EH/M2A

+3V3

RXC+ RXCRX0+ RX0RX1+ RX1RX2+ RX23H64 RREF-PNX85XX

A14 HDMI_RXC_B_N A15 HDMI_RXC_B_P B13 HDMI_RX0_B_N B14 HDMI_RX0_B_P A12 HDMI_RX1_B_N A13 HDMI_RX1_B_P B11 HDMI_RX2_B_N B12 HDMI_RX2_B_P C16 HDMI_RREF

M_DQ

DDR2-D(0-15)

SDRAM J1 VDDL J2 VREF

+1V8-PNX85XX DDR2-VREF-DDR

7B00 EDE1116AEBG

M_A

DDR2-A(0-12)

(16-31)

SDRAM J1 VDDL J2 VREF

+1V8-PNX85XX DDR2-VREF-DDR 18560_403_090326.eps 090326

2009-Apr-03

Block Diagrams

Q548.1E LA

EN 64

Block Diagram Audio AUDIO B02A FRONT END

B05C PCMCIA

B03 PNX8543

7K04-7K05 74LVC245APW 20

1K00

B06A CLASS-D

7H00 PNX85439EH/M2

+3V3

B03B TUNER_CA MDO(0-7)

CA-MDO(0-7)

B03D AUDIO

CA_MD0

PCMCIA

VDDA_3V3_DAC CA-MDI(0-7)

AM9

5902 5900

AK9

7L10 TPA3123D2PWP

VDDA-AUDIO

PVCC_L

VDDA-DAC

CA_MDI

PVCC_R

ADAC1

ADAC(1)

AN14

IF-OUT2

2364 2367

4303

2365

33AA

5311

3306

4302

PDP

2368

33AC

+5V-TUN

PDN

ADAC2

ADAC(2)

AP13

PD_N

DEMODULATOR CVBS

VCC 1

1303

2306

3303

IF-N

2307

3304

IF-P

SAW 36M125

IN 4

OUT 49

AGC CONTROL 1304 27M

+3V3A

3305

IF-AGC 3

3305

50 +3V3A

3311

SIF

3348

8,18,26,53 VDDH 2,16,27,56 VDDL 37 VDDAH_AFE1 42 VDDAH_CVBS 52 VDDAH_OSC 36,46 VDDAL_AFE

AC5

3L17

AUDIO-MUTE

MUTE

CVBS

DRX2DRX1+

4 6 7

DRXC+

PO_6

AD1

B04C

7830 TPA6111A2DGN HEADPHONE AMPLIFIER

B03D AUDIO

B03C PNX8543 - AUDIO 3F00 3F02

AUDIO-CL-L AUDIO-CL-R

1 7

7803-1/2

3 5

ADAC(7) ADAC(8)

AL9

ADAC7

H264 USB 2.0

ADAC3

1 2 19 18

VO_2

HP_LOUT

HP_ROUT

IN-2

VDD

+3V3

HEADPHONE OUT 3.5mm

AL8 ADAC8

AUDIO-IN1-L

AN7 AIN_1_L

AUDIO-IN1-R

AP7

B03G PNX8543 - CONTROL MIPS/FLASH/PCI AIN_1_R

AP-SCART-OUT-L

AP-SCART-OUT-R

AUDIO-IN2-L

AK6

AUDIO-IN2-R

AL6

A-PLOP

B03C B03G CONROL

AIN_2_R

USB_FAULT

SCART2 1

BRX2+

BRX2BRX1+

USB_DM USB_DP

B04C YPBR / SIDE IO / S-VIDEO

BRXC+

BRXC-

1G25

BRX0-

DIGITAL AUDIO OUT

7G01 EF

2 4

ARX2+

ARX2ARX1+

4 6 7

AUDIO OUT L+R

ARX0-

12 HDMI 3 CONNECTOR RES FOR /32

8 7803-3/4 10

AUDIO-OUT-R

1G22

EXT 3

ARXC+

AUDIO IN L+R

SPDIF-OUT-1

AUDIO-OUT-L

14 7G00

ARX1ARX0+

9 10

USB_RPU USB_VBUS

BRX1BRX0+

9 10

+5V

AIN_2_L

A-PLOP

ADAC(5) ADAC(6)

V1 AN11 AP10

AL16

USB-OC

AN16

USB20-DM USB20-DP

AP16 AM17 3M21 AN17 3M23

CRX2+

DRX2+

CRX2CRX1+

71 69

89 87

DRX2DRX1+

CRX1CRX0+

68 RXC 66

86 RXD 84

DRX1DRX0+

CRX0-

DRX0-

CRXC+

DRXC+

DRXC-

HDMI SWITCH

CRXC-

BRX2+

BRX2BRX1+

41 39

BRX1BRX0+

39 RXB 36

BRXC-

ARX2+

ARX2ARX1+

22 20

ARX1ARX0+

19 RXA 17

ARX0-

ARXC+

ARXC-

8,45,91,24, 75,95 VDDx_1V8 4 VDDO_3V3 46,55 VDDx_3V3 15,21,34,40, 64,70,85,88 VDDH_3V3 2 C_+ 3 C_99 D0_+ 100 D0_96 D1_+ 97 D1_93 D2_+ 94 D2_-

AUDIO IN L+R

7M00 NAND01GW3B2BN6F

ADAC5

PCI

PCI-AD24<->NAND-AD

NAND FLASH 1G

ADAC6 +3V3-NAND

B03C

AUDIO-IN3-L

AM6

AUDIO-IN3-R

AN6

AIN_3_L AIN_3_R

B03F MEMORY

B03F PNX8543 - SDRAM

AUDIO-IN5-L

AN5

AUDIO-IN5-R

AP5

AIN_5_L

M_IREF M_VREF

AA31 3B03 AB32

+1V8-PNX85XX DDR2-VREF-CTRL 7B01 EDE1116AEBG

AIN_5_R

(0-12)

1G18 AUDIO IN DVI -> HDMI

+3V3-PER

B03G PCI

1G20

SIDE I/O

USB 2.0 CONNECTOR SIDE SW UPLOAD JPEG MP3

+3V3-PER

12,37 A-PLOP

2 3

SPDIF_OUT

ARXC-

7H11 TDA9996

1M09 1 1

3 2

CRXC-

7F00

1H02

1 2

ADAC(4)

CRXC+

EXT 2

CRX0-

4 6 7

19 18

IN-1

1 ADAC4

AM11

A-PLOP

CRX1CRX0+

9 10

1G21

SHUTDOWN VO_1

ADAC(3)

AM12

3M31

1 2

CRX2CRX1+

B04B

A-PLOP

AUDIO-RESET

1F02 CRX2+

BRX0-

SUBWOOFER (OPTIONAL)

SCART1

BRXC+

B04C YPBR / SIDE IO / S-VIDEO

PNX8543

1H00

HDMI 2 CONNECTOR

IF_AGC

DRXC-

4 6 7

19 18

AP-SCART-OUT-R

1H01

HDMI 1 CONNECTOR

MUTE

EXT 1

DRX0-

AP-SCART-OUT-L

SPEAKER R 1736 1

7807-2

7807-1

AMPLIFIER

1F01 3

7L03 STANDBY & PROTECTION

RF_AGC

DRX1DRX0+

9 10

19 18

RIGHT-SPEAKER

B03C PNX8543 - AUDIO AMPLIFIER

1 2

DRX2+

SPEAKER L

AI44

+3V3E +3V3D +1V2A

2 3

A-STBY

+3V3B +1V2 +3V3A

B04B ANALOG - SCART 1&2

5L09

5L10

7345 4314

1735 1

LEFT-SPEAKER

AI51

AUDIO-RESET

1H03

+AUDIO-POWER

IN-R

RF-AGC

PO_7

B03E ANALOG VIDEO 44 SIF

A-STBY

B03H STANDBY

TNR_TSDI

FE-DATA(0-7)

PD_P

7302 UPC3221GV

1 AGC AMPLIFIER

MAIN HYBRID TUNER

HDMI SIDE CONNECTOR

OUT-L

OUT-R

IF-OUT1

B05A HDMI

IN-L

5L07 10,12 5L08 1,3

CLASS D POWER AMPLIFIER

7303 DRX3926K

1301 HD1816AF/BHXP

AN8

PCMCIA-VCC-VPP

18 33 51 52

CONDITIONAL ACCESS

AADC

VREF_POS

68P

BUFFER

AUDIO-IN4-L

AP6

AUDIO-IN4-R

AM5

SDRAM

AIN_4_L M_DQ

J1 J2

DDR2-D(0-15)

AIN_4_R

+1V8-PNX85XX DDR2-VREF-DDR

1 7B00 EDE1116AEBG

M_A

VDD_1V8 VDDO_3V3

DDR2-A(0-12)

(16-31)

VDDS_3V3 B04H DIGITAL VIDEO IN

SDRAM

J1 J2

+1V8-PNX85XX DDR2-VREF-DDR

VDDH_3V3 HDMIB-RXC+ HDMIB-RXCHDMIB-RX0+ HDMIB-RX0HDMIB-RX1+ HDMIB-RX1HDMIB-RX2+ HDMIB-RX23H64 RREF-PNX85XX

A14 HDMI_RXC_B_N A15 HDMI_RXC_B_P B13 HDMI_RX0_B_N B14 HDMI_RX0_B_P A12 HDMI_RX1_B_N A13 HDMI_RX1_B_P B11 HDMI_RX2_B_N B12 HDMI_RX2_B_P C16 HDMI_RREF 18540_404_090311.eps 090326

2009-Apr-03

Block Diagrams

Q548.1E LA

EN 65

Block Diagram Control & Clock Signals CONTROL + CLOCK SIGNALS B02A FRONT END

B03 PNX8543 7303 DRX3926K-XK-A3 49

B03H

PCI-CLK-ETHERNET

RESET-ETHERNET

PCI-AD(0-31)

FE-CLK

9 10 5

FE-VALID FE-SOP

B10 TNR_MICLK C10 TNR_MIVAL B9 TNR_MISTRT

LOUT2_CLK_P

1K00 1

CA-MICLK

H32

CA-MDI(0-7) IRQ-PCI

OPTIONAL

B08 PNX5100 PCMCIA 7C00 PNX5100EH/M2 AF24

CA-MOCLK_VS2

RESET-PNX5100

PNX8543

RX51002CLK-

AE16

AM23

RX51002CLK+

AD16

AL19

RX51001CLK-

AD19

AM19

RX51001CLK+

AC19

7K03

D31 CA_DATA_DIR A31 CA_DATA_EN

B03F MEMORY

M_DQ CA-ADDEN

B31

DDR2-D(0-31)(0-15)

27M

J34 CA_RDY

IRQ-CA IRQ-PCI

PCI-AD(0-31)

M_CLK_P M_CLK_N

PCI-AD(0-31)

PCI-CLK-PNX5100

PCI-AD(0-31)

WP-NANDFLASH

XIO-ACK

A20

XIO-SEL-NAND

B20

PNX5100-DDR2-CLK_P

P25

PNX5100-DDR2-CLK_N

3 2

USB 2.0 CONNECTOR SIDE

2 3

1M09 1

IRQ-CA

L34

IRQ-PC1

USB-OC

AL16

USB20-DM USB20-DP

DDR2-CLK_P

AB33

DDR2-CLK_N

AP28

PCI-CLK-OUT

TRDY_CLK

A30

PCI-CLK-PNX8543

E10

TX3CLK-

E11

TX3CLK+

E12

TX4CLK-

E13

TX4CLK+

1G51

TO DISPLAY

SDRAM

3M30 PCI-CLK-PNX5100

B08C

XIO_SEL_0

GPIO_3

RESET_SYS

GPIO_2

USB_FAULT

AN16 USB_DM AP16 USB_DP

1M20 1

3 TO IR/LED PANEL AND KEYBOARD CONTROL B08C GPIO

LIGHT-SENSOR

AN2

4D00

AF2 P1_0

WC-EEPROM-PNX5100_SPI-DI

PNX8543-LCD-PWR-ON_SPI-DI

GPIO_4 L32 GPIO_5 L31

B02A B03H B04C B07B

1M04

RXD-MIPS

TXD-MIPS

UART SERVICE CONNECTOR

B03H PNX8543 - STANDBY-CONTROL / DEBUG

CADC_1

AJ2

UA_RX_0 PWM_1 UA_TX_1

AG1

RXD-UP

AH5

TXD-UP

1M01 3 1

FOR 2 FACTORY USE ONLY 4

7M81 LED1

AJ3 PWM_0 KEYBOARD

7 8

RC_uP

LED2 +3V3-STANDBY

PNX5100-BL-CTRL

B03H

4 5

GPIO_6

RESET-SYSTEM

AN28

STANDBY AD2 B03H P0_5

SDRAM

B23

TX2CLK+

XIO_ACK

DDR2-A(0-12) P26

E21

TO DISPLAY

B03G CONTROL

7C01 EDE5116AJBG 7C02 EDE5116AJBG

PNX5100-DDR2-D(0-31)

AB34

NAND-AD(0-7) <-- PCI-AD(24-31)

B08B PNX5100 - SDRAM

B08B DDR2

B03G PNX8543 - CONTROL MIPS/FLASH/PCI

PLL_OUT

NAND FLASH (1G)

TX2CLK-

DDR2-A(0-12)

PCI_AD

7M00 NAND01GW3B2BN6F

B03G

E20

B03G PCI

B03G PNX8543 - CONTROL MIPS/FLASH/PCI

B08C PCI_XIO

TX1CLK+

CA_ADD_EN M_A

E19

7B00 EDE1116AEBG 7B01 EDE1116AEBG

PCI-AD(0-14)

PCMCIA-A(0-14)

TX1CLK-

B03F PNX8543 - SDRAM

PCI-AD(24-31) 7K00 7K01

E18

CA_MDO

CA-DATADIR CA-DATAEN

PCMCIA-D(0-7)

B03H

AF13

PNX5100

A34 CA_VSN_0 H31 CA_MOCLK

CA-MDO(0-7)

MDO(0-7)

AE13 1CD0

PNX5100

MOCLKA

CONDITIONAL ACCESS

B08C CONTROL

CA_MICLK

CLK_P

AL23

CA_MDI 7K04-7K05

COMMON INTERFACE

LOUT2_CLK_N

CLK_N

B05C PCMCIA

1G50

B08B DDR2

RESET-SYSTEM

B03G

B07B DISPLAY INTERFACE

7C00 PNX5100EH/M2

B03B TUN_CA TNR_TSDI

FE-DATA(0-7)

DEMODULATOR

25M

MAC PHYTER II 10/100 Mb/S

ETHERNET CONNECTOR B03G

1N02

27M

1304

7N04 DP83816AVNGNOPB

1N00

B8D PNX5100 - LVDS IN/OUT

7600 PNX85433EH/M2A/

3M46

B05B ETHERNET

AN3

P1_7

AG2

SDM

2D08

SPI-PROG

2D07

SDM

CADC_0 P6_4 AK2

+5V

RES

SPI-PROG

B03H PNX8543 - STANDBY-CONTROL / DEBUG B01B

4D09

DETECT-12V

B01A

B04B

AV2-BLK_LCD-SDA

AH2

AV1-STATUS

AP2

AV2-STATUS

AP1

B04B

B01B

7D07 P2_4

P3_5

OUTP 1

RESET-STBY

AF3

XTAL_I

CADC_2 XTAL_O

RESET_IN

INP

1 2

4x HDMI CONNECTOR

TO PIN: 1H02-13 1H00-13 1H01-13 1H03-13

CEC-HDMI

7H11 TDA9996 CEC

ARX-DDC-CLK 1H02-15 BRX-DDC-CLK 1H00-15 CRX-DDC-CLK 1H01-15 DRX-DDC-CLK 1H03-15

AG4

P1_2 B05A HDMI_DV

HDMI SWITCH 12 31

AJ1 SPI_CLK AK4 P6_5 AK3 SPI_CSB AJ4 SPI_SDO AK1 SPI_SDI

HDMI_RX

SPI-CLK

SPI-WP

SPI-CSB SPI-SDO

1 5 2

SPI-SDI

AE4

ENABLE-3V3

AF1

P2_6 AE5

POWER-OK

AD1

AUDIO-RESET

AC5

AUDIO-MUTE

AD5

STANDBY

P1_1

P0_6

P2_3

512K FLASH

B01B DC / DC +3V3-STANDBY_+1V2-STANDBY

1M99 5

LAMP-ON-OUT

REGIMBEAU_CVBS-SWITCH

P0_7 RX

EEPROM (8Kx8)

7D09 M25P05-AVMN6P

P2_2 AE1

GND

7H09 CONTROL

CADC_3

P2_7

B05A HDMI

RESET-NVM

P0_1 AC1

P3_4

+3V3-STANDBY 7D05 NCP303LSN30G

19 18

BACKLIGHT-OUT

7D06 M24C64-WDW6P

P2_5

AH3 P3_3 AH1

B04B CONTROL

AD4

AV1-BLK

B04B

BACKLIGHT-IN

AD3

DETECT1 RESET-SYSTEM

B03G

3P24

DETECT2

27M

B07A DISPLAY INTERFACE (COMMON)

1D00

B07B DISPLAY INTERFACE

B01A B01B B04B

B07A N.C.

BACKLIGHT-OUT

BACKLIGHT-BOOST

TO POWER SUPPLY

9 B03C B06A

1M95 2

TO POWER SUPPLY

61 79 18560_405_090326.eps 090331

2009-Apr-03

Block Diagrams

Q548.1E LA

EN 66

Block Diagram I2C IÂ²C B05A

PNX8543 - CONTROL MIPS/FLASH/PCI

B08E

PNX5100 - CONTROL / PCI / DEBUG

PNX5100 - AMBILIGHT

ARX-DDC-CLK

7303 DRX3926K-XK

HDMI CONNECTOR 3

DEMODULATOR 61 MICRONAS 62

DDC-SCL

B03G B03G

BRX-DDC-DAT

BRX-DDC-CLK

PNX8543 - CONTROL MIPS/FLASH/PCI

7M00 NAND01GW3B2

3CD9

3CD8

3CDC

3CDD

ERR 27

1H00

+3V3 AMBILIGHT BUS 30 kHz

7CD0 M24C08

7C00 PNX5100EH

EEPROM

PNX5100

3CDA

3CD9

SDA-AMBI-3V3 SCL-AMBI-3V3

HDMI CONNECTOR 2

ERR 25

ERR 15

5CE5 1CE2 +3V3

B08B

MAIN TUNER

CRX-DDC-CLK

HDMI CONNECTOR 1

T1.0A PNX5100 - SDRAM 7C01 EDE5116AJBG

CRX-DDC-DAT

4 TO AMBILIGHT (OPTIONAL) 5

ERR 21

1301 HD1816AF

1H01

1M59 3

SCL-TUNER

CRX-5V

3H13

DDC-SDA

C15

3H01

D15 DDC_SDA_B

3H02

HDMI_DV

3H09

+5V

SDA-TUNER

3365

TUNER BUS 400 kHz

3388

ARX-DDC-DAT

SDRAM

B05A

+3V3B

1H02

BRX-5V

ERR 23

3316

11 12

HDMI MUX

3398

3399 24

3317

DDR2-A

M_A

7H11 TDA9996

7B00 EDE1116AEBG

DDR2-D

3365

7B01 EDE1116AEBG

MEMORY M_DQ

ARX-5V

3388

B03F

PNX8543 - SDRAM

3H07

B03F

3H10

ERR 13

SCL-SSB

3H14

PNX8543

DDC_SCL_B

B08C

FRONT END

SDA-SSB

3H08

3M18 3H65

3M19

SCL3

3H66

SDA3

D33

3M26

G32

3M27

SSB BUS 400 kHz

SDA 3 SCL 3

B02A

HDMI

+3V3-PER

7600 PNX85433EH/M2A

ERR 34

PNX5100-DDR2-D(0-31)

DRX-5V

7C02 EDE5116AJBG

PCI FLASH 1G

DRX-DDC-DAT

DRX-DDC-CLK

B01B

HDMI CONNECTOR SIDE

B04C

DC / DC +3V3-STANDBY_+1V2-STANDBY

YPBR / SIDE IO / S-VIDEO

+3V3-PER

3M90

SCL-SET 1

DATA-SDA CLK-SCL

F33

SDA1 SCL1

3M15 3M14

3M25

H33 SDA 1

SDA-UP-MIPS

VGA CONNECTOR 4202 4201

SCL-UP-MIPS

1M99 11 10

TO POWER SUPPLY

B03G

B03H

7G32

3G63

RES

WC-EEPROM-PNX5100_SPI-DI

PNX8543 - STANDBY - CONTROL / DEBUG

3G58

+3V3-PER STANDBY BUS 400 kHz

3G61

ERR 14

SCL 1

3G60

SCL2

D32

3M24

SCL 2

1G30 15

SDA-SET

3M91

SDA2

+5V

3M92

B33 SDA 2

3M93

SET BUS 100 kHz

SDRAM

1H03

3G56

3H11

PNX5100-DDR2-A(0-12) 3H12

PCI-AD

PCI_AD

7G31 M24C02 EEPROM 256x8

+3V3

AK5

3D46

SDA-UP-MIPS

AL5

3D45

SCL-UP-MIPS

MC_SDA MC_SCL

3D39

B03H

3D38

+3V3-STANDBY

B03G

PNX8543 - CONTROL MIPS/FLASH/PCI

RES

+3V3-PER STANDBY

512K FLASH

UA_TX_1

7D06 M24C64

+3V3-STANDBY

AG1

RXD-UP

AH5

TXD-UP

UA_RX_0

EEPROM (NVM)

7D09 M25P05

ERR 53

3D22

AC1 RESET-NVM

5 7D07

3D21

PO_1

3D56-1

3D56-2

3M74

1M01 3

3M73

1 2

+3V3-PER

B04A

FOR FACTORY USE ONLY

BOLT-ON

L32

RXD-MIPS

L31

TXD-MIPS

GPIO_4 GPIO_5

3M10

RES 3M09

B03G

4E18

RXD

3M76

4E19

TXD

3M75

1M04 3 2 1

UART SERVICE CONNECTOR 18560_406_090326.eps 090331

2009-Apr-03

Block Diagrams

Q548.1E LA

EN 67

Supply Lines Overview SUPPLY LINES OVERVIEW

BOOST A/P_DIM INV_OK MAIN POWER SUPPLY

5M00 +1V2 5304

BACKLIGHT-OUT

BACKLIGHT-BOOST

IN OUT COM

B07A CONTROL

N.C.

POWER-OK

B01b

B03H CONTROL

1M20 5

3V3A

5M88

5306

3V3D

5305

3V3E

7201

B07A

DISPLAY INTERFACING (COMMOM)

+3V3

+5V

B03H

PNX8543 - STANDBY-CONTROL/DEBUG

+5V

B01b

7307 +5V-TUNER

IN OUT COM

B01a 3389 ANTENNA-SUPPLY

B01b B01b

+12V RES

+1V2-PNX85XX

+1V2-PNX8541

+1V2-PNX5100

+3V3-STANDBY

B03a,g,h, B04a,B05a,

B03A

B03a

B03a B01b

PNX8543 - POWER

+12VD

B07B

+3V3-PER

+5V

RES

DISPLAY SUPPLY +3V3

B01a

+5V

+VDISP-IN

+VDISP-IN +VDISP-OUT

7P02

STANDBY GND1 GND1 GND1 +12V +12V +12V

STANDBY

5203

7202 VOLT. REG.

5204

6217

+5V

GND_SND

7222 VOLT. REG.

+1V2-PNX5100

+1V8-PNX85XX IN OUT COM

B02a, B03d,g,h, B04a,b,c, B05a,c, B07a B01b B02a

B01b

+3V3

+3V3-STANDBY

+5V

+12V

B08A

RES

B04B

PNX5100 - POWER

+1V2-PNX5100

ANALOG IO - SCART 1&2

+3V3

B01a

5612

+3V3-PER

B01a

5600

RREF-PNX85xx

B01b

5615

VDDA-LVDS

B03b,g,h

+AUDIO-POWER

VDDA-AUDIO

B03b

VDDA-AUDIO 5621

N.C.

+3V3

+5V

B05a

7P03 PNX8543-LCD-PWR-ON_SPI-DI

B03f,B05a

+3V3-STANDBY

B03h,B08a

BOLT-ON

B01b +3V3-STANDBY

B03c,B06a 10

B01b

7601

B01a,B02a, B04a

B03d N.C.

+3V3F

B01a

B04A

+3V3-STANDBY

B01b +3V3F

+12V

B01A

+1V2-STANDBY

B01b

5221

SENSE+1V2-PNX85XX +1V2-STANDBY

+5V5-TUN

+VSND

+1V2-PNX85XX

B01a

B03H CONTROL

B07b

+12VD

+3V3 B07a

+1V2-PNX85XX

+VDISP-IN

B01b

+3V3

B01a

+3V3-PER

+1V2-STANDBY IN OUT COM

TO IR/LED PANEL B01a

+5V5-TUN

B01b +3V3-STANDBY

+5V

5307

7315

1M95 1

+AUDIO-POWER

B01b

5M84

+12V

3V3_ST

+5V

8 9

+3V3-STANDBY

3V3B

+5V5-TUN

CN4 1

+AUDIO-POWER

B01b

7309

B03H CONTROL

+3V3-PER

+3V3-STANDBY

+5V

B01b

LAMP-ON-OUT

CLASS-D

+3V3-NAND

B03a B01b

+3V3-PER

+1V2A

+5V

B06A

+3V3

7308 IN OUT COM

B01a

4P39

DIM

B07a 2

+3V3

4P31

GND1 BL-ON_OFF

+3V3

PNX8543 - CONTROL MIPS/FLASH/PCI

+3V3

4P26

GND1

+12VD

B03G

FRONT END

4P28

+12V

B02A

1M99 1

4P29

+12V

CN5 1

DC / DC +3V3-STANDBY_+1V2-STANDBY

4P30

B01B

VDDA-DAC

5622

VDDA-ADC

B01a

B03d

B01b

B04C

YPBR / SIDE IO / S-VIDEO

+1V2-PNX5100 5C60

+1V2-PNX5100-CLOCK

5C61

+1V2-PNX5100-TRI-PLL1

5C62

+1V2-PNX5100-TRI-PLL2

5C63

+1V2-PNX5100-TRI-PLL3

5C64

+1V2-PNX5100-DDR-PLL1

5C65

+1V2-PNX5100-LVDS-PLL

+3V3

5C66

+1V2-PNX5100-DLL

+5V

CC60

SENSE+1V2-PNX5100

+3V3

B01b

+3V3

B01a

B05A B03B SENCE+1V2-PNX5100

PNX8543 - VIDEO STREAMS/LVDS OUTPUT

+3V3 B01a 5H01

VDDA-LVDS

B03a

VDDA-LVDS

+3V3-PER

B03a

HV1

HV2 N.C. HV2

+12V

TO DISPLAY

2 3

3108

12V/3V3 COVERSION

AUDIO-VDD

B03D

7102-1

+3V3F

12V/1V2 COVERSION

7102-2

+3V3

B03a,B08a B01a

HDMI SIDE CONNECTOR

5103

+1V2-PNX85XX

HDMI 1 CONNECTOR

PNX8543 - AUDIO

+3V3

+5V

B01b

HDMI 2 CONNECTOR

+3V3 B02a, B03a,c,d,g,h, B04b,c,B05a,b,c, B07a,b, B08a,c,d,e

+3V3

5101

5105 TO DISPLAY

HDMI 3 CONNECTOR

B03a

CN3 1

7801

7900

1H02 18

ARX-5V

1H00 18

BRX-5V

1H03 18

DRX-5V

1H01 18

VDDA-DAC

+1V8-PNX5100

CRX-5V

B08C B01a

B01a

PNX5100 - CONTROL / PCI / DEBUG

+3V3

PNX5100 - LVDS IN / OUT

+3V3

5N06

+3V3-ET-DIG

5N07

+3V3-ET-ANA

VDDA-DAC

B05C

PNX8543 - SDRAM B01a

B03a

PNX5100 - SDRAM

+1V8-PNX5100

B08E B03F

B08b

+3V3

B03a

IN OUT COM

+1V8-PNX5100

3C20 PNX5100-DDR2-VREF-CTRL

ETHERNET

15 B03a

+3V3F

3C22 PNX5100-DDR2-VREF-DDR

+3V3

B01a VDDA-AUDIO

B03a,h

B08B

RREF-PMX85XX

B08D B05B

+3V3-PNX5100-LVDS-PLL

IN OUT COM

B08a

RES

7802 CONTROL

5C70

7C60

VDD_1V8

4801 3819

+3V3-PNX5100-DDR-PLL0

+5V

RREF-PMX85XX

B03a

+3V3-PNX5100-CLOCK

5C69

+3V3-STANDBY

+5V

+AUDIO-POWER

+3V3-PNX5100-LVDS-IN

5C68

+3V3F

+1V8-PNX85XX

+3V3-STANDBY

B01b

+12VF

14 7101-1 Dual Synchronous Step-Down 1 Controller 7U01-2

VDDH_3V3 B01a

B01b +AUDIO-POWER

5104

CN2 1

PNX8543 - AUDIO AMPLIFIER

SENSE+1V2-PNX85XX

B03a

HV1 N.C.

VDDS_3V3

5H03

5H00

B03C SENSE+1V2-PNX85XX

5H06

+1V8-PNX85XX

DC / DC +3V3_+1V2

7103 NCP5422ADG

VDDO_3V3

+3V3-PER B03a

B01b

+3V3

SENCE+1V2-PNX5100

B08a

B01A

5C67

HDMI

+1V8-PNX85XX

+3V3

+1V8-PNX85XX 3B47 3B48

+3V3 5K00

+3V3_BUF

DDR2-VREF-CTRL DDR2-VREF-DDR

B01b

PNX5100 - AMBILIGHT

PCMCIA

+5V

+5V 3K00

B01a

+3V3

+3V3 1M59 6

TO AMBI-LIGHT (OPTIONAL)

PCMCIA-VCC-VPP

+T 18560_407_090326.eps 090401

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 68

10. Circuit Diagrams and PWB Layouts Interface Ambilight: Interface + Single DC-DC 2

INTERFACE + SINGLE DC-DC

2n2 I102

SCL

15K

220p 3102

2103

330R

30R

5101 RES

30R

5106

I104

GND_HS

100n

3K3 2107

3108

100K

+24V

3111

+24V

1735446-6

+12V

c001

VLED1

+16V

c002

VLED2

1 I

100p RES

F121 F122 F123 F124

2109

VIA

TIM_CAP

I106

1M90 1 2 3 4 5 6

1 VFB 2

GND

I105

33K 3107

1M0

3106

3104

+3V3

100n

2 2104

RES

3105

1735446-7

SDA CONTROL1 CONTROL2

20 21 22 23 24 25 26 27 28 29 30 31

12K

RES 3110 100R

100p RES

3109 100R

BOOT_IN

I108

+16V

2108

F116 F117 F118 F119 F120

17 16

VSW

3K3

F115

10 11 12 13

SWI_COL

I103

2102

SPI-LATCH2CONN SPI-LATCH2

SWI_EMIT

3103

47R

LVI_OUT

DRV_COL

100n

6 7 8 9

LPK_SENSE

100n 2106

5 I101

Î¦

2105

SPI-LATCH1 SPI-LATCH1CONN

SS24

502382-1470

1M59 1 2 3 4 5 6 7

30R

5103

5105

VCC 4 3101

VLED2

7100 NCP3163BMNR2G

9103(RES) 9104

+16V

100R

F114

9101 9102 (RES)

* *

0R1

RES

VLED1

2.0A T 63V

3100

BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

I109

6100

502382-1470

1101

F107

+3V3

F113 F125

10u

+16V

+12V

10n

SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH1CONN PWM-CLOCK-BUF

3112

F101 F102 F103 F104 F105 F106 F108 F109 F110 F111 F112

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

2101

1M84

220n

1M85

2100

* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

5102

T 3.0A 32V

30R

SPI-LATCH2CONN

5104

I100

1100 +24V

F126

5100 RES

+24VF 30R

F123 E2 F124 E2 F125 B3 F126 A2 I100 A6 I101 C6 I102 C6 I103 C6 I104 D9 I105 D5 I106 D7 I108 D6 I109 A8 c001 E2 c002 E2

1100 A6 1101 A7 1M59 C2 1M84 A2 1M85 A2 1M90 D2 2100 A6 2101 B5 2102 C6 2103 D6 2104 D5 2105 D9 2106 D9 2107 E9 2108 D3 2109 E3 3100 B5 3101 C5 3102 D6 3103 D9 3104 D6 3105 D5 3106 D5 3107 D5 3108 E9 3109 D2 3110 D3 3111 E8 3112 B6 5100 A8 5101 A8 5102 A7 5103 B8 5104 B8 5105 B8 5106 B8 5107 A6 5108 A6 6100 C8 7100 B7 9101 C3 9102 C3 9103 C3 9104 C3 F101 B3 F102 B3 F103 B3 F104 B3 F105 B3 F106 B3 F107 A7 F108 B3 F109 B3 F110 B3 F111 B3 F112 B3 F113 B3 F114 B5 F115 C2 F116 D2 F117 D2 F118 D2 F119 D2 F120 D2 F121 E2 F122 E2

30R 5108 RES

owner.

5107 RES

9 I

STUFFING DIVERSITIES FOR DC/DC INTERFACE AMBI 2K9 See the stuffing diversities table in the case of components marked with one star (*) DC/DC INTERFACE

1101

1M85

5103/5104

5105/5106

VLED1

VLED2 CHN

SETNAME

CLASS_NO

3104 328 58341 3104 328 58351

3104 328 58361 3104 328 58371

in out out out

out

24V

16V

in in out

12V

08-06-19

16V

08-08-06

12V

16V

08-10-23

DC-DC INTERFACE

MGr

08-06-19 08-08-06

08-09-18

08-10-23

NAME Peter Van Hove CT

3104 313 6325

AMBI 2K9

1 2

CHECK ********

SUPERS. DATE

08-06-06

** C

130

08-12-06 ***

ROYAL PHILIPS ELECTRONICS N.V. 2008

13 18310_600_090305.eps 090305

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 69

Interface Ambilight: Dual DC-DC

2200 A4 2201 A4 2202 A5 2203 A5 2204 B3 2205 B6 2206 B1 2207 B2 2208 B7 2209 B7 2210 B8 2211 C3 2212 C4 2213 C6 2214 C3 2215 C6 2216 C2 2217 C7 2218 D1 2219 D2 2220 D7 2221 D3 2222 D5 2223 D8 2224 D8 3200 A3 3201 A6 3202 B3 3203 B6 3204 B3 3205 B6 3206 D3 3207 D2 3208 D7 3209 D5 3210 D3 3211 D3 3212 D6 3213 D6 5200 B2 5201 B7 6200 B2 6201 B7 7200 B4 9201 B5 9202 C4 F200 B2 F201 C7 F202 D3 F203 B5 F204 B4 F207 C4 I200 A3 I201 A6 I204 B2 I205 B6 I206 B6 I208 B3 I209 B6 I210 C6 I211 C3 I212 C3

DUAL DC-DC +24VF

A 220n 2203

2202

100u 35V

RES

220n

2200

100u 35V 2201

A I200

3200

I201

RES

3201

VSW

D **

9202

1n0

2211

VIA2

I211 F207

E 2216 RES

I209

I210

GND_HS

C RES 2217

I212

F201 +12V

3K3

* 2220

* 33K

3213

3K3 1%

3212

D *

10u

2223

F202

10u

VLED1 2224

2222 RES

22n

47K 1%

10u

RES 3K3

3209

I213

I214 RES 2221

22n 3208

22n

33K

3211

I215

3210

3K9 1%

68K 1% 4u7

4u7

2219 RES

2218 RES

22n 3207

RES 3206

+16V

220u 25V

RES

22u

I216

+12V RES

2210

16 17 18 19 20 21 22 23 24 25 26

10u

22u

I206

6201

(VLED1)

* 2209

5201

2208

I205

4u7

GND 2212

2214

1n0

47n

SS24

ILIM2 SEQ BP

F203

13 12 6 8

10R

9 10 11

BOOT2 SW2 EN2 FB2

3205

I217

I208

Î¦

6R8

1n0

10R

3204

SS24

10u 6200

4u7

2206

100u 35V 2207

BOOT1 SW1 EN1 FB1

3203

2213

2 3 5 7

I204

+16V

PVDD2

1n0

F204

47n

6R8

PVDD1

2205

2215

7200 TPS54283PWP

2204

9201

**5200

F200

6R8

6R8 3202

(VLED2)

owner.

7200 : TPS54383 in case of 16V or dual dc-dc converter

The components marked with one star (*) belong to the 12V versions (3104 328 58351, 3104 328 58371).

The components marked with two stars (**) belong to the 16V versions (3104 328 58331, 3104 328 58341, 3104 328 58361, 3104 328 58371).

I213 D5 I214 D4 I215 D3 I216 B5 I217 B4

I CHN

SETNAME

CLASS_NO

DC-DC INTERFACE J

08-06-19

08-08-06

08-10-23

NAME Peter Van Hove CHECK

3104 313 6325

AMBI 2K9 SUPERS. DATE

3 08-06-09

130 C

08-06-19

08-08-06

08-09-18

08-10-23

08-12-06

ROYAL PHILIPS ELECTRONICS N.V. 2008

13 18310_601_090305.eps 090305

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 70

Interface Ambilight: Microcontrollerblock 1

MICROCONTROLLER BLOCK

3310

RES

7301 LD2985BM18R

7 6 4

RES 10K

10n 3314

3313

2304

F302

+3V3

F303 2305

RST GND CD

1K5 1%

2307

10K 6 10K 7 10K 5 10K

8 10K 8 10K 5 10K

7 10K 5 10K 7 10K

3 3300-3 2 3304-2 4 3304-4

2 3302-2 4 3302-4 2 3303-2 RES 10K 1 3301-1 1 3304-1 4 3301-4 3324 8 10K

5 10K 6 10K 8 10K

1 3302-1

4 3300-4 3 3304-3 1 3305-1

10K 3327

10K

I305

3329

3 3301-3 3 3302-3 1 3303-1 3 3303-3 3326

I310 2 7 3300-2 10K 10K 6 10K 6 10K 8 10K 6 10K 3325 RES 10K

100p

2309

I316 I319

I321

2 1 4 1

7 8 5 8

4 2 4 2

5 7 5 7

3308-1 1 3309-4 5 3309-1 8 I320

I300 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R

CONTROL1 PWM-CLOCK-BUF SPI-CLOCK-BUF SPI-DATA-RETURN SPI-DATA-OUT SPI-LATCH1 SPI-LATCH2 PWM-CLOCK-BUF TEMP-SENSOR EEPROM-CS BLANK-BUF PROG

F320

8 100R 4 1 100R 100R

TEMP-SENSOR

CONTROL2 I302

SCL SDA

I307

UD-MD I322

F309 F310

F311 F312 F313

3334 22R 3335

100p

10K

owner.

100n

3 I308

2318

9305 RES

F317

3333

1K0

3339

I315

I318

I317

100p 2316

F 7303 NCP303LSN10T1

I313 I314

100p 2315

F308

3306-3 RES 3330 3331 3306-2 3306-1 3306-4 3307-1 3338 3307-4 3307-2 3308-4 3308-2

I311 I312

100p 2314 RES

+3V3

F307

I306

100p 2313

+3V3

13 14 18 21 22 23 24 28 29 30 35 36 37 41 44 45 46 47 48 1 2 3 32 33 34 38 39 8 9 10 15 16

100n 2312

RES 9302 RES 9303

10K RES 9301

VSSA

MICROCTRL

100p 2311

+3V3

3318 10K RES

2310

3332

Î¦

P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2 P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1 P0.5|MISO0|MAT0.1 RTXC1 P0.6|MOSI0|CAP0.2 RTXC2 P0.7|SSEL0|MAT2.0 RTCK P0.8|TXD1|MAT2.1 P0.9|RXD1|MAT2.2 P0.10|RTS1|CAP1.0|AD0.3 VBAT P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5 P0.13|DTR1|MAT1.1 DBGSEL P0.14|DCD1|SCK1|EINT1 P0.15|RI1|EINT2 P0.16|EINT0|MAT0.2 RST P0.17|CAP1.2|SCL1 P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0 P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7 P0.27|TRST|CAP2.0 P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2 P0.30|TDI|MAT3.3 P0.31|TDO VDD_1V8 VDD_3V3 VDDA X2

100p

2308 20 25

RES 9300

VSS X1

17 40

1300

16M9

7 19 43

7302 LPC2103FBD48

3301-2 2 3328

3322

7 10K

F306

I304

1 2

B3B-PH-SM4-TBT(LF)

RES

1K8 1% RES

3319

10K

F305 4

100R

1 2 3

47K

F304

100R 3323

10K 3320

3321 RES 1302

10n 3316

2306 3

+3V3 +3V3

10n RES 3315

1K5 1% RES

3317

7300-1 LM393PT

F316 +3V3

100n

C300

4 3305-4 2

5 10K 7

3305-2

10K

3 3305-3

6 10K

+3V3

F314

F315

10K

10K 3336

1 2

100p 3337

100n

2324

100n

100n 2323

100n 2322

3 4

+1V8

RES 1301 SKHUBHE010

9307 +3V3

100n

2320

100R

2319

I309

2321

is prohibited without the written consent of the copyright

1K5

3312

3311

+3V3

7300-2 LM393PT

F301

10n

100K RES

COM

-T 10K

1K5

I303 4u7

INH

+3V3

+3V3 +1V8

100n

1u0

2300

OUT

2303

2302

+3V3

F300

2301

9303 F3 9305 G1 9307 H4 C300 B8 F300 A5 F301 A8 F302 A10 F303 B11 F304 C4 F305 C4 F306 D4 F307 F3 F308 F3 F309 G6 F310 G6 F311 G8 F312 G8 F313 G8 F314 G5 F315 H4 F316 C9 F317 F1 F320 E9 I300 E9 I302 F9 I303 A4 I304 C10 I305 E6 I306 E7 I307 G6 I308 G2 I309 G5 I310 D5 I311 E7 I312 E7 I313 E7 I314 F7 I315 F7 I316 F8 I317 F6 I318 F7 I319 F5 I320 F8 I321 F6 I322 G5

1300 E2 1301 H5 1302 C4 2300 A3 2301 A4 2302 A5 2303 A4 2304 B8 2305 B10 2306 B9 2307 B10 2308 D4 2309 D5 2310 F6 2311 F7 2312 F7 2313 F7 2314 F7 2315 F7 2316 F8 2318 G2 2319 G6 2320 H5 2321 H4 2322 H4 2323 H4 2324 H4 3300-2 D5 3300-3 D7 3300-4 D7 3301-1 D6 3301-2 E5 3301-3 E6 3301-4 D7 3302-1 D7 3302-2 D6 3302-3 E6 3302-4 D6 3303-1 E6 3303-2 D6 3303-3 E6 3304-1 D6 3304-2 D7 3304-3 D7 3304-4 D7 3305-1 E7 3305-2 G8 3305-3 G9 3305-4 G8 3306-1 E8 3306-2 E8 3306-3 E8 3306-4 E8 3307-1 E8 3307-2 F8 3307-4 F8 3308-1 F8 3308-2 F8 3308-4 F8 3309-1 F8 3309-4 F8 3310 A10 3311 A8 3312 A10 3313 B8 3314 B8 3315 B10 3316 B10 3317 B8 3318 C10 3319 C8 3320 C5 3321 C5 3322 D5 3323 D5 3324 D7 3325 D6 3326 D6 3327 D6 3328 E5 3329 E5 3330 E8 3331 E8 3332 E3 3333 F2 3334 G5 3335 G5 3336 G6 3337 G6 3338 E8 3339 F1 7300-1 B9 7300-2 A10 7301 A4 7302 E3 7303 F2 9300 E3 9301 F3 9302 F3

O CHN

SETNAME

CLASS_NO

DC-DC INTERFACE P

08-06-19

08-08-06

08-10-23

AMBI 2K9

NAME Peter Van Hove CHECK

3104 313 6325

SUPERS. DATE

3 08-06-09

130 C

08-06-19

08-08-06

08-09-18

08-10-23

08-12-06

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18310_602_090305.eps 090305

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 71

1M59

Layout DC/DC Interface Ambilight

Personal Notes:

1302 5201

1M85

2208 2209

3338

2219

2300

5200

3331 2310

2322

9102 3307 9101

2316

3308 2323

2311

3306

3309

2206

2315

7301 2303

2321

2319

3324

3326 2312

2223

6200

2301

2302

1301

9201

9104 9103

2224

1101

2218

9202

5102

1100

1M90

2200

2210

7200

2202 2201

2203

2220

6201

1M84

2207

F115

2108

F108

F102 F103

F106

F109

c001

I302

F113

F101

F119

F116

F105 F111

I300

F110

F126

F112

F304

2212

2306

3317 3319

F207

3209 I104

I216 I212

3103

I102

3206

2204

2221 I214

F204

I204

F123 F107

5107

I200

5108

I211 I208

5100

7100 I108

I215

3204 3200 3202

3211

2214 2211

3310 3318

2305

3315 F104

3210

F314

I304

F316

2102 3104

2104 3108

F303

7300

I103

2106 2105

2216

2100

F301

2304 3314 3311

I309

3105 3106 3107

2107

F302

3316

2307 3312

F125

C300

3313

I316

F200 I105

I109

5101

2109

F114

F315

6100

3207 F317

3112 2101

I100 I101

3301 2324 9307

3208

F308

3303

I319

I201

2205

3212

I106

F320

I307

2313 3325 3329 3327 3328 2320 3335

3205 F203

3213

I308

F120

2217 3333

F309 F300 I320

I322

I318

7303

3111

I315

I314

I321

2222

I217

I303

3337 3336

9301

I209

I213

F201

I206

1300

2318

3102 2103

F311

F305

I313 I310

7302

I205

3201 3203

2308 2309

F313

F310

2314

5104 2215 2213

F202

F312

I317

3302

F118

I210

3322 3323

3334

3305 I306

3304

5105

3320

3321

3330

F306

I311

I312

F117

3110

5103

c002

3300 I305

5106

3339 9305

9302 3332 9300

9303

3109

F122

F307

3101

3100

F124

F121

10000_012_090121.eps 090121

31043136325.5

18310_550_090309.eps 090309

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 72

6 LED Low-Pow: Microcontroller Block Liteon 1

MICROCONTROLLER BLOCK LITEON B 3134 +3V3

7101 LD2985BM18R

RES

10n 3137

10K

2105

3111

10n 3139

1K5 1%

100n

5 10K

10K 6 10K 7 10K 5 10K

8 10K 8

7 10K 5 10K 7 10K

BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

4 3102-4 3103-1

3 3102-3

3101-3 3

3102-2

5 10K 6 10K 8 10K 4 3101-4

3112 8 10K 1

10K 3115

3 3106-3

3114

1 3106-1

3105-1

3102-1 1

RES 10K 3104-1 1

3106-2 2

4 3 3105-3

3104-3 3

3104-2 2 3116 10K

1 2 3 1

8 7 6 8

2 4 2 4

7 5 7 5

3126-1

3127-1 3127-4

1 4

8 5

I124 100R 100R 100R 100R 100R 100R I125 100R 100R 100R 100R 100R 100R I126 100R

CONTROL-1 PWM-CLOCK-BUF SPI-CLOCK-BUF SPI-DATA-RETURN SPI-DATA-IN SPI-LATCH SPI-LATCH-2 TEMP-SENSOR EEPROM-CS BLANK-BUF PROG

TEMP-SENSOR

CONTROL-2 SCL SDA

100R 100R

100p

100p 2131

100p 2126

100p 2124 RES

100p 2123

100p 2122 RES

100p 2117

100p 2116

UD-MD I111 I110

I113 I114 I115

3130

3131

F112

9106 RES

100n

2112

9119

10K 7

3103-2

22R

3103-4

100R

VLED1

3105-4

7 10K 100p

2110

100p

3117

7 19 43 5

+3V3

100p 2115

10K

100n

3104-4 4

10K 9121 RES

SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF

RST GND

3103-3 3

6 10K

10K

+3V3

VLED2 +3V3 15 16

F103

+1V8 100n

2113

100n

100n 2121

H 2119

3120

10K

3119

1u0

2130

7110 NCP303LSN10T1

100n 2120

F104

+3V3

F102

2114 RES

+3V3

VLED1

2111

10K RES

10K

RES 9103 9104 RES

10K 3132

BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

1M2A

10K RES 9102

+3V3

F109

1 2 3 4 5 6 7 8 9 10 11 12 13 14

3141

3124-4 3128 3129 3124-1 3124-2 3124-3 3125-1 3142 3125-2 3125-4 3126-2 3126-4

100p 3133

+3V3

13 14 18 21 22 23 24 28 29 30 35 36 37 41 44 45 46 47 48 1 2 3 32 33 34 38 39 8 9 10 15 16

2118 RES

3118

2109 9101

SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF

owner.

1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11 2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6 2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10 3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10 3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7 3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4 3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11 3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12 3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11 7101 A7 7102 E6 7110 F4 7116-1 B11

7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11

N 1X03 REF EMC HOLE

O SETNAME

CHN 1

is prohibited without the written consent of the copyright

F133 F135 F136 F139 F137

VSSA

P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2 P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1 P0.5|MISO0|MAT0.1 RTXC1 P0.6|MOSI0|CAP0.2 RTXC2 P0.7|SSEL0|MAT2.0 P0.8|TXD1|MAT2.1 RTCK P0.9|RXD1|MAT2.2 P0.10|RTS1|CAP1.0|AD0.3 VBAT P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5 P0.13|DTR1|MAT1.1 DBGSEL P0.14|DCD1|SCK1|EINT1 P0.15|RI1|EINT2 P0.16|EINT0|MAT0.2 RST P0.17|CAP1.2|SCL1 P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0 P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7 P0.27|TRST|CAP2.0 P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2 P0.30|TDI|MAT3.3 P0.31|TDO VDD_1V8 VDD_3V3 VDDA

MICROCTRL

20 25

1M84

Î¦

VSS X1

17 40

16M9

1101

OUT

2 7 3101-2 10K 10K 6 10K 6 10K 8 10K 6 10K 3113 RES 10K

100R

15 16

3105-2 2

F108

15 16

3123

10K

F105

VLED2

F107

VLED1

VLED2

RES

3140 EEPROM-CS TEMP-SENSOR PROG

10K 3107

3108

+3V3

47K

+3V3 +3V3

10n RES 3138

1K8 1% RES

+3V3

SDA CONTROL-1 CONTROL-2

F138 F134

7116-1 LM393PT

F118

SCL

2108

+3V3

1.5A T

7102 LPC2103FBD48

F117

2107

VLED1-F

1K5 1% RES

VLED1

1 2 3 4 5 6 7 8 9 10 11 12 13 14

7 6

+3V3

C140

33p

2125

9112 9114

10u 35V

15 16

1105

3136

5 F106

2106 VLED2

3109

F116

VLED1

100R 3110

1 2 3 4 5 6 7 8 9 10 11 12 13 14

7116-2 LM393PT

1K5

+1V8

1M1A

100K RES

BLANK EEPROM-CS TEMP-SENSOR PROG

3135

COM

+3V3

4u7

INH

100n

2102

SPI-LATCH PWM-CLOCK

OUT

10n

9109 9110

2104

CONTROL-1 CONTROL-2

+3V3 1u0

SPI-CLOCK SDA

2101

9107 9108

-T 10K

9113 RES

SCL SPI-DATA-RETURN

+3V3

1u0 2128

SCL SPI-DATA-IN SDA CONTROL-1 CONTROL-2

9111 RES

10u 35V 2129

F120 F121 F122 F123 F124 F125 F126 F127 F128 F129 F130 F131 F132

2127

1 2 3 4 5 6 7 8 9 10 11 12 13 14

F101

1K5

IN 1M83

2103

CLASS_NO

DRIVER 6LED LITEON P

2008-08-08

2008-10-27

2K9

NAME Peter Van Hove CHECK

8204 000 8857

2008-06-10

2008-08-08

2008-10-27

SUPERS. DATE

3 2008-06-02

130 C

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18310_610_090305.eps 090305

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 73

6 LED Low-Pow: Microcontroller Block Liteon 1

MICROCONTROLLER BLOCK LITEON INPUT BUFFER

A B

+3V3

100p

2217

100R

EN 7

33p

2201

100n

10K

1 RES

1K0 9209

7214

F202

10K

3203

6 1

(64K)

7201-4 74HCT125PW

C S

3204

HOLD

+3V3

+3V3 10K

W M95010-WDW6 4

+3V3

13 RES

1K0

3220

3209

GND

27R

100p

33p

8 VCC

33p

+3V3

3219

3207

7212 PDTC144EU

+3V3

2209

7201-1 74HCT125PW 2

2202

7209 PDTC144EU

3210

2214

+3V3

10K

3213

2218

+3V3

9212 RES

E 3223 100p

100R

2219

F207 +3V3 9213

9214 RES +3V3 7201-3 74HCT125PW 14

8 10

F208

3212 100R

100p

2220 RES

3121

100R

19 2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7 2217 B12 2218 C12 2219 D12 2220 E9 3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3 3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8 3223 C11 3224 H11 6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7 9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10 F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9

F I 2216

2215

1u0

100n

3216

4 5 24

H 100R

3214

+3V3 10K

IREF XLAT SCLK SIN SOUT

XHALF 1

XERR VIA

F209

+3V3

H L

6216

33p

2211

GND GND_HS

K +3V3

3K3

F212 F213

3221

3215 1K2

MODE

3K3

F204

3224

100R

3222

3217

F211

470R

BLANK

7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

F210

SML-310

0 1 2 3 4 5 6 7 OUT 8 9 10 11 12 13 14 15

GSCLK

30 31 32 33

VCC

LED DRIVER PWM CONTROL

7215 TLC5946PWP

owner.

is prohibited without the written consent of the copyright

+3V3

O 1

DRIVER 6LED LITEON P

2008-08-08

2008-10-27

NAME

P A2

SUPERS. CHECK

8204 000 8857

2K9

DATE

20 18310_611_090305.eps 090305

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 74

6 LED Low-Pow: LED Liteon 4

LED LITEON B

A VLED1-F

VLED2

GREEN

RED

BLUE

GREEN

RED

BLUE

RED

9305-4

RED

BLUE

9305-1

BLUE

9305-2

8 9313-1 1

9312-4

9312-3

B 3

9318-1

RED

9318-4

BLUE

GND_HS

5 GREEN

9310-1 1

7004 LTW-E500T-PH1 4

9310-4

9310-2 3

GREEN

GND_HS

GREEN

GND_HS

7003

GND_HS

7002 LTW-E500T-PH1

7001 LTW-E500T-PH1 3

3 9303-3

GREEN

2 9315-2

4 9303-4

RED

4 9315-4

BLUE

GND_HS

7000 LTW-E500T-PH1

9301

9309-2

VLED2

VLED1-F

F 9320-1 8

9320-4 5

9320-2 7

3335

9319-1

390R 3345

390R 3342

3346 560R

3339

390R

1K5

9306-1

560R

9306-4

1K5 3344

3341

3340

3336

9304-2

3354 560R 3357

3311

390R 3348

1K5 3312

560R 3358

390R

1K5

560R

390R

3349

3353

560R

1K5

3360

560R 3315 3384

VLED1-F

3334

F308

3303

1K0

Place jumper 9325, 9326, 9327

7315 BC847BW

F348

8 9311-1

F329

VLED1-F

10K

3306

10K

9326

F328

F303

1K5

if VLED < 17V

10K

3304

Place jumper 9314, 9316, 9317

10K

3325

560R

1K5 3323

F302

3326

3366

1K5 3321

9311-4

1K5

3320

1K5 3322

if VLED < 17V

3363

560R

1K5 3391

560R 3364

1K5 3390

1K5

F326

1K5 3389

owner.

3308

F330

10K

1K0

9327

7316 BC847BW

3309

is prohibited without the written consent of the copyright

1K5 3388

10K

3387

560R

7317 BC847BW

10K

3301

560R

1K5 3317 F325

10K

3331

F307

9311-3

1K5

3370

3362

560R

1K5 3316

3369

1K5 3385

3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12 3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12 3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2 3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12 3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13 3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1 3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1 7000 C2 7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1 9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5 9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8

9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13

13 O

O CHN

SETNAME

CLASS_NO

DRIVER 6LED LITEON P

2008-08-08

2008-10-27

2K9

NAME Peter Van Hove CHECK

8204 000 8857

2008-06-10

2008-08-08

2008-10-27

P 3

SUPERS. DATE

2008-06-02

130 C

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18310_612_090305.eps 090305

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 75

F108

3335 3345 3348 3351

3317 3316 3315 3313 3312 3311 3310 3314 3320 3319 3318 3323 3322 3321

7005

3309 3308 3307

9311

9304

9303

9319

9327

7316

3303 3302 3301

7317

9325

9326

7315

3306 3305 3304

7004

2127

3111

2105 3137 3140 3135

7116

3123

9312

9320

9310

3113

F130 F107

F215

9318

7212 7210

7209

3134 3141

9315

F120

F132

F105

F123

F127

F349 F214

1M2A

F139 F209

F213

F104 F109

I124 F137

1M1A

F126

F212

F101

I126

F344

F106

F345

F116

F347

7214

2118

2115 3112

3105

F135 F346 F348

2214

3203 3205 3125

C140

2107

3213

3204

7102

9104 9103 3118 9101 2114

3101

2131

2124 2121

3104

2113

2123

3126

3138 3136 2106 3139 2108

2209

3210

3130 2120

7110

7003

I115

3124

3131 2112 3116 9119

1M84 2111

2117 2116 3115 2126

I111

9106

2119

3127

2122

3106

I114

3142

7002

1101

I113

9313 3120 3119 9121 3117 3114

I110

3103

3364 3365 3366 3367 3363 3368 3354 3357 3358 3359 3360 3361 3362

2110 2109 3109 3108 3110 3107 9102

2102

2103

3132 3133

2104

7101 3331 9309

3332 9317

9308 9307

9305

3330 3333 3327

7306

9306

3326 3328 3325

2210

7305

3211

2219

3217 9314

1105

7001

2216 3214 2215 3215

3223

9213

3207 2217 9209

9316

3222

7307 3334

7215

3221 3224

2101

3218

2220 2201

7201

9208 3219

2203 9212

3128 3129

3102

2125

2211 3216

6216

9113

2129 2128

9114

2130

9110

3121

9108

3385 3389 3384 3390 3356 3391 3350 3386 3347 3387 3344 3388 3341 3353 9301

3338 3374 3340 3369 3343 3373 3346 3372 3349 3371 3352 3370 3355 3337 3336

2218 3220 3212 9211 3209 9210 9214

7000

3342 3339

9302 9107 2202

1M83

9109 9112 9111

Layout 6 LED Low-Pow

F122

F128

F326

F134

F328

F202 F133

F329

F325

F327

F118

F203 F136

I125 F103

F112

F210 F305

F102

F206 F340 F208 F205

F307 F304

F204 F302

F124

F138 F207

F211 F303

F117

F121

F343

F125 F342

F341

F330

F308

F129

F131

18310_551_090309 090309

3104 313 6313.3

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 76

8 LED Low-Pow: Microcontroller Block Liteon 1

MICROCONTROLLER BLOCK LITEON B 3134 +3V3

7101 LD2985BM18R

8 4

10n 3139

1K5 1%

100n

2108

5 10K

10K 6 10K 7 10K 5 10K

8 10K 8

7 10K 5 10K 7 10K

RST GND CD

BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

4 3102-4

3101-3 3

3103-1

3 3102-3

3102-2

5 10K 6 10K 8 10K 4 3101-4

3112 8 10K 1

10K 3115

3 3106-3

3114

3105-1

3102-1 1

RES 10K 3104-1 1

3106-2 2

4 3 3105-3

3106-1

3104-3 3

3104-2 2 3116 10K

1 2 3 1

8 7 6 8

2 4 2 4

7 5 7 5

3126-1

3127-1 3127-4

1 4

8 5

I124 100R 100R 100R 100R 100R 100R I125 100R 100R 100R 100R 100R 100R I126 100R

CONTROL-1 PWM-CLOCK-BUF SPI-CLOCK-BUF SPI-DATA-RETURN SPI-DATA-IN SPI-LATCH SPI-LATCH-2 TEMP-SENSOR EEPROM-CS BLANK-BUF PROG

TEMP-SENSOR

CONTROL-2 SCL SDA

100R 100R

100p

100p 2131

100p 2126

100p 2124 RES

100p 2123

100p 2122 RES

100p 2117

100p 2116

100p 2115

UD-MD I111 I110

I113 I114 I115

3130

3103-4

3131

9106 RES

100n

2112

9119

10K 7

2 F112

5 4

3103-2

22R

100R

VLED1

3105-4

7 10K 100p

2110

100p

3117

7 19 43 5

+3V3

2114 RES

10K

100n

2111

SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF

3104-4 4

10K 9121 RES

3120

10K

3119

1u0

2130

7110 NCP303LSN10T1

3103-3 3

6 10K

10K

+3V3

VLED2 +3V3 15 16

F103

+1V8 100n

2113

100n

100n 2121

H 2119

F104

+3V3

F102

100n 2120

10K RES

10K

+3V3

VLED1

1M2A

10K RES 9102 RES 9103 9104 RES

10K 3132

BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

100p 3133

+3V3

F109

3141

1 2

3124-4 3128 3129 3124-1 3124-2 3124-3 3125-1 3142 3125-2 3125-4 3126-2 3126-4

2118 RES

3118

2109 9101

SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF

owner.

13 N

N 1X03 REF EMC HOLE

O SETNAME

CHN 1

is prohibited without the written consent of the copyright

F133 F135 F136 F139 F137

13 14 18 21 22 23 24 28 29 30 35 36 37 41 44 45 46 47 48 1 2 3 32 33 34 38 39 8 9 10 15 16

20 25

1M84

VSSA

P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2 P0.2|SCL0|CAP0.0 X2 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1 P0.5|MISO0|MAT0.1 RTXC1 P0.6|MOSI0|CAP0.2 RTXC2 P0.7|SSEL0|MAT2.0 P0.8|TXD1|MAT2.1 RTCK P0.9|RXD1|MAT2.2 P0.10|RTS1|CAP1.0|AD0.3 VBAT P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5 P0.13|DTR1|MAT1.1 DBGSEL P0.14|DCD1|SCK1|EINT1 P0.15|RI1|EINT2 P0.16|EINT0|MAT0.2 RST P0.17|CAP1.2|SCL1 P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0 P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7 P0.27|TRST|CAP2.0 P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2 P0.30|TDI|MAT3.3 P0.31|TDO VDD_1V8 VDD_3V3 VDDA

MICROCTRL

17 40

16M9

1101

Î¦

VSS X1

2 7 3101-2 10K 10K 6 10K 6 10K 8 10K 6 10K 3113 RES 10K

100R

15 16

3105-2 2

F108

OUT

1 2 3 4 5 6 7 8 9 10 11 12 13 14

RES

1K8 1% RES

10K

F105

VLED2

15 16

47K

F107

VLED1

10n RES 3138

1K5 1% RES

3140 EEPROM-CS TEMP-SENSOR PROG

10K 3107

3108

+3V3

VLED2

+3V3 3123

+3V3

SDA CONTROL-1 CONTROL-2

F138 F134

7116-1 LM393PT

F118

SCL

3136

10K

+3V3

1.5A T

7102 LPC2103FBD48

F117

2107

VLED1-F

1 2 3 4 5 6 7 8 9 10 11 12 13 14

RES

2105

10n 3137

3111 1105 VLED1

+3V3

C140

33p

2125

9112 9114

10u 35V

15 16

3109

5 F106

2106

100R 3110

1 2 3 4 5 6 7 8 9 10 11 12 13 14

7116-2 LM393PT

F116

1M1A

100K RES

1K5

+1V8

BLANK EEPROM-CS TEMP-SENSOR PROG

3135

COM

+3V3

4u7

INH

100n

OUT

2102

SPI-LATCH PWM-CLOCK

10n

9109 9110

+3V3

F101

2104

CONTROL-1 CONTROL-2

1 1u0

SPI-CLOCK SDA

2101

9107 9108

-T 10K

9113 RES

SCL SPI-DATA-RETURN

VLED1 VLED2 10u 35V 2129

+3V3

2127

SCL SPI-DATA-IN SDA CONTROL-1 CONTROL-2

9111 RES

1u0 2128

1 2 3 4 5 6 7 8 9 10 11 12 13 14

F120 F121 F122 F123 F124 F125 F126 F127 F128 F129 F130 F131 F132

1K5

IN 1M83

2103

CLASS_NO

DRIVER 6LED LITEON P

2008-08-08

8204 000 8857

2K9

2008-06-10

2008-08-08

3 NAME Peter Van Hove CHECK

SUPERS. DATE

3 2008-06-02

130 C

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18560_500_090403.eps 090403

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 77

8 LED Low-Pow: Microcontroller Block Liteon 1

MICROCONTROLLER BLOCK LITEON INPUT BUFFER

A +3V3

+3V3

SPI-CS

100p

2217

9210 RES

SPI-DATA-RETURN

(64K)

7201-4 74HCT125PW

+3V3

SPI-CLOCK

+3V3 10K

W M95010-WDW6

3209

+3V3

F206

3220

11 13

RES

1K0

27R

SPI-CLOCK-BUF 100p

3204

HOLD

2218

10K RES

3205

GND

7 9209

9211

9212 RES

SPI-CLOCK-BUF

BLANK

F207 RES

1K0

3223

6 4

100R

EN 7

33p

2203

3211 +3V3

+3V3 14

7201-2 74HCT125PW 5

BLANK-BUF 100p

1 3

EEPROM-CS-LOCAL

PWM-CLOCK-BUF

10K

3203

33p

2209

F203

100R

5 2

3219

3 1

VCC

7210 PDTC144EU

F205 RES

1K0

SPI-DATA-IN 7214

+3V3

33p

2201 SPI-CS

F202 +3V3

EEPROM-CS

100n

10K

3210

3207

7212 PDTC144EU 3

PWM-CLOCK

33p

7209 PDTC144EU

7201-1 74HCT125PW 2

2202

10K

3213

2214

+3V3

2219

+3V3

9208 RES

9213

9214 RES

SPI-DATA-OUT-FIL

+3V3 7201-3 74HCT125PW 14

3121

100R

F208

3212

DATA-RETURN-SWITCH

100R

100p

2220 RES

SPI-DATA-RETURN

E H

I 2215

1u0

100n

3 4 5 24

3216 100R

SPI-DATA-OUT-FIL

3214

+3V3 10K

MODE IREF XLAT SCLK SIN SOUT

XHALF 1

XERR VIA

PWM-R2 +3V3

+3V3 F214 PWM-G2 F215 PWM-B2 F209 EEPROM-CS-LOCAL DATA-RETURN-SWITCH

EEPROM-CS-LOCAL DATA-RETURN-SWITCH

6216

33p

2211

GND GND_HS

PWM-B1 F213

3K3

1K2

SPI-CLOCK-BUF SPI-DATA-IN SPI-DATA-OUT

3221

F204

PWM-G1 F212

3K3

100R

F211

3222

SPI-LATCH

3218 RES 3215 1K2

PWM-R1

470R

3217

PROG

GSCLK BLANK

F210

7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

SML-310

33p

30 31 32 33

25 2

2210

0 1 2 3 4 5 6 7 OUT 8 9 10 11 12 13 14 15

3224

VCC

LED DRIVER PWM CONTROL

G PWM-CLOCK-BUF BLANK-BUF

owner.

is prohibited without the written consent of the copyright

+3V3 2216

7215 TLC5946PWP

2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7 2217 B12 2218 C12 2219 D12 2220 E9 3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3 3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8 3223 C11 3224 H11 6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7 9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10 F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9

F I

+3V3

O CHN

SETNAME

CLASS_NO

DRIVER 6LED LITEON P

2008-08-08

8204 000 8857

2K9

2008-06-10

2008-08-08

3 NAME Peter Van Hove CHECK

SUPERS. DATE

2008-06-02

130 C

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18560_501_090403.eps 090403

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 78

8 LED Low-Pow: LED Liteon 2

LED LITEON B

A VLED2

9308

9307

VLED1-F

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

9305-4

RED

9305-1

BLUE

9318-3

GREEN

9318-1

RED

9318-4

BLUE

GND_HS

RED

BLUE

GND_HS

B 2 9315-2

4 9315-4

1 9315-1

5 9313-4 4

9313-1

9313-2

4 9303-4 1 9303-1

9312-1 1

GREEN

9312-3

9312-4 4 6

3 9303-3

8 9310-1 1

9310-2

9310-4

7 4

9309-4 4

9309-2

9309-1

2 7

9305-2

GND_HS

7005 LTW-E500T-PH1

GND_HS

7004 LTW-E500T-PH1

GREEN

7003 LTW-E500T-PH1

7002 LTW-E500T-PH1

9302

9301

B F345

F344 F340

F341

F 9320-4 5

9320-2 7

9319-1

9319-4

9319-3

9320-1 8 1

9304-1

9304-4

BLUE6

1K5 3313

560R

390R

1K5 3314

560R

1K5 3315

560R

1K5 3316

560R

VLED1-F

1K5 3317

560R

VLED1-F

1K5 3386

F307

1K5 3390

10K

9325

3301

PWM-B1

PWM-B2

1K5 3391

Place jumper 9325, 9326, 9327 if VLED < 17V

VLED1-F

1K5 10K

3328

F303

1K5 3318

560R

1K5 3319

560R 3365

1K5 3320

560R

1K5 3321

560R

1K5 3322

560R

1K5 3323

560R

F328

3306

VLED1-F

3366

3368

F348

F349

GREEN-2

7316 BC847BW 3308

9316

F305

10K

3307

F329

7306 BC847BW

10K

3327

F304

1K0

3367

F347

PWM-R2 VLED1-F

3333

3364

1K5

1K0

10K

3326

7315 BC847BW 3305

PWM-R1

3362

3363

RED-2

if VLED < 17V

1K0

owner.

F327

Place jumper 9314, 9316, 9317

9314

3325

F302 7305 BC847BW

9326

3374 560R

1K0

3361

F330

1K0

9327

560R

1K0

F326

10K

1K5 3389

3373

3302

3304

560R

F308

10K

1K5 3388

3334

3303

560R 3372

BLUE-2

7317 BC847BW

9317

3371

F325

7307 BC847BW

10K

1K5 3387

10K

3370 560R

3359

3360

1K5 3385

3369

390R 3351

3357

10K

560R

10K

3309

GREEN-2 3330

is prohibited without the written consent of the copyright

RED6

1K5 3384

560R

RED6

560R 3358

9311-1

560R

1K5 3312

9311-3

3352

9304-2

1K5 3311

1K5 3356

3355

390R 3345 390R 3348

560R

390R

GREEN6

3354

1K5 3353

GREEN6

3310

560R 3349

390R 3342

3335

9311-4

1K5 3350

9306-3

390R 3339

1K5 3347

560R 3343

3346

RED-1

BLUE-1

9306-1

390R 3337

9306-4

1K5 3344

3341

560R

3338

3340

560R

3336

3331

GREEN-1

3332

F346

F343

F342

7001 LTW-E500T-PH1

7000 LTW-E500T-PH1

VLED2

VLED1-F

RED-2

BLUE-2 PWM-G1

PWM-G2

13 O

O CHN

SETNAME

CLASS_NO

DRIVER 6LED LITEON P

2008-08-08

8204 000 8857

2K9

2008-06-10

2008-08-08

3 NAME Peter Van Hove CHECK

SUPERS. DATE

3 2008-06-02

130 C

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18560_502_090403.eps 090403

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 79

8 LED Low-Pow: LED Drive Liteon 1

1M3A E2 1M85 D2 3536 E9 3537 E9 3538 E7 3539 E9 3540 E7 3541 E8 3542 E9 3543 E7 3544 E8 3546 E7 3547 E8 3549 F7 3550 E8 3552 F7 3553 F8 3555 F7 3556 F8 3569 F7 3570 F7 3571 G7 3572 G7 3573 G7 3574 G7 3584 F8 3585 F8 3586 F8 3587 G8 3588 G8 3589 G8 3590 G8 3591 G8 7006 A5 7007 A7

LED DRIVE C

A 7006 LTW-E500T-PH1

GREEN-1

GREEN

RED-1

RED

BLUE-1

BLUE

7007 LTW-E500T-PH1

2 3

GREEN

RED

BLUE

GND_HS

E 2

1M85 1 2 3 4 5 6 7 8 9 10 11 12 13 14

D H

G GREEN-2

BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

RED-2 BLUE-2

VLED1

VLED2 15 16

1M3A 1 2 3 4 5 6 7 8 9 10 11 12 13 14

3536

3538

3541

560R

1K5 3544

390R 3537

560R SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF

3543

1K5 3547

390R 3539

560R 3546

1K5 3550

390R 3542

560R 3549

1K5 3553

390R

BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

+3V3

560R

E I

1K5 3556

3552

VLED1 560R VLED2

1K5 3584

3555 560R

15 16

3569

1K5 3586

3570

560R

3571

1K5 3587

560R 3572

1K5 3588

560R

1K5 3589

3573 560R

1K5 3585

560R

owner.

is prohibited without the written consent of the copyright

+3V3

3540

SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF

1K5 3590

3574 560R

1K5 3591 1K5

1X04 REF EMC HOLE

O CHN

SETNAME

CLASS_NO

2LED + CONNECTOR P

2008-05-23

2008-08-08

2008-10-31

2K9

NAME Peter Van Hove CHECK

8204 000 8874

2008-05-23

2008-08-08

P 1

SUPERS. DATE

2008-04-20

130 C

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18560_503_090403.eps 090403

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 80

3364 3365 3366 3367 3363 3368 3354 3357 3358 3359 3360 3361 3362

F326

F134

F328

F202 F133

F329

F325

F327

F118

F203 F136

F308

F330

I125 F103

F112

F210 F305

F122

F128

F102

F206

F304

F204 F302

F343

F340 F208 F205

F307

F121

F138 F207

F211 F303

F117

7007

1M1A F129

F131

F124

F137

F126

F212

F101

F213

3536 3537 3539 3542

3552 3555 3549 3570 3546 3571 3543 3572 3540 3573 3538 3569 3574

7006 F123

F127

I124

F125 F342

F341

1M2A

F104 F109

1X04

F120

F132

F105

F139 F209

3541 3553 3544 3588 3547 3587 3550 3586 3556 3591 3584 3590 3585 3589

3335 3345 3348 3351 F130

F108

F214

I126

F344

F106

F345

F107

F215

F349

F116

1M3A

F347

9311

7005

9319

9304

9312

F135 F346 F348

1M85

3314 3320 3319 3318 3323 3322 3321

2127 3309 3308 3307

3303 3302 3301 9327

7317

3306 3305 3304 9325

9326

3140 3135 3123

7116

9315

7316

9303

3203 3205

9310

3134 3141

7315

2105 3137

3111

7004

7209

7214

3204

2214

9318

3105

C140

2107

3213

9320

3125

7212 7210

3113

2111

3126

3210

7102

2209

7003

2131

2124 2121

2115 3112

3101

3102

2123

3131 2112 3116 9119

9106

2113

I111

I114

7110

3138 3136 2106 3139 2108

2118

3130 2120

3104

I115

I113

2122

2119

3127

3317 3316 3315 3313 3312 3311 3310

3107 9102

3117 3114

2110 2109 3109 3108

3110

3106

2117 2116 3115 2126

3103

3124

3142

7002

9308 9307

1101

9313

1M84

3120 3119 9121

9104 9103 3118 9101 2114

2102

2103

3331

7101

I110

9309

3332 9317

7307 3334 9305

3330 3333 3327

7306

9306

2210

3326 3328 3325 9316

7305

2216 3214 2215

3217 9314

3222

3132 3133

2104

7215

3221 3224

6216

3128 3129

2101

3215

2219

7001

9213

3207 2217 9209

3223

2129 2128

3218

2220 2201

9208 3219

2203 9212

3211

3121

7201

9109 9112 9111

2211 3216

1105

9114

9110

2130

9302 9107 2202 3385 3389 3384 3390 3356 3391 3350 3386 3347 3387 3344 3388 3341 3353

9108

3338 3374 3340 3369 3343 3373 3346 3372 3349 3371 3352 3370 3355 3337 3336

9301

3342 3339

2218 3220 3212 9211 3209 9210 9214

1X03

7000

1M83

2125

9113

Layout 8 LED Low-Pow

18490_550_090326.eps 090326

31043136314.3

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 81

10 LED Low-Pow: Microcontroller Block Liteon 3

1 A

MICROCONTROLLER BLOCK LITEON B 3134

10n 3139

1K5 1%

100n

10K 6 10K 7 10K 5 10K

5 10K

8 10K 8

7 10K 5 10K 7 10K

100n

2111

SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF

RST GND

17 40

BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

3103-1

4 3102-4 3 3102-3

3101-3 3

3102-2

5 10K 6 10K 8 10K 4 3101-4

3112 8 10K 1

10K 3115

3114

3106-3

3105-1

3102-1 1

RES 10K 3104-1 1

3106-2 2

4 3

3105-3

3106-1

3104-3 3

3104-2 2 3116 10K

1 2 3 1

8 7 6 8

2 4 2 4

7 5 7 5

3126-1

3127-1 3127-4

1 4

8 5

I124 100R 100R 100R 100R 100R 100R I125 100R 100R 100R 100R 100R 100R I126 100R

CONTROL-1 PWM-CLOCK-BUF SPI-CLOCK-BUF SPI-DATA-RETURN SPI-DATA-IN SPI-LATCH SPI-LATCH-2 TEMP-SENSOR EEPROM-CS BLANK-BUF PROG

TEMP-SENSOR

CONTROL-2 SCL SDA

100R 100R

100p

100p 2131

100p 2124 RES

100p 2126

100p 2123

100p 2122 RES

100p 2117

100p 2116

100p 2115

UD-MD I111 I110

I113 I114 I115

3130

3103-4

3131

9106 RES

100n

2112

9119

10K 7

2 F112

5 4

3103-2

22R

100R

VLED1

3105-4

7 10K 100p

2110

100p

3117

7 19 43 5

+3V3

3104-4 4

10K 9121 RES

10K

7110 NCP303LSN10T1

3120

10K

3119

1u0

2130

F104

+3V3

2114 RES

+3V3

VLED1

F102

3103-3 3

6 10K

10K

+3V3

VLED2 +3V3 15 16

F103

+1V8 100n

2113

100n

100n 2121

H 2119

10K RES

10K

RES 9103 9104 RES

10K 3132

BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

100n 2120

10K RES 9102

+3V3

F109

3141

1 2

3124-4 3128 3129 3124-1 3124-2 3124-3 3125-1 3142 3125-2 3125-4 3126-2 3126-4

100p 3133

+3V3

13 14 18 21 22 23 24 28 29 30 35 36 37 41 44 45 46 47 48 1 2 3 32 33 34 38 39 8 9 10 15 16

2118 RES

3118

1M2A

20 25

9101

SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF

owner.

N 1X03 REF EMC HOLE

O SETNAME

CHN 1

is prohibited without the written consent of the copyright

F133 F135 F136 F139 F137

2109 1M84

VSSA

P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2 X2 P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1 RTXC1 P0.5|MISO0|MAT0.1 RTXC2 P0.6|MOSI0|CAP0.2 P0.7|SSEL0|MAT2.0 RTCK P0.8|TXD1|MAT2.1 P0.9|RXD1|MAT2.2 VBAT P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5 DBGSEL P0.13|DTR1|MAT1.1 P0.14|DCD1|SCK1|EINT1 P0.15|RI1|EINT2 RST P0.16|EINT0|MAT0.2 P0.17|CAP1.2|SCL1 P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0 P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7 P0.27|TRST|CAP2.0 P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2 P0.30|TDI|MAT3.3 P0.31|TDO VDD_1V8 VDD_3V3 VDDA

MICROCTRL

16M9

1101

Î¦

VSS X1

2 7 3101-2 10K 10K 6 10K 6 10K 8 10K 6 10K 3113 RES 10K

100R

15 16

3105-2 2

F108

OUT

1 2 3 4 5 6 7 8 9 10 11 12 13 14

3123

10K

F105

VLED2

15 16

RES

F107

VLED1

47K

1K5 1% RES

3140 EEPROM-CS TEMP-SENSOR PROG

10K 3107

3108

+3V3

VLED2

+3V3 +3V3

10n RES 3138

1K8 1% RES

+3V3

SDA CONTROL-1 CONTROL-2

F138 F134

7116-1 LM393PT

F118

SCL

2108

+3V3

1.5A T

7102 LPC2103FBD48

F117

2107

VLED1-F

1 2 3 4 5 6 7 8 9 10 11 12 13 14

RES

10n 3137

10K

2105

3111 VLED1

+3V3

C140

33p

2125

9112 9114

10u 35V

15 16

3109

2106 1105

100R 3110

1 2 3 4 5 6 7 8 9 10 11 12 13 14

5 F106

1M1A

7116-2 LM393PT

F116

BLANK EEPROM-CS TEMP-SENSOR PROG

+1V8

3136

COM

1K5

INH

100K RES +3V3

3135

1u0

2101

OUT

4u7

SPI-LATCH PWM-CLOCK

100n

9109 9110

+3V3

F101

5 2102

CONTROL-1 CONTROL-2

10n

SPI-CLOCK SDA

2104

9107 9108

-T 10K

9113 RES

SCL SPI-DATA-RETURN

VLED1 VLED2 1u0 2128

+3V3

10u 35V 2129

9111 RES

2127

1 2 3 4 5 6 7 8 9 10 11 12 13 14

SCL SPI-DATA-IN SDA CONTROL-1 CONTROL-2

+3V3

7101 LD2985BM18R F120 F121 F122 F123 F124 F125 F126 F127 F128 F129 F130 F131 F132

1K5

IN 1M83

2103

CLASS_NO

DRIVER 6LED LITEON P

2008-08-08

8204 000 8857

2K9

2008-06-10

2008-08-08

3 NAME Peter Van Hove CHECK

10 2009-Apr-03

SUPERS. DATE

3 2008-06-02

130 C

ROYAL PHILIPS ELECTRONICS N.V. 2008

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 82

10 LED Low-Pow: Microcontroller Block Liteon 1

MICROCONTROLLER BLOCK LITEON INPUT BUFFER

A +3V3

+3V3

(64K)

7201-4 74HCT125PW

HOLD

100p

2217

+3V3

SPI-CLOCK

+3V3 10K

W M95010-WDW6

3209

+3V3

F206

3220

11 13

RES

1K0

27R

SPI-CLOCK-BUF 2218

3204

100p

9211

9212 RES

BLANK

F207 RES

1K0

3223

6 4

100R

EN 7

33p

2203

3211 +3V3

+3V3 14

7201-2 74HCT125PW 5

BLANK-BUF 100p

SPI-CLOCK-BUF

2219

10K RES

3205

14 9210 RES

SPI-DATA-RETURN

GND 3

1 3

PWM-CLOCK-BUF

9209

10K

3203

33p

2209

F203

EEPROM-CS-LOCAL

100R

33p

5 2

3219

3 1

VCC

7210 PDTC144EU

F205 RES

1K0

SPI-DATA-IN 7214

+3V3

33p

2201 SPI-CS

2202

SPI-CS

F202 +3V3

EEPROM-CS

PWM-CLOCK 3207

7212 PDTC144EU 3

7201-1 74HCT125PW 2

10K

3210

2214 7209 PDTC144EU

10K

3213

100n

+3V3

9208 RES

9213

9214 RES

SPI-DATA-OUT-FIL

+3V3 7201-3 74HCT125PW 14

3121

100R

F208

3212

DATA-RETURN-SWITCH

100R

100p

2220 RES

SPI-DATA-RETURN

2216

2215

1u0

100n

3216 100R

SPI-DATA-OUT-FIL

3214

+3V3 10K

XLAT SCLK SIN SOUT

XHALF 1

XERR VIA

K +3V3

+3V3 F214 PWM-G2 F215 PWM-B2 F209 EEPROM-CS-LOCAL DATA-RETURN-SWITCH

EEPROM-CS-LOCAL DATA-RETURN-SWITCH

6216

33p

2211

GND GND_HS

PWM-B1 PWM-R2

3K3

4 5 24

IREF

F212 F213

3221

MODE

3K3

1K2

SPI-CLOCK-BUF SPI-DATA-IN SPI-DATA-OUT

BLANK

3222

F204

3218 RES 3215 1K2

SPI-LATCH

6 100R

PWM-G1

470R

2 33p

3217

PROG

PWM-R1

F211

SML-310

2210

0 1 2 3 4 5 6 7 OUT 8 9 10 11 12 13 14 15

GSCLK

30 31 32 33

F210

7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

3224

VCC

LED DRIVER PWM CONTROL

G PWM-CLOCK-BUF BLANK-BUF

owner.

is prohibited without the written consent of the copyright

+3V3

7215 TLC5946PWP

+3V3

O CHN

SETNAME

CLASS_NO

DRIVER 6LED LITEON P

2008-08-08

8204 000 8857

2K9

2008-06-10

2008-08-08

3 NAME Peter Van Hove CHECK

SUPERS. DATE

3 2008-06-02

130 C

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18310_631_090306.eps 090306

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 83

10 LED Low-Pow: LED Liteon 1

LED LITEON B

A VLED2

9308

9307

VLED1-F

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GND_HS

GREEN

9305-4

RED

9305-1

BLUE

GREEN

9318-1

RED

9318-4

BLUE

GND_HS

GREEN

4 9303-4

RED

1 9303-1

BLUE

GND_HS

4 9315-4

1 9315-1

5 9313-4 4

9313-2

B 2 9315-2

9313-1

7005 LTW-E500T-PH1

3 9303-3

9312-1 1

9312-4

9312-3

9318-3

7004 LTW-E500T-PH1

9310-1 1

9310-4

9310-2 2

7 4

9305-2

9309-4 4

9309-2

9309-1

7003 LTW-E500T-PH1

GND_HS

7002 LTW-E500T-PH1 3

GND_HS

7001 LTW-E500T-PH1 3

GREEN

7000 LTW-E500T-PH1

B F344

F340

F341

F342

F 9320-4 5

9320-2 7

9319-1

9319-4

9319-3

9304-1

9304-4

BLUE6

390R 3351

1K5 3313

560R

390R

1K5 3314

560R

1K5 3315

560R

1K5 3316

560R

1K5 3317

560R

1K5 3318

560R

1K5 3319

560R 3365

VLED1-F

PWM-B1

Place jumper 9325, 9326, 9327

VLED1-F

if VLED < 17V

VLED1-F

if VLED < 17V

F303

3305

1K5 3320

560R

1K5 3321

560R

1K5 3322

560R

1K5 3323

560R

3306

PWM-R1

F328

VLED1-F F329

3368

F348

F349

GREEN-2

F330

1K0

9327

1K0

3367

7316 BC847BW 3308

9316

3333

10K

3307

7306 BC847BW

10K

3327

F304

F305

3366

F347

PWM-R2 VLED1-F

1K5

1K0

10K

3326

1K0

3363

3364

RED-2 7315 BC847BW

9314

3328

K owner.

F327

Place jumper 9314, 9316, 9317

9326

10K

3325

F302 7305 BC847BW

3362

1K5

3361

1K5 3391

10K

PWM-B2

10K

560R

1K0

3304

3374

F326

9325

1K0

1K5 3390

3302

3359

3360

10K

560R

3301

1K5 3389

3373

F308

10K

560R

3334

3303

1K5 3388

BLUE-2

7317 BC847BW

9317

560R 3372

F325

F307 7307 BC847BW

10K

3371

1K5 3387

10K

560R

3357

9311-3

1K5 3386

3370

9320-1 8 1

9306-3

RED6

BLUE6

1K5 3385

3369 560R

10K

3309

GREEN-2 3330

RED6

560R 3358

1K5 3384

560R

is prohibited without the written consent of the copyright

560R

1K5 3312

9311-1

560R

9304-2

1K5 3311

3352

390R 3345 390R 3348

1K5 3356

3355

390R

GREEN6

3354

1K5 3353

560R

GREEN6

3310

560R 3349

390R 3342

3335

9311-4

1K5 3350

390R 3339

1K5 3347

560R 3343

3346

RED-1

BLUE-1

9306-4

390R 3337

9306-1

1K5 3344

3341

560R

3338

3340

560R

3336

3331

GREEN-1

3332

F346

F345

F343

9302

9301

VLED2

B VLED1-F

RED-2

BLUE-2 PWM-G1

PWM-G2

O CHN

SETNAME

CLASS_NO

DRIVER 6LED LITEON P

2008-08-08

8204 000 8857

2K9

2008-06-10

2008-08-08

3 NAME Peter Van Hove CHECK

SUPERS. DATE

3 2008-06-02

130 C

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18310_632_090306.eps 090306

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 84

10 LED Low-Pow: LED Drive Liteon 1

1 B

LED DRIVE

GREEN

RED-1

RED

BLUE-1

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

7009 LTW-E500T-PH1 3

GREEN

RED

BLUE

GND_HS

7008 LTW-E500T-PH1

GND_HS 7

GREEN-1

7007 LTW-E500T-PH1

7006 LTW-E500T-PH1

E 2

1M85 1 2 3 4 5 6 7 8 9 10 11 12 13 14

D H

1 2 3 4 5 6 7 8 9 10 11 12 13 14

RED-2 BLUE-2

VLED1

VLED2 15 16 3536

3538

3541

560R

1K5 3544

390R 3537

560R SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF

3543

1K5 3547

390R 3539

560R 3546

1K5 3550

390R 3542

560R 3549

1K5 3553

390R

BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

+3V3

560R

E I

1K5 3556

3552

VLED1 560R VLED2

1K5 3584

3555 560R

15 16

1K5 3586

3570

560R

3571

1K5 3587

560R 3572

1K5 3588

560R

1K5 3589

3573 560R

1K5 3585

3569 560R

owner.

G GREEN-2

BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

1M3A

is prohibited without the written consent of the copyright

+3V3

3540

SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF

1K5 3590

3574 560R

1K5 3591 1K5

1X04 REF EMC HOLE

O CHN

SETNAME

CLASS_NO

4 LED + CONNECTOR P

2008-08-14

2008-10-31

LITEON 2K9

NAME Peter Van Hove CHECK

8204 000 8897

2008-08-14

2008-10-24

2008-10-31

P 1

SUPERS. DATE

2008-07-29

130 C

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18310_633_090306.eps 090306

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 85

F108

F104 F109

I124 F137

F126

F212

1M1A

F122

F128

F129

F131

F326

F134

F328

F202 F133

F329

F325

F327

F118

F203 F136

F308

F330

I125 F103

F112

F210 F305

F102

F206 F340 F208 F205

F307 F304

F204 F302

F121

F138 F207

F211 F303

F117

7009

3536 3537 3539 3542

F123

F127

F139 F209

F213

3541 3553 3544 3588 3547 3587 3550 3586 3556 3591 3584 3590 3585 3589

3552 3555 3549 3570 3546 3571 3543 3572 3540 3573 3538 3569 3574

F120

F132

F105

F214

F124

F130

1M2A

F101

F344

I126

F345

F107

F215

F349

F106

F347

F116

F348

1X04

F343

F125 F342

F341

F135 F346

1M3A

7008

7007

7006

9311

9304

9303

9319

9312

3335 3345 3348 3351

3317 3316 3315 3313 3312 3311 3310

7005

2127 3303 3302 3301

3309 3308 3307 9327

1M85

3314 3320 3319 3318 3323 3322 3321

9315

7316

7317

3306 3305 3304 9325

9326

3140 3135 3123

7116 9310

9318

3134 3141

7315

2105 3137

3111

7004

7209 2214 3204

7212 7210 3210

3213

7214

3203 3205

C140

2107

9320

3105

2111

3113

3125

3138 3136 2106 3139 2108

2209

7003

9106

3126

2118

2124 2121

2115 3112

7102

3131 2112 3116 9119 3104

2113

I111

7110

2122

3130 2120

3102

2131

3127

I115

2123

3101

3117 3114

9102

3106

2119

I114

3124

3364 3365 3366 3367 3363 3368 3354 3357 3358 3359 3360 3361 3362

3107 3110

2110 2109 3109 3108

1101

9313

1M84

3120 3119 9121

2117 2116 3115 2126

3103

3142

7002

I110

I113

9104 9103 3118 9101 2114

2102

3132 3133

2103

7101 3332 9317

7307 3334

3331 9309

9305

3330 3333 3327 9306

3326 3328 3325 9316

7306

2210 3217 9314

2216 3214 2215

9308 9307

2104

7215

3221 3224 3222

7305

2219

3128 3129

2101

3215

9109 9112 9111

2125

2211 3216

9208 3219

3207 2217 9209

3223

2129 2128

3218

2220 2201

7201

9213

2203 9212

3211

3121

7001

1105

9114

9110

2130

9302 9107 2202 3385 3389 3384 3390 3356 3391 3350 3386 3347 3387 3344 3388 3341 3353

9108

3338 3374 3340 3369 3343 3373 3346 3372 3349 3371 3352 3370 3355 3337 3336

9301

3342 3339

2218 3220 3212 9211 3209 9210 9214

1X03

7000

1M83

6216

9113

Layout 10 LED Low-Pow

18310_553_090309 090309

3104 313 6315.2

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 86

12 LED Low-Pow: Microcontroller Block Liteon 2

1 A

MICROCONTROLLER BLOCK LITEON B 3134 +3V3

7101 LD2985BM18R

8 4

10n 3139

1K5 1%

100n

2108

3141

1 2 4

10K RES

5 10K

10K 6 10K 7 10K 5 10K

8 10K 8

7 10K 5 10K 7 10K

BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

4 3102-4

3101-3 3

3103-1

3 3102-3

3102-2

5 10K 6 10K 8 10K 4 3101-4

3112 8 10K 1

10K 3115

3 3106-3

3114

1 3106-1

3105-1

3102-1 1

RES 10K 3104-1 1

3106-2 2

4 3 3105-3

3104-3 3

3104-2 2 3116

1 2 3 1

8 7 6 8

2 4 2 4

7 5 7 5

3126-1

3127-1 3127-4

1 4

8 5

I124 100R 100R 100R 100R 100R 100R I125 100R 100R 100R 100R 100R 100R I126 100R

CONTROL-1 PWM-CLOCK-BUF SPI-CLOCK-BUF SPI-DATA-RETURN SPI-DATA-IN SPI-LATCH SPI-LATCH-2 TEMP-SENSOR EEPROM-CS BLANK-BUF PROG

TEMP-SENSOR

CONTROL-2 SCL SDA

100R 100R

100p

100p 2131

100p 2126

100p 2124 RES

100p 2123

100p 2122 RES

100p 2117

100p 2116

100p 2115

2114 RES

10K

3124-4 3128 3129 3124-1 3124-2 3124-3 3125-1 3142 3125-2 3125-4 3126-2 3126-4

UD-MD I111 I110

I113 I114 I115

3130

3103-4

3131

9106 RES

100n

2112

9119

10K 7

2 F112

5 4

3103-2

22R

100R

VLED1

3105-4

7 10K 100p

2110

100p

3117

7 19 43 5

+3V3

3104-4 4

10K NC

100n

2111

3103-3 3

6 10K

10K

+3V3

10K

9121 RES

RST GND

VLED2 +3V3 15 16

F103

+1V8 100n

2113

100n

100n 2121

H 2119

SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF

100n 2120

10K

7110 NCP303LSN10T1

3120

10K

3119

1u0

2130

1M2A

F104

+3V3

F102

10K 3132

+3V3

VLED1

F109

10K RES 9102 RES 9103 9104 RES

100p 3133

+3V3

+3V3 BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

2118 RES

3118

2109 9101

SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF

owner.

N 1X03 REF EMC HOLE

O SETNAME

CHN 1

is prohibited without the written consent of the copyright

F133 F135 F136 F139 F137

13 14 18 21 22 23 24 28 29 30 35 36 37 41 44 45 46 47 48 1 2 3 32 33 34 38 39 8 9 10 15 16

20 25

1M84

VSSA

MICROCTRL

17 40

16M9

1101

Î¦

VSS X1

2 7 3101-2 10K 10K 6 10K 6 10K 8 10K 6 10K 3113 RES 10K

100R

15 16

3105-2 2

F108

OUT

1 2 3 4 5 6 7 8 9 10 11 12 13 14

RES

1K8 1% RES

10K

F105

VLED2

15 16

47K

F107

VLED1

10n RES 3138

1K5 1% RES

3140 EEPROM-CS TEMP-SENSOR PROG

10K 3107

3108

+3V3

VLED2

+3V3 3123

+3V3

SDA CONTROL-1 CONTROL-2

F138 F134

7116-1 LM393PT

F118

SCL

3136

10K

+3V3

1.5A T

7102 LPC2103FBD48

F117

2107

VLED1-F

1 2 3 4 5 6 7 8 9 10 11 12 13 14

RES

2105

10n 3137

3111 1105 VLED1

+3V3

C140

33p

2125

9112 9114

10u 35V

15 16

3109

5 F106

2106

100R 3110

1 2 3 4 5 6 7 8 9 10 11 12 13 14

7116-2 LM393PT

F116

1M1A

100K RES

1K5

+1V8

BLANK EEPROM-CS TEMP-SENSOR PROG

3135

COM

+3V3

4u7

INH

100n

OUT

2102

SPI-LATCH PWM-CLOCK

10n

9109 9110

+3V3

F101

2104

CONTROL-1 CONTROL-2

1 1u0

SPI-CLOCK SDA

2101

9107 9108

-T 10K

9113 RES

SCL SPI-DATA-RETURN

VLED1 VLED2 10u 35V 2129

+3V3

2127

SCL SPI-DATA-IN SDA CONTROL-1 CONTROL-2

9111 RES

1u0 2128

1 2 3 4 5 6 7 8 9 10 11 12 13 14

F120 F121 F122 F123 F124 F125 F126 F127 F128 F129 F130 F131 F132

1K5

IN 1M83

2103

CLASS_NO

DRIVER 6LED LITEON P

2008-08-08

8204 000 8857

2K9

2008-06-10

2008-08-08

3 NAME Peter Van Hove CHECK

SUPERS. DATE

3 2008-06-02

130 C

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18560_510_090403.eps 090403

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 87

12 LED Low-Pow: Microcontroller Block Liteon 1

MICROCONTROLLER BLOCK LITEON INPUT BUFFER

A +3V3

+3V3

SPI-CS

100p

2217

9210 RES

SPI-DATA-RETURN

(64K)

7201-4 74HCT125PW

+3V3

SPI-CLOCK

+3V3 10K

W M95010-WDW6

3209

+3V3

F206

3220

11 13

RES

1K0

27R

SPI-CLOCK-BUF 100p

3204

HOLD

2218

10K RES

3205

GND

7 9209

9211

9212 RES

SPI-CLOCK-BUF

BLANK

F207 RES

1K0

3223

6 4

100R

EN 7

33p

2203

3211 +3V3

+3V3 14

7201-2 74HCT125PW 5

BLANK-BUF 100p

1 3

EEPROM-CS-LOCAL

PWM-CLOCK-BUF

10K

3203

33p

2209

F203

100R

5 2

3219

3 1

VCC

7210 PDTC144EU

F205 RES

1K0

SPI-DATA-IN 7214

+3V3

33p

2201 SPI-CS

F202 +3V3

EEPROM-CS

100n

10K

3210

3207

7212 PDTC144EU 3

PWM-CLOCK

33p

7209 PDTC144EU

7201-1 74HCT125PW 2

2202

10K

3213

2214

+3V3

2219

+3V3

9208 RES

9213

9214 RES

SPI-DATA-OUT-FIL

+3V3 7201-3 74HCT125PW 14

3121

100R

F208

3212

DATA-RETURN-SWITCH

100R

100p

2220 RES

SPI-DATA-RETURN

E H

I 2215

1u0

100n

3 4 5 24

3216 100R

SPI-DATA-OUT-FIL

3214

+3V3 10K

MODE IREF XLAT SCLK SIN SOUT

XHALF 1

XERR VIA

PWM-R2 +3V3

+3V3 F214 PWM-G2 F215 PWM-B2 F209 EEPROM-CS-LOCAL DATA-RETURN-SWITCH

EEPROM-CS-LOCAL DATA-RETURN-SWITCH

6216

33p

2211

GND GND_HS

PWM-B1 F213

3K3

1K2

SPI-CLOCK-BUF SPI-DATA-IN SPI-DATA-OUT

3221

F204

PWM-G1 F212

3K3

100R

F211

3222

SPI-LATCH

3218 RES 3215 1K2

PWM-R1

470R

3217

PROG

GSCLK BLANK

F210

7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

SML-310

33p

30 31 32 33

25 2

2210

0 1 2 3 4 5 6 7 OUT 8 9 10 11 12 13 14 15

3224

VCC

LED DRIVER PWM CONTROL

G PWM-CLOCK-BUF BLANK-BUF

owner.

is prohibited without the written consent of the copyright

+3V3 2216

7215 TLC5946PWP

F I

+3V3

O CHN

SETNAME

CLASS_NO

DRIVER 6LED LITEON P

2008-08-08

8204 000 8857

2K9

2008-06-10

2008-08-08

3 NAME Peter Van Hove CHECK

SUPERS. DATE

2008-06-02

130 C

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18560_511_090403.eps 090403

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 88

12 LED Low-Pow: LED Liteon 2

LED LITEON B

A VLED2

9308

9307

VLED1-F

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

9305-4

RED

9305-1

BLUE

9318-3

GREEN

9318-1

RED

9318-4

BLUE

GND_HS

RED

BLUE

GND_HS

B 2 9315-2

4 9315-4

1 9315-1

5 9313-4 4

9313-1

9313-2

4 9303-4 1 9303-1

9312-1 1

GREEN

9312-3

9312-4 4 6

3 9303-3

8 9310-1 1

9310-2

9310-4

7 4

9309-4 4

9309-2

9309-1

2 7

9305-2

GND_HS

7005 LTW-E500T-PH1

GND_HS

7004 LTW-E500T-PH1

GREEN

7003 LTW-E500T-PH1

7002 LTW-E500T-PH1

9302

9301

B F345

F344 F340

F341

F 9320-4 5

9320-2 7

9319-1

9319-4

9319-3

9320-1 8 1

9304-1

9304-4

BLUE6

1K5 3313

560R

390R

1K5 3314

560R

1K5 3315

560R

1K5 3316

560R

VLED1-F

1K5 3317

560R

VLED1-F

1K5 3386

F307

1K5 3390

10K

9325

3301

PWM-B1

PWM-B2

1K5 3391

Place jumper 9325, 9326, 9327 if VLED < 17V

VLED1-F

1K5 10K

3328

F303

1K5 3318

560R

1K5 3319

560R 3365

1K5 3320

560R

1K5 3321

560R

1K5 3322

560R

1K5 3323

560R

F328

3306

VLED1-F

3366

3368

F348

F349

GREEN-2

7316 BC847BW 3308

9316

F305

10K

3307

F329

7306 BC847BW

10K

3327

F304

1K0

3367

F347

PWM-R2 VLED1-F

3333

3364

1K5

1K0

10K

3326

7315 BC847BW 3305

PWM-R1

3362

3363

RED-2

if VLED < 17V

1K0

owner.

F327

Place jumper 9314, 9316, 9317

9314

3325

F302 7305 BC847BW

9326

3374 560R

1K0

3361

F330

1K0

9327

560R

1K0

F326

10K

1K5 3389

3373

3302

3304

560R

F308

10K

1K5 3388

3334

3303

560R 3372

BLUE-2

7317 BC847BW

9317

3371

F325

7307 BC847BW

10K

1K5 3387

10K

3370 560R

3359

3360

1K5 3385

3369

390R 3351

3357

10K

560R

10K

3309

GREEN-2 3330

is prohibited without the written consent of the copyright

RED6

1K5 3384

560R

RED6

560R 3358

9311-1

560R

1K5 3312

9311-3

3352

9304-2

1K5 3311

1K5 3356

3355

390R 3345 390R 3348

560R

390R

GREEN6

3354

1K5 3353

GREEN6

3310

560R 3349

390R 3342

3335

9311-4

1K5 3350

9306-3

390R 3339

1K5 3347

560R 3343

3346

RED-1

BLUE-1

9306-1

390R 3337

9306-4

1K5 3344

3341

560R

3338

3340

560R

3336

3331

GREEN-1

3332

F346

F343

F342

7001 LTW-E500T-PH1

7000 LTW-E500T-PH1

VLED2

VLED1-F

RED-2

BLUE-2 PWM-G1

PWM-G2

13 O

O CHN

SETNAME

CLASS_NO

DRIVER 6LED LITEON P

2008-08-08

8204 000 8857

2K9

2008-06-10

2008-08-08

3 NAME Peter Van Hove CHECK

SUPERS. DATE

3 2008-06-02

130 C

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18560_512_090403.eps 090403

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 89

12 LED Low-Pow: LED Drive 1

LED DRIVE A

RED-1

RED

BLUE-1

BLUE

7008 LTW-E500T-PH1

7007 LTW-E500T-PH1

GREEN

RED

BLUE

1 GND_HS

GREEN

RED

BLUE

7009 LTW-E500T-PH1 3

GREEN

RED

BLUE

GND_HS

7010 LTW-E500T-PH1 3

1 GND_HS

GREEN

RED

BLUE

7011 LTW-E500T-PH1 3

GREEN

RED

BLUE

GND_HS

1 GND_HS 7

GREEN

7006 LTW-E500T-PH1 GREEN-1

B D

C 2

1M3A F2 1M85 D2 3536 E11 3537 E11 3538 E9 3539 F11 3540 F9 3541 E10 3542 F11 3543 F9 3544 F10 3546 F9 3547 F10 3549 F9 3550 F10 3552 F9 3553 F10 3555 G10 3556 F10 3569 G9 3570 G9 3571 G9 3572 G9 3573 H9 3574 H9 3584 G10 3585 G10 3586 G10 3587 G10 3588 G10 3589 H10 3590 H10 3591 H10 7006 B2 7007 B3 7008 B5 7009 B6 7010 B7 7011 B8

D G

1M85 1 2 3 4 5 6 7 8 9 10 11 12 13 14

SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF +3V3

G GREEN-2

BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

RED-2 BLUE-2

VLED1

VLED2

1M3A 1 2 3 4 5 6 7 8 9 10 11 12 13 14

3541

560R

1K5 3544

390R 3537

560R SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF

3543

1K5 3547

390R 3539

560R 3546

1K5 3550

390R 3542

560R 3549

1K5 3553

390R

BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

+3V3

560R

1K5 3556

3552 560R

VLED2

1K5 3584

3555 560R

15 16

1K5 3585

3569 560R

1K5 3586

3570

560R 3571

1K5 3587

560R 3572

1K5 3588

560R

1K5 3589

3573 560R

VLED1

owner.

is prohibited without the written consent of the copyright

3536

3538

3540

15 16

1K5 3590

3574

560R

1K5 3591 1K5

1X04 REF EMC HOLE

O CHN

SETNAME 2

CLASS_NO

2008-10-29

6 LED + CONNECTOR P

2008-08-14

2008-10-29

NAME Peter Van Hove CHECK

8204 000 8898

2K9 LITEON

SUPERS. DATE

1 2008-07-30

130 C

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18560_513_090403.eps 090403

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 90

3364 3365 3366 3367 3363 3368 3354 3357 3358 3359 3360 3361 3362

F108

I124 F137

F126

F212

F101

F104 F109

1M1A

F122

F128

F129

F131

F326

F134

F328

F202 F133

F329

F325

F327

F118

F203 F136

F308

F330

I125 F103

F112

F210 F305

F102

F206 F340 F208 F205

F307 F304

F204 F302

F121

F138 F207

F211 F303

F117

7011

3536 3537 3539 3542

F123

F127

F139 F209

F213

3541 3553 3544 3588 3547 3587 3550 3586 3556 3591 3584 3590 3585 3589

3552 3555 3549 3570 3546 3571 3543 3572 3540 3573 3538 3569 3574

F120

F132

F105

F214

F124

F130

1M2A

I126

F344

F106

F345

F107

F215

F349

F116

F347

1X04

F343

F125 F342

F341

F135 F346 F348

1M3A

7010

7009

7007

7008

3335 3345 3348 3351

7006

9319

9303

9304

9312

1M85

9311

3309 3308 3307 9327

7316

3306 3305 3304

3303 3302 3301 9325

9326

7317

3314 3320 3317 3319 3316 3318 3315 3323 3313 3322 3312 3321 3311 3310

9315

2127

3111

2105 3137 3140 3135

7315

3134 3141

3123

7116

3204

2214

7004

7209 3213

9318

2111

7212 7210

2107

7214

3203 3205

C140

9310

3105

3210

9106

3117 3114

3113

3125

2209

7003

3102

2113 2124 2121

3138 3136 2106 3139 2108

9320

3101

7102

3104

3130 2120 2123

2131

3126

2122

3124

3131 2112 3116 9119

7110

2118

I114

2117 2116 3115 2126

2115 3112

9102

2119 I111

3127

7005

3107 3110

2110 2109 3109 3108

1101

I113

9313

1M84

3120 3119 9121 3106

I115

3142

7002

I110

3103

9104 9103 3118 9101 2114

2102

3132 3133

2103

7101 3332 9317

3331 9309

3330 3333 3327

7307 3334 9305

9316

7306

9306

9308 9307

2104

7215

2210 3217 9314

3326 3328 3325

3221 3224

6216

7001

2216 3214 2215

7305

2219

3222

3215

9113

9208 3219

3223

3128 3129

2101

3218

2220 2201

3207 2217 9209

9213

2203 9212

7201

3211

3121

2129 2128

2125

2211 3216

1105

2130

9114

9110

9302 9107 2202

3385 3389 3384 3390 3356 3391 3350 3386 3347 3387 3344 3388 3341 3353

9108

3338 3374 3340 3369 3343 3373 3346 3372 3349 3371 3352 3370 3355 3337 3336

9301

3342 3339

2218 3220 3212 9211 3209 9210 9214

1X03

7000

1M83

9109 9112 9111

Layout 12 LED Low-Pow

18490_551_090326.eps 090331

31043136335.2

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 91

SSB: DC/DC +3V3 +1V2 1 A

2100 B2 2101 B4 2102 D1 2103 D4 2104 B6 2105 D6 2106 E5

2 2107 B6 2108 B5 2109 C6 2110 C8 2111 C8 2112 C9 2113 C7

2129 F8 2130 F7 2131 F7 2132 F5 2133 H2 2134 H2 2135 H2

2121 E8 2122 B11 2123 B11 2124 C12 2125 E12 2127 E12 2128 F7

2114 C8 2115 D7 2116 E9 2117 E9 2118 E9 2119 E9 2120 E8

4 2140 C9 2141 C9 3100 B2 3101 B2 3102 C2 3103 C1 3105 C1

6 3115 C6 3116 C5 3117 D1 3118 E1 3119 E4 3120 E4 3121 E4

3106 C2 3107 C3 3108 B4 3109 C5 3110 C5 3113 C5 3114 C5

3130 E5 3131 E6 3132 C7 3133 C8 3134 C8 3135 D8 3136 D7

3122 F2 3124 C6 3125 D6 3126 D6 3127 D6 3128 D5 3129 D5

3151 G11 3152 G11 3153 F8 3154 F8 3155 F8 3156 F7 3157 F7

3144 F8 3145 E11 3146 E10 3147 F11 3148 F10 3149 F11 3150 F11

3137 D6 3138 E9 3139 E7 3140 E8 3141 E8 3142 E6 3143 E6

3158 F3 3159 H1 3160 H1 3164 D4 5100 B8 5101 C8 5102 E8

11 5103 E8 5104 B11 5105 E11 6100 E6 6101 F5 6102 G7 6103 F7

6104 B2 7100-1 C2 7100-2 B1 7101-1 B5 7101-2 C6 7102-1 C7 7102-2 D6

7103 C4 7104 D2 7105-1 E3 7105-2 E4 7106 F7 7107-1 E10 7107-2 F10

F100 C4 F101 C7 F102 D6 F103 D6 F104 E7 F105 F4 F106 C2

14 I107 D3 I108 D4 I109 C2 I111 D5 I112 B5 I113 C5 I114 D8

F114 D4 F115 D4 I100 B3 I101 B1 I102 C1 I103 B4 I106 D4

F107 B7 F108 D10 F109 E10 F110 F10 F111 E12 F112 D9 F113 F7

I130 F7 I131 E8 I132 E8 I133 F8 I134 F8 I136 E9 I137 E11

I122 E5 I124 E4 I125 F3 I126 F5 I127 F2 I128 D1 I129 E6

I115 C5 I116 D5 I117 D5 I118 D6 I119 D6 I120 D6 I121 C6

I138 F11 I141 H2 I143 C8 I144 C8 I146 E5 I147 F7 I148 C8

DC / DC +3V3_+1V2

D +12VF 5104

RES 22u

10u 2123

220u 25V

RES 2124

22u

22u RES 2141

22u 2140

2125

1K0

3153

F110

10K

220u 25V

1K0

7107-2 BC847BS 4

I138

3149 3K3

+1V2-PNX85XX

1K0

GND-SIG

3152

SENSE+1V2-PNX85XX

120R 1%

ENABLE-3V3

100p

2133

PROT-DC

2134

I141

100n

4K7

3160

3159

GND-SIG

2135

100p

1% 470R

1% 1K0

3155

3154

6102

PDZ18-B

2127

3145

I137

3151 GND-SIG

+3V3F

BOOSTER

F111

22u

100R

3147

1% 120R

3144

100n

7107-1 BC847BS 1

3150

F113

330u 6.3V

RES 10R

3138

10u

2118 RES

2117 10u

1u0

2120

3n3 2121

6K8

22R

3141 2129

22R RES 3140

RES 3139

470R

7106 BC817-25W 2

12V UNDER-VOLTAGE DETECTION

I136 10K

I133

I134

F109

3146

3148

I130

5105

RES

470R 3157

1n0

RES 2128

100n 3156

RES 2130

BAS316

I147 6103

3V3-ST

I131

1n0

1K0

2131

1u0

+12VF

2132

3158

I127

I132

68R

1K0 6101

10K

I125

3142 68R 3143

6100

I126 PDZ9.1-B

I129

3121

5 F105

100K

3122

BAS316 3120

7105-2 4 BC857BS

+1V2-PNX85XX

10u

3119

10u

10u 5103

10u

F104

6K8

2116 RES

RES 5102 2119

1K0

F108

F112

3137

2K7

7105-1 1 BC857BS

22u 2112

12V/1V2 CONVERSION

15K

GND-SIG

GND-SIG I124

3n3 2111

100n 1K0

3135

1n0

RES 2115

6K8

I146 GND-SIG

2110

6K8

22R 3134

22R

RES 3133

1n0

RES 2113

22R

2114

3130

RES 2122

22u

10u 2107

4R7

3115

3136

F102

F103

3129

100n

2106

33K

3118

FDS6930B

3128

2 GND-SIG GND-SIG

4 I119

1K0 I111

330R is prohibited without the written consent of the copyright owner.

I120

12 11

2K7

RES

+2 -2

4R7 3126

I148

I114

2K2

GND

3164

100n

2103

IS ROSC

I122

33K

5 6

+1 -1

39K

100n

2102

7104 BC847BW 3 GND-SIG I128 1

COMP

9 I108

I118

5 6

3125

2K2

I106

I117

3n3 7102-2

4R7

3127

8 I107

GATE

I116

I143

I144

2K2

F115

3131

RES 3132

VFB

7 8 7102-1 FDS6930B

2 2109

3124

22R

I115

100n

F114

3116

2105

4R7 3114

3113

Î¦

BST

+3V3 10u

7101-2 FDS6930B I121

GATE

3117

RES 2104

1 3109

10u 5101

F101

RES 5100

VSW

14 VCC

10K

7103 NCP5422ADR2G

12V/3V3 CONVERSION

5 6

I113

+12V

10u

3n3

GND-SIG

F100

7 8 FDS6930B

2 2108

DETECT1

3V3

10K

3105

100R 7100-1 BC847BPN 1

3106

F106

3102

22K

I102 0V 2

I109

3107

10K

3103

10R

3108

I100 BAS316

1u0

I112

I103

22K 6104

2101

I101

3101 5

7101-1

22R 3110 22R

4 BC847BPN 7100-2

22K

2100

100n 3100

F107

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871

GND-SIG

" X100 ~ X199 "

1X05 REF EMC HOLE

1X06 REF EMC HOLE

1X02 REF EMC HOLE

1X12 REF EMC HOLE

1X03 REF EMC HOLE

1X07 REF EMC HOLE

1X08 REF EMC HOLE

CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

Round screw hole of 4.5mm

Round screw hole of 4.02mm

Oval screw hole of 5mm x 4.02mm

-- -- --

2008-10-17

2009-01-16

SUPERS. CHECK

DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Kailash

**** *** *****

2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18440_500_090223.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 92

SSB: DC/DC +3V3 +1V2 Standby 1

2203 C2 2204 D2 2205 D3 2206 E1 2207 E2

1M95 D1 1M99 B1 2200 C1 2201 C1 2202 C2

2213 B9 2214 B9 2215 B12 2216 C13 2217 B12

2208 E2 2209 B5 2210 B6 2211 D4 2212 B9

2218 B12 2219 C10 2220 D2 2221 F9 2222 F9

2223 F9 2224 F12 2225 F12 2226 F13 2227 F13

2233 B6 2235 C3 2236 C2 2237 C2 3200 B1

2228 F13 2229 F13 2230 E2 2231 C1 2232 C2

3211 C12 3212 B14 3213 B13 3214 C13 3215 C14

3201 B1 3204 D2 3207 B10 3208 C11 3210 C12

3226 C5 3227 C6 3228 D6 3229 D6 3230 D6

3221 G12 3222 G12 3223 F13 3224 F12 3225 C5

4202 C2 5203 B9 5204 B11 5221 F9 5222 F11

3231 D6 3232 D4 3233 E4 3234 E5 4201 B2

6217 B12 6225 D4 7201 A6 7202-1 B10 7202-2 C10

7203 B14 7204 D10 7222-1 E10 7222-2 F10 7223-1 D5

F203 B1 F204 B1 F205 B1 F206 B1 F207 D1

7223-2 C6 7224-1 E6 7224-2 C7 F201 B1 F202 B1

F208 D1 F209 D1 F210 D1 F211 D1 F212 D1

F218 B6 F219 B12 F220 B14 F221 D14 F222 F12

F213 D1 F214 E1 F215 E1 F216 E1 F217 E1

F223 B1 F224 B1 F225 C1 F226 C1 F227 D6

I203 B9 I204 B10 I205 B11 I206 B14 I207 D11

F228 B1 F229 B12 F230 B15 F231 F12 I202 B6

I210 F9 I212 C5 I213 D5 I214 D4 I215 E5

I216 D5 I217 D6 I218 C6 I219 C6

DC / DC +3V3-STANDBY_+1V2-STANDBY D

DC / DC 7201 LD3985M122

3213

4n7 3214

PROT-DC

7203 BC847BW

+3V3

100n

2219

4 7224-2 BC847BPN(COL)

RES

3V3-ST

RES 7204 PDTC144EU

F221

I207

ENABLE-3V3

3K3

10K

3231

F227

3230

3215

3211

2216

F230

10K

3K9

RES

18K 1%

RES

1K0

3210

VIA

I206

1K0

2218

B F220 3212

RES

10K

6K8

3228

I219

220K 3229

10K

3226

6225 PDZ8.2-B 1u0

3232

1K0 2211

1n0

220u 25V

10u

2217

2215 10u

10u

I216

3233

3234

10K

22K

6 I215

DC / DC

1n0

22u

2227

RES 2228

F SENSE+1V2-PNX5100

470R 1%

1K0 1%

4K7

3222

+1V2-PNX5100

3223

F231

VIA

3221

RES 2229

7222-2 ST1S10PH

220u 25V

22u

2224

2226

2u0

100K

4n7

VFB GND P HS

RES 3224

1 A

VIN

SYNC

F222

2225

10u

2223

10u

2221

INH

5222

2 5

6 SW

I210

33R 10u 2222

+12V

5221

RES 2230

J 7222-1 ST1S10PH

GNDSND

100n

+5V

100K

DETECT-12V 7223-1 BC847BPN(COL) 1

GNDSND

100n

VFB GND P HS

I217 +1V2-STANDBY

+AUDIO-POWER

RES 2208

1 A

10K

3225

2235

1n0

RES 2205

I213

I214

STANDBY

68R

1n0

RES 2220

4 7223-2 BC847BPN(COL) I218 3227

I212

+12V

100n RES 2207

A SYNC

10u

2214

10u 2213

2212

1u0

100n 2233

2210

1u0

2209

VIN

100K

INH

3208

1 7224-1 BC847BPN(COL) RES 2206

is prohibited without the written consent of the copyright owner.

33R

6217 SS36

F219

10n

100p

100p 2203

2202

100p

100p 2203

2203

100p

F207 F208 F209 F210 F211 F212 F213 F214 F215 F216 F217

3204

I203

5204

I205

100K

+12V

I204

RES 2204

FROM PSU

1M95

F218

+5V5-TUN

7202-1 ST1S10PH

RES 3207

+12V

5203

F229

+3V3-STANDBY

1 2 3 4 5 6 7 8 9 10 11

+1V2-STANDBY I202

7202-2 ST1S10PH

RES

INH

POWER-OK SCL-SET SDA-SET

2232

LAMP-ON-OUT BACKLIGHT-OUT BACKLIGHT-BOOST

68R 68R

4201 4202

2200

3200 3201

100p

1-1735446-2

OUT

COM

F203 F204 F205 F206 F223 F224 F225 F226

2231

+12VD

2201

FROM PSU

F228 F201 F202

1 2 3 4 5 6 7 8 9 10 11 12

1 1M99

+3V3-STANDBY

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871 1

12 CHN

DC343514

13 SETNAME

PCB SB SSB BD

3PC332

" X200 ~ X299 " 1

2008-10-17

2009-01-16

SUPERS. CHECK

DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Kailash

********

CLASS_NO

-- -- --

P 25

**** *** ***** 2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18440_501_090223.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 93

SSB: Front End 1

4 4

9 11

13 15

FRONT END

3386

+5V

5304

2323

2u2

100n 2320

2318

100n 2319

100n

2u2

100n

2u2 2330

2329

2u2

2u2 2328

+3V3B

10K 10K 10K 10K 10K

J N

3393 RES 3394 RES 3395 RES 3396 RES 3397

3369

220R

7316-1 LM393PT 1

3356

RES

3358

3359

150R

G I325

100R 2354

3311

I307

3348

22u

18K 7345-2 BC847BPN(COL)

I308 6 3345

3 3391 18R

150R I306

8 18 26 53

SIF-GND

7345-1 BC847BPN(COL) 1 3347

150R

H +5V-TUNER

10K 10K

4314

F315

3376

RES BC857BS 3362 7314-1 RES 2 100R

I329

3374

2K7

3392

CVBS

68R

7316-2 LM393PT 7

F314

4315 RES 3363

6 4

+3V3

10K

3373

150R 150R

2346

+12V F338 ANTENNA-CTRL

SIF

+5V-TUNER

10K 3349

27K

7312-1 BC847BPN 1

3p3

84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101

3370 F337

I331

470R

VDDAH_OSC

36 VDDAL_AFE1 46 VDDAL_AFE2

VDDAH_CVBS

37 VDDAH_AFE1

2 16 27 56

VSSL

+5V-TUNER

3 2

4K7

VSSH

F H

4 BC847BPN 7312-2

I303 5

+12V I328 3

3371

1301 2302 2349 2350 2351 2352 2358 2359 2360 2361 2362 4302 4303 4304 4306 4307 4308 4312 4313 4317 4318

2R2

3375

* 1300

RFS N Y Y N N N N Y Y Y N N Y Y N N N N N N N N

I327

FE-DATA(0:7)

6 3357

100K

BAS316

LGI Y N N Y Y Y Y N N N Y Y N N Y Y Y Y Y Y Y Y

3377

22n

10n

2R2 3367

6301

FE-DATA(0) FE-DATA(1) FE-DATA(2) FE-DATA(3) FE-DATA(4) FE-DATA(5) FE-DATA(6) FE-DATA(7)

RES 3360 RES 3361

3389

4K7

PDN

7315 BCP56 I326

3387

100K

220K

22n

22K RES 3XXX

RES 3XXX

2335

100n

RES 2366

2368

3364

3368

560R

470R

2 4 RES 4322

10n

33AC

2357

2367

33AB

RES 4321

820n

5311

RES 3307

510R

+12V

+5V-TUNER

FE-CLK FE-VALID

22u

10n

43 64 63 1

2345

2365

560R

VIA

FE-SOP

18K

470R

33AA

10n

PDP

3355

100n

3346

2364

IF-AGC

I321

GND_HS

0R05

6302 BZX384-C6V8

F316

4320

100n

RES

2356

6K8

3305

3306

ANTENNA-SUPPLY

F336 +5V-TUNER

47R 47R 47R 47R 47R 47R 47R 47R 47R 47R 47R 47R

RF-AGC IF-AGC 2353

4K7

A327

3 15 28 55

3366

+3V3B

7 17 25 54

100p

VSSAH_OSC

+3V3A 8

A326

220R RES 4324 4325

+5V-TUNER

66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83

5 6 7 8 5 6 7 8 5 6 7 8

10K

35 VSSAL_AFE1 45 VSSAL_AFE2

AGC CONTROL

RESERVED

E 4 3 2 1 4 3 2 1 4 3 2 1

I301

VSYNC

GPIO1 GPIO2

3308-4 3308-3 3308-2 3308-1 3309-4 3309-3 3309-2 3309-1 3310-4 3310-3 3310-2 3310-1

MSTRT MERR F339 MCLK MVAL MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7

DA I2S CL WS

VSSAH_CVBS

VAGC

GND2

4323

1304

IF-P

33 34

CVBS TCK TDI TDO TMS

2310

5 6 9 10 11 12 13 14 19 20 21 22

SIF

SCL2 I2C SDA2

4 30

ANTENNA-CTRL

100p

RF_AGC IF_AGC

VSSAH_AFE1

3304

IF-N

SCL1 I2C SDA1

220R

I319

680n

2p2

OUTPUT2

5303

INPUT2

2309

A324

GND OFWX6966M 36M125

27M

RES

3303 I318

18p 18p

4318

4317

100n

2300

* *

62 61 59 60 57 58

27K 3372

O1 O2

OUTPUT1

22p 2370

I IGND

INPUT1

10n 10n

SAW_SW

Φ DEMODULATOR

RSTN

23 24

47R 47R

F312 F313

SCL-TUNER SDA-TUNER

820n

2 5 2306 4 2307

3398 3399

VDDL

P PD N

SCL-SSB SDA-SSB

2308

1303 1 2

4319

47 48

VDDH

MSTRT MERR MCLK MVAL 0 1 2 3 MD 4 5 6 7

GND1

RES 5302

100n

I322 I323

A325

VCC

7302 UPC3221GV-E1

3302

PDN RESET-SYSTEM

40 39

12p

RES 2334

not in Arch2K8

10K

4K7 4K7 3388 3365

IF-P IF-N

49 50

100n

4307

4308

* *

12p 2332

2355

4304 RES

7303 DRX3926K-XK-A3 2331

PDP

* * *

A328 A329

100n

* *

10n

100R

CVBS-TER-OUT

4 BC857BS 7314-2 RES

K O

O CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

TDI

RES 2347 2348 RES

F332 F333 F334 A322 A323 F335

* *

DC_PWR NC1 RF_AGC NC2 AS SCL SDA XTAL_OUT +5V IF_OUT1 IF_OUT2

F304

18p

18p 2342

2341

100n 100n 4306 4312 4313

LG1 Pend new 12nc

TUNER

2349 2350

ANT_PWR B1 RF_AGC SCL SDA B2 VTU_TP NC IF_AGC DIF2 DIF1 AIF

4u7 4n7

1XXX *HD1816 MK2

RF-IN

is prohibited without the written consent of the copyright owner.

F327

2352

*2360 *4302 *4303

100n

100n 100n

RES 2363

* 2359

* 2362

TUNER

4n7

2351 2361

* 2358

+5V-TUNER

F311 +3V3A

TMS

SCL-TUNER SDA-TUNER

1XXX *TDTC-G321D

4n7

RES 4XXX RES 4XXX

47R 47R

+3V3D

+3V3B

A312

3316 3317

RES 4316

RF-IN

* 2302

TUNER

10u

+3V3A

I313 I314

* I…C ADRESS C0

5307

F303

100n 2327

10K

TDO TCK

2325

3353

F302 100n 2326

10K

F301

22R

+1V2

3352

3354

+3V3B

10K

+3V3D

10K

3351

+1V2A

47u 16V

30R

3350

+3V3E

30R

5301 100n 2305

2304

+3V3B

100n 2324

F310

TUNER BOUNDARY SCAN RF-AGC RES 5310

HD1816 MK1

F317 F318 F319 F320 F321 F322 F323 F324 F325 A310 A311

5306

F305

DC_PWR NC1 RF_AGC NC2 AS SCL SDA XTAL_OUT +5V IF_OUT1 IF_OUT2

100n 2317

+3V3E

1XXX

100n 2316

F309

30R

ANTENNA-SUPPLY

100n 2315

10u

2314

10u 2313

10u

2312

2311

100n

2344

5305

+5V-TUNER

2u2

COM

30R

10u

SHDN BP

F308 +1V2A

RES 3318

OUT COM

120R

30R

RES 5313

100n 2322

2371

22n

2301

OUT

2321

+1V2

2u2

2373

+5V

+3V3B

100n

2372

6K8

3301

+5V-TUNER

3 2u2

SHDN BP

7309 LK112M33TR

F306

2369

OUT

100n

COM

1u0

2336

2337

I324

30R

7308 LD1117DT12

+3V3

+5V-TUNER

4u7

RES 5309

7307 LK112SM50 5

+5V5-TUN

RES 5308

+1V2-PNX85XX

4R7

1u0

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871 2 4 1 3 1

" X300 ~ X399 "

-- -- --

2008-10-17

2009-01-16

CHECK

SUPERS. DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Wang Bing Bing

**** *** *****

2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

1300 E6 1301 D1 1303 G3 1304 E11 1306 F1 2300 F6 2301 C4 2302 E2 2304 D3 2305 D3 2306 G4 2307 G4 2308 G7 2309 G8 2310 G8 2311 C12 2312 C12 2313 C12 2314 C13 2315 C13 2316 C13 2317 C13 2318 C14 2319 C14 2320 C14 2321 C13 2322 C13 2323 C13 2324 C13 2325 D13 2326 D13 2327 D13 2328 D13 2329 D14 2330 D14 2331 E11 2332 E11 2334 F11 2335 H7 2336 C2 2337 C2 2341 E7 2342 E7 2344 C11 2345 H15 2346 H14 2347 G10 2348 G10 2349 E5 2350 E5 2351 F5 2352 F5 2353 F14 2354 G16 2355 H10 2356 H9 2357 H8 2358 E2 2359 E2 2360 E2 2361 F5 2362 E5 2363 E2 2364 H4 2365 H6 2366 H6 2367 H4 2368 H6 2369 C3 2370 G7 2371 C8 2372 C9 2373 C9 3301 C4 3302 E10 3303 G7 3304 G7 3305 H7 3306 H3 3307 H3 3308-1 E15 3308-2 E15 3308-3 E15 3308-4 E15 3309-1 F15 3309-2 F15 3309-3 E15 3309-4 E15 3310-1 F15 3310-2 F15 3310-3 F15 3310-4 F15 3311 G15 3312 H7 3313 H7 3316 D7 3317 D7 3318 C12 3345 I14 3346 H15 3347 I15 3348 H15 3349 I14 3350 D10 3351 D10 3352 D10 3353 D10 3354 D11 3355 F15 3356 F15 3357 G14 3358 G15 3359 G15 3360 I16 3361 I16 3362 I15 3363 J15 3364 H9 3365 E10 3366 G10 3367 I10 3368 I9 3369 I10 3370 I11 3371 I10 3372 I10 3373 J10 3374 J10 3375 J10 3376 I11 3377 H10 3386 B2 3387 H10 3388 E10 3389 H10 3391 I15 3392 I16 3393 E14 3394 E14 3395 E14 3396 E14 3397 E14

3398 F11 3399 F11 33AA H5 33AB H5 33AC H5 4302 E2 4303 F2 4304 F3 4306 E5 4307 F4 4308 F5 4312 E5 4313 F5 4314 I15 4315 J15 4316 E2 4317 F7 4318 F7 4319 F10 4320 H4 4321 H5 4322 I5 4323 G3 4324 G7 4325 G7 4326 F1 4327 F1 5301 D3 5302 G3 5303 G8 5304 B14 5305 C12 5306 C12 5307 D14 5308 B11 5309 B3 5310 D4 5311 H4 5313 B10 6301 H9 6302 H10 7302 G5 7303 E12 7307 B2 7308 B11 7309 B9 7312-1 G15 7312-2 G16 7314-1 I15 7314-2 J16 7315 H9 7316-1 I11 7316-2 J11 7345-1 I15 7345-2 H15 A310 E2 A311 F2 A312 F1 A322 E5 A323 F5 A324 G7 A325 F6 A326 G7 A327 G6 A328 E4 A329 F4 F301 D11 F302 D11 F303 D11 F304 D11 F305 D11 F306 B3 F308 B15 F309 C15 F310 C15 F311 D15 F312 F10 F313 F10 F314 J16 F315 I16 F316 H8 F317 E2 F318 E2 F319 E2 F320 E2 F321 E2 F322 E2 F323 E2 F324 E2 F325 E2 F327 E5 F332 E5 F333 E5 F334 E5 F335 F5 F336 G10 F337 I11 F338 J8 F339 E14 I301 F14 I303 F15 I306 I15 I307 H14 I308 H15 I313 D7 I314 D7 I318 G6 I319 G6 I321 H8 I322 F11 I323 F11 I324 B11 I325 G16 I326 H9 I327 H11 I328 I10 I329 J10 I331 I9

16 18440_502_090223.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 94

SSB: PNX8543 - Power 6 6

PNX8543 - POWER

8 8

11 12

100n

100n 2620

100n 2619

100n 2618

100n RES 2617

100n RES 2616

100n RES 2614

100n RES 2615

+1V2-PNX85XX 2608

100n 2612

100n RES 2613

100n 2610

100n 2611

1u0 2609

A F611

5612 +3V3

1u0 2656

100n

2654

2655

100n

2652

2653

100n

100n RES 2651

RES 2650

RES 2649

100n

100n RES 2648

100n

RES 2647

100n

100n RES 2645

RES 2644

100n

100n RES 2693

100n

100n RES 2692

RES 2691

2621

1u0 2622

RES 2646

+3V3-PER +1V2-STANDBY

33R

5613

F612

+1V2-PNX85XX

AJ26 F17 D4 K6

F F609

5609

100n

2659

2658

100n

2657

1u0

2661

2660

1u0

100n

2663

100n

2662 100n

RES 2670

1u0 2671

+3V3

33R

100n 2666

100n 2665

100n

VDDA-AUDIO F621

5622 33R

VDDA-AUDIO

100n

VDDA-ADC

Y30 AJ30 P30 AF30 AC30 VDDA_3V3_DDRPLL0 AD30 VSSA_DDRPLL0 AB30 VDD_1V2_DDRPLL0 AA30 VSS_DDRPLL W30 0 AK30 1 VSSA_DLL N30 4 AE30 7 VDD_1V8_DDR

+1V2-PNX85XX +3V3-PER

RREF-PNX85XX

5619

5621 33R

F620

VDDA-DAC

VDDA_1V2_DLL

VPP_ID_8542 VPP_ID_8543 VDDA_3V3_VIDOUT VDDA_1V2_ADC4A

+3V3

2672

VDDA_1V2_HDMI_EQ VDD_3V3_HDMI_TERM_2 VDDA_HDMI_3V3_BIAS VDDA_3V3_HDMI_PLL_2 VDD_1V2_HDMI_1 VDD_1V2_HDMI_2 VDDA_1V2_HDMI_EQ VDD_3V3_HDMI_TERM_1 VDDA_3V3_HDMI_PLL_1

5615

AJ7 VDDA_1V2_AADC AJ6 VDDA_3V3_AADC AK8 VDDA_3V3_ACT AK12 VDDA_3V3_ADAC

5623

F622

+1V2-PNX85XX 33R

AG30 AH30 R21 R30 T21 T30 U21 V21 W21 Y21

AJ18 AK20 AK21 VDD_3V3_LVDS AK24 AL21 AJ19 VDDA_3V3_LVDS

VSS_CL

100n

33R

100n

+1V2-PNX85XX

100n

2634

2635

33R

F608 1u0 2639

F606

5610

1u0

5607

100n 2637

33R +3V3

F607

5608

2638

+3V3

2636

100n

100n 2633

2632

33R

+1V2-PNX85XX

33R

100n 2677

22u

100n

D16 E17 F16 E16 C13 C17 D14 E13 E14

F605

+1V2-PNX85XX

+3V3

F618 5620

F619

VDDA_1V2_LVDS_PLL

VDDA_1V2_VID

33R

AM3

100n

5605

2626

26A1

33R

10u 2630

+1V2-PNX85XX

VDDA_3V3_VID_1_1 VDDA_3V3_VID_1_2 VDDA_3V3_VID_4 VDDA_3V3_DCSCCO VDDA_1V2_DCS_A

33R

+1V2-PNX85XX

33R

2673

SENSE+1V2-PNX85XX

F604

VDD_3V3_SBPER

5614

F617

100n 2676

RES 5626

C600

P6 R6 H5 T5 T3 L6 M6 N6 T6

JTAG_VSST1

AK17 VDDA_1V2_USB_PLL AJ17 VDDA_3V3_USB AJ16 GNDA_USB

100n 2675

AC6 AD6

10u

100n 26A2

2631

33R

330u 6.3V

2607

+1V2-PNX85XX

F603

5616

1u0

1 F601

5604 +1V2-PNX85XX

AA6 VDDA_1V2_CAB AB6 VDDA_3V3_MCAB

VDD_1V2_SBCORE

VDDA-LVDS

VDD

2669

10u

AF5 AF6 AG5 AG6

10u

100n 2629

33R 3601

OUT

F625

+3V3

330u 6.3V

2606

+1V8-PNX85XX

5601

2 4

COM

10u

33R 2697

+3V3

100R

5603

2628

100n

2605

1u0

2604

33R 7602 LD1117

100n 26A4

33R

RREF-PNX85XX

26A3

+3V3

2674

I616

+3V3

F616

100n RES 2664

5627

I600

5600

10u

2627

100n 2699

33R

F615

RES 2667

F602

+1V2-PNX85XX

5618

I614 AJ21 AJ22 AJ27 AJ28 AJ8 F10 F23 F24 VDD_3V3_PER F28 F6 H29 J29 J6 W6

AJ12 AJ13 AJ14 AJ20 AJ23 F18 F19 F20 VDD_1V2_CORE F25 F26 F9 K30 L30 U30 V30 V6

100n

5602 +3V3

C D

100n

100n 2625

RES 2623

1u0 2624

+1V8-PNX85XX 10u

COM

7600-9 PNX85439E

+3V3-STANDBY F600

22u 2600

OUT

10u

100n

2601

2603

2602

+3V3F

2668

7601 LD1117DT18

+3V3

100n

33R 5617

I613

100n

1u0 2641

33R

2640

+3V3

5624

owner.

1u0

VSS VSS

2679

2678

100n

1u0 2643

RES 2642

100n

2680

2681

L5 M2 N5 P14 P15 P16 P17 P18 P19 P2 P20 P21 P33 R14 R15 R16 R17 R18 R19 R20 T14 T15 T16 T17 T18 T19 T20 T31 U14 U15 U16 U17 U18 U19 U20 U33

5625

+1V2-PNX85XX

33R

H +1V8-PNX85XX

1u0

1u0 2690

100n 2689

100n 2688

100n 2687

100n 2685

100n 2686

100n 2696

100n 2695

100n 2694

100n 2684

F626

2682

AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AA5 AB31 AB4 AB5 AC31 AC33 AE6 AF33 AG31 AH29 VSS AH6 AJ15 AJ24 AJ25 AJ29 AJ33 AJ5 AJ9 AK10 AK13 AK23 AK25 AL1 AL2 AL3 AL30 AM1 AM18

G F624

VSS

100n 2683

7600-10 PNX85439E

U6 V14 V15 V16 V17 V18 V19 V20 W14 W15 W16 W17 W18 W19 W20 Y14 Y15 Y16 Y17 Y18 Y19 Y20 Y33 I615 Y5 Y6

is prohibited without the written consent of the copyright

+3V3 33R

+1V2-PNX85XX 33R

F610

5611

100n

F623

VSS

AM2 AM21 AM22 AM31 AM32 AM33 AM34 AN1 AN32 AN33 AN34 AP33 AP34 B34 D12 D13 D17 D18 E12 E18 E3 E4 F21 F22 F27 F29 F30 F5 F7 F8 G29 G5 G6 H6 K2 L33

K O

O CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871 1 2 3 4

" X600 ~ X699 " 5

-- -- --

2008-10-17

2009-01-16

SUPERS.

CHECK

DATE

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-12-16

**** *** ***** 2008-10-17

2009-01-16

3139 123 6443

TV543_2K9

NAME Vincent Yap / Lee CW

2600 C4 2601 C2 2602 C4 2603 C2 2604 D2 2605 D3 2606 D2 2607 E2 2608 A6 2609 A6 2610 A6 2611 A6 2612 A7 2613 A7 2614 A7 2615 A7 2616 A7 2617 A8 2618 A8 2619 A8 2620 A8 2621 B6 2622 B6 2623 C7 2624 C7 2625 C7 2626 E7 2627 C7 2628 D7 2629 D7 2630 E7 2631 D7 2632 E5 2633 E5 2634 F5 2635 F5 2636 F7 2637 F7 2638 F8 2639 F8 2640 G7 2641 G7 2642 G8 2643 G8 2644 B12 2645 B13 2646 B13 2647 B13 2648 B13 2649 B13 2650 B14 2651 B14 2652 B14 2653 B14 2654 B15 2655 B15 2656 B15 2657 C13 2658 C14 2659 C15 2660 B16 2661 B16 2662 C16 2663 C15 2664 D14 2665 D14 2666 D14 2667 D14 2668 D14 2669 D14 2670 D16 2671 D16 2672 F15 2673 F14 2674 F14 2675 F14 2676 F14 2677 F15 2678 G14 2679 G15 2680 H14 2681 H15 2682 H12 2683 H12 2684 H13 2685 H13 2686 H14 2687 H14 2688 H14 2689 H14 2690 H15 2691 B6 2692 B6 2693 B7 2694 H13 2695 H13 2696 H13 2697 D5 2699 C7 26A1 E7 26A2 D7 26A3 C7 26A4 C7 3601 D6 5600 C2 5601 D7 5602 C7 5603 D4 5604 D7 5605 E5 5607 F5 5608 E6 5609 F6 5610 F8 5611 G7 5612 A15 5613 B16 5614 C16 5615 D16 5616 C15 5617 B15 5618 B14 5619 D16 5620 D15 5621 E15 5622 E15 5623 F15 5624 G15 5625 G15 5626 E5 5627 C7 7600-10 G2 7600-9 B9 7601 B3 7602 D5 C600 E3 F600 C4 F601 E2 F602 C8 F603 D8 F604 E8 F605 E6 F606 F6 F607 E7 F608 F8

F609 F7 F610 G8 F611 A15 F612 B15 F615 C16 F616 C14 F617 D15 F618 D15 F619 D14 F620 E14 F621 E15 F622 F15 F623 G15 F624 G15 F625 D8 F626 H15 I600 C3 I613 B14 I614 B13 I615 G4 I616 C8

17 18440_503_090223.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 95

SSB: PNX8543 - Video Streams/LVDS Output 3

3700 B6 3707-1 F6 3707-2 F6 3707-3 F6 3707-4 F6 3708-1 F6 3708-2 F6 3708-3 F6 3708-4 F6 3709-1 F8 3709-2 G8 3709-3 F6 3709-4 G6 3710 G7 3711 H1 3714 H2 4700 H6 4701 H2 4702 G4 7600-11 B2 7600-12 F5 7600-5 B5 F700 B6 F701 H2 F702 C7 F703 C7 F704 D7 F705 D7 F706 D7 F707 D7 F708 D7 F709 D7 F710 D7 F711 D7 F712 D7 F713 E7

PNX8543 - VIDEO STREAMS / LVDS OUTPUT

VDDA-LVDS

7600-5 PNX85439E

LVDS IREF_LVDS

B 7600-11 PNX85439E

W29 Y29 AA29 AB29 AC29 AD29 AE29 AF29 AG29 AM30 AN30 AP30 AN31 AP31 AP32 M30 K31

Y4 R2 C4 R4 T4 W4 R5 W5 F11 NC F12 F13 F14 F15 C14 AJ11 AL12 AK15

AK28 AL28 AM28 AK29 AL29 AM29 AN29 K29 L29 NC M29 N29 P29 R29 T29 U29 V29

N P N P N P

N D P N E P N CLK P

AL17 AN21 AP21 AL25 AM25 AN25 AP25 AK26 AL26 AM26 AN26 AP26 AM27 AN27

RX51001ARX51001A+

AK18 AL18

RX51001BRX51001B+

AN19 AP19

RX51001CRX51001C+

AN20 AP20

RX51001DRX51001D+

AL20 AM20

RX51001ERX51001E+

AL19 AM19

RX51001CLKRX51001CLK+

F702 F703

RX51002ARX51002A+

AK22 N AL22 LOUT2_B P

F704 F705

RX51002BRX51002B+

AN23 N AP23 LOUT2_C P

F706 F707

RX51002CRX51002C+

AN24 N AP24 P

F708 F709

RX51002DRX51002D+

AL24 AM24

F710 F711

RX51002ERX51002E+

AL23 AM23

F712 F713

RX51002CLKRX51002CLK+

LOUT2_D

N LOUT2_E P

F700

AN18 AP18

AN22 N AP22 P

LOUT2_A

AK19

12K

3700

LOUT2_CLK

N P

D G

7600-12 PNX85439E

CA-MDO(0:7)

CA-MOSTRT

E34

CA-MOVAL

D34

CA-MOCLK_VS2

4702

H31

TUN_CA 0 1 2 3 CA_MDI 4 5 6 7

CA_MOSTRT

CA_MISTRT

CA_MOVAL CA_MOCLK

FE-ERR

C12

FE-CLK

B10

FE-SOP

FE-VALID

C10

3714

10K RES

4K7

CA_MICLK

TNR_ERROR

3708-4 4 3708-2 2

7 47R

4 1

5 47R 8 47R

6 47R

CA-MDI0 CA-MDI1 CA-MDI2 CA-MDI3 CA-MDI4 CA-MDI5 CA-MDI6 CA-MDI7

J31

3709-3

3 47R

CA-MISTRT

E32

3709-4

4 47R

CA-MIVAL

33R

CA-MICLK

H32

3710

B31

CA-ADDEN

CA-CD1 CA-CD2

D31 DIR A31 CA_DATA EN

CA-DATADIR CA-DATAEN

CA_OOB_EN

CA_RST

TNR_MICLK

CA_VCCEN

TNR_MISTRT

CA_VPPEN

TNR_MIVAL

3707-2 8 47R 6 47R 3707-4 3707-1 5 47R 7 47R 3707-3

3708-1 1 3708-3 3

K32 0 A32 1

CA_CDN

CA_RDY FE-ERR

+3V3-PER

0 1 2 3 TNR_TSDI 4 5 6 7

F701

3711

CA_MIVAL

CA_ADD_EN D10 E10 A9 A11 C11 D11 E11 A10

FE-DATA(0) FE-DATA(1) FE-DATA(2) FE-DATA(3) FE-DATA(4) FE-DATA(5) FE-DATA(6) FE-DATA(7)

G33 G31 G30 H34 F34 F32 F31 G34

0 1 2 3 CA_MDO 4 5 6 7

FE-DATA(0:7)

4701

F is prohibited without the written consent of the copyright owner.

E33 C32 B32 J30 K34 K33 H30 J33

CA-MDO(0) CA-MDO(1) CA-MDO(2) CA-MDO(3) CA-MDO(4) CA-MDO(5) CA-MDO(6) CA-MDO(7)

CA_VSN

F NC

3709-1 3709-2

8 7

1 47R 2 47R NC

G K

C31 J34

IRQ-CA

C34

CA-RST

C33 A33

J32 0 A34 1

CA-VS1 4700 CA-MOCLK_VS2

I N

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871 1

I N

O CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

" X700 ~ X799 "

-- -- --

2008-10-17

2009-01-16

CHECK

SUPERS. DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Vincent Yap / Lee CW

**** *** *****

2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18440_504_090223.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 96

SSB: PNX8543 Audio Amplifier 2

PNX8543 - AUDIO AMPLIFIER

20 1800 G1 2800 B2 2806 A8 2808 C8 2809 E8 2810 F8 2811 D7 2812 E7 2822 C12 2823 B8 2824 G2 2825 G2 2826 A7 2827 B7 2830 D7 2831 E7 2832 H6 2833 H6 2834 G8 2835 G7 2836 G7 2837 H6 3810 F2 3811 F3 3812 F3 3813 F4 3814 G2 3815 G3 3816-1 B8 3816-2 B7 3816-3 C7 3816-4 C8 3817-1 D7 3817-2 D8 3817-3 F7 3817-4 F8 3818 B2 3819-1 B3 3819-2 B3 3819-3 C3 3819-4 C3 3820 C2 3821 G1 3822 G1 3830-1 B13 3830-2 C13 3830-3 C11 3830-4 C11 3831 A9 3832 C9 3833 B12 3834 E9 3835-1 H6 3835-2 G7 3835-3 F7 3835-4 H6 3839 H7 3840 D9 3841 C11 4801 A3 6801 B2 7801 B4 7802 C3 7803-1 A8 7803-2 B8 7803-3 D8 7803-4 E8 7807-1 C12 7807-2 C14 7808 F2 7809 F3 7830 G7 F800 G1 F801 G2 F802 G2 F803 B9 F804 D9 F805 E9 F808 C11 F809 A9 F811 C14 F812 B4 I810 F2 I811 F3 I812 F4 I813 F3 I814 A7 I815 B7 I816 D7 I817 E7 I818 B2 I819 B3 I821 C2 I822 C3 I823 C3 I833 A7 I835 B7 I836 D7 I837 E7 I839 C12 I840 C13 I845 H6 I846 H6 I847 H7 I848 H7 I849 H7

AUDIO-VDD 2806

100n I814 2826

4801 RES F812

3818

AUDIO-VDD 7

10K 2823

7801 BC807-25W

22K

3819-2

1 3816-1 8

10K

+AUDIO-POWER

33p 8 7807-1 BC847BPN(COL) AUDIO-RESET

3830-4

3816-4

10K

3830-2 22K

3816-3

I839

3841

22K 3

22K

3819-4

10K

3820

4 7807-2 BC847BPN(COL)

2 5

I840

F811 3

A-STBY

10K 2808

A-PLOP

1u0

F808

I822 I823

22K

AUDIO-CL-R

RES 2822

22K

F803

I821

7802 BC847BW

22K

10K

3833 I835

220p

3830-3

7803-2 LM324 7

1K0

ADAC(8) 2827

3819-3

RES 3832

22K

I815

3830-1

AUDIO-VDD 3819-1

I819

2 3816-2 7

1u0

2800

I818

6801

4R7

BZX384-C6V8

+AUDIO-POWER

AUDIO-CL-L

220p

F809

RES 3831

I833

7803-1 LM324

1K0

ADAC(7)

33p AUDIO-VDD

F 4

I816

ADAC(5)

7803-3 LM324 8

10 I836

G 1

3817-1

AUDIO-OUT-L

9 11

3817-2

1K0

220p

RES 3840

3n3

2811

2830

F804

10K 2809

10K

33p AUDIO-VDD

I817

ADAC(6)

AUDIO-VDD

3n3

2812

2831

RESERVED FOR ITV

10K

3811

10K

3810

3817-3

AUDIO-OUT-R

220p

3817-4

10K 2810

10K

33p I811

3812 5K6

I812

7809 BC847BW

3813 5K6

3815

470R

BATHROOM SPEAKER

470R

3814

3835-3

3835-2

1800

100R

F801

ADAC(3)

100R

F802

ADAC(4)

22K 33p

2836

22K 33p

+3V3

1n0

3821 F800 3822

1n0

1 2 3

2835

ADAC(3)

ADAC(4)

2832 2833

1u0 1u0

I846 3835-4

22K

2837

I848 4

22K

10K

Î¦

I850 1

5 3

SHUTDOWN

BYPASS

HP_ROUT

10 11

VIA GND GND_HS

HP_LOUT

IN-

I849 1u0

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871

1u0

VDD

AMPLIFIER

I851

3839

AUDIO-RESET

I847

7830 TPA6111A2DGN I845 3835-1

2834

502382-0370 EMC 2824 EMC 2825

is prohibited without the written consent of the copyright owner.

F805

I813

I810 7808 BC847BW

7803-4 LM324 14

AUDIO-VDD

12 I837

1K0

RES 3834

I850 H9 I851 H9

O CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

" X800 ~ X899 "

-- -- --

2008-10-17

2009-01-16

SUPERS. CHECK

DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Hor Siew Lee

**** *** *****

2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18440_505_090223.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 97

SSB: PNX8543 Audio 1

20 A

PNX8543 - AUDIO B

I902

2927

1u0

33p RES 2900

33K

B VDDA-AUDIO VDDA-AUDIO 33R 7900 LD2985BM33R

10n

100n

10u 2920

3932

AK14 SD1 AP15 SD2 AM15 I2S_IN SD3 AL15 SD4 AM14 I917

I918

ADAC(2)

AM12 AN12 ADAC3 N AP12 P

3912-4 5

4 33R

ADAC(3)

AM11 AL11 ADAC4 N AK11 P

3912-3 6

3 33R

ADAC(4)

3912-2 7

2 33R

ADAC(5)

RESREF

AM7 C1

ADAC7BUF ADAC8BUF ADAC

7 8

3n3

2939

3n3

3n3 2938

3n3 2937

ADAC(1) ADAC(2) ADAC(3) ADAC(4)

AUD_GND AUD_GND ADAC(8) ADAC(7)

AUD_GND 1 33R

ADAC(6)

AP9 AN9

3913 3914

AL9 AL8

3911-2 7 3911-1 8

33R RES 33R RES

3n3

3912-1 8

ADAC(7) ADAC(8)

2 33R 1 33R

ADAC(7) ADAC(8)

F902

I2S_OUT

OSCLK SCK

I920

3915

68R

SPDIF-OUT-1

AA2 Y2

Y3 1 AA1 2 AA3 I2S_OUT_SD 3 AA4 4

VCOM_ADC AOUT AGND1

I2S_OUT_WS

75R

3908

4K7

3907

3906

10u

2924

100n 2925

3 33R

I2S_IN_WS

3911-3 6

SPDIF_OUT

I919

ADAC(1)

22K

3909

AN15 OSCLK AL14 I2S_IN SCK

SPDIF-IN

4 33R

AP10 AN10 ADAC6 N AM10 P

U5 1 SPDIF_IN C19 2

VDDA-AUDIO

RES

47K

RES 2909

C 3910

3911-4 5

AN11 AP11 ADAC5 N AL10 P

AN5 L AP5 AIN_5 R

1u0

33K

10u

COM

2922

RES 2908

AP6 L AM5 AIN_4 R

33p

2935

+5V

IN INH

RES

3n3 2923

AM6 L AIN_3 AN6 R

1u0

AUD_GND

OUT

100n 2915-3

100n 2915-4

100n 2915-2

2915-1 1

VDDA-DAC

6 100n

100n 2910-3

5 10u 2910-4

2912

33p 33p RES 2905 33p RES 2906 33p RES 2907

AK6 L AL6 AIN_2 R

33p

2934

4904

2 OTHERS X X X 33K 33K 33K 33K 33K 33K 33K 33K

RES 2904

4905 4906

1u0

FLAVORS 22"FLAVORS 32"/42" PnS SS YES X X X X YES YES YES X 33K 33K X X 33K 33K 33K 15K 22K 220K 33K 100K X X 22K 100K X X X X 33K X X 33K

AUDIO AK7 L AK9 AL7 VREF_AADC VDDA_3V3_DAC R AJ10 VSSA_ADAC AM8 NEG AN14 AM9 VREF POS AP14 ADAC1 N AL13 AP8 VRNEG P AN8 AADC AADC AP13 AN13 AN7 ADAC2 N L AM13 AP7 AIN_1 P R

3933

4903

I910

7 33K 3927-2

4901 & 4902 4903 & 4904 4905 & 4906 3904 3905 3903 3923 3924 3925 3926 3927

2933

33K

3925-2 3927-1 8 3926-2 2

AUDIO-IN5-R

5 I922

7600-7 PNX85439E

1u0

I909

8 33K 1

3926-1 1

E H

33K

3925-1 1

I908

7 33K

RES

AUDIO-IN5-L

2932

3924-2 2

33K

AUDIO-IN4-R

F901

33R

+3V3

1u0

33K

3923-2

2931

I907

8 33K

RES

6901 6900 CDS4C12GTA CDS4C12GTA 12V 12V

5901

2919

33p 1u0

3924-1 1

AUDIO-IN4-L

2930

I906

7 33K

I911 I914

RES 2903 I905

5 33K

4 3903-2 2

AUDIO-IN3-R

is prohibited without the written consent of the copyright owner.

1u0

4902

33K

3905-3 3 3903-4 4

AUDIO-IN3-L

33K

3923-4

2929

AUDIO-IN2-R

I904

6 33K

47K

3904-3 3

2921

RES 2902

4901

5900

I916

I913

33p

1u0

2928

5 33K

3905-4 4

33p RES 2901 I903

5 33K

VDDA-AUDIO 33R

2936

3904-4 4

AUDIO-IN2-L

5902

I921 100n

3900-3 2

33K

3900-2

2910-1

8 33K

1u0

3900-1 1

2926

AUDIO-IN1-R

I901

100n

5 33K

2910-2

3900-4 4

AUDIO-IN1-L

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871

2900 B5 2901 B5 2902 B5 2903 C5 2904 C5 2905 D5 2906 D5 2907 E5 2908 E5 2909 E5 2910-1 B7 2910-2 B7 2910-3 C7 2910-4 C7 2912 C7 2915-1 C9 2915-2 C9 2915-3 C9 2915-4 C9 2919 C10 2920 C10 2921 C11 2922 E11 2923 E11 2924 G5 2925 G6 2926 A4 2927 B4 2928 B4 2929 C4 2930 C4 2931 C4 2932 D4 2933 D4 2934 E4 2935 E4 2936 E11 2937 E11 2938 E11 2939 E12 3900-1 B2 3900-2 B3 3900-3 A3 3900-4 A2 3903-2 C2 3903-4 C2 3904-3 C2 3904-4 B2 3905-3 C3 3905-4 B3 3906 G6 3907 G6 3908 G6 3909 C11 3910 C11 3911-1 F9 3911-2 F9 3911-3 D9 3911-4 D9 3912-1 E9 3912-2 E9 3912-3 E9 3912-4 D9 3913 F9 3914 F9 3915 F9 3923-1 D3 3923-4 C3 3924-1 D2 3924-2 D2 3925-1 D3 3925-2 E3 3926-1 E2 3926-2 E2 3927-1 E3 3927-2 E3 3932 F6 3933 F6 4901 B4 4902 C4 4903 D3 4904 E4 4905 C4 4906 D4 5900 B7 5901 C10 5902 B7 6900 E2 6901 D2 7600-7 C7 7900 B11 F901 C10 F902 F10 I901 A4 I902 B4 I903 B4 I904 C4

I905 C4 I906 C4 I907 D4 I908 D4 I909 E4 I910 E4 I911 C9 I913 C11 I914 C7 I916 B7 I917 F7 I918 F7 I919 G7 I920 F9 I921 B7 I922 C10

O CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

" X900 ~ X999" 1

-- -- --

2008-10-17

2009-01-16

SUPERS. CHECK

DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Hor Siew Lee

**** *** *****

2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18440_506_090223.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 98

SSB: PNX8543 Analog AV 2

1 2A02 D3 2A03 E3 2A04 F2 2A06 B6 2A07 C6 2A08 D6 2A09 D5

2A10 E11 2A11 E11 2A12 D11 2A13 E6 2A14 E6 2A15 E6 2A16 E6

3 2A17 F6 2A18 F6 2A19 F6 2A20 F6 2A21 F6 2A22 G6 2A23 G6

2A31 F12 2A32 C11 2A33 C12 2A34 C12 2A35 B11 2A36 B12 2A37 B12

2A24 G6 2A25 G6 2A26 H6 2A27 H6 2A28 H6 2A29 H6 2A30 H6

2A38 C11 2A39 C12 2A40 C12 2A41 F11 2A42 F12 2A43 F12 2A44 E11

7 2A60 H11 2A65 E9 2A66 E10 2A67 E10 2A68 F11 2A69 F11 2A70 E10

2A52 G11 2A53 H11 2A54 A7 2A55 B7 2A56 A7 2A57 G11 2A59 H12

2A45 E12 2A46 E12 2A47 D11 2A48 D12 2A49 D12 2A50 F11 2A51 G6

3A21 F12 3A22 C13 3A23 C12 3A24 B13 3A25 B12 3A26 C13 3A27 C12

3A14 B5 3A15 C6 3A16 C5 3A17 C6 3A18 D5 3A19 D6 3A20 F14

3A06 E3 3A07 E3 3A08 E3 3A09 F3 3A10 F2 3A11 F2 3A13 D3

2A71 G6 2A72 C5 2A73 C6 2A74 C5 2A75 C6 2A76 D5 2A77 D6

3A28 F13 3A29 F12 3A30 E13 3A31 E12 3A32 D13 3A33 D12 3A34 G14

12 3A42 B6 3A43 B7 3A44 A6 3A45 B7 3A46 G14 3A47 H12 3A49 H11

3A35 G12 3A36 G14 3A37 G12 3A38 H14 3A39 H12 3A40 A6 3A41 A6

13 4A01 D12 4A02 E12 4A03 E12 4A04 E5 4A05 E5 4A06 F5 5A00 C12

3A50 D3 3A51 F3 3A52 E2 3A53 E2 3A54 B5 3A55 C5 3A56 D5

5A01 B12 5A02 C12 5A03 F12 5A04 E12 5A05 D12 5A06 B6 5A07 C6

15 IA04 E3 IA05 F3 IA06 F3 IA07 F3 IA09 F6 IA11 G6 IA12 G5

5A08 D6 7600-1 D3 CA01 H10 FA11 C6 FA13 B6 FA14 D3 IA03 E3

IA13 G6 IA14 H5 IA15 H5 IA16 H5 IA17 C12 IA18 C13 IA19 F13

17 IA29 A6 IA30 G12 IA33 F12 IA35 E3 IA43 E13 IA44 D13 IA45 H11

IA20 E12 IA21 F12 IA22 C12 IA24 D12 IA25 F12 IA27 H12 IA28 A6

IA46 H12

PNX8543 - ANALOG AV C

18R

3A42

56R 56R

FA13

AI4N AI41 AI42 AI43 AI44 REF 4

G L

AI5N AI51 AI52 AI53 AI54 REF 5

AI1N_IF AI1P_IF AI2P_IF AI2N_IF

GND_A3_TG

150p

2A40

150p

3A27

150p

2A34

150p

47R 2A33

3A23

150p

2A49

150p

2A48

3A33

3A28 3A29 3A30 3A31 3A32 3A33

FOR CINCH

22n

4A02

IA20

3A30

AV2-PB_SC2-B

150p

5A04 1u8

2A46

3A31

IA43 2A45

22n

150p

* 2A11 2A44 *

CINCH 18R 56R 18R 56R 18R 56R

FOR SCART

2A19

22n

2A10

IA09

4A06 K1 K3 K4 K5 J1 J2 J3 J4

22n

* * 2A41

FOR CINCH

4A03

22n 22n

2A22

22n

2A50

IA12

2A23

22n

2A24

22n

2A52

2A71

F1 F2 F3 F4 G1 G2

2A25 2A51

D2 D1 E1 E2

100p

IA14

2A26

22n

2A27 2A28 2A29 2A30

22n 22n 22n 22n

IA16

J 3A20

27R

CVBS1

3A34

27R

CVBS2

IA33

22n

IA25

22n

IA13

3A36

27R

FRONT-Y_CVBS

IA30

3A46

27R

CVBS

IA27

3A38

27R

FRONT-C

G L

SIF-GND

22n 22n

IA15

AV2-PR_SC2-R

IA19

FOR SCART

IA11 G3 G4 H1 H2 H3 H4

3A28 5A03 1u8

2A31 22n

2A20 RES 2A21

IA21

22n

150p

22n 22n

2A43

2A17 RES 2A18

150p

4A05 M1 M3 M4 M5 L1 L2 L3 L4

2A42

22n

47R

2A16

47R

AV2-Y_SC2-G SCART 27R 47R 27R 47R 27R 47R

47R

PC3_AI1 PC3_AI2 PC3_AI3 PC3_AID AI31 AI32 AI33 REF 3

2A57

22n

2A53

22n

47R

5A05 1u8

47R

P CVBS2C N

27R

IA44 3A32

3A29

PC2_AI1 PC2_AI2 PC2_AI3 PC2_AID AI21 AI22 AI23 REF 2

P CVBS1Y N

22n 22n

3A21

A2 B2

AGC

SC1-R

FOR SCART

3A35

IA06 IA07

A3 B3

3A22

4A01

3A37

75R

180R IA05

BIAS DAC

IA18

IA24

22n

3A47

4K7 180R

CURREF

2A14 RES 2A15

22n

3A08 3A51

IN VSYN OUT

10n

4A04 P1 P3 P4 P5 N1 N2 N3 N4

SC1-B

FOR CINCH

2A12

* 2A47 *

22n

3A07

PC1_AI1 PC1_AI2 PC1_AI3 PC1_AID AI11 AI12 AI13 REF 1

HSYNCIN

27R

1u8

3A39

270p 75R

T2 U1

IA35 A1 10K IA04 C3 4K7

3A09 RES 2A04 RES 3A10 RES 3A11

100R IA03 22n

3A26

1u8

5A00

IA17

22n

2A69

3A06

100R

2A13

2A67

3A53 2A03

R1 R3

5A02

22n

SCART N N N Y Y Y Y N N Y N Y

22n

56R 56R

3A19

100p

330n

RES 2A77

18R

2A08

CINCH Y Y Y N N N N Y Y N Y N

22n

2A10 2A11 2A12 2A41 2A44 2A47 2A65 2A66 2A67 2A68 2A69 2A70

22n

3A52

IA22 47R 2A39

56R

100p

3A17

100p

RES 2A75

100p

22n

2A68

is prohibited without the written consent of the copyright owner.

RES 5A08

SC1-G

2A70

V-SYNC-VGA

27R

2A32

2A65

H-SYNC-VGA

3A24

1u8

2A07

FA11

2A66

SYNC_IN_1 SYNC_IN_2

330n

18R RES 3A56 10n

2A09

ANALOG_VIDEO

5A01

22n

2A38

7600-1 PNX85439E

2A35

22n

3A18

AV3-Y

270p

180R RES 2A02

3A50

3A13

180R

Y_CVBS-MON-OUT

SCART

22n

RES 5A07 RES 2A74

18R

FA14

3A16 18R RES 3A55

3A15

330n

AV3-PB

2A55

2A06 RES 2A73

18R

100p

RES 5A06 RES 2A72

18R RES 3A54

RES 2A76

22n

3A14

AV3-PR

100p

2A56

150p

G-VGA

22n

2A37

3A44

150p

18R

47R 2A36

B-VGA

2A54

3A25

56R IA29

22n 3A41

IA28

3A45

3A40

3A43

18R

R-VGA

H IA45 CA01

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871

2A60

12p IA46

SIF-GND

3A49

390R

2A59

100n

SIF

15 O

O CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

" XA00 ~ XA99 " 1

-- -- --

2008-10-17

2009-01-16

CHECK

SUPERS. DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Vincent Yap / Lee CW

**** *** *****

2008-10-17

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18440_507_090223.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 99

SSB: PNX8543 SDRAM 1

PNX8543 - SDRAM B 7600-2 PNX85439E

AE31

DDR2-CKE 3B00

220R

M_CASB M_CKE

DDR2-CLK_N DDR2-CLK_P

AB33 N AB34 M_CLK P

DDR2-CS

W31

DDR2-DQM0 DDR2-DQM1 DDR2-DQM2 DDR2-DQM3

AJ34 0 AJ31 1 R34 M_DQM 2 R31 3

DDR2-DQS0_N DDR2-DQS0_P

AG33 N AG34 M_DQS0 P

DDR2-DQS1_N DDR2-DQS1_P

AH31 N AH32 M_DQS1 P

DDR2-DQS2_N DDR2-DQS2_P

N34 N N33 M_DQS2 P

DDR2-DQS3_N DDR2-DQS3_P

N31 N M_DQS3 N32 P

M_CSB

IREF ODT

VREF WEB

3B48

1K0 1%

RES

2B22

330u 6.3V

FB00 DDR2-VREF-DDR

5K6

V31

2B00

3B04

V32

M RASB

FB01 DDR2-VREF-CTRL

+1V8-PNX85XX

3B03

FB02

AA31

3B47

DDR2-CAS

W32

+1V8-PNX85XX

1K0 1%

AC34 0 AD33 1 M_BA AA32 2

DDR2-D0 DDR2-D1 DDR2-D3 DDR2-D2 DDR2-D6 DDR2-D5 DDR2-D4 DDR2-D7 DDR2-D8 DDR2-D9 DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15 DDR2-D16 DDR2-D17 DDR2-D19 DDR2-D18 DDR2-D22 DDR2-D23 DDR2-D20 DDR2-D21 DDR2-D24 DDR2-D30 DDR2-D26 DDR2-D25 DDR2-D28 DDR2-D31 DDR2-D27 DDR2-D29

3B50

DDR2-BA0 DDR2-BA1 DDR2-BA2

AH34 0 AK33 1 AH33 2 AL34 3 AL33 4 AE34 5 AK34 6 AF34 7 AG32 8 AK31 9 AJ32 10 AL32 11 AL31 12 AF31 13 AK32 14 AF32 15 P34 M_DQ 16 T34 17 R33 18 U34 19 V34 20 M33 21 T33 22 M34 23 P31 24 T32 25 P32 26 U31 27 U32 28 M31 29 R32 30 M32 31

1K0 1%

AA34 0 AE33 1 AA33 2 AD31 3 Y34 4 AD32 5 M_A W33 6 AC32 7 W34 8 Y31 9 AD34 10 V33 11 Y32 12

3B49

MEMORY

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12

1K0 1%

820R

AB32

2B01

100n DDR2-VREF-CTRL

100n AE32 DDR2-ODT

DDR2-RAS DDR2-WE

+1V8-PNX85XX

DDR2-DQS0_P DDR2-DQS0_N

3B06 33R

DDR2-DQS1_P DDR2-DQS1_N

3B08 33R

3B07

F7 E8

3B09

B7 A8

33R

UDM LDM

LDQS

VREF

3B11 33R 3B13 33R 3B15 33R 3B17 33R 3B19 33R 3B21 33R 3B23 33R 3B25

33R 3B12 33R 3B14 33R 3B16 33R 3B18 33R 3B20 33R 3B22 33R 3B24 33R

DDR2-D0 DDR2-D1 DDR2-D3 DDR2-D2 DDR2-D4 DDR2-D5 DDR2-D6 DDR2-D7 DDR2-D8 DDR2-D9 DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15

33R

DDR2-DQM1 DDR2-DQM0

F3 J2 2B21 100n

L2 L3

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 3B26

DDR2-CLK_P DDR2-CLK_N 3B27 33R

DDR2-DQS2_P DDR2-DQS2_N

DDR2-VREF-DDR

RES 220R

LDQS

3B30

B7 A8

UDQS

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

UDM LDM VREF

VSS

22u

100n

RES 2B41

100n RES 2B40

100n RES 2B39

100n RES 2B38

100n RES 2B37

100n 2B36

2B34 DQ

F7 E8

100n 2B35

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

0 1 2 3 4 5 6 A 7 8 9 10 11 12

33R

VSSQ

SDRAM

0 BA 1

3B28 33R

3B29 33R

DDR2-DQS3_P DDR2-DQS3_N

J8 K8

VDDL

DDR2-BA0 DDR2-BA1

A1 E1 J9 M9 R1

100n

100n 2B33

100n 2B32

100n 2B31

100n 2B30

100n 2B29

100n 2B28

100n 2B27

100n 2B26

2B25

22u

100n RES 2B20

100n RES 2B19

100n RES 2B18

100n RES 2B17

100n RES 2B16

3B10

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

1u0

330u 6.3V 2B24

RES 2B23

VSS

100n 2B15

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

UDQS

100n 2B14

2B13 J8 K8

0 1 2 3 4 5 6 A 7 8 9 10 11 12

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

DDR2-BA2

VDDQ

VSSDL

DDR2-CLK_P DDR2-CLK_N

0 BA 1

A2 E2 L1 R3 R7 R8

VDD ODT CKE WE CS RAS CAS

A2 E2 L1 R3 R7 R8 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

DDR2-BA2

3B31 3B32 3B33

DDR2-D16 DDR2-D17 DDR2-D19 DDR2-D18 DDR2-D20 DDR2-D21 DDR2-D22 DDR2-D23 DDR2-D24 DDR2-D30 DDR2-D26 DDR2-D25 DDR2-D28 DDR2-D29 DDR2-D27 DDR2-D31

33R 33R 33R 33R

3B34

3B35

3B36

33R 3B37 33R 3B39 33R 3B41 33R 3B43 33R 3B45 33R

33R 3B38 33R 3B40 33R 3B42 33R 3B44 33R 3B46 33R

DDR2-DQM3 DDR2-DQM2

F3 J2

DDR2-VREF-DDR

2B42 100n

I N

VSSQ

RES 220R

K9 K2 K3 L8 K7 L7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

3B05

DDR2-ODT DDR2-CKE DDR2-WE DDR2-CS DDR2-RAS DDR2-CAS

A3 E3 J3 N1 P9

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2

VSSDL

L2 L3

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12

7B00 HYB18TC512160B2F-3S

VDDQ

SDRAM

DDR2-BA0 DDR2-BA1

VDD ODT CKE WE CS RAS CAS

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

K9 K2 K3 L8 K7 L7

VDDL

A1 E1 J9 M9 R1 7B01 HYB18TC512160B2F-3S

A3 E3 J3 N1 P9

is prohibited without the written consent of the copyright owner.

F DDR2-ODT DDR2-CKE DDR2-WE DDR2-CS DDR2-RAS DDR2-CAS

1u0

2B02 RES 100n

100n 2B12

100n 2B11

100n 2B10

100n 2B09

100n 2B08

100n 2B07

100n 2B06

100n 2B05

2B04

330u 6.3V 2B03

2B00 D7 2B01 D6 2B02 E5 2B03 E5 2B04 F1 2B05 F2 2B06 F2 2B07 F2 2B08 F2 2B09 F2 2B10 F3 2B11 F3 2B12 F3 2B13 F5 2B14 F5 2B15 F6 2B16 F6 2B17 F6 2B18 F6 2B19 F6 2B20 F7 2B21 H6 2B22 B10 2B23 E10 2B24 E10 2B25 F8 2B26 F8 2B27 F8 2B28 F8 2B29 F8 2B30 F9 2B31 F9 2B32 F9 2B33 F9 2B34 F11 2B35 F11 2B36 F12 2B37 F12 2B38 F12 2B39 F12 2B40 F12 2B41 F13 2B42 H12 3B00 C3 3B03 C7 3B04 D7 3B05 H2 3B06 H2 3B07 H3 3B08 H2 3B09 H3 3B10 G6 3B11 G6 3B12 G6 3B13 G6 3B14 G6 3B15 G6 3B16 G6 3B17 G6 3B18 G6 3B19 G6 3B20 H6 3B21 H6 3B22 H6 3B23 H6 3B24 H6 3B25 H6 3B26 H8 3B27 H8 3B28 H9 3B29 H8 3B30 H9 3B31 G12 3B32 G12 3B33 G12 3B34 G12 3B35 G12 3B36 G12 3B37 G12 3B38 G12 3B39 G12 3B40 G12 3B41 H12 3B42 H12 3B43 H12 3B44 H12 3B45 H12 3B46 H12 3B47 B10 3B48 B12 3B49 B10 3B50 B12 7600-2 A5 7B00 F10 7B01 F3 FB00 B11 FB01 B10 FB02 C6

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871 1

10 CHN

11 DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

" XB00 ~ XB99 " 1

-- -- --

2008-10-17

2009-01-16

CHECK

SUPERS. DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Vincent Yap / Lee CW

**** *** *****

2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18440_508_090223.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 100

SSB: PNX8543 Control MIPS/Flash/PCI 1

2 1

3 2

4 3

8 8

15 17

17 20

PNX8543 - CONTROL MIPS/FLASH/PCI

A 10K 10K

+3V3-PER

3M00 3M06

AK27 UA2_TX AL27 UA2_RX

TXD-MIPS2 RXD-MIPS2

IM19 AP29

CLK_27_OUT

IM24 IM25 IM26

AM17 USB_RPU AP17 USB_ID AN17 USB_VBUS

3M14

1K5 10K 10K

+3V3-PER

SCL3 SDA3

100R

3M18

3M19

100R 3M90

3M91

100R

SCL-SSB

SDA-SSB

FM34

+3V3-PER FM35

SCL-SET

SDA-SET

3M27

RES 6M04 NUP1301ML3

10n EMC 2M04

D21 0 C21 1 B21 PCI_CBE 2 A21 3

CLK DEVSEL FRAME IDSEL INTA_OUT IRDY PAR TRDY PERR SERR STOP TRDY

A30 A25 C26 B30 C30 D26 E25 C25 D25 B25 E26

PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3 IM20

PLL_OUT

8 6 7 5

PCI-CLK-PNX8543 PCI-DEVSEL PCI-FRAME PCI-AD24 IM07 PCI-IRDY PCI-PAR PCI-PERR PCI-SERR PCI-STOP PCI-TRDY

3M34

10K

1 3 2 4

VSS

10K 10K 10K 10K 3M37-2 7 3M37-3 6 3M37-4 5

PCI-REQ PCI-GNT

* **

+3V3-PER

6 7

100n

2 3 4 1

7 100R 6 100R 5 100R 8 100R

NAND-CLE NAND-ALE NAND-WEn NAND-REn

/82 27R N.S. 27R

/32 N.S. N.S. 0R

+3V3

RESERVED

3M30 3M43 3M46

3 10K 2 10K +3V3-PER

E31 E29 AP28

RESERVED IM08

0R FOR /82 3M29

3M35

7M02 CDCVF2505 3M40

PCI-CLK-OUT

XIO-SEL-NAND

100R

33R

100n

6 VDD3.3V CLKI

CLKO

1 1Y 2

SCL-SET 2M21

IM31 0

VDD

10n 2M18

XIO-ACK

IM28

B20 0 C20 1 D20 XIO_SEL 2 E20 3

7M01 PCA9540B

2M17

PCI-CLK-OUT

27R

A20 XIO_ACK B19 XIO_AD25

3M38-3 3M38-2

G 3M54-2 3M54-3 3M54-4 3M54-1

PCI-AD0 PCI-AD1 PCI-CBE1 PCI-CBE2

3M30 3M43 3M46

PCI-REQ PCI-GNT

+3V3-PER 2 10K 3 10K 4 10K

100R

D30 REQ E30 GNT REQ_B GNT_B

3M36-1 3M36-3 3M36-2 3M36-4

PCI-DEVSEL PCI-FRAME PCI-IRDY PCI-TRDY PCI-STOP PCI-PERR PCI-SERR

100n

37 NC

CLE ALE CE RE WE WP R B

IM13

2M11

2M10

10n EMC 2M03

10n

16 17 9 8 18 19 IM14 7

NAND-CLE NAND-ALE XIO-SEL-NAND NAND-REn NAND-WEn WP-NANDFLASH XIO-ACK

FM45 WP-NANDFLASH

0 1 2 3 IO 4 5 6 7

+3V3-PER

SCL

SDA-SET

I2 C -BUS CTRL

INP FIL

SDA

10p 2M19

3M39

IM32

2M20

SC1

SD0

SD1

SCL-DISP

SDA-DISP

33R

PCI-CLK-PNX8543

15p

IM33

SC0

VSS

10p

RESERVED FOR DISPLAY 3M41

IM34

GND 4

3M42

33R

PCI-CLK-ETHERNET

33R

4M05 4M06

PCI-CLK-PNX5100 IM35

FM24

5 4 2

1M04

100p

3M97 10K

7M81 BC847BW

10K

RES 3M70

3M71

3M44-4 7

1 3M44-2 8

3M44-3 10K EJTAG-TDO EJTAG-TMS

FM15

EJTAG-TCK

FM16 10K RES 3M47

100p

22R RES

2M89 2M88 100R

3M44-1 3

47n

IM89

1M03 FM12 FM13 FM17 FM14

3M72

10K

+5V

10K

RES

EJTAG-TRSTN EJTAG-DETECT EJTAG-TDI

1 2 3 4 5 6 7 8

+3V3

10 9

1 2 3 4 5 6 7 8

53261-0871

1735446-8

CDS4C12GTA

CDS4C12GTA 6M00

6M03

100p

2M92

100p 2M93

FM25 3 7 8 1 MSJ-035-10A B AG PPO

3M98

IM90

KEYBOARD

10R

O CHN

" XM00 ~ XM99 " 6

********

PCB SB SSB BD

-- -- --

2008-10-17

2009-01-16

SUPERS.

CHECK

DATE

130

2008-12-16

ROYAL PHILIPS ELECTRONICS N.V. 2008

2009-01-16

**** *** ***** 2008-10-17

1 1

3139 123 6443

TV543_2K9

NAME She King Chuang SV

SETNAME

3PC332

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871 1 2 3 4

DC343514

CLASS_NO

TO LED PANEL

FOR UART SERVICE CONNECTOR

FOR FACTORY USE ONLY

100K RES

IM84

FM00 FM01 FM02 FM03 FM04 FM05 FM06 FM07

3M89 100p

FM23

100R

LED1

RES 4M83

100p

LED1

4M88

+3V3-STANDBY

30R 30R 30R 30R 30R 30R 30R 30R

FM11

1M20 5M80 5M81 5M82 5M83 5M84 5M85 5M87 5M88

+3V3-STANDBY +5V

FOR BOUNDARY SCAN

+3V3

3M45

10K

2M87

100R

3M76

1 2 3 4

100R

2M86

3M75

3M88

RES 7M80 BC847BW

FM37

S4B-PH-SM4-TB(LF)

3M81

RXD

IM88

4M84 RES 3M84

+3V3 TXD

+5V

10K

IM85

RES 3M96

RES 6M01

LED2

10K 1 2 3 4

220R

502382-0470 LED2

+3V3

3M99

RXD-UP

FM22 CDS4C12GTA

FM21

3M73 100R 3M74 100R

TXD-UP

RES 1M01

10K

FOR FACTORY USE ONLY

RES CDS4C12GTA 6M02

RES 3M80

RES 3M83

DEBUG / RS232 INTERFACE

RES 3M82

2M95

+3V3 +3V3-STANDBY

+3V3

+3V3 +3V3 FOR LIGHT GUIDE 1P09

3M87

IM87

100p

100R

2M91

3M86

IM86

LIGHT-SENSOR

100p

+3V3

LIGHT-SENSOR

2M90

3M79 100K

C 1 2 3 4 5 6 10 11 14 15 20 21 22 23 24 25 26 27 28 33 34 35 38 39 40 45 46 47 48

VCC

3M93

7600-3 PNX85439E

PCI 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 PCI_AD 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

3M67 +3V3-NAND

292303-4

4K7

A29 B29 C29 D29 A28 B28 C28 D28 E28 A27 B27 C27 D27 E27 A26 B26 E24 D24 C24 B24 A24 E23 D23 C23 B23 A23 E22 D22 C22 B22 A22 E21

RES 6M05 NUP1301ML3

XIO-ACK

2K2 1 2 3 4

3M92 4K7

PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4 PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8 PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31

is prohibited without the written consent of the copyright owner.

1K2

29 30 31 32 41 42 43 44

NAND-AD(0) NAND-AD(1) NAND-AD(2) NAND-AD(3) NAND-AD(4) NAND-AD(5) NAND-AD(6) NAND-AD(7)

3M66

FM38 FM08 FM09 FM10

USB20-DM USB20-DP

8100R 7100R 6100R 5100R 8100R 7100R 6100R 5100R

+3V3-NAND

1M09

3M26

1K2

10n

2K7 SDA-UP-MIPS

100R

RES 2M16

SDA-SSB

100R SCL2 SDA2

SDA-UP-MIPS

3M25

3M58-1 1 3M58-2 2 3M58-3 3 3M58-4 4 3M59-1 1 3M59-2 2 3M59-3 3 3M59-4 4

PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31

USB CONNECTOR

SCL-UP-MIPS

100R

RES 3M17

SDA2

SDA-UP-MIPS

100R RES 3M16

SCL2

10n EMC 2M02

FM36

USB-OC

+3V3-PER

+3V3-PER 2K7

Î¦

[FLASH] 1G

3M24

SCL-UP-MIPS

100R

3M15

SDA1

SCL-UP-MIPS

+3V3-NAND 10K

SCL1

3M21 3M22 3M23

7M00 NAND01GW3B2BN6F

3M68

5M01 30R

XIO-SEL-NAND IM18

12K

3M20

+3V3-NAND 33R

USB20-DM USB20-DP USB-OC IM23

FM33

+3V3-NAND 5M00 +3V3

AN16 DM AP16 DP AL16 FAULT AK16 PWR_EN AM16 RREF

15K 15K

USB

EMC 2M00

3M94 3M95

10n EMC 2M01

FLASH

100p

SPI-DO_I2C-SDA PBS-I2C-SCL

SCL3 SDA3

TXD-MIPS2 RXD-MIPS2

D33 SCL 3 G32 SDA 3

B +5V

USB

10K 10K

PNX8543-BL-BOOST_SPI-CLK

GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9

SCL2 SDA2

2M12

IRQ-PCI IRQ-CA RXD-MIPS TXD-MIPS SPI-DO_I2C-SDA PNX8543-BL-BOOST_SPI-CLK PNX8543-LCD-PWR-ON_SPI-DI PBS-I2C-SCL

U2 U3 IM21 U4 L34 L32 L31 V2 FM40 V3 FM41 V4 FM42 V5 FM43

WC-EEPROM-PNX5100_SPI-DI IRQ-PCI IRQ-CA RXD-MIPS TXD-MIPS PNX8543-LCD-PWR-ON_SPI-DI

D32 SCL 2 B33 SDA 2

2M05

10K 10K 10K 10K 10K 10K 10K 10K

TCK TDI EJTAG TDO TMS TRSTN

SCL1 SDA1

3M31

3M07 3M08 3M09 3M10 3M11 RES 3M77 3M78 3M85 +3V3-PER RES 3M12 RES 3M13

RESET_SYS

F33 SCL 1 H33 SDA 1

47u 6.3V

AN4 AP3 AP4 AM4 AL4

EJTAG-TCK EJTAG-TDI EJTAG-TDO EJTAG-TMS EJTAG-TRSTN RES BOOTMODE_PNX8543-BL-CTRL 4M03

+3V3-PER

AN28

CONTROL BL_PWM

+T 0R4

EJTAG-TCK EJTAG-TDI EJTAG-TDO EJTAG-TMS EJTAG-TRSTN

FM28

AP27

56K

7 10K 5 10K 6 10K 8 10K 10K

RESET-SYSTEM

7600-8 PNX85439E 4M02

3M32

RES 3M01-2 2 RES 3M01-4 4 RES 3M01-3 3 RES 3M01-1 1 RES 3M05

FM39

100K

+3V3-PER

BOOTMODE_PNX8543-BL-CTRL

3M33

1M01 J4 1M03 J17 1M04 K4 1M09 D10 1M20 J11 1P09 I12 2M00 C8 2M01 C8 2M02 C9 2M03 C9 2M04 C9 2M05 D9 2M10 C16 2M11 C17 2M12 G15 2M16 D9 2M17 G10 2M18 G10 2M19 H11 2M20 H11 2M21 H11 2M86 K9 2M87 K9 2M88 J9 2M89 J9 2M90 I9 2M91 I9 2M92 K2 2M93 K3 2M95 I8 3M00 B4 3M01-1 C2 3M01-2 B2 3M01-3 B2 3M01-4 B2 3M05 C2 3M06 B4 3M07 C2 3M08 C2 3M09 C2 3M10 C2 3M11 C2 3M12 D2 3M13 D2 3M14 D4 3M15 D4 3M16 D4 3M17 E4 3M18 E4 3M19 E4 3M20 C6 3M21 D6 3M22 D6 3M23 D6 3M24 D6 3M25 D6 3M26 E6 3M27 E6 3M29 G6 3M30 G11 3M31 C8 3M32 D8 3M33 D8 3M34 F6 3M35 H7 3M36-1 E8 3M36-2 E8 3M36-3 E8 3M36-4 E8 3M37-2 F9 3M37-3 F9 3M37-4 F9 3M38-2 G8 3M38-3 G8 3M39 H11 3M40 H9 3M41 H11 3M42 H11 3M43 G11 3M44-1 I14 3M44-2 I14 3M44-3 I14 3M44-4 I14 3M45 K14 3M46 G11 3M47 K15 3M54-1 F13 3M54-2 F13 3M54-3 F13 3M54-4 F13 3M58-1 D13 3M58-2 D13 3M58-3 D13 3M58-4 D13 3M59-1 D13 3M59-2 D13 3M59-3 D13 3M59-4 D13 3M66 D13 3M67 E13 3M68 C13 3M70 J14 3M71 J15 3M72 K14 3M73 J3 3M74 J3 3M75 K3 3M76 K3 3M77 C2 3M78 C2 3M79 I6 3M80 J6 3M81 K6 3M82 I8 3M83 I8 3M84 J7 3M85 C2 3M86 I9 3M87 I9 3M88 J8 3M89 K9 3M90 E4 3M91 E4 3M92 E6 3M93 E6 3M94 C7 3M95 C7 3M96 J8 3M97 K7 3M98 K9 3M99 J8 4M02 B5 4M03 C4 4M05 H15 4M06 H15 4M83 K7 4M84 J7 4M88 J9 5M00 C13 5M01 C9 5M80 J10 5M81 J10 5M82 J10 5M83 J10 5M84 J10

5M85 J10 5M87 J10 5M88 J10 6M00 K4 6M01 J3 6M02 J4 6M03 K3 6M04 E8 6M05 E9 7600-3 E6 7600-8 B5 7M00 C15 7M01 G15 7M02 G10 7M80 J8 7M81 K8 FM00 J10 FM01 J10 FM02 J10 FM03 J10 FM04 J10 FM05 J10 FM06 J10 FM07 J10 FM08 E9 FM09 E9 FM10 E9 FM11 J16 FM12 J16 FM13 J16 FM14 J16 FM15 J16 FM16 J16 FM17 J16 FM21 J4 FM22 J3 FM23 K3 FM24 K3 FM25 K4 FM28 B4 FM33 C15 FM34 E6 FM35 E6 FM36 D8 FM37 J4 FM38 E9 FM39 B4 FM40 C5 FM41 C5 FM42 C5 FM43 C5 FM45 E14 IM07 F7 IM08 G6 IM13 E15 IM14 E15 IM18 C8 IM19 D5 IM20 F6 IM21 C5 IM23 C6 IM24 D6 IM25 D6 IM26 D6 IM28 H6 IM31 H10 IM32 H11 IM33 H11 IM34 H11 IM35 I12 IM84 K7 IM85 J7 IM86 I8 IM87 I8 IM88 J8 IM89 K8 IM90 K8

17 18440_509_090223.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 101

SSB: PNX8543 Standby Control/Debug 2

19 1D00 A3 1D01 H13 2D00 A3 2D01 A3 2D02 D2 2D03 G5 2D04 A10 2D05 C12 2D06 E13 2D07 H14 2D08 I14 2D09 B3 2D14 B7 2D15 F8 2D16 F9 2D17 B7 3D00 B2 3D01 B2 3D02 B2 3D03 B2 3D04 B2 3D05 B2 3D06 B2 3D07 B2 3D08 B2 3D09 C2 3D10 C2 3D11 C2 3D12 C2 3D13 C2 3D14 C2 3D15 C2 3D16 C2 3D17 C2 3D18 C2 3D19 C2 3D20 C2 3D21 D2 3D22 D2 3D23 D2 3D24 D2 3D25 D2 3D26 E2 3D27 E2 3D28-1 F4 3D28-2 F5 3D29 F3 3D30 F3 3D33 G3 3D34 G3 3D35 H3 3D36 H2 3D37 A7 3D38 A7 3D39 A7 3D40 A7 3D41 A7 3D42 A8 3D43 A8 3D44 A8 3D45 B7 3D46 B7 3D47 B7 3D48 B7 3D49 B7 3D50 C7 3D51 C7 3D52 C4 3D56-1 E12 3D56-2 E12 3D56-3 E12 3D56-4 E13 3D57 H11 3D58 C13 3D62 H2 3D63 F7 3D64 F9 3D65 F8 3D66 F8 3D67 I3 4D00 A2 4D01 A2 4D02 A2 4D06 C11 4D07 C11 4D08 H4 4D09 E7 6D00 H11 6D01 G3 6D02 F9 7600-6 A5 7D00-1 F4 7D00-2 G4 7D01 F5 7D02-1 H4 7D02-2 H4 7D05 C12 7D06 E12 7D07 E13 7D08 I11 7D09 A10 7D10 F7 FD00 A4 FD02 C14 FD03 C11 FD04 E12 FD05 E11 FD06 F13 FD07 F14 FD08 F13 FD09 H13 FD10 I13 FD11 E13 FD12 E7 FD13 B9

PNX8543 - STANDBY-CONTROL / DEBUG

RES 3D23

10K

RES 3D24

10K

3D52

FD21

100R

3D25

FD22

RESET-SYSTEM

KEYBOARD

100K 2D02

G 3D26 3D27

100n

10K 10K

SPI-PROG SPI-WP

10K 10K

10K 3D44

10K 10K

3D42 3D43

4K7 4K7

RES RES

8 S

W HOLD VSS

+3V3-STANDBY PSEN

AG1 AH5 AH4 AH3 AH2 AH1

RESET-SYSTEM AV2-BLK_LCD-SDA AV1-BLK KEYBOARD LIGHT-SENSOR AV1-STATUS AV2-STATUS

AN3 0 AN2 1 AP2 CADC 2 AP1 3

+3V3-STANDBY

+3V3-STANDBY 3D50

100R

3D51

100R

ALE EA RESET-STBY

0 1 2 3 P2 4 5 6 7

RXD-UP TXD-UP BOLT-ON-IO

BOLT-ON-IO

100n

SPI-SDI

3D58

RXD-UP TXD-UP

+3V3-STANDBY

LED1 LED2

FD14

7D05 NCP303LSN30 2

FD03 1

INP

0 UA_RX 1 UA_TX 2 P3 3 4 5

FD02

RESET-STBY

OUTP NC GND

100n

10K 10K

AC4 AC3 AE1 AD5 AD4 AD3 AE5 AE4

SPI-WP

100n

3D21 3D22

LCD-SCL EJTAG-DETECT LAMP-ON-OUT STANDBY DETECT1 DETECT2 POWER-OK ENABLE-3V3

+3V3-STANDBY

3D49

FD17

512K FLASH

2D05

LCD-SCL EJTAG-DETECT LAMP-ON-OUT STANDBY DETECT1 DETECT2 POWER-OK ENABLE-3V3

AF2 AF1 AG4 AG3 AG2

SCL-UP-MIPS SDA-UP-MIPS

D +3V3-PER

AK2 4 P6 AK4 5

10K 10K 10K 10K 100K 100K 10K 10K

FD20

RC_uP REGIMBEAU_CVBS-SWITCH CEC-HDMI PI_3 SDM

3D47 3D48

100R 100R RES 2D17 100R 100R 2D14 RES 100R

SPI-PROG SPI-WP

4D09 RESET-NVM

FD05

3D56-1

10K

RES 3D13 3D14 3D15 3D16 RES 3D17 RES 3D18 RES 3D19 3D20

ID52

SPI-CSB 3D45 3D46

3D56-2

10K 10K 27K 100K 10K

+3V3-STANDBY

AC2 AC1 AB3 AB2 AB1 AD2 AD1 AC5

FD19

BOLT-ON-TS-ENn RESET-NVM RESET-PNX5100 RESET-ETHERNET UART-SWITCH WP-NANDFLASH AUDIO-RESET AUDIO-MUTE

FD16

VCC 5

FD04

3D08 3D09 3D10 RES 3D11 3D12

BOLT-ON-TS-ENn RESET-NVM RESET-PNX5100 RESET-ETHERNET UART-SWITCH WP-NANDFLASH AUDIO-RESET AUDIO-MUTE 2D09 RC_uP 1n0 REGIMBEAU_CVBS-SWITCH CEC-HDMI PI_3 SDM

FD15

SPI-CLK

4D06

10K 10K 10K 10K 10K 10K 4K7 10K

7D09 M25P05-AVMN6 FD13

SPI-SDO

SPI-CLK SPI-CSB SPI-SDI SPI-SDO

RES 4D07

B D

3D00 3D01 3D02 3D03 3D04 3D05 3D06 3D07

RES RES RES RES RES RES

AJ1 CLK AK3 CSB SPI AK1 VSS_XTAL SDI AJ4 SDO 0 AL5 1 SCL MC AK5 2 SDA 3 P0 AJ3 4 0 PWM AJ2 5 1 6 7 AE2 PSEN 0 AE3 1 ALE 2 P1 AF4 3 EA 7 AF3 RESET_IN

3D40 3D41

XTAL

W3 +3V3-STANDBY

10K I

+3V3-STANDBY 100n 2D04 RES

RES FOR ITV

22p

2D01

RC2

3D37

STANDBY

W1 4D02

RES

7600-6 PNX85439E

FD00

RC1

3D38 3D39

RC 4D01

1D00

4D00

22p

RC_uP

27M

+3V3-STANDBY ID40

10K

A 2D00

7D07 BC857BW

10K

FD11

10K

3D56-3

DETECT-12V

10K

ID46

1 2 3

0 1 2

WC SCL

ADR

7 6 5

SDA

FD06

SCL-UP-MIPS

FD07

SDA-UP-MIPS

100n

3K3

2D16

BAS316

ID31

Φ (8Kx8) EEPROM

4K7

3D66

BAS316

6D01

18K

3D30

ID45

3D64

FD08

MAIN NVM

ID19

2D03 1u0

ID20

7D00-2 BC847BS(COL) 4

DEBUG

3D35

4K7

6 7D02-1 BC847BS(COL) 1

FD09

SPI-PROG

ID51

TSTPOINT FOR DEBUG

2D07 RES

SPI-PROG

10K

FOR /82

7D08 PDTC114EU

RESET-SYSTEM

2D08 RES

FD10

SDM

TSTPOINT FOR DEBUG SDM

I MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871

100p

RESERVED FOR DEVT PURPOSE

FD18 GND TSTPOINT FOR DEBUG

4K7

7D02-2 BC847BS(COL) 4

6D00

SML-310

ID23

4D08

3D36

FOR /32

+1V2-PNX5100

100p

ID50

10K

3D62

ID22 +1V2-PNX85XX

+3V3-PER

3D57

3D34

10K

33K

SKHU 1D01

+5V

330R

3D33

ID49

3D67

is prohibited without the written consent of the copyright owner.

33K

7D00-1 BC847BS(COL) 1

6D02

100n

ID44

3D65

ID18

3D29

CD GND NC

7D01 PDTC114EU

2D15

ID47

INP OUTP

F +3V3

ID17 1

DETECT2

DETECT1

10K

3D63

23D28-27 10K

13D28-18 10K

7D10 NCP303LSN30

100n

7D06 M24C64-WDW6

+3V3-PER

+3V3-STANDBY

2D06 RES

FD12 +3V3-STANDBY

10K

RES +3V3-STANDBY

3D56-4

E H

FD14 B11 FD15 B9 FD16 B9 FD17 B9 FD18 H14 FD19 B4 FD20 B4 FD21 C4 FD22 D2 ID17 F4 ID18 F3 ID19 F4 ID20 G3 ID22 H4 ID23 H3 ID31 F12 ID40 A1 ID44 F8 ID45 F8 ID46 F9 ID47 F2 ID49 G2 ID50 H2 ID51 H4 ID52 B4

O CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

" XD00 ~ XD99 " 1

-- -- --

2008-10-17

2009-01-16

CHECK

SUPERS. DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME She King Chuang

**** *** *****

2008-10-17

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18440_510_090223.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 102

SSB: Bolt-on 2

BOLT-ON B

5E04 7

33R

3E19

FE15 FE30 FE17

3E20 3E21 3E22 3E23 3E24

RXD-BOLT-ON TXD-BOLT-ON

100R

33R 33R

+3V3-STANDBY

100p

100p 2E10

2E11 2E12 2E13

2E09

11 12

100p 100p 100p

FE18 FE19

100R 100R 100R 100R 100R

33R

5E05 RXD-BOLT-ON

4E09

TXD-BOLT-ON

4E10

RXD-MIPS

1 1

SCL-SSB SDA-SSB

IE37

RXD-UP

4E12

IE38

TXD-UP

RXD-UP

TXD-MIPS

4E11

5E06 5E03

100p

FE29

100R

FOR FLAVORS RES +3V3

FE14

2E08

1 2 3 4 5 6 7 8 9 10

3E18

100n

AV1-STATUS STANDBY CVBS-OUT-SC1-PBS

7E07-2 74HC4066PW 4 5

7E07-3 74HC4066PW 8

FE49

TXD

100R 100R 100R 100R

PBS-I2C-SCL BOLT-ON-IO RXD-BOLT-ON TXD-BOLT-ON

FE40 FE41 3E45 3E46 FE42 3E47 FE43 3E48

100R 100R 100R 100R

SPDIF-IN AV1-BLK-BO AUDIO-IN1-R AUDIO-IN1-L

FE44 3E49

100R

CVBS1

FE45

SC1-R SC1-G SC1-B

FE47

16 502382-1470

FE50 RXD-MIPS

X1 7

FE12

1E02

7E07-1 74HC4066PW 1

FE48

RXD

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

2E22

IE31

100n

10K

FE11

3E50 FE37 3E42 FE38 3E43 FE39 3E44

1E00

4E18

+5V

2E24

B D

LCD-SCL AV2-BLK_LCD-SDA

3E40

+3V3-STANDBY

33R 100R 100R

100n

TXD-UP

FE51 TXD-MIPS

1 X1

7E07-4 74HC4066PW 11 12

1 1

X1 7

5E02 3E38 3E39 FE25

FE26

1 2 3 4 5

RESERVED FOR ITV / DVS-S BOLT ON

+3V3-STANDBY

1E01

RESERVED FOR ITV

2E23

4E19 IE39

3E41 10K 7E08 PDTC144EU

STANDBY FE27

is prohibited without the written consent of the copyright owner.

RESERVED FOR ITV

1E04 1 2 3 4 5 6 7 8 10

G 9

7E09 PDTC144EU

+12V PBS_SPI_DI PNX8543-BL-BOOST_SPI-CLK SPI-DO_I2C-SDA PBS-I2C-SCL RC1 RC2

4E20

WC-EEPROM-PNX5100_SPI-DI

4E21

PNX8543-LCD-PWR-ON_SPI-DI

PBS_SPI_DI

19 1E00 B11 1E01 A1 1E02 B1 1E04 G1 2E08 C1 2E09 C2 2E10 C2 2E11 C1 2E12 C2 2E13 C2 2E22 B9 2E23 A2 2E24 B2 3E18 B2 3E19 B2 3E20 C2 3E21 C2 3E22 C2 3E23 C2 3E24 C2 3E38 B1 3E39 B1 3E40 C8 3E41 D9 3E42 B12 3E43 B12 3E44 B12 3E45 B12 3E46 B12 3E47 B12 3E48 B12 3E49 B12 3E50 B12 4E09 B5 4E10 B5 4E11 C5 4E12 C5 4E18 B7 4E19 D7 4E20 G5 4E21 G5 5E02 B1 5E03 B1 5E04 B2 5E05 B9 5E06 B1 7E07-1 B8 7E07-2 C8 7E07-3 C8 7E07-4 D8 7E08 E9 7E09 E8 FE11 B1 FE12 B2 FE14 B1 FE15 C2 FE17 C2 FE18 C2 FE19 C2 FE25 B1 FE26 C8 FE27 E7 FE29 B2 FE30 C2 FE37 B11 FE38 B11 FE39 B11 FE40 B11 FE41 B11 FE42 B11 FE43 B11 FE44 B11 FE45 B11 FE47 C11 FE48 B7 FE49 C7 FE50 C9 FE51 D9 IE31 B9 IE37 C5 IE38 C5 IE39 D8

502382-0870

H MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871

O CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

" XE00 ~ XE99 " 1

-- -- --

2008-10-17

2009-01-16

CHECK ********

SUPERS. DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Vincent Yap / Lee CW

**** *** *****

2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18440_511_090223.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 103

SSB: Analog IO - Scart 1 & 2 1

3 2

4 3

8 8

ANALOG IO - SCART 1 & 2

1n0

2F20

CDS4C12GTA CDS4C12GTA

1n0

2F22

1n0

2F24

CDS4C12GTA

0001

RES 6F11

1F11 1F12

RES 6F12

0001 0001

1F13

RES 6F13

100p

SCART1 (AV1)

1n0

2F26

CDS4C12GTA

0001

1F14

100p

RES 6F14

RES 2F21

100p

RES 2F23

100p

2F25

2 3

FF35

FF18 100p

2F28

CDS4C12GTA

9 10 11

100p

8K2

FF20 2F42

FF19

3F36 CDS4C12GTA

AV1-STATUS

0001

1F15

SC1-B

FF17

12 13

F H

14 FF21 FF22

15 16 17

FF11

100p

2F30

MRC-021H-09 PC

J FOR SCART 4F05

100p

1F18

2F31

FF34

CDS4C12GTA

RES 6F07

2F17

0001

FF13

H K

AV1-BLK-BO

+3V3

SCART

FF24

FF25

SC1-R

68R

FF23

MRC-021H-09 PC

FOR CINCH OUT 3F20

FF12

FOR SCART 4F07

0001

FF32

1F07

AV2-PR_SC2-R

100p

CVBS-OUT-SC1-PBS

RES 6F18

CDS4C12GTA

RES 6F06

0001

1F06

100p

2F16

AV2-Y_SC2-G

0001

1F17

RES 6F17

CDS4C12GTA

SC1-G

CDS4C12GTA

SCART

14 FF09

CVBS-TER-OUT

1F01 FF14

FF16

RES 6F15

FF10

+3V3

100n

0001

75R 1F19

3F42

RES 6F19

0001

1F20

CDS4C12GTA

RES 6F20

100p

J N 100p

RES 6F21

68R

Y_CVBS-MON-OUT

0001 2F45

3F44

1F21

SCART

CVBS-OUT-SC1

CDS4C12GTA

3F51

330R

10K

560R

3F52 100p

2F34

IF32 330R

100R

SCART

O CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871 2 4 1 3

4u7

3F49

3F53

IF31

18K 2F39

3F48

3F50

100p

2F19

1F09

0001

2F44

RES 6F10

3F08

390R

1 2 RES 4F01

68R

3F26

0001

CVBS-OUT-SC2

1F10

FF28 7F04 BC847BW

CDS4C12GTA

100R

IF30

7F08 BC847BW

Y_CVBS-MON-OUT-SC

10K

CVBS1

7F07-1 BC847BPN(COL) 1

CDS4C12GTA

6F09 RES

IF14

3F41

FOR CINCH 4F06

IF28 5

CVBS2

RES 4F00

100n

2F05

+5V

3F07

CDS4C12GTA

22K

3F47

1K0

IF25

IF29

7F06 BC847BW 2

IF27 7F07-2 4 BC847BPN(COL)

3F46

33R

3F45

100n

2F37

1u0

2F36

1n0

EMC 2F35 +5V

FF39

AV1-BLK

100n

10K

2F38

IF16

0001

75R 1F08

7F05 BC847BW 2

CDS4C12GTA 3F24

CVBS-OUT-SC1

30R 3F23

RES 6F08

3F06

+5V

390R

7F03 BC847BW

FF27

2F33

IF26

5F00 FF33

AV2-BLK_LCD-SDA

100R

4K7

3F40

100n

4K7

3F22

100n

2F04 IF12

3F05

2F18

+5V owner.

is prohibited without the written consent of the copyright

1K0

3 5 9 VSS VEE

FF15

10 FF08

3F33

0001

100p

470R

1F16

CDS4C12GTA 2F43

CVBS-OUT-SC1

3F31

RES 6F16

IF06

1K0

12 4

100K

RES 3F28

CDS4C12GTA

RES 6F04 RES 6F05

0001

1F05

3K3

3F19

Y_CVBS-MON-OUT-SC

1 2 10

330p

2F15

8K2

AUDIO-IN1-L AUDIO-IN1-R AV1-STATUS

FF06

3F18

+3V3

3F29

RES

FF36

AUDIO-IN1-L

2F29

SCART

FF31

470R

1n0 FOR CINCH 4F03

RES 6F03

0001

1F03

100n

2F03

CVBS-OUT-SC2 SPDIF-OUT

FF05

AV2-STATUS

13 12 11

1 2 4X1 4X2

AUDIO-IN2-L AUDIO-IN2-R AV2-STATUS

VDD

CVBS2 2

7F02 74HC4053PW

MDX

1F02

FF04

100p

AV2-PB_SC2-B

FF38 0001

1F04

+5V

AV2-BLK_LCD-SDA AP-SCART-OUT-L AP-SCART-OUT-R

FOR CINCH 4F04

REGIMBEAU_CVBS-SWITCH

100p

IF04

RES 2F13 7F01 3 PDTC114EU

2F14

100n 8K2

3F04

2F00

+5V

SCART2 (AV2)

1n0

1K0

SCART

1n0

AV2-Y_SC2-G AV2-PR_SC2-R

3F15

RES

RES 2F27

FF30

CVBS1 AV2-PB_SC2-B

CDS4C12GTA

AUDIO-IN2-L

AP-SCART-OUT-L AP-SCART-OUT-R

FF03

SCART

AP-SCART-OUT-L

3F37

A-PLOP

1n0

RES 6F02

0001

1F23

100p

RES 3F14

100K RES 2F11

470R

2F10

SC1-R AV1-BLK-BO

3F13

3F32

AP-SCART-OUT-L

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 42

100K

RES

CDS4C12GTA

7F00-2 BC847BS(COL) 4

3F27

FF37

AUDIO-IN1-R 1E32 CON_STND_MAL_N40_M2

SC1-B SC1-G

2F12

FLAVORS

330p

2F09

AP-SCART-OUT-R

IF03

6K8

2F08

1K0

10u FF00

FF02

3F11

RES 6F01

150R

FF29

AUDIO-CL-R

0001

2F02

1F22

IF01

CDS4C12GTA

AUDIO-IN2-R 3F02

100p

6K8

2F06

7F00-1 BC847BS(COL) 1

C 3F03

SCART

AP-SCART-OUT-R

3K3

CDS4C12GTA

0001

IF02

3F01

RES

RES 6F00

AP-SCART-OUT-L

100p

RES

2F07

FF26

470R

AUDIO-CL-L

10u

1F00

2F01

3F10

IF00

100K

3F00 150R

FF01

3F09

AP-SCART-OUT-R

" XF00 ~ XF99 "

-- -- --

2008-10-17

2009-01-16

SUPERS.

CHECK

DATE

2008-10-17

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-12-16

**** *** *****

2009-01-16

3139 123 6443

TV543_2K9

NAME Vincent Yap / Lee CW

1E32 C11 1F00 B7 1F01 D17 1F02 D9 1F03 D7 1F04 E7 1F05 F7 1F06 G7 1F07 H7 1F08 I8 1F09 J7 1F10 K7 1F11 B15 1F12 C15 1F13 C15 1F14 D15 1F15 E14 1F16 F14 1F17 G14 1F18 H14 1F19 I15 1F20 J16 1F21 K16 1F22 C7 1F23 D7 2F00 D3 2F01 B4 2F02 C4 2F03 E2 2F04 I3 2F05 J3 2F06 B8 2F07 B6 2F08 C8 2F09 C6 2F10 C7 2F11 D6 2F12 D7 2F13 D6 2F14 E6 2F15 F6 2F16 G6 2F17 H6 2F18 I7 2F19 J7 2F20 B15 2F21 B14 2F22 C15 2F23 C14 2F24 C15 2F25 C14 2F26 D15 2F27 D14 2F28 E15 2F29 F13 2F30 G15 2F31 H15 2F33 I14 2F34 J15 2F35 I9 2F36 I10 2F37 I10 2F38 J9 2F39 J12 2F42 F15 2F43 F7 2F44 K7 2F45 K16 3F00 B3 3F01 B2 3F02 C3 3F03 C2 3F04 D3 3F05 I2 3F06 I2 3F07 J2 3F08 K2 3F09 B6 3F10 B6 3F11 C6 3F13 C6 3F14 D6 3F15 D6 3F18 F6 3F19 F6 3F20 H4 3F22 I7 3F23 I7 3F24 I8 3F26 J5 3F27 B14 3F28 B13 3F29 C14 3F31 C14 3F32 C13 3F33 D14 3F36 F14 3F37 F14 3F40 I14 3F41 I15 3F42 I15 3F44 J14 3F45 I11 3F46 I11 3F47 I12 3F48 J10 3F49 J11 3F50 J11 3F51 J11 3F52 J9 3F53 J12 4F00 J3 4F01 J9 4F03 D8 4F04 E8 4F05 H13 4F06 J13 4F07 H6 5F00 I9 6F00 B7 6F01 C7 6F02 C7 6F03 D7 6F04 E7 6F05 F7 6F06 G7 6F07 H7 6F08 I7 6F09 J6 6F10 K6 6F11 B15 6F12 C15 6F13 C15 6F14 D15 6F15 E15 6F16 F15 6F17 G15 6F18 H15 6F19 I15 6F20 J15 6F21 K15 7F00-1 B3 7F00-2 C3 7F01 E4 7F02 E2

7F03 I2 7F04 K2 7F05 I7 7F06 I14 7F07-1 J11 7F07-2 J10 7F08 J9 FF00 C4 FF01 B8 FF02 C8 FF03 C8 FF04 E7 FF05 E8 FF06 F8 FF08 F8 FF09 G8 FF10 G8 FF11 G8 FF12 G8 FF13 G8 FF14 D16 FF15 D16 FF16 E16 FF17 E16 FF18 E16 FF19 E16 FF20 F16 FF21 F16 FF22 F16 FF23 G16 FF24 G16 FF25 G16 FF26 B4 FF27 I3 FF28 J3 FF29 C6 FF30 D6 FF31 F6 FF32 H6 FF33 I6 FF34 H13 FF35 F13 FF36 D13 FF37 C13 FF38 E4 FF39 I14 IF00 B4 IF01 C4 IF02 B3 IF03 C3 IF04 E3 IF06 F3 IF12 I2 IF14 J2 IF16 I7 IF25 I14 IF26 I11 IF27 I10 IF28 J11 IF29 J12 IF30 J9 IF31 J10 IF32 J11

17 18440_512_090223.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 104

SSB: YPbPr / Side I/O / S-video 1

3 2

5 5

6 6

7 7

17 20

A 1G22

100p

CDS4C12GTA

1G15

CDS4C12GTA

1n0

RES 2G27

100p

RES 2G26

1G16

CDS4C12GTA

1n0

RES 2G30

4K7

5G02

1G25-1 BLACK MSP-303H-BBB-132-03 2

FG28 1G17

RES 6G16

12p 2G36

120R

CDS4C12GTA

FG41

33R RES 2G35

IG21

IG19

RES 3G31

100n 22p

2G34

47R

180R

3G30

4G08 FOR FLAVORS

CDS4C12GTA

100p

3G29

IG22

CDS4C12GTA

3G62-3 3 3G62-4 4

6 33R 5 33R

47p

RES 2G41

47p

RES 2G42

RES 6G18

CDS4C12GTA

47p

RES 2G43

CDS4C12GTA

RES 6G19

4K7

3G49

47p 47p

4K7

FG46

Î¦

(256x8) EEPROM

4K7

4u7 6G31

1226-02B-15S-FAE-02

BAS321 3G56

IG32

1 2 3

0 1 2

WC SCL

ADR SDA

7 6

FG43 4G09 RES

FG44 FG45

RES 6G08

3G61

100R

3G58 BAS321

100R

6G34

6G32

CLK-SCL

1n0

1K0 2G11

CDS4C12GTA

1G09

1n0

2G10

1K0

CDS4C12GTA 3G11

1G08 RES 6G07

3G12

FG11

RIGHT

BAS321

7G31 M24C02-WDW6

47K

100p

RES 2G44

600R

4K7 6G33

5G32

3G59

+5VDCOUT

3G60

FG37 FG38 FG39

22K

BAS321

7 33R 8 33R

7G32 BC847BW

3G63

EDID NVM VGA

5G31

4G00

3G62-2 2 3G62-1 1

K +3V3

FG36

2G47

2G50

2G37 LEFT

FOR ITV

4G07

IG05

RC2

FG09

3 FG42 7 8 FG10 1 MSJ-035-10A B AG PPO

IG04

30R 100p

RC1

5G01 FG23 2G24

FOR ITV

FG35

100n

5 4 2

100R

BAT54 FG34

WC-EEPROM-PNX5100_SPI-DI

5G00

H V-SYNC-VGA

2G46

HEADPHONE

CDS4C12GTA

RES 6G06

1G07

2G51 100u 4V

3G10

100u 4V

FOR ITV

6G36

FG31 FG32 FG33

3G50

1-1735446-1 FG22

+5V

1G30 1 9 2 10 3 11 4 12 5 13 6 14 7 15 8

RES 2G45

CVBS-OUT-SC2 100R RES

TO SIDE I/O

RES 6G20

FG29

CDS4C12GTA

47R 47R 47R

RES 6G35

3G44 3G43 3G45

3G27

100p

RES 2G09

1n0

2G08

1K0

H-SYNC-VGA

VGA CONNECTOR

1G34

1 2 3 4 5 6 7 8 9 10 11

30R

FG08

1G32 1G33

1M36

1G35

CDS4C12GTA

AUDIO-OUT-L AUDIO-MUTE AUDIO-OUT-R

IG03

3G08

I B-VGA

2G48 100n

FG21

owner.

RES 6G05

1G06

FG06

AUDIO-IN5-R

100R

100p

FG19

CDS4C12GTA

100p

2G20

100p

2G22

2G19

FG20

G-VGA

AUDIO-IN5-L

100p

1n0

2G06

FG18

100R 3G14

(RED)

MTJ-032-37BAA-432 NI 8 9 1G20-3 7 RED FG07

FRONT-C

FRONT-Y_CVBS

3G13

FG17

1K0

CDS4C12GTA

1G05

RES 6G04

4G04 4G05

3G06

J RIGHT

HP_ROUT

2G21

FG05 (WHITE)

LEFT MTJ-032-37BAA-432 NI 5 6 1G20-2 4 WHITE

RES 2G07

RES 6G17

RESERVED IG02

(YELLOW)

CDS4C12GTA

LCD-SCL HP_LOUT

1G20-1 1 YELLOW

R-VGA

AUDIO-IN5-R

1G31

RES 6G37

100p

2G49

1G36

FOR /32 & /82

AUDIO-IN5-L

1G04

CVBS MTJ-032-37BAA-432 NI 2

is prohibited without the written consent of the copyright

7G01 BC847BW

FRONT-C FG04

IG18

4K7

1G37

3G28-2

FRONT-Y_CVBS FG03

1G21

100n

FG02

IG20 2G33

Y/CVBS

MDC-013V1-B

8 3G28-1 1

10p

FG47

SPDIF-OUT

100p

RES 6G02

1G02 2G04 2

+3V3

4K7

2G18

100p RES

RES 3G42

2G32

SIDE IO

1K0 100K

1G14

RES 6G13

1n0

2G17

100p

RES 2G00

2G31

AUDIO-IN3-R

1K0

SVHS IN

RES

2G16

100p

RES 3G19

100K

IG11

3G41

RES 100p

7G00-2 BC847BS(COL)

RES 6G15

AUDIO-IN3-L

SPDIF-OUT-1

6K8

DVI AUDIO INPUT

RES 6G14

100p IG10

1K0

FG16

1G25-3 RED MSP-303H-BBB-132-03 6

3 2G29

RES 2G14

CDS4C12GTA

RES 6G12

1G13

1n0

2G15

100p

RES 2G02

CDS4C12GTA

RES

1G01

RES 6G01

1n0 2G03

AUDIO-IN4-L

470R

150R

IG01

3G02

FG01

FG25

3G25

IG17

3G26

A-PLOP 3G18

IG15

3G24

1u0

AUDIO-IN4-R

1K0 FG15

IG14

2G28

AUDIO-OUT-R

3 3G28-3 6

CDS4C12GTA

RES

1G00

2G01

3 2

RES 6G00

1n0

IG00

3G00

AV3-PR

CDS4C12GTA

1G12

RES 6G11

FG00 1G18 MSJ-035-29D PPO (PHT) 1 FG27

7G00-1 BC847BS(COL)

FG14

MSP-636H2-01

IG16

100n

3 2 1

1G25-2 WHITE MSP-303H-BBB-132-03 4

FG24

470R

6K8 RES 2G13

RES

3G21

150R

3G22

AV3-PB

CDS4C12GTA

1G11

IG13

3G20

1u0

FG13

6G10

IG12

2G25

AUDIO-OUT-L

7 6

RES 2G12

6G09

AV3-Y

CDS4C12GTA

1G10

RES

FG12

12 11 10

100p

YPBR / SIDE IO / S-VIDEO

N DATA-SDA

K O

O CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871 2

" XG00 ~ XG99"

2008-10-17

2009-01-16

CHECK

SUPERS. DATE

2008-10-17

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

2009-01-16 2008-12-16

**** *** *****

1 1

3139 123 6443

TV543_2K9

NAME Vincent Yap / Lee CW / Hor SL SV

-- -- --

1G00 C3 1G01 D3 1G02 E3 1G04 F3 1G05 G4 1G06 H4 1G07 I4 1G08 J4 1G09 J5 1G10 A9 1G11 B9 1G12 C9 1G13 C9 1G14 D9 1G15 B15 1G16 C15 1G17 E16 1G18 C2 1G20-1 G3 1G20-2 G3 1G20-3 H3 1G21 I2 1G22 A7 1G25-1 D16 1G25-2 A15 1G25-3 C15 1G30 H11 1G31 F13 1G32 G13 1G33 G13 1G34 H13 1G35 H13 1G36 F4 1G37 F2 1M36 G9 2G00 D4 2G01 C3 2G02 C4 2G03 D3 2G04 E4 2G06 G5 2G07 G5 2G08 H5 2G09 H5 2G10 J4 2G11 J6 2G12 A10 2G13 B10 2G14 C10 2G15 C8 2G16 C10 2G17 D8 2G18 D10 2G19 G8 2G20 G8 2G21 G9 2G22 G9 2G24 I9 2G25 B12 2G26 B13 2G27 B14 2G28 C12 2G29 C13 2G30 C14 2G31 D13 2G32 D12 2G33 D12 2G34 E14 2G35 E14 2G36 E15 2G37 I9 2G41 F14 2G42 G14 2G43 G14 2G44 H14 2G45 H14 2G46 I13 2G47 I14 2G48 H13 2G49 F4 2G50 I7 2G51 I7 3G00 C4 3G02 D4 3G06 G5 3G08 H5 3G10 I4 3G11 J4 3G12 J5 3G13 G9 3G14 G9 3G18 C9 3G19 C10 3G20 B13 3G21 B14 3G22 B12 3G24 C13 3G25 C14 3G26 C12 3G27 H8 3G28-1 D13 3G28-3 E13 3G28-4 D12 3G29 E14 3G30 E13 3G31 E15 3G41 D9 3G42 D10 3G43 H8 3G44 H8 3G45 H8 3G49 H14 3G50 H14 3G56 I14 3G58 J15 3G59 I16 3G60 I17 3G61 J16 3G62-1 J6 3G62-2 J6 3G62-3 J6 3G62-4 J6 3G63 I15 4G00 J3 4G04 F9 4G05 G9 4G07 J3 4G08 E12 4G09 I16 5G00 I9 5G01 I9 5G02 E15 5G31 I13 5G32 I13 6G00 C3 6G01 D3 6G02 E4 6G04 G4 6G05 H4 6G06 I4 6G07 J4 6G08 J5 6G09 A9 6G10 B9 6G11 C9

6G12 C9 6G13 D9 6G14 B14 6G15 C14 6G16 E15 6G17 F13 6G18 G13 6G19 G13 6G20 H13 6G31 I14 6G32 J14 6G33 I17 6G34 J17 6G35 H13 6G36 H12 6G37 F4 7G00-1 B13 7G00-2 C13 7G01 D13 7G31 I15 7G32 I16 FG00 C3 FG01 D3 FG02 E3 FG03 F3 FG04 F3 FG05 G4 FG06 H4 FG07 H3 FG08 I4 FG09 J4 FG10 J3 FG11 J5 FG12 A9 FG13 B9 FG14 C9 FG15 C8 FG16 D8 FG17 G8 FG18 G8 FG19 G9 FG20 G8 FG21 H9 FG22 I9 FG23 I9 FG24 B14 FG25 C14 FG27 C2 FG28 E16 FG29 H9 FG31 H12 FG32 H12 FG33 H12 FG34 H12 FG35 I12 FG36 I12 FG37 I12 FG38 I12 FG39 I12 FG41 E15 FG42 J3 FG43 I16 FG44 J16 FG45 J16 FG46 I15 FG47 E12 IG00 C4 IG01 D4 IG02 G6 IG03 H6 IG04 I7 IG05 I7 IG10 C10 IG11 D10 IG12 A13 IG13 A13 IG14 C13 IG15 C13 IG16 B13 IG17 C13 IG18 D13 IG19 E15 IG20 D12 IG21 E14 IG22 E13 IG32 J15

17 18440_513_090224.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 105

SSB: HDMI

HDMI

14 16

15 17

17 20

FH01

5H01

FH38

OUT COM

VDDO_3V3

+3V3 30R

10u

100n

2H38

+3V3 2H40

7H01 LD1117DT18

RESERVED

1u0

2H07

30R

10u

5H04

22u 2H37

2H39

FH40

5H06

DC1R019JBAR190

FH21

BRX-5V BRX-5V BRX-HPD

22 23 24 25 26 27 28 29

100R

50 49

RES

3H20

1K0 47

ARXC+ ARXCARX0+ ARX0ARX1+ ARX1ARX2+ ARX2-

14 13 17 16 20 19 23 22

FH08

DRX0DRXC+ DRXCCEC

FH06 FH07 21 20 23 22

47K

DRX-DDC-CLK DRX-DDC-DAT

FH04 FH05 3H11

DRX1DRX0+

FH09

DRX-5V DRX-5V DRX-HPD

DC1R019JBAR190

BRXC+ BRXCBRX0+ BRX0BRX1+ BRX1BRX2+ BRX2-

33 32 36 35 39 38 42 41

CRXC+ CRXCCRX0+ CRX0CRX1+ CRX1CRX2+ CRX2-

63 62 66 65 69 68 72 71

DRXC+ DRXCDRX0+ DRX0DRX1+ DRX1DRX2+ DRX2-

81 80 84 83 87 86 90 89

SCL I2C SDA 0 SEL 1 INT HP_CTRL

+ + + + + + + + + + + + -

1u0

2H42

1u0

2H36

OUT

DDC

D0 D1

R12K

5V CLK RXA DDC DAT HPD

C D0

5V CLK RXB DDC DAT HPD

RXB D1 D2

RXC DDC

D0 RXC D1 RXD DDC D2

CDEC

5V CLK DAT HPD 5V CLK DAT HPD

DDC STBY CEC

RXD D1

TEST

FH49 FH50

FH46 3H15

3 4H02-3 6 2 4H02-2 7 1 4H02-1 8

21 20 23 22

FH32

2H26

100n 2H20

100n

F H

100n

29 31 30 28

BRX-5V BRX-DDC-CLK BRX-DDC-DAT BRX-HPD 2H25

100n

59 61 60 58

CRX-5V CRX-DDC-CLK CRX-DDC-DAT CRX-HPD

2H28 100n 77 79 78 76

DRX-5V DRX-DDC-CLK DRX-DDC-DAT DRX-HPD

44 54

FH43 FH44

FH42

CEC

6H01 BAT54 COL RES

100K 1n0 100n

5H07

3H68

33R

4R7

7600-4 PNX85439E

DDC-SCL DDC-SDA RREF-PNX85XX

C15 D15 3H64 1%

12K

CRX1CRX0+

CRX-DDC-CLK CRX-DDC-DAT

CEC-HDMI 21 20 23 22 25 24 26

RX0RX0+

RES 4H08 RES 3H58

CRX-5V CRX-5V CRX-HPD

FH33

100R 4H10

CEC +3V3-STANDBY

4H11

7H10 BC847BW RES

RES 3H60

3H59 IH48

7H09 BSH111 3

IH34 2

100R

RX1RX1+

FH15

4H12 RES

RX2RX2+ RXCRXC+

22K HDMI SIDE HDMI 1 HDMI 2

CONNECTOR HORIZONTAL HORIZONTAL HORIZONTAL

ITEM NO 1H03 1H05 1H04

HDMI 1 HDMI 2 HDMI 3

VERTICAL VERTICAL VERTICAL

1H01 1H00 1H02

HDMI PNS 1+1 HDMI PNS 2+1 HDMI FRAME 3+1 Y Y Y N N N N N N Y N N

Y Y N

FLAVORS 2+1 32"_42" Y Y Y

FLAVORS 2+0 22" N Y Y

N N N

Y Y Y

C16 B18 B17

HDMI_DV

DDC_SCL_B DDC_SDA_B HDMI_RREF DV P HDMI_RX0_A N P HDMI_RX1_A N

B6 A6 E7 D7 C7 B7 A7 E8 D8 C8

" XH00 ~ XH99 "

A8 E9 B4 A4 E5 D5 C5 B5 A5 E6 D6 C6

J N

********

PCB SB SSB BD

-- -- --

2008-10-17

2009-01-16

SUPERS. CHECK

DATE

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

2009-01-16 2008-12-16

**** *** ***** 2008-10-17

1 1

3139 123 6443

TV543_2K9

NAME Dave Tan YH

K SETNAME

3PC332

B8 C9 D9

O DC343514

CLASS_NO

CLK FID HS

N N N

CHN

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871 3 1 2 4

DDC_SCL_A DDC_SDA_A

0 1 2 3 B16 P 4 HDMI_RX2_A DV_UVIN B15 N 5 6 A19 P 7 HDMI_RXC_A A18 N 8 9 B14 P HDMI_RX0_B B13 N DV_VALID DV_VS A13 P HDMI_RX1_B A12 N 0 1 B12 P 2 HDMI_RX2_B B11 3 N 4 DV_YIN A15 P 5 HDMI_RXC_B A14 6 N 7 D19 8 HOT_PLUG_A E15 HOT_PLUG_B 9

CRXCCEC

FH30 FH31

FH48

A17 A16

CRX0CRXC+

FH28 FH29

+5V

CRX2CRX1+

DC1R019WBER220

VDDH_3V3

RES 3H67 2H44 2H45

CRX2+

47K

1 4H01-1 8 4 4H02-4 5

of its I2C address from 0xC0 to 0xCE

ARX-5V ARX-DDC-CLK ARX-DDC-DAT ARX-HPD

FH47

1H01 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

4 4H01-4 5 3 4H01-3 6 2 4H01-2 7

DC1R019JBAR190

Requires reprogramming

DDC-SDA DDC-SCL

12K 1% 100n

2H27 10 12 11 9

Replacing the TDA 9996

C18 E19

47K 3H14

I2C Address = 0xCE

1 7 18 26 37 43 56 67 73 85 92 98 1H05

DDC-SCL DDC-SDA

Remark for service:

HDMI CONNECTOR 1

For FLAVORS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

100n 2H19

100n

2H22

RXC+ RXCRX0+ RX0RX1+ RX1RX2+ RX2-

5 6

CLK DAT PD

RXA

2 3 99 100 96 97 93 94

VSS

100n 2H18

100n 2H17

100n 2H16

100n 2H15 100n

+5V + + D0 + D1 + D2 C

MODE + + + + -

55 VDDS_3V3

VDDH_3V3

VDDO_3V3

15 21 34 40 64 70 82 88

24 75

46 VDDC_3V3

VDDO_1V8

Î¦

FH36

3H13

is prohibited without the written consent of the copyright owner.

DRX2DRX1+

47K 3H12

DRX2+

XTAL OUT

1K8

SCL-SSB 3H65 SDA-SSB 3H66

1K8

+3V3

1H03 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

100n

100n 2H12

100n 2H11

100n 2H09

100R FH37

HDMI CONNECTOR SIDE

502382-0370

FI-RE21S-VF-R1300

100n 2H14

2H13 BRX-5V BRX-HPD

DC1R019WBER220

2H23

BRX-DDC-CLK BRX-DDC-DAT

100n

FH19 FH20 21 20 23 22 25 24 26

BRXCCEC

3H01

BRX-DDC-CLK BRX-DDC-DAT

1H07

3H02

FH17 FH18

BRX0BRXC+

RES 1 2 3

2H35

FH16

BRXCCEC

BRX1BRX0+

7H11 TDA9996

100n

BRX0BRXC+

BRX2BRX1+

4H19

VDDH_1V8

BRX1BRX0+

BRX2+

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

VDDC_1V8

BRX2BRX1+

21 20 23 22

1H06

2H34

1 4H04-1 8

100n 2H10

VDDS_3V3

HDMI-ITV

47K

3 4H04-3 6 2 4H04-2 7

VDDO_3V3

BRX2+

3H09

1 4H03-1 8 4 4H04-4 5

VDD_1V8 ARX-5V ARX-5V ARX-HPD

FH26

100n 2H04

21 20 23 22 25 24 26

100n 2H21

FH24 FH25

1H00

3 4H03-3 6 2 4H03-2 7

1u0

ARX-DDC-CLK ARX-DDC-DAT

FH22 FH23

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

4 4H03-4 5

VDDH_3V3

HDMI CONNECTOR 2

1H04 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

22u 2H01

2H43

2H02

470n

100n

2H47

2H00

22u 16V

VDDH_3V3 30R

8 45 91

For FLAVORS

ARXCCEC

47K 3H10

FH41

5H03

ARX0ARXC+

DC1R019WBER220

30R

ARX1ARX0+

2H03

FH27

30R

47K

ARX2ARX1+

3H07

ARX2+

47K 3H08

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

VDD_1V8

470n 2H05

1H02

FH00

5H00

220u 25V

+1V8-PNX85XX

2H06

VDDS_3V3

HDMI CONNECTOR 3

1H00 D3 1H01 H3 1H02 A3 1H03 F3 1H04 D2 1H05 H2 1H06 D5 1H07 D7 2H00 B5 2H01 B8 2H02 B6 2H03 D7 2H04 D7 2H05 B10 2H06 B9 2H07 A11 2H09 D8 2H10 D8 2H11 D8 2H12 D8 2H13 C10 2H14 C10 2H15 C11 2H16 C11 2H17 C11 2H18 C11 2H19 C11 2H20 C12 2H21 D10 2H22 D11 2H23 D10 2H25 G11 2H26 F11 2H27 F11 2H28 G11 2H34 H12 2H35 H12 2H36 B11 2H37 A7 2H38 A6 2H39 A7 2H40 A5 2H42 B11 2H43 B8 2H44 H11 2H45 H11 2H47 B5 3H01 E12 3H02 E13 3H07 C4 3H08 C4 3H09 E4 3H10 E4 3H11 G4 3H12 G4 3H13 I4 3H14 I4 3H15 F11 3H20 E7 3H58 J10 3H59 J12 3H60 J10 3H64 I15 3H65 E7 3H66 E7 3H67 H11 3H68 H12 4H01-1 H2 4H01-2 H2 4H01-3 H2 4H01-4 H2 4H02-1 I2 4H02-2 I2 4H02-3 I2 4H02-4 H2 4H03-1 D2 4H03-2 D2 4H03-3 D2 4H03-4 D2 4H04-1 D2 4H04-2 D2 4H04-3 D2 4H04-4 D2 4H08 J11 4H10 J10 4H11 J10 4H12 J12 4H19 D8 5H00 B6 5H01 A10 5H03 B10 5H04 A7 5H06 B10 5H07 H11 6H01 G12 7600-4 H16 7H01 A6 7H09 J11 7H10 J10 7H11 D8 FH00 B8 FH01 A11 FH04 G4 FH05 G4 FH06 G4 FH07 G4 FH08 G3 FH09 G3 FH15 J13 FH16 D4 FH17 E4 FH18 E4 FH19 E4 FH20 E4 FH21 E3 FH22 B4 FH23 C4 FH24 C4 FH25 C4 FH26 C3 FH27 C3 FH28 I4 FH29 I4 FH30 I4 FH31 I4 FH32 I3 FH33 I3 FH36 H9 FH37 E8 FH38 A7 FH40 B11 FH41 B11 FH42 H11 FH43 G11 FH44 G11 FH46 F11 FH47 H11 FH48 I15 FH49 E11 FH50 E11 IH34 J11 IH48 J11

17 18440_514_090224.eps 090303

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 106

SSB: Ethernet 1

3 2

8 6

13 10

17 13

ETHERNET

4 3N0L-4 5

+3V3-ET-DIG

3 3N0N-3 6

33R 3N0N-4

3N0L-1

3N0N-1 IN0P 3N0N-2 1 8 7 2

22R

33R

3N0G

100R

+3V3-ET-DIG

PCI-REQ

RESET-ETHERNET

DEVSEL

TXE

REQ

MCS

RST

MRD

100n 3 100R

100R 3N0T-3

4 5

3N0T-4

31 13

RESET-ETHERNET

2N0M

100R

REGE

+3V3

131

EEDO

IN0K

100n

2N11

2N0Y

2N0Z

100n

2N10

3N0W 1K0

IN0W

IN0Y

IN0Z

RES

IN0A

3N0J 270R 6N00 BAS316 6N01

RES

BAS316 IN10

3N0K IN0B 220R

MA<0:15> 41 50

RESERVED

127 31

K 136

114

103

VSS

7N04-2 DP83816AVNG 34 36 37 42 43

100n

10u 16V

10u 2N1C

IN0N

2N1B

142 143 144 1 2 3 7 10 11 12 14 15 22 23 24 25

LEDACT LED10LNK LED100LNK EEDI EECLK MA5 0 1 RXD 2 3 RXER RXDV 0 1 TXD 2 3

AD<0:31> DATA

2N0N

132 133 134 135 138 139 140 141

0 CFGDIS

MD<0:7>

2N12

1 CMD/ BE

121 120 119 118 116 115 113 112 110 109 108 106 105 104 102 101 88 87 86 83 82 81 79 78 74 73 72 71 70 68 67 66

128

EESEL 0 1 2 3

111 100 89 75

PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3

2N14 100n

+3V3-ET-ANA 220R

130

1u0

IN18

5N07

129

MWR

2N13 100n

IN0C

+3V3-ET-ANA

2N15 100n

RXOE

2N16 100n

IDSEL

2N17 100n

137

117

107

TXCLK

IN19

10K

RXCLK

220R

2N0V

3N0Y

PCI-DEVSEL

GNT STOP

+3V3-ET-DIG 2

+3V3

25M

MDIO

IN17

5N06

MDC

FRAME

1M0 1N02

100n

PCI-STOP

SERR

3N0V

100n 2N0P

PCI-GNT

CRS

IN0M

4u7 6.3V

PERR

PCI-FRAME

COL

2N0Q

PCI-SERR

VREF

TRDY

IN0T

470R

IRDY

100n 3N0F

4u7 2N0W

PCI-PERR

PCI-AD23

is prohibited without the written consent of the copyright owner.

2N0R 93

PCI-TRDY

IN09 3N0T-2

PCI-IRDY

PCICLK PAR

2N0S

IN0V 17

1840420-1

22p

PCI-PAR

TPRDP TPRDM

ETHERNET CONNECTOR

2N0K

PCI-CLK-ETHERNET

3VAUX INTA

2N0L

10K

IN01

100n 13 14

TPTDM

3N0H

IRQ-PCI

2N0T

1 2 3 4 5 6 7 8

22p

2N0U

1N00

IN05 IN06 IN15 IN08 IN07 IN16

TPTDP

PWRGOOD

122

100n

AUXVDD

MacPhyter II 10/100 Mb/s

PMEM CLKRUN

123

3N0L-2 22R

+3V3-ET-ANA PCIVDD

IAUXVDD

33R

7N04-1 DP83816AVNG

33R

+3V3-ET-ANA

22R

100R 3N0T-1

22R 3N0L-3

19 1N00 B11 1N02 D8 2N0K D8 2N0L D8 2N0M E3 2N0N H4 2N0P D11 2N0Q D10 2N0R B9 2N0S C8 2N0T B10 2N0U B9 2N0V E10 2N0W E11 2N0Y D13 2N0Z D13 2N10 D12 2N11 D12 2N12 D12 2N13 D12 2N14 D12 2N15 D11 2N16 D11 2N17 D11 2N1B H3 2N1C H3 3N0F C7 3N0G D3 3N0H C7 3N0J F8 3N0K F9 3N0L-1 A8 3N0L-2 A9 3N0L-3 A8 3N0L-4 A8 3N0N-1 A9 3N0N-2 A9 3N0N-3 A9 3N0N-4 A9 3N0T-1 C9 3N0T-2 C9 3N0T-3 C9 3N0T-4 C9 3N0V C8 3N0W E8 3N0Y E1 5N06 C10 5N07 D10 6N00 F8 6N01 F8 7N04-1 B3 7N04-2 H7 IN01 C3 IN05 B10 IN06 B10 IN07 B10 IN08 B10 IN09 C11 IN0A F9 IN0B F9 IN0C E3 IN0K E7 IN0M C7 IN0N H3 IN0P A9 IN0T C8 IN0V C8 IN0W F7 IN0Y F7 IN0Z F7 IN10 F8 IN15 B10 IN16 B10 IN17 C11 IN18 D11 IN19 D1

NC1 NC2 NC3 NC4 NC5

NC6 NC7 NC8 NC9 NC10

84 85 124 125 126

I MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871

O CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

-- -- --

2008-10-17

2009-01-16

SUPERS. CHECK

DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Dave Tan YH

P 25

**** *** ***** 2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18440_515_090224.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 107

SSB: PCMCIA 1

PCMCIA

IK18

5K00

+3V3_BUF 2K07

33R

10u

+3V3

IK45

3K07 10K

MOSTRTA IK08 PCMCIA-VCC-VPP

MOVALA IK09 MDO0

3K08

10K

3K09

10K

3K10-2 10K 7 2

IK11

3K10-1 10K 8 1

MDO2 IK12 MDO3

3K28

IK13

3K11-4 10K 5 4 3K11-3 10K 6 3

IK15

3K11-2 10K 7 2

IK16

3K11-1 10K 8 1

MDO5 MDO6 MDO7

17 16 15 14 13 12 11

3K25-4 3K24-1 3K24-2 3K24-3 3K24-4

5 8 7 6 5

4 1 2 3 4

47R 47R 47R 47R 47R

100n

2K06

CA-MOCLK_VS2

CA-MOVAL CA-MDO(0) CA-MOSTRT CA-MDO(1) CA-MDO(2)

7K02 74LVC245A 1

1 4 3 2 1 2 1 4

2 5 6 7 8 7 8 5

CA-MDO(0:7) CA-MDO(3) CA-MDO(4) CA-MDO(5) CA-MDO(6) CA-MDO(7) CA-MDO(1) CA-MDO(2) CA-MDO(0)

47R 47R 47R 47R 47R 47R 47R 47R

MOVALA MOSTRTA

MOCLKA

3K14

47R

CA-MOVAL

3K12-3

47R

CA-MOSTRT

3K17

47R

CA-MOCLK_VS2

+3V3_BUF

CA-RST

20 10

6 47R

RESERVED 3K27 3K13-4 3K13-3 3K13-2 3K13-1 3K12-2 3K12-1 3K12-4

MDO3 MDO4 MDO5 MDO6 MDO7 MDO1 MDO2 MDO0

10K

IK14

MDO4

3K25-3 3

IK46

CA-ADDEN

3K10-3 10K 6 3

IK10 MDO1

3 4 5 6 7 8 9

CA-WAIT

PCI-CBE1 PCI-CBE2 PCI-AD16 PCI-AD17 PCI-AD19 PCI-AD22 PCI-AD23

3 4 5 6 7 8 9

3EN1 3EN2 G3 1 2

PCI-AD18

17 16 15 14 13 12 11

CA-WE CA-OE CA-CE2 CA-CE1 CA-REG CA-IORD CA-IOWR

IK07

MOVALA MDO0 MOSTRTA MDO1 MDO2

1 2

100n

IK06 MOCLKA

2K05

3K06 10K

+3V3_BUF

7K00 74LVC245A 1 CA-ADDEN

FK04

PCI-AD7

PCI-AD6 PCI-AD5 PCI-AD4 PCI-AD3 PCI-AD2 PCI-AD1 PCI-AD0

3 4 5 6 7 8 9

100n

3K05 10K

IK05

PCI-AD25 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31 PCI-AD24

3EN1 3EN2 G3

2K03

IK04

CA-VS1

PCI-AD26

17 16 15 14 13 12 11

CA-CD2

MOCLKA

3K04 10K

1 2

10K

IK03

3 4 5 6 7 8 9

10K

CA-CD1

PCMCIA-D1 PCMCIA-D3 PCMCIA-D4 PCMCIA-D5 PCMCIA-D6 PCMCIA-D7 PCMCIA-D0

3K22

3K03 10K

PCMCIA-D2

3K15

IK02

7K05 74LVC245A 1

CA-DATAEN

3EN1 3EN2 G3

IRQ-CA

10K

3K02 10K

+3V3_BUF 3K22

3K01 10K

7K03 74LVC245A 1

IK41 CA-DATADIR

3EN1 3EN2 G3 1 2

PCMCIA-A7

17 16 15 14 13 12 11

PCMCIA-A6 PCMCIA-A5 PCMCIA-A4 PCMCIA-A3 PCMCIA-A2 PCMCIA-A1 PCMCIA-A0

MPC-01 PBT

H MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871 1

PCI-AD14

PCI-AD13 PCI-AD12 PCI-AD11 PCI-AD10 PCI-AD9 PCI-AD8

3 4 5 6 7 8 9

3K18 10K

3EN1 3EN2 G3 1 2

PCMCIA-A14

17 16 15 14 13 12 11

PCMCIA-A13 PCMCIA-A12 PCMCIA-A11 PCMCIA-A10 PCMCIA-A9 PCMCIA-A8

1K00-A B2 1K00-B D2 2K00 B1 2K01 E10 2K02 A10 2K03 E12 2K04 G12 2K05 C12 2K06 A13 2K07 A9 2K08 A7 2K09 B7 3K00 B1 3K01 C5 3K02 C5 3K03 C5 3K04 C5 3K05 C5 3K06 C5 3K07 C5 3K08 D5 3K09 D5 3K10-1 D5 3K10-2 D5 3K10-3 D5 3K11-1 E5 3K11-2 E5 3K11-3 E5 3K11-4 E5 3K12-1 D8 3K12-2 D8 3K12-3 E8 3K12-4 E8 3K13-1 D8 3K13-2 D8 3K13-3 D8 3K13-4 D8 3K14 E8 3K15 C11 3K16 D3 3K17 E8 3K18 H11 3K19 F4 3K20 E11 3K21 G11 3K22 C11 3K23-1 B9 3K23-2 B9 3K23-3 A9 3K23-4 A9 3K24-1 C9 3K24-2 C9 3K24-3 C9 3K24-4 C9 3K25-3 C9 3K25-4 C9 3K26 B9 3K27 D8 3K28 D5 3K29 A7 3K30 B7 5K00 A9 7K00 F12 7K01 H12 7K02 C12 7K03 A12 7K04 A8 7K05 C8 FK00 G3 FK02 D3 FK04 F4 IK00 C5 IK01 C5 IK02 C5 IK03 C5 IK04 C5 IK05 C5 IK06 C5 IK07 D5 IK08 D5 IK09 D5 IK10 D5 IK11 D5 IK12 D5 IK13 E5 IK14 E5 IK15 E5 IK16 E5 IK17 D3 IK18 A9 IK41 B11 IK45 B11 IK46 D11 IK47 H11

H M

IK47 10

CA-ADDEN

7K01 74LVC245A 1

100n

2K04

G 10K

G 3K21

is prohibited without the written consent of the copyright owner.

CA-MDO(4) CA-MDO(5) CA-MDO(6) CA-MDO(7)

IK00 IK01

CA-INPACK

FK02

10K

CA-MDO(3)

47R 47R 47R 47R

10K

PCMCIA-VCC-VPP

CA-WAIT

MPC-01 PBT 1K00-B ROW_B GND3 35 CD1 CA-CD1 36 D11 MDO3 37 D12 MDO4 38 D13 MDO5 39 D14 MDO6 40 D15 MDO7 41 CE2 CA-CE2 42 VS1 CA-VS1 43 IORD CA-IORD 44 IOWR CA-IOWR 45 A17 CA-MISTRT 46 A18 CA-MDI0 47 A19 CA-MDI1 48 A20 CA-MDI2 49 A21 CA-MDI3 50 VCC2 51 PCMCIA-VCC-VPP VPP2 52 A22 CA-MDI4 53 A23 CA-MDI5 54 A24 CA-MDI6 55 A25 CA-MDI7 56 VS2 MOCLKA 57 RESET CA-RST 58 WAIT CA-WAIT 59 INPACK CA-INPACK 60 REG CA-REG 61 BVD2|SPKR MOVALA 62 BVD1|STSCHG MOSTRTA 63 D8 MDO0 64 D9 MDO1 65 D10 MDO2 66 CD2 CA-CD2 67 GND4 68 FK00 71 72

IK17

5 47R 6 7 8 2

3K20

3 2 1 1

10u

3K23-4 4

3K23-3 3K23-2 3K23-1 3K26

2K01

17 16 15 14 13 12 11

+3V3

PCMCIA-VCC-VPP CA-MIVAL CA-MICLK PCMCIA-A12 PCMCIA-A7 PCMCIA-A6 PCMCIA-A5 PCMCIA-A4 PCMCIA-A3 PCMCIA-A2 PCMCIA-A1 PCMCIA-A0 PCMCIA-D0 PCMCIA-D1 PCMCIA-D2 3K16

1 2

3 4 5 6 7 8 9

100n

PCMCIA-D3 PCMCIA-D4 PCMCIA-D5 PCMCIA-D6 PCMCIA-D7 CA-CE1 PCMCIA-A10 CA-OE PCMCIA-A11 PCMCIA-A9 PCMCIA-A8 PCMCIA-A13 PCMCIA-A14 CA-WE IRQ-CA

MDO4 MDO5 MDO6 MDO7

2K09

22u

0R4 2K00

MDO3

+3V3_BUF

100K

PCMCIA-VCC-VPP

+5V

ROW_A 1K00-A GND1 1 D3 2 D4 3 D5 4 D6 5 D7 6 CE1 7 A10 8 OE 9 A11 10 A9 11 A8 12 A13 13 A14 14 WE|P 15 RDY|BSY 16 VCC1 17 VPP1 18 A16 19 A15 20 A12 21 A7 22 A6 23 A5 24 A4 25 A3 26 A2 27 A1 28 A0 29 D0 30 D1 31 D2 32 WP|IOIS16 33 GND2 34 69 70

3K19

3K00

3EN1 3EN2 G3

10u

CABLE CARD INTERFACE

2K02

(POD IS THE EQUIVALENT OF COMMON INTERFACE)

7K04 74LVC245A 1

10K

100n

POD : SUPPLY / CONTROL

3K22

2K08

O CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

" XK00 ~ XK99 "

-- -- --

2008-10-17

2009-01-16

SUPERS. CHECK

DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Li LingHuan

**** *** *****

2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18440_516_090224.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 108

SSB: Class-D 4

CLASS-D

30R 5L08

4L02

220n

3L14-1 8

220n

2 15K

1 15K

3L14-2 7

220n

4 15K

3 15K 3L14-3 6

2L26

2L22

220n 2L09

220n

IL07

2L11

LEFT-SPEAKER

C R

8 9

GND_HS

220n

PGND AGND

7L10-2 TPA3123D2PWP

37 36 35 34

2L21

2L27

3L10-2 2

LEFT-SPEAKER

1L50

GNDSND

1L53

10n

5L10

1736

GNDSND

FL02

1735446-3 RIGHT-SPEAKER RIGHT-SPEAKER

6 CHN

1 2 3 4

FL07

1735446-4

1 2 3

220R

1L54

10n

2L35

220R GNDSND

GNDSND

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871

1735

GNDSND

TO SUBWOOFER FL01

2n2

RES 2L33

2L36

LEFT-SPEAKER

TO SPEAKERS FL05 FL06

5L09 10n 1L51

GNDSND

1L52

2L25

3L11-4 5

GNDSND

2n2

10n

GNDSND 10u

2L14

VIA

2n2

GNDSND

2L13

VIA

3L11-3 6

GNDSND

VIA

7 1K5

100K

VIA

8 1K5

3L06-3

100K 2L02

26 27 28 29

3L03 100R 2L01

3L11-2 2

RIGHT-SPEAKER

3L06-1

7L03-2 BC847BS(COL) 4

GNDSND

3L11-1 1

GNDSND

VIA

30 31 32 33

100K

1u0

100K

RES 2L38

FL03 3L06-2 IL41 4 2 7

4 1K5

3 3L06-4

3 1K5

AUDIO-MUTE

40 39 38

4K7

GNDSND

3L10-1 1

3L10-4 4

CL10 CL12

LEFT-SPEAKER

5L04 220R

25V 470u

22u

VCLAMP BYPASS MUTE SD

MUTE

IL05

5L01 IL31

A-STBY

3L14-4 5

1 3

19 20

10 12

BSL

GNDSND

RIGHT-SPEAKER 220R

25V 470u

8 15K

22u

5L05

IL09 L

11 7 4 2

IL08

2L12

7 15K

3L18

FL17 FL18 FL19 FL20

RES 2L37

1u0 1u0

5 15K

AUD_GND MUTE A-STBY

2L16 2L17

IL06

5L02

3L10-3 3

AUD_GND

220n

IL32

OUT

0 GAIN 1

1u0

GNDSND GNDSND

18 17

CL11

2L10

BSR

6 15K

ADAC(1)

100p FL16 1u0

IL10

PVCC

CLASS-D AUDIO AMP

GNDSND

2L29 2L23

4L01

IL16

Î¦

FL15

GNDSND

13 14

100p 1u0

FOR FLAVORS 22"

23 24

2L28 2L24

IL36

AVCC

2L19

10u 35V

2L05

NOT FOR FLAVORS 22"

ADAC(2)

NOT FOR FLAVORS 22"

FL09

7L10-1 TPA3123D2PWP

3L17

C B

GNDSND

2L08

220n

IL12 22K

RES 4L03

2L06

3L16

2L07

2L20

4R7

IL11

FL14

3L09

7 DC343514

FL08

7L03-1 BC847BS(COL) +AUDIO-POWER

+AUDIO-POWER

A B

5L07

220u 35V

30R

1735 E8 1736 E5 1L50 E7 1L51 E7 1L52 F7 1L53 E4 1L54 F4 2L01 D3 2L02 E2 2L05 B2 2L06 B2 2L07 A4 2L08 B4 2L09 C4 2L10 B4 2L11 C6 2L12 B6 2L13 F7 2L14 E7 2L16 C2 2L17 C2 2L19 B4 2L20 A4 2L21 D6 2L22 B6 2L23 C2 2L24 B2 2L25 E7 2L26 B6 2L27 D6 2L28 B2 2L29 C2 2L33 F4 2L35 F4 2L36 E4 2L37 C2 2L38 D2 3L03 D3 3L06-1 D2 3L06-2 D2 3L06-3 E1 3L06-4 D1 3L09 A1 3L10-1 D6 3L10-2 D5 3L10-3 D5 3L10-4 D5 3L11-1 F6 3L11-2 F6 3L11-3 E6 3L11-4 E6 3L14-1 B6 3L14-2 B5 3L14-3 B5 3L14-4 B5 3L16 B2 3L17 D1 3L18 C2 4L01 C1 4L02 C2 4L03 B2 5L01 C5 5L02 B5 5L04 C6 5L05 B6 5L07 A3 5L08 A3 5L09 E7 5L10 F4 7L03-1 A2 7L03-2 D3 7L10-1 B3 7L10-2 D4 CL10 D3 CL11 C1

CL12 D3 FL01 E5 FL02 F5 FL03 D2 FL05 E8 FL06 E8 FL07 E8 FL08 A4 FL09 B4 FL14 A2 FL15 B2 FL16 C2 FL17 C2 FL18 C2 FL19 C2 FL20 C2 IL05 C5 IL06 B5 IL07 C6 IL08 B6 IL09 C4 IL10 B4 IL11 B1 IL12 B2 IL16 C1 IL31 C4 IL32 B4 IL36 B1 IL41 D2

"XL00-XL99"

2008-10-17

SETNAME

2009-01-16

SUPERS. CHECK

********

DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Hor Siew Lee

PCB SB SSB BD

-- -- --

CLASS_NO 3PC332

**** *** *****

2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

13 18440_517_090224.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 109

SSB: Display Interface (Common) 1

2P82 B1 2P88 C2 2P89 D3 3P17 C8 3P18 C9 3P29 C3 3P30 C3 3P31 C4 3P32 C2 3P33 C3 3P34 D3 3P35 C4 3P36 D4 3P37 D5 4P26 A1 4P28 B1 4P29 B1 4P30 B1 4P31 B1 4P38 D8 4P39 B1 4P40 D4 7P05 C9 7P06 D8 7P07 C3 7P08-1 C5 7P08-2 C4 FP84 A1 FP99 A2 IP10 C9 IP11 D9 IP12 D8 IP16 C4 IP17 C4 IP18 C3 IP19 C3 IP20 D2

DISPLAY INTERFACE (COMMON) B

A RESERVED FOR +5V TCON FP84 2P82

+VDISP-IN

4P28 4P39

4P29

+12VD

4P30

+3V3

RESERVED

FROM

470p RES 4P40

7P06 BC847BW

1K0

3P37

3P18 7P05 BC847BW

RES 4P38

BACKLIGHT-BOOST

15K

2P89

1K0

1u0 3P36

IP20

RES 3P34

220R

4K7 2P88

+3V3

7P08-2 BC847BPN(COL) 3

12K 7P07 BC847BW

IP19

7P08-1 BC847BPN(COL) 1

IP17

4K7

3P32

BACKLIGHT-BOOST-IN

47K

3P35

27K 3P31

3P17

10K 3P30

RES 3P29

IP18

FROM

IP16

2K2

+12VD

4P31

RES 3P33

22u

+5V

TO FP85

4P26

IP10

BACKLIGHT-OUT

IP11

IP12

BACKLIGHT-IN

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571 CELL 12C : 8239_125_14871

E H

I CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

" XP00 ~ XP99 "

-- -- --

2008-10-17

2009-01-16

CHECK

SUPERS. DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Vincent Yap / Lee CW

**** *** *****

2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

13 18440_518_090224.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 110

SSB: Display Supply 1

2P29 A8 2P30 A8 2P31 B8 2P32 B8 2P33 B8 2P34 B8 2P35 B8 2P36 C8

1G50 B10 1G51 B15 1G52 A3 1R50 B1 2P01 B1 2P02 E4 2P03 B4 2P04 B4

2P37 C8 2P38 C8 2P39 C8 2P40 D8 2P41 D8 2P42 D8 2P43 E8 2P44 E8

4 2P61 B12 2P62 C12 2P63 C12 2P64 C12 2P65 C12 2P66 D12 2P67 D12 2P68 E12

2P53 C9 2P54 A12 2P55 A12 2P56 A12 2P57 B12 2P58 B12 2P59 B12 2P60 B12

2P45 E8 2P46 E8 2P47 F8 2P48 F8 2P49 F8 2P50 F8 2P51 G8 2P52 G8

7 2P86 F10 2P87 F10 2P90 D10 2P91 B4 2P92 D15 2P93 E10 2P94 C4 2P95 F3

2P77 G12 2P78 B14 2P79 B14 2P80 B14 2P81 F14 2P83 F4 2P84 F2 2P85 H4

2P69 E12 2P70 E12 2P71 E12 2P72 F12 2P73 F12 2P74 F12 2P75 F12 2P76 G12

3000 H7 3P01 A4 3P02 A4 3P07 B13 3P08 B13 3P09-1 F3 3P09-2 F2 3P09-3 H5

3P09-4 H4 3P10 F2 3P12 H4 3P13 F4 3P14 H2 3P15 H2 3P16 H7 3P20 E9

4P05 C2 4P06 C2 4P07 C2 4P08 C2 4P09 B2 4P10 B2 4P11 B4 4P12 B4

3P21 E9 3P24 H7 3P25 G3 3P26 H7 4P01 D2 4P02 D2 4P03 B2 4P04 C2

11 4P22 C15 4P23 C15 4P24 C15 4P25 F15 4P34 G8 4P35 H8 4P36 A4 4P37 E4

4P13 B4 4P14 B4 4P15 C10 4P16 C10 4P17 C10 4P18 C10 4P19 B15 4P20 C15

FP24 D4 FP25 D4 FP26 D4 FP27 A4 FP28 A4 FP29 B9 FP30 B10 FP31 C9

FP16 C4 FP17 C4 FP18 C4 FP19 D4 FP20 D4 FP21 D4 FP22 D4 FP23 D4

7P01 F2 7P02 F3 7P03 G4 7P04 F1 7P11 F1 FP01 B1 FP02 D1 FP15 C4

5P01 A2 5P02 A2 5P05 B9 5P06 B9 5P07 E14 5P08 F14 6P01 F4 6P02 G2

17 FP64 D13 FP65 D13 FP66 D13 FP67 D13 FP68 D13 FP69 D13 FP70 D13 FP71 D13

FP56 B14 FP57 C13 FP58 C13 FP59 C13 FP60 C13 FP61 C13 FP62 C13 FP63 D13

FP48 E9 FP49 E9 FP50 E9 FP51 E9 FP52 E9 FP53 E9 FP54 E9 FP55 B14

FP40 D9 FP41 D9 FP42 D9 FP43 D9 FP44 D9 FP45 D9 FP46 E9 FP47 E9

FP32 C9 FP33 C9 FP34 C9 FP35 C9 FP36 D9 FP37 D9 FP38 D9 FP39 D9

FP80 E13 FP81 E15 FP83 E4 FP85 B10 FP86 C14 FP87 F14 FP88 E10 FP89 E10

FP72 D13 FP73 E13 FP74 E13 FP75 E13 FP76 E13 FP77 E13 FP78 E13 FP79 E13

DISPLAY INTERFACE FOR /32 FHD 1G52 FI-RE51S-HF

TXA+ TXBTXB+

TXC-

TXC+

TXCLKTXCLK+

TXDTXD+

D H

RX51001E+

4P10

RX51001E-

4P03

RX51001D+

4P04

RX51001D-

4P06

RX51001C+

4P05

RX51001C-

4P07

RX51001CLK+

4P08

RX51001CLK-

4P01

RX51001B+

4P02

RX51001B-

NC NC 32

FP02

DF13-30DP-1.25V

2P31 2P32 TX1B+

TX1C+

RX51001E+ RX51001ERX51001D+ RX51001DRX51001C+ RX51001C-

FP21 FP22

RX51001CLK+ RX51001CLK-

FP23 FP24 FP25 FP26

+VDISP-OUT

TX1CLK+

4p7 4p7 RES

5P06

2P37 2P38

2P39 2P40 TX1E+

RES 4p7 4p7 RES

RES

TX2A+

4p7 4p7 RES

RES 2P43 2P44 TX2B+

+VDISP-OUT

7P05 PDTC114EU

47K 2P84

3P10 47R

4p7 4p7 RES

FP43 FP44 FP45 FP46 FP47 FP48

TX2CLKTX2CLK+

FP49 FP50

10n

TX2DTX2D+ TX2ETX2E+ SCL-DISP SDA-DISP

10u 16V

RES 4p7 4p7 RES

RES 3P20 RES 3P21

100R 100R

10n

FP51 FP52 FP53 FP54 FP88 FP89

RES 4p7 4p7 RES

TX3C+

2P60 2P61

RES 4p7 4p7 RES

2P62 2P63

RES 4p7 4p7 RES

TX3CLK+

41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

2P49 2P50 TX2D+

10p SDA-DISP SCL-DISP

RES 3P07 RES 3P08

100R 100R

TX3D+

10n FP86

TX3E2P64 2P65 TX3E+

RES 4p7 4p7 RES

TX4A2P66 2P67 TX4A+

RES 4p7 4p7 RES

TX4B+

RES 4p7 4p7 RES

TX4C2P70 2P71 TX4C+

FP57 FP58 FP59 FP60 FP61 FP62

TX3CLKTX3CLK+

FP63 FP64

TX3DTX3D+ TX3ETX3E+

FP65 FP66

RES 4p7 4p7 RES

60 61 58 59 56 57 54 55 52 53

RES

4P20

RES RES RES

4P22 4P23 4P24

FP67 FP68 RES 2P92

TX4B2P68 2P69

TX3ATX3A+ TX3BTX3B+ TX3CTX3C+

1G51 FI-RE51S-HF

FP55 FP56

TX3D-

TX4ATX4A+ TX4BTX4B+ TX4CTX4C+

FP69 FP70 FP71 FP72 FP73 FP74

TX4CLKTX4CLK+

FP75 FP76

TX4DTX4D+ TX4ETX4E+

FP77 FP78 FP79 FP80

10n

FP81 TX4CLK-

5P07

RES

TO DISPLAY

2P72 2P73 TX4CLK+

+VDISP-OUT

4p7 4p7 RES

33R 2P74 2P75

4p7 4p7 RES

FP87

33R

TX4D+

RES 4P25

5P08

TX4D-

RES

RES FOR DEVT PURPOSE

4p7 4p7 RES

TX3CLK-

TX2D-

SML-310

B E 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

D H

TO DISPLAY

TX2E+

RES 4p7 4p7 RES

2P76 2P77 TX4E+

4p7 4p7 RES

47K

RES 7P03 BC847BW 6

+3V3

PNX5100-BL-BOOST

4P35 FOR /82

47K

+3V3

2K2

100R FOR /82

BOOTMODE_PNX8543-BL-CTRL

BACKLIGHT-BOOST-IN

+3V3 FOR /32

3P16

FOR /82 10K

+3V3

RES 3P26

3P12

3P09-3

RES 3000

VDISP-SWITCH

3P15

PNX5100-LCD-PWR-ON

47K

100R

3P09-4

4P34 FOR /32

10n

3P14

2P85

PNX8543-LCD-PWR-ON_SPI-DI

PNX8543-BL-BOOST_SPI-CLK

10K

RES 4p7 4p7 RES

RES 2P51 2P52

RES 3P25

BZX384-C5V6

FOR /32

TX4ETX2E-

47K 6P02

TX2ATX2A+ TX2BTX2B+ TX2CTX2C+

6P01

2K2

8 3P09-1 1

1u0

FP39 FP40 FP41 FP42

10p

TX2CLK+ 3P13 220u 25V 2P83

3P09-2

FP37 FP38

TX2CLK2P47 2P48

TX1CLKTX1CLK+

RES 2P93

+VDISP-IN

FP31 FP32 FP33 FP34 FP35 FP36

4P15 4P16 4P17 4P18

RES 2P90

TX2B-

+VDISP-OUT_A

TX1ATX1A+ TX1BTX1B+ TX1CTX1C+

TX1DTX1D+ TX1ETX1E+

TX2A2P41 2P42

RES RES RES RES

RES 4p7 4p7 RES

TX1E-

TX2C+

7P02 SI3441BDV

FP85

30R

TX1D-

2P45 2P46

7P01 SI4835BDY RES

FP30

30R

RES 2P35 2P36

RX51001B+ RX51001BRX51001A+ RX51001A-

50 51 48 49 46 47 44 45 42 43

FP29

TX1CLK-

TX2C-

PDTA114EU 7P04

1G50 FI-RE41S-HF

5P05

2P58 2P59

IF 1G51 NOT USED

10p

RES 4p7 4p7 RES

RES

FP15 FP16 FP17 FP18 FP19 FP20

FP83 RES 4P37

RES 2P33 2P34

TX1D+ 10n

TX3B+

TX1C-

RX51002B+ RX51002BRX51002A+ RX51002A2P94

RES 4p7 4p7 RES

TX3C-

RX51002CLK+ RX51002CLK-

RES 2P95

is prohibited without the written consent of the copyright owner.

TX1B-

RX51002E+ RX51002ERX51002D+ RX51002DRX51002C+ RX51002C-

10n

SCL-DISP SDA-DISP

4P19

4P09

RES RES RES RES RES RES RES RES RES

2P80 RES

FP01

RES 4p7 4p7 RES

TX3B100R 100R 10p 10p

2P86 RES 2P87 RES

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

2P56 2P57

TX3A+

100n

TXA-

SINGLE LVDS

NC NC

RES 4p7 4p7 RES

2P81

1R50

FP27 FP28

4p7 4p7 RES

2P54 2P55

2P78 RES 2P79 RES

2P01 100n

+VDISP-OUT_A

2P29 2P30 TX1A+ 4P36 3P01 3P02 2P04 2P03 4P11 2P91 4P12 4P13 4P14

TX3A-

10p

FOR /32 HD

51 50 49 48 47 46 45 44 43 42 41 40 1_TXA1_TXA+ 39 38 1_TXB1_TXB+ 37 36 1_TXC1_TXC+ 35 34 1_TXCLK- 33 1_TXCLK+ 32 31 30 1_TXD1_TXD+ 29 28 1_TXE1_TXE+ 27 26 25 24 2_TXA2_TXA+ 23 22 2_TXB2_TXB+ 21 20 2_TXC2_TXC+ 19 18 2_TXCLK- 17 2_TXCLK+ 16 15 2_TXD14 2_TXD+ 13 2_TXE12 2_TXE+ 11 10 9 8 7 6 5 4 3 2 1

RES

60 58 56 54 52

2P53

30R

61 59 57 55 53

100n

+VDISP-OUT 30R 5P02

FOR /82

TX1A5P01

2P02

FOR /32

100n

H BACKLIGHT-IN

10K 3P24

PNX5100-BL-CTRL

1X01 REF EMC HOLE

7 FPA0 FPA1 FPA2 FPA3 FPA4 FPA5 FPA6 FPA7 FPA8 FPA9

EMC SPRING 1CAA BMIC-004-SN RES

10K

MULTI 12NC : 3139_123_64421 BD 12NC : 3139_123_64431 CELL 12NC : 8239_125_14781 1

8 FPB0 FPB1 FPB2 FPB3 FPB4 FPB5 FPB6 FPB7 FPB8 FPB9

FPC0 FPC1 FPC2 FPC3 FPC4 FPC5 FPC6 FPC7

FPD0 FPD1 FPD2 FPD3 FPD4 FPD5 FPD6 FPD7 FPD8 FPD9

9 FPE0 FPE1 FPE2 FPE3 FPE4 FPE5 FPE6 FPE7 FPE8 FPE9

FPF0 FPF1 FPF2

FPF5 FPF6 FPF7 FPF8 FPF9

Round screw hole of 4.5mm

FPG1 FPG3 FPG4 FPG5 FPG6

FT01 FT02 FT03 FT04

FJA4 FJA5

DC343514

SETNAME

********

PCB SB SSB BD

3PC332

" XP00 ~ XP99 "

-- -- --

2008-10-17

2009-01-16

CHECK

SUPERS. DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Vincent Yap / Lee CW SV

CLASS_NO

FT06 FT07

FJ07 FJ63 FJ14

O CHN

FY05 FY04

FJ99

Common Test-Jig

FU11 FJA1 FJA2 FJA3 FV11 FV12 FV13

**** *** *****

2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

20 18440_519_090224.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 111

SSB: PNX5100 - Power 1

9 9

+1V2-PNX5100-TRI-PLL1

J5 J4

+1V2-PNX5100

K5 K3

+1V2-PNX5100-TRI-PLL2

L5 K4

+1V2-PNX5100-TRI-PLL3

T5 U4

VSS

+1V2-PNX5100-DDR-PLL1

AE25

+3V3-PNX5100-DDR-PLL0

N22 R22

+1V2-PNX5100

E15 B15 D15 A15 C15

+1V2-PNX5100-LVDS-PLL

+3V3-PNX5100-LVDS-PLL

AB14 AC14 AE14 AF12 AD14 AC13 AB13

+1V2-PNX5100

+1V2-PNX5100-CLOCK +3V3-PNX5100-CLOCK

AD13 AE12

+1V2-PNX5100-CLOCK

E +1V2-PNX5100 100n

5C66

FC82

2C88

30R +1V2-PNX5100-TRI-PLL2

100n

+1V2-PNX5100-TRI-PLL3

5C69

G FC89 +3V3-PNX5100-DDR-PLL0

5C70 5C65

FC90

+3V3

FC85

+1V2-PNX5100

100n

2C90

30R +1V2-PNX5100-DDR-PLL1

2C58

FC84

+1V2-PNX5100

100n

+3V3

5C64

10u +3V3-PNX5100-CLOCK

100n

+1V2-PNX5100

+1V2-PNX5100-LVDS-PLL 30R

100n 2C57

FC88

30R

2C89

2C62-4

5C68 FC83

FC87

+3V3

5C63

30R

100n

+3V3-PNX5100-LVDS-IN 100n

2 5C62

30R

5C67 +3V3

+1V2-PNX5100 30R

2C87

2C84

100n

2C62-2

+1V2-PNX5100-TRI-PLL1 30R

100n

FC81

+1V2-PNX5100

2C86

30R 5C61

+1V2-PNX5100-DLL

FC86

+1V2-PNX5100 2C85 100n

2C80

+1V2-PNX5100-CLOCK 30R

30R

+3V3-PNX5100-LVDS-PLL

FC61

" XC50 ~ XC5Z " " XC60 ~ XC6Z " " XC70 ~ XC7Z " " XC80 ~ XC8Z " " XC90 ~ XC9Z "

MULTI 12NC : 3139_123_64421 BD 12NC : 3139_123_64431 CELL 12NC : 8239_125_14781 2 1 3 1

CHN

DC343514

SETNAME

PCB SB SSB BD

3PC332

-- -- --

2008-10-07

2009-01-16

3 SUPERS.

CHECK

DATE

**** *** *****

2008-10-17

2009-01-16

2008-12-16

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

3139 123 6443

TV543_2K9

NAME Vincent Yap / Lee CW

********

CLASS_NO

FC80

100n

VSS

+1V2-PNX5100

P22 T22

2C91

A1 AA25 AB3 AB4 AB5 AC1 AC2 AC3 AC4 AD1 AD2 AD24

VDDA_1V2_XTAL VSSA_XTAL

5C60

+1V2-PNX5100-DLL

AD25 AD26

100n 2C92

100n

100n 2C76

100n 2C75

100n 2C74

30R

VDDA_1V2_DLL4 VSSA_DLL4

V22 U22

100n

5C73

VDD_3V3_LVDSOUT

VDDA_1V2_LVDS_PLL VDDA_3V3_LVDS1 VDDA_3V3_LVDS2 VSSA_LVDS1 VSSA_LVDS2 VDD_1V2_MCAB1 VDD_1V2_MCAB2 VDDA_1V2_1_7_MCAB VDDA_1V2_UIP_PLL VDDA_3V3_SYS_PLL VSS_MCAB1 VSS_MCAB2

VDDA_1V2_DLL1 VSSA_DLL1

2C94

100n

100n 2C72

2C71

D10 D13 D17 D20

+3V3 2C73

VDD_3V3_LVDSIN

VDDA_1V2_DLL0 VSSA_DLL0

VDD_1V2_DDRPLL1 VSS_DDRPLL1

VSS

F22 E22

2C63-3

VDD_3V3_PER

VDDA_3V3_DDRPLL0

AB20 AB6 AB7 D22 E6 E7 G5 M5 N5 V5 W5

VSS

VDDD_1V2_TRI_PLL2 VSSD_TRI_PLL2

VDDD_1V2_TRI_PLL3 VSSD_TRI_PLL3

AA22 AB22

2C82

VDD_1V8_DDR

AB15 AB17

30R

VSS

VDDA_1V2_DDRPLL1 VSSA_DDRPLL1

VDDA_1V2_TRI_PLL3 VSSA_TRI_PLL3

M22 L22

+1V2-PNX5100-DLL

2C83

100n

5 2C78-4 4

1 8 100n 2C68-2 2 7 100n 2C68-3 3 6 100n 2C68-4 4 5 100n 2C69-1 1 8 100n 2C69-2 2 7 100n 2C69-3 3 6 100n 2C69-4 4 5 100n 2C70-1 1 8 100n 2C70-2 2 7 100n 2C70-3 3 6 100n 2C70-4 4 5 100n

2C68-1

10u

10u 2C56

2C55 5C72 +3V3

VDD_1V2_CORE

AD3 AE1 AE2 AF1 B1 A10 A13 A17 B2 A20 C2 C25 C3 D3 D4 E4 E5 F25 H23 J25 L11 L12 L13 L14 L15 M11 M12 M13 M14 M15 M25 N11 N12 N13 N14 N15 P11 P12 P13 P14 P15 P23 R11 R12 R13 R14 R15 R23 R25 T11 T12 T13 T14 T15 V25 W23 AE26

2C79

1 8 100n 2C66-2 2 7 100n 2C66-3 3 6 100n 2C66-4 4 5 100n 2C67-1 1 8 100n 2C67-2 2 7 100n 2C67-3 3 6 100n 2C67-4 4 5 100n

2C66-1 +3V3 30R

SUPPLY_1

AA5 AB16 AB8 AB9 AC9 AD9 AE9 AF9 E16 E8 E9 F5 J22 K22 P5 R5 Y5 L16 M16 N16 P16 R16 T16

+1V8-PNX5100

+1V2-PNX5100

VDD_1V2_DDRPLL0 VSS_DDRPLL0

VDDA_1V2_TRI_PLL1 VSSA_TRI_PLL1

VDDA_1V2_TRI_PLL2 VSSA_TRI_PLL2

U5 U3

100n

2C65

2C64 100n

100n

2C63-1 1 8 100n 2C63-2 2 7 100n 2C63-4 4 5 100n 2C81

2C62-1 1 8 100n 2C62-3 3 6 100n

2C61-1 1 100n 2C61-2 2 100n 2C61-3 3 100n 2C61-4 4 100n

2C60-1 1 100n 2C60-2 2 100n 2C60-3 3 100n 2C60-4 4 100n

2C78-1 1 8 100n 2C78-2 2 7 100n 2C78-3 3 6 100n

VDDD_1V2_TRI_PLL1 VSSD_TRI_PLL1

VDDA_1V2_DLL7 VSSA_DLL7

100n

7C00-10 PNX5100E

5C71

100n

+1V2-PNX5100

10u

2C97

10u

2C96

2C95

2C59

SENSE+1V2-PNX5100

+1V2-PNX5100

owner.

330u 6.3V

CC60

+1V2-PNX5100

SUPPLY_2 VDDA_3V3_LVDSIN VSSA_LVDSIN

100n

COM

H5 J3

10u

OUT

+1V8-PNX5100

100n

FC60

22u 2C6A

100n

10u

2C98

2C93

AB18 AB19

+3V3-PNX5100-LVDS-IN

2C99

+3V3F

2C77

7C60 LD1117DT18

A 7C00-11 PNX5100E

PNX5100 - POWER

2C55 E2 2C56 E2 2C57 E10 2C58 F10 2C59 B2 2C60-1 C2 2C60-2 C2 2C60-3 C2 2C60-4 C3 2C61-1 C3 2C61-2 C3 2C61-3 C3 2C61-4 C3 2C62-1 C3 2C62-2 E8 2C62-3 C4 2C62-4 E8 2C63-1 C4 2C63-2 C4 2C63-3 F8 2C63-4 C4 2C64 C4 2C65 C5 2C66-1 D3 2C66-2 D3 2C66-3 D3 2C66-4 D3 2C67-1 D3 2C67-2 D3 2C67-3 D4 2C67-4 D4 2C68-1 E3 2C68-2 E3 2C68-3 E3 2C68-4 E3 2C69-1 E3 2C69-2 E3 2C69-3 E4 2C69-4 E4 2C6A B4 2C70-1 E4 2C70-2 E4 2C70-3 E4 2C70-4 E4 2C71 F3 2C72 F3 2C73 F3 2C74 F3 2C75 F4 2C76 F4 2C77 D10 2C78-1 C2 2C78-2 C2 2C78-3 C2 2C78-4 E4 2C79 D7 2C80 D8 2C81 C4 2C82 F8 2C83 G8 2C84 E10 2C85 E10 2C86 E10 2C87 E10 2C88 E10 2C89 F10 2C90 F10 2C91 F10 2C92 F10 2C93 B2 2C94 F8 2C95 B3 2C96 B3 2C97 B3 2C98 B3 2C99 B4 5C60 D7 5C61 E7 5C62 E7 5C63 E7 5C64 F7 5C65 F7 5C66 D10 5C67 E10 5C68 E10 5C69 F10 5C70 F10 5C71 E2 5C72 E2 5C73 F2 7C00-10 C5 7C00-11 A8 7C60 A3 CC60 B4 FC60 B4 FC61 G6 FC80 D8 FC81 E8 FC82 E8 FC83 E8 FC84 F8 FC85 F8 FC86 D10 FC87 E10

FC88 E10 FC89 F10 FC90 F10

12 18440_520_090224.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 112

SSB: PNX5100 - SDRAM

PNX5100 - SDRAM

N26 U25 N25 T23 M26 T24 L25 R24 L26 M23 T26 K25 M24

PNX5100-DDR2-BA0 PNX5100-DDR2-BA1

R26 T25 N24

3C00 5K6 1% 3C01

PNX5100-DDR2-CLK_P PNX5100-DDR2-CLK_N

3C10 3K3 RES

FC02

820R

PNX5100-DDR2-VREF-CTRL

IREF VREF

P26 P25

100n

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

ODT CKE

N23 P24

2C01

DDR2

RASB CASB WEB CSB

K23 U23

PNX5100-DDR2-ODT PNX5100-DDR2-CKE +1V8-PNX5100

P N

CLK

RES 3C02 DQM

0 1 2 3

DQS0

P N

DQS1

P N

100R

D G

+1V8-PNX5100

DQS2

P N

DQS3

P N

Y26 AB25 Y25 AC26 AC25 U26 AB26 V26 W24 AB23 AA24 AC24 AC23 V23 AB24 V24 F26 H26 G25 J26 K26 D25 H25 D26 F23 H24 F24 J23 J24 D23 G24 D24

PNX5100-DDR2-D0 PNX5100-DDR2-D1 PNX5100-DDR2-D2 PNX5100-DDR2-D3 PNX5100-DDR2-D4 PNX5100-DDR2-D5 PNX5100-DDR2-D6 PNX5100-DDR2-D7 PNX5100-DDR2-D8 PNX5100-DDR2-D9 PNX5100-DDR2-D10 PNX5100-DDR2-D11 PNX5100-DDR2-D12 PNX5100-DDR2-D13 PNX5100-DDR2-D14 PNX5100-DDR2-D15 PNX5100-DDR2-D16 PNX5100-DDR2-D17 PNX5100-DDR2-D18 PNX5100-DDR2-D19 PNX5100-DDR2-D20 PNX5100-DDR2-D21 PNX5100-DDR2-D22 PNX5100-DDR2-D23 PNX5100-DDR2-D24 PNX5100-DDR2-D25 PNX5100-DDR2-D26 PNX5100-DDR2-D27 PNX5100-DDR2-D28 PNX5100-DDR2-D29 PNX5100-DDR2-D30 PNX5100-DDR2-D31

2C00 E4 2C01 C5 2C02 E5 2C13 F5 2C14 F5 2C15 F5 2C16 F6 2C17 F6 2C18 F6 2C19 F6 2C29 E11 2C30 E11 2C32 F12 2C33 F12 2C34 F12 2C35 F12 2C36 F12 2C38 F13 2C39 H13 2C40 H6 2C41-1 F2 2C41-2 F2 2C41-3 F2 2C41-4 F2 2C42-1 F3 2C42-2 F3 2C42-3 F3 2C42-4 F3 2C43-1 F8 2C43-2 F8 2C43-3 F9 2C43-4 F9 2C44-1 F9 2C44-2 F9 2C44-3 F10 2C44-4 F10 3C00 C2 3C01 C2 3C02 C3 3C03 H2 3C04 H9 3C05-1 G6 3C05-2 G6 3C05-3 H6 3C05-4 H6 3C06-1 G5 3C06-2 G5 3C06-3 H3 3C06-4 H2 3C07-1 G6 3C07-2 G5 3C07-3 G5 3C07-4 G6 3C08-1 H5 3C08-2 H5 3C08-3 G6 3C09-1 H6 3C09-2 H5 3C09-3 G5 3C09-4 H6 3C10 C5 3C11 H6 3C12 H3 3C13 H2 3C20 A10 3C21 B10 3C22 A12 3C23 B12 3C25-1 G13 3C25-2 G13 3C25-3 H12 3C25-4 H13 3C26-1 G13 3C26-2 G12 3C26-3 G12 3C26-4 G13 3C27-1 G12 3C27-2 G12 3C27-3 H9 3C27-4 H9 3C28-1 H13 3C28-2 G12 3C28-3 H12 3C28-4 H13 3C30-1 H12 3C30-2 H12 3C30-3 I9 3C30-4 H9 3C31 G13 3C32 H13 7C00-8 A6 7C01 F3 7C02 F10 FC02 C3 FC05 B12 FC06 B10

+1V8-PNX5100

AA26 AA23 G26 G23

PNX5100-DDR2-DQM0 PNX5100-DDR2-DQM1 PNX5100-DDR2-DQM2 PNX5100-DDR2-DQM3

W26 W25

PNX5100-DDR2-DQS0_P PNX5100-DDR2-DQS0_N

Y24 Y23

PNX5100-DDR2-DQS1_P PNX5100-DDR2-DQS1_N

E25 E26

PNX5100-DDR2-DQS2_P PNX5100-DDR2-DQS2_N

E24 E23

PNX5100-DDR2-DQS3_P PNX5100-DDR2-DQS3_N

+1V8-PNX5100

FC06

FC05

PNX5100-DDR2-VREF-CTRL

PNX5100-DDR2-VREF-DDR

22u

100n

2C38

100n 2C36

100n 2C35

100n 2C34

100n 2C33

2C32

100n

100n 2C44-4

1u0

6 100n 2C44-3

100n 2C44-2 2

8 100n 2C44-1

100n 2C43-4 4

6 100n 2C43-3

8 2C43-1

22u

100n

2C19

100n 2C18

100n 2C17

100n 2C16

100n 2C15

100n 2C14

2C13

100n

100n 2C43-2

5 100n 2C42-4

7 100n 2C42-2 2

100n 2C42-3

8 100n 2C42-1

100n 2C41-4 4

100n 2C41-3

100n 2C41-2 2

2C41-1 1

330u 6.3V 2C30

RES 2C29

1u0

2C00

330u 6.3V 2C02

+1V8-PNX5100

PNX5100-DDR2-DQS0_P PNX5100-DDR2-DQS0_N

3C06-4 4

PNX5100-DDR2-DQS1_P PNX5100-DDR2-DQS1_N

3C13

150R 5

3C06-3

6 33R

3C12

33R

33R 33R

UDM LDM

F7 E8

LDQS

B7 A8

UDQS

VREF

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

1 3C05-1 33R 2 3C05-2 33R 8 3C07-1 33R 5 3C07-4 33R 3 3C08-3 33R 3C11 33R 8 3C09-1 33R 5 3C09-4 33R

8 3C07-3 3 3C07-2 2 3C06-1 8 3C06-2 7 3C09-3 3 3C09-2 2 3C08-1 8 3C08-2 7 B3 F3

5 6

6 33R 7 33R 1 33R 2 33R 6 33R 7 33R 1 33R 2 33R 3C05-4 4 33R

7 1 4 6

1 4

L2 L3

PNX5100-DDR2-A0 PNX5100-DDR2-A1 PNX5100-DDR2-A2 PNX5100-DDR2-A3 PNX5100-DDR2-A4 PNX5100-DDR2-A5 PNX5100-DDR2-A6 PNX5100-DDR2-A7 PNX5100-DDR2-A8 PNX5100-DDR2-A9 PNX5100-DDR2-A10 PNX5100-DDR2-A11 PNX5100-DDR2-A12

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 3C04 150R

PNX5100-DDR2-CLK_P PNX5100-DDR2-CLK_N

PNX5100-DDR2-DQM1 PNX5100-DDR2-DQM0

PNX5100-DDR2-DQS2_P PNX5100-DDR2-DQS2_N

33R 3C05-3 PNX5100-DDR2-VREF-DDR 2C40

PNX5100-DDR2-DQS3_P PNX5100-DDR2-DQS3_N

100n

3 5

3C27-3

J8 K8 6 33R

3C27-4 33R 3C30-4 4 5 33R 3 6

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ

0 1 2 3 4 5 6 A 7 8 9 10 11 12

LDQS

B7 A8

UDQS

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

UDM LDM

F7 E8

A2 E2 L1 R3 R7 R8

SDRAM

0 BA 1

VREF

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 B3 F3

3C26-3

3C26-2

3C27-1

3C27-2

3C28-2

3C28-3

3C30-1

3C30-2

6 33R 7 33R 1 33R 2 33R 2 33R 3 33R 1 33R 2 33R

7 1 4

5 8

5 3C25-3 6

1 3C25-1 33R 2 3C25-2 33R 8 3C26-1 33R 5 3C26-4 33R 3C31 33R 3C32 33R 4 3C28-4 33R 1 3C28-1 33R

PNX5100-DDR2-D16 PNX5100-DDR2-D17 PNX5100-DDR2-D18 PNX5100-DDR2-D19 PNX5100-DDR2-D20 PNX5100-DDR2-D21 PNX5100-DDR2-D22 PNX5100-DDR2-D23 PNX5100-DDR2-D24 PNX5100-DDR2-D25 PNX5100-DDR2-D26 PNX5100-DDR2-D27 PNX5100-DDR2-D28 PNX5100-DDR2-D29 PNX5100-DDR2-D30 PNX5100-DDR2-D31

3C25-4

4 33R

PNX5100-DDR2-DQM3 PNX5100-DDR2-DQM2

33R J2

PNX5100-DDR2-VREF-DDR

VSS

100n VSSQ

I N

2C39

3C30-3 33R

VSSQ

VDDL

PNX5100-DDR2-BA0 PNX5100-DDR2-BA1

A1 E1 J9 M9 R1

VSS

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

0 1 2 3 4 5 6 A 7 8 9 10 11 12

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

VDD ODT CKE WE CS RAS CAS

VSSDL

J8 K8 3C03

0 BA 1

K9 K2 K3 L8 K7 L7

PNX5100-DDR2-CLK_P PNX5100-DDR2-CLK_N

PNX5100-DDR2-ODT PNX5100-DDR2-CKE PNX5100-DDR2-WE PNX5100-DDR2-CS PNX5100-DDR2-RAS PNX5100-DDR2-CAS

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2

VDDL

A2 E2 L1 R3 R7 R8

A3 E3 J3 N1 P9

L2 L3

VDDQ

SDRAM

VSSDL

PNX5100-DDR2-BA0 PNX5100-DDR2-BA1

VDD ODT CKE WE CS RAS CAS

K9 K2 K3 L8 K7 L7

7C02 HYB18TC512160B2F-3S

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

PNX5100-DDR2-ODT PNX5100-DDR2-CKE PNX5100-DDR2-WE PNX5100-DDR2-CS PNX5100-DDR2-RAS PNX5100-DDR2-CAS

A3 E3 J3 N1 P9

is prohibited without the written consent of the copyright owner.

7C01 HYB18TC512160B2F-3S

A1 E1 J9 M9 R1

BA0 BA1 BA2

K24 L24 U24 L23

PNX5100-DDR2-RAS PNX5100-DDR2-CAS PNX5100-DDR2-WE PNX5100-DDR2-CS

0 1 2 3 4 5 6 7 8 9 10 11 12

1K0 1%

7C00-8 PNX5100E

3C22

1K0 1%

3C23

1K0 1%

3C20

1K0 1%

3C21

I MULTI 12NC : 3139_123_64421 BD 12NC : 3139_123_64431 CELL 12NC : 8239_125_14781 1

" XC00 ~ XC0Z " " XC10 ~ XC1Z " " XC20 ~ XC2Z " " XC20 ~ XC2Z " " XC30 ~ XC3Z " " XC40 ~ XC4Z "

10 2009-Apr-03

14 O

CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

-- -- --

2008-10-17

2009-01-16

CHECK

SUPERS. DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Vincent Yap / Lee CW

P 25

**** *** ***** 2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 113

SSB: PNX5100 - Control / PCI / Debug 1

2 1

3 2

4 3

PNX5100 - CONTROL / PCI / DEBUG A

A 7C00-2 PNX5100E

owner.

AF5 AE4 AD4 AF3 AE3 AF2 AB2 AB1 AA4 AA3 AA2 AA1 Y4 Y3 Y2 Y1 W4 U1 T4 T3 T2 T1 R4 R3 R2 P4 P3 P2 P1 N4 N3 N2

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

AE5 AD5 AC5 AF4 W3 U2 V1 V2 V4 V3 L4 W1 W2 AD6 AC7 AD7 AE6 AF6 AE7 M1 L3 H1

PCI_XIO

0 1 2 3 PAR FRAME IRDY TRDY STOP DEVSEL IDSEL PERR SERR REQ REQA REQB GNT GNTA GNTB INTA CLK PLL_OUT CBE

XIO

PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3 PCI-PAR PCI-FRAME PCI-IRDY PCI-TRDY PCI-STOP PCI-DEVSEL PCI-AD25 PCI-PERR PCI-SERR RES RES RES RES RES RES

3CFK-1 1 3CFK-3 3 3CFK-2 2 3CFL-1 1 3CFL-3 3 3CFL-2 2 3CFN

8 6 7 8 6 7

100R 100R 100R 100R 100R 100R 10K

B 7C00-3 PNX5100E AE24 AF25 AF26 C24 C26 B25 B26 A26 A25 A24 B24 A23 B23 C23 B22 C22

+3V3

ICD1

PCI-CLK-PNX5100

PNX5100-LCD-PWR-ON M2 M3 M4 N1 AC6 AF7

0 1 SEL 2 3 ACK AD25

PNX5100-BL-BOOST 3CF1 +3V3

PNX5100-BL-CTRL

10K

RESET-PNX5100

FCD8

AF24

6 10K

GPIO

C GPIO

E Φ

CONTROL

UA1

TX RX

UA2

TX RX

AE8 AF8

OUT XTAL OUT2

SCL SDA

AC8 AD8 K2 K1

3CD7 3CD8

100R 100R

SCL-SSB SDA-SSB

L2 L1

3CD9 3CDA

100R 100R

SCL-AMBI-3V3 SDA-AMBI-3V3

AD12

RESET_SYS RESET_IN OBSERVE

AB21

PNX5100-RST-OUT

VPP_ID

3CD1-4

3CD1-3

3CD1-2

1 3CD1-1

3CD4

F +3V3

+3V3 +3V3 +3V3

C08 OR C16

(1Kx8) EEPROM

FCD9 1 2 3

NC1 NC2 E2 ADR

WC SCL

SDA 4

7CJ0 PDTC114EU

7CD0 M24C08-WDW6

6CJ0

SML-310

+3V3 +3V3

G22 H22 W22 Y22

PNX5100-RST-OUT

I CHN

DC343514

SETNAME

WC-EEPROM-PNX5100_SPI-DI

FCD6 6

3CDC

FCDA 5

3CDD

FCDB

100R

WC-EEPROM-PNX5100_SPI-DI

100R SDA-SSB

MULTI 12NC : 3139_123_64421 BD 12NC : 3139_123_64431 CELL 12NC : 8239_125_14781 1 2 3 1

" XCD0 ~ XCDZ " " XCF0 ~ XCFZ " " XCJ0 ~ XCJZ "

-- -- --

2008-10-17

2009-01-16

SUPERS. CHECK

DATE

**** *** *****

2009-01-16

2008-12-16

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

3139 123 6443

2008-10-17

only for DEBUG

********

TV543_2K9

NAME Huang Deqiang

+3V3

PCB SB SSB BD

3PC332

3CDB 4K7

SCL-SSB

CLASS_NO

FCD7

3CD2

3CJ0

TCK TDI TDO TMS TRST

R1 +3V3

+3V3

330R

10K

3CJ1

22p

H4 H2 H3 J1 J2

7 10K

FCD0 FCD1 FCD2 FCD3 FCD4

5 10K

EJTAG-PNX5100-TCK EJTAG-PNX5100-TDI EJTAG-PNX5100-TDO EJTAG-PNX5100-TMS EJTAG-PNX5100-TRSTn

2CD1

10K

53261-0871

+3V3

AE13

AF14 RES 3CD3

8 10K

10 9

27M

AF13

10K

EJTAG-PNX5100-TDI FCJ0 EJTAG-PNX5100-TDO EJTAG-PNX5100-TMS EJTAG-PNX5100-TCK 4CJ0 +3V3

1 2 3 4 5 6 7 8

22p

2CD0

1CJ0

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

7C00-1 PNX5100E

1CD0

RESERVED EJTAG-PNX5100-TRSTn

9CD0

1CD0 D6 1CJ0 D3 2CD0 D6 2CD1 D7 3CD1-1 F6 3CD1-2 F7 3CD1-3 F7 3CD1-4 F6 3CD2 F6 3CD3 E6 3CD4 F6 3CD7 E9 3CD8 E9 3CD9 E9 3CDA E9 3CDB G12 3CDC G10 3CDD G10 3CF1 C5 3CFK-1 B5 3CFK-2 B5 3CFK-3 B5 3CFL-1 C5 3CFL-2 C5 3CFL-3 C5 3CFN C5 3CJ0 F3 3CJ1 F2 4CJ0 E2 6CJ0 F3 7C00-1 D8 7C00-2 A3 7C00-3 B8 7CD0 F9 7CJ0 G3 9CD0 G11 FCD0 E7 FCD1 E7 FCD2 E7 FCD3 E7 FCD4 E7 FCD6 G10 FCD7 F7 FCD8 E7 FCD9 G3 FCDA G10 FCDB G10 FCJ0 E2 ICD1 C4

12 18440_522_090224.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 114

SSB: PNX5100 - LVDS In/Out

3CGD B5 3CGE B6 3CGF C6 3CGG C6 7C00-4 C6 7C00-5 B3 7C00-9 A7

PNX5100 - LVDS IN / OUT 7C00-9 PNX5100E

D6 A4 E2 G4

3CGD +3V3

3CGE

1K0 RX51002B+

1K0 7C00-5 PNX5100E

AC17 AD17

AC16 AD16 AE16 AF16

RX51002C-

AE15 AF15

RX51002D+

AC15 AD15

RX51002DRX51002E+

AE20 AF20

AC20 AD20

RX51002ERX51001A+

AC19 AD19

RX51001ARX51001B+

AE19 AF19 AE18 AF18

RX51001BRX51001CLK+

AC18 AD18

AP AN

LVDS_RX

BP BN CLKP CLKN LIN1 CP CN DP DN

+3V3

AP AN

7C00-4 PNX5100E

E17 E14

CLKP CLKN LIN2 CP CN DP DN EP EN

RX51001CRX51001D+

MULTI 12NC : 3139_123_64421 BD 12NC : 3139_123_64431 CELL 12NC : 8239_125_14781

16 17 18 19 20 21 22 23 D 24 25 26 27 28 29 30 31

C4 A5 B5 C5 D5 A6 B6 C6 A7 B7 C7 D7 A8 B8 C8 D8

TX2E+ TX2E-

B21 A21

TX2D+ TX2D-

D21 C21

TX2CLK+ TX2CLK-

E21 E20

TX2C+ TX2C-

C20 B20

TX2B+ TX2B-

B19 A19

TX2A+ TX2A-

D19 C19

TX1E+ TX1E-

B18 A18

TX1D+ TX1D-

D18 C18

TX1CLK+ TX1CLK-

E19 E18

TX1C+ TX1C-

C17 B17

TX1B+ TX1B-

B16 A16

TX1A+ TX1A-

D16 C16

RX51001E-

0 1 2 3 4 5 6 7 D 8 9 10 11 12 13 14 15

+3V3

BP BN

RX51001DRX51001E+

VDI

1 2 CLK 3 4

EP EN

RX51001CLKRX51001C+

G3 G2 G1 F4 F3 F2 F1 E3 E1 D2 D1 C1 A2 A3 B3 B4

12K

AE17 AF17

12K 3CGG

RX51002BRX51002CLK+

3CGF

RX51002CLKRX51002C+

RX51002A+

RX51002A-

LVDS_TX

LVDS1 IREF LVDS2

RGB_CLK

AP AN

BP BN

CLKP CLKN

LOUT1

LOUT3

CLKP CLKN

CP CN

DP DN

EP EN

AP AN

BP BN

CLKP CLKN

LOUT2

LOUT4

CLKP CLKN

B14 A14

TX4E+ TX4E-

D14 C14

TX4D+ TX4D-

E13 E12

TX4CLK+ TX4CLK-

C13 B13

TX4C+ TX4C-

B12 A12

TX4B+ TX4B-

D12 C12

TX4A+ TX4A-

B11 A11

TX3E+ TX3E-

D11 C11

TX3D+ TX3D-

E11 E10

TX3CLK+ TX3CLK-

C10 CP B10 CN

TX3C+ TX3C-

DP DN

B9 A9

TX3B+ TX3B-

EP EN

D9 C9

TX3A+ TX3A-

DC343514

A22

CP CN

6 CHN

SETNAME

D F

8 ********

CLASS_NO

PCB SB SSB BD

3PC332

" XCG0 ~ XCGZ "

-- -- --

2008-10-17

2009-01-16

CHECK

SUPERS. DATE

2009-01-16

2008-12-16

3139 123 6443

TV543_2K9

NAME Vincent Yap / Lee CW SV

A B

**** *** *****

2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

13 18440_523_090224.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 115

SSB: PNX5100 - AmbiLight

PNX5100 - AMBILIGHT A

3CE5

FCE7 4CE2

SDA-AMBI-3V3

100R FCE6

3CE4

1CE4

5CE5

1 2 3 4 5 6 7

100n

2041061-7

FCE8

AB12 AC12

2CE3

1CE3

10p

AC11 AB11

10p 2CE2

RES 5CE7 120R

1M59

FCE5

100R

1CE2

4CE1

SCL-AMBI-3V3

1.0A T 125V

SYNC_H SYNC_V

120R

AF10 AE10 AD10 AC10 AB10 AF11 AE11 AD11

2CE1

CLK DE

TO AMBILIGHT

RES 5CE6

150p

0 1 2 3 AMBI 4 5 6 7

2K2

Î¦

AMBI

2K2 3CE7

3CE6

150p 2CE5

7C00-7 PNX5100E

2CE4

+3V3

1CE2 C7 1CE3 C6 1CE4 C6 1M59 B8 2CE1 C6 2CE2 C6 2CE3 C7 2CE4 C4 2CE5 C4 3CE4 B5 3CE5 B5 3CE6 B4 3CE7 B4 4CE1 B5 4CE2 B5 5CE5 C7 5CE6 B5 5CE7 B5 7C00-7 B1 FCE5 B6 FCE6 B6 FCE7 B7 FCE8 C7

C E

+3V3 30R

MULTI 12NC : 3139_123_64421 BD 12NC : 3139_123_64431 CELL 12NC : 8239_125_14781

I CHN

DC343514

SETNAME

********

CLASS_NO

PCB SB SSB BD

3PC332

" XCE1~ XCEZ "

-- -- --

2008-10-17

2009-01-16

CHECK

SUPERS. DATE

2009-01-16 2008-12-16

3139 123 6443

TV543-2K9

NAME Vincent Yap / Lee CW

1 1

**** *** ***** 2008-10-17

10 C

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

13 18440_524_090224.eps 090224

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 116

SSB: SRP List Explanation Example Net Name

Diagram

+12-15V AP1 (4x) +12-15V AP4 (4x) +12-15V AP5 (12x) +12-15V AP6 (4x) +12-15V AP7 (8x) +12V AP1 (4x) +12V_NF AP1 (2x) +12VAL AP1 (2x) +25VLP AP1 (4x) +25VLP AP2 (1x) +3V3-STANDBY AP5 (3x) +400V-F AP1 (2x) +400V-F AP2 (2x) +400V-F AP3 (2x) +5V2 AP1 (6x) +5V2 AP2 (1x) +5V2-NF AP1 (1x) +5V2-NF AP2 (1x) +5V-SW AP1 (6x) +5V-SW AP2 (1x) +8V6 AP1 (3x) +AUX AP1 (2x) +AUX AP2 (1x) +DC-F AP1 (2x) +DC-F AP3 (2x) +SUB-SPEAKER AP5 (1x) +SUB-SPEAKER AP6 (2x) -12-15V AP1 (4x) -12-15V AP4 (6x) -12-15V AP5 (14x) -12-15V AP6 (6x) -12-15V AP7 (8x) AL-OFF AP1 (2x) AUDIO-L AP4 (1x) AUDIO-L AP5 (1x) AUDIO-PROT AP5 (3x) AUDIO-R AP4 (1x) AUDIO-R AP5 (1x) AUDIO-SW AP5 (1x) AUDIO-SW AP7 (1x) BOOST AP1 (2x) CPROT AP4 (2x) CPROT AP5 (1x) CPROT-SW AP5 (1x) CPROT-SW AP6 (2x) -DC-F AP1 (2x) -DC-F AP3 (2x) DC-PROT AP1 (1x) DC-PROT AP5 (2x) DIM-CONTROL AP1 (2x) FEEDBACK+SW AP6 (2x) FEEDBACK-L AP4 (2x) FEEDBACK-R AP4 (2x) FEEDBACK-SW AP6 (2x) GND-AL AP1 (2x) GNDHA AP1 (40x) GNDHA AP2 (20x) GNDHA AP3 (2x) GNDHOT AP3 (2x) GND-L AP1 (2x) GND-L AP4 (4x) GND-L AP5 (34x) GND-LL AP4 (7x) GND-LL AP5 (1x) GND-LR AP4 (7x) GND-LR AP5 (1x) GND-LSW AP5 (1x) GND-LSW AP6 (15x) GND-S AP1 (11x) GND-SA AP4 (8x) GND-SA AP5 (2x) GND-SA AP6 (8x) GND-SA AP7 (6x) GNDscrew AP3 (2x) GNDscrew AP5 (2x) GND-SSB AP5 (3x) GND-SSP AP1 (51x) GND-SSP AP2 (15x) IN+SW AP6 (2x) IN-L AP4 (2x) IN-R AP4 (2x) IN-SW AP6 (2x) INV-MUTE AP4 (1x) INV-MUTE AP5 (1x) INV-MUTE AP6 (1x) LEFT-SPEAKER AP4 (1x) LEFT-SPEAKER AP5 (1x) MUTE AP4 (2x) MUTE AP5 (1x) MUTE AP6 (2x) ON-OFF AP1 (3x) OUT AP6 (1x) OUT AP7 (2x) OUTN AP6 (1x) OUTN AP7 (1x) POWER-GOOD AP1 (2x) POWER-OK-PLATFORM AP1 (2x) RIGHT-SPEAKER AP4 (1x) RIGHT-SPEAKER AP5 (1x) SOUND-ENABLE AP5 (3x) STANDBY AP1 (5x) STANDBY AP2 (1x) -SUB-SPEAKER AP5 (1x) -SUB-SPEAKER AP6 (2x) V-CLAMP AP1 (1x) V-CLAMP AP3 (2x)

1.1.

Personal Notes:

Introduction SRP (Service Reference Protocol) is a software tool that creates a list with all references to signal lines. The list contains references to the signals within all schematics of a PWB. It replaces the text references currently printed next to the signal names in the schematics. These printed references are created manually and are therefore not guaranteed to be 100% correct. In addition, in the current crowded schematics there is often none or very little place for these references. Some of the PWB schematics will use SRP while others will still use the manual references. Either there will be an SRP reference list for a schematic, or there will be printed references in the schematic.

1.2.

Non-SRP Schematics There are several different signals available in a schematic:

1.2.1.

Power Supply Lines All power supply lines are available in the supply line overview (see chapter 6). In the schematics (see chapter 7) is not indicated where supplies are coming from or going to. It is however indicated if a supply is incoming (created elsewhere), or outgoing (created or adapted in the current schematic). +5V

Outgoing 1.2.2.

+5V

Incoming

Normal Signals For normal signals, a schematic reference (e.g. B14b) is placed next to the signals. B14b

1.2.3.

signal_name

Grounds For normal and special grounds (e.g. GNDHOT or GND3V3 etc.), nothing is indicated.

1.3.

SRP Schematics SRP is a tool, which automatically creates a list with signal references, indicating on which schematic the signals are used. A reference is created for all signals indicated with an SRP symbol, these symbols are: +5V

name

+5V

Power supply line.

name

Stand alone signal or switching line (used as less as possible). name

Signal line into a wire tree. name

name

Switching line into a wire tree. name

Bi-directional line (e.g. SDA) into a wire tree. name

Signal line into a wire tree, its direction depends on the circuit (e.g. ingoing for PDP, outgoing for LCD sets). Remarks: • When there is a black dot on the "signal direction arrow" it is an SRP symbol, so there will be a reference to the signal name in the SRP list. • All references to normal grounds (Ground symbols without additional text) are not listed in the reference list, this to keep it concise. • Signals that are not used in multiple schematics, but only once or several times in the same schematic, are included in the SRP reference list, but only with one reference. Additional Tip: When using the PDF service manual file, you can very easily search for signal names and follow the signal over all the schematics. In Adobe PDF reader: • Select the signal name you want to search for, with the "Select text" tool. • Copy and paste the signal name in the "Search PDF" tool. • Search for all occurrences of the signal name. • Now you can quickly jump between the different occurrences and follow the signal over all schematics. It is advised to "zoom in" to e.g. 150% to see clearly, which text is selected. Then you can zoom out, to get an overview of the complete schematic. PS. It is recommended to use at least Adobe PDF (reader) version 6.x, due to better search possibilities in this version. 10000_031_090121.eps 090121

2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 117

SSB: SRP List Part 1 Netname

Diagram +5V

+12V +12V +12V +12V +12VD +12VD +12VF +1V2 +1V2A +1V2-PNX5100 +1V2-PNX5100 +1V2-PNX5100 +1V2-PNX5100-CLOCK +1V2-PNX5100-DDR-PLL1 +1V2-PNX5100-DLL +1V2-PNX5100-LVDS-PLL +1V2-PNX5100-TRI-PLL1 +1V2-PNX5100-TRI-PLL2 +1V2-PNX5100-TRI-PLL3 +1V2-PNX85XX +1V2-PNX85XX +1V2-PNX85XX +1V2-PNX85XX +1V2-STANDBY +1V2-STANDBY +1V8-PNX5100 +1V8-PNX5100 +1V8-PNX85XX +1V8-PNX85XX +1V8-PNX85XX +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3_BUF +3V3A +3V3B +3V3D +3V3E +3V3-ET-ANA +3V3-ET-DIG +3V3F +3V3F +3V3F +3V3-NAND +3V3-PER +3V3-PER +3V3-PER +3V3-PNX5100-CLOCK +3V3-PNX5100-DDR-PLL0 +3V3-PNX5100-LVDS-IN +3V3-PNX5100-LVDS-PLL +3V3-STANDBY +3V3-STANDBY +3V3-STANDBY +3V3-STANDBY +3V3-STANDBY +3V3-STANDBY +5V +5V +5V +5V +5V +5V +5V +5V +5V

+5V B01A (1×) +5V5-TUN B01B (4×) +5V5-TUN B02A (3×) +5V-TUNER B04A (1×) +AUDIO-POWER B01B (1×) +AUDIO-POWER B07A (2×) +AUDIO-POWER B01A (2×) +VDISP-IN B02A (2×) +VDISP-IN B02A (2×) +VDISP-OUT B01B (1×) +VDISP-OUT_A B03H (1×) 3V3-ST B08A (15×) 3V3-ST B08A (3×) ADAC(1) B08A (2×) ADAC(1) B08A (3×) ADAC(2) B08A (2×) ADAC(2) B08A (2×) ADAC(3) B08A (2×) ADAC(3) B08A (2×) ADAC(4) B01A (2×) ADAC(4) B02A (1×) ADAC(5) B03A (14×) ADAC(5) B03H (1×) ADAC(6) B01B (2×) ADAC(6) B03A (1×) ADAC(7) B08A (2×) ADAC(7) B08B (5×) ADAC(8) B03A (3×) ADAC(8) B03F (5×) ALE B05A (1×) ANTENNA-CTRL B01A (1×) ANTENNA-SUPPLY B01B (1×) A-PLOP B02A (2×) A-PLOP B03A (14×) A-PLOP B03C (1×) AP-SCART-OUT-L B03D (1×) AP-SCART-OUT-R B03G (11×) ARX0B03H (1×) ARX0+ B04A (1×) ARX1B04B (3×) ARX1+ B04C (2×) ARX2B05A (3×) ARX2+ B05B (2×) ARX-5V B05C (3×) ARXCB07A (2×) ARXC+ B07B (4×) ARX-DDC-CLK B08A (7×) ARX-DDC-DAT B08C (13×) ARX-HPD B08D (2×) A-STBY B08E (3×) A-STBY B05C (5×) AUD_GND B02A (3×) AUD_GND B02A (6×) AUDIO-CL-L B02A (2×) AUDIO-CL-L B02A (2×) AUDIO-CL-R B05B (4×) AUDIO-CL-R B05B (3×) AUDIO-IN1-L B01A (2×) AUDIO-IN1-L B03A (1×) AUDIO-IN1-L B08A (1×) AUDIO-IN1-R B03G (5×) AUDIO-IN1-R B03A (2×) AUDIO-IN1-R B03G (12×) AUDIO-IN2-L B03H (3×) AUDIO-IN2-L B08A (2×) AUDIO-IN2-R B08A (2×) AUDIO-IN2-R B08A (2×) AUDIO-IN3-L B08A (2×) AUDIO-IN3-L B01B (2×) AUDIO-IN3-R B03A (1×) AUDIO-IN3-R B03G (3×) AUDIO-IN4-L B03H (12×) AUDIO-IN4-L B04A (3×) AUDIO-IN4-R B05A (1×) AUDIO-IN4-R B01B (1×) AUDIO-IN5-L B02A (2×) AUDIO-IN5-L B03D (1×) AUDIO-IN5-R B03G (4×) AUDIO-IN5-R B03H (1×) AUDIO-MUTE B04A (1×) AUDIO-MUTE B04B (6×) AUDIO-MUTE B04C (1×) AUDIO-OUT-L B05A (2×) AUDIO-OUT-L

B05C (1×) AUDIO-OUT-R B07A (1×) AUDIO-OUT-R B01B (1×) AUDIO-RESET B02A (1×) AUDIO-RESET B02A (10×) AUDIO-VDD B01B (1×) AV1-BLK B03C (2×) AV1-BLK B06A (2×) AV1-BLK-BO B07A (1×) AV1-BLK-BO B07B (1×) AV1-STATUS B07B (4×) AV1-STATUS B07B (4×) AV1-STATUS B01A (1×) AV2-BLK_LCD-SDA B01B (1×) AV2-BLK_LCD-SDA B03D (2×) AV2-BLK_LCD-SDA B06A (1×) AV2-PB_SC2-B B03D (2×) AV2-PB_SC2-B B06A (1×) AV2-PR_SC2-R B03C (2×) AV2-PR_SC2-R B03D (2×) AV2-STATUS B03C (2×) AV2-STATUS B03D (2×) AV2-Y_SC2-G B03C (1×) AV2-Y_SC2-G B03D (1×) AV3-PB B03C (1×) AV3-PB B03D (1×) AV3-PR B03C (1×) AV3-PR B03D (3×) AV3-Y B03C (1×) AV3-Y B03D (3×) BACKLIGHT-BOOST B03H (1×) BACKLIGHT-BOOST B02A (2×) BACKLIGHT-BOOST-IN B02A (2×) BACKLIGHT-BOOST-IN B03C (1×) BACKLIGHT-IN B04B (1×) BACKLIGHT-IN B04C (2×) BACKLIGHT-OUT B04B (5×) BACKLIGHT-OUT B04B (5×) BOLT-ON-IO B05A (2×) BOLT-ON-IO B05A (2×) BOLT-ON-TS-ENn B05A (2×) BOOTMODE_PNX8543-BL-CTRL B05A (2×) BOOTMODE_PNX8543-BL-CTRL B05A (2×) BRX0B05A (2×) BRX0+ B05A (3×) BRX1B05A (2×) BRX1+ B05A (2×) BRX2B05A (2×) BRX2+ B05A (2×) BRX-5V B05A (2×) BRXCB03C (1×) BRXC+ B06A (2×) BRX-DDC-CLK B03D (4×) BRX-DDC-DAT B06A (2×) BRX-HPD B03C (1×) B-VGA B04B (1×) B-VGA B03C (1×) CA-ADDEN B04B (1×) CA-ADDEN B03D (1×) CA-CD1 B04A (1×) CA-CD1 B04B (2×) CA-CD2 B03D (1×) CA-CD2 B04A (1×) CA-CE1 B04B (2×) CA-CE2 B03D (1×) CA-DATADIR B04B (2×) CA-DATADIR B03D (1×) CA-DATAEN B04B (2×) CA-DATAEN B03D (1×) CA-INPACK B04C (1×) CA-IORD B03D (1×) CA-IOWR B04C (1×) CA-MDI0 B03D (1×) CA-MDI0 B04C (1×) CA-MDI1 B03D (1×) CA-MDI1 B04C (1×) CA-MDI2 B03D (1×) CA-MDI2 B04C (2×) CA-MDI3 B03D (1×) CA-MDI3 B04C (2×) CA-MDI4 B03H (2×) CA-MDI4 B04C (1×) CA-MDI5 B06A (1×) CA-MDI5 B03C (1×) CA-MDI6 B04C (1×) CA-MDI6

B03C (1×) B04C (1×) B03C (2×) B03H (2×) B03C (7×) B03H (1×) B04B (1×) B04A (1×) B04B (2×) B03H (1×) B04A (1×) B04B (2×) B03H (1×) B04A (1×) B04B (2×) B03E (1×) B04B (2×) B03E (1×) B04B (2×) B03H (1×) B04B (2×) B03E (1×) B04B (2×) B03E (1×) B04C (1×) B03E (1×) B04C (1×) B03E (1×) B04C (1×) B01B (1×) B07A (1×) B07A (1×) B07B (1×) B07A (1×) B07B (1×) B01B (1×) B07A (1×) B03H (2×) B04A (1×) B03H (2×) B03G (1×) B07B (1×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B05A (3×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B03E (1×) B04C (1×) B03B (1×) B05C (3×) B03B (1×) B05C (2×) B03B (1×) B05C (2×) B05C (2×) B05C (2×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B05C (2×) B05C (2×) B05C (2×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×)

CA-MDI7 CA-MDI7 CA-MDO(0) CA-MDO(0) CA-MDO(1) CA-MDO(1) CA-MDO(2) CA-MDO(2) CA-MDO(3) CA-MDO(3) CA-MDO(4) CA-MDO(4) CA-MDO(5) CA-MDO(5) CA-MDO(6) CA-MDO(6) CA-MDO(7) CA-MDO(7) CA-MICLK CA-MICLK CA-MISTRT CA-MISTRT CA-MIVAL CA-MIVAL CA-MOCLK_VS2 CA-MOCLK_VS2 CA-MOSTRT CA-MOSTRT CA-MOVAL CA-MOVAL CA-OE CA-REG CA-RST CA-RST CA-VS1 CA-VS1 CA-WAIT CA-WE CEC CEC-HDMI CEC-HDMI CLK-SCL CRX0CRX0+ CRX1CRX1+ CRX2CRX2+ CRX-5V CRXCCRXC+ CRX-DDC-CLK CRX-DDC-DAT CRX-HPD CVBS CVBS CVBS1 CVBS1 CVBS1 CVBS2 CVBS2 CVBS-OUT-SC1 CVBS-OUT-SC1-PBS CVBS-OUT-SC1-PBS CVBS-OUT-SC2 CVBS-OUT-SC2 CVBS-TER-OUT CVBS-TER-OUT DATA-SDA DDC-SCL DDC-SDA DDR2-A0 DDR2-A1 DDR2-A10 DDR2-A11 DDR2-A12 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-BA0

B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B03B (2×) B05C (1×) B03B (1×) B05C (1×) B03B (1×) B05C (1×) B05C (2×) B05C (2×) B03B (1×) B05C (1×) B03B (1×) B05C (2×) B05C (3×) B05C (2×) B05A (6×) B03H (2×) B05A (1×) B04C (1×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B05A (3×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B02A (1×) B03E (1×) B03E (1×) B04A (1×) B04B (2×) B03E (1×) B04B (2×) B04B (3×) B04A (1×) B04B (1×) B04B (2×) B04C (1×) B02A (1×) B04B (1×) B04C (1×) B05A (3×) B05A (3×) B03F (3×) B03F (3×) B03F (3×) B03F (3×) B03F (3×) B03F (3×) B03F (3×) B03F (3×) B03F (3×) B03F (3×) B03F (3×) B03F (3×) B03F (3×) B03F (3×)

DDR2-BA1 DDR2-BA2 DDR2-CAS DDR2-CKE DDR2-CLK_N DDR2-CLK_P DDR2-CS DDR2-D0 DDR2-D1 DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15 DDR2-D16 DDR2-D17 DDR2-D18 DDR2-D19 DDR2-D2 DDR2-D20 DDR2-D21 DDR2-D22 DDR2-D23 DDR2-D24 DDR2-D25 DDR2-D26 DDR2-D27 DDR2-D28 DDR2-D29 DDR2-D3 DDR2-D30 DDR2-D31 DDR2-D4 DDR2-D5 DDR2-D6 DDR2-D7 DDR2-D8 DDR2-D9 DDR2-DQM0 DDR2-DQM1 DDR2-DQM2 DDR2-DQM3 DDR2-DQS0_N DDR2-DQS0_P DDR2-DQS1_N DDR2-DQS1_P DDR2-DQS2_N DDR2-DQS2_P DDR2-DQS3_N DDR2-DQS3_P DDR2-ODT DDR2-RAS DDR2-VREF-CTRL DDR2-VREF-DDR DDR2-WE DETECT1 DETECT1 DETECT-12V DETECT-12V DETECT2 DRX0DRX0+ DRX1DRX1+ DRX2DRX2+ DRX-5V DRXCDRXC+ DRX-DDC-CLK DRX-DDC-DAT DRX-HPD EA EJTAG-DETECT EJTAG-DETECT EJTAG-PNX5100-TCK EJTAG-PNX5100-TDI EJTAG-PNX5100-TDO EJTAG-PNX5100-TMS EJTAG-PNX5100-TRSTn EJTAG-TCK EJTAG-TDI EJTAG-TDO EJTAG-TMS

B03F (3×) B03F (3×) B03F (3×) B03F (3×) B03F (3×) B03F (3×) B03F (3×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (2×) B03F (3×) B03F (3×) B03F (2×) B03F (3×) B03F (3×) B01A (1×) B03H (3×) B01B (1×) B03H (1×) B03H (3×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B05A (3×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B03H (1×) B03G (1×) B03H (2×) B08C (2×) B08C (2×) B08C (2×) B08C (2×) B08C (2×) B03G (3×) B03G (3×) B03G (3×) B03G (3×)

EJTAG-TRSTN ENABLE-3V3 ENABLE-3V3 ENABLE-3V3 FE-CLK FE-CLK FE-DATA(0) FE-DATA(0) FE-DATA(1) FE-DATA(1) FE-DATA(2) FE-DATA(2) FE-DATA(3) FE-DATA(3) FE-DATA(4) FE-DATA(4) FE-DATA(5) FE-DATA(5) FE-DATA(6) FE-DATA(6) FE-DATA(7) FE-DATA(7) FE-ERR FE-SOP FE-SOP FE-VALID FE-VALID FRONT-C FRONT-C FRONT-Y_CVBS FRONT-Y_CVBS GND-SIG GNDSND GNDSND G-VGA G-VGA HP_LOUT HP_LOUT HP_ROUT HP_ROUT H-SYNC-VGA H-SYNC-VGA IF-AGC IF-N IF-P IRQ-CA IRQ-CA IRQ-CA IRQ-PCI IRQ-PCI KEYBOARD KEYBOARD LAMP-ON-OUT LAMP-ON-OUT LCD-SCL LCD-SCL LCD-SCL LED1 LED1 LED2 LED2 LEFT-SPEAKER LIGHT-SENSOR LIGHT-SENSOR MDO0 MDO1 MDO2 MDO3 MDO4 MDO5 MDO6 MDO7 MOCLKA MOSTRTA MOVALA MUTE NAND-AD(0) NAND-AD(1) NAND-AD(2) NAND-AD(3) NAND-AD(4) NAND-AD(5) NAND-AD(6) NAND-AD(7) NAND-ALE

B03G (3×) NAND-CLE B01A (1×) NAND-REn B01B (1×) NAND-WEn B03H (2×) PBS_SPI_DI B02A (1×) PBS-I2C-SCL B03B (1×) PBS-I2C-SCL B02A (1×) PCI-AD0 B03B (1×) PCI-AD0 B02A (1×) PCI-AD0 B03B (1×) PCI-AD0 B02A (1×) PCI-AD1 B03B (1×) PCI-AD1 B02A (1×) PCI-AD1 B03B (1×) PCI-AD1 B02A (1×) PCI-AD10 B03B (1×) PCI-AD10 B02A (1×) PCI-AD10 B03B (1×) PCI-AD10 B02A (1×) PCI-AD11 B03B (1×) PCI-AD11 B02A (1×) PCI-AD11 B03B (1×) PCI-AD11 B03B (2×) PCI-AD12 B02A (1×) PCI-AD12 B03B (1×) PCI-AD12 B02A (1×) PCI-AD12 B03B (1×) PCI-AD13 B03E (1×) PCI-AD13 B04C (2×) PCI-AD13 B03E (1×) PCI-AD13 B04C (2×) PCI-AD14 B01A (12×) PCI-AD14 B01B (2×) PCI-AD14 B06A (20×) PCI-AD14 B03E (1×) PCI-AD15 B04C (1×) PCI-AD15 B03C (1×) PCI-AD15 B04C (1×) PCI-AD16 B03C (1×) PCI-AD16 B04C (1×) PCI-AD16 B03E (1×) PCI-AD16 B04C (1×) PCI-AD17 B02A (2×) PCI-AD17 B02A (2×) PCI-AD17 B02A (2×) PCI-AD17 B03B (1×) PCI-AD18 B03G (2×) PCI-AD18 B05C (2×) PCI-AD18 B03G (1×) PCI-AD18 B05B (1×) PCI-AD19 B03G (1×) PCI-AD19 B03H (2×) PCI-AD19 B01B (1×) B03H (2×) B03H (2×) B04A (1×) B04C (1×) B03G (2×) B03H (1×) B03G (2×) B03H (1×) B06A (4×) B03G (2×) B03H (1×) B05C (4×) B05C (4×) B05C (4×) B05C (4×) B05C (4×) B05C (4×) B05C (4×) B05C (4×) B05C (4×) B05C (4×) B05C (4×) B06A (2×) B03G (2×) B03G (2×) B03G (2×) B03G (2×) B03G (2×) B03G (2×) B03G (2×) B03G (2×) B03G (2×)

B03G (2×) B03G (2×) B03G (2×) B04A (2×) B03G (2×) B04A (2×) B03G (2×) B05B (1×) B05C (1×) B08C (1×) B03G (2×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×)

18540_600_090324.eps 090324

3139 123 6443.1 2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 118

SSB: SRP List Part 2 Netname PCI-AD19 PCI-AD2 PCI-AD2 PCI-AD2 PCI-AD2 PCI-AD20 PCI-AD20 PCI-AD20 PCI-AD21 PCI-AD21 PCI-AD21 PCI-AD22 PCI-AD22 PCI-AD22 PCI-AD22 PCI-AD23 PCI-AD23 PCI-AD23 PCI-AD23 PCI-AD24 PCI-AD24 PCI-AD24 PCI-AD24 PCI-AD25 PCI-AD25 PCI-AD25 PCI-AD25 PCI-AD26 PCI-AD26 PCI-AD26 PCI-AD26 PCI-AD27 PCI-AD27 PCI-AD27 PCI-AD27 PCI-AD28 PCI-AD28 PCI-AD28 PCI-AD28 PCI-AD29 PCI-AD29 PCI-AD29 PCI-AD29 PCI-AD3 PCI-AD3 PCI-AD3 PCI-AD3 PCI-AD30 PCI-AD30 PCI-AD30 PCI-AD30 PCI-AD31 PCI-AD31 PCI-AD31 PCI-AD31 PCI-AD4 PCI-AD4 PCI-AD4 PCI-AD4 PCI-AD5 PCI-AD5 PCI-AD5 PCI-AD5 PCI-AD6 PCI-AD6 PCI-AD6 PCI-AD6 PCI-AD7 PCI-AD7 PCI-AD7 PCI-AD7 PCI-AD8 PCI-AD8 PCI-AD8 PCI-AD8 PCI-AD9 PCI-AD9 PCI-AD9 PCI-AD9 PCI-CBE0 PCI-CBE0 PCI-CBE0 PCI-CBE1

Diagram PCI-CBE1 B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B08C (1×) B03G (1×) B05B (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (2×) B05C (1×) B08C (1×) B03G (3×) B05B (1×) B05C (1×) B08C (1×) B03G (2×) B05B (1×) B05C (1×) B08C (2×) B03G (2×) B05B (1×) B05C (1×) B08C (1×) B03G (2×) B05B (1×) B05C (1×) B08C (1×) B03G (2×) B05B (1×) B05C (1×) B08C (1×) B03G (2×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (2×) B05B (1×) B05C (1×) B08C (1×) B03G (2×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B08C (1×) B03G (2×)

PCI-CBE1 PCI-CBE1 PCI-CBE2 PCI-CBE2 PCI-CBE2 PCI-CBE2 PCI-CBE3 PCI-CBE3 PCI-CBE3 PCI-CLK-ETHERNET PCI-CLK-ETHERNET PCI-CLK-OUT PCI-CLK-PNX5100 PCI-CLK-PNX5100 PCI-CLK-PNX8543 PCI-DEVSEL PCI-DEVSEL PCI-DEVSEL PCI-FRAME PCI-FRAME PCI-FRAME PCI-GNT PCI-GNT PCI-IRDY PCI-IRDY PCI-IRDY PCI-PAR PCI-PAR PCI-PAR PCI-PERR PCI-PERR PCI-PERR PCI-REQ PCI-REQ PCI-SERR PCI-SERR PCI-SERR PCI-STOP PCI-STOP PCI-STOP PCI-TRDY PCI-TRDY PCI-TRDY PCMCIA-A0 PCMCIA-A1 PCMCIA-A10 PCMCIA-A11 PCMCIA-A12 PCMCIA-A13 PCMCIA-A14 PCMCIA-A2 PCMCIA-A3 PCMCIA-A4 PCMCIA-A5 PCMCIA-A6 PCMCIA-A7 PCMCIA-A8 PCMCIA-A9 PCMCIA-D0 PCMCIA-D1 PCMCIA-D2 PCMCIA-D3 PCMCIA-D4 PCMCIA-D5 PCMCIA-D6 PCMCIA-D7 PCMCIA-VCC-VPP PDN PDP PI_3 PNX5100-BL-BOOST PNX5100-BL-BOOST PNX5100-BL-CTRL PNX5100-BL-CTRL PNX5100-DDR2-A0 PNX5100-DDR2-A1 PNX5100-DDR2-A10 PNX5100-DDR2-A11 PNX5100-DDR2-A12 PNX5100-DDR2-A2 PNX5100-DDR2-A3 PNX5100-DDR2-A4 PNX5100-DDR2-A5 PNX5100-DDR2-A6

B05B (1×) B05C (1×) B08C (1×) B03G (2×) B05B (1×) B05C (1×) B08C (1×) B03G (1×) B05B (1×) B08C (1×) B03G (1×) B05B (1×) B03G (2×) B03G (1×) B08C (1×) B03G (2×) B03G (2×) B05B (1×) B08C (1×) B03G (2×) B05B (1×) B08C (1×) B03G (2×) B05B (1×) B03G (2×) B05B (1×) B08C (1×) B03G (1×) B05B (1×) B08C (1×) B03G (2×) B05B (1×) B08C (1×) B03G (2×) B05B (1×) B03G (2×) B05B (1×) B08C (1×) B03G (2×) B05B (1×) B08C (1×) B03G (2×) B05B (1×) B08C (1×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (2×) B05C (5×) B02A (2×) B02A (2×) B03H (2×) B07B (1×) B08C (1×) B07B (1×) B08C (1×) B08B (3×) B08B (3×) B08B (3×) B08B (3×) B08B (3×) B08B (3×) B08B (3×) B08B (3×) B08B (3×) B08B (3×)

PNX5100-DDR2-A7 PNX5100-DDR2-A8 PNX5100-DDR2-A9 PNX5100-DDR2-BA0 PNX5100-DDR2-BA1 PNX5100-DDR2-CAS PNX5100-DDR2-CKE PNX5100-DDR2-CLK_N PNX5100-DDR2-CLK_P PNX5100-DDR2-CS PNX5100-DDR2-D0 PNX5100-DDR2-D1 PNX5100-DDR2-D10 PNX5100-DDR2-D11 PNX5100-DDR2-D12 PNX5100-DDR2-D13 PNX5100-DDR2-D14 PNX5100-DDR2-D15 PNX5100-DDR2-D16 PNX5100-DDR2-D17 PNX5100-DDR2-D18 PNX5100-DDR2-D19 PNX5100-DDR2-D2 PNX5100-DDR2-D20 PNX5100-DDR2-D21 PNX5100-DDR2-D22 PNX5100-DDR2-D23 PNX5100-DDR2-D24 PNX5100-DDR2-D25 PNX5100-DDR2-D26 PNX5100-DDR2-D27 PNX5100-DDR2-D28 PNX5100-DDR2-D29 PNX5100-DDR2-D3 PNX5100-DDR2-D30 PNX5100-DDR2-D31 PNX5100-DDR2-D4 PNX5100-DDR2-D5 PNX5100-DDR2-D6 PNX5100-DDR2-D7 PNX5100-DDR2-D8 PNX5100-DDR2-D9 PNX5100-DDR2-DQM0 PNX5100-DDR2-DQM1 PNX5100-DDR2-DQM2 PNX5100-DDR2-DQM3 PNX5100-DDR2-DQS0_N PNX5100-DDR2-DQS0_P PNX5100-DDR2-DQS1_N PNX5100-DDR2-DQS1_P PNX5100-DDR2-DQS2_N PNX5100-DDR2-DQS2_P PNX5100-DDR2-DQS3_N PNX5100-DDR2-DQS3_P PNX5100-DDR2-ODT PNX5100-DDR2-RAS PNX5100-DDR2-VREF-CTRL PNX5100-DDR2-VREF-DDR PNX5100-DDR2-WE PNX5100-LCD-PWR-ON PNX5100-LCD-PWR-ON PNX5100-RST-OUT PNX8543-BL-BOOST_SPI-CLK PNX8543-BL-BOOST_SPI-CLK PNX8543-BL-BOOST_SPI-CLK PNX8543-LCD-PWR-ON_SPI-DI PNX8543-LCD-PWR-ON_SPI-DI PNX8543-LCD-PWR-ON_SPI-DI POWER-OK POWER-OK PROT-DC PROT-DC PSEN RC RC RC RC_uP RC1 RC1 RC1 RC2 RC2 RC2 REGIMBEAU_CVBS-SWITCH REGIMBEAU_CVBS-SWITCH

B08B (3×) B08B (3×) B08B (3×) B08B (3×) B08B (3×) B08B (3×) B08B (3×) B08B (3×) B08B (3×) B08B (3×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (2×) B08B (3×) B08B (3×) B08B (2×) B08B (3×) B08B (3×) B07B (1×) B08C (1×) B08C (2×) B03G (2×) B04A (1×) B07B (1×) B03G (2×) B04A (1×) B07B (1×) B01B (1×) B03H (2×) B01A (1×) B01B (1×) B03H (1×) B03G (1×) B03H (1×) B04A (1×) B03H (2×) B03H (1×) B04A (1×) B04C (1×) B03H (1×) B04A (1×) B04C (1×) B03H (2×) B04B (1×)

RESET-ETHERNET RESET-ETHERNET RESET-NVM RESET-PNX5100 RESET-PNX5100 RESET-STBY RESET-SYSTEM RESET-SYSTEM RESET-SYSTEM RF-AGC RIGHT-SPEAKER RREF-PNX85XX RREF-PNX85XX R-VGA R-VGA RX0RX0+ RX1RX1+ RX2RX2+ RX51001ARX51001ARX51001ARX51001A+ RX51001A+ RX51001A+ RX51001BRX51001BRX51001BRX51001B+ RX51001B+ RX51001B+ RX51001CRX51001CRX51001CRX51001C+ RX51001C+ RX51001C+ RX51001CLKRX51001CLKRX51001CLKRX51001CLK+ RX51001CLK+ RX51001CLK+ RX51001DRX51001DRX51001DRX51001D+ RX51001D+ RX51001D+ RX51001ERX51001ERX51001ERX51001E+ RX51001E+ RX51001E+ RX51002ARX51002ARX51002ARX51002A+ RX51002A+ RX51002A+ RX51002BRX51002BRX51002BRX51002B+ RX51002B+ RX51002B+ RX51002CRX51002CRX51002CRX51002C+ RX51002C+ RX51002C+ RX51002CLKRX51002CLKRX51002CLKRX51002CLK+ RX51002CLK+ RX51002CLK+ RX51002DRX51002DRX51002DRX51002D+

B03H (2×) B05B (2×) B03H (3×) B03H (2×) B08C (1×) B03H (2×) B02A (1×) B03G (1×) B03H (3×) B02A (2×) B06A (4×) B03A (2×) B05A (1×) B03E (1×) B04C (1×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B05A (2×) B03B (1×) B07B (1×) B08D (1×) B03B (1×) B07B (1×) B08D (1×) B03B (1×) B07B (2×) B08D (1×) B03B (1×) B07B (2×) B08D (1×) B03B (1×) B07B (2×) B08D (1×) B03B (1×) B07B (2×) B08D (1×) B03B (1×) B07B (2×) B08D (1×) B03B (1×) B07B (2×) B08D (1×) B03B (1×) B07B (2×) B08D (1×) B03B (1×) B07B (2×) B08D (1×) B03B (1×) B07B (2×) B08D (1×) B03B (1×) B07B (2×) B08D (1×) B03B (1×) B07B (1×) B08D (1×) B03B (1×) B07B (1×) B08D (1×) B03B (1×) B07B (1×) B08D (1×) B03B (1×) B07B (1×) B08D (1×) B03B (1×) B07B (1×) B08D (1×) B03B (1×) B07B (1×) B08D (1×) B03B (1×) B07B (1×) B08D (1×) B03B (1×) B07B (1×) B08D (1×) B03B (1×) B07B (1×) B08D (1×) B03B (1×)

RX51002D+ RX51002D+ RX51002ERX51002ERX51002ERX51002E+ RX51002E+ RX51002E+ RXCRXC+ RXD RXD RXD-BOLT-ON RXD-MIPS RXD-MIPS RXD-MIPS2 RXD-UP RXD-UP RXD-UP SC1-B SC1-B SC1-B SC1-G SC1-G SC1-G SC1-R SC1-R SC1-R SCL1 SCL2 SCL3 SCL-AMBI-3V3 SCL-AMBI-3V3 SCL-DISP SCL-DISP SCL-SET SCL-SET SCL-SSB SCL-SSB SCL-SSB SCL-SSB SCL-SSB SCL-TUNER SCL-UP-MIPS SCL-UP-MIPS SDA1 SDA2 SDA3 SDA-AMBI-3V3 SDA-AMBI-3V3 SDA-DISP SDA-DISP SDA-SET SDA-SET SDA-SSB SDA-SSB SDA-SSB SDA-SSB SDA-SSB SDA-TUNER SDA-UP-MIPS SDA-UP-MIPS SDM SENSE+1V2-PNX5100 SENSE+1V2-PNX5100 SENSE+1V2-PNX85XX SENSE+1V2-PNX85XX SIF SIF SIF-GND SIF-GND SPDIF-IN SPDIF-IN SPDIF-OUT SPDIF-OUT SPDIF-OUT-1 SPDIF-OUT-1 SPI-CLK SPI-CSB SPI-DO_I2C-SDA SPI-DO_I2C-SDA SPI-PROG SPI-SDI SPI-SDO SPI-WP

B07B (1×) B08D (1×) B03B (1×) B07B (1×) B08D (1×) B03B (1×) B07B (1×) B08D (1×) B05A (2×) B05A (2×) B03G (1×) B04A (1×) B04A (3×) B03G (2×) B04A (2×) B03G (2×) B03G (1×) B03H (2×) B04A (2×) B03E (1×) B04A (1×) B04B (2×) B03E (1×) B04A (1×) B04B (2×) B03E (1×) B04A (1×) B04B (1×) B03G (2×) B03G (3×) B03G (2×) B08C (1×) B08E (1×) B03G (1×) B07B (3×) B01B (1×) B03G (3×) B02A (1×) B03G (2×) B04A (1×) B05A (1×) B08C (2×) B02A (2×) B03G (3×) B03H (2×) B03G (2×) B03G (3×) B03G (2×) B08C (1×) B08E (1×) B03G (1×) B07B (3×) B01B (1×) B03G (3×) B02A (1×) B03G (2×) B04A (1×) B05A (1×) B08C (2×) B02A (2×) B03G (3×) B03H (2×) B03H (3×) B01B (2×) B08A (4×) B01A (1×) B03A (1×) B02A (1×) B03E (1×) B02A (1×) B03E (2×) B03D (1×) B04A (1×) B04B (1×) B04C (1×) B03D (1×) B04C (1×) B03H (2×) B03H (2×) B03G (2×) B04A (1×) B03H (3×) B03H (2×) B03H (2×) B03H (3×)

STANDBY STANDBY STANDBY TX1ATX1ATX1A+ TX1A+ TX1BTX1BTX1B+ TX1B+ TX1CTX1CTX1C+ TX1C+ TX1CLKTX1CLKTX1CLK+ TX1CLK+ TX1DTX1DTX1D+ TX1D+ TX1ETX1ETX1E+ TX1E+ TX2ATX2ATX2A+ TX2A+ TX2BTX2BTX2B+ TX2B+ TX2CTX2CTX2C+ TX2C+ TX2CLKTX2CLKTX2CLK+ TX2CLK+ TX2DTX2DTX2D+ TX2D+ TX2ETX2ETX2E+ TX2E+ TX3ATX3ATX3A+ TX3A+ TX3BTX3BTX3B+ TX3B+ TX3CTX3CTX3C+ TX3C+ TX3CLKTX3CLKTX3CLK+ TX3CLK+ TX3DTX3DTX3D+ TX3D+ TX3ETX3ETX3E+ TX3E+ TX4ATX4ATX4A+ TX4A+ TX4BTX4BTX4B+ TX4B+ TX4CTX4C-

B01B (1×) B03H (2×) B04A (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×)

TX4C+ TX4C+ TX4CLKTX4CLKTX4CLK+ TX4CLK+ TX4DTX4DTX4D+ TX4D+ TX4ETX4ETX4E+ TX4E+ TXD TXD TXD-BOLT-ON TXD-MIPS TXD-MIPS TXD-MIPS2 TXD-UP TXD-UP TXD-UP UART-SWITCH USB20-DM USB20-DP USB-OC VDD_1V8 VDDA-ADC VDDA-AUDIO VDDA-AUDIO VDDA-DAC VDDA-DAC VDDA-LVDS VDDA-LVDS VDDH_3V3 VDDO_3V3 VDDS_3V3 VSW V-SYNC-VGA V-SYNC-VGA WC-EEPROM-PNX5100_SPI-DI WC-EEPROM-PNX5100_SPI-DI WC-EEPROM-PNX5100_SPI-DI WC-EEPROM-PNX5100_SPI-DI WP-NANDFLASH WP-NANDFLASH XIO-ACK XIO-SEL-NAND Y_CVBS-MON-OUT Y_CVBS-MON-OUT Y_CVBS-MON-OUT-SC

B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B07B (2×) B08D (1×) B03G (1×) B04A (1×) B04A (3×) B03G (2×) B04A (2×) B03G (2×) B03G (1×) B03H (2×) B04A (2×) B03H (2×) B03G (2×) B03G (2×) B03G (2×) B05A (2×) B03A (1×) B03A (2×) B03D (4×) B03A (1×) B03D (1×) B03A (1×) B03B (1×) B05A (3×) B05A (2×) B05A (2×) B01A (1×) B03E (1×) B04C (1×) B03G (1×) B04A (1×) B04C (1×) B08C (2×) B03G (2×) B03H (2×) B03G (3×) B03G (3×) B03E (1×) B04B (1×) B04B (2×)

18540_601_090324.eps 090324

3139 123 6443.1 2009-Apr-03

Circuit Diagrams and PWB Layouts

Q548.1E LA

10.

EN 119

4CE2

2CE5

2C44

3P16 5C66

2P90

FP42 FP38

FC90

2C91

FPG3

FT06 FJ14

FPG4

7P02

2C96 5C61

3CGE

2P81

3CD7 3CD8

3CD9

3CDA

2910

FP75

4M03

4M02

3M46

2P74 2P72

FP61

2B16

2P58

2P57

2P56

2P55

2P54

FP58

7M01

FP86

3P07 2P78

3B18

FP62

2M12

4M06

2B09

2B08

2B13 2B18

2B12

3B05

3B19

3B21

3B22

2B15

3B16 3B11 3B13 3B14

2B04

2B14

2B03

2P60

2P59

FP66

FP64

FP55

4M05

5M88 3M98

FM07

2M86

5M87

3M99

FM06

3M96

FM02

3M81 3D30

2D03

7D00 7D01 7D02

5M84

FM03

7M80

3M88

5M82

2M90 IM87

5M81

3M87

IM86

2M91

FM01

5M80

3M86

FM00

3D36

ID23

3D67

3D33 ID50

FM04

5M83

2M89

3D28

3B26

ID17

FP84

FM05

2M88

3M83

4M84

4M88

3D29

3M97 3M82

3M80

6D01

7M81

2M95

2B39

2B33

2B34

2B35

FM34

3M84

3B48 3B50

2B42

3B43

3B42

3B37

3B32 3B34 3B35 3B31 3B33

ID22 3D34

ID51

4D08

3M18

3M17

3M91

2B29 2B27

3B41 3B27 3B28 3B30 3B29

2M87

IM89

IM88

ID20

2B36

3M92 3M26

2B37

2B26

3B38

3M90 IM07

FB00

5M85

4M83

ID19

3B36

3M16

2B31

3M27

2B32

3M93

4702 4700

2B40

2B28

3M25

3B40 3B45

3B46 3B39

2644

3M14

3M15

3M19

2B41

2B24

3M08

3710

2B30

2B23

F611

2B25 2B38

3M09

3M24

3M10

2613 2616

2P61

2P65

FP56

ID47

3M89

3M38

3M37

2P63

2P68 2P66 2P92 2P64 2P62

IM84

2650 2649

I600

2P70

2P69

2P79 3P08

IM90

2611 2609

FH48

2P71

2B06

ID18

2610

3H64

2P75

2P67

FP60

FP57

3B00

FB02

2690 2B00

2689 2656 2651

FP70

FP65

FP63

2B01

2676 2615 2618 2685 2683

F600

F605

2614

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I129

2H37

3H12

3157

2110 3135

3107 3106

I127

3156

FH25 FH15

3H15

7106

I147

2H39

FH04

FH07

3G00

5H04

FH00

2H03

F335

2G01

7H01

F337

2M02

2304

2L08

3356 3357 2353

I130

3376 3370

I329

2M05

3M33

2215

1G18

F214

F227

3232

I202

I331

I328

FH38

5N07

2N0T

2N0S

FM09

3M32

I216

3372

FH46

FH08

1G01

3359 2354 3358 3311

6M05 6M04

F231

3371

2M16

FH06

6G01

3373

7312

FM38

2214

2L20 5204

I327

2356 I325

A325

5302

IN15

3355

5M01

3233 2211

3103

3369 3387

7315 IN08

IM18

3223 3222

F111

3368

3367

3389

6302

2355

I326

3374 3375

6301

IN05

FM08

1303

7H11

1G10

1G13

1M09

2217

2L28 2L24

3229 3230 3231

I217

2205 2357

IN06

FM10

1N00

3M94

1H02

F216

3226 3225

I215

3N0T

3364 IN07

FM23

2L10

2L12

F222

I214

IN18

2219

7202

CL10

2L38

7D10

2D16

7224

IM13

I210

IN16

2L07 4L01

3D64

3M68

2341 2342 3316 3317

7L03

2L29 2L23

F217

6D02

IM14

3221 3N0L

3N0N

IN0P

3L17

2L06

FP99

FD12

2225

6M03

3L18

2L09 5L10

1L53

3D39

2206 2208 2207

IK03

5304

2L37

2213

5203

2L05 3L16 3L09

2212

2122

2L11 5L01

1L54

5102

2123

2104

ID45 FD07

4D09

3K29

2K09

3K11

2H05

5103 6217

7102

2107

FD06

FD08

ID31

I219

2M93

7101

2D06

7D06

3D56

3K13

IK12

I212

1X07 5H00

2141 2117

FD04

3M67

3601

2K06

2K07

3K21

7K01

3K28

FM33

IM28

2H01

2111 2118

7602

2N0R

2218

2112 2116

5L07

5101

2125

2124

1M99

5100

2140 2119

7D07

2N0Q

2N0Z

5N06

2N15

3K27

3K26

3M54 3M66

IK15

IK13

7K04

5M00

5105

2H02

2223

FD11 IK16

3224

2H00

5221

7222

5603

2697

2626

IK05

3K04

IK14

3K18

3M59

2229

2228

5222

2224

2226

2227

2222

3K06 IK46

IK47

2127

2221

2N0Y

IN17

2M11

3M58

7M00

3K23

2N14

2P82 4P39

1X05

4P28 4P31

4P26

6D00

3K24

4P30

4P29

FM12

FPF0

FPC6

FPC5

2M04

2230

1G14

2G36

FM21

FF24

4G05

2G19

FG08

2N1C

3D57 2D00

2C6A

2C99 2C98

7601

2601

2603

1M20

5G02

IG12

FE44

IG03

3G06

6G04

1G02

1F17

1F05 1F03 1F22

3G08

6G05 2G06

FG19

3D20

3D18

4A06 3A15

5104 1L50 1L51 1L52

FE29

FG25

3377

1735

2G25

1M01

FE12

FE11

2F34

1G05

1E01 1E04

1F20

1F18

1F19

1F08

1F06

1F00 3926

2G08

IG02

FG29

IN09

1736

2G33

4G08

IG19

IG13

3M05

7F01

1G07

2D08

3D42

1D00

2A21 2A10 2A68 3A35 3A34 2A50 3A37 2A52 3A36 2A57 3A47 3A46 2A53 3A38 3A39 3A21 2A31 2A71 CA01 2A60 3A49 2A59

2M10

1X08

IG16

IG17

FE43

3E49

2G51

1D01

2A08 3A19 3A17

7600

3708

2G28

IG21

IG20 3M45

3M72

2F00 3F04

FG22

1G09

3915 2A13 3A52

3707

3M70

FG21

2G20

2G50

3A53 3A42 2A553A43 2C93

7C60

7B01

1P09

1X03

3E44 FE40

FG18

I848

2602 2600

3E50

2F25

2909

3927

1F01

1F23

3G56

1F04

3G58

7G31

3G59

4G09

3G60

7G32

2D07

3D23

3D26

3D25

2934 2908

2D17

3D40

3905

2935

3904

3D47

3925

3923

3903

3924 2901

2927 2926

4902

2932 4901 2905 2931

3912

2906 2900

3812 3911

3914 3913

1G51

3CFK 3CFL

4903

I615

1M95

1F21

1F10 1F07

2F37 3F47

3F45

3F46 3F49

3F50 3F53

3F51

2F39 7F07

1F02

3G63

1G35 1G34

2F36

3G61

1G33 1G32

1R50

CC60

1G30

3D49

4P19

IG18

3E43

FM16

FM22 IG15

2G31

3E42

FE39

FG17

1M36 1G20

1G17

1G15

1G16

1G52

4P154P164P174P18

2P95

2P83

1G31

4905

4P20

3E48

3E47

2E13 3E23 2E12

3E21

2E08 3E20

3E22

1G25

ICD1

4P24 4P23 4P22 2P80

3M47

IG22

FE37

FG24

1X12

2F35

1CJ0

FM15 3M71

6G15 2G29

7G01

FM17

FM13

3C09

7C00

FE41

FE38

5F00

6P01

3E45 3E46

FE17

3C07

3C05

FG06

FE42

1F09

3C11

4E09 3E18 4E11 2E09 4E10 2E10 4E12 3E19

7C01

3C03

3C06 3C08

3C28

3C12

3C13

1CE4 3C27

7C02 3C32

3C31

3C25

1E32

1M03

FG05

1E00 1G06

1G50

3C30

3C26

1E02 1X02

3G30

FPF5

1CE2

1CE3

1M59

1X01

5CE7

Layout Small Signal Board

4316

FH36

1H04

1H05

FH16

18540_550_090311.eps 090320

31391236443.1

2009-Apr-03