digital490r1

Digital Circuit Practice for ELEC49x

Stan Simmons Electrical & Computer Engineering Queens University

Topics of Discussion ¾TTL and CMOS interfacing ¾Cautions ¾Switching-induced glitches ¾Circuit crosstalk and avoidance ¾Separating analog and digital ¾LED and relay driving ¾Opto-isolation

Logic Families and Levels 2V to5V supply

HC

VOH ~ VSUPPLY HC can drive any family VOL ~ GND

5V supply LS or NMOS

5Vsupply reduced VOH

Use only HC R where possible!

LS = Low power Schottky TTL HC = High-Speed CMOS HCT = High-speed CMOS, TTL input levels LVC = Low voltage CMOS AC,ACT = Advanced (high speed) ABT,FC,FCT,GTL, ‌.etc etc.

HCT 5Vsupply HC

Logic Levels VDD = 2V to5V supply VIH

HC

VOH VOL

VIL

VDD

VOH

VOUT

VOL VIL Vth VIH

VDD

VIN

Logic Families and Levels ¾ See manufacturers web sites for “Selection Guides” ¾ Be careful mixing chips with different power supply voltages (e.g. 2.5 V and 3.3V chips cannot drive an adequate logic high level on inputs of 5V chips)-use NPN transistor circuit in common emitter configuration (or custom driver chip) to boost voltage: VDD=5V

VDD=2.5V

VDD=5V

10K Chip

VOH ~ 2.5V 10K GND

NPN _

VOH ~ 5V

Chip

Clocking Cautions 他 Make sure clock signals are sharp and clean!

+5V T

Q

CLK two transitions FIX:

Low slope and/or dirty signal

74HC14

two transitions, not one!

74HC14

clean, sharp

CLK

Input Cautions ¾ Don’t let unused CMOS inputs float; instead tie them high or low.

VDD unconnected High, glitchy VSS

supply current

¾ Avoid static discharge (touch supply chassis BEFORE circuit board) VDD

VSS

Output Cautions 他 Excessive STATIC current can cause VOH and VOL to violate input thresholds of driven chips VOH droops

VDD +

in

V_DROP

in = ??

out ISTATIC GND VOL rises

VDD ISTATIC

in

out + _ VRISE GND

in = ??

Switching Glitches ¾ Ground bounce caused by GND supply circuit inductance VDD

CLK

CLOAD

Vdd out Gnd

in + VBOUNCE

falls

L

ISWITCH

CLOAD

GND _ Chip loses valid GND reference for its inputs during CLK edge (similar problem on the VDD side too) ¾ Made worse by “FAST” switching logic families ( since current I is bigger)

Bypass Capacitors ¾ Minimizes Vdd and Gnd bounce on all switching transients VDD VDD CLK in

Vdd

I

VDD CBYPASS

Gnd GND

GND - CBYPASS acts like“local” low-inductance mini power supply - use 0.01uF bypass capacitor, or 0.1uF for larger chips (uC, RAM, EPLD, etc.)

- use ceramic or polyester capacitors for low-inductance

Wire Inductance L 他 Depends on wire gauge (radius), and distance to ground return

High flux, high L

Low flux, low L

Ground return (ground plane) 他 To minimize inductance in VDD and GND connections, use THICK gauge (circuit board fingers are best) 他 To minimize inductance also keep wires and circuit board traces close to ground return (ground plane)

Board Power Distribution 他 Want thick low-inductance VDD and GND connections = bypass capacitor

VDD bus

+ _

= chip

GND bus = 100 uF electrolytic capacitor

Crosstalk 他 Capacitive and inductive coupling

out

Chip 1

in

CLK

Voltage pulse induced on input line of Chip 2

I

V

Chip 2

+

_ CC

Asynchronous sets and resets, and CLK lines, are most vulnerable + _

CD

Coupling and Direct Capacitances CC and CD 他 Depends on separation distances

B

A

CC

Ground return (ground plane) 他 To minimize voltage induced onto B by signal on A, minimize ratio CC /CD 他 This is a simplified view, it is really a coupled transmission line effect -- B is also driven at one end by another source

CD

Board Signal Distribution

¾ Want to keep signal wires (or circuit board traces) spaced apart for low cross-coupling BAD

“routing channel” GOOD

Separating Analog + Digital ¾ Digital switching noise can enter analog circuits through power supply lines spiky I SWITCH

_VDISTURB

Reg

+

VDD = 5V Digital Chips

I DISTURB

supply line parasitic L’s Analog Chips

GND _ + V DISTURB

+ 9V _

Separating Analog + Digital ¾ Isolate with bypass capacitors (and optionally a series choke) spiky I SWITCH

LCHOKE

VDISTURB ~0 _

Reg VDD = 5V

+

No spikes supply line parasitic L’s

Digital Chips

+ 9V

Analog Chips

GND LCHOKE deliberately BIG ~ 10 uH and rated at several amps DC!

+

VDISTURB ~0

_

_

Driving LED’s ¾ Large currents may require use of extra driver chip or transistor ILED small:

VDD ILED

Chip

ILED

R

Chip R

GND ILED big:

VDD ICHIP

ILED

Chip GND driver chip available

Driving Relays 他 Small chip current controls large relay coil current VDD RCOIL

Iout

ICOIL

Chip + GND

Vout _

NPN

contact closed

他 Collector current = Base current * beta (note series base resistor needed!)

Driving Relays 他 Large inductance of relay coil poses a problem VDD

_ VSPIKE

Iout

+

Chip + GND

Vout _

contact opens

他 When driver base current goes to zero, collector current tries to turn off. But coil inductance insists that current not change abruptly, and large VSPIKE destroys transistor!

Driving Relays ¾ Added diode gives inductive protection VDD

_ V = VDIODE

Iout

+

Chip + GND

contact opens

Vout _

¾ “Freewheel” diode carries ICOIL (inductor) current till it dies away ICOIL

contact opens in msecs

tDROPOUT

time

Need for Optical Isolation 他 Low-voltage microcomputer circuit controls highvoltage circuit

VDD = 5V

48V relay +

Micro

_ GND

motor

48V

Need for Optical Isolation 他 Short in relay, or failure of freewheel diode causes destruction of Micro

VDD = 5V

48V relay +

Micro GND

_ motor

48V

Optical Isolation Works 他 Infrared optoisolator allows complete electrical isolation of power supplies

48V relay

VDD = 5V

+ Micro

IR

_

48V

motor

GND 2000 V insulation

他 High insulation resistance of opto-isolator package (2000V) saves Micro