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Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems Kenji Okabe 1 , Horagodage Prabhath Jeewan 1 , Shota Yamagiwa 1 , Takeshi Kawano 1 , Makoto Ishida 1,2 and Ippei Akita 1, * Received: 9 October 2015; Accepted: 14 December 2015; Published: 16 December 2015 Academic Editor: Hung Cao 1

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Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, Aichi 441-8580, Japan; okabe-k@int.ee.tut.ac.jp (K.O.); jeewan@int.ee.tut.ac.jp (H.P.J.); yamagiwa-s@int.ee.tut.ac.jp (S.Y.); kawano@ee.tut.ac.jp (T.K.); ishida@ee.tut.ac.jp (M.I.) Electronics-Inspired Interdisciplinary Research Institute (EIIRIS), Toyohashi University of Technology, Aichi 441-8580, Japan Correspondence: ippei.akita@ieee.org; Tel.: +81-532-44-6746 (ext. 6746); Fax: +81-532-44-6757

Abstract: In this paper, a co-design method and a wafer-level packaging technique of a flexible antenna and a CMOS rectifier chip for use in a small-sized implantable system on the brain surface are proposed. The proposed co-design method optimizes the system architecture, and can help avoid the use of external matching components, resulting in the realization of a small-size system. In addition, the technique employed to assemble a silicon large-scale integration (LSI) chip on the very thin parylene film (5 µm) enables the integration of the rectifier circuits and the flexible antenna (rectenna). In the demonstration of wireless power transmission (WPT), the fabricated flexible rectenna achieved a maximum efficiency of 0.497% with a distance of 3 cm between antennas. In addition, WPT with radio waves allows a misalignment of 185% against antenna size, implying that the misalignment has a less effect on the WPT characteristics compared with electromagnetic induction. Keywords: wireless power transmission; wafer-level packaging; flip-chip bonding; flexible substrate; rectenna

1. Introduction Advances in techniques employed in wireless sensor systems have enabled the creation of novel biomedical applications [1,2]. In particular, neural interface systems including micro-electrode arrays and signal processing circuits have been studied to identify human brain functions based on the weak electrical signals caused by the activity of nerve cells in the brain [3–10]. The signals obtained from the neural interface are essential for realizing brain-machine interfaces and supporting the lack of information in the brain caused by disorders and diseases. However, neural recording systems that use wire lines to connect the implanted device to an external device can cause infections through the opening in the skull and the dura. Although the skull is typically be sealed with cement after surgery, it would be difficult to hold the wire and the dura. As a result, there is a risk of infection and leakage of the cerebrospinal fluid during long-term measurement. Therefore, using fully implantable neural interfaces are necessary to solve this problem [11–17]. For realizing wireless communication and power transmission to the implanted neural interface on the brain surface, several technologies that integrate passive components (e.g., an antenna on a flexible film) with high-performance active circuits have been studied [18–22]. In particular, many Sensors 2015, 15, 31821–31832; doi:10.3390/s151229885

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Sensors 2015, 15, 31821–31832

functional circuits including amplifiers, analog-to-digital converters, signal processors, and RF circuits are needed and they should all support low-power operation [23–33]. Very thin film flexible transistors fabricated with organic or bio-resorbable materials can be used to fabricate monolithic film devices with passive and active components. However, these flexible transistors require a large area for the multi-functional circuits because the gate size of the transistors exceeds 15 µm caused by evaporation through a shadow mask [18]. Therefore, implementing highly integrated systems using flexible transistors might be difficult. As an alternative, fabrication processes that integrate a complementary metal-oxide semiconductor (CMOS) IC on a flexible substrate have been developed [19–23]. Although the mounting method based on a micro electro-mechanical system (MEMS) technology enables accurate alignment in the integration of the CMOS IC chip and the flexible film device, this alignment becomes challenging when mounting several chips on the same film [19,20]. To overcome this challenge, a mounting technique using the flip-chip bonding method has been studied. This method can help achieve good alignment even if several chips are packaged on a flexible substrate [21,22]. A polyimide film and a CMOS IC chips have also been integrated using flip-chip bonding technology [21]. Because this polyimide film has a certain thickness, the fabricated device exhibited sufficient flexibility and hardness, making it suitable to be implanted on the surface of the eyeball. However, the neural interface implanted on the brain surface requires that the flexible film be thinner in order to fit the shape of the brain [6]. Therefore, there is a need for a technique that can be used for mounting CMOS IC chips on a very thin film device. The design methodology of RF circuits is also important to realize such small-size implantable devices. In the wireless power transmission (WPT) device, an inductance element is generally required for matching the impedance between an antenna and a rectifier [23], that is, external components are required. Considering the size constraint of the implantable device, a design method that eliminates such matching components should be considered. Although [24] achieves a small inductance for matching impedance by using an inductive antenna, it is difficult to apply in implantable devices because this antenna is relatively large and thick, 50 mm ˆ 43 mm ˆ 0.5 mm. Therefore, an antenna and a rectifier (rectenna) co-design method must be considered to reduce the use of matching components and miniaturize the antenna size. In this paper, we propose a co-design method and an assembly technique of a flexible antenna and the CMOS rectifier chip for realizing small-sized implementation of implantable neural interfaces. The advantages of the proposed technique are that it does not require any off-chip matching components between the antenna and the rectifier, and it allows integration of a high-performance silicon chip on an ultra-thin flexible film with a thickness of 10 µm. For minimizing the size of the implantable device, the antenna is designed to have a small inductance to avoid using additional matching components between the antenna and the rectifier. Furthermore, an on-chip transformer preceding the rectifier can reduce the inductance, resulting in a smaller inductive antenna device. In addition, we have developed a wafer-level packaging technique for mounting the CMOS IC chip on a thin film with flip-chip bonding. To the best of our knowledge, an assembly technique on a thin film with a thickness of 5 µm has never been reported in the past. Although a previous study [34] by the authors reported a silicon CMOS rectifier chip mounted on the antenna with the flexible substrate and demonstrated WPT, detailed design methodologies and discussions were not provided. This paper presents additional information on an impedance matching method and analysis, the flip-chip bonding process, and additional measurement results and discussion for realizing small-sized devices. The remainder of this paper is organized as follows: in Section 2, we present the architecture and the co-design method of the flexible rectenna that contains a flexible antenna, an on-chip transformer, and a CMOS rectifier for impedance matching. Section 3 explains the fabrication process for the flexible device, especially the flip-chip bonding technology to connect a silicon chip. In Section 4, we demonstrate WPT by the fabricated device, and discuss the power transfer efficiency by comparing the measured and calculated results. Finally, conclusions are provided in Section 5.

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2. Flexible Rectenna Device

2. Flexible Rectenna Device

2.1. Architecture of the Implantable Device 2.1. Architecture of the Implantable Device The proposed architecture of flexible the flexible device implanted on brain the brain surface is shown in The proposed architecture of the device implanted on the surface is shown in Figure 1. Figure 1. Highly functional active circuits are implemented in a silicon chip that is embedded in a film. Highly functional active circuits are implemented in a silicon chip that is embedded in a flexible Some passive components, including theelectrode antenna array, and the array, in arethe also Someflexible passivefilm. components, including the antenna and the areelectrode also patterned flexible patterned in the flexible film. A thin parylene film is selected as the flexible material because of its film. A thin parylene film is selected as the flexible material because of its good flexibility, which allows it good flexibility, which allows it to fit the brain surface, and its high biocompatible. In this paper, as to fit the brain surface, and its high biocompatible. In this paper, as a WPT part is considered, a co-design a WPT part is considered, a co-design methodology of circuits and the antenna is needed for methodology circuits and design the antenna is needed forsize achieving the optimum in terms of is device achievingofthe optimum in terms of device and performance, anddesign the methodology size and performance, and the methodology is described in the next section. described in the next section.

Figure 1. Proposed architecture of the flexible device for wireless-powered neural interface systems.

Figure 1. Proposed architecture of the flexible device for wireless-powered neural interface systems.

2.2. Co-Design Methodology

2.2. Co-Design Methodology

Figure 2 shows the circuit diagram of the flexible rectenna designed for WPT. The flexible

Figure 2 shows theparts: circuit diagram of the flexible designed an foron-chip WPT. The flexible rectenna rectenna has three a flexible antenna having arectenna small inductance, transformer for matching impedance between the aantenna and the rectifier, and atransformer rectifier circuit. In this the has three parts:the a flexible antenna having small inductance, an on-chip for matching schematic, the antenna is madeand of metal in the parylene film and circuit. the other implemented in impedance between the antenna the rectifier, and a rectifier Inparts this are schematic, the antenna a 180-nm standard CMOS process. The rectifier circuit is formed by cascading in three stages and it is made of metal in the parylene film and the other parts are implemented in a 180-nm standard CMOS has charge pump capability for DC–DC conversion [35]. To design the on-chip transformer between process. The rectifier circuit is formed by cascading in three stages and it has charge pump capability a 50-Ω terminated antenna and the CMOS rectifier, the input impedance of the rectifier should be for DC–DC conversion [35]. To design the on-chip transformer between a 50-Ω terminated antenna and calculated assuming that the MOS transistor is switched on. The received antenna would be able to the CMOS rectifier, the input impedance of the rectifier should be calculated assuming that the MOS receive about 700 μW (−1.54 dBm), which is determined by available received power on the human transistor switched on.the Thegate received would be ablerectifier to receive 700 µW (´1.54 dBm), brain is [17]. Therefore, size of antenna MOS transistors in the and about the on-chip transformer whichwere is determined available receivedofpower theantenna humanwhen brainthe [17]. Therefore, gate size of designed to by match the impedance rectifieron and received power the is 700 μW. MOSThe transistors in the thelength on-chip transformer were designed to match theand impedance ratios of the gaterectifier width to and the gate (W/L) for n-MOS and p-MOS transistors are 66.6 200, respectively, and thewhen threshold voltage (V TH) is is approximately mV. CMOS rectifier is gate of rectifier and antenna the received power 700 µW. The 350 ratios of The the gate width to the activated when a voltage greater than 350 mV is applied to the RF terminals that are connected to the length (W/L) for n-MOS and p-MOS transistors are 66.6 and 200, respectively, and the threshold voltage elements. The of therectifier MOS transistor (RON) when is calculated as: greater than 350 mV is (VTH antenna ) is approximately 350on-resistance mV. The CMOS is activated a voltage 1 applied to the RF terminals that are connected to the antenna elements. The on-resistance of the MOS R ON = (1) β(VGS − VTH ) transistor (RON ) is calculated as: 1 where β is the parameter decided by the W/L RON “ratio, the carrier mobility, and the unit capacity of gate, (1) β pV ´ VTH qthat RON depends on the input power and VGS is the gate-to-source voltage. Equation (1)GS indicates because is determined by by thethe transmitted from the antenna to the theunit CMOS rectifier. where β is theVGS parameter decided W/L ratio,power the carrier mobility, and capacity of gate, Therefore, a certain level of input power range into the rectifier should be defined in order to specify and VGS is the gate-to-source voltage. Equation (1) indicates that RON depends on the input power RON. In the case of the designed CMOS rectifier circuit, the real part of the input impedance varies because VGS is determined by the transmitted power from the antenna to the CMOS rectifier. Therefore, from 100 Ω to 650 Ω, when the input power is sufficiently high. Consequently, the on-chip a certain level of input power range into the rectifier should be defined in order to specify RON . In the transformer should be designed to have a turn ratio of 1:3, implying that the real-part input case of the designed CMOS rectifier partside. of the input impedance varies impedance of antenna is seen as 450circuit, Ω fromthe thereal rectifier The on-chip transformer withfrom silicon100 Ω to 650substrate Ω, when the input power is sufficiently high. Consequently, the on-chip transformer should is designed with a turns ratio of 2:6 and size of 800 μm × 800 μm with an electromagnetic be designed have a turnKeysight ratio ofTechnologies, 1:3, implying thatRosa, the real-part impedance of antenna is simulatorto(Momentum, Santa CA, USA).input The width and space of the seen as from the3 rectifier side. Theand on-chip transformer with silicon substrate designed coil450 areΩ 4 μm and μm, respectively, the self-resonant frequency is higher than 3isGHz in this with a turns ratio of 2:6 and size of 800 µm ˆ 800 µm with an electromagnetic simulator (Momentum, 3 width and space of the coil are 4 µm and 3 µm, Keysight Technologies, Santa Rosa, CA, USA). The respectively, and the self-resonant frequency is higher than 3 GHz in this design. The transformer

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has maximum efficiency at a frequency of 825 MHz when the outer diameter of the transformer is design.800 TheÂľm. transformer has maximum efficiency at adesigned frequencytransformer of 825 MHz when the outer diameter adjusted The transfer characteristic of the is approximately ´3.4 dB Sensorsto2015, 15, page–page of the transformer is adjusted to 800 Îźm. The transfer characteristic of the designed transformer is the at the frequency of 825 MHz. In addition, some inductance components are required for matching approximately −3.4 dB at the frequency of 825 MHz. In addition, some inductance components are design. between The transformer has maximum at a frequency of 825 MHz the outer diameter This impedance the antenna and theefficiency rectifier because the rectifier has when capacitive impedance. for matching the impedance between the antenna and the rectifier because the rectifier has ofrequired the transformer is adjusted to 800 The transfer of the designed transformer unintended negative reactance can be Îźm. cancelled using characteristic an inductance of 3.4 nH, which can beiseasily capacitive impedance. This unintended negative reactance can besome cancelled using components an inductance approximately −3.4 dB at the frequency of 825 MHz. In addition, inductance areof added3.4 in nH, the which antenna design. Thus, theinflexible antenna having a the small inductance can helpa eliminate can be easily added the antenna design. Thus, flexible antenna having small required for matching the impedance between the antenna and the rectifier because the rectifier has the need for using inductance canextra help inductance eliminate thecomponents. need for using extra inductance components. capacitive impedance. This unintended negative reactance can be cancelled using an inductance of 3.4 nH, which can be easily added in the antenna design. Thus, the flexible antenna having a small inductance can help eliminate the need for using extra inductance components.

2. Circuit schematic proposedWPT WPT device: device: The inductance can can helphelp FigureFigure 2. Circuit schematic of of thethe proposed The antenna antennawith with inductance eliminate the need for using external matching components,thus thusfacilitating facilitating aa reduction eliminate the need for using external matching components, reductionininthe thesize size of of the neural interface device. the neural Figureinterface 2. Circuitdevice. schematic of the proposed WPT device: The antenna with inductance can help eliminate the need for using external matching components, thus facilitating a reduction in the size

The structure of flexible the flexible and inductive antenna is based on a dipole antenna model and the The of structure the the neuralof interface device.and inductive antenna is based on a dipole antenna model and the antenna is designed using an electromagnetic simulation engine (EMPro, Keysight Technologies). antenna is designed using an electromagnetic simulation engine (EMPro, Keysight Technologies). TheThe model of dipole antenna was adopted in order to form on the film in plane. Theand antenna of the flexible and inductive antenna is based onflexible a dipole antenna model The model ofstructure dipole antenna was adopted in order to form on the flexible film in plane. The the antenna was designed on the flexible film with a large area of 27 mm Ă— 5 mm, as the gain of the antenna antenna is on designed using an electromagnetic simulation engine (EMPro, Keysight Technologies). was designed the flexible film with a large area of 27 mm ˆ 5 mm, as the gain of the antenna depends onantenna its size.was Theadopted flexible in antenna is form analyzed inflexible a salinefilm model that represents the The modeldirectly of dipole order to on the in plane. The antenna depends directly on its size. The flexible antenna is analyzed in aantenna saline with model that represents the brain tissue. Figure 3 shows the diagram of the designed flexible the CMOS rectifier was designed on the flexible film with a large area of 27 mm Ă— 5 mm, as the gain of the antenna brain chip. tissue. Figure 3 shows theisdiagram ofusing the designed flexible antenna with the CMOS rectifier The antenna’s metal line patterned gold, with a width of 1 mm and thickness of 120 nm. depends directly on its size. The flexible antenna is analyzed in a saline model that represents the chip.brain The antenna’s line isthe patterned using gold, a width of 1 mm thickness of 120 nm. The flexible filmmetal has size of 27 diagram mm Ă— 5 mm Ă— 10 Îźm,with andflexible the assembled silicon chip has a rectifier thickness tissue. Figure 3 ashows of the designed antenna withand the CMOS of 400 Îźm. 97% of the device area is composed of a flexible film, as the silicon chip has a small area of 1.5 The flexible has a size 27 is mm ˆ 5 mm ˆ 10 Âľm,with anda the assembled silicon chip has a thickness chip. Thefilm antenna’s metalofline patterned using gold, width of 1 mm and thickness of 120 nm. mm Ă— 2.5 mm The simulated the is as shown in Figure 4 has and indicates of 400 Âľm. 97% ofonly. the area isinput composed ofÎźm, aofflexible thesilicon silicon chip has a small area The flexible film hasdevice a size of 27 mm Ă— 5 impedance mm Ă— 10 andantenna thefilm, assembled chip aitthickness an impedance of 46.3 + j15.1 Ί at 825 MHz, indicating that the designed antenna has an inductance of 400 Îźm. 97% of the device area is composed of a flexible film, as the silicon chip has a small area of 1.54 and of 1.5 mm ˆ 2.5 mm only. The simulated input impedance of the antenna is shown in Figure of 3 nH. From these simulation results, the power ratio, defined as the input power into the rectifier mm Ă— 2.5 only. The simulated of the antenna is shown Figure 4 and antenna it indicates it indicates anmm impedance of 46.3 +input j15.1impedance â„Ś at 825 MHz, indicating that in the designed has an (Pimpedance RECT) divided by the transmitted power from the antenna (PANT), is estimated as: an 46.3 +these j15.1 Ί at 825 MHz, indicating that the designed antenna an inductance inductance of 3 nH.ofFrom simulation results, the power ratio, defined as thehas input power into the đ?‘ƒđ?‘…đ??¸đ??śđ?‘‡ ∙ đ?‘?đ??´đ?‘ đ?‘‡defined ∙ đ?‘?đ?‘…đ??¸đ??śđ?‘‡ as the input power into the rectifier of 3 nH. From these simulation results, the power4ratio, rectifier (PRECT ) divided by the transmitted power = from the antenna (P ANT ), is estimated as: (2) (đ?‘?antenna )2), is estimated as: (PRECT) divided by the transmitted power đ?‘ƒ from (PANT đ??´đ?‘ đ?‘‡ the đ??´đ?‘ đ?‘‡ + đ?‘?đ?‘…đ??¸đ??śđ?‘‡

PRECT

4¨Z ANT ¨ZRECT

đ?‘ƒ “ 4 of ∙ đ?‘?đ??´đ?‘ đ?‘‡ đ?‘?đ?‘…đ??¸đ??śđ?‘‡ 2 and the rectifier, respectively. ZRECT (2) where ZANT and ZRECT are the input impedances the ∙antenna PANTđ?‘…đ??¸đ??śđ?‘‡ = (2) pZ ` Z ANT RECT2q (đ?‘?đ??´đ?‘ đ?‘‡ + đ?‘?Figure đ?‘ƒđ??´đ?‘ đ?‘‡ previously. depends on the gate voltage as described đ?‘…đ??¸đ??śđ?‘‡ ) 5 shows the input impedance of the whererectifier Z ANT and Z and the are the inputofimpedances of the antenna and the rectifier, respectively. Z)RECT (ZRECT power transmission to the rectifier the antenna (PRECTZ/PRECT ANT where ZANT and)RECT ZRECT areefficiency the input impedances of the antenna and the from rectifier, respectively. depends on the gate voltage as described previously. Figure 5 shows the input impedance versus the input power from the antenna (P ANT). The power loss due to impedance mismatch is less depends on the gate voltage as described previously. Figure 5 shows the input impedance of theof the than −1.0 dB the range of theof input power from −10 toto dBm. rectifier (ZRECT ) and thethe efficiency transmission to5 the the rectifierfrom fromthe theantenna antenna RECT rectifier (ZRECT )inand efficiency ofpower power transmission rectifier (P(P RECT /PANT/P ) ANT )

versus the input power from thethe antenna ).The Thepower power loss due to impedance mismatch versus the input power from antenna(P(PANT ANT). loss due to impedance mismatch is lessis less in the range theinput inputpower power from 5 dBm. than than ´1.0−1.0 dB dB in the range ofofthe from−10 ´10toto 5 dBm.

Figure 3. Diagram of the designed flexible antenna with the CMOS rectifier chip.

4 Figure 3. Diagram thedesigned designed flexible flexible antenna thethe CMOS rectifier chip.chip. Figure 3. Diagram ofofthe antennawith with CMOS rectifier

4

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Figure 4. Simulated input impedance of the designed flexible antenna in a saline model.

Figure 4. Simulated input impedance designedflexible flexible antenna a saline model. Figure 4. Simulated input impedanceof of the the designed antenna in ainsaline model.

Figure 5. Input impedance (RRECT) and power transmission efficiency (PRECT/PANT) of the rectifier as a Figure 5. Input impedance (RRECT) and power transmission efficiency (PRECT/PANT) of the rectifier as a

function of impedance input power(R (PANT). ) and power transmission efficiency (P Figure 5. Input RECT RECT /P ANT ) of the rectifier as function of input power (PANT). a function of input power (P ANT ). 3. Integration of Flexible Film and Silicon Chip 3. Integration of Flexible Film and Silicon Chip The flexible rectenna was fabricated assembled by using a 2-inch silicon wafer and the 3. Integration of Flexible Film and Silicon and Chip The flexible rectenna wasinfabricated assembledlayer by using 2-inch silicon using wafer reported and the fabrication process illustrated Figure 6. and The parylene deviceawas fabricated fabrication process illustrated in Figure 6. The parylene layer device was fabricated using reported The flexible rectenna was fabricated and assembled by using a 2-inch silicon wafer and the processes [6,9]. A 40-nm thick titanium layer was sputtered on the silicon wafer as a sacrificial layer processes [6,9]. A 40-nm thick titanium layer was sputtered on the silicon wafer as a sacrificial layer fabrication Figure 6. Theofparylene device was fabricated (Figureprocess 6a). Then,illustrated a parylene in layer of thickness 5 μm waslayer deposited on the titanium layer using (Figurereported 6b), (Figure 6a). Then, a parylene layer of thickness of 5 μm was the titanium layer (Figure 6b),layer and a[6,9]. 120-nm gold layer was sputtered as a was metal line ondeposited theon parylene film. In addition, a titanium processes A 40-nm thick titanium layer sputtered theon silicon wafer as a sacrificial and a was 120-nm layer sputtered as aasmetal linemask on the addition, a titanium layer sputtered againwas on the layer a metal to parylene pattern the goldIn layer laterlayer (Figure 6c). 6b), (Figure 6a). Then, agold parylene layer ofgold thickness of 5 µm was deposited onfilm. the titanium (Figure layer was sputtered again on the gold layer as a metal mask to pattern the gold layer later (Figure 6c). The top titanium layer was etched for the antenna pattern by photolithography (Figure 6d), and then, and a 120-nm gold layer was sputtered as a metal line on the parylene film. In addition, a titanium The top titanium layer was etched for the antenna pattern by photolithography (Figure 6d), and then, the resist was removed. After the photolithography process, thepattern gold layer was etched by aqua regia 6c). layer the wasresist sputtered again on thethe gold layer as a metal mask the to thewas gold layerby later (Figure was removed. After photolithography process, gold layer etched aqua at room temperature (Figure 6e). After removing the top titanium layer, the silicon chipregia was The top titanium layer was etched for theremoving antenna pattern by photolithography (Figure 6d), at room temperature After top titanium layer, the silicon chip was and connected to the antenna(Figure pads by6e). flip-chip bonding withthe an anisotropic conductive paste (ACP). An ACP then,connected the resisttowas removed. After the photolithography process, the gold layer was etched by aqua the antenna pads by flip-chip with an anisotropic conductive paste Anused. ACP named TAP0402E (Kyocera, Kyoto, Japan)bonding containing nickel particles with a diameter of 2(ACP). μm was regianamed at room temperature (Figure 6e). After removing the top titanium layer, the silicon chip TAP0402E (Kyocera, Kyoto, Japan) containing nickel particles with a diameter of 2 μm was used. In this process, the bonding conditions of pressure, time, and temperature were decided using a test was In this process, the bonding ofbreak pressure, andconditions temperature were decided using a test connected to thethe antenna padsconditions by flip-chip bonding with an anisotropic conductive paste (ACP). chip because thin parylene film would if thetime, selected were not appropriate. The test chip because the thin parylene film would break if the selected conditions were not appropriate. The test An ACP TAP0402E (Kyocera, containing nickel particles with diameter chip named has the size of 2.5 mm × 2.5 mm,Kyoto, and theJapan) four electrode pads of size 100 μm × 100 μma each are of the 2.5process, mm 2.5the mm, and the four electrode pads of pad size of 100 × chip, 100 μm arewere separated bysize distance of 100× μm. Gold bumps were formed of on each theμm test andeach the chip 2 µmchip washas used. In of this bonding conditions pressure, time, and temperature separated by distance of 100line μm. Gold bumps were formed on pad of thefirm test bonding chip, andusing the chip wasusing connected the gold onparylene the parylene Ineach order to if form thewere decided a testtochip becauseformed the thin filmfilm. would break the selected conditions was connected to thedevice gold line formed on the parylene film. In order to form firmtaken bonding using the ACP, the connected was kept at 100 ° C for 3 min. Figure 7 is a photograph after flip-chip not appropriate. The test chip has the size of 2.5 mm ˆ 2.5 mm, and the four electrode pads of size ACP, the connected device was kept 100was °C for 3 min. Figureto7the is aparylene photograph flip-chip bonding the test and theat chip firmly jointed film.taken The after misalignment 100 µm ˆ 100using µm each arechip, separated distance of 100 µm. Goldparylene bumps were formed on each pad bonding the test andchip theby chip firmly jointed misalignment between using the gold line chip, and the padswas became less thanto2 the μm owing tofilm. the The flip-chip bonding of thebetween test chip, and the chip was connected to the gold line formed on the parylene film. In order theemployed. gold line In and the chip padspackaging became less than 2 μm owing to can the be flip-chip bonding technology this wafer-level technology, several chips assembled ˝ C for 3 min. high to form firm bonding using the ACP, the connected device was kept at 100 Figure 7 technology thiselectrical wafer-level packaging technology, several chipsconductive can be assembled accuracy. Inemployed. addition, In good characteristics were obtained during (<30 Ω)high and is a photograph taken after flip-chip bonding using the chip, and the chip was6f), firmly accuracy. addition, good electrical characteristics were obtained during conductive (<30 Ω)jointed and to insulationIn(>100 MΩ) measurements. After bonding thetest CMOS rectifier chip (Figure a parylene insulation (>100 MΩ) measurements. After bonding the CMOS rectifier chip (Figure 6f), a parylene the parylene film. The misalignment between the gold line and the chip pads became less than layer of thickness 5 μm was deposited (Figure 6g). The output pads were opened using the titanium mask2 µm layer of thickness 5 bonding μm was deposited (Figure 6g). The were opened using thetechnology, titanium mask owing the flip-chip technology employed. In thispads wafer-level packaging several bytoplasma etching, and then, the parylene film wasoutput patterned (Figure 6h). Finally, by etching the by plasma etching, and then, the parylene film was patterned (Figure 6h). Finally, by etching the titanium layer, paryleneIn film with the good chip was releasedcharacteristics from the siliconwere waferobtained (Figure 6i). chips sacrificial can be assembled highthe accuracy. addition, electrical during sacrificial titanium layer, the parylene film with the chip was released from the silicon wafer (Figure 6i).

conductive (<30 Ω) and insulation (>100 MΩ) measurements. After bonding the CMOS rectifier chip (Figure 6f), a parylene layer of thickness 5 µm was deposited (Figure 6g). The output pads were opened 5 using the titanium mask by plasma etching, and 5then, the parylene film was patterned (Figure 6h).

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Finally, by etching the sacrificial titanium layer, the parylene film with the chip was released from the silicon wafer (Figure 6i). Sensors 2015, 15, page–page Sensors 2015, 15, page–page Sensors 2015, 15, page–page

Figure 6. Fabrication process of flexible rectenna mounting the CMOS chipthe with the Figure 6. Fabrication process of flexible rectenna mounting the CMOS rectifierrectifier chip with transformer Figure 6. Fabrication process of flexible rectenna mounting the CMOS rectifier chip with the transformer on the parylene film. on the parylene film. transformer on the parylene film. Figure 6. Fabrication process of flexible rectenna mounting the CMOS rectifier chip with the transformer on the parylene film.

Figure 7. Photograph after flip-chip bonding process (Figure 6f). Figure 7. Photograph after flip-chip bonding process (Figure 6f).

Figure 7. Photograph after flip-chip bonding process (Figure 6f). Figure 8 shows the fabricated parylene film device and the bonded on-chip full wave CMOS Figure 7. Photograph after flip-chip bonding (Figure 6f). Figure 8 shows the fabricated device and process the bonded full itwave rectifier with the transformer. The parylene size of thefilm flexible device is 27 mm × on-chip 5 mm and has aCMOS good Figure 8 shows the fabricated parylene film device and the bonded on-chip full wave CMOS rectifier with the transformer. The size of the flexible device is 27 mm × 5 mm and it has a good flexibility. The CMOS rectifier chip of size 1100 μm × 840 μm has four pads for providing rectified Figure 8 shows the fabricated parylene film device and the bonded on-chip full wave CMOS rectifier with the The of the device is 27 ˆfor 5 mm and itrectified has a good flexibility. Thetransformer. CMOS and rectifier chipsize of size 1100flexible μm × 840 μm has fourmm pads providing output voltage, the RF terminals. rectifier with theGND, transformer. Thesignal of the flexible 27 mm 5 mmfor andproviding it has a good flexibility. CMOS rectifier ofsize size 1100 µm ˆ device 840 µmis has four× pads rectified outputThe voltage, GND, and thechip RF signal terminals. flexibility. The CMOS rectifier chip of size 1100 μm × 840 μm has four pads for providing rectified output voltage, GND, and the RF signal terminals. output voltage, GND, and the RF signal terminals.

Figure 8. Photographs of the fabricated flexible rectenna and the bonded CMOS rectifier chip with Figure 8. Photographs of the fabricated flexible rectenna and the bonded CMOS rectifier chip with the transformer. the transformer. Figure 8. Photographs of the fabricated flexible rectenna and the bonded CMOS rectifier chip with Figure 8. Photographs of Discussion the fabricated flexible rectenna and the bonded CMOS rectifier chip with 4. Measured Results and the transformer. 4. Measured Results and Discussion

the transformer. As the fabricated rectenna device is designed for use on the brain surface, the performance of As thewas fabricated rectenna device is designed for use onemulation the brain surface, the performance 4. Results and Discussion theMeasured device measured in a saline model that served as the of the implant [19]. Figureof9 4. Measured Results and Discussion the device was measured in a saline model that served as the emulation of the implant [19]. Figure 9 shows setup with the saline tank (0.9% solution) in an anechoic First, an Asthe theexperimental fabricated rectenna device is designed forNaCl use on the brain surface, thechamber. performance of shows the experimental setup with the saline tank (0.9% NaCl solution) in an anechoic chamber. First, an antenna device without ainrectifier evaluated to characterize the flexible and its input the device was measured adevice salinewas model that served as the emulation of theantenna, implant [19]. Figure 9of the As the fabricated rectenna is designed for use on the brain surface, the performance antenna device without aΩ rectifier was evaluated to characterize the flexible antenna, and its input impedance of 41.2 + j44.3 was observed at the resonance frequency of 825 MHz. In this case, the shows the experimental setup with the that salineserved tank (0.9% NaCl solution) of in an anechoic chamber. First,9 anshows device was measured in a saline model as the emulation the implant [19]. Figure impedance of 41.2loss + j44.3 Ω wasdB. observed at the resonance frequency of−20.5 825 MHz. this case, the measured return was Theevaluated fabricated antenna had a gain of dBi inIn the direction of antenna device without a −7.02 rectifier was to characterize theanechoic flexible antenna, and its an input the experimental setup with the saline tank (0.9% NaCl solution) ina an chamber. First, antenna measured return loss was −7.02 dB. The fabricated antenna had gain of −20.5 dBi in the direction of Z-axis, a value that matches well with the simulated result of −20.9 dBi as shown in Figure 10. impedance of 41.2 + j44.3 Ω was observed at the resonance frequency of 825 MHz. In this case, the device without a rectifier wascan evaluated to characterize flexible antenna, and its input impedance of Z-axis, a value that matches well with thereasonable simulatedthe result of −20.9 dBi as shown in Figure 10. Therefore, the simulation estimate antenna includes the influence measured return loss was −7.02 dB. The the fabricated antenna had again gainasofit−20.5 dBi in the directionofofa Therefore, the simulation can estimate the reasonable antenna gain as it includes the influence of a 41.2 +saline j44.3 Ω was observed the resonance frequency of MHz. In this case, theWPT measured return thus at facilitating the the measurement of 825 the of total efficiency of the system. Z-axis, environment, a value that matches well with simulated result −20.9 dBi as shown in Figure 10. saline environment, thus facilitating thehad measurement of thedBi total efficiency of the WPT system. loss was ´7.02 dB. The fabricated antenna a gain of ´20.5 in the direction of Z-axis, a value that Therefore, the simulation can estimate the reasonable antenna gain as it includes the influence of a 6 saline environment, thus facilitating the measurement of the total efficiency of the WPT system. 6

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matches well with the simulated result of ´20.9 dBi as shown in Figure 10. Therefore, the simulation can estimate the reasonable antenna gain as it includes the influence of a saline environment, thus facilitating Sensors 2015, 15, the measurement ofpage–page the total efficiency of the WPT system. For example, the free-space loss is 10.8 dB at a Sensors 2015, 15, page–page frequency of 825 MHz and at a distance of 10 cm between each antenna. Therefore, the WPT efficiency Sensors 2015, 15, page–page For example, the free-space loss is 10.8 dB at a frequency of 825 MHz and at a distance of 10 cm between between each antenna can be estimated todB beat´29.6 dB, if of the gains ofand theattransmission dipole antenna and For example, free-space is 10.8 abetween frequency 825 MHzcan a distance cm between each antenna.the Therefore, theloss WPT efficiency each antenna be estimated toof be10 −29.6 dB, if the For example, the free-space loss is 10.8 dB at a frequency 825 MHz and a distance 10 cm dB, between the receiver antenna are 2.14the dBi and ´20.9 dBi respectively. each Therefore, WPT efficiency between eachof antenna can be at estimated to of be −29.6 if the gainsantenna. of the transmission dipole antenna and the receiver antenna are 2.14 dBi and −20.9 dBi respectively. each Therefore, the WPT efficiency eachantenna antennaare can be dBi estimated to be dB, if the gainsantenna. of the transmission dipole antenna andbetween the receiver 2.14 and −20.9 dBi−29.6 respectively. gains of the transmission dipole antenna and the receiver antenna are 2.14 dBi and −20.9 dBi respectively.

Figure 9. Measurement setup for WPT demonstration using saline tank in anechoic chamber.

FigureFigure 9. Measurement setup for using saline in anechoic chamber. 9. Measurement setup forWPT WPTdemonstration demonstration using saline tanktank in anechoic chamber. Figure 9. Measurement setup for WPT demonstration using saline tank in anechoic chamber.

Figure 10. Radiation characteristics of fabricated flexible antenna immersed in saline tank. Figure 10. Radiation characteristics of fabricated flexible antenna immersed in saline tank. Figure 10. Radiation characteristics of flexible antenna immersed in saline 10. Radiation of fabricated fabricated flexible immersed in saline tank. tank. We Figure demonstrated WPTcharacteristics using the flexible rectenna thatantenna integrates the flexible antenna and the

We demonstrated WPT using the flexible rectenna that integrates the flexible antenna and the

rectifier chip withusing the transformer. The RF power atintegrates 825 MHz the was flexible transmitted using and a WeCMOS demonstrated WPT the rectenna thatintegrates antenna the Werectifier demonstrated WPTthe using theflexible flexible rectenna that thewas flexible antenna and thea CMOS chip with transformer. RF power at from 825 MHz transmitted using standard half-wavelength dipole antenna atThe a distance of D the flexible antenna. The load CMOSCMOS rectifier chip with The The RF power atof825 MHz was transmitted using a standard rectifier chip the withtransformer. the transformer. RF power at from 825 MHz was transmitted using a standard antenna a distance D the port flexible antenna. load resistancehalf-wavelength ROUT and the loaddipole capacitance COUTat were connected to the output of the rectifier.The Figure 11 standard half-wavelength dipole antenna at a distance of D from the flexible antenna. The load half-wavelength dipole antenna at a distance of D from the flexible antenna. The load resistance R resistance OUT and the load capacitance COUT were connected toD the output portinput of thepower rectifier. Figure 11OUT and shows theRobserved rectifier output voltage waveform when = 10 cm, the was 18 dBm, resistance R OUT and the load capacitance C OUT were connected to the output port of the rectifier. Figure 11 the load capacitance COUTrectifier were connected to the output port ofDthe Figure 11 shows observed shows theload observed output voltage waveform when = 10rectifier. cm, power was dBm, and the resistance and load capacitance were 17.3 kΩ and 100 the μF,input respectively. The18the output shows theload observed rectifier output voltage when = 10 100 cm, the input power was 18output dBm, and the and load were 17.3 kΩD μF,18 respectively. Theload rectifier output voltage waveform when D signal = 10waveform cm, the input power was dBm, andoutput the resistance capacitor wasresistance charged up when thecapacitance RF was input and itand was confirmed that the voltage and the load resistance load were 17.3and kΩit and 100 μF, respectively. The voltage output capacitor was charged upand when thecapacitance RF signal was input was confirmed that the output increased to 970 mV after 18 s. and and load capacitance were 17.3 kΩ 100 µF, respectively. The output capacitor was charged up when capacitor was charged up when the RF signal was input and it was confirmed that the output voltage increased to 970 mV after 18 s. the RFincreased signal was input was to 970 mVand afterit18 s. confirmed that the output voltage increased to 970 mV after 18 s.

Figure 11. Measured output voltage waveform of the rectifier in WPT. Figure 11. Measured output voltage waveform of the rectifier in WPT. Figure 11. Measured output voltage waveform of the rectifier in WPT.

Figure 11. Measured output voltage 7 waveform of the rectifier in WPT. 7 7

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Figure 12a–c show the output voltage, the output power, and the total efficiency versus the input Figure 12a–c show the output voltage, the output power, and the total efficiency versus the input power of the transmission antenna at distances 3, 5, 10, and 15 cm, respectively. The output resistance Sensors page–page power of2015, the 15, transmission antenna at distances 3, 5, 10, and 15 cm, respectively. The output resistance was adjusted to maximize the total efficiency such that the output voltage did not exceed 1.5 V, as was adjusted to maximize the total efficiency such that the output voltage did not exceed 1.5 V, as 12a–c show the output voltage, thethe output power, and the total efficiency versus the input shown inFigure Figure output power decreased thedistance distance between shown in Figure12a. 12a.The Theoutput outputvoltage voltage and and the output power decreased asasthe between power of becomes the transmission antenna at distances 3, 5, 10,results, and 15 cm, respectively. The output was resistance thethe antennas longer. In these measurement the maximum efficiency 0.497% antennas becomes longer. In these measurement results, the maximum efficiency was 0.497% at at was adjusted to maximize the total of efficiency such that the output voltage didcompares not exceedwell 1.5 V, as the a distance ofof3 3cm the efficiency efficiency obtained with a distance cmand andinput inputpower power of 88 dBm, dBm, and and the obtained compares well with the shown in Figure 12a. The output voltage and the output power decreased as the distance between calculated value the theoretical theoreticalefficiencies efficiencies which calculated valueofof0.36%. 0.36%.The Thesolid solidlines lines in in Figure Figure 12c 12c depict depict the which areare the antennas becomes longer. In these measurement results, the maximum efficiency was 0.497% at calculated using the block diagramof of theWPT WPTsystem system shown in Figure 13. The efficiency, Ρ (%), calculated using shown in Figure 13. The totaltotal efficiency, Ρ (%), a distance of 3the cmblock and diagram input powerthe of 8 dBm, and the efficiency obtained compares well with the is is calculated as: calculated as: calculated value of 0.36%. The solid lines in Figure 12c depict the theoretical efficiencies which are POUT calculated using the diagram WPT in Figure 13. The ¨Ρ total efficiency, Ρ (%), is (3) đ?‘ƒđ?‘‚đ?‘ˆđ?‘‡ ˆ 100of“the GTX ¨L system¨Gshown ¨L MATCH Ρ â€œblock RX ¨L TRANS RECT PI N Ă— 100 = đ??şđ?‘‡đ?‘‹ ∙ đ??żSPACE đ?œ‚ = (3) đ?‘†đ?‘ƒđ??´đ??śđ??¸ ∙ đ??şđ?‘…đ?‘‹ ∙ đ??ż đ?‘‡đ?‘…đ??´đ?‘ đ?‘† ∙ đ??żđ?‘€đ??´đ?‘‡đ??śđ??ť ∙ đ?œ‚đ?‘…đ??¸đ??śđ?‘‡ calculated as: đ?‘ƒđ??źđ?‘ where P I N and POUT are theđ?‘ƒđ?‘‚đ?‘ˆđ?‘‡ input power of the transmission antenna and the output power consumed where PIN and POUT are the input the∙ đ??żtransmission đ?œ‚= Ă— power 100 = of đ??şđ?‘‡đ?‘‹ ∙ đ??şđ?‘…đ?‘‹ ∙ antenna đ??ż đ?‘‡đ?‘…đ??´đ?‘ đ?‘† ∙ and đ??ż the output ∙ đ?œ‚đ?‘…đ??¸đ??śđ?‘‡ power consumed (3) in load resistor ROUT , respectively. G and Gđ?‘†đ?‘ƒđ??´đ??śđ??¸ are antenna gainsđ?‘€đ??´đ?‘‡đ??śđ??ť of transmission and reception, đ?‘ƒđ??źđ?‘ RXantenna in load resistor ROUT, respectively. GTX TX and GRX are gains of transmission and reception, LSPACE LSPACE is the free space loss, is the transformer L MATCH the mismatch calculated TRANS where Pspace IN andloss, POUTLare the input power of the transmission antenna andis the output power consumed is the free TRANS isL the transformer loss, LMATCH isloss, the mismatch loss calculated by loss Equation (2), byand Equation (2), and Ρ is the efficiency of the CMOS rectifier. The free-space loss can be calculated RECT inΡload ROUT , respectively. GTX and GRX are antenna gains of loss transmission and reception, L SPACE RECT resistor is the efficiency of the CMOS rectifier. The free-space can be calculated by the Friis bytransmission the transmission equation as: is Friis the free space loss, Las: TRANS is the transformer loss, LMATCH is the mismatch loss calculated by Equation (2), equation ˆ Ë™ loss can be calculated by the Friis and ΡRECT is the efficiency of the CMOS rectifier. The free-space Îťđ?œ† 22 LSPACE “ 10¨log transmission equation as: (4)(4) 10 10 4Ď€D đ??żđ?‘†đ?‘ƒđ??´đ??śđ??¸ = 10 ∙ đ?‘™đ?‘œđ?‘” ( ) 4đ?œ‹đ??ˇ 2 đ?œ† where DD is is the distance length. The calculated powerefficiency efficiency from Equation (4)(3) (3) đ??żđ?‘†đ?‘ƒđ??´đ??śđ??¸ = 10The ∙ đ?‘™đ?‘œđ?‘”calculated ) power where the distanceand andΝΝisisthe thewave wave length. from Equation 10 ( 4đ?œ‹đ??ˇ hashas similar curves compared with measured values as shown in Figure 12c. The peak of total efficiency similar curves compared with measured values as shown in Figure 12c. The peak of total where D is depends the distance is the wave length. The flexible calculated power efficiency from Equation (3) characteristics onand theÎťinput into power the antenna (P ANT ), which efficiency characteristics depends onpower the input into the flexible antenna (PANTis), determined which is has similar curves compared with measured values as shown in Figure 12c. The peak of total bydetermined P I N , GTX , G . Therefore, the characteristic of the of total is affected by the byRXP,INand , GTXL, SPACE GRX, and LSPACE. Therefore, the characteristic theefficiency total efficiency is affected efficiency characteristics depends on the input power into the flexible antenna (PANT), which is by the characteristic of Ldetermined MATCH determined P IN and distance between each antenna. characteristic of L MATCH by P I by and distance between each antenna. N determined by PIN, GTX, GRX, and LSPACE. Therefore, the characteristic of the total efficiency is affected by the characteristic of LMATCH determined by PIN and distance between each antenna.

(a)

(b)

(c) (c)

(a) (b) Figure 12. Measured output voltage (VOUT), output power (POUT), and total efficiency (Ρ) versus input Figure 12. Measured output voltage (VOUT ), output power (POUT ), and total efficiency (Ρ) versus input Figure Measured output voltage OUTV ),OUT output power (Ppower; OUT), and total efficiency (Ρ) versus input power (PIN12. ) for different distances (D).(V(a) versus input (b) POUT versus input power; (c) Ρ power (P I N(P ) for different distances (D). (a) VOUT versus input power; (b) POUT versus input power; power IN) for different distances (D). (a) VOUT versus input power; (b) POUT versus input power; (c) Ρ versus input power. (c) Ρ versus inputpower. power. versus input

Figure the WPTsystem. system. Figure13. 13.Block Blockdiagram diagram of of the Figure 13. Block diagram of theWPT WPT system.

The frequency for different differentpositions positionsofofthe thetransmission transmission The frequencycharacteristics characteristicsofofthe the total total efficiency efficiency for The frequency characteristics ofpeak the total efficiency for different positions of the transmission antenna areare shown in Figure efficiency was observed atthe theresonance resonance frequency 825 MHz. antenna shown in Figure14. 14.The Thepeak efficiency observed at frequency ofof 825 MHz. Figure also shows thecharacteristics characteristics of efficiency efficiency regarding aa misalignment ininhorizontal and antenna are shown in Figure 14. The peak efficiency was observed at the resonance frequency Figure 14 14 also shows the of regarding misalignment horizontal and of vertical direction when the distance is 5 cm between antennas and there is not misalignment in angle the distance is 5 cm between antennas and there isanot misalignment angle 825vertical MHz. direction Figure 14when also shows the characteristics of efficiency regarding misalignment in in horizontal 88

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and vertical direction the distance is 5 was cm between antennas there isand notvertical misalignment in between antennas. Thewhen transmission antenna moved by 5 cm in and horizontal direction. angle between The transmission antenna was moved by 5 cm in horizontal anddirection vertical As a result, the antennas. efficiency became 0.21% from 0.24% when the misalignment in horizontal direction. As a result, the efficiency became 0.21% from 0.24% when the misalignment horizontal is 5 cm, which is 185% of the fabricated antenna size (27 mm). Comparing with in WPTs using direction is 5 cm,induction, which is 185% of the fabricated antenna size (27 mm). with WPTs using electromagnetic the misalignment of the implanted coil and Comparing the outer devices drastically electromagnetic induction, the misalignment of the implanted coil and the outer devices drastically affects the efficiency. The misalignment of 10% against coil size causes the WPT efficiency to decrease affects The misalignment of 10% against coilBy size causes the efficiency to decrease to to 85%the in efficiency. electromagnetic-induction-based WPTs [36]. contrast, theWPT fabricated RF-based device 85% in the electromagnetic-induction-based [36].forBythe contrast, the fabricated RF-based device allows allows misalignment of 185% againstWPTs antenna same efficiency reduction of 85%. Therefore, misalignment of 185% antenna for the same efficiency 85%. Therefore, the fabricated device has aagainst tolerance to misalignment between thereduction implantedofand outer devicesthe in fabricated device has a tolerance to misalignment between the implanted andthe outer devices in terms of terms of WPT efficiency loss. Table 1 shows the comparison results of WPT devices [37,38]. WPT efficiency loss. Table 1 shows the comparison the WPT compared devices [37,38]. Although the Although the method by radio waves has a lowerresults powerofefficiency to electromagnetic method by it radio has a lowerofpower efficiencyWPT, compared electromagnetic induction, it has the induction, has waves the advantages long distance and ittoalso allows for some misalignment advantages long distance WPT, devices. and it also for some misalignment between the implanted between theof implanted and outer Asallows seen from Figure 12c, the fabricated rectifier outputs and outer devices. As seen from Figure 12c, the fabricated rectifier outputs the power (P ) of 22 µW the power (POUT) of 22 μW when D = 5 cm and PIN = 10 dBm. If the misalignment OUT in horizontal when D = is 5 cm andthe P I Noutput = 10 dBm. If the misalignment inμW, horizontal direction is 5 cm, the output power direction 5 cm, power (POUT ) becomes 19 the value of which is 85% of the power (POUT ) becomes 19 µW, the of which is 85% of the power without misalignment. This without misalignment. Thisvalue obtained power could drive a neural interface LSI, such asobtained [37] by power could drive a in neural interfaceFor LSI, such asa [37] by charging in a battery temporarily. charging in a battery temporarily. instance, battery can be charged with ain constant currentFor of instance, a battery canamperes be charged constant of several tensimplemented of micro amperes (µA) several tens of micro (μA)with [39].aSince the current loaded current in the system can[39]. be Since the loaded current the implemented system calculated as at 27 D µA the the condition of calculated as 27 μA at theincondition of PIN = 10 dBm can andbe VOUT = 700 mV = at 5 cm, received P I N = 10 and VOUT = 700amV at D = 5 cm, the received power is reasonable to charge a battery. power is dBm reasonable to charge battery.

Figure (η) for positions (D (D = = 55 cm). Figure 14. 14. Frequency Frequency response response of of total total efficiency efficiency (η) for different different positions cm). Table 1. Comparison of WPT system with existing studies. Table 1. Comparison of WPT system with existing studies. Study

Method

Study

[37] [37] [38] This work

[38]

This work

Method

Electromagnetic

Transmission Communication Transmission Operating Efficiency Operating Communication Distance Efficiency Frequency (Area, Thickness) Frequency Distance (Tx to Rx) (Tx to Rx)

Device Size (Area, Device Size Thickness)

2 , >5 µm Electromagnetic induction 6.5 × 6.5 >5 μm 6.5 mm ˆ 6.52,mm induction induction Electromagnetic 5 ˆ 5 mm2 , >20 µm Electromagnetic Radio wave 5 ˆ 227 mm2 , 10 µm

5. Conclusions

induction Radio wave

´17.3 −17.3 dB dB

MHz 300300 MHz

´26 dB ´29.6 dB

118 MHz 825 MHz

1.6cm cm 1.6 4 cm

5 × 5 mm , >20 μm

−26 dB

118 MHz

cm 410cm

5 × 27 mm2, 10 μm

−29.6 dB

825 MHz

10 cm

The co-design and assembly methods of the flexible antenna and the CMOS rectifier chip are 5. Conclusions proposed for fabricating implantable neural interfaces. The power loss from the flexible antenna The co-design and assembly methods of the flexible antenna and the CMOS rectifier chip are into the CMOS rectifier is saved by using a well-designed on-chip transformer for the input power proposed for fabricating implantable neural interfaces. The power loss from the flexible antenna into ranging from ´10 to 5 dBm. The presented design method also eliminates the required inductance for the CMOS rectifier is saved by using a well-designed on-chip transformer for the input power impedance matching, resulting in less components and smaller sizes. The integrated flexible rectenna ranging from −10 to 5 dBm. The presented design method also eliminates the required inductance for device with differential substrates has been fabricated with the flip-chip bonding technique to mount impedance matching, resulting in less components and smaller sizes. The integrated flexible rectenna the silicon chip on the 5-µm thick parylene film. We have achieved to match the impedance of the device with differential substrates has been fabricated with the flip-chip bonding technique to mount antenna and the rectifier by using the flexible antenna with a size of 27 mm ˆ 5 mm ˆ 10 µm, and the silicon chip on the 5-μm thick parylene film. We have achieved to match the impedance of the on-chip transformer with an area of 800 µm ˆ 800 µm. The measured maximum efficiency was 0.497% antenna and the rectifier by using the flexible antenna with a size of 27 mm × 5 mm × 10 μm, and on-chip with 3 cm between each antenna. Furthermore, the RF-based WPT allows the misalignment of 185% transformer with an area of 800 μm × 800 μm. The measured maximum efficiency was 0.497% with 3 cm between each antenna. Furthermore, the RF-based WPT allows the misalignment of 185% against the 31829 9

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against the antenna size while maintaining more than 85% efficiency degradation, indicating the tolerability against a misalignment compared with electromagnetic induction. Acknowledgments: This work is partially supported by Grants-in-Aid for Scientific Research (A) and Young Scientists (A) and (B) from the Japan Society for the Promotion of Science and Tailor-Made Baton-Zone Education Program from Toyohashi University of Technology. The authors would like to thank the staff and students of Toyohashi University of Technology for their helpful support. Author Contributions: K.O. conceived, designed, fabricated the device, measured and analyzed the data, and wrote the paper; H.P.J. supported fabrication; S.Y., T.K. and M.I. discussed the fabrication process; and I.A. designed and led the project, analyzed the data, and wrote the paper. Conflicts of Interest: The authors declare no conflict of interest.

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