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OpenVPX SBC Roundup
The Journal of Military Electronics & Computing
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Modeling and Language Advances Enhance Safety-Critical Software
— Volume 14 Number 7 July 2012
An RTC Group Publication
cotsjournalonline.com
Open Architecture Strategies Aid Navy Modernization
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The Journal of Military Electronics & Computing
12
Pre-Integrated Systems and Technology Readiness
CONTENTS July 2012
Volume 14
Number 7
SPECIAL FEATURE Pre-Integrated Systems and Technology Readiness
10 Tech Readiness Needs Propel Pre-Integrated System Advances Jeff Child
20 Pre-Integrated Systems Feed Needs of Tightening Engineering Resources JC Ramirez, ADL Embedded Solutions
COTS (kots), n. 1. Commercial off-the-shelf. Terminology popularized in 1994 within U.S. DoD by SECDEF Wm. Perry’s “Perry Memo” that changed military industry purchasing and design guidelines, making Mil-Specs acceptable only by waiver. COTS is generally defined for technology, goods and services as: a) using commercial business practices and specifications, b) not developed under government funding, c) offered for sale to the general market, d) still must meet the program ORD. 2. Commercial business practices include the accepted practice of customerpaid minor modification to standard COTS products to meet the customer’s unique requirements. —Ant. When applied to the procurement of electronics for the U.S. Military, COTS is a procurement philosophy and does not imply commercial, office environment or any other durability grade. E.g., rad-hard components designed and offered for sale to the general market are COTS if they were developed by the company and not under government funding.
Departments 6 Publisher’s Notebook Primes and Mice Dance 8
The Inside Track
66
COTS Products
74 Editorial Getting It Right with Mobile Devices
26 Intelligent I/O Approach Lets Developers Right-Size Systems Lino Massafra, North Atlantic Industries
34 Pre-Integrated Systems Expedite Defense Application Deployment John Long, Radisys
Coming in August See Page 72
TECH RECON Safety-Critical and Security Software and Standards
40 Model-Based Design Aids Signal Processing Prototyping
Stephan van Beek, Sudhir Sharma and Sudeepa Prakash, The Mathworks
46 Ada 2012: A New Language for Safe and Secure Software Benjamin M. Brosgol, AdaCore
SYSTEM DEVELOPMENT Technologies for Navy Modernization
52 Enabling Rapid Technology Insertion in Submarine Combat Systems Gordon Hunt, Real-Time Innovations
TECHNOLOGY FOCUS OpenVPX SBCs
58 OpenVPX Plants More Seeds with Products and Program Wins Jeff Child
60
OpenVPX SBC Roundup Digital subscriptions available: cotsjournalonline.com
On The Cover: A heavy-cargo transport designed to provide strategic airlift, the C-5 Galaxy aircraft modernization effort incorporates a “glass cockpit” with digital avionics, a new aircraft propulsion system, and reliability improvements. With airframe still in solid shape, such aircraft can last many decades, making electronics technology upgrades essential.
CHARGE B B - 2 5 9 0 M I L I TA RY B AT T E R I E S
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The Journal of Military Electronics & Computing
Publisher PRESIDENT John Reardon, johnr@rtcgroup.com PUBLISHER Pete Yeatman, mail@yeatmangroup.com
Editorial EDITOR-IN-CHIEF Jeff Child, jeffc@rtcgroup.com MANAGING EDITOR/ASSOCIATE PUBLISHER Sandra Sillion, sandras@rtcgroup.com
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COTS Journal
Ruggedized d d VPX P Drive Storage Stt o rage Module SSto d l Whatever your drive mount criteria, everyone knows the reputation, value and endurance of Phoenix products. The new VP1-250X, compatible with both solid state or rotating drives, has direct point-to-point connectivity or uses the PCI Express interface with the on-board SATA controller. It is available in conduction cooled (shown), conduction with REDI covers (VITA 48) and air cooled conďŹ gurations. Leading the way in rugged COTS data storage technology for decades, Phoenix keeps you on the leading edge with very innovative products!
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HOME OFFICE The RTC Group, 905 Calle Amanecer, Suite 250, San Clemente, CA 92673 Phone: (949) 226-2000 Fax: (949) 226-2050, www.rtcgroup.com Editorial office Jeff Child, Editor-in-Chief 20A Northwest Blvd., PMB#137, Nashua, NH 03063 Phone: (603) 429-8301 Published by THE RTC GROUP Copyright 2012, The RTC Group. Printed in the United States. All rights reserved. All related graphics are trademarks of The RTC Group. All other brand and product names are the property of their holders.
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COTS Journal | July 2012
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Publisher’s
NOTEBOOK Primes and Mice Dance
P
rime military contractors are approaching a year-end perfect political storm. In order to appreciate how big this storm is, we need to understand what each element is and its potential effects. The most obvious potential issue is the upcoming election. The outcome of the Presidential election will probably have the least effect in the short term so let’s not even throw this into the mix. Eleven congressional lawmakers that shape policy and defense spending are retiring—removing a significant knowledge base from key committees. Meanwhile, we have at least a dozen lawmakers fighting for their lives to stay in Congress—and it is logical to assume that not all will be successful. The Congress that’s seated in 2013 will have a significant change in committees that oversee the defense department and its funding. As any good manager will attest, bringing in new personnel with new ideas is essential for the growth of an organization. But too much can result in knee jerk changes that have not taken history into account. Programs and primes losing a large number of supporters will create major complications. 2011 was the first year since 1998 that worldwide defense spending had not shown an increase. Comparing 2012 military budgets to those four years ago, the U.S. military budget has been doing better than European countries. But the party is over. Primes finding comfort or relief overseas is highly unlikely. Countries looking at financial collapse like Greece and Spain have cut their military budgets over this period by almost 50 percent. Others under less pressure like the UK and Italy are down almost 20 percent, with Germany and France in middle single digits. Asia is bucking the trend but far from enough to cover the decreases in Europe. Programs that have not been cut have seen significant quantity reductions or extensions in their deliveries. One major program that may be quietly moving forward is the F-35. This program is ahead of schedule and performance reports so far indicate that all variants are now at or exceeding their requirements. And new orders are pending from South Korea with a high level of interest coming from Japan, Israel and Singapore. This now brings us to the “Dark Lord” whose name should never be mentioned: sequestration. This is the political football that was created with the Budget Control Act of 2011 to keep from actually having to deal with our nation’s budget problem. End game for kicking this political football down the road is December. Anyone who actually thought that politicians would tackle this issue in this political election year should be living on another planet—just call me a Martian. What the politicians were hoping for was that this problem would be tackled by the lame duck Congress after November 6th. 6
COTS Journal | July 2012
The problem is that the makeup of the current Congress is not one that can force an issue through because politically the upper and lower houses are still not in sync. Will either the guns or butter side throw in the towel? Or is it hoped that everyone will just say “keep increasing the debt, we don’t care.” That being said, sequestration will be enacted on January 3rd and the new Congress will need to put this on their list of first tasks to address. The one thing not considered when the January 3, 2013 date was placed as the effective date for sequestration was that the WARN Act requires 60 day notice for layoffs—in other words November 4, 2012. Will tens of thousands of potential layoff notices be issued just two days before the election? Will that have any effect on the results of the election? Looking forward, primes are eyeing a three-pronged assault on their companies: election results, worldwide military spending reductions and sequestration. How and when will they react? Will they take an offensive posture and gamble now, or will they take a defensive posture and wait for 2013? If this decision was strictly an operational one it wouldn’t be so difficult. But considering stock value and shareholder support makes tackling these issues a perfect storm for many boards of directors. Once again, our industry will have to endure Congress altering the military budget with issues like: keeping the M1 tank line running against Army needs, unrequested funding for Army combat vehicles, increased funding for Iron Dome rockets, and the Air Force’s attempt to cut back on the Air National Guard. I don’t fully remember the quote, but it goes something like this: “When elephants dance it’s time for mice to get out of the way.” Although our industry is always affected by major changes, for the most part we mice sort of even out our shipments with a little time. The primes will have to sort themselves out, and those mice that provide systems to the primes may encounter some additional shifts in requirements. But the majority of the big changes affecting our industry have already been implemented. I proffer that our end of the industry has bottomed out and that overall we should start to see an increase in RFPs and RFQs as the primes shift more to buying subsystems instead of developing them themselves.
Pete Yeatman, Publisher COTS Journal
The
INSIDE TRACK Lockheed Martin Completes Latest Delivery of Army PTDS Order Lockheed Martin completed its most recent Persistent Threat Detection System (PTDS) order by delivering the 29th unit to the U.S. Army. Since the program’s inception in 2004, the company has delivered 66 systems to the Army to help provide warfighters with around the clock surveillance in Afghanistan and Iraq. PTDS (Figure 1) is a tethered aerostat equipped with multiple sensors that can stay aloft for weeks to months and provide warfighters with a cost-effective intelligence, surveillance and reconnaissance capability. The aerostat is attached by a high-strength tether to a re-locatable mooring system and can carry various payloads to conduct multiple simultaneous missions. The system has since proven its capabilities in a range of operating environments during OIF and Operation Enduring Freedom in Afghanistan. As demand for PTDS has multiplied, Lockheed Martin and its suppliers increased production capacity to ensure on-time deliveries to meet customers’ needs. The systems are produced at Lockheed Martin’s Akron, Ohio facility. Lockheed Martin will continue supporting the program by providing equipment such as cameras, sensors and other hardware, as well as around-the-clock customer service from Akron and Melbourne, Fla. Lockheed Martin Bethesda, MD. (301) 897-6000. [www.lockheedmartin.com].
Figure 1
PTDS is a tethered aerostat equipped with multiple sensors that can stay aloft for weeks to months providing reconnaissance.
Cobham Delivers 200th Low Band Transmitter to U.S. Navy Cobham Sensor Systems celebrated a milestone last month when the company produced its 200th Low Band TransmitterAntenna Group, part of the AN/ ALQ-99 Tactical Jamming System used on U.S. Navy and Marine Corps EA-6B Prowler and EA18G Growler aircraft. Naval Air Systems Command (NAVAIR) exercised the second option of the third full-rate production lot of the Low Band Transmitter-Antenna Group this past February for nearly $39M. This award brings the total number of production transmitters ordered to 281 of the 315 required transmitters. The Low Band TransmitterAntenna Group (LBT-AG), developed by Cobham Sensor Systems, has been in production 8
COTS Journal | July 2012
Cobham Sensor Systems Lansdale, PA. (215) 996-2000. [www.cobham.com].
Figure 2
The EA-18G Growler is a carrierbased electronic warfare aircraft that will replace the EA-6B Prowlers in service with the United States Navy. since 2005. The LBT is designed to protect strike aircraft, ships and ground troops by disrupting enemy radar and communications. It is flown on U.S. Navy EA-6B Prowler and EA-18G aircraft (Figure 2) and Marine Corps EA-6B aircraft, and is heavily used in current operations in Iraq and Afghanistan.
General Dynamics Team Tapped for U.S. Army Radar Replacements A General Dynamics C4 Systems-led team has been awarded a contract to develop and deploy modernized range instrumentation radars, replacing an aging and outdated fleet of radar systems currently operating at U.S. Army test ranges. The Range Radar Replacement Program (RRRP) has a total potential value of $385 million over ten years if all options are exercised. The initial award, valued at $29 million, provides funding for the engineering, manufacturing and development phase of the program and initial
production and integration of the new radar systems at White Sands Test Center, NM; Yuma Test Center, AZ; Aberdeen Test Center, MD; and Redstone Test Center, AL. General Dynamics C4 Systems is a business unit of General Dynamics (NYSE: GD). The General Dynamics RRRP solution leverages the XSTAR family (Figure 3) of instrumentation radars developed by STAR Dynamics. The system can track up to 40 test objects simultaneously. The General Dynamics team is led by General Dynamics C4 Systems based in Scottsdale, AZ and includes STAR Dynamics of Hilliard, OH; Georgia Tech Research Institute of Atlanta; and EO Imaging of Melbourne, FL. Work will be performed in Scottsdale; Kilgore, Longview and Richardson, TX; State College, PA; Hilliard, OH; Reston, VA; Fort
INSIDE TRACK
tions for existing and next generation defense and intelligence programs. Based in Hudson, NH, Micronetics designs and manufactures high-performance microwave and RF subsystems and components used in a variety of defense and commercial
applications, including electronic warfare, radar, electronic countermeasures, satellite communications and commercial wireless products. For its fiscal year ended March 31, 2012, Micronetics reported revenues of $46.0 million.
Mercury Computer Systems Chelmsford, MA. (978) 967-1401. [www.mc.com].
Figure 3
XSTAR instrumentation radars developed by STAR Dynamics can track up to 40 test objects simultaneously. Walton Beach and Melbourne, FL; and Atlanta, GA. General Dynamics C4 Systems Scottsdale, AZ. (480) 441-3033. [www.gdc4s.com].
Mercury Computer Systems to Acquire Micronetics Mercury Computer Systems announced that it has signed a deal to acquire Micronetics, a designer and manufacturer of microwave and radio frequency (RF) subsystems and components. According to the terms of the agreement, Mercury will acquire Micronetics via merger for $14.80 per share. This represents a fully diluted equity value of approximately $71.7 million and an enterprise value of approximately $75.4 million, including $3.7 million of net debt as of March 31, 2012. The acquisition will be funded with available cash and is expected to be immediately accretive to EBITDA. Subject to finalization of purchase accounting, the transaction is also anticipated to be accretive on a GAAP basis within 12 months of the closing date. The transaction is currently expected to close within Mercury’s fiscal 2013 first quarter ending September 30, 2012. Micronetics’ microwave and RF capabilities are expected to enhance Mercury’s integrated digital and RF subsystem solu-
Military Market Watch Survey Says Design Delays Common in Military and Aerospace Projects Embedded Market Forecasters has released the results of its annual report. The report documents its findings of developer preferences based upon the responses of five hundred and thirty-six embedded developers to the detailed 2012 EMF survey. Embedded development engineers were interviewed via a comprehensive survey designed to elicit information regarding current and anticipated tool usage, design starts, completions and cancellations, development (host) and target platforms, microprocessors used, desirable and undesirable product features, vendor evaluation criteria and purchasing decision processes, among other important information. A particularly interesting aspect of the survey results is the section covering Design Considerations. This section does a careful analysis of design starts, cancellations, delays and outsourcing. The results show that project delays are common Embedded Systems Development Projects across all embedMonths of Delay - cancellation and late completion ded computing 2012 2011 2010 market segments, Cancel Complete Cancel Complete Cancel Complete with military and Automotive 5.1 4.4 3.8 3.4 3.8 3.4 aerospace facing Aero/Avionics 6.4 4.9 6.0 5.8 6.0 5.7 the same chalConsumer Elec. 5.0 3.7 4.4 3.7 4.3 3.3 lenges. According Datacom 4.1 5.2 5.1 4.7 4.9 4.4 to the survey results, the average Telecom 5.4 3.8 4.5 3.8 5.1 3.8 number of new Elec. Instrument 4.2 4.7 4.2 4.4 3.7 3.4 embedded deIndust Automation 4.0 4.8 4.2 4.0 4.2 3.4 signs undertaken Medical 5.6 3.5 3.9 4.4 4.7 3.7 per year by the Military 6.6 4.8 5.8 5.7 5.4 4.5 developer’s employer averaged Figure 4 4.3, significantly down from 8.5 in Shown here are design and cancellation delays according to vertical markets. Avionics and 2011 but the same military fared the worst among market applications. as in 2010. In 2012, 10% of designs were cancelled after the project had been initiated. The average delay between design start and cancellation was 5.1. Meanwhile, 35.3% of designs finished behind schedule (an average of 4.4 months). These results are better than those of the past. 11% of designs were outsourced. Delays in design completion and the time expended before project cancellations are expensive to the developer’s company and contribute to corporate overhead. Figure 4 shows design and cancellation delays according to vertical markets. Avionics and military fared the worst among vertical market applications. This is not surprising as these market segments are in disarray caused in part by budgetary reasons—and military system deliveries are behind schedule. Software verification standards and requirements also contribute to potential delays. Information regarding the survey and data can be found at Embedded Forecast’s website. Survey data and the use of the EMF Embedded Dashboard used to compute these data can be seen at: www.embeddedforecast.com/emfmip_videos.php. For more information contact Jerry Krasner, Ph.D., MBA, Principal of Embedded Market Forecasters, at jerry@embeddedforecast.com. Embedded Market Forecasters, Framingham, MA (508) 881-1850 [www.embeddedforecast.com]. July 2012 | COTS Journal
9
SPECIAL FEATURE Pre-Integrated Systems and Technology Readiness
10
COTS Journal | July 2012
Tech Readiness Needs Propel Pre-Integrated System Advances Building demo-ready electronic systems is too costly for today’s defense industry environment. The latest wave of preintegrated systems up the ante with more features aimed at providing military system developers with working computing gear. Jeff Child Editor-in-Chief
O
nce only a niche or specialty segment of the embedded computing industry, the rugged box system category of technology has become a staple on par with the single board computer. Growing out of that is another level of technology referred to as “pre-integrated subsystems.” These systems can take a variety of forms, but are broadly defined as a set of embedded computing and I/O boards put together and delivered as a working system to provide a certain function, but intended to be used in a military customer’s larger system. Some of these are function specific, whereas others are more generic computing/networking platforms. A key driver of these systems is a desire to feed the military’s desire for complete systems that are at high TRL (Technology Readiness Level). The emergence of pre-integrated systems is a reflection of the degree to which prime contractors are increasing their reliance on technology supplier companies like embedded computing vendors. Often they want integration expertise and a level of software development as part of those integration efforts. Part of that trend is fueled by the need for primes to contain their costs—especially in this era of tight budget constraints. Those constraints are felt more acutely now than ever as more and more programs are structured as fixed-price rather than cost-plus. July 2012 | COTS Journal
11
SPECIAL FEATURE
Figure 1
Designed to TRL 9 (Technology Readiness Level) as defined by the DoD, the RediBuilt system eliminates all non-recurring engineering and customization costs.
Security Features Embedded
Figure 2
The “Zeus” SCZ91X is a “super-server” that can run multiple applications on different OSs simultaneously without interrupting the main processor or operating system.
DoD TRL Policy Shifts Another leg of the trend is the shift in DoD procurement policies in recent years. The Weapon Systems Acquisition Reform Act passed in 2009 demands more demonstration of new technologies. Driven by the 12
COTS Journal | July 2012
previously required. All of that has helped fuel demand for prepackaged and prequalified subsystems as primes find themselves without the time or the DoD funding to develop a prototype subsystem themselves. As TRL becomes a more significant part of military requirements, suppliers are crafting solutions with that specifically in mind. A recent example is Aitech Defense Systems RediBuilt rugged COTS computer (Figure 1). Designed to boot and execute a real-time operating system right out of the box, this system can accommodate either Intel or Freescale processors as well as a CompactPCI or OpenVPX backplane in a condensed package measuring less than 0.22 ft3, comparable in volume to a 1/4 ATR Short enclosure. Designed to TRL 9 (Technology Readiness Level) as defined by the DoD, NASA and other government agencies, RediBuilt eliminates all NRE (nonrecurring engineering) and customization costs. It is a highly capable, fully functioning embedded computing subsystem proven through successful operation, complete with built-in, real-world I/O and HD (high definition) graphics and video capabilities. Equipped with standard, circular MIL-DTL-38999 I/O connectors on the front panel and a two-slot 3U CompactPCI or OpenVPX backplane, RediBuilt provides all system interconnections, internal power distribution and filtering circuitry pre-assembled in the unit. The computer’s integrated functionality, combined with its lightweight, rugged aluminum enclosure, makes the RediBuilt ideal for demanding applications where SWaP is important, as found extensively in military and airborne computing environments. The unit measures 202 mm (W) x 260 mm (D) x 126 mm (H) and weighs less than 13 lbs complete.
desire to avoid banking programs on immature technologies, the policy also pushes for demonstrations earlier in the program development phase. That means that technologies used also have to show higher technology readiness levels (TRLs) than
The most recent wave of pre-integrated systems often include more than just the basics of functionality. Demands for high compute density, secure trusted computing and multiprocessing all rank high on the list of today’s top military system requirements. Exemplifying all those trends at once, General Micro Systems (GMS) has introduced the “Zeus” (SCZ91X) (Figure 2), a “super-server” that blends high computing performance with security of data
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Q ARM Cortex-M3 microcontroller board with “J-Link On Board” debug interface
Q 64K bytes on-chip RAM with error detection/correction option
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Q Pre-loaded demonstration software with source code Q Power supply, USB cable and software CD Q Two host interface options available: 16-bit parallel (HI-6130) or SPI (HI-6131) Q Dual flash EEPROMS. Optional auto-initialization using pre-loaded software
Q Simple Monitor Terminal (SMT) Mode records commands and data separately, with 16 bit or 48-bit time tagging Q IRIG Monitor Terminal (IMT) Mode supports IRIG-106 Chapter 10 packet format. Complete IRIG-106 data packets including full packet headers and trailers can optionally be generated
For further information on these and other Holt products contact:
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SPECIAL FEATURE
and operations in a “Trusted Computing Platform.� The system feeds the military’s need for a server that can run multiple applications on different OSs simultaneously without interrupting the main processor or operating system. The Zeus replaces dedicated processing systems or single-level servers, and through a Hypervisor or Virtual Machine Manager, can concurrently run numerous, fully independent operating systems (guests).
At the heart of the system is an Intel Westmere-EP processor, the most powerful Xeon 5600 processor. The Zeus is based on six physical CPU cores, with hyperthreading for a total of 12 cores. Each core operates at up to 2.4 GHz, with the ability to run in TurboBoost mode up to 2.67 GHz. Each guest, as well as the core, is assured uninterrupted operation through the integration of the Westmere-EP with its fully integrated memory controller and massive high-speed memory.
TRRUST-Stor
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Figure 3
The D2D ž ATR eases the design of 3U OpenVPX-based systems by enabling the system integrator to use the same enclosure, using simple configuration changes, throughout a program’s lifecycle, from development to demonstration to deployment. The box makes use of the Trusted Platform Module (TPM), a hardwarebased specification that can be used to encrypt or scramble data, enabling the “sealing� of applications and even an entire operating system. The TPM can also encrypt the system’s configuration, allowing it to pick up on any unsecure devices, and block the computer from starting if one is detected. Some branches of the U.S. government are now requiring TPMs on any new systems purchased.
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From Development to Deployment
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One important aspect of pre-integrated systems is smoothing the transition from system development phase to deployment class systems. With a solution aimed at this issue, Curtiss-Wright Controls Defense Solutions (CWCDS) offers a rugged chassis designed to support a developmentto-deployment approach that reduces risk, schedule and cost. The new D2D ž ATR (Figure 3), a 6-slot ž ATR-style forced air/conduction-cooled chassis, eases the design of 3U OpenVPX-based systems by enabling the system integrator to use the same enclosure, via simple configuration upgrades, throughout the complete program lifecycle, from development to demonstration and all the way to deployment. The enclosure supports up to 6 slots of 3U 1.0-inch pitch payload OpenVPX cards. The D2D ž ATR enables system designers to commence development with a
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Email: sales.support@microsemi.com website: www.microsemi.com
Power Matters. Untitled-2 1 COTS Journal | July 2012 14
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SPECIAL FEATURE
Figure 4
Soldiers from the 101st participating in the Warfighter Information Network- Tactical (WIN-T) program.
COTS Lab configuration chassis version using rugged conduction-cooled payload, and upgrade the enclosure as needed for demonstration and deployment stages. The development version (lab only) has a standard backplane using I/O cabling, a chassis “bottom hat” and I/O cabling. A chassis “top hat” can be used if needed for module faceplate I/O cabling such as fiber optics and RF coax. Connections for external power supplies are available along with industrial grade fans. Next, a demonstration upgrade adds an internal cabled power supply. And then finally, the rugged deployed upgrade replaces standard backplane and I/O cables with custom backplane, and I/O panel with application-specific I/O signals. The bottom hat is also removed in this version. Power supply is upgraded to an internal MIL grade power supply that plugs into the backplane. Meanwhile, MIL grade fans are added for extended temperature and shock/vibration. The deployment version of the D2D ¾ ATR chassis measures 7.62 inches high, 7.50 inches wide and 12.61 inches deep (without optional fan assembly), and weighs 13.7 lbs (6.2 kg) without fan assembly. 16
COTS Journal | July 2012
Service Component to Integrated Boxes While most technology suppliers offer some level of technical support for their pre-integrated systems products, many have formalized these activities. That approach paid off for Mercury Computer Systems earlier this year when they were elected by Raytheon Space and Airborne Systems (SAS) to provide an Application-Ready Subsystem (ARS) and integration services for Raytheon’s Advanced Distributed Aperture System (ADAS). Mercury will deliver an advanced sensor processing subsystem as part of Raytheon’s Multi-function Image Processor (MIP), and systems integration services to help Raytheon realize unprecedented operational capabilities, allowing aircrews to achieve objectives with the lowest possible risk. Mercury’s Application Ready Subsystems (ARS) are customizable configurations designed for a specific application area—EW, radar, EO/IR, C4I or sonar. Whether furnished by the customer, Mercury or a third party, each component is evaluated and chosen as best of breed. The ARS is optimized for
top performance and demanding SWaP constraints. With networking such a critical piece of today’s military systems, sophisticated router functions are in high demand. Extreme Engineering Solutions (X-ES) last month announced a pair of embedded products that are the first to host Cisco’s IOS IP routing software. This approach allows the large majority of IT professionals that are trained on Cisco IOS to deploy compatible rugged hardware to an already deployed system with no training time or expense. The first is the XPedite5205 ESR, a PMC embedded router module hosting Cisco IOS. The second is the SFFR, a box-level packaged router hosting Cisco IOS. At less than 72 cubic inches and 3.5 pounds, the SFFR is the smallest available ruggedized router running Cisco IOS. This rugged router, available in either natural convection-cooled or conduction-cooled enclosures, can be added to almost any available surface of a vehicle or aircraft or deployed in the harshest of environments. Both products incorporate Cisco Mobile Ready Net capabilities to provide highly secure data, voice and video communications to stationary and mobile network nodes across both wired and wireless links. When combined with UHF, VHF, Wi-Fi and other radio platforms, the combination can create mobile, wireless ad hoc networks, without requiring a connection to central infrastructure. Both also offer onboard hardware acceleration and hardware encryption along with integrated threat control using Cisco IOS Firewall, Cisco IOS Zone-based Firewall, Cisco IOS Intrusion Prevention System (IPS) and Cisco IOS Content Filtering.
Fiber Optic Gbit Ethernet Also keeping with the demand for high-speed networking as part of integrated systems, Eurotech subsidiary Parvus has added tactical fiber optic media support for the DuraNET 1268, a rugged Layer 2 Gigabit Ethernet switch subsystem equipped with ten triple-speed 10/100/1000 Mbit/s ports for connecting IPv4- and IPv6-compatible sensors and computing devices on board demanding tactical network-centric (un)manned vehicle and aircraft platforms. Designed for rugged extremes, this Size,
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Gigabit Ethernet interfaces are brought out over rugged MIL-DTL-38999 connectors on the front panel and now optionally Tactical Fiber Optic Cable Assembly (TFOCA II) connectors on the rear. These optical interfaces are designed to survive the harshest battlefield conditions and were selected by the U.S. ARMY WIN-T program (Figure 4) as the standard next generation fiber optic connector for military tactical deployable networks. Managed and un-
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SPECIAL FEATURE Pre-Integrated Systems and Technology Readiness
Pre-Integrated Systems Feed Needs of Tightening Engineering Resources Industry and market conditions of today are pushing pre-integrated subsystems and other outsourced activities into the forefront of military design thinking. Broad levels of system expertise are feeding these needs. JC Ramirez, Product Manager ADL Embedded Solutions
COTS Journal | July 2012
Support Activities
Human Resource Management
n rgi
20
Firm Infrastructure
Ma
Technology Development
Inbound Logistics
Operations
Outbound Logistics
Marketing and Sales
Service
rgi n
Procurement
Ma
P
rime contractors for defense and government embedded systems have been buffeted by a variety of external forces in recent times. First and foremost of these is the worldwide economic recession that’s severely affected budget and spending across all sectors of the economy. At the same time political turmoil has lead to dwindling or delayed government spending on defense programs and Homeland Security projects. As a result, many military and defense programs have been delayed or cancelled, which in turn seriously affects the economic outlook of most primes as well as the viability of smaller military and defense embedded system vendors. For many primes, the natural inclination from a business standpoint is to hunker down and review core competencies and focus on optimizing costs and efficiencies. Meanwhile, a lot of primes and their subcontractors are pursuing diversification strategies into new market segments such as heavy industries like oil and gas production and refining, transportation, and areas where the competitive knowledge built in the military and defense arena can be leveraged effectively and profitably.
Primary Activities
Figure 1
Michael Porter’s Value Chain diagram illustrates how a firm’s value activities fit together.
Value Chain Activities A helpful template for evaluating the various value-added activities within a firm or business unit is the Value Chain diagram illustrated in Figure 1. Originally developed in mid 1980s by Michael Porter of the Harvard Business School, Value Chain analysis has been used extensively in the public sector by businesses and consultants and adapted for
specific use in many industries including U.S. DoD through its Design-Chain Operations Reference (DCOR) framework for product design as a tool for managing development processes. The Value Chain diagram illustrates the five primary value activities that go into the physical creation of a product, its sales and marketing, and servicing. These primary activities are supported
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SPECIAL FEATURE
by four secondary support activities: infrastructure such as management and accounting, human resource management activities, technology development such as R&D and engineering support staff, and finally purchasing and procurement, which supports all functions within the company through primarily production. To the extent that value creation exceeds the total cost of these value activities, profit margin is created for the firm.
For many primes, the value activities most affected by cost-cutting pressure are operation activities related to product development and production. R&D and development staffs are increasingly being asked to “do more with less” under stringent timelines due to delayed funding of defense and homeland security programs, and all the while expected to continue delivering cutting-edge technology using the latest design tools and processes.
Production activities are being asked to optimize the cost of materials and key processes, as well as optimizing the use of labor capacity, which is flat or declining in most cases. For the typical embedded system, a breakdown of these operations activities is illustrated in Figure 2.
Pre-Integrated Systems Upper management’s emphasis on garnering higher efficiencies from their
Operations Value Activities for Embedded Systems Product Development
System Production
• System design and specification • Electronic Stack design • Cabling and harnesses design • Enclosure design and connectors • Thermal modeling • Mil-Std testing and certification
• Cost of materials • Ruggedization coatings and temperature screening • Stack and board integration • Overall System integration • In-process and final testing
Figure 2
Special operations value activities in product development and production of embedded systems.
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SPECIAL FEATURE
production labor pool gets tricky in this era when there’s reluctance to add labor resources in an uncertain economy. That situation has led many primes to take a closer look at their production activities. In particular, there is a keen interest in separating high margin activities from lower margin activities with the goal of retaining high margin activities internal to the company and outsourcing low margin, high labor-content activities to other vendors. Under these criteria a perfect candidate for outsourcing is the preintegration of major subsystems. Putting together the typical embedded subsystem involves a significant number of activities including purchasing of boards and cabling and accessories such as standoffs, screws, spacers, memory, storage devices and so on. Tracking and managing these many components also adds costs that need to be considered. For the typical subsystem, integration and testing is a time-consuming process. In involves manually prescreening major board components, ruggedizing activities, assembling the final configuration including a sometimes ornery “spaghetti” cabling mess and final testing. A natural choice for outsourcing these subsystem pre-integration activities is the board vendor for the particular subsystem. Companies such as ADL Embedded Solutions, which specializes in PC/104 rugged boards and box systems, are often called upon to provide pre-integrated PC/104 stacks including SBCs, proprietary and third-party peripherals, memory, SSD/HDD storage, standoffs, cabling and so on. Figure 3 shows a pre-integrated stack for a rugged IP67 network device with significant ruggedization including extended temperature screening, underfill, bonding and conformal coatings. This is representative of similar PC/104 subsystems and rugged boxes being targeted at programs such as military avionics, UAV electronics, command control systems and comms-networking systems. Outsourcing pre-integrated subsystems such as these offers benefits to primes in a variety of ways. Overall profit margins are enhanced through retention of high-margin activities and more ef-
ficient use of internal production labor capacity. Purchasing and inventory management is simplified through a reduction of BOM components that have to be purchased, tracked and managed. In most cases, there is also the added benefit of reducing the number of vendor interactions for components such as custom cabling and other accessories as well as special services such as conformal coating, which now become the responsibility of the pre-integrated subsystem vendor.
differentiate the company and its products in the marketplace such as project management expertise, overall system design expertise and Mil-Standard certification expertise and capabilities. Project management expertise encompasses delivering embedded systems on time and on budget. And system design expertise includes engineering documentation and supporting the end-customer and all parties involved. Two design activities that are increasingly being outsourced in this environment are enclosure design and thermal modeling of key subsystems and rugged boxes. Today’s 2nd and 3rd generation Intel Core SBCs offer high performance but with high thermal output. The deployment of these SBCs into defense systems in a variety of rugged and extreme temperature environments has put a premium on the expert design of rugged system enclosures and accurate modeling of their thermal capabilities. Expensive workstations with design and modeling tools such as Solidworks (Figure 4) for enclosure design and Solidworks Simulation for thermal modeling are ubiquitous in most engineering design departments today.
Reducing Development Costs
Sophisticated Design Tools
Optimizing product development takes much the same course of action as that in production operations. In this case, though, we are concerned with the efficient use of engineering resources. Most product development costs are usually covered by non-recurring expenses (NRE) at the outset of the project. For most companies, NRE activities are not a high-margin activity as the primary focus is on designing a robust system for the customer, managing its testing, characterization and end-user acceptance, and finally getting it into production in the quickest time possible. From a profit margin perspective, almost all development activities are good candidates for outsourcing. Emphasis should be placed on time-consuming design activities that deplete engineering time or require expensive engineering expertise and design tools. Development activities to keep in-house are those that
Board vendors such as ADL Embedded Solutions and others have moved to fill this need by adding Solidworks CAD design tools and the necessary engineering expertise to complement and enhance their product offerings to primes and major industrial customers. This is motivated by the fact that many primes now require a significant amount of CAD modeling support such as board and component models for integration into higher level systems. But also the thermal interface to high-performance, highthermal output SBCs has become critical and in most cases is better handled by the board designers themselves. This can sometimes grow to include delivery of a complete SBC and enclosure design for a small rugged system. A number of engineering design firms, such as Quartus Engineering, have cropped up to address the need for primes and other industrial customers
Figure 3
Shown here is a pre-integrated PC/104 stack for an IP67 Mil-grade rugged system.
July 2012 | COTS Journal
23
SPECIAL FEATURE
to outsource a variety of design activities. Firms like Quartus can bring more than just extra design expertise to bear on a complex design project. They can also bring more expensive and capable tools such as FloTHERM 3D (Figure 5) and Siemens PLMNX I-DEAS ESC for thermal modeling and simulation. Such tools are capable of not only predicting maximum thermal temperatures inside a particular enclosure or system, but also
the mechanical stresses due to thermal expansion and contraction and coolant flow as a means of identifying weak mechanical elements.
Supporting the New Era The outlook for the economy in general and U.S. military—and defense spending in particular—is not expected to improve significantly for the foreseeable future. As a result, primes will continue to
Figure 4 MISSION-CRITICAL
Solidworks view of rugged IP67 MiniRouter.
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Untitled-3 1 COTS Journal | July 2012 24
3/1/12 9:41:55 AM
Figure 5
FloTHERM 3D version 9 Thermal Analysis. put a heavy emphasis on refocusing on their core competencies and optimizing their development and production processes. They will continue to shed lower margin value activities and non-essential activities that don’t figure prominently into differentiating their products and services. Vendors capable of adapting and evolving to supply higher levels of integration for subsystem components and the requisite engineering development services will be invaluable resources for today’s military system developers. ADL Embedded Solutions San Diego, CA. (858) 490-0597. [www.adl-usa.com].
SPECIAL FEATURE Pre-Integrated Systems and Technology Readiness
Intelligent I/O Approach Lets Developers Right-Size Systems Sometimes an SBC-centric design means unnecessary overhead. An intelligent I/O strategy shortens SBC selection process and reduces obsolescence risk. Lino Massafra, VP Sales and Marketing North Atlantic Industries
I
t’s a fact that today’s demanding military embedded systems require lots of processing horsepower to perform a plethora of mission-critical applications. Much attention is given to the processor or SBC selection. Systems integrators are spending countless days, weeks and even months comparing, contrasting and evaluating SBC boards from COTS vendors that most closely meet their overall system needs before making a final decision. Inevitably, the time spent in this “discovery” phase of a program tends to push the deadline further and further to the right. Commercial off-the-shelf vendors offer a multitude of SBC boards that meet today’s challenging processing requirements for military embedded systems customers. They range from 3U and 6U cPCI, 6U VME, and 3U and 6U OpenVPX, taking advantage of both Intel and Freescale processor offerings. ARM processors are also starting to catch the eye of system integrators, noting the processing performance and the lower power required. COTS SBC boards typically support the same basic core processing function coupled with onboard I/O and a mezzanine site. The core processing function offers the basics: processor, SDRAM, boot and user flash, serial ports, Ethernet ports, some general purpose I/O (GPIO) ports and options for USB, Video or SATA interfaces. 26
COTS Journal | July 2012
Predetermined I/O on SBCs All those interfaces are predetermined on the SBC board and vary from vendor to vendor. In addition, no two vendors support the same I/O routing to the user-defined pins for any of these standard I/O interfaces. Each one defines the onboard rear I/O routing based on the history of board designs. In order to support additional I/O requirements, COTS vendors add mezzanine card sites to their SBC offering. These cards are known as PCI Mezzanine Cards (PMC), or Switched Mezzanine Cards (XMC). In most cases they require one or more PCIe to PCI Bridge chips to interface to the PMC. PCIe can be routed directly to XMC sites. They can range in functionality from simple discrete I/O to the most complex high-speed A/D with DSP and FPGA processing. In recent years some COTS vendors have started adding non-standard mezzanine sites to their 6U VME and OpenVPX SBC boards, which continue to utilize the PCI bus interface. These non-standard mezzanine sites enable vendors to offer the most commonly used military embedded I/O interfaces without compromising the use of the PMC or XMC site(s). Common interfaces on these non-standard sites include MIL-STD-1553, video, flash storage and SCSI. They can also be used to fulfill a standard I/O requirement
that eliminates the need for additional PMC/ XMC carrier cards. Therefore, a 6U VME or 6U OpenVPX card could typically support up to three additional I/O and communications functions using a PMC, XMC or nonstandard mezzanine site.
Carrier Card Approach Carrier cards are used to add I/O support in systems without having to use another SBC. Therefore, one SBC is managing all of its onboard I/O, its PMC/XMC I/O and any other I/O found on separate PMC or XMC carrier cards that contain PMC, XMC or non-standard mezzanine cards. In 6U VME or cPCI this is usually done by routing a PCI bus on the backplane from the SBC to the carrier card(s); or in 6U OpenVPX, a PCIe or multiple PCIe interfaces are routed on the backplane from the SBC to the carrier card. A PCIe switch is located on the carrier card to route PCIe to XMC cards or to PCIe-to-PCI interface chip(s) for connectivity to PMC cards. A military embedded system containing an SBC with PMC, XMC, another mezzanine site and PMC/XMC carrier cards is an example of just one of the ways in which systems integrators can meet their processing and I/O requirements (Figure 1). More and more hardware engineers are desperately seeking
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SPECIAL FEATURE
USB
DDR SDRAM
SERIAL
Processor
Flash NVRAM
PHY
SGMII
GPIO
PCIe PCIe (OpenVPX only)
Add’l Mezzanine Site
PCI
PCIe to PCI Bridge
PCIe
PCIe
PCI Switch
PCIe PCIe
I/O
SATA
PCIePCI Bridge
PCI
1 or more PMC/ XMC
ETHERNET
VME — cPCI — OpenVPX
DDR SDRAM
Figure 1
Diagram of a typical COTS SBC with PMC/XMC sites. ways to eliminate the need to use an SBC with fixed I/O and communications, not to mention the restrictions inherent in 6U VME/VPX of up to three additional I/O or communications functions. In 3U the limit is either one I/O or communication function. The ability to select an SBC and also select the I/O and communications functions is an engineer’s preferred approach—for instance, not just one to three of them but more in the area of at least two functions for 3U and up to six functions in 6U.
Software Overhead Implications As described above, most of the I/O interfaces require drivers specifically written for the processor type—Intel, Freescale and so on—and a Real Time 28
COTS Journal | July 2012
OS. Imagine a small system that monitors 32 to 48 discretes, 20 to 30 200 KHz A/D and D/A signals; supports three or four CANBus interfaces, three or four RS-232/422/423/485 channels, dualchannel dual-redundant MIL-STD-1553 interfaces; and simulates or measures five to six Synchro-Resolver interfaces. This system typically requires two, three or more 6U VME or OpenVPX boards— more boards would be needed if it were 3U cPCI or 3U OpenVPX. The SBC could support the serial ports on board; MILSTD-1553 would be supported via a nonstandard mezzanine site on the SBC; Discretes and A/D could be PMC/XMCs on the SBC; and the rest could be supported via the use of carrier cards. All of these communications and I/O functions are
usually handled by the only intelligent chip in the system: the SBC processor. Besides executing the embedded application—also known in this case as the Operational Flight Program (OFP)—, the SBC has to manage and control all of the I/O interfaces. Built-in Test (BIT), a must in military embedded systems, is also handled by the SBC processor. In addition, military embedded systems sometimes require the SBC processor to have anywhere from 25 to 50 percent of spare processing overhead. Unfortunately, when you add up all of the processing required by the SBC to support the I/O, BIT and spare overhead, it leaves little processing resource for the application. Now imagine a system that has many more I/O and communications
SPECIAL FEATURE
ON M I S SIIC A L CRIT ICES DEV
To Front and/or Rear I/O DSP/FPGA
Interface Bridge
SerDes
PCI Bus
J1
Function #2
Quad-Core PowerPC P2041 @ 1.2GHz
SerDes
To Front and/or Rear I/O
SATA II
Up to 32GB User NAND Flash
Function #1 or 256GB SATA II NAND Flash DSP/FPGA
8 x I/O Discretes
PCIe
256MB Boot NOR Flash
1x Serial
DC-DC Converters AC-DC Power Supplies
2x Gig-E
SATA II
1x USB
J2
I2C
Up to 4GB DDR3 SDRAM w/ECC
FRAM RTC TEMP
Figure 2
Diagram of a NAI 75SBC4 with two function slots.
• Expanded Operating Function #1
To front and/or rear I/O
FPGA
Function #2
DSP
FPGA
To front and/or rear I/O
DSP
Function #3
FPGA
To front and/or rear I/O
Function #4
DSP
FPGA
To front and/or rear I/O
DSP
Function #5
FPGA
To front and/or rear I/O
DSP
Function #6
FPGA
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To front and/or rear I/O
DSP
Intelligent I/O Function Processing Core System Processing Core
FPGA
2x Gig-E
DSP
SDRAM FLASH
ard s of Stand Thousand DC to 10,000 V V 2 ls e d o Watts M 5 to 2,000 .7 0 ts u tp Ou
VME
* Also available in 3U/6U cPCI & 3U/6U OpenVPX
P2
P0
P1
Figure 3
PICO
This intelligent I/O approach supports the protocol overhead and programmable configuration of the I/O functions, BIT for each of the I/O functions, and maintains a VME, cPCI, PCIe, sRIO or Ethernet interface. functions, which in turn increases BIT processing. As you add I/O functionality you eat away at processing available for use by the application or for spare
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processing overhead. Ideally, a solution using Intelligent I/O would relieve the SBC of the handling of all the processing associated with the I/O functions.
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Untitled-12 1
www.picoelectronics.com
July 2012 | COTS Journal
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6/2/11 2:01:48 PM
SPECIAL FEATURE
Protecting Software Investment Often the drivers for I/O functions and application software take many manmonths to write and lots of money to support and validate. Unfortunately, we are all well aware of the dreaded obsolescence notification. Systems integrators are concerned about potential end-of-life components. The sheer thought of components going end-of-life sends shivers up the spines of systems integrators and program
mangers of military embedded defense and aerospace programs all over the world. Think about how the software engineers feel. They have to write a new driver for the replacement chip, integrate a new Board Support Package (BSP) from the SBC vendor for the OS and update the application code. Not to mention all of the regression testing that needs to be performed. Consider the advantages if all the software that supports the I/O functions were
Figure 4
The SIU6 is a subsystem that manages and controls up to 12 different I/O functions without the need of an SBC. 100% protected from obsolescence. Ideally, all I/O would be handled by a library call to read/write from/to an I/O function in a fixed memory space that doesn’t change. Additional I/O memory space can be added for enhancements but the previous I/O memory mapped space remains intact. All the I/O memory mapped function data could be made available on the system interfaces like VME, cPCI, PCIe, sRIO or even Ethernet. The application software and in turn the software engineer would never have to deal with an I/O driver running on the SBC (Figure 2). If the I/O function hardware goes obsolete, a new one that exists in the same exact memory space containing the same exact configuration registers would replace it, making it completely invisible to the application running on the SBC. In addition, if the I/O functions had intelligence to function on their own and also execute continuous BIT, it would isolate the SBC from having to process I/O functionality and BIT. This would in essence reduce the risk of obsolescence for the overall system and also relieve processing overhead from the SBC processor.
Intelligent I/O without an SBC Does every military embedded subsystem require an SBC? Perhaps not, but systems integrators have become so accustomed to assigning a VME, cPCI or OpenVPX slot to an SBC of some kind that it has become second nature. In reality, if the subsystems connected to the main mission computers were able to manage and control all I/O functions, there would be no need for an SBC in these subsystems. The key is to add the I/O intelligence to the subUntitled-4 1 COTS Journal | July 2012 30
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SPECIAL FEATURE
system handling the I/O function without the need for an SBC. In most cases the SBC in the mission computer is handling lots of I/O overhead including multiple serial protocols, A/D and D/A conversion, status of multiple discretes and anything that is connected to it on the PCI/PCIe bus from PMC or XMC cards. If the mission computer’s only responsibility was to execute the application while all of the data it needed was given to it when available or when the mission computer had data to send, it would alleviate processing resources for the SBC in the mission computer. Some COTS vendors have implemented intelligent I/O PMC/ XMC cards but they still require an SBC or carrier card to be mounted on, and in most cases the carrier cards cannot interface with other boards in the system. An intelligent I/O solution (Figure 3) would support: the protocol overhead and programmable configuration of the I/O functions, BIT for each of the I/O functions, and maintain a VME, cPCI, PCIe, sRIO or Ethernet interface. The solution
would be flexible enough to be configured with a host of I/O functions to support a large percentage of subsystem requirements for today’s demanding military embedded systems. It would have to be low power and support high density I/O.
Advantage of Eliminating SBC North Atlantic Industries’ Intelligent I/O architecture, coupled with its complete line of power supply offerings, takes it one step further when installed in an SIU6 (Figure 4), a subsystem that manages and controls up to 12 different I/O functions without the need of an SBC. All data is sent to or read from the SIU6 by the mission computer over an Ethernet interface. All protocol and BIT processing overhead is handled by the Intelligent I/O functions within the SIU6. The SIU6 comes configured with five MIL-STD-38999 connectors, three 100-pin connectors for I/O, one rugged Quadrax connector for Dual Gigabit Ethernet Interfaces and one power input connector. The chassis and backplane with connectors is built and sold the
same way every time. The only options are the power input requirements and the I/O functions defined by the customer. Future I/O functions can be added, removed, or changed without any impact to backplane wiring. This saves a lot of development time and non-recurring engineering costs. The best part is eliminating the need for a potentially power hungry SBC. Now more than ever systems integrators demand intelligent high-density, low-power, flexible I/O. Budgets are tight and modified COTS I/O products requiring any NRE dollars are not the systems integrator’s logical choice. They want field-proven, mix-and-match I/O that meets the requirements of the product specification. For systems integrators, offloading any processing overhead is a plus and can make the difference in winning a major program. North Atlantic Industries Bohemia, NY. (631) 567-1100. [www.naii.com].
Designed per MIL-STD-810, MIL-STD-901, MIL-STD-167 and MIL-STD-461 to perform in the harshest environments Conduction, convection or liquid cooled ATR enclosures in standard or custom sizes VME, VME64x, VPX and CPCI architectures to the latest VITA and PICMG specifications Backplanes – sizes 3U and 6U, various slot configurations per functionality and payload LCR’s integrated system designs are born rugged...not recycled commercial products Perfect for airborne, ground mobile and UAV applications LCR’s complete line of integrated military systems, from off-the-shelf to fully customized, are ideal for all aspects of mission-critical computing such as weapons control, navigation, intelligence, surveillance and reconnaissance. To learn more about what we can do for you and your application, contact us today.
Untitled-5 1 COTS Journal | July 2012 32
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SPECIAL FEATURE Pre-Integrated Systems and Technology Readiness
Pre-Integrated Systems Expedite Defense Application Deployment By using pre-integrated box-level systems, military platform developers can shrink overall development times and design costs. Standards-based systems take those advantages even further. John Long, Product Line Manager, ATCA Radisys
P
re-integrated box-level systems have made tremendous progress in satisfying the size, ruggedness and performance requirements for a wide range of aerospace and defense applications. The industry is seeing a further shift as manufacturers look to preintegrated solutions as the new industry building block. This approach reduces development cycles and allows developers greater choice in selecting performance levels to meet their specific application needs. In addition, pre-integrated systems can simplify the supply chain making it easier to manage so defense contractors can focus on where they add value. When combined, technologies such as AdvancedTCA (ATCA), COM Express and rackmount servers provide a complete, deployment-ready solution with the flexibility for design and software enhancements. Together they support a network of networks in a manner that is standards compliant, providing a high level of interoperability and scalability.
Improving Situational Awareness Effective military units need clear command and control and rules of en34
COTS Journal | July 2012
Figure 1
Effective military units need clear command and control and rules of engagement to succeed in the battlefield. gagement to succeed in the battlefield. They must have complete situational awareness and know where they are, who their targets are and where their targets are located (Figure 1). In the past 10 years, resourcefulness and initiative in bringing pre-integrated communications technology to the battlefield has led to rapid advances in command and control, enabling our commanders to keep pace with changing tactics, techniques and
procedures by adaptive enemy forces. The aerospace market is starting to follow the same transition path the telecommunication market went through over the last 10 years. Defense contractors are outsourcing hardware, subsystems and even some applications because they believe that they can get more value from their engineering teams by focusing on higher layer application and integration into bigger systems.
SPECIAL FEATURE
The telecom industry has been steadily moving from proprietary to standards-based designs due to refined standards and the development of a healthy supplier ecosystem. As telecom companies transition from proprietary to standards-based architectures, most are now saving resources and capital by outsourcing critical design and validation tasks.
programs. While significantly reducing development risk and total life cycle ownership costs, pre-integrated solutions also ensure that performance will keep pace with evolving warfighter requirements and leaps in technology. Military and aerospace system designers in the process of replacing proprietary architectures are seeking technologies that competently
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Fully Custom Standards-based
Figure 2
Lifetime program costs for a military system: fully custom versus standards-based. By also using pre-integrated hardware and platforms as opposed to designing a system in-house, contractors are now in a position to avoid hardware design altogether and can focus their development efforts on software-based, value-added features. In some situations defense contractors are even outsourcing portions of the software and purchasing hardware platforms that include complete applications. Defense contractors are also finding that equipment based on open standard architectures typically costs less to deploy since it makes sound economic sense to design scalable platforms that can be employed across multiple applications (Figure 2). Open standards-based pre-integrated solutions not only address many issues facing equipment manufacturers, but they also meet the needs of military 36
COTS Journal | July 2012
accommodate the toughest environmental conditions, such as extreme temperatures, yet are efficient enough to meet application needs for power, performance and heat dissipation. As a result, the Department of Defense (DoD) measures the Technology Readiness Level (TRL) of evolving technologies, and many programs will only consider using the highest rated standards-based products that meet a TRL of eight or nine in order to reduce their risk. Many pre-integrated technologies are designed and tested to withstand the rigors of military environments while offering developers readily available, interoperable hardware that reduces design effort. For example, ATCA is being deployed in full rate production in the Army today so it has a technology readiness of level nine. COM Express has also
been successfully deployed and fielded as a component of larger systems. These technologies are thoroughly tested by leveraging Highly Accelerated Life Testing (HALT) and Highly Accelerated Stress Screening (HASS) to increase the functional and physical design margin of the product, which safeguards against failure.
Standards vs. Proprietary Designs When starting a new program, engineering teams traditionally look at the key performance parameters and determine if they can use hardware based on open standards to meet the system requirements or if they will need a proprietary design. If they can use standard form factors, they typically select a chassis or enclosure and then select multiple thirdparty blades or components. Then the engineering team verifies that all the blades will work together, coordinates with multiple third parties to address any interoperability issues, executes environmental testing to ensure their system meets the end user requirements, and validates the application on the platform. If they are required to implement new technology such as ATCA, VPX, COM Express or other standards, engineers may have to go through a steep learning curve prior to deployment. Defense contractors would also have to manage a complex supply chain covering multiple vendors to get revision control on new products and establish supplier agreements. In the event that the contractor needed to update the board or replace broken components, such as hard drives or memory, they would need to work with multiple vendors in the supply chain to revalidate the systems and ensure that the changes will not impact overall operations.
Offloading Engineering As open standards mature, many of the large embedded suppliers can offload much of the basic engineering for defense prime contractors. These larger embedded suppliers understand the new technologies and standards and have significant experience on how to design, validate and manage test environments,
SPECIAL FEATURE
unique value-add, including software and integrating the ATCA platform into the overall system. Complete subsystems with application software: More customers are adopting this model, especially in the wireless communication segments where they are looking for quick timeto-market for LTE or 3G applications in public safety or aerospace and defense. Some embedded technology vendors, such as Radisys, can help customers select the correct hardware to meet the environmental requirements, work with third-party hardware vendors if needed and integrate wireless software, such as Trillium, for both 3G and LTE. This particular solution replicates the functionality of up to eight different network elements and consolidates them into one platform. As a result, the customer is simply responsible for validating the system in their environment.
User in Mind Figure 3
T-Series ATCA platforms with integrated software ease the development process and shrink the project schedule. as well as how to manage all elements of the supply chain. This allows program managers to reduce upfront development costs, cut their time-to-market and free up resources to focus on their expertise in software and platform integration. There are typically three levels of service that these suppliers can provide: Consulting: Many embedded technology vendors can provide design recommendations that use standard form factors and proprietary hardware. For example, if a premier defense contractor wants to design a custom enclosure and carrier card for a COM Express module, suppliers like Radisys can review the carrier card design to ensure it works with the COM Express standard module and provide guidance on environmental issues such as thermals, electromagnetic compatibility (EMC) or vibrations. Application-ready platforms: There are multiple variations of this model, 38
COTS Journal | July 2012
but some embedded technology vendors can provide a complete tested and validated platform (Figure 3) that is ready for the contractor’s application, as well as continue to manage the lifecycle of the platform including the supply chain and end-of-life components. For example, a contractor with an ATCA system built using multiple third-party components needed to upgrade its systems with a higher performance single board computer. Radisys worked with the contractor to select the SBC, validated the new SBC in the defense contractor’s systems and worked with multiple thirdparty vendors to achieve interoperability. In addition, Radisys performed environmental testing for thermal, as well as shock and vibration, and identified areas where the contractor could improve the manageability of the system. This allowed the customer to focus their engineering resources on their
Pre-integrated boxes are designed with the user in mind, addressing the military’s top priorities of providing high-performance solutions while reducing development time and total cost of ownership. With a strong ecosystem, pre-integrated boxes provide defense contractors with standardsbased systems that are f lexible and support customization at multiple levels of integration. Instead of solving integration challenges, developers can focus their time and resources on developing their value-add, including integration of the latest military and aerospace technologies. Radisys Hillsboro, OR (503) 615-1100. [www.radisys.com].
TECH RECON Safety-Critical and Security Software and Standards
Model-Based Design Aids Signal Processing Prototyping FPGAs are a vital part of any advanced military signal processing system. Modelbased design offers an easier alternative to ordinary HDL simulation. Stephan van Beek, Application Engineer Sudhir Sharma, Product Marketing Manager Sudeepa Prakash, Product Marketing Manager The Mathworks
F
PGAs are finding their way into many defense and aerospace applications because of their ability to process high bandwidth, high data rate signals with high reliability and flexibility. For example, radar systems, satellites and other signal intelligence equipment use FPGAs. Yet, despite their popularity, designing with FPGAs is a time-consuming effort requiring specialized design and verification talent. A majority of the effort goes into verifying the design. Chip design and verification engineers often write as many as 10 lines of test-bench code for every line of hardware description language (HDL) code that is implemented in silicon, and may spend 50 percent or more of their design cycle on verification tasks. Despite this level of effort, nearly 60 percent of the chips contain functional flaws and require respin. Realizing that HDL simulation is not sufficient to catch system-level errors, chip designers are employing FPGAs for algorithm acceleration and prototyping. However, rushing to prototype a design on FPGAs in the lab without doing proper system-level and HDL simulation is not a good practice. Studies show that finding the root cause of a functional bug in the lab can take more than 5 hours in simple designs and more than 30 hours in complex designs. Clearly, a more cost-effective, streamlined, 40
COTS Journal | July 2012
Best Practice 1: Algorithm and System Design with Fixed-Point Quantization Analysis
Best Practice 2: Automatic HDL Code Generation
Hardware Synthesis
Best Practice 3: HDL Cosimulation
Best Practice 4: FPGA-based verification
Figure 1
Model-based design best practices for developing FPGA prototypes. reliable and repeatable approach to creating FPGA prototypes is needed. Model-based design offers such an approach using four best practices, as illustrated in Figure 1.
Why Prototype on FPGAs? Prototyping algorithms on FPGAs gives engineers increased confidence that their algorithm will behave as expected in the operating theater. In addition to running test vectors and simulation scenarios at high speed, engineers can use FPGA prototypes to exercise software func-
tionality and adjacent system-level functions, such as RF and analog subsystems. Moreover, because FPGA prototypes run faster, larger data sets can be used, potentially exposing bugs that would not be uncovered by a simulation model. Model-based design using HDL code generation enables engineers to efficiently produce FPGA prototypes, as shown in Figure 2. This figure illustrates the practical reality that engineers often abbreviate the detailed design phase in an attempt to begin the hardware development phase to
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FPGA Prototype 2
Model-Based Design
FPGA Prototype 1
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FPGA Prototype 1
0 Schedule Time (%)
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Final ASIC Implementation Figure 2
Hardware design using model-based design for shorter design cycles, faster prototype development and rapid design iterations.
~70 MSPS Receiver RF Front-End
ADC
~270 KSPS Digital Down Converter
Demodulator
Figure 3
Communications system employing a digital down converter (DDC). meet development schedules. In practice, engineers will revisit the detailed design phase during the HDL creation phase as they discover that the fixed-point algorithm is not meeting system requirements. This overlap contributes to an elongated HDL creation phase as depicted by the long purple bar in Figure 2 and may result in design compromises, such as glue logic or design patches. Because automatic HDL code generation is a faster process than manual hand-coding, engineers can invest some of the time savings to produce higher quality fixed-point algorithms in the detailed design phase. This approach enables engineers to produce higher quality FPGA prototypes faster than with a manual workflow.
Digital Down Converter Example To illustrate best practices for FPGA prototyping using model-based design, a 42
COTS Journal | July 2012
digital down converter (DDC) is used as an example. A DDC is a common building block in digital RADAR receivers (Figure 3). It is used to transform high-rate passband input into low-rate baseband output, which can be processed using lower sample rate clocks. This results in lower-power, lower-resource hardware implementation. Investing time to design algorithms using modeling and simulation at the system level before selecting an architecture ultimately leads to better-performing systems. By working at a high level of abstraction, engineers can quickly evaluate multiple types of algorithms and architectures for specified design constraints. For example, engineers can analyze the effect of fixed-point quantization early in the design process and optimize the word length to yield smaller and more powerefficient implementations.
Engineers typically test new ideas and develop initial algorithms using floating-point data types. Hardware implementation in FPGAs and ASICs, however, requires a conversion to fixed-point data types, which often introduces quantization errors. In a manual workflow, fixed-point quantization is usually performed during the HDL coding process. In this workflow, engineers cannot easily measure the effect of fixed-point quantization by comparing the fixed-point representation to a floating-point reference. Nor is it easy to analyze the HDL implementation for overflows.
Adjusting Fraction Lengths To make intelligent decisions about required fraction lengths, engineers need a way to compare the floating-point simulation results against fixed-point simu-
TECH RECON
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<= to_signed (0, 18); <= to_signed (0, 18); <= alpha1_D_Lookup_Table_out1_re; <= alpha1_D_Lookup_Table_out1_im;
Traceability between HDL code, model and system requirements is needed for high-integrity applications that adhere to standards such as DO-254. lation results before starting the HDL coding process. Depending on the design specification, engineers may need to increase the fraction length to reduce the introduced quantization error. The reduced quantization error, however, comes at the cost of increased word length, which results in increased design area and power consumption. In other cases, engineers may be able to reduce the fraction length (and word length), resulting in reduced area and power consumption. Therefore, converging on the right fraction length and word length is critical to meeting design specification objectives. Verilog and VHDL are the industrystandard HDLs used to design FPGAs. A vast majority of FPGA design is done using handwritten HDL code. Recent technology enhancements now provide means to automatically generate HDL
code from high-level system models. Automatic HDL code generation provides several important benefits, including the ability to quickly assess if the algorithm can be implemented in hardware. It also allows you to rapidly evaluate different algorithm implementations and choose the best one. Automatic HDL code generation also makes prototyping algorithms on FPGAs faster. High-integrity and mission-critical applications, such as those requiring DO254 certification, require verification of hardware implementation against system-level requirements. To achieve this level of verification, engineers need to be able to trace HDL code back to the system-level model and the original systemlevel specification that the model represents. In our case study, the generated HDL code is readable and traceable to the
source model, which can be linked to the text system-level specification (Figure 4). For the DDC example, nearly 5800 lines of hyperlinked HDL code used to facilitate traceability between model and code were generated in one minute. This ability to automatically generate HDL code enables engineers to invest more of their engineering efforts into designing—quickly and iteratively—the right system model to produce the ideal FPGA prototype for their application.
Cosimulation for HDL Verification HDL cosimulation enables engineers to reuse system models to drive stimuli into the HDL simulator and perform system-level analysis of the simulation output interactively (Figure 5). Where HDL simulation provides only digital waveform output, HDL cosimulation provides July 2012 | COTS Journal
43
TECH RECON
Figure 5
Using HDL cosimulation to debug HDL code before committing to hardware implementation. complete visibility into the HDL code as well as access to system-level analysis tools. Cosimulation lets engineers assess how differences between expected results and HDL simulation could affect the design at the system level. The spectrum scope view enables the engineer to make an informed decision to ignore the mismatch between the expected results and HDL simulation results because the differences lie in the stop-band. The digital waveform output, in contrast, just f lags the mismatch in expected results and HDL simulation results as an error. Using just HDL simulation, an engineer could eventually arrive at the same conclu-
sion, but it would take more time to complete the required analysis.
FPGA-in-the-Loop Simulation Having been verified via system-level simulations and HDL cosimulations, the DDC algorithm is now ready to be deployed on an FPGA target platform. FPGA-based verification, also known as FPGA-in-the-loop simulation, of the algorithm increases confidence that the algorithm will work in the real world. It enables engineers to run test scenarios faster than host-based HDL simulation. For the DDC algorithm, the system model is used to drive FPGA input stimuli and to analyze the output of the FPGA. As
with HDL cosimulation, the results are always available in the system model for analysis. In this case, FPGA-in-the-loop simulation was 23 times faster than HDL cosimulation. Such increased simulation speeds enable engineers to run more extensive sets of test cases and perform regression tests on their designs. As a result, they can identify potential problem areas that need more detailed analysis. Though slower than FPGA-in-the-loop simulation, HDL cosimulation provides more visibility into the HDL code. Developing cost-effective, reliable and scalable systems is a key requirement for aerospace and defense engineers. Since FPGAs are now being deployed in many data-intensive, mission-critical applications within these systems, engineers can use the integrated algorithm-toFPGA development workflow described in this article to achieve these objectives. The four best practices can enable engineers to develop FPGA prototypes much faster and with a greater degree of confidence. By automating error-prone manual methods, these practices enable engineers to iterate faster while lowering development costs. The Mathworks Natick, MA. (508) 647-7000. [www.mathworks.com].
Multicore Debugging: Mix & Match
www.lauterbach.com Untitled-1 1 COTS Journal | July 2012 44
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PL-60590 Features • Fanless operation • Intel® Core™ 2 Duo processors with 533/667MHz FSB • Fully featured I/O • 10/100/1000 LAN Ethernet interface • One mounting kit for 2.5” HDD • One MIO expansion slot & one PCI connector • Anti-vibration for maximum reliability PL-60590 is a fanless, rugged embedded box computer designed for kiosk, vehicle, and industrial automation applications. All electronics are protected in a robust, compact housing for embedded and stand-alone applications, where the space and protection from the environment are important. The PL-60590 is equipped with high performance graphic capability, full function I/O and one MIO module that can be used for the expansion of I/O functions.
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TECH RECON Safety-Critical and Security Software and Standards
Ada 2012: A New Language for Safe and Secure Software Building on a tradition of success in mil/areo systems, a new version of the Ada language has emerged. It features “contract-based programming” that blends well with the requirements-based world of military programs. Benjamin M. Brosgol, Senior Technical Staff AdaCore
D
eveloping safe and secure applications requires appropriate technology, and the programming language has a significant impact. Its features should help in producing reliable code that can be analyzed to demonstrate relevant properties and to support the required safety or security certification activities. The original Ada language was designed to meet these goals, and subsequent revisions have stayed true to its philosophy. The latest version, Ada 2012, represents another major advance in the language’s evolution. Its features for “contract-based programming” allow the programmer to specify checkable assertions about program properties, including operation preconditions and postconditions, and type invariants. These contracts are in effect program requirements expressed in the source text.
Safety/Security Matters Industries with strong safety or security demands generally require systems to be evaluated against a relevant certification standard. As one example, avionics systems for commercial or military aircraft need to meet the guidance defined in DO-178B (recently revised to DO-178C). This guidance comprises a set of objectives and associated activities that apply to the various software life cycle 46
COTS Journal | July 2012
processes, with an emphasis on verification. Which objectives apply depends on the level of the software component, and the software level in turn is determined by the effect of the component’s failure on the aircraft’s continued safe flight and landing. The levels range from E (no effect) to A (catastrophic). Higher levels require more objectives to be met, and for some objectives, meeting them with independence (the developer cannot be the verifier) and/or with additional configuration management rigor. The various levels and their interpretations are shown in Figure 2. For systems where security is a concern, the de facto standard is the Common Criteria, which defines and categorizes two kinds of requirements. The first is Security Functional Requirements (SFRs): security-related services that the system must perform. The other is Security Assurance Requirements (SARs): processes that give confidence that the SFRs are implemented correctly. The SARs are grouped into Evaluation Assurance Levels (EALs), ranging from EAL1 (“functionally tested”) to EAL7 (“formally verified design and tested”), as depicted in Figure 3. A given product is evaluated against a Protection Profile characteristic of the application domain; the Protection Profile identifies the assets to be protected, the set
of SFRs to be implemented, the required EAL, and the assumptions about the operational environment in which the system is to be deployed. Although a software safety standard such as DO-178B and a software security standard such as the Common Criteria differ in obvious and major ways, a basic underlying similarity can be abstracted from the details. In both cases assurance that a system is sufficiently safe and/or secure is obtained by demonstrating two main properties. First, that the required safety/security functionality—maintaining flight parameters within specified airframe limits, supplying appropriate access controls to sensitive data—has been implemented correctly and so on. Second is that the system is immune to failure conditions that could compromise the safety/security requirements.
Programming Language Matters The ease or difficulty of demonstrating these properties depends on many factors. Skilled developers and sound development practices are obviously important, as is a clear and complete formulation of the software’s requirements (functionality, performance and so forth). But another factor is the programming language(s) and supporting tools. The software is ultimately represented as program text in
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Figure 1
In the DO-178B safety-critical standard, the objectives that apply depend on the level of the software component, and the software level in turn is determined by the effect of the component’s failure on the aircraft’s continued safe flight and landing. some language, and claims about program correctness and absence of vulnerabilities need to be expressed and demonstrated in terms of this representation. The syntax and semantics of the language affect the ease or difficulty of constructing arguments to justify such claims. The main requirements on the language are reliability and analyzability. Reliability in this context means good error detection, absence of “traps and pitfalls,”, and effective software engineering support. Meanwhile, analyzability refers to its predictability—the ability to derive program properties such as freedom from exceptions. Since the expressive power of general-purpose languages tends to introduce complexity that compromises either the reliability or analyzability goal or both, another important requirement is the ability to define subsets for which these goals can be achieved. In short, the programming language can be part of the solution or part or the problem. 48
COTS Journal | July 2012
A Little Ada History The Ada language is firmly on the solution side. It was originally designed against a set of requirements for developing reliable, maintainable software. It was designed in particular for critical real-time systems with safety and/or security constraints in mind. Features such as compile-time checks with strong typing, data encapsulation, and runtime checks for array indexing and integer overflow help prevent errors or detect them before they end up in delivered code. Other features that Ada assimilated from software methodology research—including exception handling, tasking (a structured and high-level set of concurrent/threading programming features), and a general facility for generic templates—provide expressive power that eases the job of developing and maintaining large complex systems. Over the years the Ada language has gone through several revisions. Ada 95 represented a significant upgrade, intro-
ducing comprehensive support for Object-Oriented Programming, an efficient and reliable mechanism for state-based mutual exclusion (“protected types”), a general separate compilation facility supporting hierarchical libraries, and an extensive predefined environment. It also added a facility, pragma Restrictions, that lets the programmer specify features that are not being used. At first glance this may seem curious; isn’t the programming language supposed to offer increased expressiveness and generality? Yes, but for some kinds of applications, “too much” can be a problem. Features with complex semantics may introduce the risk of errors; for example, with Object-Oriented Programming there is an important but perhaps subtle syntactic difference between “static binding” and “dynamic binding”: the difference between interpreting an operation based on compiletime versus run-time type information. Features with run-time semantics—concurrency, exception handling,
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dynamic memory management—require run-time support libraries that are typically furnished by compiler vendors and not by the application developers. These libraries become part of the executable code and, in systems requiring safety or security certification, are therefore subject to the same requirements as the application code. A language having a very large set of built-in libraries may be more problematic than beneficial in this case. Shrinking or eliminating the run-time libraries will ease the certification effort and of course also reduce the run-time footprint. Ada’s pragma Restrictions address this issue in a standardized fashion. The program text specifies which features are not used; the compiler enforces these restrictions; and the program builder can link in simplified run-time libraries that only support the features that are used. A practical example is the Ravenscar Profile: a deterministic tasking subset, defined through a set of Restrictions pragmas,
Untitled-7 1
Software Levels in DO-178B and DO-178C Software Level
Effect of Software Failure
A
Catastrophic failure condition “prevent continued safe flight and landing”
B
Hazardous / severe-major failure condition “serious or potentially fatal injuries to a small number of ... occupants”
C
Major failure condition “discomfort to occupants, possibly including injuries”
D
Minor failure condition “some inconvenience to occupants”
E
“no effect on aircraft operational capability or pilot workload”
Figure 2
The DO178B/178C levels range from E (no effect) to A (catastrophic). Higher levels require more objectives to be met, and for some objectives, meeting them with independence. which is appropriate in embedded systems with size constraints and/or certification requirements. The next version of the language, Ada 2005, was relatively modest in scope. The major enhancements were in the area of “programming in the large.” For example, Java-like interfaces were added to the Object-Oriented Programming features, new syntax was introduced for detecting errors associated with op-
eration overriding, and a mechanism for defining interdependent package specifications was added to the separate compilation facility. Other enhancements included standardizing the Ravenscar Profile, defining several new task dispatching policies for real-time systems (such as Earliest Deadline First), and significantly extending the predefined library (containers, linear algebra and so on).
11:03:44 AM July 2012 | COTS4/26/12 Journal 49
TECH RECON
Common Criteria Security Requirements and EALs Security Functional Components
Security Assurance Components
Security Audit
EAL 1 “Functionally Tested”
Protection Profile Evaluation
Communication
EAL 2 “Structurally Tested”
Security Target Evaluation
Cryptographic Support
EAL 3 “Methodically Tested and Checked”
Development
User Data Protection
EAL 4 “Methodically Designed, Tested and Reviewed”
Guidance Documents
Identification and Authentication
EAL 5 “Semiformally Designed and Tested”
Life Cycle Support
Security Management
EAL 6 “Semiformally Verified Design and Tested”
Tests
Privacy
EAL 7 “Formally Verified Design and Tested”
Vulnerability Assessment
Protection of the TSF
Composition
Resource Utilization TOE Access Trusted Path/ Channels
Figure 3
SARs are grouped into Evaluation Assurance Levels (EALs), ranging from EAL1 (functionally tested) to EAL7 (formally verified design and tested).
Ada 2012 Continues Tradition Throughout its evolution, Ada has been faithful to its original design philosophy: emphasizing source code readability over compactness, detecting errors early, and offering high-level facilities that minimize the conceptual distance between the software structure and the problem space. The latest version of the language, Ada 2012, continues this tradition in several ways, most significantly through a new facility known as “contract-based programming.” The programmer can annotate certain program entities—operations and types—with “contract” information: Boolean conditions specifying requirements such as data relationships that must be satisfied at specific 50
COTS Journal | July 2012
points in program execution. Embedding requirements directly in the program text adds a further check that the program logic does what the requirements say it should do and helps ensure consistency between life cycle data that might otherwise get “out of sync,” and in particular supports some of the traceability objectives in DO-178B and DO-178C. Ada 2012 provides three main kinds of contracts. First are preconditions for operations, which must be true in order for the operation to be invoked. Next are postconditions for operations, which must be true when the operation returns. And the third is Type invariants, which are in effect postconditions that must hold on re-
turn from operations invoked on the type’s objects. An example illustrating these concepts is a package that encapsulates a container type for a table where the element type has an ordering relation, where each table object has a fixed (bounded) size, and where the elements of each table are stored in ascending order and without duplication. The following contracts may be specified for the type and for the insertion and removal operations: The type invariant, which states that the elements of each table object are in sorted order. The insertion operation’s precondition, which states that the table object has room for the new element, and that the element is not already present. Its postcondition, which states that the table object’s contents consist of the old elements together with the new one. The removal operation’s precondition, which states that the element is present, and its postcondition, which states that the table object’s contents consist of the old elements except for the one that has been removed. Note that the type invariant applies to the postcondition for both operations.
Syntax for Contracts Ada 2012 supplies the relevant syntax for expressing such contracts, including universal and existential quantification and the ability for a postcondition to reference a formal parameter’s “old” value (its value on entry to the operation). The quantification forms would be used in the implementation of the various contract functions. The Boolean expressions are checked at run-time, if specified by the programmer—via the argument to an associated pragma. If checks are enabled and the condition fails, an exception is propagated to the caller of the operation. The dynamic nature of the contract checks distinguished Ada 2012 from the SPARK language, which has been used in safety-critical and high-security contexts where formal demonstration of program properties is appropriate. SPARK is an Ada subset augmented with
TECH RECON
annotations for expressing a variety of program properties including preconditions, postconditions, and inter-module data information dependences. For SPARK, these contracts are enforced statically (before program execution) by a tool suite that helps check whether the “theorems” implied by the contracts can be proved based on the program text. The SPARK version of contract-based programming is known as Correctness by Construction. Ada’s contract-based programming features complement the language’s Object-Oriented Programming support and help meet the guidance in DO-332, the Object-Oriented Technologies and Related Techniques supplement to DO-178C. This supplement introduced the concept of Local Type Consistency to address the issue of verification in the presence of inheritance and dynamically bound operations. Verification is simplified if inheritance is only used to implement class specialization relationships, but this imposes
an important requirement on type substitutability: when an operation is overridden, its precondition should not be strengthened, and its postcondition should not be weakened. Ada’s contract syntax makes programs amenable to analysis—possibly by automated tools—that can check whether this requirement is met.
Looking Forward Safety and security are not properties that can be added “after the fact.” To have assurance that software is doing what it is supposed to, and not doing what it is not supposed to, the system needs to be designed from the start with attention paid to reliability and analyzability. An effective programming language will help, by avoiding features with error-prone syntax or semantics, and by making it easier to demonstrate properties such as freedom from runtime exceptions. The ability to define simple language subsets, thus facilitating certification, and to embed contracts in
the program text, thus making requirements explicit, are likewise important. The Ada language, and most notably its latest revision Ada 2012, has met these requirements in a standard way. Although Ada 2012 is new, implementations are already available. One example is AdaCore’s GNAT Pro development environment, which includes comprehensive support for the new language and in particular its contractbased programming features. These features are attracting attention and seeing usage in practice, in particular in the Hi-Lite research project. Hi-Lite is developing a new verification strategy combining formal proofs and testing, and Ada 2012’s contract-based programming features are serving as the foundation. Adacore New York, NY. (212) 620-7300. [www.adacore.com].
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51
SYSTEM DEVELOPMENT Technologies for Navy Modernization
Enabling Rapid Technology Insertion in Submarine Combat Systems Designing a system that’s able to upgrade technologies easily and quickly is more complex than it seems. An understanding of all the nuances of interoperability and integration is critical for success. Gordon Hunt, Chief Applications Engineer Real-Time Innovations
I
n many countries, especially the UK and USA, Open Architecture principles have been successfully applied to submarine combat systems and have reduced costs. However this paper suggests that the current implementations of OA principles have not gone nearly far enough, and have masked the true scope and scale of the system architecture requirements needed to deliver highly interoperable combat systems capable of agilely responding to today’s upgrade programs. These limitations will become exposed as budgets for upgrades are slashed and replaced by ever smaller incremental update programs. The reason is that while system costs have been decreased, especially through the use of open standards and COTS technology, the real costs of systems integration, engineering time and effort, have not been fully addressed. So as update programs get smaller, and non-planned functionality gets added, this cost will become more and more visible and expensive (Figure 1). A relevant and current example is the integration of the unmanned vehicle into the combat system. These vehicles are being architected to be highly recon52
COTS Journal | July 2012
figurable, both in terms of payload and in terms of the control station’s application hosting capabilities. As such they will expose the difference between architectural approaches to submarine combat system design and the true extent to which interoperability in the system has been achieved, as they place demands on the wider combat system of systems to leverage the sensor payloads, the payload data, and even possibly control the variable weapons capability. It’s important to define interoperability in this context and how to achieve it through a datafirst, or data-centric architecture design. By explicitly architecting for interoperability we directly reduce system integration effort and time. A classic case of more thought up front saves a lot of time and effort later in implementation, and especially in update and upgrade programs.
The Integration Challenge Open Architecture has historically focused on the integratability of systems and subsystems, and on commonality and standardization of the hardware, Operating System interfaces, and application design practices.
UPGRADES LOGISTICS MAINTAIN BUILD ARCHITECT SPECIFY COST INTEROPERABILITY SAVINGS
UPGRADES LOGISTICS MAINTAIN BUILD ARCHITECT SPECIFY
COST Differences highlighted in YELLOW Government System Integrator Both Government and System Integrator
Figure 1
When the real costs of systems integration, engineering time and effort are not fully addressed, upgrade costs become more expensive.
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SYSTEM DEVELOPMENT
Glossary of Interoperability-Related Terms Technical Definition
Relation to Interoperability & Commercial Context
Interoperability
Term
The ability of systems, units, or forces to provide services to and accept services from other systems, units, or forces, and to use the services so exchanged to enable them to operate effectively together.
A fundamental prerequisite for an open competitive supply chain. Defines an in-service system capability as much as an initial development capability. It enables integrators to connect multiple components developed by different parties without changing them.
Integratabilty
To be able to form, coordinate, or blend into a functioning or unified whole. To incorporate into a larger, functioning or unified whole.
Makes no claims as to the system interoperability. In extremis any software system is integratable – at a cost. Does not imply any inservice system attribute.
Replaceability
One thing or person taking the place of another especially as a substitute or successor.
While a replaceable subsystem is an asset, it does not imply that the replaced system can be enhanced or altered in any way – in fact it’s more likely it has to remain identical in functionality.
Interchangeability
To put each of (two things) in the place of the other, or to be used in place of each other.
An improvement on replaceability because the subsystems are likely to be able to behave differently based upon the system the subsystem is placed into. But this system context usually has to be predetermined and fixed ahead of development time.
Extensibility
The ability to add new components, subsystems, and capabilities to a system.
There is no limit on the domino effect of change requests needed across the rest of the system to integrate the new subsystem. Nor does it imply that the new system can meaningfully exchange information with any subsystem already in the system.
Componentization
A software package, service or module that encapsulates a set of related functions that communicates via defined interfaces.
A valuable building block in software architectures, but its interfaces are not necessarily openly defined for interoperability and can still end up delivering stovepiped systems.
Modularity
Clarifies the functional blocks of a system, separating capability into modules.
Improves maintainability but makes no claims for interoperability as interfaces can be closed and proprietary.
Portability
The ability of something, usually a software application, to be readily moved from one environment to another, usually due to a common platform.
While this aids reuse of the application it has no association with interoperability of the application with other applications in the environment it has been moved into. It only facilitates integratability with the platform.
Open System
Provides for ‘some’ level of system capability that exhibits interoperability, portability and use of open standards.
There is no standard to which the level of openness is defined, nor to what interoperability relates.
Figure 2
The table pulls together definitions of interoperability and related terms. Sometimes it even dictates an open standards middleware, like DDS (Data Distribution Service from the OMG) as well as an integration strategy. While these are important and necessary steps, they don’t deliver full architectural systems interoperability. These technology choices along with the open architecture configuration actually can implicitly define the structure of the data, the meaning of the data, and how one gets access to the data. Consider for example an architecture with a high performance data bus, lossless, guaranteeing ordered deterministic message delivery. Applications are then built assuming this truth. When integration of disparate systems using data buses and links with different performance characteristics occurs, the applications and functions don’t behave as expected. Typically this is addressed in a brittle fashion in each and 54
COTS Journal | July 2012
every application, for each and every integration exercise. Submarine combat systems were typically fixed in capability and system functions, with performance characteristics that enable most implementation approaches to work. The challenge in submarine systems architecture design is that too often we allow the interoperability and integratibility of elements in the system architecture to be defined by the implementation architecture. These can—and should—be different. The definition of “data” and “interfaces” is too often influenced or set by technology choices. It’s an easy road to go down, and it takes iron hard managerial principles to keep the two separated; such principles can only be adhered to when you have a full understanding of what interoperability is and why it’s so worth striving for. Architecture decisions about content, context and the behavior of data are too
often addressed through technology implementation choices, whereas they need to be rigorously defined outside the context of those technology choices.
Maintaining Systems State A key area of consideration of is deciding where to maintain system state. The moment state becomes a function of one subsystem you start to create a brittle architecture. The issue may not be exposed in the first implementation, indeed it almost certainly won’t be, because the system of systems was designed to operate against known performance objectives from the outset. However as soon as you start to update or upgrade one part of the system, the issue may arise. While in theory your change does not impinge on a certain subsystem, it may impinge on a part of the system state that some other subsystem thinks it’s maintaining
SYSTEM DEVELOPMENT
for itself. Then you end up with state divergenceâ&#x20AC;&#x201D;which is when the problems really start and integration costs start to escalate. A system architected for interoperability addresses this issue by sustaining state at the system of systems level, not within the domain of one specific subsystem. Interoperability has become a loaded term in the defense industry. It has been used and abused, confused and confabulated with many other terms. So before we proceed we should be clear about what the term means. This is best achieved by defining the terms that are often used interchangeably with interoperability when they should not be. Also given that these terms are often used to imply commercial benefits through the adoption of technical attributes, we should also clarify what commercial benefits can potentially be attributed to a system architected with the technical attribute. The table in Figure 2 pulls together definitions from many sources. Unfortunately industry has defined and redefined these terms so many times that no one coherent and agreed definition set exists. This table is to be used to understand RTIâ&#x20AC;&#x2122;s use of these terms.
Interoperability App A from SI 1
App C from SI 3
App B from SI 2
App D from SI 4
SDD
SDD
SDD
SDD
Data Bus System State
Data Bus System State Competition
App A from SI 1
App C from SI 3
App B replaced by SI 5
App D from SI 4
SDD
SDD
SDD
SDD
Data Bus System State
Data Bus System State Innovation
Innovate App A from SI 1
App C from SI 3
App B replaced by SI 5
App Z from SI X
App D from SI 4
SDD
SDD
SDD
SDD
SDD
Understanding IOA The term that is starting to gain resonance with the industry to describe an OA that has been rigorously defined with the objective of interoperability in mind is IOA, Interoperable Open Architecture. IOA is a SoSA (System of System Architecture) based upon open standards, which delivers interoperability among subsystems and applications built and procured at different times. Open Standards allow defense procurement agencies to mandate architecture, not a list of potentially tyrannical suppliers. Arguably, previous OAs did this and still did not achieve interoperability in the supplied systems. Both the MoD and DoD, in independent program developments, identified that the key to achieving this final critical step is to control the data. Both selected to use a system of systems data modeling approach. But that creates a need for a datacentric middleware open standard. Oth-
Data Bus System State
Data Bus System State
SDD = System Data Dictionary
SI = Systems Integrator
Figure 3
A SoSA Data Dictionary (SDD) encapsulates not only the language for speaking between applications and subsystems, but also the semantic meaning of the data. erwise when the first SoS is procured and the tier 1 System integrator uses an OAcompliant Open Standard from supplier X, then Supplier X is hooked into the subsystem supply chain and has to be mandated for the next system procurement. To be an appropriate Open Standard for SoS integration, the standards body has to mandate both a wire protocol (for integratability) and programming interface (for portability). However, while this provides the basis for an interoperable OA, it is still insufficient.
Communication and connectivity may have been openly standardized, but the meaning of the information flow has not. Both the DoD with the UCS program and the MOD with the GVA program are seeking to be able to address this issue by defining a System Data Dictionary (SDD) that defines all the data that flows around the SoS (Figure 3). Included in this SDD is a set of meta-data that defines the semantic information associated with every piece of data. This semantic data contextualizes it or allows July 2012 | COTS Journal
55
SYSTEM DEVELOPMENT
Three Levels of SoSA Interoperability Technical Interoperability
Bits and bytes are exchanged in an unambiguous manner via a set of standardized communication protocols
Syntactic Interoperability
A common data format is defined for the unambiguous sharing of information
Semantic Interoperability
The meaning of data is exchanged through a common information model and the meaning of information is unambiguously defined and shared
Figure 4
Three levels of interoperability are needed to achieve a fully interoperable SoSA.
it to be re-contextualised to the application using it.
An SoSA Data Dictionary The common approach to achieving this goal is to build a SoSA Data Dictionary (SDD) (often referred to as a Data Model), which encapsulates not only the language for speaking between applications and subsystems, but also the semantic meaning of the data—and makes the data’s state explicitly manageable by the infrastructure. For example, let’s take track data. If we take the height information, does one system measure from sea level or just the distance above ground? Is it in km or miles? Is a negative measure valid? But it’s even more than that; like the human mind, a subsystem needs context. Who is telling me this? Where did the data originate? How old is it? The context contributes to the semantic understanding of the data and provides a means to evaluate the veracity and utility of the data. When systems work upon a common data model at this level they can start to become truly interoperable. Some Open Systems programs have been focused on portability of applications. However while they will deliver cost benefits in the first program, they will find that as the functionality of one application or subsystem evolves, or requirements change, or new capability is inserted, then every change has a potential knock-on effect to every Application API and functionality, which can force a cascading domino ef56
COTS Journal | July 2012
fect of costly change requests through the SoS. Instead, advanced programs have recognized that application portability is a goal, but that system-level interoperability is the higher order functionality that is needed. To achieve this they are recognizing that the system state needs to be maintained in the architecture and not within applications or in a specific subsystem. In fact the entire system state has to be made explicit within the OA by every connected functional subsystem or application. This decouples not only the communication between subsystems, but also the state information. Now any subsystem or application can obtain state information from the software infrastructure rather than from another subsystem or application, thereby reducing coupling and breaking stovepipes.
Interoperability in IOA To achieve a fully interoperable SoSA, you need to achieve three levels of interoperability (Figure 4): Technical Interoperability, Syntactic Interoperability and Semantic Interoperability. However even if you enable all these capabilities in a SoS you may not achieve an IOA. There is one more key step required. That is to delegate the syntactic and semantic interoperability to a software infrastructure layer, which can be common across every subsystem. Thus interoperability can now be maintained, like the state, at the SoS level and not between two or more interoperating applications or subsystems. The means of as-
sociating interoperability with data and information flows at the system level is to use a data-centric design approach. This is exactly what UCS identified and is implementing. If your subsystem cannot speak the system language you are not interoperable. The lesson learned by defense procurement using OA over the last 10 years or so is that the interoperability benefits that should accrue to OA don’t happen unless defense procurement also mandates the integration strategy. The traditional ICD/IDD (Interface Control Document/ Interface Description Document) have been shown to be insufficient. The MOD and DoD are starting to define an IOA, and with that they are taking ownership of those parts of the integration strategy that are necessary to ensure the delivery of interoperable SoSs. But surely this is stepping onto the suppliers’ traditional turf? While true, the more forward-looking Systems Integrators are recognizing the economic imperative and are embracing the change. There are several facts the integration strategy has to encompass. There must be a modularization of subsystems and simple update/replacement over time of subsystems. It must allow for innovation within a subsystem and insertion of innovative new subsystems. Meanwhile there must be no “stovepipe” connectivity between any two subsystems. Finally, there should be a capability to “wrap” and integrate legacy subsystems not originally built to the new Open Architecture. Agile and cost-effective integration is enabled by rigorously defining the data in the system. Content, context and behavior have to all be understood and leveragable by the infrastructure itself. State of information is explicit and actively managed at the system level by the infrastructure. With these key tenets in mind you can achieve an Interoperable Open Architecture suitable for rapid technology insertion procurement programs. Real-Time Innovations Sunnyvale, CA. (408) 990-7400. [www.rti.com].
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OpenVPX Plants More Seeds with Products and Program Wins With a third wave of OpenVPX SBC products emerging this year, the critical mass for the technology is beginning to solidify. Program wins and expanding product choices are strengthening the position of VPX as a significant embedded computing architecture choice. Jeff Child Editor-in-Chief
N
o longer perceived as the “new kid on the block,” OpenVPX continues to capture acceptance by military system developers. The OpenVPX spec provides implementation details for VPX payload and switch modules, backplane topologies and chassis products. And most importantly, it provides specific profiles on all the key aspects of an OpenVPX so that users and product vendors now have a clear language defining which OpenVPX are compatible with one another. Over the past couple years, the number of new OpenVPX boards has continued to ramp. Early adopters are now on their third round of VITA 46-compliant products, and new vendors have joined the game with their first VPX products just in the past year. In May, VITA announced the ratification by ANSI of the second edition of the OpenVPX system specification under ANSI/ VITA 65.0-2012. The planned update to the architecture framework adds several profiles for payload, peripheral and switch slots, plus profiles for backplanes to accommodate the InfiniBand protocol and the VITA 67 coaxial connector type. In keeping with the promise to keep OpenVPX a living document, the VITA 65 working group is continually re58
COTS Journal | July 2012
Figure 4
An OpenVPX-based radar subsystem was chosen by Raytheon to support its Patriot Air and Missile Defense System upgrade efforts. viewing profile candidates for inclusion in the OpenVPX specification in order to adapt to changing technology. The working group also clarified and reorganized several existing sections to improve consistency and usability of the specification. VPX is gaining design wins in many data-intensive applications where high throughput and high-compute density (size) are critical factors. Example applications in which VPX systems are expected to be deployed in the coming year include signal and video processing, radar, communications, transportation, and control and management. In support of the VPX family of specifications, VITA members have been rolling out a wide range of products suited to a variety of applications, from backplanes and chassis to 3U and 6U boards of various
types. Nearly 300 products are listed in the VITA product directory under VPX, with more added each month. The products roundup on the next several pages shows representative OpenVPX SBC products. VPX, even in its pre-OpenVPX spec era, enjoyed numerous program wins— many more non-public than public. The architecture has even won some mindshare in legacy military platforms—ones where high data-centric performance needs like those of radar come into play. A particularly noteworthy example was last year’s announcement that Mercury Computer Systems won a contract to deliver OpenVPX-based radar subsystems to Raytheon Integrated Defense Systems, to support its Patriot Air and Missile Defense System (Figure 1) upgrades for Taiwan and Saudi Arabia.
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Broadcom® 53312S Non-blocking Gigabit Ethernet fully integrated switch fabric with 4Mb packet buffer memory IPv4 and IPv6 traffic class support Up to 12 Ports available for external Ethernet communication/connectivity 4 integrated RS232/422/423/485 serial ports
North Atlantic Industries, Inc.
E-mail: ces@ces.ch Web: www.ces.ch
Phone: (201) 818-5900 Fax: (201) 818-5904
XMC board includes PCI Express (Gen. 1, 2 & 3) interface up to x8 Four 200 MHz 16-bit A/Ds 4 GB DDR3 SDRAM Xilinx Virtex-7 VX330T-2 FPGA standard Clock/sync bus for multiboard synchronization Advanced reconfigurability features Optional user-configurable gigabit serial interface Also available in PCIe, OpenVPX, and cPCI formats E-mail: info@pentek.com Web: pentek.com/go/cots71760
TECHNOLOGY FOCUS: OpenVPX SBC Roundup VPX Cards Serve Up Spartan-6 FPGAs
Rugged 3U VPX SBCs Boast Hyperthreading Dual-Core CPUs
3U VPX Board Provides Stratix FPGA and FMC Support
A new series of 3U VPX FPGA boards provides powerful but economical solutions for high-speed processing of algorithms in embedded computing applications. The VPX-SLX boards from Acromag employ a configurable, logic-optimized Spartan-6 FPGA with 150k logic cells to meet demand for higher performance in cost-sensitive applications. A high-throughput PCI Express interface,
OpenVPX provides a unique mix of ruggedness and extreme data throughput— both critical requirements for network-centric communications, high-definition avionics displays, mission and controls systems computers, data concentrators and conditionbased maintenance (CBM) applications. Feeding those needs, Aitech Defense Systems now offers a 3U VPX product family based
FPGAs as processing engines and the FMC mezzanine for expansion make a nice onetwo punch on a VPX platform. With just that in mind, BittWare’s S4-3U-VPX (S43X) is a commercial or rugged 3U VPX card based on the high-density, low-power Altera Stratix IV GX FPGA. The Stratix IV GX is designed specifically for serial I/O-based applications,
generous dual-ported memory for efficient data handling, and 64 I/O lines direct to the FPGA enable rapid data processing and great versatility. Ideal for defense, aerospace, or scientific research; typical applications involve signal intelligence, image processing and hardware simulation. All VPX-SLX models use the XC6SLX150 Spartan-6 FPGA chip with 147,433 logic cells and 180 DSP48A1 slices. There are 64 I/O or 32 LVDS lines connected to the FPGA via the rear P2 connector. A series of AXM extension modules are available to provide additional front-end 16-bit A/D, differential RS-485, CMOS, or LVDS I/O processing channels through a mezzanine connector on the front of the card. FPGA code loads from the PCIe bus or from onboard flash memory. A JTAG and Xilinx ChipScope Pro interface are also supported to simplify development tasks. For extended temperature range operation, models can be ordered with a frame for use in a conduction-cooled chassis. The standard model operates reliably over a 0 to 70°C range in an air-cooled or forced convection system. The conduction-cooled version supports a range of -40° to 85°C. And for system compatibility, Acromag’s 3U VPX cards support a number of VITA 65 slot profiles and conform to VPX VITA 46.0, 46.4 and 46.9 specifications. Pricing starts at $5,200 for an air-cooled version and slightly higher in a conduction-cooled format.
on the low-power Intel Core i7 processor that enables extremely high computing within very compact environments. The new Core i7 can process data using two cores and four threads via Intel’s hyperthreading technology. Based on the latest in OpenVPX serial fabric architecture technology, the new 3U VPX family includes the C870 SBC with a Core i7 dual-core processor configured to run at either 2.53 GHz for high performance, 2 GHz for low power or at 1.33 GHz where ultra low power is required. As standard, the board provides up to 4 Gbytes of DDR3 SDRAM with ECC operating at 1066 MHz, 4 Mbytes of BIOS Flash and 8 Gbytes of onboard SATA SSD for mass storage. Standard onboard I/O is also plentiful with four GbE ports (two 1000Base T, two 1000Base BX/KX), two SATA II ports, four USB 2.0 ports and eight discrete I/O lines as well as two UART ports and HDMI/DVI and CRT interfaces for graphics requirements. As part of the 3U VPX family of products, the OpenVPX-compliant CM870 is a low-power, rugged PMC/XMC carrier board designed to plug into an adjacent 3U backplane slot in order to expand system functionality by enabling the addition of I/O, graphics and SSD memory PMC/XMC cards. Both the SBC and carrier card are single-slot modules and are available in air- and conduction-cooled formats, per ANSI/ VITA 46.0-2007 and ANSI/VITA 65.0-2010 respectively. The carrier card weighs less than 0.7 lbs in both formats, while the air-cooled SBC weighs 0.66 lbs and the conduction-cooled version weighs 0.7 lbs.
creating a completely flexible, reconfigurable VPX board. BittWare’s ATLANTiS FrameWork and the FINe Host/Control Bridge greatly simplify application development and integration of this powerful board. The board provides a configurable 25-port SerDes interface supporting a variety of protocols, including Serial RapidIO, PCI Express and 10 GigE. The board also features 10/100/1000 Ethernet and up to 4 Gbytes of DDR3 SDRAM. Providing enhanced flexibility is the VITA 57-compliant FMC site, which supports 10 SerDes, 60 LVDS pairs and 6 clocks. The FMC (FPGA Mezzanine Card) site provides 8 high-performance SerDes, 60 LVDS pairs, 6 clocks, I2C, JTAG and reset to the Stratix IV GX. The connector is compliant with the VITA 57 mezzanine standard for FPGA I/O, enabling designers to customize the S43X to their individual needs with optional FMC I/O boards. A debug utility header provides 10/100 Ethernet, RS-232 and a JTAG port for debug support. The rear panel VPX interface includes GigE to the FINe, and 15 SerDes channels and 32 LVDS pairs (16 in, 16 out) to the Stratix IV GX FPGA.
Acromag Wixom, MI. (248) 295-0310. [www.acromag.com].
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COTS Journal | July 2012
Aitech Defense Systems Chatsworth, CA. (888) 248-3248. [www.rugged.com].
BittWare Concord, NH (603) 226-0404. [www.bittware.com].
OPENVPX SBC ROUNDUP
Second Gen iCore Processors on 3U OpenVPX SBC
OpenVPX SBC Sports Quad-Core 3rd Gen Intel Core i7 Processors
Core i7 OpenVPX SBC Features Rich I/O
A new 3U OpenVPX high-performance embedded Single Board Computer features the second generation Intel Core processor and 6 series chipsets from the Intel embedded roadmap. The TR 80x/39x from Concurrent Technologies features the enhanced processing and graphics performance of the quad-core Intel Core i7-2715QE processor and the
The i7 series of microprocessors moved from the consumer to the military embedded market faster than generations of Intel architectures before it. With its latest offering, Curtiss-Wright Controls Defense Solutions (CWCDS) has introduced the VPX3-1257, its first OpenVPX SBC designed with the new quad-core 3rd generation Intel Core i73612QE processor. The VPX3-1257 is the latest member of CWCDS’s family of next generation
Intel processors have shed the past hurdles to acceptance among military system designers. Low-power offerings are the main reason. Emerson Network Power has released a set of OpenVPX (VITA 65) SBCs. The iVPX7220 (shown) and iVPX7223 feature the new second generation Intel Core processors and are part of a growing family of VME and OpenVPX/VPX (VITA 46) boards for rugged applications from one of the leaders in embedded computing.
dual-core Intel Core i5-2515E processor while maintaining the power consumption of the previous Intel Core processors. The TR 80x/39x is a 3U OpenVPX processor board providing support for quad-core or dual-core second generation Intel Core processors, up to 8 Gbyte of ECC DDR3 SDRAM, configurable PCI Express fabric interface supporting 1 x8, 2 x4, 1 x4 + 1 x4 at Gen 1 or Gen 2 data rates, dual Gigabit Ethernet or dual 1000Base-BX channels, dual SATA600, single XMC slot, serial RS-232/422/485 port, dual USB 2.0 ports, independent VGA and display port all in a 3U VPX form factor. The TR 80x/39x is available in three temperature grades: 0° to +55°C (N-Series), -25° to +70°C (E-Series), -40° to +85°C (K-Series). For extreme rugged applications the TR 80x/39x is available in VPX-REDI variants (type 1 and type 2): The VPX-REDI Type 1 Conduction-Cooled VITA 47 Class CC4 -40° to +85°C (RCS - Series) and the VPX-REDI Type 2 Conduction-Cooled VITA 47 Class CC4 -40° to +85°C (RCT - Series).
multicore Intel architecture-based SBCs. A variant SBC, the soon to be released VPX31267 will offer an x16 PCIe alternative to the VPX3-1257’s x8 PCIe architecture. The unique VPX3-1267 will provide a high-performance SBC complement to CWCDS’ industry leading VPX3-491 GPU Application Accelerator, the first DSP engine based on the NVIDIA Fermi architecture with 240 CUDA cores. The VPX3491 functions as a coprocessor attached to a host Intel processor board and takes advantage of a high-speed PCIe Expansion Plane. The combination of 3rd generation Intel Core processors, gen2 PCI Express interconnects and 240 NVIDIA CUDA cores raises the performance bar for compact systems for demanding military digital signal processing (DSP) applications such as C4ISR, EO/IR and SatCom. The VPX3-1257 (and the upcoming VPX31267 x16 PCIe variant) is offered in a full range of air- and conduction-cooled configurations. Performance features include 8/16 Gbytes of high-bandwidth DDR3 SDRAM (1333 MHz) and a rich complement of high-speed I/O, including dual Gigabit Ethernet, USB 2.0 ports, DVI, SATA and an XMC site supported with eight lanes of PCI Express (PCIe).
The 6U iVPX7220 and 3U iVPX7223 boards feature the dual-core 2.20 GHz Intel Core i7 2655LE processor with integrated graphics and memory controller, and the Intel QM67 PCH chipset for advanced I/O functionality. The iVPX7220 also supports the quad-core second generation Intel Core i7 2715QE processor. Both of the products are rugged SBCs for extreme environments with extended shock, vibration and temperature ratings, and conduction-cooling. The iVPX7223 and the dual-core variant of the iVPX7220 feature up to 8 Gbytes DDR3-1333, while the quad-core processor variant of the iVPX7220 is designed to support up to 16 Gbyte DDR3-1333 memory. Fabric connectivity includes Gigabit Ethernet to the control plane and PCI Express to the data plane, while the iVPX7220 also offers PCI Express to the expansion plane. The iVPX7220 also offers 4 Gbytes of embedded USB flash and 256 Kbytes of nonvolatile Ferroelectric Random Access Memory (F-RAM). Additional connectivity includes up to nine USB 2.0 ports, five serial ports, five SATA ports, ten GPIOs, three DisplayPort connections, VGA and dual XMC sites for maximum flexibility. An optional 2.5-inch SATA solid-state disk is also available. The iVPX7223 offers 4 Gbytes of embedded USB flash and 256 Kbytes of non-volatile F-RAM. Additional connectivity on this board includes three USB 2.0 ports, two serial ports, three SATA ports, eight GPIO, one DisplayPort connection, one VGA and one XMC site.
Concurrent Technologies Woburn, MA. (781) 933-5900. [www.gocct.com].
Curtiss-Wright Controls Defense Solutions Ashburn, VA. (703) 779-7800. [www.cwcdefense.com].
Emerson Network Power, Embedded Computing Carlsbad, CA. (407) 241-2751. [www.emersonnetworkpower.com/ embeddedcomputing]. July 2012 | COTS Journal
61
OPENVPX SBC ROUNDUP
Xeon Quad-Core 6U VPX SBC Includes Ethernet Switch
3U VPX SBC Leverages Intel 3rd Gen Core i7 CPUs
A rugged, high-performance 6U VPX (VITA 46) SBC features a quad-core Intel L5408 Xeon processor and integrated 10 Gigabit Ethernet switch to support full-mesh backplane data layer interconnectivity for up to eight SBCs integrated into a single chassis. Available in air-cooled or conduction-cooled formats, the CPU-111-10 from Eurotech conforms to the OpenVPX (VITA 65) payload module
A conduction- or air-cooled 3U VPX Single Board Computer (SBC) is based on the third generation Intel Core i7 processor. The XPedite7470 from Extreme Engineering Solutions utilizes the processor’s quad-core technology operating at 2.3 GHz. The 3rd generation Intel Core i7 processors provide higher performance and lower power compared
profile MOD6-PAY-4F2T-12.2.2.4 with four to 2nd generation Intel Core i7 processors. fat pipes (10 GBase-BX4) and two thin pipes Third generation Intel Core i7 processors (1000Base-T). also include Intel HD Graphics with DirectX ploration The CPU-111-10 serves as a suitable open11, supporting OpenGL 3.1 and OpenCL 1.1. your goal architecture building block for next-generation Initially, the boards are available with the k directly command, control, communications, quad-core Core i7-3615QE, 2.3 GHz and the age, the computers, intelligence, surveillance and quad-core Core i7-3612QE, 2.1 GHz. When source. reconnaissance (C4ISR) applications on dual-core versions of 3rd generation Intel Core ology, board (un)manned air / ground vehicles and i7 processors become available, they will be d products shipboard platforms. Standard onboard I/O supported on X-ES products. resources include up to 8x 10 Gigabit Ethernet, Because of the lower power consumption d 2x 1 Gigabit Ethernet, 4x SATA, 2x USB 2.0, of the 3rd generation Intel Core i7 processors, 1x RS-232/485 and 1x VGA video ports. Dual quad-core 3rd generation Intel Core i7 XMC / PMC expansion module sites enable processors are more easily supported additional I/O expansion, including 10G XAUI in conduction-cooled applications. The lanes from each XMC card to the 10G switched XPedite7470 features Intel Hyper-Threading fabric. Offered in both convection-cooled and Technology and up to 8 Gbytes of DDR3-1333 ruggedized variants, the ECC SDRAM in two channels along with nies providing solutionsconduction-cooled now CPU-111-10 is designed for use with ANSI/ 32 Mbytes of boot flash and up to 16 Gbytes ion into products, technologies and companies. Whether your goal is to research the latest VITA 46 1.0” pitch VPX form factor backplanes. of user flash. The board supports an XMC/ tion Engineer, or jump to a company's technical page, the goal of Get Connected is to put you PrPMC site, two x4 Gen2 PCI Express VPX you require for whatever type of technology, Eurotech backplane interconnects and two optional and products you are searching for. Columbia, MD. 10/100/1000BASE-T or 1000BASE-BX Ethernet (301) 490-4007. www.cotsjournalonline.com/getconnected ports. In addition, there are two DVI graphics ports and, optionally, two each USB 2.0 high[www.eurotech.com]. speed ports and SATA 3.0 or 6.0 Gbit/s ports.
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COTS Journal | July 2012
Extreme Engineering Solutions Middleton, WI. (608) 833-1155. [www.xes-inc.com].
3U VPX SBC Improves Throughput While Reducing Thermal Footprint Based on the latest 3rd Generation Intel Core quad core processor technology, the SBC325 brings substantially increased processing performance to customers using the 3U VPX form factor to develop and deploy demanding industrial and mil/aero applications such as command/control, ISR (intelligence,
surveillance, reconnaissance), radar/sonar and signal processing. Provision of either a mezzanine XMC/PMC site for optimum flexibility and expandability or a quad fat-pipe (x16 PCI Express) for highest performance connectivity to GPGPUs makes the SBC325 an exceptionally versatile platform suitable for a wide range of High Performance Embedded Computing (HPEC) applications. The new OpenVPX platform is 100 percent compatible with the previous two generations in GE’s 3U VPXcel3 family. The SBC325 is available in five build levels, from benign (air cooled) to fully rugged (conduction cooled) to provide customers with optimum price/ performance. The board is offered initially with the 2.1 GHz Intel Core i7-3612QE processor featuring Intel Advanced Vector Extensions (Intel AVX), up to 8 Gbytes of DDR3 memory and a solid state disk drive of up to 32 Gbytes capacity. These enhanced capabilities are complemented by a broad range of I/O options including Gigabit Ethernet, SATA, USB and audio.
GE Intelligent Platforms Charlottesville, VA. (800) 368-2738. [www.ge-ip.com].
OPENVPX SBC ROUNDUP
VPX-REDI SBC Enables Network Connectivity Mobile Apps
3U OpenVPX SBC Runs Gen2 Core i7 with EFI BIOS Replacement
The ecosystem for VPX continues to grow as more and more vendors roll out their VPX offerings. Designed to withstand the rigors of mobile and tactical environments, General Dynamics Canada introduces the new rugged and powerful PX3030 VPX-REDI single board computer. The PX3030 harnesses the computing power of the Intel Core 2 Duo Mobile processor and 8 Gbyte RAM to
A new 3U OpenVPX Single Board Computer is based on the Intel second-generation Core i7 processor (Sandy Bridge) and is coupled with the Intel QM67 chipset and up to 8 Gbytes DDR3-1333 with ECC. The IC-INTVPX3a from Interface Concept uses this fully integrated Dual Core processor operating at 2.2 GHz to offer greater performance than its predecessors in the same envelope together with
easily handle today’s demanding network communications, graphics, imagery and video feeds needed for Modern Brigade Combat teams. The board is aimed at applications such as tactical wheeled vehicles including tanks, expeditionary fighting vehicles and Stryker platforms as well as armament platforms such as mobile gun systems and cannons. Other applications include airborne command and control for combat helicopters, aircraft and unmanned aerial vehicles. Features of the board include dual Gbit Ethernet 10/100/1000 connectivity, onboard storage up to 16 Gbytes of SATA NAND flash, six USB 2.0 and four RS-232/422 ports. The card meets VITA 47 CC4 vibration, shock and temperature specs. It’s a 3U module per VITA 48.2 (conduction-cooled), Type 1, 0.85-inch pitch. Compatible software includes Microsoft Windows, LynuxOS, Linux, HHEL, VxWorks and other operating systems.
an unmatched level of I/O bandwidth like PCI Express, GigaEthernet, serial UARTs, GPIOs... for both onboard and off-board functions. In addition, the onboard Spartan-6 Open FPGA is dedicated to customer-specific functionalities, to make the IC-INTVPX3a a suitable response for demanding applications such as radar processing, requiring performance, flexibility and reliability. The IC-INT-VPX3a uses the new UEFI 2.1 firmware interface. EFI is intended as a significantly improved replacement of the old legacy BIOS firmware interface historically used by all PC. The EFI specification was originally developed by Intel and is now managed by the Unified EFI Forum, officially known as Unified EFI (UEFI). This board, OpenVPX compliant, is available in standard, rugged and conductioncooled grades, and operating systems supported include Windows, Linux and VxWorks.
General Dynamics C4 Systems Scottsdale, AZ. (480) 441-3033. [www.gdc4s.com].
Interface Concept Briec de l’Odet, France. +33 (0)2 98 57 30 30. [www.interfaceconcept.com].
3U OpenVPX SBCs Blend 10 Gigabit Ethernet and PCI Express 3.0 Kontron’s 3rd generation of 3U OpenVPX SBCs with latest interface technology is based on the 3rd generation Intel Core i7 processors. They are the first 3U OpenVPX SBCs with native support for 10 Gigabit Ethernet and PCI Express 3.0 to meet and exceed even the highest bandwidth demands of network-centric military, aerospace and transportation applications. The new Kontron 3U OpenVPX SBCs VX3042 and
VX3044 are designed to provide leading-edge performance, power efficiency and bandwidth to long-lifecycle applications. The Kontron VX3042 is based on the 2.2 GHz dual-core Intel Core i7-3517UE processor with configurable TDP between 14W and 25W. It offers up to 16 Gbyte soldered ECC DDR3 SDRAM and one XMC site to enable application specific customization by populating the XMC slot with additional specialized XMCs including I/O, field bus and storage modules. Specifically designed for high-performance embedded computing, the leading-edge Kontron VX3044 integrates the Core i7-3612QE quad-core processor with 2.1 GHz and up to 16 Mbyte soldered ECC DDR3 SDRAM. Combined with its powerful I/O backbone, multiple Kontron VX3044 enable HPEC systems with an unprecedented computing density in the compact 3U form factor. Common to both SBCs are the comprehensive Ethernet connectivity with 10GBASE-KR, 1000BASE-T and 1000BASEBX, eight lane PCI Express gen 3.0 and x1 PCI Express gen 2.0, 1x USB 3.0 and 4x USB 2.0. Storage media can be connected via 2x SATA 3 and 2x SATA 2, both with RAID 0/1/5/10 support. As an option, onboard soldered SATAFlash is available to host OS and application code. Three DisplayPort interfaces provide the increased graphics power of the integrated Intel HD Graphics 4000 to three independent monitors.
Kontron Poway, CA. (858) 677-0877. [www.kontron.com]. July 2012 | COTS Journal
63
OPENVPX SBC ROUNDUP
10 Teraflop ISR OpenVPX Subsystem Leverages GPGPU Technology
Virtex-7 FPGA VPX Module Targets UAV, Radar and Communications
3U VPX SBC Offered in Conduction- or Air-Cooled Versions
GPGPU technology is catching on fast among military system designers. Feeding such needs, Mercury Computer Systems has announced StreamDirect, a highly efficient method for delivering streams of sensor data directly to specialized coprocessors such as general purpose graphics processing units (GPGPUs).
The Model 53760 is a member of the Onyx family of high-performance 3U VPX boards based on the Xilinx Virtex-7 FPGA. A multichannel, high-speed data converter, it is
System developers sometimes like to develop with the convenience of air-cooled computing platforms and switch to conduction-cooled for their deployed solution. Along such lines, Themis’ TSBCi7-300X Single Board Computer employs the Intel Core i7 Arrandale series Dual
StreamDirect increases the efficiency of GPGPU-based embedded computing systems, resulting in a three times performance improvement over previous generation GPGPU systems. StreamDirect increases performance by enabling terabytes of raw sensor data to be processed in real time by optimizing the transfers from the I/O sensors to the GPGPUs, supporting over 10 Teraflops of processing capability in a rugged OpenVPX system. Mercury has previously deployed StreamDirect in a number of programs and it is now being made available in Mercury’s standard product: the 6U OpenVPX GSC6201. The GSC6201 is a carrier card that incorporates industry-standard GPGPU MXMs and is designed to accept those based on the NVIDIA Fermi and recently launched Kepler architectures. Mercury’s StreamDirect enables direct communication of data from the source, such as a sensor input device, into a coprocessor’s memory, such as a GPGPU, without intermediate storage in the CPU. StreamDirect leverages Mercury’s POET/ICS technology and NVIDIA GPUDirect to provide a system-wide communication capability that enables applications such as EO/IR, radar, cyber and electronic warfare to benefit from faster intelligence. StreamDirect for NVIDIA GPGPUs is available now. The GSC6201 is available now in commercial and rugged versions including air- and conduction-cooled configurations.
suitable for connection to HF or IF ports of a communications or radar system. Its built-in data capture features offer an ideal turnkey solution as well as a platform for developing and deploying custom FPGA processing IP. The 53760 includes four A/Ds and four banks of memory. It features built-in support for PCI Express Gen. 3 over the 3U VPX backplane. Based on the proven design of the Pentek Cobalt Family, Onyx raises the processing performance with the new flagship family of Virtex-7 FPGAs from Xilinx. As the central feature of the board architecture, the FPGA has access to all data and control paths, enabling factory-installed functions including data multiplexing, channel selection, data packing, gating, triggering and memory control. The Onyx Architecture organizes the FPGA as a container for data processing applications where each function exists as an intellectual property (IP) module. Each member of the Onyx family is delivered with factory-installed applications ideally matched to the board’s analog interfaces. The 53760 factory-installed functions include four A/D acquisition IP modules for simplifying data capture and data transfer. IP modules for DDR3 SDRAM memories, a controller for all data clocking and synchronization functions, a test signal generator, and a PCIe interface complete the factory-installed functions and enable the 53760 to operate as a complete turnkey solution without the need to develop any FPGA IP.
Core processors, as well as the highly integrated IBEX Peak QM57 Platform Controller Hub (PCH) Chipset. The superior performance of the TSBCi7-300X is due in large part to the CPU’s use of Intel Turbo Boost technology and Intel Hyper-Threading technology, which maximizes performance to match processor workload, as well as the efficient use and high speeds of Mass Storage and buffering, due to the advanced design of the QM57 PCH Chipset. The TSBCi7-300X has a full complement of PCIe buses, configurable as x1, x2, x4, x8 and x16 interfaces. All common serial interfaces are supported, including USB, RS-232, RS422 and RS-485. For Military applications, there is an optional onboard MIL-STD-1553 interface available. A high resolution video graphics interface is standard, allowing use of VGA, HDMI and DVI displays. This board is available in several ruggedization grades from Commercial Air-Cooled to full MIL Conduction-Cooled. The board is a 3U VPX card per VITA 46 and supports VITA 48 VPXREDI and VITA 65 OpenVPX standards.
Mercury Computer Systems Chelmsford, MA. (978) 967-1401. [www.mc.com].
Pentek Upper Saddle River, NJ. (201) 818-5900. [www.pentek.com].
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COTS Journal | July 2012
Themis Computer Fremont, CA. (510) 252-0870. [www.themis.com].
U.S. Air Force photo by Airman 1st Class Laura Goodgame
Extremely Rugged for an Extreme World When lives and the mission are on the lineâ&#x20AC;¦
TCS Space & Component Technology Solid State Drives Â&#x2021; 0DGH ZLWK LQGXVWULDO WHPSHUDWXUH 6/& )ODVK PHPRU\ IRU WKH PRVW extreme conditions Â&#x2021; 5LJLG FLUFXLW ERDUG PRXQWLQJ DQG HQFDVHPHQW IRU VKRFN DQG YLEUDWLRQ UHVLVWDQFH Â&#x2021; +LJK SHUIRUPDQFH VHFXUH HUDVH SURWRFROV IRU TXLFN VDQLWL]DWLRQ RI GDWD Â&#x2021; 0HHWV VWULQJHQW 0LO 67' VSHFLILFDWLRQV Â&#x2021; 'HVLJQHG DQG EXLOW LQ WKH 86$ LQ $6 IDFLOLWLHV HQVXULQJ WKH KLJKHVW TXDOLW\ 7KH ZRUOG·V WRS DHURVSDFH DQG GHIHQVH FRPSDQLHV FRXQW RQ 7&6 IRU WKHLU mission critical systemsâ&#x20AC;¦ VKRXOGQ·W \RX" )RU PRUH LQIRUPDWLRQ VFDQ WKH 45 FRGH call or visit www.ToughSSD.com www.telecomsys.com ©2012 TeleCommunication systems, Inc. (TCS). All rights reserved.
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XMC Links Virtex-6 FPGA to PCIe, SRIO and Gbit Ethernet
Acromag’s XMC-6VLX mezzanine modules feature a configurable Xilinx Virtex-6 FPGA Get Connected with companies mentioned in this article. www.cotsjournalonline.com/getconnected enhanced multiple high-speed memory buffers, I/O and Get with Connected with companies and products featured in thisnumerous section. high-bandwidth serial www.cotsjournalonline.com/getconnected interfaces. The FPGA provides rapid processing and is closely coupled to the serial interconnects to prevent data transfer bottlenecks. 10Gbit Ethernet, PCI Express, Serial RapidIO and Xilinx Aurora implementations are supported. Optional front-panel I/O adds dual SFP ports for Fibre Channel or copper Gbit Ethernet and a VHDCR connector for expanded I/O signal access. Typical uses include simulation, communications, signal intelligence and image processing. Build options include the choice of a Xilinx XC6LX240T or XC6LX365T FPGA device and additional front-panel I/O connectors. Base models are ready for use in air-cooled or conduction-cooled systems. The front I/O option adds two 2.5 Gbit/s SFP connectors and a 36-pin VHDCR connector for JTAG, USB and 22 SelectIO. SelectIO signals are Virtex-6 FPGA I/O pins that support single-ended I/O (LVCMOS, HSTL, SSTL) and differential I/O standards (LVDS, HT, LVPECL, BLVDS, HSTL, SSTL). All models are available with extended temperature range parts suitable for -40° to 85°C operation. The rear I/O supports 8-lane high-speed serial interfaces on both the P15 and P16 XMC ports for PCI Express, Serial RapidIO, 10Gigabit Ethernet, or Xilinx Aurora implementation. P16 also has 34 SelectIO channels and two global clock pairs direct to the FPGA. The P4 port adds another 60 SelectIO and two more global clock pairs. Available in a variety of configurations, models start at $8,250 with upgradeable logic, I/O and operating temperature capabilities.
Acromag, Wixom, MI. (248) 295-0310. [www.acromag.com].
System Provides Contained Portable Cell Network IGEN Networks offers a contained portable cellular network, referred to as Instanet. Instanet was developed to provide a complete wireless communications network on demand where coverage is non-existent or disrupted. The product enables multiple users and multiple methods— voice, text message, broadband data, conference and group calls—and facilitates virtually all broadcast and communication requirements in the most challenging environments. It combines the kind of core network and base station technology that would normally fill a semi-trailer into something you can carry in a backpack. The technology is designed to solve the unmet needs of the massive first responders’ market by delivering a completely secure, weather‐resistant, reliable mobile communications system that covers all emergency and field scenarios.
IGEN Networks, Washington, DC. (888) 244-3650. [www.igen-networks.com].
Low Power Embedded Computer Serves Up 400 MHz ARM9 Artila Electronics has announced the M-606, an ARM9 WinCE 6.0 single board computer in a standard 3.5” form factor. It is powered by a 400 MHz Atmel AT91SAM9G45 ARM9 processor and equipped with 128 Mbyte DDR2 RAM, 128 Mbyte NAND Flash and 2 Mbyte DataFlash. The M-606 provides one 10/100 Mbit/s Ethernet, four USB 2.0 hosts, three RS-232 ports, one RS-422/485 port, audio, microSD socket and LCD TTL/LVDS interface. The advanced internal 133 MHz multi-layer bus matrix and 64 Kbytes SRAM, which can be configured as a tightly coupled memory (TCM), sustain the bandwidth required by LCD with resolution up to 1280x860. The M-606 can drive 5 VDC and 12 VDC backlight of the LCD with up to 3A current output and PWM brightness control.
Artila Electronics, New Taipei City, Taiwan. +886.2.86.67.23.40. [www.artila.com].
Network Processing Card Features Dual Xilinx 7 Series FPGAs Nallatech is now shipping the PCIe-287N, a 7 Series FPGA network processing card that features two Xilinx Kintex-7 FPGAs. The architecture of the PCIe-287N is well suited to a number of applications including real-time network filtering and high frequency trading. The two Kintex-7 FPGAs are directly coupled to four SFP+ ports supporting a range of Ethernet protocols including 1 and 10GbE, SONET and OTN. Each FPGA utilizes multiple independent banks of high-bandwidth, QDR-II+ SRAM and DDR3 SDRAM to support random access and deep storage. A third FPGA provides a PCI Express interface supporting sustained bandwidths up to 5 Gbytes/s.
Nallatech, Camarillo, CA. (805) 383-8997. [www.nallatech.com]. 66
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6U Serves Up Freescale Eight-Core P4080 Processor GetCompactPCI Connected withSBC companies and products featured in this section. Extreme Engineering Solutions has introduced the XCalibur1600, a 6U CompactPCI SBC www.cotsjournalonline.com/getconnected
supporting Freescale QorIQ P4080 processor. The XCalibur1600 is available in conduction- or air-cooled versions. Processor configurations range from P4040 processor with four PowerPC e500mc cores at up to 1.5 GHz all the way up to a P5020 processor with two 64-bit PowerPC e5500 cores at up to 2 GHz. Memory includes up to 16 Gbyte of DDR3-1333 ECC SDRAM in two channels and up to 512 Mbyte of NOR flash (with redundancy). Up to 64 Gbytes of CPU NAND flash is provided with up to 128 Gbytes of SATA NAND flash (optional). I/O includes three Gbit Ethernet ports, x4 PCI Express to XMC sites, up to four SATA ports, two USB 2.0 ports and two RS-232/422/485 serial ports. A XAUI to XMC site is included along with two PrPMC/XMC interfaces.
Extreme Engineering Solutions, Middleton, WI. (608) 833-1155. [www.xes-inc.com].
Rugged Subsystem Provides Fiber Optic Gigabit Ethernet Switching Eurotech subsidiary Parvus has announced tactical fiber optic media support for the DuraNET 1268, a rugged Layer 2 Gigabit Ethernet switch subsystem equipped with ten triple-speed 10/100/1000 Mbit/s ports for connecting IPv4 and IPv6-compatible sensors and computing devices onboard demanding tactical network-centric (un)manned vehicle and aircraft platforms. Designed for rugged extremes, this Size, Weight and Power (SWaP)-optimized solution is well suited for C4ISR technology refresh and situational awareness upgrade programs. To enhance reliability, the unit features no moving parts, a near cable-less internal design, all industrial temperature grade components, EMI filtering, and a sealed dust/waterproof aluminum chassis with isolated MIL-STD-1275/704 power supply that protects against vehicle/aircraft voltage surges, spikes and transients. Gigabit Ethernet interfaces are brought out over rugged MILDTL-38999 connectors on the front panel and now optionally Tactical Fiber Optic Cable Assembly (TFOCA II) connectors on the rear. These optical interfaces are designed to survive the harshest battlefield conditions and were selected by the U.S. ARMY WIN-T program as the standard next generation fiber optic connector for military tactical deployable networks. Managed and unmanaged switch configurations are available for configurable or “plug and play” Gigabit Ethernet LAN applications. The base DuraNET 1268 was previously qualification tested for extreme MIL-STD-461F EMI/EMC and MIL-STD-810G thermal, shock, vibe, humidity, altitude and ingress conditions, as well as RTCA/DO-160G airworthiness tests for low temperature and high altitude operation.
Parvus, Salt Lake City, UT. (801) 483-1533. [www.parvus.com].
Rugged Blade UPS Features High Power Density Acumentrics has announced its powerful and portable Rugged Blade UPS. This double online conversion UPS brings a new level of power density to a wide range of military applications and environments. It provides 1250VA/1000W of AC or DC output power, and is scalable up to 8 kilowatts. The unit is approximately 60 percent lighter than the company’s current 1250VA product at only 28 lbs with the optional Li-ion battery pack and 33.5 lbs with the lead acid battery pack. It is a slim 1U profile at 1.75” high, 17” wide and 21 ¾” deep. The Rugged Blade UPS features a heatsink tunnel design and gasket-sealed enclosure that offers maximum protection for components from the damaging effects of moisture, airborne particles and other contaminates in the operating environment. This product accepts a wide range of voltage and frequencies, while providing clean, reliable AC and DC power as well as seamless input transition from AC shore power to DC power to the battery. The Rugged Blade UPS provides compatibility with global voltages and frequencies. It accepts AC input power from 80 VAC to 265 VAC and 47 to 440 Hz as well as DC input of 22 VDC to 32 VDC volts.
Acumentrics, Westwood, MA. (781) 461-8251. [www.acumentrics.com].
Rackmount Server Does High-Speed Data Recording in 3U Chassis NextComputing has announced a new addition to its Nucleus RM family of compact rackmount systems. The Nucleus RM Capture provides high-speed data recording, processing and I/O capabilities for developers of packet capture, data acquisition and network forensics solutions. The Nucleus RM Capture is a high-performance rack-based storage system in a dense 3U chassis with several unique features not available in other products. NextComputing has engineered the Nucleus RM Capture to fulfill the needs of OEM solution providers and integrators looking for a powerful, reliable and customizable platform for their next high-speed data recording product. Using up to twenty enterprise-class SATA, SAS and Solid State Drives, the Nucleus RM Capture enables very high sustained write-to-disk rates for capturing network traffic at full 10 Gbit/s line rate or higher. And with the migration from 10G to 40G infrastructure, the Nucleus RM Capture allows for easy expansion of I/O and storage as data capture needs increase. Nucleus RM Capture features two 8-core Intel Xeon E5-2600 series processors and up to 512 Gbytes of DDR3 ECC memory. A 1300 W 2+1 redundant power supply is provided with either AC 110/220V or 48 VDC input. The unit has a short-depth and 20-inch form factor in a 3U rack height with front-facing DVD or BluRay optical drive. The removable front bezel is available with high-quality custom branding.
NextComputing, Nashua, NH. (603) 886-3874. [www.nextcomputing.com]. July 2012 | COTS Journal
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Conduction-Cooled Portable Tower Enclosure Supports 3U VPX The selection of OpenVPX products continues to widen, offering many solutions for system developers. Along just those lines, Curtiss-Wright Controls Defense Solutions (CWCDS) has introduced the COOL-CC3, a new 6-slot high-power Get Connected withsystems. companiesThe andnewest productsmember featured of in this section. Engineered Packaging (EP) chassis designed to ease the design of 3U OpenVPX CWCDS’ www.cotsjournalonline.com/getconnected group’s renowned Hybricon family of chassis, this forced-air, conduction-cooled enclosure supports up to 6 slots of 3U 1” pitch payload OpenVPX conduction-cooled cards and rear transition modules (RTMs). Designed to satisfy the most extreme cooling requirements, the portable COOL-CC3 chassis meets stringent ANSI/VITA 65 power and cooling requirements for conduction-cooled 75W 3U OpenVPX modules. The new COOL-CC3, and its 6U variant, the COOL-CC6, complement CWCDS’ air-cooled COOL-XC3 and COOL-XC6 development chassis, providing portable development chassis alternatives for higher power conduction-cooled module-based systems. The COOL-CC3 is designed to speed and ease the integration and development of OpenVPX, VPX REDI and VPX systems and supports the latest ANSI/VITA 46.0, ANSI/VITA 46.10, ANSI/VITA 48.0, ANSI/VITA 48.2 and ANSI/ VITA 65 OpenVPX specifications. The COOL-3CC features power and cooling for up to 75W/slot, a convenient top carrying handle and a 160 mm card cage that supports CWCDS 5-slot and 6-slot OpenVPX backplanes. An 80 mm Rear Transition Module Card Cage meets ANSI/VITA 46.10 and IEEE 1101.11. Highperformance fans and advanced cooling design provide a <55°C chassis conduction rail temperature at 30°C per ANSI/VITA 65 OpenVPX standard. Reduced acoustic noise is provided by built-in fan speed control.
Curtiss-Wright Controls Defense Solutions, Ashburn, VA. (703) 779-7800. [www.cwcdefense.com].
Module Does Strain- and Bridge-Based USB Measurement
COM Express Type 2 Sports Atom Dual-Core Processors
A strain- and bridge-based acquisition module for USB offers highspeed performance in a compact form factor for applications including strain, load, pressure and other bridge-based measurements. The buspowered DT9838 module from Data Translation removes the need for an external power supply and offers 24-bit resolution, direct connectivity and 52 ksamples/s simultaneously sampled analog inputs. It features full-, half- and quarter-bridge completion; up to 10V internal excitation; transducer electronic data sheet (TEDS) smart sensor compatibility; and channel expansion using the RJ45 synchronization connector to synchronize up to four DT9838 modules. Applications such as high-speed mechanical tests, in-vehicle testing and on-site impact measurements can now be done easily with our bridge software.
An entry-level Type 2 Pin-out COM Express module is available with three variants of the new Intel Atom dualcore processor generation, which are manufactured in 32nm technology. The conga-CCA from congatec is available with the Atom N2600 processor with only 3.5W TDP (1M Cache, 1.6 GHz); the Atom N2800 processor (1M Cache, 1.86 GHz) with 6.5W TDP; or the Atom D2700 processor (1M Cache, 2.13 GHz) with 10W TDP and up to 4 Gbyte singlechannel DDR3 memory (1066 MHz). The chipset module, which is based on the Intel NM10, provides improved memory, graphics and display functionalities plus intelligent performance and greater energy efficiency. Four PCI Express x1 lanes, two SATA 2.0, eight USB 2.0 and a Gigabit Ethernet interface enable fast and flexible system extensions. The CongaCCA is priced starting at less than $225 in evaluation quantities.
Data Translation, Marlboro, MA. (508) 481-3700. [www.datatranslation.com].
Congatec, San Diego. CA. (858) 457-2600. [www.congatec.com].
6U VME SBC Third Gen Intel Core Processors and Advanced Security A 6U VME processor board uses third generation Intel Core processors and brings unprecedented performance and power efficiency to the VME form factor while maintaining compatibility with the previous generation product and offering advanced security packages. The VP 91x/01x from Concurrent Technologies supports the dual-core and quad-core third generation Intel Core i7 processors and Mobile Intel QM77 Express chipset along with up to 16 Gbytes of ECC SDRAM. The third generation Intel Core processors offer enhanced graphic and processing capabilities when compared to previous architectures operating within the same power budget. In addition, the processor extends itself to support compute-intensive applications by providing support for OpenCL. Supporting two 100 MHz PCI-X PMC or two XMC x8 PCI Express sites, with expansion for two more PMC sites via an optional expansion carrier, the VP 91x/01x maintains compatibility with the VP 717/08x and VP 417/03x and offers an extensive array of rear I/O functions. VITA 31.1 Gigabit Ethernet on a VME64x backplane enables a tried and tested method of implementing a LAN-based multiprocessor architecture by leveraging readily available Ethernet hardware, TCP/IP software, clustering and other network management tools. The VP 91x/01x is available in three temperature grades: 0° to +55°C (N-Series), -25° to +70°C (E-Series), -40° to +85°C (K-Series); and two ruggedized grades: Ruggedized Conduction-Cooled -40° to +85°C (RC), Ruggedized Air-Cooled -40° to +75°C (RA).
Concurrent Technologies, Woburn, MA. (781) 933-5900. [www.gocct.com]. 68
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Point-of-Load DC/DC Converter in 3A and 5A SIP Packages Murata Power Solutions has announced the OKX
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to-DC converters designed for embedded point-ofload (PoL) applications. Within the OKAMI OKX series there are four models that provide 3A or 5A outputs with either 5V or 12V nominal inputs. The new OKX-T/3 and OKX-T/5 series additions are packaged in a popular space-saving 5-pin single-in-line package (SIP). Measuring just 22.9 x 10.2 x 7.1 mm, these highly efficient converters, typically 94.5 percent at 3.3 Vout, and capable of driving ceramic capacitive loads up to 1,000 uF, have tight load regulation making them ideal for powering applications such as FPGAs and DSPs. The output voltage is programmable from 0.75 to 3.63 VDC for the 5 Vin part, and up to 5 VDC for the 12 Vin part.
Murata Power Solutions, Mansfield, MA. (508) 339-3000. [www.murata-ps.com].
Mini-ITX Mounting Frame Simplifies Cabinet Installation Challenges Logic Supply has introduced the LGX CT100 Open Chassis. Built to secure a wide range of Mini-ITX mainboards and other system components to a single base, the CT100 solves space and installation challenges within larger enclosures such as cabinets and kiosks. The CT100 represents a ready-made, economical mounting solution for larger enclosures. Rather than custom mounting the individual components directly to the enclosure, the CT100 offers a range of mounting provisions and requires only a DIN rail or screw studs for attachment of the plate to the enclosure. And because it secures the system without a full enclosure, engineers have continued, convenient access to the system and its components for easily swapping parts. Moreover, because there is no physical enclosure, many different system configurations are available. The case supports the full range of Mini-ITX and 3.5â&#x20AC;? motherboards and power supply options. Dimensions are 202 x 25 x 260 mm. Logic Supply offers system assembly around the CT100 mounting frame. A configured unit can be built, tested and shipped in a static safe box to the customer where it can be installed effortlessly. The CT100 can also be modified for different mounting needs, additional hard drives, color and logo, and other retrofit requirements. Minimum order quantities with customization are available as low as 100. The LGX CT100 is now available from Logic Supply starting at $39.
Rugged COM Express Card Boasts 3rd Gen Intel Core Processor ADLINK Technology has released its latest Extreme Rugged COM Express module, the Express-IBR, for airborne and vehicle-mounted military computers and human machine interfaces (HMI) applications required to function in harsh environments. The module supports the quad-core and dual-core 3rd generation Intel Core i7 processors and Mobile Intel QM77 Express chipset. The ExpressIBR is ideal for use in environments prone to severe shock, vibration, humidity and extended temperature ranges. The card is compatible with the COM Express COM.0 Revision 2.0 Type 6 pinout, which is based on the popular Type 2 pinout, but with legacy functions replaced by Digital Display Interfaces (DDI), additional PCI Express lanes and reserved pins for future technologies.
ADLINK Technology, San Jose, CA. (408) 360-0200. [www.adlinktech.com].
Logic Supply, South Burlington, VT. (802) 861-2600. [www.logicsupply.com].
System Drives up to Six Monitors from a Single Thin Client Matrox Graphics has announced the availability of Matrox Epica TC20+ and TC48 low-profile multi-display graphics cards for enhanced functionality and workspace in cloud computing environments. Working in conjunction with the Wyse Technology Z90DE7 high-performance thin client, the Epica TC20+ dual-monitor and Epica TC48 quad-monitor cards enable up to six displays from a single system, when combined with Z90DE7â&#x20AC;&#x2122;s two native graphics outputs. The additional monitor space allows for easier on-screen access to one or more single or multi-monitor published desktops or applications in such demanding virtual desktop environments as command and control. Co-validated for use with the Wyse Z90DE7 due to high energy efficiency, low thermal properties and their PCI Express bus interface design, the Epica TC20+ and TC48 graphics cards enable a wide variety of multi-display configurations and options for multi-display thin-client users. The dual-monitor TC20+ supports resolutions up to 1920x1200 (digital) and 2048x1536 (analog) per display and up to four VGA displays via an optional upgrade. The Epica TC48 meanwhile supports up to four DVI or DisplayPort monitors at resolutions up to 1920x1200, resulting in both cases up to an unprecedented six displays from a single thin client. Users can subsequently open one or multiple remote sessions on each display or span a single spreadsheet, for example, across several monitors.
Matrox Graphics, Dorval, Quebec, Canada. (514) 822-6000. [www.matrox.com]. July 2012 | COTS Journal
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PC/104-Plus Dual Channel Gigabit Ethernet Module A two-channel, Gigabit Ethernet LAN module is designed to offer flexible, high-performance networking connectivity for industrial embedded applications. The PPM-GIGE-2 from WinSystems offers self-stacking Connected withEBX companies products in this section. PC/104-Plus form factor. I/O expansion Get on PC/104, EPIC and SBCs and based on thefeatured industry-standard www.cotsjournalonline.com/getconnected This add-in module uses standard RJ-45 connectors to plug into 10/100/1000 Mbit/s networks using standard Category 5 (CAT5) unshielded twisted pair (UTP) copper cables. Two Realtek RTL8110s are the Ethernet controllers used by the PPM-GIGE-2. These onboard Gigabit Ethernet controllers combine a triple-speed, IEEE 802.3-compliant Media Access Controller (MAC) with a triple-speed Ethernet transceiver, 32-bit PCI bus controller and embedded memory. WinSystems also offers a single channel version of this board called the PPMGIGE-1. Quantity one pricing for the dual channel PPM-GIGE-2 is $199 and for the single channel PPM-GIGE-1 $149.
WinSystems, Arlington, TX. (817) 274-7553. [www.winsystems.com].
3U OpenVPX SBCs Provide 10 Gbit Ethernet and PCI Express
2500W Server Power Supply Achieves 80 Plus Platinum Efficiency
A pair of third generation 3U OpenVPX SBCs supports the latest interface technology based on the third generation Intel Core i7 processors. The two 3U OpenVPX SBCs from Kontron have native support for 10 Gigabit Ethernet and PCI Express 3.0 to meet the high bandwidth demands of network-centric military, aerospace and transportation applications. The Kontron VX3042 and VX3044 are specifically designed to provide the appropriate combination of leading-edge performance, power efficiency and bandwidth to longlifecycle applications. The Kontron VX3042 is based on the 2.2 GHz dual-core Intel Core i7-3517UE processor with configurable TDP between 14W and 25W. It offers up to 16 Gbytes of soldered ECC DDR3 SDRAM and one XMC site to enable application-specific customization by populating the XMC slot with additional specialized XMCs including I/O, field bus and storage modules. Specifically designed for high-performance embedded computing, the leading-edge Kontron VX3044 integrates the Intel Core i7-3612QE quad-core processor with 2.1 GHz and up to 16 Mbytes of soldered ECC DDR3 SDRAM. Combined with its powerful I/O backbone, multiple Kontron VX3044 enable HPEC systems with an unprecedented computing density in the compact 3U form factor. Common to both SBCs are the comprehensive Ethernet connectivity with 10GBASE-KR, 1000BASE-T and 1000BASE-BX, eight lane PCI Express gen 3.0 and x1 PCI Express gen 2.0, 1x USB 3.0 and 4x USB 2.0.
TDK has announced that the TDK-Lambda Model HFE2500-48 power supply has now been certified to the 80 Plus Platinum level for redundant, server and data center applications. The 80 Plus performance specification requires power supplies to be 80 percent or greater energy efficient at 20 percent, 50 percent and 100 percent of rated load with a true power factor of 0.90. This makes 80 Plus certified power supplies substantially more efficient than typical supplies. Moreover, the 80 Plus Platinum efficiency level, to which the HFE2500-48 has been certified, is much more stringent. The HFE2500-48 operates with a nominal 230 VAC input and provides a 48 VDC, 2500W output and delivers over 92 percent efficiency at 20 percent load, 94 percent efficiency at 50 percent load, and over 92 percent efficiency at 100 percent load. In addition, this supply exceeds the required power factor of 0.95 at 50 percent load with a measured power factor of 0.97. The TDK-Lambda HFE2500 series is ideal for data center, distributed power, hot-pluggable and redundant power systems. The supplies can operate off a universal AC input of from 85 to 265 VAC, with active PFC, and provides a well regulated DC output of 12V, 24V or 48V. The TDKLambda HFE2500 power supplies are available now and priced from $689 each in quantities of 100 units.
Kontron, Poway, CA. (888) 294-4558. [www.kontron.com].
TDK-Lambda Americas, San Diego, CA. (619) 628-2859. [www.us.tdk-lambda.com].
Power Efficient Dual Core Processing Has Ruggedized Chassis An ultra compact, fanless system is designed around the tiny VIA EPIA-P900 Pico-ITX board. The VIA AMOS-3002 from Via Technologies leverages the digital performance of the combined 1.0 GHz VIA Eden X2 dual core processor and the VIA VX900H media system processor (MSP) on the VIA EPIA-P900 board. The system operates completely fanlessly within a robust chassis measuring 19.7 cm x 10.4 cm x 4.9 cm. The VIA AMOS-3002 has a certified operating temperature of -20째 to 60째C, vibration tolerance of up to 5 Grms and a shock tolerance of up to 50G. The VIA AMOS-3002 is also available with the VIA EPIA-P830 featuring a 1.0 GHz Nano E-Series processor, offering an operating temperature of -20째 to 70째C.
VIA Technologies, Fremont, CA. (510) 683-3300. [www.via.com.tw]. 70
COTS Journal | July 2012
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Lightweight Brick Computers Target Manned/Unmanned Vehicle Comms Technology Advancement Group has expanded
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development to focus on designing custom Mini-Brick computers that are lighter and take up less space in military, industrial and transportation vehicles. Built with a rugged aluminum housing and solid-state technology, the MiniBrick was designed to withstand the varying levels of shock and vibration of physical transport. TAG’s Mini-Brick (SV-10-IA) was engineered with a modular design that offers the option of a single or dual-core Intel Atom processor. The Mini-Brick is designed and manufactured following an intricate engineering process that involves deployable architecture development, mechanical and electrical engineering, thermal simulation and environmental testing.
Technology Advancement Group, Dulles, VA. (800) 824-7693. [www.tag.com].
SBC Family Supports Dual Core Third Gen Intel Core Processors Following the company’s recent announcement of three new rugged SBCs based on quad core 3rd Generation Intel Core processors, GE Intelligent Platforms today announced that dual core versions would also be available. As well as supporting the quad core Intel Core i7-3615QE processor, the SBC625, XVR15 and XCR15 will also be offered with the dual core Intel Core i7-3555LE and Intel Core i7-3517UE processors. These six new platforms—which are 100 percent compatible with their predecessors—will deliver up to 15 percent greater computational horsepower and up to 50 percent improved 3D graphics performance. Some of these new COTS boards offer support for USB 3.0 and provide up to 10x the data transfer throughput of USB 2.0. Power consumption/heat dissipation are identical to those of preceding products, providing attractive performance/watt and making the new boards ideal for environments that are SWaP (size, weight and power) constrained. The SBC625, XCR15 and XVR15—designed for 6U VPX, CompactPCI and VME systems respectively—are available in five build levels, from benign (air cooled) to fully rugged (conduction cooled). These three new SBCs from GE, as well as offering the option of dual- or quad core processors, feature Intel Advanced Vector Extensions (Intel AVX), up to 16 Gbytes of DDR3 memory and a solid state disk drive of 16 Gbytes capacity. These enhanced capabilities are offered together with a broad range of I/O options including Gigabit Ethernet, SATA, DVI, VGA and audio. Provision of two mezzanine XMC/PMC sites enables optimum flexibility and expandability. Supported operating systems include Windows 7, Open Linux, Wind River Linux and VxWorks.
GE Intelligent Platforms, Charlottesville, VA. (800) 368-2738. [www.ge-ip.com].
EBX SBC Delivers Third Generation Intel Core Processor Based on the industry-standard EBX format of 5.75 x 8 inches, the Copperhead from VersaLogic features onboard data acquisition via sixteen analog inputs, eight analog outputs and sixteen digital I/O lines and up to 16 Gbytes of DDR3 RAM. System I/O includes dual Gbit Ethernet with network boot capability, two USB 3.0 ports, ten USB 2.0 ports, four serial ports and HD audio. Dual SATA 3 and SATA 6 interfaces support Intel Rapid Storage Manager with RAID 0, 1, 5 and 10 capabilities (SATA 6 ports only). Flash storage is provided via an mSATA socket, eUSB interface and a Mini PCIe socket. The Mini PCIe socket also accommodates plug-in Wi-Fi modems, GPS receivers, MIL-STD-1553, Ethernet channels and other plug-in mini cards. The Copperhead supports an optional TPM (Trusted Platform Module) chip for applications that require enhanced hardwarelevel security functions.
Versalogic, Eugene, OR. (541) 485-8575. [www.versalogic.com].
CompactPCI-Based Backplanes Offer over 125 Configurations Pixus Technologies offers a wide selection of unique CompactPCI and PICMG-based solutions in various heights, slots sizes and configurations. Pixus offers CompactPCI (cPCI) backplanes in 3U and 6U heights in slot sizes from 2-8 slots, including bridgeable versions to 21 slots. These PICMG 2.0 Rev 3.0-compliant backplanes feature a multi-strip design and typically range from 10-12 layers. There are various configurations for the cPCI backplanes, including 33 MHz and 66 MHz bus rates and 32-bit and 64-bit types. With a modular power design, it is simple for Pixus Technologies to attach power backplanes in a wide array of configurations. Alternatively, Pixus offers versions of the cPCI backplanes with pluggable 47-pin connectors that are compliant to PICMG 2.11 all in one monolithic board. Further, the cPCI backplanes (with or without the pluggable power connectors) can come in vertical or horizontal-mount configurations. There are also several backplanes offered by Pixus that are based on the CompactPCI architecture. This includes PICMG 2.16 (Compact Packet Switching), H.110 (Computer Telephony), CompactPCI Express and CompactPCI PlusIO designs. Other PICMG-based backplanes from Pixus include PCIe, PXIe, MicroTCA and AdvancedTCA. Pixus Technologies was formed by former Kaparel management and acquired the CompactPCI backplane library of Kaparel back in 2011. The company offers customization services for its backplanes, which also include VITA-based architectures. Other related products offered by Pixus include load boards, extender boards, bridges, power boards, power supplies and enclosures. Pricing for the CompactPCI backplanes start under $100, depending on slots, configuration and volume.
Pixus Technologies, Waterloo, Ontario, Canada. (519) 885-5775. [www.pixustechnologies.com]. July 2012 | COTS Journal
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ADVERTISERS INDEX Company Page# Website Acromag..............................................18................................www.acromag.com
Company Page# Website North Atlantic Industries, Inc..............19........................................www.naii.com
AUVSI..................................................47.............................. www.auvsishow.org
One Stop Systems, Inc........................31................... www.onestopsystems.com
Avionics Interface Technologies.........15................................. www.aviftech.com
Pelican Products, Inc..........................17............................ www.pelicanoem.com
Ballard Technology, Inc.......................76............................www.ballardtech.com
Pentair Technical Products.................22......................................www.schroff.us
Chassis Plans, LLC.............................27....................... www.chassis-plans.com
Phoenix International...........................4.................................www.phenxint.com
Cogent Computer Systems, Inc..........51...............................www.cogcomp.com
Pico Electronics, Inc...........................29..................... www.picoelectronics.com
COTS Journal MILCOM2012 Embedded Pavilion.............................57..................www.cotsjournalonline.com
PMC & XMC Boards Gallery...............59...............................................................
dSPACE, Inc........................................21............................. www.dspaceinc.com
RTD Embedded Technologies, Inc.......2.......................................... www.rtd.com
Elma Bustronic.....................................7........................www.elmabustronic.com
RTECC.................................................73......................................www.rtecc.com
Extreme Engineering Solutions, Inc....75..................................www.xes-inc.com
SIE Computing Solutions, Inc.............24....................................www.sie-cs.com
Galleon Embedded Computing...........39.............................. www.galleonec.com
SynQor................................................37...................................www.synqor.com
GE Intelligent Platforms, Inc................5...................................... www.ge-ip.com
TeleCommunication Systems, Inc......65............................www.telecomsys.com
Holt Integrated Circuits, Inc................13.....................................www.holtic.com
WIN Enterprises, Inc...........................45..................................www.win-ent.com
Quantum3D, Inc..................................41........................... www.quantum3d.com
Innovative Integration..........................25......................www.innovative-dsp.com Intelligent Systems Source.................53......www.intelligentsystemssource.com
Index
Kontron................................................33................................. www.kontron.com
ARE YOU
Lauterbach..........................................44.............................www.lauterbach.com
A seasoned embedded technology professional?
LCR Electronics, Inc............................32................................... www.lcr-inc.com Lind Electronics, Inc............................4.......................www.lindelectronics.com
Experienced in the industrial and military procurement process?
Mercury Computer Systems, Inc........35.........................................www.mc.com
Interested in writing as a career?
Microsemi Corporation.......................14.............................www.microsemi.com Nallatech, Inc.......................................30............................... www.nallatech.com Neuro Logic Systems, Inc...................49............................www.nlsdisplays.com
CONTACT SANDRA SILLION AT THE RTC GROUP TO EXPLORE AN OPPORTUNITY sandras@rtcgroup.com
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Coming Next Month Special Feature: VME, VPX and cPCI Target Tech Insertion Needs Among the reasons for VMEâ&#x20AC;&#x2122;s soaring success in military systems is its unique ability to remain backward compatible and facilitate technology refresh in military programs. A new board with the latest and greatest processor, memory and I/O can easily be dropped into a slot that could be decades old. CompactPCI has followed in those same footsteps, but upgrades become trickier as new fabric-based VITA-standard boards enter the mix. Articles in this section examine the current activity in traditional VME and cPCI tech refresh along with the trade-offs involved with mixing those alongside newer VITA architectures like VXS and VPX. Tech Recon:Display and Subsystems for Command Systems and UAV Ground Control Leveraging cutting-edge graphics chips developed for the demanding gaming market, military graphics subsystems are now able to offer complex video and graphics functionality in highly integrated board-level solutions. Command and Control systems have embraced these capabilities and now rank among the most demanding users of these advanced graphics technologies. And UAV Ground Control systems need real-time performance and sophisticated video and graphics processing. This section includes articles that examine the graphics solutions available in CompactPCI, COM Express, PMC, XMC, VME, VPX and other form factors, as well as a product roundup of display interface products. System Development: USB, Ethernet and PCI Express in Military Instrumentation and Test Fading fast are the days when complex military electronics systems required large racks on boards to implement test platforms for them. Now the same test functions can be done on the PC using USB, PCI Express data acquisition and test modules. This section looks at the boards and software solutions driving this trend. Tech Focus: COM and COM Express Boards The Computer-on-Module (COM) concept has found a solid and growing foothold in military embedded systems. COM Express adds high-speed fabric interconnects to the mix. COM boards provide a complete computing core that can be upgraded when needed, leaving the application-specific I/O on the baseboard. This Tech Focus section updates readers on these trends and provides a product album of representative COM and COM Express products. 72
COTS Journal | July 2012
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COTS
EDITORIAL Jeff Child, Editor-in-Chief
Getting It Right with Mobile Devices
A
sk me for a detailed map of any location in the world. Or ask me to capture an image of what I’m looking at right now—and within seconds—upload it where it can be seen anywhere in the world. While those and similar feats are incredibly valuable to our warfighters, today they’re routine to any average smartphone user on the street. That said, like anything in the defense industry, things are more complicated. Security matters, the network matters—reliability, ruggedness … and the list goes on. That’s the frustrating position that defense mobility device technology decision makers are in. The capabilities are there and ubiquitous, but adapting to the special needs of the military and to tactical military use is a tricky road. Last month the DoD released version 2.0 of its Mobile Device Strategy plan. And while much of it is IT focused—and therefore out of the typical realm of COTS Journal—the DoD’s strategy for mobile devices does extend into tactical devices and into the embedded networking infrastructure that the military’s mobile devices connect to. Also the technology and the information access are all part of an overall operational whole. As the document says, “Through faster access to information and computing power from any location, field units can maneuver unfamiliar environments with real-time mapping and date overlay; can identify friendly forces; engineers can take pictures of mechanical parts for immediate I.D. and replacement ordering…” etc. The document classifies mobile devices for its purposes as any handheld device with a display that allows for user input (touch screen or keyboard)—smartphones and tablets being the most popular of these. The strategy encompasses a number of aspects including everything from wireless spectrum management, mobile policies and standards to the development of web-enabled applications and certifications of mobile apps for defense. On the spectrum side, the strategy calls for improving technologies that maximize the use of available spectrum—dynamic spectrum access, smart antennas, multiple access techniques, spectrum sharing and so on. This also means developing mechanisms to quickly transition such technologies into DoD programs of record. On the network side, the strategy calls for expanding its wireless network presence using accepted standards such as IEEE 802.11-based WLAN networks and 3GPP LTE-based 4G commercial cellular infrastructures. For tactical mobile device usage there’s also a need to mitigate the bandwidth limitations associated with current secured tactical communications methods. The document takes a step forward in getting a handle on all the various nuances for different classes of military users of 74
COTS Journal | July 2012
mobile handheld devices. It breaks down the users into three broad categories: enterprise-wide, executive and tactical support. Enterprise-wide means day to day functions of the majority of DoD personnel. Executive refers to information sharing and communications functions required by the highest levels of DoD leaders to make mission-critical decisions. Tactical support meanwhile means the use of mission-critical functions needed by warfighters. The different levels of users may require various levels of classification—sensitive, controlled unclassified info, secret, top secret or above. Also the environments may vary— ship, aircraft, for example—or adversarial territories. Looking at the big picture, it’s a complex set of challenges to serve the different needs of defense users. Presumably JTRS radios will often be used side by side with more consumer-like mobile devices and often on the same networks. It’s interesting though to look at a handheld JTRS radio compared to a cell phone of 5 years ago, and then compare it to a current day smartphone. Your standard iPhone is just as much of a software defined radio as the most advanced JTRS radio. But that doesn’t mean the military could adopt the iPhone as the basis of its entire tactical radio strategy. That would be a stretch given that the iPhone is comprised of a mishmash of components from international companies including some built in Chinese factories. As the strategies for adapting the latest and greatest mobile information technologies take shape, it’s clear that the demand is super high for the users of the technology. Your average 20-year-old is more than familiar with the power of today’s average smartphone. To tell that same 20-year-old that’s joined up to serve in the military that there’s nothing remotely like that available for him or her to use as a warfighting tool…something is wrong with that picture. At one of RTC Group’s RTECC/Milestone events last fall, one of our speakers pressed that very point most urgently. In his presentation U.S. Marine Corps Colonel Gregory T. Breazile, who serves as Commanding Officer for the Marine Corps Communications-Electronics School, emphasized that warfighters can and do use whatever it takes to get their jobs done. When purpose-built military Command and Control (C2) capabilities and communications fail to work properly, our warfighters tap whatever consumer and commercial gear they have available. As the Colonel said, the warfighter wants all this stunning smartphone and tablet technology that we see everywhere and wants it now. His core message to the engineers involved in developing military electronics systems at the event: “Technology creators, you need to get it right.”
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