Por tabl e M e d i c a l : PORTABLE MONITORING by RTC Media

Por tabl e M e d i c a l : PORTABLE MONITORING SYSTEMS

VS.Platform FPGAs

Platform ASICs

FACE OFF

FUEL CELL UPDATE MULTIBAND RF DESIGN ANALYZING POWER SPECS Featured Product: Cadence

May 2007

www.portabledesign.com

MICROCONTROLLERS

Everything but the Kitchen Sink! Complete SoC for High-Precision Portable Instrumentation Applications • High-precision, battery-powered: Portable medical Portable industrial Low-power RF

Features • Up to 120KB Flash/8KB RAM • Ultra-low-power RTC operation • Zero-power brown-out reset • Complete system-on-chip: UART, SPI, I 2C, IrDA OPA-ADC-DMA-DAC-OPA • Voltage-programmable LCD driver • Trace buffer on chip • Easy to use

The World’s Lowest Power MCU With an extended 1MB memory model, the easy-to-use MSP430FG461x MCU series is designed for today’s larger system memory requirements and allows for the development of very sophisticated real-time applications. The extended memory model also enables faster code execution that results in up to 50% reduction in cycles for a full context store and up to 25% when addressing peripherals, Flash or RAM.

Device MSP430FG4616 MSP430FG4617 MSP430FG4618 MSP430FG4619 1USCI

16-Bit Program SRAM Timers Brown-Out (KB) (B) I/O A B Reset 92 4096 92 8192 80 3 7 116 8192 120 4096

SVS

USART LCD Temp ADC Additional UART/SPI USCI1 Segments DMA MPY Comp_A Sensor Ch/Res Analog

160

12/12 (2) DAC12, (3) OPAMP

Price (1k USD) $9.45 $9.95 $10.35 $9.95

channel 1 supports UART/LIN, IrDA and SPI; USCI channel 2 supports I 2C and SPI.

Learn More and Take Home FREE Tools at 430 Day 2007 • FREE, three-hour lunch-and-learn • Register and attend to get your FREE MSP430 Collectors Kit, featuring the eZ430-F2013 tool, AND…

• The Limited Edition eZ430-compatible Capacitive Touch Board, available only at 430 Day!

1842A0

contents

departments

editorial letter dave’s two cents industry news product feature products for designers

cover feature

Peng Lim, MTI Micro Fuel Cells Inc.

wireless communications Multiband RF Requirements Raise 28 Challenges for Mobile Handset Design

MeOH Feed Pump

22 fuel cell update

Rodd Novak, Peregrine Semiconductor

Water Recovery Pump Re-circulation Pump

-100

PE42672

-102

PE42693 Anod

-104

John Donovan

Micro Fuel Cell Update 22

Pump Driver & Logic

Platform ASICs Face off with 18 Platform FPGAs

consumer electronics

Fluidics and Electronics DC/DC Converter

IMD3 (dBm)

6 8 10 44 45

Neat Methanol

-106 -108

28-110 multiband RF design -112 ∆IO -114 Small L

-116 0 iO

60 Large 90L

120

Phase @ 1.76 GHz ∆Q

portable power Meeting Portable Power and 34 System Specifications

34 analyzing power specs

Jinrong Qian, Texas Instruments tr

portable medical

Power for Mobile Patient Monitors 40

Robin Sarah Tichy, Micro Power

40 portable monitoring system

MAY 2007

150

team editorial team

Editorial Director Editor-in-Chief Senior Editor Managing Editor Copy Editor

Creative Director Graphic Designer Director of Web Development

Web Developer

Associate Publisher Product Marketing Manager (acting) Advertising Sales Manager 2/7/07 2:57:41 PM Business Development Manager

Circulation

Chief Executive Officer Vice President Vice President of Finance Director of Corporate Marketing Director of Art and Media

Warren Andrews, warrena@rtcgroup.com John Donovan, johnd@rtcgroup.com Dave Cotton, davec@rtcgroup.com Marina Tringali, marinat@rtcgroup.com Rochelle Cohn

art and media team Jason Van Dorn, jasonv@rtcgroup.com Kirsten T. Wyatt, kirstenw@rtcgroup.com Marke Hallowell, markeh@rtcgroup.com Brian Hubbell, brianh@rtcgroup.com

management team

Untitled-4 1

Marina Tringali, marinat@rtcgroup.com Aaron Foellmi, aaronf@rtcgroup.com Michael Bognacki, michaelb@rtcgroup.com Jessica Grindle, jessicag@rtcgroup.com Shannon McNichols, shannonm@rtcgroup.com

executive management

HOW WELL DO YOU KNOW THE INDUSTRY?

John Reardon, johnr@rtcgroup.com Cindy Hickson, cindyh@rtcgroup.com Cindy Muir, cindym@rtcgroup.com Aaron Foellmi, aaronf@rtcgroup.com Jason Van Dorn, jasonv@rtcgroup.com

portable design advisory council Mark Davidson, National Semiconductor Doug Grant, Analog Devices, Inc. Dave Heacock, Texas Instruments Kazuyoshi Yamada, NEC America

home office

WWW.EMBEDDEDCOMMUNITY.COM

The RTC Group 905 Calle Amanecer, Suite 250 San Clemente, CA 92673 Phone 949.226.2000 Fax 949.226.2050 www.rtcgroup.com

For reprints contact: Marina Tringali, marinat@rtcgroup.com. Published by the RTC Group. Copyright 2007, the RTC Group. Printed in the United States. All rights reserved. All related graphics are trademarks of the RTC Group. All other brand and product names are the property of their holders. Periodicals postage at San Clemente, CA 92673. Postmaster: send changes of address to: Portable Design, 905 Calle Amanecer, Suite 250, San Clemente, CA 92673. Portable Design(ISSN 1086-1300) is published monthly by RTC Group 905 Calle Amanecer, Suite 250, San Clemente, CA 92673. Telephone 949-226-2000; 949226-2050; Web Address www.rtcgroup.com. embeddedcommad_14v.indd 1 PORTABLE DESIGN

11/13/06 5:55:59 PM

Intersil Handheld Products High Performance Analog

We’re Hip to Handheld.

Improve your performance in portable media players with Intersil’s high-performance analog ICs.

Analog Mixed Signal: Amplifiers DCPs Light Sensors Real-Time Clocks RS-232 Interface Sub Ohm Analog Switches Switches/MUXes Video Drivers Voltage References

Go to www.intersil.com for samples, datasheets and support

Intersil – An industry leader in Switching Regulators and Amplifiers. ©2007 Intersil Americas Inc. All rights reserved. The following are trademarks or services marks owned by Intersil Corporation or one of its subsidiaries, and may be registered in the USA and/or other countries: Intersil (and design) and i (and design).

Power Management: Backlight Drivers Battery Authentication Battery Chargers Fuel Gauges Integrated FET Regulators LCD Display Power LDOs Memory Power Management Overvoltage and Overcurrent Protection Voltage Monitors

editorial letter

Microchip Technology CEO Steve Sanghi gave an interview recently in which he claimed that the semiconductor industry “has a historical challenge that its leadership has yet to recognize.” Namely, the industry is maturing and growth rates are slowing down, but the industry is still spending money like a drunken sailor on new fabs, chasing Moore’s Law right into the red. Industry leaders need to change their strategies to match the new realities. Sanghi may be giving his competitors less credit than they deserve. Number three chip maker Texas Instruments stunned the industry when it announced in January that the 45 nm logic process node was as far at it was prepared to go, choosing to rely on fabs starting at 32 nanometers. TI has further refined its strategy since then, deciding to build up its analog production capabilities while shifting logic processes to fabs even faster than previously planned. This “hybrid fab strategy,” as TI calls

The Times They Are A-Changin’ john donovan, editor-in-chief

it, enables it to dodge the very large CAPEX bullet required for smaller geometries. TI’s move will certainly accelerate the trend toward “fab lite” strategies among small to mid-size semiconductor firms. Even Cypress Semiconductor, a firm proud of its process technology, has announced that below 90 nm it will design devices, but rely on fabs to produce them. Spansion— number one or two in the NOR Flash market, depending on the month—has turned to TSMC to produce MirrorBit NOR at 40 nm and below. Partnerships, joint ventures and joint development are also all the vogue—enabling companies to share both fab and R&D costs. Microchip and Intel (as IM Flash) are jointly developing multi-level cell (MLC) NAND Flash to compete with Spansion’s MirrorBit. Renasas and Matsushita are jointly working on 45 nm process development. Toshiba and SanDisk have formed the Flash Alliance, announcing their intention to spend $10B on their newest fab. Elpida and Powerchip are working together as Rexchip, and Hynix and SanDisk are also sharing R&D costs. The European Crolles2 R&D alliance is still alive if

PORTABLE DESIGN

limping along, consisting of just STMicro and Freescale now that NXP has deserted to work with TSMC. NXP’s CEO Frans van Houten has announced his intention to pursue a “fab lite” relationship with TSMC. Rising R&D costs are another burden that semiconductor firms need good growth and profit margins to continue to shoulder, and both are in short supply. At last year’s Semico Summit, van Houten complained that manufacturers— both OEMs and big name ones—were pushing their R&D budgets back onto semiconductor firms. Semiconductor firms typically spend 1520% of their revenues on R&D—compared to Dell, who spends under 5%; they don’t have to spend more, claimed van Houten, since we do their creative work for them. With OEMs it’s even worse. In order to close sales, semiconductor firms increasingly need to supply “reference designs” that pretty much supply everything short of the shrink-wrap for the final product. This isn’t a sustainable business model. Alliances are one answer, going “fab lite”— or even fabless—is another. Fabless Qualcomm competes quite well with TI in 65 nm RF chips, putting the money they would have otherwise spent on capital equipment into R&D. The fabless model pioneered by Altera and LSI Logic is now well proven; those companies, plus Xilinx, Nvidia, Broadcom and Qualcomm all do $1-4B in annual revenues and enjoy good margins. Sanghi raised the prospect of taking public firms private to avoid being punished by investors in the short term for making appropriate longterm investments. Both Freescale and NXP have been bought by private equity firms in the past year, and neither has seen the sky fall on them. Still there’s reason to question just how patient private capital can be. Private investment groups aren’t overly savvy about the notoriously boomand-bust semiconductor industry. If the industry is indeed maturing and margins are no longer stellar, will they sit still through the next downturn, or start restructuring their acquisitions? Will the firms they’ve bought be too highly leveraged to service their debt when margins head south? Semiconductor industry leaders certainly know that change is afoot, and they’re trying to stay ahead of it—or at least not get blindsided by it. But with things in such a state of flux, it will take a while for the shape of the future to become apparent. “There’s something happening here/ What it is ain’t exactly clear.” Sanghi’s right that the semiconductor industry will look a lot different five years from now. But this is an industry that thrives on change, so we’re in for an interesting ride.

Intersil Battery Authentication High Performance Analog

We’re On It.

Intersil’s ISL9206 FlexiHash+TM Engine delivers high-security battery authentication at a low cost. Intersil’s ISL9206 is an easy-to-use, robust, and inexpensive battery authentication solution for 1-cell Li-Ion/Li-Polymer or 3-cell NiMH series battery packs.

64-bit Secret 32-bit Hash Function 32-bit Hash Function

32-bit pseudo-random challenge word from host FlexiHash+ Engine

8-bit authentication code

ISL9206 Key Features: Challenge/response-based authentication scheme using 32-bit challenge code and 8-bit authentication code.

Oscillator

1-Wire Comm Interface

FlexiHash+ engine uses two sets of 32-bit secrets for authentication code generation.

16x8 OTP ROM

FlexiHash+ Engine

POR/2.5V Regulator

Control Register

16x8 one-time programmable ROM memory. Additional programmable memory for storage.

Go to www.intersil.com for samples, datasheets and support

Intersil – Switching Regulators for precise power delivery. ©2007 Intersil Americas Inc. All rights reserved. The following are trademarks or services marks owned by Intersil Corporation or one of its subsidiaries, and may be registered in the USA and/or other countries: Intersil (and design) and i (and design).

Patent pending FlexiHash+ engine consists of four separate programmable CRC calculators. Two sets of 32-bit secret codes are used for authentication code generation. XSD single-wire host bus interface communicates with all 8250-compatible UARTs or a single GPIO pin. Supports CRC on read data and transfer bit-rate up to 23Kbps. 16 bytes of one-time programmable ROM memory for storage of pack information and ID, device authentication secrets, device default settings, and factory-programmed trim parameters.

dave’s two cents

There seem to be very few opportunities to simply relax while on an airplane ride. Recently, I was trying to catch up on my e-mails while traveling by air. I was continually distracted by another passenger’s poor choice in music. The sound was coming from behind me. Eventually, I decided that it was time to turn around and give the passenger behind me a stern look of disapproval. I discovered that the passenger was actually one row back and across the aisle next to the window. Yes, there he was sound asleep with his head resting on the window. The amazing thing was that the passenger had in-ear earphones. It seemed that the sound was coming from his head. I had to ask myself, “How loud do you need the music to be for sleeping?” I was just glad that I was not sitting closer. In defense, I put on my earphones and turned on my own music so I could cancel out this distraction. Repeating this story later at the office brought up related topics. That eventually led to subjects like automatically detecting that the user is asleep

dave’s two cents on ...

Becoming Energy Savvy and shutting down the volume. The conversation eventually ended with the question, “How much energy do we really need?” Just like that passenger with the musical head, it seems that we quite often use more than we need. Energy conservation is a broad topic of discussion. There is constant effort to improve power supply efficiency, system efficiency and portable run-time. These are all good things to accomplish. There is a general impression that a lot of energy is wasted in power conversion for both the operation of electronics and the recharging of batteries. I did a little research in this area and learned a few new terms—and some unfortunate data. One new term was “QUAD,” a unit of energy equal to 1015 BTUs. This unit is used to express the amount of power consumed or generated. In 2005, the U.S. consumed about 100 QUADs of energy from liquid fuels, natural gas, coal, nuclear and other energy sources. This is truly a staggering amount of energy, equivalent to about 23 thousand one-megaton bombs. This is probably enough for the staggering numbers.

PORTABLE DESIGN

The disappointing data is from the estimates reported by TIAX in “Energy Consumption by Consumer Electronics in U.S. Residences.” The energy consumed by consumer electronics is estimated to be 1.6 percent of the total energy consumption of the U.S. So if today’s power conversion efficiency is 50 percent, and we achieve 80 percent efficiency for consumer electronics, we will save about half a percent of our total energy consumption. It is estimated that the U.S. data centers total power consumption is about 1.2 percent of the total energy consumption of the U.S. If we used the same 50 percent to 80 percent improvement for data centers, then we would save about 0.4 percent of our total energy consumption. If we focus in both areas, we might save one percent of our current energy use. Or we might just spend the one percent on more consumer electronics and servers. Energy Star estimates that we could save one billion kilowatt hours of energy if we switched to Energy Star chargers [www.energystar.gov/ index.cfm?c=battery_chargers.pr_battery_ chargers]. However, when we are using about 30,000 billion kilowatt hours per year, this does not change the outcome much. It is difficult to find out what the Internet energy consumption for the U.S. is, but one reference in “Greening of the Internet” by Maruti Gupta and Suresh Singh gave a guess. They estimated that the Internet consumed about seven terawatt hours in 2005 through hubs, switches and routers. This does not consider the cooling and other equipment needed to provide the content for the Internet. I do not associate this energy as consumed when I use my notebook to access the Internet. However, in the end, the total energy used is certainly more than the energy coming from my battery. The same concept goes for my cell phone. I think most users do not consider the energy consumption of a cell phone to be more than the drain from the battery. When you consider the energy needed to provide the service, the total energy increases dramatically. One could argue that service energy will be used regardless of the access from the portable device, but the same can be said for the always powered charger and docking stations. It may sound like I don’t think the energy savings effort for consumer and other electronic equipment is worth it. Quite the opposite. For my two cents, just saving a few percent may make us feel good about the results, but we need to achieve much more. I think it comes down to things that change behavior, and a percent or less does not usually cause a change. The best way to save energy is to not use any more than you need for the job. Anything more is just aggravation for the rest of us, just like old music head. Dave Freeman, Texas Instruments

Low-Power DACs in Miniature Packages 8-/10-/12-Bit D/A Converters Provide Seamless Upgradeability Features • Pin- and function-compatible across resolutions • 2- and 4-channel family with smallest package outline in-class (3 mm x 3 mm LLP) • Rail-to-rail output swing • Power consumption at 3.6V 1 channel, 226 μA (max) 2 channel, 270 μA (max) 4 channel, 485 μA (max) • External reference (2- and 4-channel) • Accepts input clock rates up to 30 MHz over 2.7V to 5.5V • Operates over -40°C to 105°C

Ideal for use in portable, battery-powered applications in industrial, medical, and consumer designs D/A Converter Family Product

Resolution

Channels

Settling Time (typ)

Package

DAC081S101

8-bit

3 μsec

SOT-6, MSOP-8

DAC101S101

10-bit

5 μsec

SOT-6, MSOP-8

DAC121S101

12-bit

8 μsec

SOT-6, MSOP-8

DAC082S085

8-bit

3 μsec

MSOP-10, LLP-10

DAC102S085

10-bit

4.5 μsec

MSOP-10, LLP-10

DAC122S085

12-bit

6 μsec

MSOP-10, LLP-10

DAC084S085

8-bit

3 μsec

MSOP-10, LLP-10

DAC104S085

10-bit

4.5 μsec

MSOP-10, LLP-10

DAC124S085

12-bit

6 μsec

MSOP-10, LLP-10

For FREE samples, evaluation boards, datasheets, and online design tools, visit us today at:

www.national.com/adc Or call 1-800-272-9959

industry news NOR Market Takes a Hit

Research firm iSuppli reports that the NORtype flash memory market experienced a disappointing first quarter, with sales declining by a larger margin than can be attributed to the normal seasonal slowdown. Global NOR flash revenue decreased to $1.9 billion in the first quarter of 2007, down 11.9 percent from $2.2 billion in the fourth quarter of 2006. This compares to an 8 percent sequential decrease in NOR flash revenue in the first quarter of 2006, which represents a more cus-

Custom Battery Pack for Military/Aerospace Market

Nexergy has developed a new portable power system for an unmanned aerial vehicle (UAV) for the military/aerospace market. The unique high-reliability solar and battery-powered system, developed in conjunction with SION Power Corporation, utilizes SION lithi-

Preliminary Ranking of the Top 5 NOR Flash Suppliers in First Quarter (Ranking in Revenue in Millions of U.S. Dollars) Q4 ‘06 Rank

Q1 ‘07 Rank

Company Name

Q1 2006

Q4 2006

Q1 2007

Q4 to Q1 Change

Spansion

$562

$687

$628

-8.6%

Intel

$537

$531

$427

-19.6%

STMicroelectronics

$327

$317

$277

-12.6%

Samsung

$155

$206

$210

1.9%

Silicon Storage Technology

$80

$85

$68

-20.0%

Others

$338

$339

$298

-12.1%

Totals

$1,999

$2,165

$1,908

-11.9%

Source: iSuppli Corp. May 2007

tomary rate of decline during the historically slow first three months of the year. The cumulative revenue for the Top-5 NOR suppliers in the first quarter of 2007 was $1.61 billion, whereas in the fourth quarter of 2006 it was $1.82 billion, and $1.66 billion in the first quarter of 2006. iSuppli cited extreme price pressure on highdensity NOR-type flash, particularly for mobile phones, as the reason for the disappointing results. The firm predicts that while the price pressure will subside slightly in the second quarter, it is expected to persist throughout the year. iSuppli Corporation, El Segundo, CA. (310) 524-4000 [www.isuppli.com].

PORTABLE DESIGN

um sulfur battery cells in a custom battery pack assembly complete with a sophisticated charging circuit developed by Nexergy. The new UAV, designed to eventually stay airborne for months at a time at altitudes exceeding 50,000 feet, operates on solar and battery power only, meaning nighttime flight must be fully battery-powered. In initial test flights, the new Nexergy/SION lithium sulfur portable power system increased the UAV’s battery-operated flight time by 80%. Nexergy was able to optimize both the battery pack and charger during the design phase by taking into account all the requirements for the power source. A big design challenge was developing a “smart” charging system that could provide charge to the battery cells during daylight hours from the solar array, taking into account the unpredictability of solar energy due to factors such as solar panel angle, weather and shifting atmospheric conditions. The engineers had to develop a “step charge” system that would vary the amount of charge based on the power being supplied by the solar cells, leaving enough power to drive the UAV motors. This was essential to the design solution, since the solar panels not only charge the batteries, but also power the motors during the day.

may 2007

Another major challenge was properly balancing the large number of lithium sulfur cells used for the power system. Cell balancing circuitry was added to determine each cell’s capacity and to move charge accordingly, in order to maintain balance within the pack for optimal performance. Nexergy also added multiple safety devices to the battery pack to avoid the possibility of thermal runaway during charge, and to protect against excess current due to a fault in either charge or discharge. Nexergy, Columbus, OH. (614) 351-2191. [www.nexergy.com].

Linux Adoption in the Embedded Market Presents Challenges to Commercial Suppliers

Recently published research by Venture Development Corporation (VDC) indicates increasing adoption of Linux in embedded system development projects. However, suppliers of branded commercial embedded Linux solutions will continue to be challenged in differentiating their Linux solutions from what is publicly available and demonstrating real value in order to maintain a premium for their products and support. According to Stephen Balacco, director of VDC’s Embedded Software Practice, “While some OEMs have chosen to use a commercial Linux solution, more are using and/or expect to use a publicly available Linux solution in future project development. It is this trend that will continue to put pressure on commercial Linux suppliers to provide value above and beyond the growing sophistication of publicly available Linux solutions.” Linux developers can make use of a wide range of publicly existing device drivers, design systems using the latest communication protocols, supplement existing platforms with technology leveraged from the enterprise Linux domain, and enjoy royalty-free production licensing. As internal development teams gain more Linux experience, the threat from OEMs migrating to a “roll-your-own” (RYO) open-source solution is expected to increase faster than adoption of commercial Linux so-

Survey Respondents Current and Expected Future Project Target OS (Percent of Respondents) Current Project, N = 428 Commercial Linux OS 3% Public Linux OS 12%

Non-Linux/ No Formal OS 85%

lutions, especially among larger OEMs who can afford to fund the up-front engineering and maintenance and support of an internal Linux solution. Similarly, smaller OEMs with limited budgets look to open-source Linux as a more sophisticated RYO solution with support from the open source community. From VDC’s perspective, commercial Linux suppliers will need to continue to focus on product development and integration challenges by moving up the value chain from just supplying a Linux OS distribution to offering increased efficiency to the development process by providing high-quality development tools, middleware, Linux platforms and application-level solutions, and other resources that support Linux-based engineering. According to Balacco, “In this way, OEMs can focus on their core competencies, the competition and profitability in bringing new products to market faster, within development budgets.” Venture Development Corporation, Natick, MA. (508) 653-9000. [www.vdc-corp.com].

Next Project, N = 368 Commercial Linux OS 5%

Public Linux OS 20%

Non-Linux/ No Formal OS 75%

Mobile WiMAX Quickly Taking Over WiMAX IC Market

Fixed WiMAX IC vendors have recently redirected their energies toward Mobile WiMAX, particularly in the second half of 2006 and into 2007, according to In-Stat. This represents a dramatic change, as the overwhelming majority of 2005 and 2006 WiMAX chipsets were Fixed WiMAX (802.16d)-compliant, with a very small percentage in 2006 representing chipsets used in early WiBro (mobile WiMAXbased) devices, the high-tech market research firm says. In-Stat reported that Fujitsu, Intel, Sequans and Wavesat—the Fixed WiMAX baseband market leaders in 2005 and 2006—have all have since shifted focus to Mobile WiMAX. Fixed WiMAX radio providers Sierra Monolithics and Analog Devices have also announced Mobile WiMAX solutions. In-Stat further found that: • The global WiMAX chipset market will reach approximately 21 million units in 2011, growing from 300,000 chipset units in 2006. MAY 2007

High-Performance Energy-Efcient Processors for Embedded Market Segments Intel® Core™ Microarchitecture-based Processors for Embedded Designs Balancing embedded design challenges is complex. That’s why Intel now offers a variety of Intel® Core™ microarchitecture-based dual-core processors for a broad range of demanding, low-power embedded applications, including: • Medical Imaging, Communication servers, and Storage subsystems • Interactive Clients (ATMs, point-of-sale devices, gaming); Industrial Control and Automation Systems; and Military, Aerospace, and Government • Infotainment, Print Imaging, Ruggedized Mobile Devices and Tablet PCs Our new Intel Core microarchitecture-based processors deliver high efciency and value, so you can deliver more advanced products to your customers. And, as part of our embedded program, we provide 5 to 7 year life-cycle support for both processors and chipsets to help ensure longevity and stability for your designs and bolster your customers’ assurance in your products.

Intel Core microarchitecture enables new levels of performance and power efciency through a combination of unique processor technology advancements only from Intel.

Choices in Performance, Efciency, and Value Intel’s new embedded processors, all produced on our 65 nm advanced process technology, let you match performance, efciency, and value to your embedded design targets. • Best Performance+: Dual-Core Intel® Xeon® processors (5140,¨ 5130¨ and LV 5148¨) for compute- and I/O-intensive designs. • Best Energy Efciency+: Intel® Core™2 Duo processor T7400¨ for high-performance, low-power applications. • Best Value Performance+: Intel® Core™2 Duo processor E6400¨ for optimal price-performance.

Intel Core microarchitecture enables new levels of performance and power efciency through a combination of unique processor technology advancements only from Intel, enabling you to integrate more capabilities into more power-efcient designs. • Intel® Wide Dynamic Execution: Execution pipelines are 33 percent wider in each core than previous generations, allowing each core to simultaneously fetch, dispatch, execute, and retire up to four instructions. • Intel® Advanced Smart Cache: A multi-core optimized cache that signicantly reduces latency to frequently used data, thus improving performance and efciency by increasing the probability that each execution core of a multi-core processor can access data from a higher-performance, more efcient cache subsystem. • Intel® Smart Memory Access: Improves system performance by optimizing the use of the available data bandwidth from the memory subsystem and hiding the latency of memory accesses. • Intel® Advanced Digital Media Boost: Enables 128-bit Streaming SIMD Extension (SSE/SSE2/SSE3) instructions to be completely executed at a throughput rate of one per clock cycle, effectively doubling, on a per clock basis, the speed of execution for these instructions as compared to previous generations. • Intel® Intelligent Power Capability: Better power-control efciency with micro-gating of processor circuitry, which de-energizes inactive portions of the processor with ner granularity than other processors. + Relative to the three Intel Core microarchitecture products presented in this brochure.

Industry-Leading Embedded Processors In performance/watt, Intel Core microarchitecture-based processors for embedded designs beat competitive offerings, enabling more compute density for demanding applications and higher efciency for long life designs. As shown below, Intel offers better value as measured by performance/watt/dollar. Dual-Core Intel® Xeon® processor LV 5148 Our most powerful embedded processor, the Dual-Core Intel Xeon processor LV 5148,¨ offers outstanding scalability and headroom for added functional density in demanding dual-processor embedded applications. 1.9x better

4.5x better

• •

AMD Opteron* 275 HE2 2.20 GHz, 2 MB cache, 90 nm process, 55 watts, MSRP $10513

Dual-Core Intel® Xeon® processor LV 51484 2.33 GHz, 4 MB cache, 65 nm process, 40 watts, MSRP $504

Efciency1 Perf/watt

“The combination of two Dual-Core Intel® Xeon® processors 5140 with the Intel 5000X chipset in our latest RMS4205000XI Server provides roughly 100% performance improvement over a similar server... for certain imaging applications and also provides PCI-Express x16 connectivity to support high end graphics cards. – Wade Clowes, General Manager, Commercial Segment, RadiSys

Value

Efciency/$

Intel® Core™2 Duo processor T7400 The ultimate in low power and high performance, the Intel Core 2 Duo processor T7400¨ optimally balances energy efciency and performance for your thermally constrained applications. 6.6x better

3.9x better 3.20

• •

1.31 0.82

Single-Core Freescale MPC7447A5 1.42 GHz, 512 KB cache, 130 nm process, 30 watts, MSRP $2456

Intel® Core™2 Duo processor T74007 2.16 GHz, 4 MB cache, 65 nm process, 34 watts, MSRP $411

0.20

Efciency1 Perf/watt

Value

“Intel’s continued innovation in multi-core processors delivers the increased performance and capabilities needed by our customers for distributed real time systems. With the new Core 2 Duo processor platform, Intel has taken another step forward in delivering high performance... that are critical to the digital factory.” – Dr. James Truchard, National Instruments president, cofounder and CEO

Efciency/$

Intel® Core™2 Duo processor E6400 Combining dual-core performance with low cost, the Intel Core 2 Duo processor E6400¨ enables enhanced capabilities in embedded designs without a price penalty. 2.2x better

6.4x better 3.00

0.68 0.30

Efciency1 Perf/watt

• •

0.47

Value

Efciency/$

AMD Athlon* 64 X2 Dual Core 4800+8 2.4 GHz, 2x 1 MB cache, 90 nm process, 110 watts, MSRP $6459

Intel® Core™2 Duo processor E640010 2.13 GHz, 2 MB cache, 65 nm process, 65 watts, MSRP $224

“...The increased performance and lower power consumption delivered by the Intel® Core™2 Duo processor E6400... ideal for these markets.” – Hannes Niederhauser, CEO of Kontron

Value beyond “the Numbers” Intel Core microarchitecture-based processors deliver the best performance and overall efciency of today’s embedded processor offerings. But there’s still more to think about when making the right choice. Consider: • Intel delivers long life-cycle support for both the processor and chipset together, making it the only company that ensures you can continue to support your products with the most advanced platform foundation available. • Intel advanced platform technologies are specically designed into our processors and chipsets to enable you to integrate more capabilities, such as virtualization and manageability, while conserving power. • Intel’s global capacity capabilities provide the agility required to serve your manufacturing demands. • Intel’s world-leading 65 nm process technology enables greater energy efciency and more cores for higher performance, resulting in fewer cooling challenges and greater functional density for all design footprints. • The Intel® Communications Alliance, a community of embedded developers using technologies, processors, products, and services from Intel help you balance price and performance today, with the headroom and scalability for next-generation solutions tomorrow. The Alliance platform solutions approach combines a multi-core architecture with complementary technologies to deliver scalable, power-efcient processing for a wide range of applications. Visit www.intel.com/go/ica to learn more. With high performance, energy-efcient processors available for embedded designs, broad design support, and global manufacturing capacity, Intel embedded processors are your best choice for your next-generation, emerging applications. For more information about Intel’s embedded products, please visit www.intel.com/go/embedded.

Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. See http://www.intel.com/products/ processor_number for details. “Efciency” measured as a simple ratio of SPECint_rate_base2000 performance ÷ Watts consumed by the processor. Products selected for benchmarking against Intel’s were determined based on competing comparable embedded products which had published test results. 2 AMD - SPECint*_rate_base2000 (4 copies) for AMD Opteron* 275 HE (2.2 GHz & 2MB L2) based on published results (December 2005) on PRIMERGY RX220 with 16GB DDR1 using Windows* Server 2003 Enterprise + SP1, Intel C++ Compiler 8.0 Build 20040318Z, Microsoft* Visual Studio* .NET 7.1.3088 (for libraries), MicroQuill SmartHeap Library Version 8.0 http://www.spec.org/osg/cpu2000/results/res2006q1/cpu2000-20051223-05318.html. AMD performance score = 64.3. 3 AMD Opteron* 275 HE conguration and pricing from www.amdcompare.com/us-en/opteron/details.aspx?opn=OSK275FAA6CB and www.amd.com/pricing. 4 Intel - SPECint*_rate_base2000 (4 copies) for Two 2.33 GHz Dual-Core Intel® Xeon® processors 5140 (2.33GHz & 4 MB L2) with Intel® 5000X chipset, 1333 MHz FSB based on published results (May 2006) on Dell PowerEdge* 1950 with 8 x 1GB 667MHz ECC CL5 DDR2 FB-DIMM. Software: Microsoft Windows Server 2003 Enterprise x64 Edition + SP1 (64-bit), Intel C++ Compiler 9.1 for IA32(20060323Z), Microsoft Visual Studio .NET 2003(7.1.3088), MicroQuill SmartHeap Library 8.0 http://www.spec.org/osg/cpu2000/results/res2006q3/cpu2000-20060626-06254.html. Intel performance score = 101. 5 SPECint*_rate_base2000 for Freescale’s MPC7447A* from Apple’s website using a shipped version and PowerPC* optimized compiler from IBM: http://www.apple.com/macmini/. Freescale performance score = 6. 6 Freescale’s “MPC7447A* RISC Microprocessor conguration and pricing from “MPC7447A* RISC Microprocessor Hardware Specications” http://www.freescale.com/les/32bit/doc/data_sheet/MPC7447AEC.pdf and press release 7 SPECint*_rate_base2000 (2 copies) for Intel® Core™2 Duo processor T7400 (L2 Cache 4096KB & 2.167 GHz) performed on Cappel Valley Reference Platform with Mobile Intel® 945GM Express chipset, 667MHz FSB, and 512MB DDR2 SO-DIMM in July, 2006. Software: Linux RedHat 9.0, Kernel 2.4.20-SMP, Intel Compiler 9.0, SPEC CPU2000.1.2. Intel performance score = 44.7. 8 SPECint*_rate_base2000 (2 copies) for AMD Athlon* 64 X2 Dual Core 4800+ (939-pin, 2.2 GHz, & 2 x 1MB L2) based on published results (February 2006) on Gamer’s Edge DualX with 2x512MB, Mushkin DDR400 CL2 using Microsoft* Windows* XP Home Edition SP2, Intel® C++ 9.0 build 20050912Z for IA32, Microsoft* Visual Studio* .NET 7.0.9466 (libraries) MicroQuill Smartheap Library 7.0: http://www.spec.org/osg/cpu2000/results/ res2006q1/cpu2000-20060209-05550.html. AMD performance score = 33.4. 9 AMD Athlon* 64 X2 Dual Core 4800+ conguration and pricing from www.amdcompare.com/us-en/desktop/details.aspx?opn=ADA4800DAA6CD and www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_609,00. html. 10 SPECint*_rate_base2000 (2 copies) for Intel® Core™2 Duo processor E6400 (2.13 GHz & 2 MB L2) based on published results (June 2006) on Precision Workstation 390 with 4x 1024MB 533MHz non-ECC CL4 DDR2 SDRAM using Windows XP Professional SP2, Intel C++ Compiler 9.1 for IA32(20060519Z) Microsoft Visual Studio .NET 2003(7.1.3088) MicroQuill SmartHeap Library 8.0: http://www.spec.org/osg/cpu2000/results/ res2006q3/cpu2000-20060705-06411.html. Intel performance score = 44. Performance tests and ratings are measured using specic computer systems and/or components and reect the approximate performance of Intel® products as measured by those tests. Any difference in system hardware or software design or conguration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. For more information on performance tests and on the performance of Intel products, reference http://www.intel.com/performance/resources/limits.htm or call (U.S.) 1-800-628-8686 or 1-916-356-3104. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to tness for a particular purpose, merchantability or infringement of any patent, copyright, or other intellectual property right. Intel products are not intended for use in medical, life-saving or life-sustaining applications. Intel may make changes to specications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undened.” Intel reserves these for future denition and shall have no responsibility whatsoever for conicts or incompatibilities arising from future changes to them. *Other brands and names may be claimed as the property of others. Copyright © 2006 Intel Corporation. All rights reserved. Intel, the Intel logo, Intel. Leap ahead., Intel. Leap ahead. logo, Intel Core, and Xeon are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. Printed in USA 0906/KAK/OCG/PP/2K Please Recycle 315336-001US ¨

industry news • Intel, the marketing heart and soul of WiMAX technology, has been working for years to build up the WiMAX vendor ecosystem. Consequently, Sprint’s announcement that it would build out a Mobile WiMAX network was a huge boost for the WiMAX movement overall, and has in turn put much pressure on Mobile WiMAX solution vendors. • Mobile WiMAX faces competition from many mobile broadband technology alternatives, such as EV-DO, HSPA, UMB, LTE, and even from Wi-Fi, particularly IEEE 802.11n. • Baseband vendors Beceem and Runcom are leaders in Mobile WiMAX, and are powering some of the early WiBro devices. Other baseband vendors with sights set specifically on Mobile WiMAX include Altair Semiconductor, Amicus, ApaceWave and Redpine Signals. • RF IC providers who have jumped straight into the Mobile WiMAX market include NXP Semiconductors, GCT Semiconductor and AsicAhead.

er exploration ether your goal speak directly ical page, the ght resource. technology, es and products

In-Stat, Scottsdale, AZ. (480) 483-4440. [www.in-stat.com].

Mobile TV Continues Slow, Steady Growth

The worldwide mobile TV broadcast market is expanding, as the number of commercially launched mobile from TVa broadcast networks will exploration into products, technologies and companies. Whether your goal is to research the latest datasheet company, mp to a company's technical page, the goal of Get Connected is to put you in touchgrow with the right resource. Whichever levelin of 2007, reports from 9 in 2006 to 13 gy, Get Connected will help you connect with the companies and products you areIn-Stat. searching The for. unavailability of spectrum is the onnected largest barrier to the launch of more mobile TV services, particularly in Europe, the high-tech market research firm says. Over the next 10 years, as more spectrum is made available, in many cases when analog TV signals are shut off, more mobile TV broadcast services will launch. Another issue limiting the market today is the small number of mobile TV broadcast-enabled handsets available in many markets. Recent research by In-Stat found the following: Get Connected with companies mentioned in this article. • Mobile TV broadcast subscribers will reach www.portabledesign.com/getconnected 125 million worldwide in 2011.

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PORTABLE DESIGN

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• Asia continued to have the greatest number of mobile TV broadcast subscribers through 2006. • Mobile TV broadcast standards are proliferating, with the most recent being those suggested for the ATSC standard. In-Stat, Scottsdale, AZ. (480) 483-4440. [www.in-stat.com].

NAND Flash Market: How Low Will Prices Go?

According to Semico Research, the NAND flash memory market continues to be one of varying market dynamics. In 2006 NAND revenues grew only 9%, down sharply from the double and triple-digit percent increases of previous years. On the positive side, gigabyte shipments continue to increase at the fastest rates in the history of the semiconductor industry, growing at a rate of 217% in 2006. Annual gigabyte growth is projected to continue at 102% CAGR from 2006 to 2011. While slower than in previous years, this growth is still impressive compared with previous growth rates of other memories. “NAND market pricing is like a rubber ball: what goes up must come down, and then back up again,” said Adrienne Downey, senior analyst non-volatile memory at Semico Research Corporation. “Revenue growth was spectacular for several years, but as more manufacturers enter the market, prices fall to profit-erasing levels. Shortages tend to appears when a significant new application hits the market and consumes all the available NAND in sight.”

may 2007

In 2007, that new gadget is the iPhone, set for release in June. Already Apple has released orders for NAND for their 4 GB and 8 GB phones. Apple predicts they will ship millions of iPhones. What does this mean for the NAND market? Semico’s latest flash memory report, NAND Market: How Low Will the Prices Go? Fourth Quarter 2006 Pricing & Forecast provides an in-depth analysis of this dynamic market. NAND prices began to collapse in the fourth quarter 2006. This pricing softness has extended in the first quarter 2007. Semico projects 2007 NAND revenues to be up only 2% over last year while unit shipments will increase 82%. Manufacturers with both DRAM and NAND capacity are in a constant balancing act, trying to switch their capacity to whatever will bring the most demand and the most revenue. According to Downey, over the course of the next five years, NAND will continue to displace existing forms of media as NAND prices are forecasted to continue to decline. She warns that developments in Phase-Change Memory (PCM) could impact the NAND market, however. Semico Research, Phoenix, AZ. (602) 997-0337. [www.semico.com].

SDR Forum Launches 2nd Annual Smart Radio Challenge

At its general meeting today in Dublin, the Software Defined Radio (SDR) Forum announced it is now accepting entries for its second annual Smart Radio Challenge, a worldwide competition in which student engineering teams design, develop and test a software defined radio. Smart Radio Challenge ’08 is open to student teams from all academic institutions interested in SDR and cognitive radio technologies; registration is online and ends June 15. Like the inaugural competition, Smart Radio Challenge ’08 will entail multiple phases, including a qualifying round and one or more development rounds. Each student team must build and demonstrate an SDR that addresses one of four problems—which the

Forum will define by June 30—and supports required target waveform(s). Teams will submit proposals specific to a defined problem by September 30, and those that qualify will be announced at the Forum’s annual technical conference in November. The qualifying teams will then have 10 months to complete and submit their projects. Following the development phase, the SDR Forum will award several prizes, and the winning entries will be demonstrated at the organization’s 2008 technical conference. The ’07

Smart Radio Challenge competition will conclude at the SDR Forum Technical Conference in Denver, Nov. 5-9. Teams previously qualified may compete in successive years for the annual prizes, which include monetary grants to the student teams as well as their university departments. Further information about Smart Radio Challenge ’08, including complete rules and entry form, can be found on the competition website: www.radiochallenge.org/08challenge.html. SDR Forum, Denver, CO. (303) 628-5461. [www.sdrforum.org].

UT Demonstrates Tera-Op Chip

Computer scientists at the University of Texas at Austin have demonstrated a new processor called TRIPS that runs three to four times faster than Intel’s latest multicore processor when both chips run at the same operating speed. TRIPS stands for Tera-op Reliable Intelligently adaptive Processing Systems. TRIPS

is the first of a new class of technology-scalable, power-efficient, high-performance microprocessor architectures called EDGE (Explicit Data Graph Execution) architectures. Developed by a small team at UT Austin on a $15 million grant from the Defense Advanced Research Projects Agency, the TRIPS project has developed technology-scalable processor and memory system technologies for nanoscale microprocessor chips. These technologies are intended to mitigate increasing on-chip communication latency, to provide power efficiency and reduce design complexity for high-performance systems, and to provide programmers with familiar instruction execution models. The TRIPS microarchitecture is fundamentally distributed and composed of tiles communicating via control and operand networks. The implementation includes protocols that enable the disparate tiles to act cohesively as a single high-performance processor. The TRIPS team has also developed a scalable on-chip memory system, which is composed of multiple memory banks connected via a high-bandwidth on-chip network. The memory banks can be configured to operate as a non-uniform cache (NUCA), a novel scalable on-chip memory system developed by the TRIPS team. The TRIPS processor executes code generated by a custom compiler from sequential C or Fortran programs. The compiler includes algorithms designed to create large blocks that can execute atomically, according to the EDGE specifications. In addition, the compiler includes a spatial instruction scheduler, which places instructions to be executed on the distributed execution substrate such that communication latency and contention among the tiles are minimized. University of Texas Computer Science Dept., Austin, TX. (512) 471-7316. [www.cs.utexas.edu/~trips/].

MAY 2007

cover feature platform FPGAs

Platform ASICs Face off with Platform FPGAs Predefine most of a chip and let the customer customize the rest. This is a game that more than one camp can play. by John Donovan, Editor-in-Chief

Portable designs are the center of the target for a lot of vendors who are lucky to place an arrow in the outer ring. The programmable logic camp touts the flexibility, low NRE and fast time-to-market of their products—if only they were smaller and cheap enough to make sense in volume production. ASICs set the benchmark for speed and low unit cost at high volume, at the same time setting new standards for long development timelines and high development costs. When structured ASICs were introduced a few years ago, they promised an excellent combination of speed and flexibility. The trade press seized on them as a direct assault on the programmable logic industry, who in turn regarded them as the dying gasp of the ASIC camp. Now that the hype has died down, a lot of people have written off structured or platform ASICs, since they haven’t lived up to their initial expec-

PORTABLE DESIGN

tations—because they were set impossibly high to start with. Still, the rise of the structured ASIC market addressed a number of problems with ASICs, including a rise in development costs for standard cell and SoC designs; lack of performance and gate count from the gate array camp; lack of expertise in designing increasingly complex; and the high cost of FPGAs for high-volume consumer devices. Structured ASICs brought a lot of designers facing those problems back into the ASIC camp. Semico Research estimates that revenue for the structured ASIC market will grow from $542.9M in 2006 to $1.53B in 2011, a CAGR of 23%. Unit volumes are forecast to grow from 34.7M in 2006 to 104.2M units by 2011, a CAGR of 24.6% (Figure 1). There is still a lot of life left in structured ASICs, much of which makes sense in portable designs.

Structured ASIC is an umbrella term that covers a broad range of different approaches. The terms “structured ASIC” and “platform ASIC” are often used interchangeably. Gartner Dataquest VP Brian Lewis prefers “platform ASIC,” which he defines as an ASIC in which more than half of the chip is predetermined and preverified using embedded IP; the customer can then customize only a portion of the chip. Lewis divides the structured ASIC market into three segments: array-based platforms, cell-based with PLD core platforms and cellbased platforms. The user might customize a structured ASIC with a gate array block, requiring only a few custom mask layers; with PLD core; or with a cell-based block where all mask layers are custom. Most structured ASIC to date have been array-based platforms, including those from LSI logic, NEC, Fujitsu and Toshiba who were early entrants (and in the case of LSI and NEC, recent exits). Platform ASICs have a short history if a long lineage. Around 1980 the ASIC market gave rise to gate arrays, standard cells and programmable logic (Figure 2). By the mid90s enough IP had migrated onto standard cell ASICs that they became systems on a chip (SoCs). Since then the SoC market has generated a variety of variants including programmable SoCs, performance SoCs, value SoCs and platform SoCs, the latter being basically a complex platform ASIC. According to Rich Wawrzyniak, senior ASIC/SC analyst at Semico Research, “Structured ASICs take some of the best features of gate arrays and standard cells and put them together. For gate arrays the first three or four layers on the wafer are done, and then the customer comes and customizes it from there. From the gate array side they are offering predefined functions, but the customer does have the ability to include some third-party IP, so they’re not entirely dependent on getting the functions from the vendor. In general,” continued Wawrzyniak, “the advantage of a structured ASIC over a gate array is higher performance and larger gate count. The advantages over standard cell are fairly low NRE and the much shorter design cycle time.”

But every design decision involves tradeoffs. “The disadvantages are the fact that the transistor count for a structured ASIC is much higher than for standard cell. There may be four to five transistors per gate for a standard cell and as many as 20 to 25 transistors per gate for a structured ASIC. That puts some limitations on the size of the part you can make, on the gate count, and how much you can reduce the cost of the silicon. Structured ASICs fit in between programmable logic and standard cell.” What are the differences between a structured ASIC and a platform ASIC? According to Wawrzyniak the answer is “Marketing.” “When someone says they have a platform ASIC it means they’re making a commitment to a particular architecture while allowing customers to bolt things onto it. If they have already been in markets with ASSPs targeted at specific applications, realistically they’re just offering the customer a faster and less expensive way to do the same thing.” What they’re offering is essentially a fairly customizable ASSP. How much IP is typically found in a platform ASIC, and how much can be customized? Gartner defines the structured ASIC as an ASIC with over 50% of its structure predefined. Wawrzyniak prefers a range. “Typically people put in a bus structure and some basic housekeeping functions and leave the rest to the customer to define,” he claims. Probably 40 to 60% is already predefined that way. But going higher involves a lot of trade-offs. What if the customer comes along with a design that requires 70% of the chip to be memory? In that case a platform ASIC probably wouldn’t work. At the high end is NEC’s multimedia platform ASIC EMMA, where fully 90% of the chip is predefined, leaving customers only 10% to add their secret sauce. EMMA is highly specific to video applications and hard codes a lot of that functionality into silicon. Emma is basically an ASSP that is subject to a certain amount of customizing via the top few metal layers at the tab.

What Is a Platform FPGA?

Not to be outdone, the programmable logic camp pushed back with platform FPGAs. Xilinx introduced its HardWire product in the mid-90s. Hardware was an early attempt at a structured

ASIC: take a programmable fabric, strip out all the programmability and deliver something smaller and less expensive. HardWire was too far ahead of its time, and died a few years later. First, at 10,000 gates, you couldn’t do much with programmable logic in the mid-90s, certainly not put your whole system on a chip. Second, ASIC NREs in those days were in the $50-$100,000 range, whereas today mask costs run well into the millions of dollars. In 2001 Altera introduced HardCopy, its attempt at a structured ASIC. HardCopy removes all programmability from the FPGA; it’s all masked programmed. Since most of the silicon in an FPGA is consumed by programmable interconnect, removing it can substantially reduce the size of the chip and therefore cost and power consumption. The problem with leaving some programmability in a structured ASIC, according to Paul Hollingworth, director of the HardCopy group at Altera, is that you wind up combining two essentially incompatible technologies, which instead of delivering the best of both worlds often wind up delivering the worst. He uses the analogy of the amphibious car, which invariably results in an inferior car and a worse boat. The downside to the HardCopy approach is that you give up all the flexibility that you enjoyed with the FPGA. This can be a limitation in portable applications, particularly where designers are dealing with codecs or RF interfaces that may change over a short period of time. You can either stay programmable until you are sure that the functionality is locked down, or you can embed a processor in the structured ASIC and hope to handle any changes via software. HardCopy, like hard wire, started off as an FPGA migration product—a way to retain FPGA sockets longer as production ramped up. With the introduction of HardCopy II in 2005, Altera started stressing the ease of migration from FPGAs to structured ASICs, without the need to maintain separate RTL flows, one for FPGA prototypes and one for the ASIC. HardCopy II chips are customized at Altera’s fab, where the top three metal layers are added. “The unique thing about HardCopy is the ability to go from one domain to another— from the programmable domain, which is perfect for solving design problems—where you MAY 2007

cover feature

What Is a Platform ASIC?

cover feature

care about time-to-market, flexibility and the ability to do rapid verification—to the production domain, where you care about cost, power and performance.” For a few hundred thousand gates, there’s probably little difference in cost between an FPGA and an ASIC. But as soon as you get up to a square inch of silicon—the size of larger FPGAs—then obviously you can’t go

figure 1 Evolution of the ASIC Market Programmable SoC

Performance SoC System on a Chip

Standard Cell

Custom ASIC

er exploration ether your goal speak directly ical page, the ght resource. technology, es and products

Value SoC

Application Specific Standard Products (ASSP)

Customer Owned Tooling Gate Array

Programmable Logic Device (PLD)

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companies providing solutions now

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Simple/ Complex PLD

System on a Programmable Chip

FPGA

1974

Platform SoC

1997

1999

2000

Field Programmable Analog Array 2001

2002

Worldwide Structured ASIC Unit Forecast by Region

exploration into products, technologies and companies. Whether your goal Semico is to research the latest datasheet from a company, (Courtesy Research) mp to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of gy, Get Connected will help you connect with the companies and products you are searching for.

onnected

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with companies mentioned in this article. www.portabledesign.com/getconnected

into any kind of production environment. “If we can shrink this by a factor of 7—which we can—then suddenly you have something you can take into volume production.” HardCopy chips are indeed smaller, faster and less power-hungry than the FPGAs from which they stem, but they do involve production delays while they’re fabricated, and non-trivial NRE charges. They may run much faster than your prototype, which can be a blessing or a curse. If the latter, you can add delay buffers, though that isn’t exactly an elegant solution.

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Xilinx’s answer to HardCopy is EasyPath. Having been burned once by going the structured ASIC route, Xilinx took another approach to the migration problem. According to Patrick Dorsey, EasyPath product line director at Xilinx, “EasyPath is identical to a standard FPGA. As opposed to another approach where you may have to convert to another process technology or tool methodology [read: HardCopy], this approach takes all of the intellectual property in the FPGA and guarantees that it will work the same in an EasyPath device.” How is this done? “It’s the same chip. What we do is optimize our back-end test capabilities. We convert their design to this test program. Then we depend on the redundancy of the FPGA to ensure that all of the devices on the wafer that are usable for their custom device are usable for the customer.” Then they asked the customer to lock down the routing. “We lock down the routing and those resources that they actually use, and we test those resources in the part.” The rest of the chip can still be programmed for other uses. How does this save money for the designer? “The cost goes down since our yields go dramatically up, since we no longer have to test all of the resources in the device. Typically a programmable logic device is upwards of 60 to 70% routing resources. Once you lock down those running resources and pick just one path, you are using a lot less of the die area to complete your design.” EasyPath essentially allows Xilinx to resell chips that they would otherwise have to throw out because of production defects. They can take your design, instantiate it in the known good parts of the chip and sell it back to you at a considerable discount. The result is still an FPGA, so the part won’t exhibit the dramatic drop in size and power consumption of a HardCopy structured ASIC. On the other hand, the turnaround time and upfront NRE are considerably lower, and the lower risk argument has merit.

Whither Platform ASICs?

The recent exit from the structured ASIC market of LSI logic and NEC has made some designers cautious about the future of the technology. “The market is still growing fairly fast,

cover feature figure 2 Worldwide Structured ASIC Unit Forecast by Region

40 35 30

Total M Units

25 M Units

but the growth is coming from a very small base,” advises Semico’s Wawarzniak. “In order for large companies like NEC and LSI to participate in a market, it’s got to be a certain size, and they’ve got to be assured of getting a certain share of that market in order to justify the investment. And I think in their case the structured ASIC market was just too small for them to satisfy those goals, so they decided to exit.” Warzniak continued, “I really don’t think there’s any fundamental problem with the business model or the value proposition for structured ASICs, and I think that smaller companies can be successful in this market. Altera’s HardCopy, if it were a separate company, is probably about the right size to be successful in the structured ASIC market.” The same holds true for AMI, eASIC, Faraday and ChipX, all of whom are active in this market. Designers of portable devices—the vast majority of whom use FPGAs for prototyping— would do well to consider from an early stage the benefits, costs and strategies for either designing for or converting to a platform ASIC for at least the early stages of their production run. If your design is wildly successful, at least that strategy will buy you the time—not to mention the money—to develop a custom ASIC.

20 15 10 5 0

2002

2003

2004

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Americas

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2007*

Asia Pacific

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2009* Japan

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ASIC Market Evolution (Courtesy Semico Research)

Altera Corporation San Jose, CA. (408) 544-7000. [www.altera.com].

Faraday Technology Corporation Sunnyvale, CA. (408) 522-8888. [www.faraday-tech.com].

AMI Semiconductor Pocatello, ID. (208) 233-4690. [www.amis.com].

Gartner Dataquest Stamford, CT. (203) 964-0096. [www.gartner.com].

ChipX Santa Clara, CA. (408) 988-2445. [www.chipx.com].

Semico Research Corp. Phoenix, AZ. (602) 997-0337. [www.semico.com].

eASIC Santa Clara, CA. (408) 855-9200. [www.easic.com].

Xilinx San Jose, CA. (408) 559-7778. [www.xilinx.com].

MAY 2007

consumer electronics fuel cell update

Micro Fuel Cell Update Micro fuel cell technology is making inroads into commercial markets, and promises to provide solutions for manufacturers and end users alike. by Peng Lim, President and CEO, MTI Micro Fuel Cells Inc.

The strong incentive for the development of micro fuel cell technologies has been driven in large part by the maturation of the lithium-ion battery. Further gains in lithium-ion technology for portable electronics will be incremental at best, and any achievable benefits may be outweighed by the decreasing stability, integrity and relative safety of the power source with increased energy output. The disparity in device and power source evolution presents a key challenge to manufacturers, and it will become increasingly relevant. New, cost-effective design possibilities have emerged that are enabling manufacturers to create more sophisticated portable devices for the mass market, capable of a widening array of features—and these features are requiring more power. As a result, consumer habits are changing, and the mobile workforce is constantly seeking to increase productivity on the go.

PORTABLE DESIGN

Nonetheless, today’s mobile devices are still not completely mobile. At the end of the day, an electrical outlet is needed to plug in and recharge. When traveling or working in the field for extended periods of time, or in areas with no electricity, finding an outlet is no more convenient than bringing extra batteries. Direct Methanol Fuel Cell (DMFC) technology promises to eliminate this issue by providing days— not hours—of power at any point in time and location, and providing an instantaneous recharge with methanol fuel cartridges. Micro fuel cell technology, while still in its infancy, is expected to realize energy density gains as efficiencies increase through design advancements. Engineers and developers at the forefront of DMFC technology, including MTI Micro, have been working on addressing the key design challenges with DMFC systems, which once overcome, may enable their widespread commercialization for use with portable electronic devices.

Cool & Compact 2A Charging Efficiency vs Battery Voltage 100

SENSE

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LTC4001

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Higher Efficiency = Less Heat

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EN PROG

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4.2

VBAT (V) 9mm 14mm Actual Size Demo Circuit

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Features

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consumer electronics

Key Design Challenges

The need for both methanol and water to be present at the anode side of the DMFC has implications on the overall size and power output of the system.

figure 1 Neat Methanol

Fluidics and Electronics DC/DC Converter

Fuel Cell Anode In

Cathode Ambient Air

Pump Driver & Logic MeOH Feed Pump

ing and pumping water from the cathode back to the anode. However, carrying water with the fuel severely reduces the energy density of the system because water does not possess energy content. This simplified system holds little potential to meet the ever increasing power demands of evolving portable electronic devices, and may not compete favorably against advanced lithium-ion batteries either. Size and power density are compromised by both of the aforementioned designs, however, both characteristics are integral to the value proposition of DMFC technology. To address these priorities, MTI Micro has focused on two key imperatives. The first is to minimize the dilution of fuel within the tank, and the second is to maximize the amount of fuel within the cell.

Water Recovery Pump

One of the first

Re-circulation Pump

er exploration ether your goal speak directly ical page, the ght resource. technology, es and products

Water Anode Out

commercially viable applications for micro fuel cells will be an accessory

Conventional DMFC system.

charger for portable electronic devices.

In a conventional DMFC system (Figure 1), an active water management system with a watertherecovery pump and a recirculation pump is exploration into products, technologies and companies. Whether your goal is to research latest datasheet from a company, mp to a company's technical page, the goal of Get Connected is to put you in touchneeded with the to rightmaintain resource. Whichever level of the reaction. gy, Get Connected will help you connect with the companies and products you are searching for. Typically, anode fuel concentration is cononnected trolled at a low methanol level (2%) and water is collected from the cathode side (i.e., by gravity) and pumped externally back to the anode. While this system provides water to the anode side for the reaction to occur, significant barriers to commercial production are encountered because of the micro-pumps and micropipes that present additional size, complexity and cost challenges. An alterative approach can be taken by carrying methanol, together with the water required Get Connected with companies mentioned in this article. for the reaction to occur, in a single tank (Figwww.portabledesign.com/getconnected ure 2). This system avoids the need for collect-

companies providing solutions now

End of Article

PORTABLE DESIGN

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Solution: Feeding 100% Methanol to the Anode Side of the DMFC

MTI Micro has been successful in feeding neat (100%) methanol to the anode side of a direct methanol fuel cell, consequently eliminating the need for carrying water in the system, as well as eliminating the micro-pumps and micro-plumbing subsystem (Figure 3). The integral features enabling this approach require the ability to properly control supply of 100% methanol to the cell with uniform distribution, as well as achieving water flow within the cell from the cathode (air) side to the anode (fuel) side without the use of a pump. MTI Microâ&#x20AC;&#x2122;s solution simultaneously maximizes energy density while reducing parts

Lowering Manufacturing Costs: The Next Challenge

Today, micro fuel cell components are virtually custom made, at low quantities. It is expected that supply-side prices will decrease as higher volumes are achieved, reducing manufacturing costs to a price point competitive with current lithium-ion technologies. Catalyst performance remains a particularly important focus area for the widespread commercialization of micro fuel cell technology. Platinum is commonly used as a catalyst in DMFCs, and is also one of the costlier components of the cell. Reducing platinum loads while maintaining optimum reaction efficiency presents a significant challenge, as both manufacturing costs and power density are implicated. Scientists and micro fuel cell developers alike have devised catalytic components that present smaller platinum loads at the molecular level, however manufacturing such advanced structures on a commercial scale remains a significant cost issue. While platinum produces some of the highest achievable power densities for DMFCs today,

consumer electronics

new catalysts loom on the horizon that promise to increase system efficiency while bringing manufacturing costs down further.

Establishing a Methanol Fuel Cartridge Distribution Chain

Widespread DMFC applications will require the formation of a complementary methanol cartridge distribution chain. Both international and domestic regulatory bodies are laying the groundwork for this to happen, and MTI Micro is working with the Methanol Institute to support these efforts. Of note, in 2005 the International Civil Aviation Organization (ICAO) voted to allow methanol fuel cartridges and DMFC cells to be used by in-flight pas-

figure 2 Methanol + H2O

Fluidics and Electronics DC/DC Converter

Diluted fuel - (e.g. 95% water)

count and the need for complex components, resulting in a smaller system. By developing this very simple, complete system, manufacturability needs and market opportunities for small fuel cells could be addressed early and cost-effectively. The system is uniquely suited for portable electronics and has been successfully integrated into commercial products, proving scalability and functionality beyond the laboratory setting, and demonstrating the technologyâ&#x20AC;&#x2122;s practicality for consumer markets. A series of system prototypes has been developed, showing size reductions and performance improvements, including operation on an increased concentration of up to 100% methanol. MTI Micro has delivered functional prototypes to Samsung Electronics for mobile phone applications, for instance. While this is one approach to DMFC design for portable electronic applications, prototypes for consumer devices have been delivered across the board by other manufacturers as well. The next engineering challenge for many players in the micro fuel cell industry is to decrease manufacturing costs.

Fuel Cell Anode In

Cathode Ambient Air

Pump Driver & Logic MeOH+H2O Feed Pump CO2 Vent

Low-energy content DMFC passive system.

sengersâ&#x20AC;&#x201D;a significant step paving the way for micro fuel cell commercialization. Methanol, a relatively inexpensive hydrocarbon, is a particularly suitable fuel source for micro fuel cells designed for portable electronics applications. Methanol has a higher energy density than compressed hyMAY 2007

consumer electronics

drogen at typical fuel-cell conversion efficiencies, and is relatively safer in small volumes. Methanol is presently used in antifreeze and windshield wiper fluid. And the disposal of methanol cartridges, which will contain only trace amounts of methanol after the fuel is expended, will be much more environmentally sound than discarding lithiumion batteries.

Product Focus: The Importance of First Adopters

Initial product applications can help move micro fuel cell development forward. One of the first commercially viable applications for micro fuel cells will be an accessory charger for portable electronic devices. These should be designed to work with a wide range of products including mobile phones, digital cameras and portable music players. First adopters will naturally gravitate to the idea of increasing run-time and recharging in areas with no electricity, on the go and in the field. In addition, these users have the high-

figure 3 Neat Methanol

Fluidics and Electronics DC/DC Converter

Fuel Cell Anode In

Cathode Ambient Air

Pump Driver & Logic MeOH Feed CO2 Vent

100% methanol fed into anode side of DMFC.

PORTABLE DESIGN

est demand for energy, as they are typically carrying the most advanced products. As costs are brought down, a larger consumer base will be willing to adopt the technology, which in turn will help establish the economies of scale needed for widespread micro fuel cell commercialization, as well as enable further energy density gains and size reductions leading to future applications. Down the road, hybrid fuel cell and battery solutions will become increasingly feasible. Fuel cells will provide an extended low power supply to a device, allowing for lithium-ion batteries to in turn decrease in size, to be relied upon only for peak power needs.

Growth Drivers for the Micro Fuel Cell Industry

The power gap, safety issues and building a long-term hydrogen economy are key drivers that have incited investment in micro fuel cell research and development, coming from the U.S. Department of Energy (DOE) and consumer electronics manufacturers. As part of its Hydrogen, Fuel Cells & Infrastructure Technologies Program, the DOE is advancing the creation of both a supply chain for micro fuel cell components, as well as the foundation for an alternative fuel infrastructure. As micro fuel cell technologies mature, design practices and distribution channels can be utilized to help bring about the hydrogen economy. Consumer electronics manufacturers have an important stake in the advancement of micro fuel cell technologies. Lithium-ion energy density has doubled in the past 10 years, however, processors have consistently made similar performance gains every two years. A solution must be found. To move the consumer industry forward, micro fuel cell developers will need to focus on applications that derive the most value from the technology to spur maximum adoption, as this ultimately will impact economies of scale, best design practices and demand for methanol cartridge distribution. MTI MicroFuel Cells Inc. Albany, NY. (518) 533-2222. [www.mtimicrofuelcells.com].

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wireless communications multiband RF design

Multiband RF Requirements Raise Challenges for Mobile Handset Design As the number of bandwidths handled by mobile handsets grows, the pressure increases on the components in the RF signal chain, especially the antenna and its switch.

by Rodd Novak, V.P. of Marketing, Peregrine Semiconductor

Think of it as an intersection of eight or nine roads with a single traffic light. In a mobile handset, the antenna switch is responsible for controlling antenna access for all of the radio signals moving into and out of a mobile handset. Over the last five years, this signal path has become increasingly crowded, moving rapidly from dual-band, to tri-band, to quad-band, as well as also handling signals for I/O radios (e.g., Bluetooth, WiFi and GPS) and looking forward, WiMAX and LTE. All of these signals operate on different bandwidths, and they all need access to the antenna. For performance and real estate reasons, it is better if they access the antenna through a single RF switch. For switch manufacturers, this has meant a ramp-up from single-pole four-throw (SP4T), to SP7T, and now to SP9T configurations in order to handle the increased number of signals resulting from the onslaught of mobile communications bands, such as

PORTABLE DESIGN

wideband CDMA (WCDMA), as well as the addition of numerous low-power radios. It is clear that handsets will continue to get more complex, requiring more bands rather than experiencing a consolidation. In the foreseeable future, it is likely that the market will standardize on a minimum of seven bands with the vision of an eighth (4G or LTE) being added somewhere past 2010. Any relief from a consolidation will be quickly overshadowed by the RF signals generated by the peripheral radios that also need access to the antenna.

Managing Multiband Signals

Over the past few years, the 3G mobile handset market has migrated to WCDMA in order to support Internet, multimedia and video features. Concurrently, GSM evolved into a dual GSM/ WCDMA technology. In order to satisfy worldwide requirements, GSM phones can have up to four transmit (Tx) and four receive (Rx) paths.

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IMD3 (dBm)

Adding WCDMA functionality to this design requires an additional Tx/Rx path for each new band. The current design trend is toward 4xGSM (850, 900, 1800, 1900 MHz) and 3xWCDMA (850, 1900, 2100 MHz) front ends, which is pushing handset complexity to record levels. For designers of the RF front end, which includes the antenna switch module (ASM), figure 1 front end module (FEM) and the transmit -100 module—this scenario PE42672 can translate into sig-102 nificant architectural, PE42693 -104 performance and cost challenges. Any design -106 trade-offs have to be made while still main-108 taining the performance levels of both technolo-110 gies’ specifications. An ASM typically includes -112 a switch, decoder, PA -114 low pass filters, ESD circuitry and a voltage -116 generator. 0 30 60 90 120 150 180 In a typical multiPhase @ 1.76 GHz mode, multiband mobile handset, a single IMD3 Performance of the UltraCMOS SP7T and UltraCMOS SP9T RF power amplifier modAntenna Switches. ule handles the Quad

figure 2 GSM/Edge 850 GSM/Edge 950 GSM/Edge 1800 GSM/Edge 1900 GSM/Edge 850/900

GSM/Edge 1800/1900

Power Detect Power Detect

3GPP Band 1/2 3GPP Band 5/6

3GPP Band 1

3GPP Band 2 3GPP Band 5

Today’s handset designs demand that the front end handle an increasingly complex RF signal chain.

PORTABLE DESIGN

Band GSM/EDGE signals, and each WCDMA band requires its own individual PA. As a result, a quad-band GSM phone with one WCDMA band requires a single-pole, sixthrow (SP6T) switch to manage all of the signal paths. Alternatively, designers can use a diplexer and two SP3Ts (a popular GaAs configuration), but this results in higher insertion loss than when using a single SP6T switch. Insertion loss is a key design parameter because it directly impacts the effective poweradded efficiency (PAE) of the PA. GSM PAs are typically run in saturation at up to 3W, and their average PAE is 55 percent. This level of efficiency is necessary to ensure battery life, since half of the total handset current drain is from the PA. In light of this, degrading the PA’s PAE is not desirable. In the early days of WCDMA/GSM handset design, some manufacturers were forced to separate the WCDMA antenna and radio from the GSM counterparts. This strategy was a short-term fix, and the industry clearly needed integrated antenna switch modules that handled seven or even nine signals. SP7T switches were developed to support a handset architecture with one WCDMA and four GSM bands. The PE42672, for instance, is a monolithic SP7T developed on UltraCMOS process technology, which delivers a third-order intercept point (IP3) of +68dBm, a measure of linearity performance that enables 3GPP IMD3 specification-compliant handset designs and efficient RF front ends. IP3 correlates to the devices’ Third-order Intermodulation Distortion (IMD3) performance; these measurements over phase can be seen in Figure 1. An SP9T switch can be configured to handle multiple bands of WCDMA, GSM and peripheral radios. The switch in Figure 2, for example, is handling three bands of WCDMA, with paths to duplexers and three PA modules (each WDCMA band requires its own PA and duplexer). The device also handles quad-band GSM/Edge, which has a single PA module associated with it (which, incidentally, contains two PA ICs). Figure 2 demonstrates that as the multiband architecture has grown, so has the requirement for the number of PAs and associated filters. In essence, the technical demand on the PAs has not changed, but the designs need more of them. What has changed is the need for an extremely efficient method to route all of the RF signals to the antenna—the monolithic switch. The technical requirements of the switch have gone up tremendously with the addition of more serviced bands in the handset. The SP9T

Dream of Darkness,

Wasteman!

wireless communications

figure 3

SP9T 0.5 µm UltraCMOS

1.71 mm

1.9 mm

SP9T E/D-pHEMT or J-pHEMT

er exploration ether your goal speak directly 1.5 mm 1.11 mm ical page, the ght resource. technology, Monolithic integration in the design and the scales and products

ability of UltraCMOS enable remarkable real-estate and performance benefits over GaAs-based SP9T switches.

in Figure 2, for instance, has to route five highpower signals through a singular switch that is controlled by a simple decoder. The linearity requirements and harmonic requirements of WCDMA have put a large strain on the performance of the device. For instance, a switch is now generally agreed to need an IP3 of better than +65 dBm. In the old days of GSM-only designs, there was no comparable linearity requirement. Not only is +65 dBm a new requirement, it is a difficult one for switch manufacturers to achieve. By leveraging the linearity advantages of the UltraCMOS manufacturing process, the monolithic PE42693 SP9T in Figure 2 is able to maintain the +68 dBm IP3 of its SP7T predecessor with IMD3 performance that surpasses the industry specification of -105 dBm (Figure 1). If the SP9T is not designed monolithically in CMOS, it will require additional components such as a CMOS decoder and driver. This will greatly affect the number of I/Os required. For instance, the SP9T in Figure 2 requires four control lines. A comparable GaAs implementation of an SP9T would require 18 control lines. This makes it very challenging to route in and out of a singular device. This is especially true for the five high-power ports that require high linearity and isolation, because the more I/Os there are, the more likely it is for wires to couple and bond. For instance, the PCS1900 band uplink overlaps the DCS1800 downlink (receive) band. Without good isolation (35 dB or better) unwanted signals that fall in-band can pass right through the filter and duplexers and desensitize the receiver.

Managing Footprint

With multiband cellular phones increasing in market share, the need for highly integrated, small antenna switches is becoming more companies providing solutions now serious. exploration into products, technologies and companies. Whether your goal is to research the latestUltraCMOS datasheet from a SP7T company,switches are now mp to a company's technical page, the goal of Get Connected is to put you in touchinwith the rightproduction, resource. Whichever of volume withlevel SP9T anticipated gy, Get Connected will help you connect with the companies and products you arein searching for. volume in late 2007. In terms of footprint, onnected a GaAs SP7T measures 1.6 x 1.5 mm whereas a comparable SP7T switch design using 0.5 μm SOS with equal or better small- and large-signal performance measures 1.2 x 1.0 mm, 50% smaller. Currently available GaAs E/D pHemt or J-pHemt SP9T switches measure 1.9 x 1.5 mm. Compare this to an SP9T manufactured using an UltraCMOS 0.5 μm process that measures 1.7 x 1.1 mm (Figure 3) and does not require off chip ESD devices and linearity enhancing matching compoGet Connected with companies mentioned in this article. nents. The UltraCMOS roadmap anticipates www.portabledesign.com/getconnected that the 0.25 μm version of the SP9T will

End of Article

PORTABLE DESIGN

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measure 1.32 x 1.29 mm. While it meets the architecture and performance requirements of GSM/WCDMA handsets, UltraCMOS also offers significant size and integration advantages. For instance, these switches can be flip-chip mounted to a low temperature co-fired ceramic (LTCC) substrate without underfill, eliminating the area previously required for wire bonding. Currently, wafer-level chip-scale packaging is in development to produce switches that can be handled like a standard surface-mount package. Using UltraCMOS eliminates the decoder, blocking capacitors and the diplexer that are required with other switch technologies. Combined with chip-scale packaging technology, it dramatically reduces the size and thickness of ASMs. Inherent ESD tolerance and a monolithic CMOS interface simplify implementation and use. Finally, the high yield of UltraCMOS processes and scalability to additional switch throws provides a roadmap to even higher levels of integration for future generations of handsets, promising to answer the challenge of shrinking real estate in the multiband mobile handset.

Mounting Pressure for ASMs and Antennas

The number of frequency bands and the aggressive technical requirements of the multimode, multiband GSM/WCDMA handset have overcome the limits of traditional RFIC technologies such as GaAs. Most critically affected by these ultra-high-performance specs are the antenna and the RF switch. The antenna must effectively radiate from 800 to 2200 MHz, a daunting task given the area allowed for the miniscule antenna. New techniques are now being looked at to address this issue— taking into account antenna matching issues, utilizing switches and lumped tuning elements. The RF switch must be capable of switching up to nine paths of high-power RF signals with low insertion loss, high isolation and exceptional linearity. The news is good, though, for designers of portable products requiring multiband operation. The advancement of new manufacturing processes as well as highly integrated designs are making it possible to realize cutting-edge, reliable multiband performance in the latest and smallest mobile devices. Peregrine Semiconductor San Diego, CA. (858) 731-9400. [www.peregrine-semi.com].

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portable power analyzing power specs

Meeting Portable Power and System Specifications Converged portable devices have complex power requirements. This article examines the major subsystems, their particular challenges and preferred solutions. by Jinrong Qian, Applications Manager, Portable Power Battery Management, Texas Instruments

Driven by integrating functionality and shrinking form-factors, the latest generation of ever-smaller, feature-rich portable devices is propelling power management design into a critical role. Portable devices typically include microprocessors, I/O peripherals, light-emitting diode (LED) backlight, flash memories or/and hard disk drive, digital and analog circuits. Power requirements of these function blocks are different. System designers are faced with the challenges of providing embedded power management solutions to meet the power specifications in order to operate these functional blocks properly, and to minimize the power dissipation for extending the battery life. In addition to analyzing the power and system specifications, this article focuses on how to design these power management circuits to meet the challenges and requirements for microprocessors, backlight and hard disk drive (HDD).

PORTABLE DESIGN

Powering the Microprocessor

The microprocessor is a core device that processes all kinds of data and commands. Digital complementary metal-oxide-semiconductor (CMOS) circuits are used in the majority of microprocessors, and have both switching and static power consumption. Every transition of a digital circuit charges and discharges the digital circuitâ&#x20AC;&#x2122;s output capacitance, which generates power dissipation. The power consumption is given by: 2 PCPU = C fs Vcore

(Eq. 1) Here, C equals the total load capacitance, fS is the switching frequency, and VCORE is the supply voltage applied to the microprocessor. It shows that clock frequency reduction linearly decreases power consumption, and voltage reduction results in a quadratic power reduction. With its continually increasing processing

portable power speed, the required voltage applied to the microprocessor is reduced to sub 1V to minimize power consumption. The most common voltage range powering the microprocessor is from 1.0V to 1.5V. From the voltage specifications, most of the microprocessor has stringent voltage tolerance with less than 100 mV in steady state and in load transient. Given the microprocessor’s low operating voltage and high current demands with very fast current slew rate, power management designers are faced with great challenges for meeting the stringent voltage transient requirements and high-power conversion efficiency in the system power budget and battery run-time. The microprocessor usually consumes about 30-40 percent of total power in the system. For most applications, a Li-ion battery is used to power portable devices. The typical battery operating voltage range is between 3.0V and 4.2V with LiCoO2 cathode material. Figure 1 shows a synchronous buck converter, which is an ideal topology to convert battery voltage down to low core voltage efficiently. The constant frequency pulse width modulation (PWM) DC/DC converter with integrated MOSFETs typically can achieve over 90 percent efficiency in the normal load conditions. However, it has relatively low efficiency at light load, such as in standby mode for portable devices, since the switching loss and gate drive loss are dominant factors. In order for portable devices to meet the long battery standby time, it is critical to have high light-load efficiency. The first thing is to design the buck converter to operate in a non-synchronous mode. This prevents any negative inductor current from minimizing the conduction loss associated with the circulating current. Besides, the pulse frequency modulation, or pulse skip mode, is commonly used to minimize the gate drive and switching losses. Special techniques, such as power save mode developed by Texas Instruments, reduce the switching frequency as well as minimize the quiescent current of the PWM

figure 1 L

Q1 Battery

ESR

VIN

µP

VO CO

–

Synchronous buck converter

controller by turning off partial control circuits. As low as 18 μA of quiescent current and over 70 percent efficiency can be achieved under 150 μA load. However, it creates another challenge for the load transient from light load to heavy load, where it has delay time for waking up the PWM controller to be fully functional. During this delay time period, the output capacitor has to provide power to the load. This causes an additional voltage dip compared with the constant frequency PWM converters. How can you overcome this side effect from the power save mode? The voltage specifications allow for a microprocessor to have an overall tolerance of ±5 percent, including steady state error and load transients. We can raise the output voltage by about one percent at light load to compensate for the additional voltage drop due to the control circuit wake-up delay. Actually, raising the output voltage at light load is a common practice for mobile processors, which is called load-line regulation. This technique increases the transient voltage swing range so that it allows compensation for the additional voltage dip or using smaller output capacitance. AdMAY 2007

portable power

ditionally, the voltage transient response is strongly dependent ∆IO on the control loop design and inductor Small L design. How do you select the correct inLarge L iO ductance and design the control loop band∆Q width to achieve fast iL transient response, and meet the voltage transient specifications while maintaining high efficiency? tr t The voltage transient response for step load transient from less than 1 mA Load current and inductor current during the load transient. to full load generally nd should be within ±3 percent. The voltage er exploration ether your goal transient is related to figure 3 speak directly the equivalent series ical page, the Output Voltage (V) ght resource. resistor (ESR) and technology, switching delay when es and products1.50 the step load is applied ed to the system and the Smaller Inductance output capacitors. 1.48 The contributions Larger Inductance from the first two items 1.46 are fairly constant and typically we use small companies providing solutions now 1.44 ESR ceramic capaciexploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, mp to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever levelTherefore, of tors. minigy, Get Connected will help you connect with the companies and products you are searching for. mizing the voltage 1.42 onnected 1µs/div transient across the output capacitors is the most challenging Output voltage transient waveforms job through optimizing the loop design and inductance value. The output capacitors need to provide the load current during the transient response. Current demand by the microprocessor has a much higher slew rate than that of the inductor current of the buck converter. The difference between the load Get Connected with companies mentioned in this article. current and inductor current determines the www.portabledesign.com/getconnected charges that need to be provided by the output

figure 2

End of Article

PORTABLE DESIGN

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capacitors as shown in Figure 2. If this unbalanced charge can be reduced, the transient voltage can be reduced so as to minimize the output capacitors. The faster the inductor current slew rate, the faster the transient response, and the smaller the voltage drop. Therefore, the transient response is dependent upon how the inductor current follows the load current. The inductor current rise time is related to the control loop bandwidth as shown here

tr =

1 4 fc

(Eq. 2) where fC is the closed loop bandwidth. On the other hand, the feedback control loop generates duty cycle increase during the light load to heavy load transition. There is net voltage increase across the inductor that causes the inductor current increase. The average inductor current rise time is also given by

tr =

∆I o L ∆D • VIN

(Eq. 3) where L, VIN and ΔD are the inductance, input voltage and the duty cycle increase, respectively. The largest inductance that gives the same fast transient response for a given bandwidth is defined as a critical inductance. This critical inductance is the optimized inductor that can achieve the highest possible bandwidth and smallest inductor current ripple for highest efficiency. Combining these two equations yields the critical inductance for achieving the fastest transient response with a given loop bandwidth,

LCRI =

VIN • ∆DMAX 4 fC • ∆I o

(Eq. 4) where ΔDMAX is the maximum duty cycle increase during the load transient. It shows that small inductance can achieve high loop bandwidth. As a result, it can achieve fast load transient response to meet the transient voltage specifications. Figure 3 shows the

portable power output voltage transient response with small and large inductance. It illustrates that the smaller the inductance, the faster the load transient response.

figure 4 L1: 4.7µH

Powering Backlight White LEDs

Backlight consumes a substantial amount of power, which impacts battery life for portable devices. Display backlighting for these applications most often uses arrays of three to six white LEDs. Typically, these white LEDs are driven with around 20 mA current for optimized brightness and color. The primary challenges are 1) how to achieve uniform brightness between various LEDs, and 2) optimizing the dimming function while maintaining high efficiency. To meet the first design challenge, LED drivers are required to provide the same driving current. This is easily achieved by connecting these LEDs in series, so that each LED flows the same amount of current. There are two main topologies for driving LEDs: switched capacitor / charge pumps, and boost converters. The charge pump uses capacitors to transfer energy to the output and has very small, total size solution. Since the charge pump has to integrate a minimum of four MOSFETs, it is only cost-effective for driving current up to 200 mA applications, and has relatively low efficiency when the output voltage is not integrally related to the input voltage. Due to its limited voltage boosting capability, LEDs are usually connected in parallel. This requires accurate current mirrors to achieve the same driving current. The inductive boost converter uses an inductor to transfer the energy to the output. It has a voltage gain of up to 10 times of the input voltage. So, it readily can drive six LEDs in series, and can achieve over 85 percent efficiency. However, it needs a relatively large inductor and may have design challenges for electromagnetic interference (EMI). The second design challenge for meeting system specifications is to provide the right dimming function required for many portable devices. There are three major dimming technologies: PWM, analog and digital dimming.

CO 1µF

TPS61042

One Li-Ion or 203 NiMH

CIN 4.7µF

PWM dimming 100Hz to 50kHz

VIN

GND

OVP

CTRL

LED

RS 13Ω

Dimming mode for typical white LED drivers.

figure 5

VSW 5V/div

VOUT 5V/div

LED current, 20mA/div

25µs/div Switching waveforms of the PWM dimming.

MAY 2007

portable power

figure 6

+ −

VIN

Q3 CO

R −

Buck-boost converter

figure 7 L: 2.2µH

1.8V to 5.5V

CIN 10µF

VIN

VINA

FB Q2

PS/SYNC EN

OUT

VOUT 3.3V up to 1.2A

COUT 10µF

PGND GND

TPS6300

Buck-boost typical application circuit

PWM dimming uses a low frequency digital PWM signal to repeatedly turn on and off white LED drivers. LED dimming is achieved by adjusting the pulse width of the PWM signal. The main advantage is that it can provide high-quality white light with high efficiency. An I/O port can be used to generate a PWM signal in a mobile phone system to enable or disable WLED drivers. 38

PORTABLE DESIGN

However, it is possible to produce audible noises with low dimming frequency in the range between 200 Hz and 20 kHz. To avoid audible noise, white LED drivers should be able to provide dimming frequencies beyond the audible range. Figures 4 and 5 show a typical application circuit and its switching waveforms. The analog dimming adjusts the reference voltage, which determines the current through the LEDs. The PWM signal, along with a low pass filter, is used to set the dimming threshold. Similarly, adjusting the duty cycle ultimately changes the average reference voltage to achieve dimming. One disadvantage is that it has low efficiency with deep dimming, which results in low battery runtime. Another main challenge is the luminescence quality. With low LED driving current, the LED has a very poor luminescence quality and the emitted light is not close to natural white light. The last dimming approach is digital dimming. It requires an application-specific digital interface, such as I2C, and single line interface. The brightness of the white LED is dynamically adjusted by programming digital signals to the driver, based on the application’s need. TPS61060 supports digital dimming, saving processor power and battery life.

Powering the Hard Disk Drive and I/Os

The hard disk drive (HDD) and many I/Os usually are powered with 3.3V voltage rail. Since the single cell Li-ion battery voltage range is between 3.0V and 4.2V, it requires a buck-boost function to fully use the available capacity for extending battery life. Figure 6 shows the H-bridge buck-boost converter. How do you select the right control scheme to achieve high efficiency? There are two basic control architectures for this H-bridge buckboost converter. The first control scheme is to operate the converter in a traditional buck-boost mode. When Q 1 and Q 3 simultaneously turn on, the input voltage is applied across the in-

portable power ductor and energy is stored in the inductor. The output capacitor provides power to the load. When Q 1 and Q 3 turn off, Q 2 and Q 4 turn on. The inductor current flows through Q 2 and Q 4, and delivers its stored energy to the output. Assuming no power loss across the switcher and inductor, the voltage gain with this control scheme under continuous conduction mode is given by

Vo D = V in 1 â&#x2C6;&#x2019; D (Eq. 5) where D is the duty cycle. It operates in buck mode for the duty cycle less than 0.5 to achieve output voltage lower than the input voltage. It can achieve boost function for the duty cycle greater than 0.5. In order to achieve the same output voltage as the input voltage, a duty cycle of 0.5 is needed. It has very smooth mode transition between the buck mode and boost mode. However, this traditional buck-boost operation has lower efficiency since it has discontinuous high input and output current, which results in high conduction losses and switching losses, and inductor copper loss. The second control scheme is to operate the converter in either buck or boost mode. It can achieve higher efficiency similar to the buck or boost converter. It operates in buck mode when the input voltage is above the output voltage. Or, it operates in boost mode when the input voltage is below the output voltage. In buck mode, Q4 is always on while Q3 is always off. Q1 and Q2 turn on and off complementarily as a synchronous buck converter. In boost operation mode, when VIN is below Vo, Q1 is always on while Q2 is always off. Q3 and Q4 turn on and off complementarily as a synchronous boost converter. The root-mean-square (RMS) currents of the MOSFETs and inductor are identical to that of a buck or a boost converter. This control scheme can achieve 5 to 10 percent better efficiency than the traditional buck-boost converter. To further meet challenges of extending the battery life with the smallest size solution,

the integrated N-channel MOSFET is used as the top switching MOSFET. This further reduces the conduction loss since the N-channel MOSFET has lower on-resistance than the P-channel MOSFET for given silicon die size. However, driving N-channel MOSFET needs to provide high gate drive voltage with a charge pump circuit. An innovative technique developed by Texas Instruments infigure 8 tegrates these charge pump circuits into the Efficiency % silicon while keep100 ing the overall silicon size smaller than the 100mA 250mA P-channel MOSFET. As a result, it achieves 90 the highest efficiency 1.2A with a smallest size 1.0A solution. Figures 7 - 8 show the typical 80 application circuit and the efficiency under various loads. It 70 VOUT = 3.3V shows that up to 95 percent efficiency can be achieved. Powering key 60 components such as 2.5 3.0 3.5 4.0 4.5 5.0 the microprocessor, VIN (V) backlight LEDs and I/Os is critical for meeting the stringent Buck-Boost converter power conversion efficiency voltage transient response and achieving the highest possible efficiency to efficiently use every drop of juice from the battery. It is essential that system designers understand the design challenges and physical operation principles required to optimize the design of the inductor and loop bandwidth, thereby selecting the right control scheme for meeting system performance. Texas Instruments Inc. Dallas, TX. (800) 336-5236. [www.ti.com].

MAY 2007

portable medical portable monitoring systems

Power for Mobile Patient Monitors The choice of battery chemistry is critical to differentiating in the mature and competitive patient monitor markets. by Robin Sarah Tichy, Product Marketing Engineer, Micro Power

Revenues generated in the United States from the sale of multi-parameter patient monitors are estimated at close to one billion dollars, but the expected compound annual growth rate is only 2.1 percent. The markets for other, more specific monitors, such as pulse oximeters and non-invasive blood pressure monitors, are also large but slow growing. Medical monitoring equipment is a mature market. Therefore, sales rely heavily on replacement units, and there is heavy competition to differentiate while keeping costs low. The most significant technology trends have evolved from the addition and enhancement of features. New features reflect the changing demands of hospitals and alternate care facilities. The medical community has evolved its thinking with respect to patient mobility. Inactivity is now widely acknowledged as a health issue unto itself, and it is now advised

PORTABLE DESIGN

that most patients engage in physical activity as soon after surgery as they are able. The increased mobility needs of the patient have lead many traditionally stationary medical devices, such as patient monitors, to become untethered. Other new features include the increasing capability of incorporating data from other medical devices, and the ability to connect to clinical information systems wirelessly. The power system enables the portability of the device but the bundling of features and increased functionality such as wireless communication increases the power consumption of the device, straining the battery. More efficient hardware, power management and software architecture can alleviate some of the requirements, but ultimately the battery pack must be improved to meet the needs of the patient monitorâ&#x20AC;&#x2122;s operating voltage and current requirements.

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portable medical

Power Supply Meets Demand

Battery technology struggles to meet the demands of the marketplace for greater energy density. Multi-parameter patient monitors have only required backup batteries in the past, so they were frequently designed with sealed lead acid (SLA) batteries. Although SLA batteries have the lowest energy density, they are inexpensive, can be maintained at a high state of readiness, and it is easy to monitor remaining capacity. More simple monitors like pulse oximeters are operated from non-rechargeable alkaline cells, which are an inexpensive and simple solution. figure 1 However, end users are beginning to expect the rechargeable battery option and understand the increased cost of ownership associated with continually replacing the battery cells. Some products migrated to nickel-based chemistries in response to increased customer demand, but applications that utilize nickelcadmium (Ni-Cd) and nickel-metal hydride (Ni-MH) battery packs with one or two cells, nd a few wires and a simple fuse are becoming Li-ion battery pack with safety and power management electronics increasingly rare. Battery technology has kept er exploration ether your goal pace as portable electronic devices have bespeak directly come more sophisticated and demanding. Toical page, the ght resource. day, more designers are turning to smart battery technology, pack solutions that offer advanced chemistries, es and products such as lithium-ion (Li-ion) and lithium-polyed mer (Li-polymer). These chemistries offer the highest energy densities currently available and, in the case of Li-ion, a very competitive cost-per-watt-hour for their weight. With operating voltages ranging from 3.6V to 3.8V, only one rechargeable lithium chemistry cell is recompanies providing solutions now quired fordatasheet a 3V operating system. In contrast, exploration into products, technologies and companies. Whether your goal is to research the latest from a company, mp to a company's technical page, the goal of Get Connected is to put you in touchyesterday’s with the right resource. Whichever level of nickel-based technology, which gy, Get Connected will help you connect with the companies and products you areoperated searching for. at 1.2V, required three batteries for onnected a 3V operating system. Although, Ni-MH systems can be configured with up to ten cells in a series to increase voltage, resulting in a maximum aggregate voltage of 12.5V, Li-ion battery systems can be configured with up to seven cells in a series to increase voltage, resulting in a maximum aggregate voltage of 25.2V. Today, some rechargeable lithium technologies offer improved energy densities of greater than 500 Wh/l. State-of-the-art lithium-ion (Li-ion) advantages include a much higher enGet Connected with companies mentioned in this article. ergy density, lighter weight, longer cycle life, www.portabledesign.com/getconnected superior capacity retention and broader ambi-

End of Article

PORTABLE DESIGN

Get Connected with companies mentioned in this article.

ent-temperature endurance. In addition, Li-ion cells offer the longest lifetime and shelf life. Li-ion battery systems are the best option when requirements specify lower weight, higher energy density or aggregate voltage, or a greater number of duty cycles, as is the case in most patient monitors.

Reevaluating Battery Technologies

When a product’s new generation is in the design phase, it is the best time to reevaluate the battery technology. At this time there is the flexibility to make the most use of physical space. Li-ion cells come in three basic formfactors: cylindrical, prismatic and Li-polymer cells. Prismatic cells are shaped like a rectangular brick and have a hard outer shell. Lipolymer cells are thin and encased in a flexible polyester based film. The most commonly used Li-ion cell is the cylindrical 18650 cell—several million cells per month are manufactured and it has become almost ubiquitous in notebook computer applications since its introduction in the early 1990s. The 18650 offers the lowest cost-per-watt-hour and typically represents the leading edge in cell technology. The 18650 is 18 mm in diameter and 65 mm long and available in 2.2-2.6 Ah. Prismatic cells are also fairly cost-effective and they are available in a myriad of sizes. The most common size is the 50 mm length and 34 mm width footprint. This cell size is available in a variety of heights ranging from about 4 mm to about 12 mm. It is important to remember that the cells may swell up to 10% over the course of their lifetime. This is normal and not dangerous—unless the swelling is not accommodated in the physical design of the pack. Lipolymer cells are available in custom footprint size. They can be very thin or quite large depending on their intended use. Unfortunately, they are expensive and the flexible packaging can make them fragile. If a medical equipment manufacturer would like to redesign a pulse oximeter that operates on AA alkaline so that the battery pack is rechargeable, Li-ion or Ni-MH would be the most natural choice. If the alkaline pack is 3 in series 2 in parallel then the voltage will be 3.6 and the pack capacity will be 5.9 Ah. You

Battery Management

As shown in Figure 1, a Li-ion battery pack consists of not only cells, but safety and power management electronics are also contained in the hard plastic enclosure. Design engineers are making great strides in power management technologies that complement the modern battery chemistries. The printed circuit board provides the intelligence of the system for advanced functions such as the fuel gauge, protection circuitry, thermal sensors and a serial data communications bus. A number of safety design and manufacturing quality issues must be taken into consideration in the build of the battery pack, for example, active safety circuits are necessary to ensure that the battery is kept in stable condition. All Li-ion batteries must be protected against over- and under-voltage, as well as short-circuiting. The pack circuitry should use a thermal sensor to disconnect the cells at a specified temperature and prevent thermal runaway and overheating. This is normally done with a safety circuit or Battery Management Unit (BMU). Battery systems engineers and specialists work with design engineers and power management experts to maximize the power avail-

portable medical

would need to use three Ni-MH 4/3A cells or two Li-ion 18650s to get the same voltage and a similar run-time. In this case the Li-ion pack would be 1/2 the weight and 2/3 the volume of the Ni-MH pack. If a medical equipment manufacturer has a multi-parameter monitor that has an SLA backup battery, they are commonly 6 sealed lead acid batteries in series and 2 in parallel. This battery can be made far more portable with the utilization of Li-ion technology. A 4 series, 2 parallel or 3 series, 6 parallel configuration of Li-ion 18650 cells would give similar performance and run-times to the SLA. The run-times are similar, yet the Li-ion batteries occupy about one fifth the volume and are almost one tenth the weight of the SLA. This is the difference between a device that can be easily carried from place to place and one that must be wheeled on a cart. Cell chemistry should be considered early in the design cycle because each has a unique charging regimen, and designers shouldnâ&#x20AC;&#x2122;t be limited to bulky antiquated cells.

able for medical products. Their goals are to help the designer choose the best cell chemistry for the application and then to ensure that every drop of power available is utilized. Smart battery systems are the preferred choice in mission-critical applications, such as the medical market. A valuable smart battery pack feature to users of medical monitors is the ability to accurately predict remaining run-time, and communicate the operational status to the host device. Traditional fuel gauges either monitored the voltage or the capacity, and the accuracy was quite limited. While fuel gauging can make the end-userâ&#x20AC;&#x2122;s job easier, poor fuel-gauge accuracy can limit the performance of the battery system. If temperature, discharge rate and age of the battery are not compensated for, an inaccurate fuel gauge can leave up to 30 percent of available battery capacity unused. Poor accuracy of the fuel gauge may also cause inefficient charging. Further, if the battery is left undercharged or if it overcharges, run-time or service life can be shortened. New gas gauges monitor the number of coulombs being transferred and opportunistically calibrate with the open circuit voltage resulting in 99% accuracy. These features allow the end user to intelligently manage device use and avoid unexpected failures or shutdowns. A smart battery pack can also give feedback on its usage history, which is convenient for traceability and warranty issues. The choice of battery chemistry is critical to differentiating in the mature and competitive patient monitor markets. More designers are turning to advanced formulations, such as Liion and Li-polymer. These chemistries deliver high energy densities and competitive cost-peroutput for their weight. Doctors and patients benefit from greater flexibility when traditionally tethered monitors can be untethered or batteries do not need to be constantly replaced. An experienced battery system manufacturer can ensure that the packs are designed properly and present a seamless improvement for the doctor and patient. Micro Power Electronics, Inc. Beaverton, OR. (503) 693-7600. [www.micro-power.com]. MAY 2007

product feature Low-Power Methodology Kit Accelerates Wireless and Consumer Chip Designs Optimized flows, IP and modular methodology reduce risk and development time. by John Donovan, Editor-in-Chief The number one problem facing portable designers is power. How do you cram all of the features that users have come to demand in a high-end cell phone—including full-motion, high-resolution video, CD-quality stereo sound as well as your complete desktop environment—and still have several hours of talk time, all of which is powered by a single 1130 mAh battery? The problem can only be addressed at the system level, whether that system exists on a board or a chip. Cadence has taken direct aim at the latter with the introduction of its LowPower Methodology Kit, which targets wireless consumer applications. The goal of the kit is to enable chip designers without low-power expert knowledge to incorporate complex low-power design techniques into their designs. The new kit brings together lowpower design methodology, best practices and flows, all demonstrated and proven on a “wire-

Multiple Threshold Voltage Low Power Clocking Multiple Supply Voltages (MSV) Power Shut Off (PSO)

1 Architecture Trade-off

Low Power Synthesis

3 Power Aware DFT Prototyping and Parasitics Correlation

Low Power Implementation Verification

Power Planning

Low Power Floorplanning Timing and SI Closure

PORTABLE DESIGN

Power Grid Sign-off

Low Power ECO Methodology

Library Qualification

Process Selection

Infrastructure

CPF Creation

Low Power Functional Verification Planning, Metrics and Analysis

RTL Design

less segment representative design,” including Cadence IP and third-party IP from ARM (processor and bus fabric), Wipro (WiFi), ChipIdea (USB 2.0) and TSMC (65 nm technology libraries). Unlike beleaguered semiconductor companies, whose “reference designs” often provide OEMs with everything but the box and shrinkwrap, Cadence supplies a generalized design with embedded IP, all of which is optimized to work together in a low-power implementation, and backs it up with consulting services—presumably to make sure you don’t break anything when you add your secret sauce. With the Low-Power Methodology Kit, designers are able to achieve shorter, more predictable design cycles using reusable flows, from logic design through verification and implementation. The kit is highly modularized, providing not only a holistic methodology but also allowing for incremental adoption. These modules are combined to create six new flows using existing tools: Low-Power Functional Simulation, Logic Synthesis, Design for Test and ATPG, Physical Design, Formal Implementation Verification and Power Grid Signoff. Additional modules provide detailed trade-off analysis, planning and infrastructure. The key to ensuring consistency throughout the flows is the Common Power Format (CPF). Cadence developed CPF before turning it over to Si2, who have declared it to be a standard. The new Cadenced low-power kit is the first systemlevel embodiment of that standard, though Calypto and other CPF backers are starting to bring CPF-compatible design tools to market. The low-power camp continues to be bifurcated, with Synopsis, Magma, Mentor and a number of other design firms pushing their rival Accelera Unified Power Format (UPF), which they’ve submitted to the IEEE P1801 low-power study group with the intent of making UPF a recognized low-power design standard. Tools supporting the nascent UPF standard have been slower to appear than those supporting CPF, so the appearance of Cadence’s Low-Power Methodology Kit for wireless consumer devices gives the CPF camp a head start over the competition. It looks increasingly as if there will be two standards for developing low-power SoCs, with entire tool flows and IP libraries supporting one, the other or both. With a lot of bright people in both camps trying to solve the same problem, ultimately it probably won’t matter which standard you follow as long as all the tools in your design flow support it. Designers of complex SoCs for portable devices would do well to look into Cadence’s latest design kit, which offers an integrated suite of headache remedies for their most pressing problem.

products for designers Pre-RTL Performance Analysis Tool Chip Estimate Corp. has announced the release of technology that enables performance analysis at the earliest phase of the chip design cycle. The company’s flagship InCyte product now provides users with quantifiable feedback regarding the feasibility of achieving various performance targets for their chip. The new analysis capability is technology node-, process- and IP-specific. Features include: • Performance Analysis - Users can now get quantified feedback on the likelihood of achieving performance goals for a given chip specification, targeted at a specific manufacturing process. • Connectivity Definition - The interconnectivity of IP and other design components within a chip can now be incorporated into design specifications enabling more accurate chip planning and estimation. • Block Diagramming - Design teams can now communicate their architectural specifications visually into InCyte with the ease of use of a tool like Microsoft Visio. • Design Flow Integration - Design specification data now links directly into leading EDA implementation flows from vendors including Cadence, Magma, Mentor Graphics and Synopsys. • IP Library Selection - InCyte helps guide user selection of IP libraries and provides quantified feedback on the particular density, power, leakage and performance of a given library. InCyte starts at US $35,000 and is available immediately. Chip Estimate Corporation, Cupertino, CA. (408) 255-0444. [www.chipestimate.com].

Synchronous Mobile Multimedia Interconnect for High-End Mobile Handsets IDT has introduced the industry’s first synchronous Mobile Multimedia Interconnect (M2I), fully optimized for multimedia applications in high-end mobile handsets and personal digital assistant devices. M2I performs up to six times faster with ninety percent less battery drain than previous-generation interfaces. High-end handset users can reliably play back high-quality multimedia with minimal impact to their “talk time” and battery life. For handset suppliers, M2I enables the processor to support additional differentiating functionality such as Bluetooth, WiFi and global positioning systems (GPS). M2I is designed to work with application processors and baseband processors that make use of an address-data mux (ADM) interface. The ADM interface has a lower input/output (I/O) count and higher bandwidth than other approaches such as the standard, asynchronous dual-port RAMs and embedded serial interfaces commonly found in high-end mobile handsets. M2I uses fifty percent fewer processor I/O pins, freeing those pins to support desired differentiating functionality. Moreover, M2I also deploys eight dynamically programmable I/Os that the processor can use to control and/or monitor other devices, enabling the handset designer to add even more differentiating functionality. The M2I architecture achieves its high performance and low-battery drain using a synchronous clocking scheme that enables the use of an internal counter that eliminates the necessity for multiple addressing. Consequently, M2I processes 64 Kbits of data in only 4,001 cycles, compared to the 8,000 cycles required by previous-generation devices. Not only can the same amount of data be transferred in half the cycles, but also the cycles run three times faster, thus providing an overall performance increase of 6x. All this is accomplished with ninety percent less battery drain. The new device is currently sampling and is priced at $3.00 in 10,000 unit quantities. Integrated Device Technology, Inc., San Jose, CA (408) 284-8200. [www.idt.com].

Boot from Managed NAND QuickLogic Corporation has announced a solution that enables the application processors in mobile products to boot directly from Managed NAND devices and memory cards, eliminating the need for NOR flash and thus reducing BOM cost and PCB area. The solution is a combination of QuickLogic’s proven SDIO host controller and additional intellectual property that performs the boot sequencing function. Managed NAND is an emerging trend in flash storage technology that integrates both NAND flash memor y and a controller device that handles the complexities of error-correction (ECC) and other vendor-specific housekeeping operations associated with using the memor y. By handling these complexities on the Managed NAND device itself, the mobile products’ application processor can focus on running the operating system and software applications. Managed NAND also provides a simplified and standardized inter face to the memor y that allows QuickLogic’s solution to help reduce BOM cost by expanding competitive supply options, allowing companies to “mix and match” memor y from different vendors. QuickLogic’s boot from Managed NAND solution is available now with boot software support for Linux and Windows CE operating systems. The solution can be implemented in QuickLogic’s PolarPro and Eclipse II technology as well as in the programmable fabric of the company’s ArcticLink solution platform. The Managed NAND solution will price for as little as $1.20 in high volume depending on the platform used. QuickLogic Corporation, Sunnyvale, CA. (408) 990-4000. [www.quicklogic.com].

MAY 2007

products for designers

Computer Displays for Bags and Clothing Wearable computers—and their input devices known as “touch-sensitive interactive textiles for electronics inter face design”—have arrived. Eleksen Group plc has announced the availability of its Wearable Display Module (WDM) for Microsoft Windows SideShow, a computer auxiliar y display product for integration into soft goods such as bags, backpacks and clothing. The Wearable Display Module is easily integrated into soft goods like briefcases and backpacks and provides the first “inbag screen” available for any computer electronics product. It lets consumers connect their carry cases directly to their computer and view critical glance data like email, appointments and other information from the bag’s exterior, on the go, without needing to open the bag or access the Windows Vista-based device.

Low-Cost, I/O-Optimized FPGAs Xilinx, Inc. recently unveiled its Spartan-3A family of I/O-optimized FPGAs, an extension of its low-cost, high-volume Spartan-3 Generation. The Spartan-3A platform provides a costreduced solution for applications where I/O count and capabilities matter more than logic density. Built on 90 nm technology, the new platform consists of five devices offering up to 1.4 million system gates and 502 I/Os. Offering the lowest cost per I/O in the industry, the new family also features significant advances in power management, device configuration and design security. Features include: • Widest I/O Standards Support: First TMDS-compliant FPGAs enabling DVI and HDMI support for consumer video applications, and the only FPGAs compliant to 26 popular single-ended and differential signaling standards. Source-synchronous interfacing technology cost-optimized to ensure best design margins. Preengineered solutions for PCI, PCI Express, USB, Firewire, CAN and SPI among others, as well as support for all popular low-cost DDR and DDR2 memory interfaces up to 333 Mbits/s. • Only Dual-Power Management Solution: Suspend mode with over 40 percent static power reduction, fast wake-up time of less than 100 microseconds and system-level synchronization across time domains. Hibernate mode provides up to 99 percent reduction in static power and wake-up time of less than 100 milliseconds. • Robust Anti-Cloning Security Feature: The Spartan-3A devices are the industry’s first FPGAs to offer a unique DeviceDNA serial number. Engineering samples are shipping now for the XC3S700A and XC3S1400A devices with the XC3S50A, XC3S200A and XC3S400A devices to follow in the first quarter of 2007. The 3S700A device will list for $11.95 and the 3S1400A device at $16.95, both in 250K unit volumes. Xilinx, San Jose, CA. (408) 559-7778. [www.xilinx.com].

The Eleksen Wearable Display Module is comprised of a 2.46-inch Active TFT LCD screen, and 1 Gbyte of storage for data files is controlled by an ElekTex interactive fabric touchpad to control application management and data display. The product supports 7-button controls including a dedicated MENU and BACK button as well as 4 navigation buttons and a GO button. The display module is available either as a reference design or a ready-to-integrate module for bag manufacturers. Eleksen Group plc, Pinewood Studios, UK +44 (0)8700 727272. [www.eleksen.com].

BAW Filters for 802.11 b,g Access Points Skyworks Solutions, Inc. has commenced volume shipments of its first high-performance bulk acoustic wave (BAW) filter, the SKY33100-360LF, which is initially being deployed for wireless local area network (WLAN) 802.11 b,g access points. Skyworks is also developing BAW filters and duplexers for use in transmit front-end modules for personal communications system (PCS) and universal mobile telecommunications system (UMTS) cellular handsets. The SKY33100-360LF filter, which is delivered in a 2 x 2 mm QFN package, has very low in-band insertion loss, excellent near-band rejection, very low input-andoutput return loss, and thus offers better performance at 2.4 gigahertz and higher when compared to other solutions. The filter’s function is to dramatically reduce out-of-band spurious responses, enabling compliance with FCC regulations at a higher-in-band transmission power and improves handling with more robust architectures. Intended for use in wireless local area network (WLAN) and industrial scientific medical (ISM) bands, the device can operate in temperatures ranging from -40° to + 85°C and is available in a lead (Pb)-free, restriction of hazardous substances (RoHS)compliant package. The SKY33100-360LF is currently in volume production and is priced at $2.15 for quantities of 10,000. Skyworks Solutions Inc., Woburn, MA. (781) 376-3000. [www.skyworksinc.com].

PORTABLE DESIGN

Bluespec Inc. and EVE have announced immediate availability of an integrated solution of electronic system level (ESL) synthesizable transactors and models that run directly on EVE’s hardware-assisted verification platforms. The link between Bluespec’s ESL synthesis and EVE’s ZeBu hardware-assisted verification platform of accelerators, emulators and FPGA prototypes, offers high simulation speed with hardware accuracy early in the development cycle for architectural exploration, virtual prototyping, modeling and verification. The result is a single development environment for models, transactors, implementations and synthesizable verification testbenches, and a rich foundation library of intellectual property (IP). The availability of synthesizable transactors and ESL models from Bluespec and EVE allows a seamless, heterogeneous mix of models, implementations, a verification testbench and software models connected through transactors. The rapid plug-and-play construction of a system is accomplished through synthesizable IP––transactors optimized for EVE, system building blocks and models, the Bluespec AzureIP Foundation Library and verification IP––and ESL Synthesis capabilities, such as self-checking interfaces and static verification. Transactors are synthesizable, used at the transaction level of design and are parameterized on any high-level data type, including structures and unions.

High Luminance 2.7-Inch TFT LCD Displays NEC Electronics America, Inc. has announced three new 2.7-inch (6.8-centimeters-diagonal) quarter video graphic array (QVGA) amorphous silicon, TFT color LCD modules. The new NL2432HC17-07A module offers high luminance of 550 candelas per square meter (cd/m2) and a high contrast ratio of 400:1, making the module suitable for many handheld applications. LCD module developer and manufacturer, NEC LCD Technologies, has optimized the module design to achieve a slim profile of 2.6 mm thick, breaking the 3 mm barrier. With integrated features such as a timing controller and DC/DC converter, the new module benefits system manufacturers by reducing their development costs and time-to-market. NEC Electronics America is also introducing two additional color 2.7-inch LCD modules. The transflective QVGA NL2432HC17-04A module features NEC LCD Technologies’ super-reflective natural light technology (SR-NLT), high reflectivity of 35 percent, a contrast ratio of 150:1 and luminance of 140 cd/m2. The transmissive NL2432HC17-05B module has QVGA resolution, high luminance of 350 cd/m2 and a contrast ratio of 400:1. Samples of the NL2432HC17-07A LCD module are available now. The NL2432HC17-04A and NL2432HC17-05B display modules are scheduled to begin shipping in May. NEC Electronics America, Santa Clara, CA. (408) 588-6000. [www.am.necel.com].

Bluespec Inc., Waltham, MA. (781) 250-2200. [www.bluespec.com]. EVE, San Jose, CA. (408) 881-0440. [www.eve-team.com].

Smallest UHF Antenna for Mobile TV Siano Mobile Silicon and Vishay Intertechnology, Inc. have announced the world’s smallest UHF antenna chip for mobile digital TV applications. Vishay’s RFW8021, or Siano’s SMS8021, is an extremely small-form-factor, high-performance, passive, low-cost antenna chip that is applicable for multiple mobile TV formats. Target applications of the SMS8021/RFW8021 include mobile phones, portable multimedia players, notebooks, UMPCs and accessory cards. Applicable for all mobile TV technologies that deploy the UHF spectrum band—DVBT, DVB-H, ISDB-T, MediaFLO and China’s DMB-T—the SMS8021/RFW8021 supports a wide bandwidth range from 470 MHz to 870 MHz at high gain. Only 15 mm x 10 mm x 1.2 mm in size, the innovative omni-directional antenna chip is mounted directly on the internal PCB, with soldering pads similar to any other chip in the phone. Starting in June, the SMS8021/RFW8021 will begin shipping in production quantities as a complementary component to Siano’s mobile TV receiver product line, the SMS10XX. The SMS10XX family is the industry’s only low-cost, ultra-low-power, quad-band, multi-standard receiver in mass production. It supports DVB-H, DVB-T, DAB, DAB-IP, and T-DMB mobile digital TV standards in various spectrum ranges, from 170 MHz up to 1680 MHz. Siano Mobile Silicon, Sunnyvale, CA. (408) 689-2859. [www.siano-ms.com]. Vishay Intertechnology, Inc., Malvern, PA. (402) 563-6866. [www.vishay.com].

MAY 2007

products for designers

Platform for ESL Verification, Modeling, Architectural Design

products for designers

Clock Domain Crossing Verification Software

Universal Wireless Transceivers for 315, 433, 902-928 & 868 MHz ISM Bands

Real Intent, Inc. has introduced Meridian, new Clock Domain Crossing (CDC) verification software. Meridian is a completely new approach to CDC verification, and is engineered to verify that data traversing asynchronous clock domains on ASIC, SoC or FPGA devices is received reliably. After a quick and easy setup, Meridian verifies both the structure and the protocols required for CDC safe design, then pinpoints design problems using three different strategies. The first strategy is structural analysis. Meridian quickly verifies that the structural CDC implementation is correct and creates the most concise repor ts of any solution.

OTEK Corp. has released its Multi-Band Transceiver (MBTR) that has been FCC licensed for ISM uses in the U.S. The New MBTR will allow OEMs to ship their product worldwide without modifying their hardware or firmware. Applications include safety and security, GPS-to-land interface, HVAC, cargo security, conveyor silo control, marinas, fire, smoke, gas, intrusion, fencing, data logging and process control. Three basic versions are available: • Serial I/O (UART, 232, 485 or USB) • Discrete I/O (Stop/Start, Momentary, Latch and Virtual Wire) • Analog I/O (V/mADC with Set Points and Signal Conditioners) The 315 & 433 MHz Band devices can only be used in the U.S. for On-Off or Emergency Transmission (no data) and their output power is factory set at 1 mW (good for up to 300’ range). The 902-928 F.H. can be used for anything and it is factory set for up to 10 mW and has an effective range of >1000’. The 868 MHz device (also 10 mW) is not allowed in the U.S. but complies with EU and other country’s requirements. All configurations are user-programmable, except for band and output power (F.C.C. ruling). The MBTR is available as a transmitter, receiver, transceiver or repeater for limitless range. Features include: Power Input: 3-14 VDC; sleep current 500 μA; TX current 40 mA; RX current 30 mA; discrete inputs: 3-5V TTL/CMOS; analog inputs: 0-1 VDC; serial I/O: 8N1; ASCII to 57.6KB; A/D & DA: 10 Bit; LNA: -109dBm (field programmable); PA: 0+ 10dBm (factory set); Mounting: V or H PCB Mount. Op. Temp: -20° + 75°C. OTEK Corp., Tucson, AZ. (520) 748-7900. [www.otekcorp.com].

New API for Nucleus OS

Using a second strategy, Meridian addresses crossing safety with an adaptation of sequential formal analysis to CDC problems. Real Intent’s metastability aware formal engine, the Harmonic Convergence Engine, can prove that CDC functionality and protocols are correct. Proof of functional correctness verifies that no clocking issues slip through undetected. For the third strategy, Meridian leverages existing simulation testbenches with SimPortal software. SimPortal induces the effects of metastability into regression simulation, automates CDC sign-off and supports popular simulators. To protect from sign-off errors, Meridian SimPortal acts as an independent verification step for crossings signed off by the user. Real Intent, Inc., Sunnyvale, CA. (408) 830-0700. [www.realintent.com].

PORTABLE DESIGN

Mentor Graphics has announced a new application programming interface (API) for its Inflexion Platform UI (user interface) for the Nucleus OS (operating system). The API delivers a new approach for rapid creation of dynamic user interfaces for electronic devices. Consequently, manufacturers can now deliver the most visually appealing and easy-to-use electronic device UI screens demanded by today’s consumers, while also being able to reuse and update them easily. With the new API, the Inflexion Platform allows developers to supply and dynamically update advanced “themeable” visuals throughout the device’s UI. Conventional embedded UI solutions require a device’s software stack to be modified whenever the interface needs to be changed, and this increases risk and introduces delays. The Inflexion Platform UI avoids this problem by automating all of the common UI logic required by a typical electronic device. It provides a customizable and extensible menu system and application engine that can be used on any device with a graphical display. Flexible and reusable extensible markup language (XML) templates allow developers to automate many key interactive behaviors, including hierarchical browsing, detailed views and scrolling, without any coding. Inflexion Platform with the new API is available now for Nucleus OS. Pricing starts at $2,500 per seat. Mentor Graphics Corporation, Wilsonville, OR. (503) 685-7000. [www.mentor.com].

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