The magazine of record for the embedded computing by RTC Media

The magazine of record for the embedded computing industry

November 2008

www.rtcmagazine.com

Low-Power CPUs BoosT Boost Performance but

Keep Their Cool

ATX in Embedded: Making Sense for Many Apps Locking Down Security on Network Devices SF3: Bus? Board? Or Both? An RTCâ&#x20AC;&#x2C6;Group Publication

GE Fanuc Intelligent Platforms

2 in 1.

One Processor AdvancedMC™. Two ways to configure it. It’s difficult to imagine that the same processor module can function both as a PCI Express® root and as a PCI Express node. Until now, that sort of flexibility hasn’t really been an option for system designers. And that is why we are pleased to introduce you to the ASLP11 Processor AdvancedMC and its reconfigurable PCI Express port.

important implications for both AdvancedTCA® and MicroTCA™. It means you can build robust ‘processor farm’ systems for extremely demanding applications. It means you only have to stock, and provision, and train for one module. And it means you can now quite confidently make the transition from CompactPCI® to MicroTCA.

Based on your instructions, the ASLP11 can be powered up to control the PCI Express subnet. Or it can become a node. Which has fairly

Go to www.gefanucembedded.com for more information on the ASLP11, the one Processor AdvancedMC that’s really two.

Low-Power CPUs BoosT Boost Performance but

Keep Their Cool

A new generation of low-power processors is fueling the surge of small, powerful COM modules. Above: VIA Nano, the AMD Sempron and the Intel Centrino Atom and Hub.

43 Compact and Portable Development System Supports 6U Cards

48 Integrated Processor with LCD Controller for ExtendedReliability Applications

55 Time Code Processor Card Embraces PCI Express

November 2008

TABLEOF CONTENTS Departments

5Editorial â&#x20AC;&#x153;Digital Factoryâ&#x20AC;? Means More Than You Might Think

Technology in Context

System Integration

Low-Power Processors

Software Security

Adapt 10 Microprocessors Performance to Stay Cool

J. Scott Gardner, Advantage Engineering

Mechanisms Enable Secure, Systems 30OSSurvivable Paul Leroux, QNX Software Systems

Having It All: Processor Solutions Improving Security with Static Insider Shrink the Power, Not the Software Analysis 6Industry 14 34 Latest Developments in the Embedded Performance Marketplace Form Factor Forum 8Small Bus? Board? Or Both? & Technology Newest Embedded Technology Used by 42Products Industry Leaders Views & Comment Embedded Computer Industry 56News, Holding its Ground

Cameron Swen, Advanced Micro Devices

Solutions Engineering ATX and PCs Is King; Understanding End Use Is Critical to Embedded 20 Application Platform Options

Paul Anderson, GrammaTech

Featured Products

Module Enables Connectivity for Serial, LAN and Cellular 38Wi-Fi Modem Embedded Devices

Curtis Chang and Christine Van de Graaf, Kontron

Inside The Box: An Overhaul of Box PCs for High26 Thinking Reliability Applications Colin McCracken and Dr. Qi Chen, ADLINK Technology

Digital Subscriptions Avaliable at http://rtcmagazine.com/home/subscribe.php

November 2008

NOVEMBER 2008 Publisher

COT C CO OT O OTS TS TS

PRESIDENT John Reardon, johnr@r tcgroup.com

RAID/SAN/NAS RAID/SA AN/NAS VME/cPCI

EDITORIAL DIRECTOR/ASSOCIATE PUBLISHER Warren Andrews, warrena@r tcgroup.com

Editorial EDITOR-IN - CHIEF Tom Williams, tomw@r tcgroup.com CONTRIBUTING EDITORS Colin McCracken and Paul Rosenfeld, sf3@r tcgroup.com MANAGING EDITOR Marina Tringali, marinat@r tcgroup.com COPY EDITOR Rochelle Cohn

Phoenix International designs and builds rugged COTS Data Storage Systems that plug and play in any application -- from Multi-Terabyte Fibre Channel RAID and Storage Area Network configurations to plug-in Solid State Disk Drive VME/cPCI Storage Modules.

Art/Production CREATIVE DIRECTOR Jason Van Dorn, jasonv@r tcgroup.com ART DIRECTOR Kirsten Wyatt, kirstenw@r tcgroup.com GRAPHIC DESIGNER Christopher Saucier, chriss@r tcgroup.com

'PS PVS FOUJSF MJOF PG TUPSBHF QSPEVDUT XXX QIFOYJOU DPN t *OGP An ISO 9001: 2000 CertiďŹ ed Service Disabled Veteran Owned Small Business

DIRECTOR OF WEB DEVELOPMENT Marke Hallowell, markeh@r tcgroup.com WEB DEVELOPER James Wagner, jamesw@r tcgroup.com

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November 2008

To Contact RTC magazine: HOME OFFICE The RTC Group, 905 Calle Amanecer, Suite 250, San Clemente, CA 92673 Phone: (949) 226-2000 Fax: (949) 226-2050, www.rtcgroup.com EASTERN SALES OFFICE The RTC Group, 96 Dudley Road, Sudbury, MA 01776 Phone: (978) 443-2402 Fax: (978) 443-4844 Editorial Office Warren Andrews, Editorial Director/Associate Publisher 39 Southport Cove, Bonita, FL 34134 Phone: (239) 992-4537 Fax: (239) 992-2396 Tom Williams, Editor-in-Chief 245-M Mt. Hermon Rd., PMB#F, Scotts Valley, CA 95066 Phone: (831) 335-1509 Fax: (408) 904-7214

Advanced Micro Peripherals

Published by The RTC Group Copyright 2008, The RTC Group. Printed in the United States. All rights reserved. All related graphics are trademarks of The RTC Group. All other brand and product names are the property of their holders.

the embedded video experts

9/8/08 10:53:56 AM

November 2008

EDITORIAL

“Digital Factory” Means More than You Might Think by Tom Williams, Editor-in-Chief

hen we take a casual walk through the woods like most human beings, we tend to pay attention to the immediate surroundings, such as that rock, stream or tree that we must negotiate around. Hence the expression, “Not seeing the forest for the trees.” The forest, it turns out, is a complex ecosystem of trees, fungus, animals and their droppings, moisture, microclimates, ferns, decaying vegetation and much more. Without this totality of interaction, that tree in your way could not exist. By the same token, when we use the term “industrial automation,” we tend to think of computer controlled machines and robots connected via HMI and SCADA systems that are merrily turning out products and that can be reconfigured with software to manufacture variations or completely different products. While that concept is not incorrect, it is focusing on trees rather than the greater forest that is growing around us and evolving into the digital factory, and will become a truly integrated technical ecosystem. There is an evolving entity known as Product Lifecycle Management (PLM) that is increasingly integrating conception and specification with product design and simulation and in turn with the actual design and simulation of the manufacturing process. This, in turn, is being linked with product service, support, documentation and maintenance all the way to product disposal. In addition, it becomes involved with procurement, inventory management, sales, marketing and corporate management. This explains why the modern automated manufacturing operation will continue to hunger for ever more distributed compute power at all phases of the product life cycle. The digital factory depends not only on automated machines running real-time control software to produce products, but also upon the use and exchange of massive amounts of data. For example, sophisticated 3D computer-aided industrial design (CAID) software on desktop systems is used to specify and model the higher functions of products to be developed as well as to check conformance with regulatory requirements. That data must be seamlessly ported to more detailed CAD systems for 2D drawing, 3D modeling, mechanical and electrical development, finite element analysis, thermal modeling, validation and optimization and more. Often, manufacturing managers will want to simulate a planned operation on the same systems that are currently running an existing operation. This can be well ad-

dressed by taking advantage of the partitioning and virtualization capabilities of multicore processors. But all the design data does not fully address the issue of how the product is actually to be manufactured. That design data must in turn be used by computer aided manufacturing (CAM) systems to develop things like machining instructions for the products parts, instructions and specifications for casting, molding and the further specifications for the machines that are to assemble the parts. Production planning is then used to optimize the work flow, specify the procurement of materials and perhaps even modify the plant layout for optimal operation. A small but vital part of all this is the machine code for real-time operations of the actual manufacturing machinery. Such an integrated operation will depend on high-speed networking throughout the plant and beyond, which is why industrial Ethernet and Internet protocols are vital, and why open software and hardware interface specifications are indispensible. For one thing the process is not limited to one physical location but can be geographically distributed and coordinated. For example, if another division of the company produces subsystems for the main product, it could take the needed detailed specifications and deliver finished subsystems. By the same token—which makes open solutions imperative—a vendor who supplies needed components must be able to receive and execute the specifications of the customer yet be able to adapt local and proprietary facilities to meet the customer’s demands. This all implies a close interplay between design, development, process planning and real-time control, and that means embedded computing power everywhere in the factory environment. It also increasingly makes use of dual, quad and more-core processors. Some machines will need to be able to simultaneously run real-time control software, HMI, networking and data management software and simulation software for processes under development—all of which must not interfere with each other. The appetite for such computing power with minimal consumption of energy as such intelligence proliferates, will continue to drive innovation in terms of processors and the modules that make their integration into the digital factory easier and more flexible.

November 2008

IndustryInsider November 2008

SFF-SIG to Adopt Blade Spec to Address Mass Storage in Small Embedded Systems The Small Form Factor Special Interest Group (SFF-SIG), a collaboration of 18 leading suppliers of embedded components, boards and system technologies, has announced its intention to adopt and enhance SiliconSystems’ SiliconDrive II Blade Specification for small, rugged subsystems such as mass storage and other I/O technologies under the trade name MiniBlade. SFF-SIG is expanding its portfolio of next-generation industry standards that speed and simplify the development of small embedded systems. The design of a small embedded system requires many special technologies beyond small CPU and chipset combinations, small Single Board Computers, small I/O expansion modules and/ or small Computer-on-Module products. These designs must also be able to shrink and ruggedize mass storage, power supplies, cooling solutions and other key system component elements. The new MiniBlade Specification, created by various suppliers for embedded applications, takes the first step toward standardizing an ultra-small, mass storage solution for the small form factor embedded system market. A plug-in peripheral card that is retained with latches in its socket withstands embedded environments better than consumer-grade dongles and thumb drives. The SiliconDrive II Blade Specification was jointly developed by SiliconSystems and Samtec, Inc. The Specification now forms the cornerstone of a new SFF-SIG Working Group to define the interfaces to allow a wide array of storage, communications, GPS and other I/O products to be compatible with the MiniBlade socket. The MiniBlade Specification, to be published within the next few months, will define the mechanical form factor and interface pin definitions for MiniBlade devices. Companies interested in participating in the MiniBlade Specification definition should contact the SFF-SIG at info@sff-sig.org.

xploration your goal ak directly page, the esource. nology, nd products

90 dB dynamic range. The 16 and 32 channel cores are more flexible and adaptable than the higher IP Products ation into products, technologiesfor and Wireless companies. Whether your goal is to research the latest channel density cores, providing Apps ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you independently programmable feaInnovative Integration e you require for whatever type of technology,and Rtures for tuning, decimation, filters and products you are searching for. Interface have announced a parting and gain control, making these nership to co-market and develop products ideal for multi-protocol IP products and hardware for wireapplications. The 256 channel tunless applications. The agreement able channelizer and 4096 equiallows Innovative and R-Interface space channel cores provide a very to offer complete solutions for softhigh number of channels for celware defined radio (SDR) applicalular test equipment, surveillance tions by integrating R-Interface’s and satellite communications apIP for software defined radio with plications. Innovative’s high-performance X5 The initial offerings are family of digitizers and powerful implemented on Innovative’s X5application development tools for 400M, a PCI Express XMC modSDR development. ule with Xilinx Virtex5 SX95T The new SDR receiver prodGet Connected and dual channel 400 MSPS digiucts offerwith a range of capabilities companies mentioned in this article. tizers. System designers can buy for both narrowband and wideband www.rtcmagazine.com/getconnected the X5-400M card preconfigured receiver applications from 16 to with the receiver IP of their choice 4096 channels with sampling rates ready to use. The X5 digitizers are up to 400 Msamples/s and over

Innovative Integration and

R-Interface to Co-Market anies providing solutions now

End of Article

Get Connected with companies mentioned in this article. www.rtcmagazine.com/getconnected

November 2008

state-of-the-art high-performance front ends for wireless, RADAR and medical applications on an industry-standard XMC (VITA 42.3) PCI Express module. The X5 modules have digitizing rates from 250 Msamples/s up to 3 Gsamples/s, coupled with an FPGA computing core consisting of a Xilinx Virtex 5 SX95T with 512 Mbytes of memory. The close integration of the digitizer front ends with the FPGA computing core and PCI Express host interface, makes the X5 family an ideal platform for next-generation wireless receivers and test equipment. The products are supported by Innovative’s Malibu Software Toolset, a comprehensive package of C++ source libraries, applets and supporting tools for Windows and Linux. Each product is delivered with out-of-the-box demonstration applications that demonstrate the full functionality of the receiver. The libraries

include C++ classes that provide a complete API for the board hardware, allowing integration of the board control into the user’s application software. Innovative also offers high-performance data logging software supporting receivers capable of over 500 Mbyte/s sustained storage rates.

GreenPeak Expands Sales, Support and Integrator Network in the USA

GreenPeak Technologies, a fabless semiconductor company and a leader in battery-free and maintenance-free communication technology for wireless sensing and control applications, today announced that it has signed up a network of leading sales representatives and system integrators for its quickly growing United States customer base. GreenPeak’s chips and modules are based on the IEEE 802.15.4/ZigBee wireless networking standard, and can utilize energy harvesting to facilitate battery-free operation in a totally wireless environment, without the need for either communication or power cables. GreenPeak welcomes five new organizations to provide regional support to customers and to meet the increasingly sophisticated customer needs. The companies added to the growing team of GreenPeak’s sales partners are Cain White, EG Holmes and Assoc., Theta-J, TL Marketing and WaveSpace. In addition, GreenPeak has added four new system integrators to provide specialist services to customers who are using 802.15.4 wireless technology for their applications. AISD Inc, Digital AV, LS Research, Software Technologies Group and Talon Communications were chosen by GreenPeak to cover customer needs in low power, mesh-network and wireless applications.

Industry Insider

Kontron to Acquire Communication Rackmount Server Operation from Intel

Kontron has reached an agreement with Intel Corporation to acquire its Communication Rackmount Server operation of 1U, 2U carrier-grade rackmount and IP network security server products. The transaction, subject to regulatory review and standard closing conditions, is expected to close shortly. The Intel carrier-grade rackmount and network server team centered mainly in Columbia, South Carolina, and Penang, Malaysia, includes various employees engaged in engineering, product development, product marketing, technical support and operations. Kontron’s Management expects revenue from this new acquisition of more than USD 40 million for 2009. This acquisition is considered a strategic opportunity. This intact group in Intel, with around 70 employees, has many years of expertise in world-class server technology, including high-density mechanical and electronic design, thermal and vibration analysis, and implementation of high standards of secure and uninterruptible operations. To help ensure a continuous supply of products and a high quality of support and services to Intel customers, both Intel and Kontron will work jointly in the transition period to provide a smooth and seamless hand-over of products, projects and customer and distributor relationships. Customers will also be backed by Kontron’s strong global presence, flexible supply chain capabilities; including a high-volume manufacturing services facility in Penang, Malaysia, and engineering and technical support services. The addition of Intel communication servers will be a complement to the Kontron family of AdvancedTCA and MicroTCA communication platforms and industrial rackmount servers. It will enable Kontron to further address the needs of tier 1 and tier 2 telecom and network equipment

providers who need to deliver compelling solutions for the growing communications market. The Intel line of carrier-grade servers provides a choice of Quad-Core Intel Xeon processors based on Intel’s latest 45nm technology for industry-leading performanceper-watt processing. These 1U and 2U servers are NEBS-3 and ETSI-compliant and are an excellent choice for demanding central office environments and the limited space of highly available data centers.

Power Conversion Standard IPC-9592 Released

Association Connecting Electronics Industries has announced the publication of the first-ever power conversion standard, IPC-9592, Requirements for Power Conversion Devices for the Computer and Telecommunications Industries. The 75-page specification covers the complete range of power conversion product attributes, including product specifications and document requirements; design for reliability; design and qualification testing; and manufacturing conformance testing. “With the release of IPC9592, the power supply industry will have a standard that will facilitate communication between the customer and supplier at a level that is unprecedented in this industry,” said Dr. Scott Strand, senior technical staff member, Integrated Technology Delivery Quality, IBM. Strand is also chairman of the IPC Power Conversion Devices Standard Subcommittee, which was formed specifically to address industry concerns, and comprises representatives from leading OEMs and power conversion equipment suppliers, such as Alcatel-Lucent, Cisco Systems, Dell Inc., Emerson Network Power, Hewlett-Packard Co., IBM, Lineage Power and Murata Power Solutions. Now that the standard has been released, Newton is quick to point out that the work of the sub-

committee continues. “It was important to get this document out to industry, but there are additional areas that must be addressed, so we’re already back to the table working on revision A of the document,” Newton explained. IPC member companies may request a free copy of IPC-9592 within 90 days of its publication. Following the introduction period, members may purchase a copy for $40. Nonmembers may purchase the new standard for $80. For more information on IPC-9592, visit the IPC online bookstore at www.ipc. org/onlinestore.

VIA Launches Program to Drive Mobile Computing Adoption

Via Technologies has announced the Global Mobility Bazaar (GMB), an industry infrastructure program aimed at driving the rapid global adoption of affordable mobile computing devices. Through the GMB program, Via is partnering with over 15 GMB manufacturers and infrastructure partners in China on the development of a wide variety of mini-notes, netbooks and notebooks based around Via’s ultralow-power processor platforms. Equipped with the Microsoft Windows XP operating system, these systems will deliver an optimized mobile computing and Internet experience across a variety of form factors with screen sizes ranging from 7” to 15”. “As the fastest-growing segment of the PC market, mobile computing offers significant opportunities for the members of our new Global Mobility Bazaar program,” said Richard Brown, vice president of marketing, Via Technologies, Inc. “We are excited to be partnering with them to develop a broad spectrum of devices that will meet the increasingly sophisticated demands of mobile users in both developed and emerging markets. The Via Global Mobility Bazaar was established as part of Via’s long-term commitment to inspire innovation in mobile com-

puting devices by sharing its leading-edge technology and expertise in power-efficient x86 processor platforms. More than 15 leading Chinese manufacturers are participating in the Via Global Mobility Bazaar, as well as infrastructure partners SanDisk, American Megatrends (AMI) and ITE Tech. A key focus of the Via GMB program is to bring innovative mobile computing devices to fast-emerging markets around the world, as well as within China. These markets are among the fastest growing in the world and are developing a keen appetite for mobile computing.

Small Form Factor SIG Names Paul Rosenfeld President

The Small Form Factor Special Interest Group (SFF-SIG), has announced the selection of industry veteran Paul Rosenfeld as its new president. Colin McCracken, the cofounder of the SFF-SIG, has moved to a senior marketing position within the industry. “I’m pleased to be joining the Small Form Factor Special Interest Group (SFF-SIG) as its new president,” said Mr. Rosenfeld. “My 35+ years of experience in the electronics industry in engineering, marketing and senior management positions along with participation in the development and adoption of new specifications for the embedded market both as a consortium director and with private companies, gives me an excellent background to drive the SFFSIG to the next level. As the Small Form Factor arena explodes with new opportunities and technology, the time is ripe for a new industry trade group to step up to the plate to define long-lived, state-of-theart, widely implemented standards in an open, inclusive organization that values the participation and contribution of all members.”

November 2008

SMALL FORM FACTOR FORUM

Bus? Board? Or Both?

eflecting back upon this first year of SF3, it’s clear that 2008 has been tumultuous to this community of small form factor developers. You could describe it as a whirlwind, perhaps a wildfire, hurricane, tornado, hailstorm, tsunami, or any other natural disaster. Beginning with February announcements at Embedded World in Germany, the birthplace of the more popular computeron-module (COM) architectures, we’ve been faced with nothing short of “Menlow-mania.” Express-this, express-that, tiny millimeters, etc. along with a sprinkle of “Nano-mania” from VIA for good measure. With this new crop of one-offs and pseudostandards, hopes for form factor consolidation may be dashed forever. We may as well replace the term “small form factor” with a single word: “Custom.” We wind up 2008 with a philosophical discussion in SF3. Large form factors come with standard board outlines, mounting hole locations and off-board connector locations. These must be standardized in order to fit into off-the-shelf card cages and desktop enclosures. Deviating from the standards in any way eliminates the ecosystem—a non-starter in that market. Conversely, small form factor boards go into many unique applications using both standard and custom enclosures. Perhaps standards are less important in this small form factor world. A serious problem lurks for the tiniest of tiny boards. Three-chip x86 solutions generally can’t fit, depending on how much legacy I/O is added. Up to now, promoting a product as “PC/104” on a datasheet meant standards compliance for both the board outline and the bus expansion. So “wings,” multiboard stacks and other form-factor “extensions” have emerged, a sore subject for keepers of the specification and unofficial compliance police. Worse yet, new expansion buses are exploding onto the market to the tune of every possible permutation of bus architecture and I/O signal set. Surprised customers are left asking: “Is it a bus standard, a form factor standard, or both?” The uncertain economy puts pressure on new development budgets this season, so design reuse may become a dominant system requirement in 2009. This leads us to ruminate over the question: “Does anybody care about industry standards?” Maybe the notion of form factor standards in the SFF market is obsolete. In the new “embedded world order,” inventors deliberately choose to construct proprietary designs, or multi-source by bringing along one or two smaller com-

November 2008

petitors. While sharing with these competitors may mean losing the time-to-market advantage, it generally brings limited competitive risk. Chip vendors’ early access programs widen the gap between large and small suppliers, further challenging industry trade groups that can’t get access to new design information until months after preferred suppliers have started their proprietary designs. Is there hope for equal design opportunity beyond the form factor inventors themselves? If this 2008 trend continues, it points toward the gradual demise of the various formal SFF trade groups and the institutionalization of the rules of the Old West where the only rule is that there “ain’t no rules.” Perhaps it’s not all bleak. Stepping into our customers’ shoes, “reuse” starts at the system and enclosure level. An obsolete stack of boards can be replaced by a new stack provided that the mounting scheme and the dimensions are the same. The new stack can even include a COM solution by using a COM on a stackable carrier. From this enlightened perspective, board outlines and mounting scheme standards are critical to preserve, while interconnect buses can come and go with each new chipset. You don’t need to hold back the chip-level innovation as long as form factor and mounting schemes remain the same. It also appears that COM sizes are less important than their carrier board outlines and their interfaces (for interchangeability). In this new legacy-free and ACPI domain, true COM second sourcing is proving to be a huge pill for a huge trade group and COM industry to swallow. The PC architecture was never intended to be partitioned the way COM standards have evolved. One solution is to separate the board outline standard from the bus standard. As buses come and go, and they do so more frequently now, the board form factors shouldn’t have to change. Board form factor standards can last for decades. Many of these divergent standards can become one form factor standard with a dozen expansion options. While competitors hesitate to collaborate on new bus interfaces, new form factors are low-tech and rarely needed by customers. Board vendor datasheets should mention the size or standard outline first, and then enumerate the myriad of expansion interfaces available. Are trade groups chasing the wrong problems? Let us know your perspective by e-mailing to sf3@rtcgroup.com.

Colin McCracken

&s f Paul Rosenfeld 3@r tcgroup.com

Technology In Context

Low-Power Processors

Microprocessors Adapt Performance to Stay Cool The newest microprocessors from AMD, Intel and Via adapt performance parameters to match real-time energy constraints in embedded systems. Via’s “Adaptive PowerSaver” technology has been enhanced on the company’s Nano processor. by J . Scott Gardner Advantage Engineering

he x86 processors have gotten smarter about power management, and embedded systems won’t ever be the same. With fewer transistors, RISC chips appeared to have an unassailable technical advantage that x86 and its architectural baggage would never overcome. Why are the RISC chips now battling x86 for the heart and soul of the embedded market? Setting aside the cost improvements and market shifts that exploded demand for PC functionality in embedded formfactors, a number of technical issues are eroding RISC’s advantage in power consumption. While it is true that the inherently simpler RISC designs require fewer transistors, the newest x86 CPUs are able to reduce active and static power losses by enabling smarter power-control algorithms that adapt processor performance and power consumption to match realtime software workloads. With adaptive power management, embedded system designers can create products that dynamically match CPU performance to thermal, electrical, acoustic and physical design constraints. This holistic design approach brings a greater degree of flexibility and cost savings from design reuse, since a single compute platform can scale up and down into multiple products. An adaptive system uses feedback to modify itself and match the needs of the

November 2008

Maximum Frequency

Intermediate P-States

Frequency Minimum Frequency

Min P-State

Deeper Sleep Voltage

Figure 1

Max P-State

Minimum Voltage

Voltage

Maximum Voltage

Standard P-State Diagram showing voltages and frequency pairs for power management.

system being controlled. Early efforts at PC power management introduced “operating system directed power management” (OSDPM) to direct the CPU and peripherals into lower-performance (and lower-power) operating and idle states. Often called “dynamic power management” (DPM), many embedded products employ a similar approach. ARM customers can license the Intelligent Energy Manager to monitor software workloads and control CPU performance and power consumption. While workload monitoring is a good first step, an adaptive powermanagement system puts the CPU itself in the middle of a control loop that adapts CPU parameters in response to real-time changes in the power environment. Many customized RISC-based designs undoubtedly employ some of these sophisticated

power-control techniques, but the new x86 CPUs are deploying adaptive features on high-volume standard products. Embedded system designers can examine Via’s Nano CPU to analyze the future of adaptive power control. Even for designers considering other x86 or RISC CPUs, the flexibility of Via’s features offers insight into how this technology will evolve. The company first introduced Adaptive PowerSaver on C7-M processors, but its high-performance flagship, Nano (see sidebar: “The Nano Processor”), has extended the technology to include more real-time CPU control. Adaptive PowerSaver consists of control system features for both P-State control and thermal monitoring. P-States (performance states) define a range of operating frequencies through which the operating system can shift in response to changing workloads (Figure 1). Basic thermal monitoring allows the CPU to automatically throttle back performance if on-die sensors detect high temperatures. Every CPU vendor is tweaking P-State control and thermal monitoring, but Via’s Centaur design team has always focused on power efficiency. The CPU designers were early to recognize that P-States and thermal monitoring were mechanisms that facilitate the inevitable shift to adaptive control of CPU parameters in a real-time environment.

Technology In Context

The Nano Processor

P-State Control in Adaptive Systems

P-States are static tables that are stored as pairs of bus multipliers and voltage IDs (VIDs). The table is organized with state “P0” defined as the highest-performance state. At manufacturing time, CPU vendors guarantee that the CPU will operate reliably

Speculative In-Order

Memory Subsystem

Branch prediction

I-cache

Decode x86 instructions FIQ Translate x86 instructions

microcode

uop queue L2-Cache

Rename & allocate into Reservation Stations

bus Issue from each RS to functional units

Out of Order

Via’s flagship microprocessor incorporates the newest Adaptive PowerSaver technology into a power-efficient design with the architectural features required for high-performance computing. Pincompatible with Via’s C7 microprocessor, Nano gives embedded designers the performance headroom to build scalable designs that can be reused across multiple products. The following list highlights some of the technical features that allow high performance for secure computing, media processing and other computationally intensive applications: • 64-bit superscalar, out-of-order architecture • Bus speeds up to 1333 MHz • Hardware Virtualization (VMX) • VIA Padlock Security Engine • Multi-processor support: Dual processing (SMP) • MMX, SSE, SSE2, SSE3 and SSSE3compatible instructions • Two large (64 Kbyte each, 16-way) Level 1 caches • 1 Mbyte Level 2 victim cache (16way) with ECC • Advanced L2 Hardware Prefetch • Two large TLBs (128 entries each, 8-way) • Branch Target Address Cache with 1k entries each identifying 2 branches • Unique and sophisticated branch prediction mechanisms

ROB MOB arch regs

ST M A

M B

result forwarding network Data prefetch engine

Program Order

Retire uops/x86 instructions

•V ery small die: ~60 mm2 in 65nm technology While the nomenclature may change for future devices, current Nano devices include a “+” in the part number to indicate the ability to over-clock to a faster speed. For example, the “VIA Nano

at every combination of frequency and voltage in the P-State table. While the operating system has information about the software workload and can direct the CPU into a lower-performance state to save power, system software cannot react fast enough for real-time optimization in response to changes in the thermal environment. To ensure real-

vsm

D-Cache data prefetch engine store q WC buffer

Power & thermal managment

U2400@1300+MHz” can be enabled to automatically jump to 1.6 GHz when the transistor junction temperature is below the thermal threshold. See the Via Nano datasheet and BIOS and Kernel Writer’s Guide for the technical details. (www.viatech.com).

time performance and protect the CPU from damage, the adaptive control system executes on the CPU in dedicated hardware. The P-State table is defined to guarantee performance at the worst-case thermal design point (TDP). CPU on-die sensors provide feedback to adapt the P-State parameters and take advantage of real-time thermal headroom. November 2008

Technology In Context

Adaptive PowerSaver technology includes a number of flexible features to allow system designer control over how the CPU adapts to take advantage of thermal headroom. If the CPU drops below a factory-defined temperature, then an adaptive control system can take advantage of that thermal headroom to either save power or improve performance. If saving power is more important than performance, Via’s Adaptive P-State Control can be enabled to automatically shift to a lower voltage while keeping the same P-State bus multiplier. Via engineers like to describe this as “parallax,” since the entire P-State table is shifted to the left when the CPU is operating in a system with thermal headroom (Figure 2). The voltage is shifted down by an offset value that is set at manufacturing time. Without Adaptive PState Control, a CPU would waste power by running at the voltage required on the worst-case performance line. Instead, Low Temp Shift

Maximum Frequency

Frequency

Max P-State

Low Temp P-State Line Inflection Ratio

Minimum Min Frequency P-State Minimum Voltage

Figure 2

Intermediate P-State High Temp P-State Line

Voltage

Maximum Voltage

Adaptive P-State Control reduces voltage while maintaining the same frequency.

the CPU is able to transparently deliver identical performance at lower power consumption. Keep in mind that thermal headroom may be a response to a lower software workload. Long before system software could detect the new workload and signal a P-State change, the adaptive control system on the CPU could start saving power. Figure 2 also highlights the use of an “inflection ratio,” mapping PStates to closely match the device yield curve and allow better performance efficiency than the simple linear mapping shown in Figure 1. Instead of using thermal headroom for lower power, a technique called

Untitled-4 1

November 2008

11/11/08 5:47:24 PM

Adaptive Overclocking allows a performance-focused approach to adaptive power control. If the CPU measures a temperature below a factory-configured threshold and Adaptive Overclocking is enabled, the CPU will shift to a higherperformance P-State automatically (Figure 3). The higher P-State will have an accompanying increase in power consumption, but the system improves performance to the limits of the realtime thermal environment. Note that the overclocked P-State may not necessarily require a higher voltage. Other x86 vendors are introducing similar “turbo mode” features for high-end PC microprocessors. Via has disclosed a lot of flexibility in Adaptive Overclocking technology, though some of the extra options may not arrive until later versions of Nano. The system software is allowed to choose how P-States transition when thermal headroom allows a boost in performance. The P-State table can be structured with P0 corresponding to the “turbo” speed, while slower P-States get used when the CPU is running hot. If the user wants P0 mapped to worst-case power, special turbo P-State registers are provided that store performance settings for the times when the CPU is running cooler. It will be interesting to see how embedded system designers implement their systems.

Thermal Monitor Control in Adaptive Systems

Thermal monitoring has evolved beyond simple Stop/Grant throttling, referred to now as TM1. On CPUs that support dynamic voltage scaling, a TM2 mode was defined that throttles performance by shifting to a low-frequency state with an accompanying lower voltage. The throttling was originally defined to keep thermal transients from exceeding the maximum CPU case temperature. Embedded system designers often use CPU throttling as a form of adaptive power control in thermally constrained systems. Via has introduced Adaptive Thermal Control, and also describes the new features as TM3 to highlight the differences from TM2.

Technology In Context

Taking a longer view, adaptive power management will become pervasive on all CPUs. The designers will begin to control more performance and power parameters than just frequency and voltage. Chip designers already power down portions of the CPU during sleep

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Max Freq (T<Tp)

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Max Frequency (T>Tp) Frequency

Adaptive Thermal Control adds user control of the thermal threshold for throttling. This allows system designers to tune the thermal environment within specific constraints, knowing that the CPU will automatically take advantage of all available performance. Adaptive control goes a step further by keeping the CPU speed at the maximum level allowed by the thermal setting. This is more responsive than TM2, which always drops to a minimum performance state until the CPU cools down. With Adaptive Thermal Control, embedded system designers gain some interesting capabilities for managing design constraints. While there is an obvious benefit to guaranteeing the maximum heat produced by the CPU, system designers can also use Adaptive Thermal Control to control other system variables. For example, if the thermal environment is well understood, then a system designer also gains the ability to control the maximum CPU electrical current. If the system constraint is acoustic, then the CPU performance could be directly controlled by adjusting fan speeds. The CPU would run at the highest performance possible within the acoustic noise budget. With an adaptive system, the CPU automatically provides the maximum performance within the design constraints being used as a control variable. Design reuse becomes a huge cost saving, since a single design with performance headroom can be tuned to fit into multiple products. Embedded system designers will certainly find many interesting applications for this capability. Looking into the near term, there are some announcements on the horizon. Via wasn’t yet ready to disclose a new adaptive control feature to maximize performance while maintaining a constant battery life. Instead of controlling for maximum power consumption, this technology will adapt performance for a maximum average power. This will add a new dimension in adaptive power control and should be a welcome innovation for mobile systems. Via also plans other near-term power-management enhancements that will be introduced on its Nano processor.

Inflection Ratio

Min Frequency

Intermediate P-States

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states, but they may begin to dynamically control power during the operating state (C0). A simplistic example would be to turn off or reduce the frequency and voltage to the floating-point unit in slower P-States. This type of control may introduce latency to P-State transitions, but the active power savings may be substantial. Power management will need to become even more sophisticated. Adaptive power control will present increasing challenges to operating system developers, since power control algorithms need to run in real time and be very close to the CPU. Embedded system designers are very experienced in these real-time issues, and embedded systems engineers may be the ones to drive the next wave of x86 innovation.

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November 2008

11/17/08 3:32:27 PM

Technology In Context

Low-Power Processors

Having It All: Processor Solutions Shrink the Power, Not the Performance Solutions exist that give designers ample flexibility to design scalable, x86based, low-cost and feature-rich products, and drive energy conservation into their systems without compromising application performance or compatibility, graphics performance or features. by C ameron Swen Advanced Micro Devices

ith the proliferation of more electronics and high-technology equipment into our lives, it’s almost impossible to name a product not subject to power restrictions or wish that it could use even less. From servers to handhelds and multimedia consumer products, as a designer, the power budget had better be up to speed and ready to put some green back in your customers’ pockets, whether it’s in the form of a smaller electric bill or longer battery life. Low power requirements may have snuck into your design at one time or another, but designing for future systems has pushed low power out of the “nice-tohave” category and into being a requirement for many customers. Can you deliver a design that is destined not to outrun the cost of your customer’s energy inflation?

Places to Find Power Savings – Except in Your Design

When your customers want to “shrink their energy costs or thermal dissipation…now!” does that mean fewer features? Before determining the impact on your design, a major aspect of power reduction analysis is the customer’s operating model: what is the customer’s operating environment and what forces is the system exposed to? Temperature, hu-

November 2008

midity and other factors can wreak havoc on a design and its low power objectives. Your customer may have already worked an analysis that allows them to reach their goal. All that’s needed then is to match that up with your design. Simple, right? As a solution designer, why is low power the priority? Is the customer establishing new platforms for different markets and weighing low power as one of the values? Are existing solutions being redesigned with minimal feature-add but with emphasis on power consumption? What is the customer’s timeframe to have improved, low power designs? How “low” is low enough?

Places to Find Power Savings – in Your Design?

With customer needs assessed, you can now evaluate what approach and, more importantly, what balance of performance, features and power will be needed, whether it is a new design, redesign or non-hardware improvement for power. Any improvements for lower power can impact your hardware, software and firmware design, and it’s at this point where, as a designer and solution provider, you need to decide the trade-offs in performance, features, architecture, scalability and cost.

DDR2 Memory Interface

HyperTransport Technology Interface

DDR Memory Controller

HyperTransport Technology

Cross Bar Switch System Request Queue

L2 Cache 64 KB L1 Instruction Cache

64 KB L1 Data Cache

AMD64/ Processor Core

Figure 1

AMD64 processor chip architecture.

Faster is better. Or is it? Lower speed does not always mean lower performance. Your customers like the sound of it but, of course, more GHz can impact your low power budget and may not be necessary for your application. Designing for lower power often requires you to consider using lower speed CPUs and (more) power

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Technology In Context

AMD M690T/E North Bridge CPU

CPU Interface

A-Link-E II Interface (1x4 Lanes)

External Graphics

PCIe Gfx Interface (1x8 Lanes)

Expansion Slots or On-board Devices

PCIe GPP Interface (4x1 Lanes)

HT Unit

Root Complex

Memory Controller ATI Radeon x1250 3D Graphics Core

TMDS enabling DVI/HDMI (multiplexed on PCIe Gfx Lanes)

Overlay

LVTM port for LVDS or TMDS (must be LVDS on M69OT)

MUX

VGA/CRT Display 1&2

Analog TV with Macrovision (M69OT only) Digital Video Output (DVO)

SB600 South Bridge PCIe x4 PCI 2.3 33MHz

10 Ports

USB

2 Devices

PATA

4 Devices

SATA CNR

USB 2.0 ATA 6

SATA 2.0

SPI

ROM

SB600 South Bridge HWM I/F

LPC 33MHz BIOS ROM

November 2008

11/10/08 10:36:52 AM

PAR

FDD

PS/2

AMD M690T/E and SB600 chipset feature diagrams. Graphic from 42656B, introducing the AMD M690T and AMD M690E chipsets for embedded designs.

management modes, without having to cut corners to meet low power requirements. And then there are graphics. Some embedded applications may not require graphics, but it is increasingly becoming a requirement. What level of graphics is re-

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Hardware Monitor Circuitry

ACET 2.3

SER

Figure 2

6 PCI Slots

quired? Should you be prepared to sacrifice features like on-board graphics buffers and HD support while trying not to cripple user interaction and incur OS slowdowns? Does the graphics solution you choose need to support future product enhancements?

Technology In Context

Next, how can you keep up with the latest and greatest feature trends while keeping power in check? Industry buzzwords like PCI Express v2.0, Gigabit Ethernet, SATA-II, USB 2.0/3.0, DDR2/DDR3 all scream for more power draw. Customers and buzzwords are a great combination, but implementation and design into your system may not be. Are integrated chipsets with these features readily available, delivering performance while being more power efficient than discrete devices? Armed with your performance, power and feature requirements, talk to your chip suppliers to understand what solutions they offer that meet the power and performance requirements without sacrificing your feature requirements. If your architecture choice is x86, which is already a low power industry focus, then one of your trade-offs can be scratched off your list. While not the only architecture around, the x86 architecture has remained popular for designers and customers looking for code stability, breadth of hardware, software and applications, and performance, as well as scalability in many cases. As a result, these benefits have not only pushed x86 into new markets outside of standard PC computing, but also markets that are more power restricted. These markets include telecom and data networking, storage, thin clients, point-ofsale and kiosk systems, industrial, ruggedized and military systems, standard form factor boards, and so on. Designers in these markets are constantly tackling new ways to deliver performance and features while helping to minimize power draw. Finally, cost is always a factor. Choosing the cheapest solution, which doesn’t meet all of your requirements or sacrifices features, can be more costly in the long run. You should carefully define your requirements and what your solution must have before considering the options.

Uncompromised Features at Low Power

As markets have evolved on the value of lower power, AMD has developed a higher performance, low power portfolio of AMD64 x86-based solutions (processors, chipsets, power management and software). The embedded line now includes products from the Opteron, Athlon, Sempron and Tu-

rion processor families, which are designed to solve unique power design challenges, particularly as industry standard forums define equipment limits for many embedded markets such as telecom applications. Embedded CPUs such as the AMD Sempron 2100+ and the Athlon X2 3400e processors are based on the same eighthgeneration performance architecture that AMD pioneered with the high-performance Opteron processor family, and in

very low power ranges starting at 8W TDP for 1.0 GHz and at 22W thermal design power (TDP) for 1.8 GHz dual-core products. The out-of-order processor pipeline with branch prediction and superscalar architecture in the low power products is identical to every other 64-bit AMD processor, and is able to execute many calculations at the same time. Processor power consumption is typically recorded as thermal design power, or

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Untitled-4 1

The Intel® Processor Board Specialists

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Technology In Context

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TDP, which is the maximum power a processor can draw for a significant period of time in its application using real-world application suites of software (as contrasted to specific software designed to exercise CPUs and only used in test environments). A TDP number is not a typical draw, but is instead a maximum draw by the CPU, and includes many key built-in functions. AMD 64-bit processors include the memory controller on the same die, thereby incurring no extra power penalty for the memory bus, which supports DDR2 (and Active state

SBCs

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fort across hundreds of servers, and the pennies can add up to substantial savings both in terms of annual power and cooling costs. With CPU vendors realizing the energy expense, almost every CPU has power management features available for designers to reduce power, such as frequency and voltage scaling. AMD processors offer PowerNow! technology and Cool’n’Quiet technology, both of which gauge how much performance is needed for the demand at hand and scale the voltage and frequency while the CPU is active.

Embedded AMD Turion X2 TL-62

Embedded AMD Athlon X2 3400e

Performance (Mhz) Thermal Design Power (W)

Max P-State

2100 Mhz

35.0W

1800 Mhz

22.0W

Intermediate P-State #1

2000 Mhz

30.1W

Intermediate P-State #2

1800 Mhz

26.4W

Intermediate P-State #3

1600 Mhz

23.0W

Minimum P-State

800 Mhz

9.4W

1000 Mhz

10.8W

Halt/Stop Grant State

Halted

3.0W

Halted

3.0W

C1E / S1 State

Halted

350mW

Halted

350mW

S3 State

Halted

200mW

Halted

250mW

Legend:

Table 1

Blue states: Processor is active and operating. Green states: Processor is in a power-save, inactive mode.

AMD PowerNow! technology table for AMD Embedded mobile and desktop products.

IC-DC2-VMEa Intel ® Duo Core 2 ®

Subsystems s

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Communication Platforms

Synch/Async y y serial ports p / LAN

DDR3 planned for use in future families) memory (Figure 1). The high-speed memory bus is fully separated from the HyperTransport I/O bus and, therefore, is designed to not restrict system performance. While other architectures may require a separate memory controller, sometimes called a Northbridge, AMD CPU TDPs reflect the combined CPU, integrated DDR2 memory controller, large L1 and L2 caches (starting at a minimum of 256 Kbyte L2) and HyperTransport bus power consumptions.

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Untitled-7 1

November 2008

10/9/08 10:11:53 AM

How well do your systems save power when active and in standby mode? Are you using power management at the hardware level? Keeping systems on all the time is sometimes vital as with 24x7 uptime applications and most server farms. Add more processors and multicore products to these scenarios and, suddenly, there are a lot of CPU cycles on all the time. Multiply this ef-

Benefits include helping to reduce TDP by up to 73% for idle/standby conditions, as well as reducing the load on the thermal cooling systems. These features are designed to continuously check the processor and adjust its frequency and voltage to meet the application’s needs, whether it is powering down or ramping up performance to tackle that next routine. Adjustments are performed according to valid combinations of operating voltage and processor frequency, defined as P-States (or Processor Performance state) listed in the processor datasheets. Mobile processors offer many more P-States due to the battery applications they are designed for, but P-States also make them popular in the embedded markets to help achieve a true CPU power reduction without sacrificing functionality. Tethered applications can realize power savings with desktop processors as well. Table 1 shows AMD embedded processors P-State examples.

Technology In Context

CPUs also include support for the Advanced Power Management (APM) model and its more modern successor, Advanced Configuration and Power Interface specification (ACPI). ACPI S-States help enable many system components to be powered down while the system is inactive. In Table 1, AMD processors support ACPI S1 states—reducing power to all components except CPU and RAM— and S3 states—powering off the CPU but not RAM. ACPI is widely used and implemented in many operating systems to allow user-controlled power downs. Your programmer should consider entering these low power states between inactive operations even if the idle time is short. In summary, AMD PowerNow! technology and other power management options are used to help further reduce CPU active power, and designing for these modes in hardware and software allows your customers to benefit from the power savings.

consumption while offering a very good graphics experience. For the remainder of seemingly powerhungry I/O functions, including USB, Serial ATA/IDE and audio, the ATI/AMD SB600 Southbridge delivers functionality with ACPI support, managing only 2W for a fully feature-enabled system. The M690E and SB600 combination helps enable design scalability, in that they can be used with any AMD 64-bit processor. Pulling

the pieces together for a low-power, fullfeatured solution, a single-core 1.0 GHz solution with the AMD M690E chipset can be had for below 12W average, while 1.0 GHz dual-core solutions can start at below 14W average, excluding memory. Advanced Micro Devices Sunnyvale, CA. (408) 749-4000. [www.amd.com].

More Features, without Draining More Power

What about the rest of the CPU subsystem, such as the graphics coprocessor and Southbridge chips? Features such as DVI, HDMI and good graphics performance are now becoming standard for many applications but, for low power, it is most efficient if those features are integrated into the chipset. With the acquisition of ATI Technologies in 2006, AMD augmented its portfolio of graphics solutions paired with its CPUs, focusing on optimum performance with lower power consumption. In particular, the AMD M690E chipset for embedded applications provides full functionality (read as superior graphics performance with many display options) with a very low average power draw of 3W (Figure 2). Stepping up in performance is the AMD 780E chipset with ATI Radeon HD 3200 integrated graphics delivering superior graphics performance. Leveraging the performance of this chipset enables high-definition video decoding to be performed in hardware, helping to minimize power consumption. It also offers a 3D experience with average power consumption around 5W. Advance power management mode support in the chipsets can further reduce power November 2008

solutions engineering

ATX AND PCs

Application Is King; Understanding End Use Is Critical to Embedded Platform Options Deciding on compute power, size and variety of custom and standard I/O—whether to go with a COM module or an embedded motherboard—requires an in-depth understanding of the needs of the application. by C urtis Chang and Christine Van de Graaf Kontron

mbedded designers face more computing demands than ever before— processing power, thermal considerations, time-to-market—and their efforts are both supported and challenged by an incredibly broad and expanding range of options for shaping their designs. Computer-on-Modules (COMs) and small form factors can address specialized I/O, increased computing power and space constraints with design flexibility. They are ideal for a broad range of embedded applications where they fit mechanically, economically and functionally. Standardized solutions like embedded ATX—ATX with an embedded chipset—can deliver performance, cost efficiency and a shorter design cycle, in turn suitable for applications that can leverage what the board has to offer without extended design time or big design budgets (Figure 1). Because each approach has its own advantages and disadvantages, application-specific requirements are the deciding factor and the first step in unraveling a complicated landscape of design options. Selecting a computing platform can in fact be the most critical step in the design process. Both ATX and COM solu-

November 2008

Figure 1

An ATX motherboard for use in embedded applications comes with an embedded chipset in a number of physical form factors and a range of standard I/O interfaces on board.

tions offer full features and their own versions of design flexibility, either through complete customization or by deft use of standard but robust industrial board components. Almost all implementations, whether they are customized COMs or ATX, offer the high-end communication capabilities that are becoming a requirement for most products. In many cases, it comes down to what designers are famil-

iar with, what level of make vs. buy applies and most importantly, what the end application dictates as its highest priority form and function.

Making Good Choices

Just about any embedded design platform has high-end graphics, Gigabit Ethernet, SerialATA, PCI, and for the most part PCI Express. What makes

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SOLUTIONS Engineering

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An EXTexpress board is an example of a COM module, which contains the main computing elements (CPU, chipset, memory, etc.) of the system, but which connects to a custom or semi-custom carrier board that implements the specific I/O technology.

the difference is how the technologies that are available in each of these products are used in the end application. For example, ATX is a single board solution, and because it is a motherboard it is larger. COMs can be small, and used anywhere from something that fits in the palm of your hand to the size of an ATM machine. But they can still use the same technology at their cores, so they both have their strengths and their unique place in a design. They are very different and used for different reasons, frequently based on a range of external factors that impact design choice. For ATX, the customer wants or needs to spend less time and money on design, and needs to fully leverage what the board has to offer with its fully developed features and low cost. ATX is a perfect fit in stationary systems that don’t require customization, but need flexibility from one generation to the next, as well as readiness for interface change from one design to the next. Hardware customization adds to cost and doesn’t always make sense to do, especially with smaller runs of product. With ATX solutions, however, designers don’t need to be concerned with whether or not they will be built in quantities of thousands or if they can maintain a three-year lifecycle; they can be smaller quantities because they represent a standard off-the-shelf product.

A designer would choose a COM solution if their requirements included a lot of application-specific customization and they could afford a two-board solution (module plus custom carrier board), a high run of product and the need for some scalability from generation to generation. COMs work well for devices that not only require scalability from generation to generation, but also within a single generation. When an application requires something special that is not typically found in a standard motherboard, those computing issues can be customized into a COM’s accompanying carrier board, which allows for easy transitions to future generations (Figure 2). Modules contain a standard off-theshelf product within the module core itself. Customization is designed into the module’s carrier board and can last for generations with various CPU cores. If the design plan includes multiple variations of a product within the same generation, perhaps with different performance capabilities, designers can use the same carrier board for those variations by just changing the module used with it.

Function Defines Solution

Industrial automation—for example, an automotive production floor or even a CPU manufacturing environment—requires a look at end use in order to determine which

SOLUTIONS Engineering

solution goes behind the design. In many instances, big heavy robots are completing some process, and the automation factor refers to how they are being told what to do and how to do it. These robots need to be “smart”—meaning they must be able to provide information back to the operator, including data on the number of items completed as well as successes and failures in the production line. Once a product is completely manufactured, it is moved off the production line into a storage area. The tools that are used to move it from one place to another may involve tracking and continued feedback to the operator indicating how many completed products are being moved and are now considered “in stock.” There are elements within these machines that are small, for example, the subsystem, and elements that are much bigger. That tool that goes on the vehicle that moves product off the line and into the storage area might be a module. The actual arm that is moving to build the unit communicates with a bigger box, whether it’s in a server or maybe a special kind of display, and it may be large enough to contain an ATX motherboard. In contrast, displays that a person has to touch are likely candidates for modules or perhaps a smaller single board computer.

Applications Drive Design

Medical imaging is perhaps one of the most interesting and growing application areas for embedded design. Devices here require high performance. More and more often they require mobility, and they require small size so as not to be intrusive with patient care. For example, an imaging application that in the past has run on a cart, now needs to be developed on a smaller scale. Its carrier board has been customized to talk to the components that run the actual image capture, and now designers want to shrink down that entire process into a smaller device. Designers know that the CPU, chipset and other existing components have optimal function; they can keep using the COM they are familiar with and modify the carrier board to accommodate a new, smaller size. Core elements remain the same, designers avoid re-spinning drivers for change of hardware, while comput-

ing function is simply ported over to the smaller design. COMs allow a very strong path from medium-sized devices into smaller and smaller ones. But size is not always an issue, as in the case of room-sized imaging equipment. These machines are computeintensive, but have no requirement for size constraints or considerations. So, for designers deciding on motherboard vs. module for a medical device, a big ques-

tion is how big the unit is being designed. In room-sized MRI machines, size is not a concern, but in portable or cart-based devices, or ones that need to fit into the pocket of medical personnel, COMs are generally more suitable. The important trend here is the reduction in size of devices, as well as the reduction in size of components that can go into a design. Size is typically not a limitation with a motherboard; it can easily

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4:28:41 PM

SOLUTIONS Engineering

The ABCs of ATX ATX as a form factor is well established; desktop PCs have relied on ATX since its development and launch by Intel in the mid-1990s. ATX evolved from the Baby-AT form factor and was developed to enhance ease-of-use, provide better support for current I/O and processor technology as well as a path to upgrade for both, and ultimately, to reduce overall system cost. In its embedded incarnation, ATX is available in a number of smaller form factors in addition to its original 12-inch x 9.6-inch size. With its industry standard specification, ATX delivers economy to the design process, reducing costs for motherboard development, chassis design and enclosure design and tooling while at the same time supporting industry trends toward designing with standard, high-volume motherboards. The idea is for designers to use ATXâ&#x20AC;&#x201D;a PC standard board with the embedded chipsetâ&#x20AC;&#x201D;as a full-featured yet low-cost solution. While not flexible to a customized extent, its various available configurations can address the right features for the right design. With fixed PCI slots, designers have a fast starting point and can readily plug in proprietary cards, access four to eight USB ports and a dual gigabit main port, all leveraging powerful onboard I/O. ATX provides longevity and industrial-grade components on the board. The specification allows for an expanded I/O region with a front panel I/O header, meaning greater system flexibility and reduced manufacturing and tooling costs. ATX offers support for various thermal solutions to fit multiple form factors, and is compatible with existing ATX specifications, using a standard ATX power supply connector, ÎźATX-compatible board size and mounting holes and an expanded ATX I/O region. With the ability to choose from a variety of standard configurations, designers can take full advantage of processor performance, I/O functionality, advanced memory control, and a range of other standard and fixed features. Competing ATX boards can be differentiated with these features, and this may be where the end use design requirements require the deepest evaluation and understanding. For example, some ATX boards include additional PCB stacking or offer remote hardware and hard disk monitoring control through API software utilities. By incorporating ATX with high-speed digital logic and a 12-layer stacked PCB design, designers are assured of signal integrity, improved signal quality, reduced radiation as well as a decoupling of the power bus resulting in high-quality electromagnetic compatibility. As a solid platform with full features, ATX has the potential to reduce development costs and drive design growth in specific embedded market segments, including kiosks, industrial automation and large scale medical devices. Added utilities such as remote management may benefit users with the ability to remotely configure and monitor key system components, including email notification of any issues or system failures. Ultimately, these off-the-shelf boards using the ATX form factor specification allow OEMs to increase the reuse of designs. OEMs can standardize design processes on a consistent form factor for enclosures, display housings and external chassis, all of which equates to savings of time and money versus developing new models and form factors.

have all the components it needs and then some. Ports may go unused, but that will not impact performance or function in any way. Modules are more limited by physical constraints; all its different components must fit within the overall footprint of the module itself, and the connecting pins defined on the bottom side must connect appropriately to the processor and controller signals.

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November 2008

11/10/08 10:01:37 AM

Multicore Is Meaningful

Multicore processors have been a design element in COMs for quite some time due to the size and space demands inherently addressed by their design. These types of processors will soon dominate the processor sockets on many types of embedded boards as well. The first multicore processors arrived in the embedded market two years ago, yet in 2007 just 20 percent

SOLUTIONS Engineering

of embedded desktop form factor motherboards (ATX, microATX, FlexATX, MiniITX and derivatives thereof) had multicore x86 processors on them. That percentage is expected to increase by 2010, reaching close to 50 percent of all embedded desktop form factor motherboards. Since motherboards have more space, instead of relying on a multicore processor they could simply incorporate more than one processor. With a greater transition to multicore technologies, designers can actually include more than one multicore processor on an embedded motherboard, mirroring trends typically seen in CompactPCI and ATCA blades. Today’s ATX designers now have the option as well and are likely to be looking beyond Celeron and Pentium, toward the Intel Core2 Duo and its followon dual- and quad-core processors.

as does the ability to take a design and turn it into something real. Design expertise and critical evaluation may be a designer’s strongest assets, but they must be paired with an in-depth knowledge and understanding of the end-user application and its key functions. Working with a knowledgeable supplier as partner can help a designer evaluate requirements such as design size, input/output and general processing requirements as well as thermal consid-

erations as a starting point. Understanding technology options requires digging further into regulatory demands, customization needs and lifecycle management, helping designers define the best design platform and, ultimately, the best design. Kontron Poway, CA. (888)-294-4558. [www.kontron.com].

Build, Buy and Call an Expert

Build vs. buy considerations also impact the designer’s choice of platform. This requires evaluating the level of customization required along with the anticipated production volume of the design itself. Designs that require something unique, such as a special connector to communicate with the information-gathering portion of the application or perhaps a certain kind of display, are typically better bought than built. Smaller volumes and highly specialized design expertise are critical elements here, and it may be a much better design option to make a tweak to an off-theshelf motherboard. As a standard product, the motherboard’s life is well planned out, but simple changes can still be made. When customization becomes a bit more complex than adapting a connector or an interface, designing with a module carrier board can allow more extensive changes than designing with a motherboard. Modules themselves aren’t hardware-customized as often. The custom elements are commonly built into the carrier board. Designing an adaptation into an offthe-shelf product solves the problem of small volume, but only if the right resources and design expertise are readily available in-house. If the design will live from generation to generation, or have a lot of customization, it is important for designers to partner with a supplier that has know-how as well as product. In every instance, resources make all the difference, Untitled-10 1

PM November7/8/08 2008 12:47:49 25

solutions engineering

ATX AND PCs

Thinking Inside the Box: An Overhaul of Box PCs for High-Reliability Applications Specialized box PCs have arrived to tackle the toughest of requirements, as one size can’t fit all. To appreciate what is available, OEMs and integrators need to think “inside the box” by lifting the hood and understanding the engine and its cooling system. by Colin McCracken and Dr. Qi Chen ADLINK Technology

or 20 years, desktop PC technology has gradually penetrated the diverse embedded systems market. Often, the impetus stems from familiar software and development tools, user interface, storage and basic I/O. Small form factor (SFF) boards have been invented during that time in order to squeeze the electronics into tiny places. These boards offer low profile expansion interfaces to accommodate the A/D, frame grabber, solid state storage, wireless, and other I/O required by each unique application. While the SFF boards and off-theshelf I/O cards have become pervasive, complete “box” solutions have made inroads as well, beginning with desktopstyle ATX “tower” PCs in office environments from nurse station IT systems to video surveillance systems. Over time, smaller packaging from desktop OEMs has broadened the penetration. Coming from a far different direction, full packaged solutions such as Panel PCs and industrial PC boxes have penetrated HMI, Kiosk, and even FDAcertified medical equipment applications over the past 10 years. Furthermore, the booming popularity of Mini-ITX puts the embedded suppliers and desktop

November 2008

Figure 1

Adlink MK-100 Mini-ITXbased system features Intel Core2 Duo processor.

This is a competitive space, and optimizing for cost means using high thermal design power (TDP) processors, cooling fans and rotating disk drives. An example of a Mini-ITX system for embedded applications is the Adlink MK-100 (Figure 1). The system supports Core2 Duo processors with a 3.5” hard drive, a slim CDROM drive, built-in ATX power supply, and a riser card for adding a PCI Express card or PCI card depending on the motherboard installed. The system footprint is 8.8x10”, roughly the size of a sheet of paper, and only 3.3 inches tall due to the right angle riser card. This solution is suitable for high-performance indoor applications that allow fans and rotating drives.

Ruggedizing

Figure 2

Ampro by Adlink RuffSystem 800 dissipates heat efficiently.

vendors on the same tracks, vying for applications from industrial control to digital signage.

Where off-the-shelf box PCs aren’t rugged enough for the task at hand, such as for outdoor applications, sometimes there is a tendency to build up a solution based on pieces, starting with a cheap motherboard and “ruggedizing” at the system level. With a bit of work, even a fanless design appears possible by conductively cooling the processor and chipset to the metal enclosure through thermal adhesives, gap fillers and copper chimneys.

SOLUTIONS Engineering

Eliminating fans and rotating media dramatically improves mean time between failures (MTBF). Even if a solution can be rigged together that passes thermal testing, attention must be redirected to the long-term reliability of such an assembly. After all, the reliability of all electronics inside the box plummets as internal temperature climbs. Dissipating heat involves several strategies in parallel. First, the thermal resistance between the heat sources and the external ambient environment must be minimized. Each part of a conduction solution consists of an interface that adds a temperature rise across it according to its thermal properties. The best solutions offer compliance (z-axis travel) without losing surface contact, thus preventing air gaps that act as insulators, which increase the temperature rise. Second, motherboards are available that are designed from the ground up with special dielectric materials to perform under thermal shock conditions, and with extra copper to spread heat away from semiconductors and other sensitive components. Such embedded single board computers (SBCs) are classified as Extreme Rugged because they are designed and constructed specifically for harsh environments. Production processes and materials including solder and reflow profiles contribute to how well these boards hold up in the field. Finally, components selected for the SBC can vary considerably, and a key issue is how the parameters change with temperature. Depending on the component, whether passive or active, this can mean tolerances (in terms of parts per million) or impedance at high frequencies. Of course, the tighter tolerance and better performing parts cost more. So it’s not possible to optimize for cost and for performance over temperature with a single design. Production screening of commercial-grade motherboards simply does not protect against long-term effects of thermal shock and extreme temperatures.

system cannot cover all requirements. To help integrators and system OEMs select off-the-shelf solutions, it is productive to classify according to ruggedness, which includes temperature rating, shock and vibration, dust and moisture tolerance (e.g., IP / NEMA ratings), and so on. As a matter of definition, the term “industrial” can be used for baseline indoor environments with modest reliability needs. At worst, it is a nuisance to reboot a computer, and there is no collateral damage. Perhaps there is a highly reliable real-time subsystem that continues to run. Commercial-grade computers rated at 0° to 40°C are sufficient for this task. Next up, “rugged” describes a light outdoor environment, where possibly the system is booted cold at -20°C, or possibly an indoor environment near equipment that causes vibration or occasional shock. Circuit design and production processes determine overall system performance in this case. Lastly, “extreme rugged” is reserved for the toughest environments in

which even occasional lock-ups, cracked solder joints and intermittent contacts could lead to dire consequences. Many of the transportation, avionics, naval and battlefield applications fall into this category. Systems that target these applications have the highest standard of care when it comes to design, validation and production. With so much at stake, this is not the place for a design-for-cost mentality.

Rugged by Design

An example of a new extreme rugged system is shown in Figure 2. The RuffSystem 800 was designed from the ground up for extreme rugged applications. Areas of particular concern for extreme rugged systems are the mechanical robustness and the thermal environment. To withstand the levels of shock and vibration found in portable and vehicle-attached systems—which is a large application area for such rugged systems—the interior of the case has been designed specifically for mechanical robustness.

Segmenting the Market

Embedded systems are deployed into a variety of environments—factory, outdoor, vehicle-mount, etc. Clearly, one

Figure 3

Providing an efficient heat dissipation path from CPU and Northbridge to the chassis, the heat tower preserves the ruggedized design of the system. November 2008

SOLUTIONS Engineering

(gn)2/Hz CONTROL Z-Axis 0.1288

0.0100

0.0010

0.0001

1.26E-05

Profile

Figure 4

100.00 Frequency (Hz)

10.00

High-Abort

Low-Abort

High-Alarm

500.00

Low-Alarm

Control

One of the challenging profiles in the MIL-STD-810 battery of shock and vibration tests.

PEG® GUI Development Tools

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Getting the Heat Out

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GRA P HI C S S OF T WAR E F OR EMBE D D E D SYS TE MS WWW.SWELL S OF T WA R E.CO M 1 28Untitled-5 November 2008

The whole system is carefully designed with the absolute minimum of moving parts. Instead of using rotating hard-disks for storage, the system uses a solid-state Compact Flash for OS storage. For data storage, a separate solidstate drive is used, again with no rotating parts. The LittleBoard 800 EBX form factor CPU board inside uses the best materials and field-proven circuits to be up to the task. Designing the thermal solution entailed a thorough analysis of the behavior of existing systems and extensive thermal modeling of the design. This pertained both to the SBC and to the system enclosure. Many features of the PCB design are included to improve the thermal properties by transferring heat efficiently from the source to suitable sinks. The most significant generators of heat are the CPU die and Northbridge die located on the LittleBoard 800. A low thermal resistance thermal interface material (TIM) is used between CPU and Northbridge dies and the heat spreader positioned above. The TIM is also used to adjust for the small manufacturing tolerances in the actual three-dimensional position of these die within each production unit. Selection of the TIM material is based on the thermal transfer principle of inverse proportionality to the thickness of the interface material layer, so better heat transfer (a lower thermal resistance) is achieved with a thinner TIM layer.

810 -3 8 5 -2 8 9 3 4/13/08 4:09:56 PM

The heat spreader itself is attached to a specially designed heat tower, which in turn contacts the top cover of the external case of the system (Figure 3). By efficiently extracting heat from the CPU/ Northbridge heat spreader to the top cover of the case, the heat tower significantly improves the thermal capability and robustness of the system. The heat tower solves the problem of providing a low resistance thermal path for heat from the CPU and Northbridge to the external case, while still being both mechanically compliant and mechanically robust. The heat tower uses a very low thermal resistance grease material to interface to the heat spreader and also between the

SOLUTIONS Engineering

two substantial separate sections of the tower that are joined and held together by a spring. This two-section arrangement with a spring holding them together provides mechanical compliance to the heat tower to avoid damaging the CPU when pressure or shock is applied to the external case. The heat tower design ensures that the thermal path for heat to flow is not obstructed, even though the heat tower is made up of separate parts. The heat tower has a relatively large cross section made of metal and therefore has a low thermal resistance for transporting heat up from the heat spreader to the external cover of the enclosure. Heat flows up from the heat spreader into the heat tower and then across the greasecoated and spring-loaded junction between the two sections of the tower, and on up to the top of the tower where a thermal grease layer forms the low resistance path to the external metal cover of the case. The case is therefore very efficiently used as a heat sink for the CPU die. The overlapping mechanical design of the case extrusions and the conductive connections between all the metal components, also both minimize emissions and enhance safety.

Hz for the maximum duration, the amplitude overall is 1.04 Grms (Figure 4). Also, for shock, the system complies with MILSTD-810F Method 516.5 withstanding 40G shock for 6 mS in both directions. RuffSystem also passed MILSTD-901D testing from 0 Hz to 10 Hz for shipboard conditions. The system was actually tested in a water environment to reproduce naval conditions per

MIL-STD-901D. Ruggedness capability must be at the forefront of all aspects of the design from an early stage, and is achieved only by treating the system as a whole. ADLINK Technology San Jose, CA. (408) 360-0200. [www.adlinktech.com].

New Rugged, Reliable Servers for Mission-Critical Applications New! 1RU RES Servers - 1 or 2 AMD® Opteron™ or Intel® Xeon® CPUs (quad-core processors) - Up to 32GB ECC SDRAM - Up to 3 removable HDD - Dual redundant, hot-swappable PSUs - Dual redundant DC power option - 0 – 55º C operation - Vibration – 0.9g from 10 – 2000Hz - Shock – up to 20G @ 20ms - 2RU RES Servers also available

Other Features

The system provides a choice of operating systems suitable for use in rugged environments, and uses embedded operating system such as Windows XP Embedded, Windows CE and embedded Linux. This is in contrast to the industrial-grade Box PCs, which typically run Windows and desktop Linux. Windows XP Embedded can be configured only to include what is needed to perform the required set of tasks with everything else not included. This can dramatically reduce hardware requirements by only including what is absolutely needed. The system design includes many special features to improve the ruggedness to thermal environment and to shock and vibration conditions for rugged applications. As a result, the system is compliant to the vibration standards of: MIL-STD-810F, Method 514.5, Category 4 withstanding three axis, Longitudinal, Transverse and Vertical frequencies from 10 Hz to 500

3RU RES Servers - 1 or 2 AMD Opteron or Intel Xeon CPUs (quad-core processors) - Up to 32GB ECC SDRAM - Up to 5 removable HDD - Vibration – 0.9g from 10 – 2000Hz - Shock – up to 25G @ 20ms

For Sun® Solaris™, Linux®, and Microsoft® Windows® environments When it comes to computing in harsh environments, nobody is more at home with its surroundings than Themis Computer. For over a decade, Themis has delivered high performance, high availability computing for the most demanding military, aerospace and communications applications. Themis’ new family of 1RU, 2RU and 3RU Rugged Enterprise Servers™ (RES) includes the latest quad-core processors from AMD and Intel, offering ruggedized systems with the fastest, widest range of performance options and scalability. Themis servers provide far greater reliability, improved life cycle management and substantially lower TCO than other COTS systems solutions. For more information on rugged Themis servers or its new T2BC™ blade servers that run Solaris™ applications on the Sun® UltraSPARC® T2® processor, please visit us at www.themis.com or call (510) 252-0870.

Transformational. ©2008. Themis Computer, Themis, the Themis logo, Rugged Enterprise Servers, and T2BC are trademarks or registered trademarks of Themis Computer. All other trademarks are the property of their respective owners.

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SYSTEM INTEGRATION

Software Security

OS Mechanisms Enable Secure, Survivable Systems As the software that provides centralized access to system resources, the OS can help prevent any process from maliciously or inadvertently damaging other processes.

by P aul Leroux QNX Software Systems

irtually every embedded system today is connected, either physically or wirelessly, to the outside world. This network connectivity allows operators to perform remote monitoring and control, and to download new software services or content on the fly. Unfortunately, it also makes systems vulnerable to infiltration by a growing cadre of cyber terrorists and extortionists. In fact, malicious hackers have already compromised a variety of SCADA systems, HVAC control systems, networking routers, mobile devices and nuclear safety systems using viruses, denialof-service (DoS) attacks and other networked-based exploits. To thwart such attacks, many companies and organizations surround their systems with a protective barrier that consists of network security, cryptographic security and even physical security. But as experience shows, malicious hackers can often break through this barrier to attack the system within. Consequently, the system itself must also be designed to survive assaults, without loss of service or corruption of data. In other words, developers must implement security not only around the system, but within the system. As the software that provides centralized access to the CPU, memory and other resources, the operating system (OS) can play a major role in achieving this goal of building secure, survivable embedded systems. In particular, it can enforce strong boundaries between software processes to prevent any process from affecting the performance, behavior or data of other processes. Processes can damage one another intentionally (via malware) or unintentionally (via bugs); a well-designed OS will provide mechanisms to prevent such damage and to keep the system in a healthy state.

The Reference Monitor

James Anderson established the core principles of computer security in 1972, when he published his Computer Security Technology Planning Study. In his study, Anderson introduced the con-

November 2008

Audit Information

Processes

Reference Monitor

Resources

Security Policy

Figure 1

The reference monitor, which resides within the OS kernel, validates all attempts to access system resources.

cept of the reference monitor, a mechanism implemented in the OS kernel that validates every request for data, peripherals and other resources (Figure 1). The reference monitor ensures that every resource is accessed not only by the appropriate software process, but also by the right process operating against the correct data in the correct context. To fulfill this role, the reference monitor must possess three key attributes. It must be tamper resistant, always invoked and simple enough to be easily verifiable. If users can breach the reference monitorâ&#x20AC;&#x2122;s integrity, either intentionally or accidentally, then the system cannot be trusted to behave correctly. Consequently, the OS kernel, which contains the reference monitor, must resist any attempts at modification. For instance, the microkernel for the QNX Neutrino real-time OS (RTOS) is read-only and cannot be modified at run time. Moreover, it performs integrity checks at startup to ensure that it is undamaged. If an attempted attack or unintended action has

SYSTEM Integration

modified the kernel image, the microkernel won’t boot up into operational mode. Since the microkernel cannot be modified while running, and won’t start if modified, it can be trusted to carry out its operations correctly. The reference monitor must evaluate all access requests consistently and explicitly with no exceptions. Consequently, it must be invoked every time a process attempts to access a resource. By implementing the reference monitor within the kernel, the OS can ensure that every access request goes through the exact same mechanism for verification. The kernel and its reference monitor must operate correctly at all times. Thus, the kernel design must be as simple and verifiable as possible. If it becomes too complex, security holes might escape notice and be exploited. A microkernel-based OS offers an ideal architecture for this requirement, since a microkernel implements only the most basic mechanisms, such as signals, timers and thread scheduling. All or most system services, such as device drivers, networking stacks and file systems, run outside of the microkernel as separate, userspace programs (Figure 2). In traditional operating systems, all these services run within the kernel, adding significantly to kernel complexity. Because a microkernel is smaller and more comprehendible than conventional kernels, it is less prone to errors and allows for easier validation. Also, because drivers and other system services run as separate, user-space processes, a fault in any service won’t damage the microkernel or other running processes. For instance, if a device driver attempts to access memory outside its process container, a user-space process called a software watchdog can quickly terminate the driver, reclaim the resources the driver was using, and then restart the driver, without interrupting other services.

Saltzer and Schroeder’s Eight Principles

In 1974, Jerome Saltzer and Michael Schroeder published The Protection of Information in Computer Systems, in which they expanded upon Anderson’s three principles with eight of their own (Table 1). The first principle, economy of mechanism, complements Anderson’s notion of a small, verifiable kernel. An OS kernel must be simple and efficient, and do only what it is supposed to do; otherwise, unexpected side effects or behavior are more likely to occur. To satisfy this requirement, an OS can use a well-designed microkernel. It can also use a standard privilege mechanism: POSIX. This industry standard is well-known and understood, and provides users with an explicit understanding as to how the system works, without any surprises. By using POSIX, the OS can satisfy the requirement of doing only what it needs to do, without adding complexity that can harbor unknown holes and exploits. According to the principle of fail-safe defaults, access to a resource must be explicitly given and implicitly denied. POSIX has an inherent concept of fail-safe defaults: the developer must explicitly give processes permission to access a resource or they are denied access. Likewise, the security-related attributes of an OS must be set to a “known good default” during initialization. Hence, whenever new objects or subjects are created, the OS can assign their security attributes to known good initial values.

Saltzer & Schroeder’s Eight Principles Economy of mechanism

Reduce complexity to eliminate unexpected side effects or behavior.

Fail-safe defaults

Deny a subject access to an object, unless the subject has been given explicit permission.

Complete mediation

Check every access to an object to ensure that the access is allowed.

Open design

Don’t rely on security through obscurity.

Separation of privilege

Grant access to an object only if the subject satisfies multiple conditions.

Least privilege

Provide a subject with the least set of privileges needed to access an object.

Least common mechanism

Prevent resources from being shared implicitly.

Psychological acceptability

Ensure the system is understandable by users.

Table 1

Eight principles for preventing security flaws.

Non-root thread

Root thread

Root thread with I/O privilege

Yes

Map physical No memory

Yes

Map shared Based on memory permissions

I/O operation No

Yes

Attach to IRQ No

Yes

Disable interrupts No

Yes

Table 2

According to the principle of separation of privilege, a subject must meet multiple conditions before being granted access to an object. For instance, according to this table, a thread can disable interrupts only if it has both root (i.e. highest-level) permissions and I/O privilege.

This approach ensures that processes behave in a known fashion. It also ensures that the owner of a new object cannot access information from previous objects that belonged to other owners. For example, every new object (process, memory allocation, etc.) would be set to a known, neutral state to prevent unintentional transmission of information. Because this approach ensures that every process begins from known good defaults, the OS can roll back a failed process (for instance, a device driver) to its initial state, without a system reset. Complete mediation simply means that the OS kernel mediates every access to a given resource. The kernel evaluates every access request consistently and explicitly, with no special handling for any request. By making strategic use of the POSIX guidelines and system interlock hardware (via the MMU), an OS can ensure that these access controls are in place. The nineteenth century Dutch cryptographer Auguste Kerckhoffs postulated that a cryptosystem should be secure even if everything about the system, except the key, becomes public knowledge. Ever since then, security experts, including Saltzer and Schroeder, have warned against security through obscurity and have promoted the advantages of open design. An open design that can encompass well-defined APIs and publicly accesNovember 2008

SYSTEM Integration

File System

Input Driver

Network

Graphics Driver

Microkernel

User Application

HMI

protected resources. It can also help ensure that no information is ever reclaimable, even within the same process. An OS can further control allocation of resources through resource partitioning. Briefly stated, this technique allows the system designer to group software processes into virtual compartments, or partitions, and to allocate a predetermined budget of memory and/or CPU time to each partition. The OS can then enforce these budgets and thereby prevent processes in any partition from erroneously or maliciously monopolizing memory or CPU time needed by processes in other partitions. According to Saltzer and Schroeder’s last principle, psychological acceptability, a system must behave in a well-documented manner that the user expects; there are no surprises. In other words, it operates in a deterministic fashion. To satisfy this requirement, the RTOS must use well-known and accepted standards as a basis for its security model. It must also provide a definition of how it will behave during initialization, self-test and recovery operations.

Modern Enhancements to Security Figure 2

Microkernel architecture satisfies the security requirement for a small, simple and comprehendible OS kernel. It also prevents faults in device drivers and other system services from damaging the kernel or other processes.

sible OS source code allows the system to be inspected by many reviewers and simplifies the task of evaluating whether the OS is appropriate for an intended application. To ensure strong security, a system should grant access to a resource only if the process requesting the resource satisfies multiple conditions. This is known as separation of privilege. According to Saltzer and Schroeder, “a protection mechanism that requires two keys to unlock it is more robust and flexible than one that allows access to the presenter of only a single key.” Separation of privilege helps prevent accidental or intentional system disruption. Table 2 shows an example of how an OS can implement separation of privilege to control resource access. Every software component must also satisfy least privilege; that is, it must operate with only the security privileges and system resources that it needs to function correctly. For instance, every request for privileges or resources should go through the OS kernel. The kernel can then ensure that the requesting process has the appropriate permissions prior to granting access. Like separation of privilege, this approach minimizes intentional or unintentional damage to the system. It also ensures that the system behaves in an understandable and consistent fashion. To satisfy the “least common mechanism” principle, the OS must prevent implicit sharing of information. For instance, if an application relinquishes control over a resource, the OS kernel should regain control of that resource and clear it of any residual information. Ideally, the developer can choose whether this clearing occurs immediately after the process relinquishes the resource or when the kernel reallocates the resource for subsequent use. This approach can prevent processes from “spying” on

November 2008

Since Anderson, Saltzer and Schroeder presented their seminal papers, the security community has devised a few enhancements, including accountability, priority of subjects and priority of operations, self-tests and fault tolerance. Any system that manipulates information must meet at least rudimentary accountability requirements. For instance, in some OSs all events can be time stamped. The high-resolution timestamps can’t be modified, ensuring that no clock-skew exploits are possible with respect to audit subsystems. This approach provides added security since system events that are recorded and audited cannot be repudiated with respect to the timing of their activities. High-priority threads or operations must proceed without undue interference or delay caused by low-priority subjects or operations. Consequently, an OS should incorporate a strict protocol to ensure that if resources become sparse (i.e. if there are more requests than available kernel threads), only higher-priority requests will float to the top of the processing queue. A well-designed OS also implements a prioritization protocol to ensure that higher-priority system-level requests never get “starved” out by lower-priority events. Higher-priority requests are always processed first. The system must also test itself and verify the integrity of its stored executable code and objects. That way, it can detect corruption caused by failures that don’t necessarily stop system operation. Such failures may occur either because of malicious corruption, unforeseen failure modes, or oversights in the design of hardware, firmware, or software. And, finally, the system must operate correctly even in the event of a failure. If a failure does occur, the system must recover to a known good state. For instance, because the QNX Neutrino microkernel employs self-test mechanisms, it can, upon recovery, ensure that it has entered into a known good state. Also, if a process fails, the microkernel can clean up resources used by the process and restart the process from a known good state. QNX Software Systems Ottawa, Ontario, Canada. (800) 676-0566. [www.qnx.com].

Phoenix International designs and builds Rugged COTS Data Storage Systems that â&#x20AC;&#x153;plug and playâ&#x20AC;? in any application, ranging from Multi-Terabyte RAID and Storage Area Networks to plug-in VME/cPCI Solid State Disk Storage Modules. Our outstanding quality and service makes our products the proven choice for vital missions.

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SYSTEM INTEGRATION

Software Security

xploration r your goal ak directly page, the resource. hnology, nd products

Improving Security with Static Software Analysis Advances in static analysis tools have made them much more comprehensive. Using them early in a project can greatly reduce the number of errors deployed and the time and cost of finding them.

by P aul Anderson GrammaTech

oftware security is a multifaceted concern. Secure software needs a good design, a secure architecture and strong cryptography. However, all this can be fatally undermined if the source code contains bugs. Many of the more spectacular software security failures over the past decade or more have been made possible by bugs in the source code. Alpanies providing nowinvolved in programming knows about buffer mostsolutions everyone ation into products, technologies and companies. your goal isby to malicious research the latest overruns and how they canWhether be exploited attackers cation Engineer, or jump to a company's technical page, the goal of Get Connected is to There put you to hijack the program and turn it to nefarious purposes. ce you require for whatever type of technology, are many other bugs that can be exploited to cause security es and products you are searching for. breaches. Among them are race conditions, numeric overflows or underflows, null dereferences, double frees, resource leaks, cryptographic errors and format string vulnerabilities. As well as these, any crashing bug that can be triggered by a user may constitute a denial-of-service vulnerability. There are literally hundreds of distinct programming errors that can give rise to security weaknesses. A catalog of these is now available at http://cwe.mitre.org. Some bugs are endemic to particular languages. The buffer overrun is possible because C is fundamentally a very unsafe language. However, the language remains very popular, particularly for embedded systems, and its use does not appear to be Get Connected diminishing. with companies mentioned in this article. These bugs have been hard to stamp out because it is difwww.rtcmagazine.com/getconnected ficult to detect them. A bug can lurk undetected for years before some clever hacker notices it is there and then devises

End of Article

Get Connected with companies mentioned in this article. www.rtcmagazine.com/getconnected

November 2008

Figure 1

A fragment of a CodeSonar report warning of a buffer overrun.

an exploit for it. Traditional integration and unit testing, and activities such as red-teaming certainly do find some of these, but the fact that they remain so prevalent indicates that more effort is needed. Advanced static analysis tools have recently become available that can help to improve software security by finding the underlying bugs that give rise to vulnerabilities. Static analysis tools are so-named because they work by examining the code but not executing it. In contrast, dynamic analysis tools, such as profilers or debuggers, work by executing the code with some test cases and monitoring its execution. Bugs can be found with static analysis at compile time, which is much cheaper than finding them during testing, and far preferable to finding them in deployment.

SYSTEM Integration

Static analysis tools are successful at finding bugs because they can explore more potential conditions and paths through the code than it is feasible to exercise with testing. Consequently, they are good at finding bugs that only occur in obscure corner cases or unusual combinations of inputs. These tools typically require little up-front work. They are easy to integrate into the development environment, and do not require users to write time-consuming test cases. They are not

The analysis phase is of course the most interesting, as that is where the defects are detected. Different kinds of defects can be detected by looking at different aspects of the IR. For example, a rule that prohibits calls to gets can be checked by inspecting the symbol table. A rule that disallows the use of the goto statement is easily checked by searching the abstract syntax tree. The more sophisticated tools operate by doing an abstract execution of the program. As this execution progresses, the tools maintain the values of variables and how they relate to each other. If anomalies are detected, then warnings are issued. Intermediate Model Representations Source Before discussing what makes these Analysis Results Extraction (IR) Code tools good at finding flaws, it is useful to introduce some terminology. Interprocedural: An analysis is interprocedural if it understands the effect of calling a procedure on the semantics of the Names Database/Symbol table Abstract Syntax Tree Control Flow Graph Call Graph program. Traditional static analysis tools (AST) (CFG) Name Kind Location have very limited interprocedural capabilicopy_item function item.c:25 ties. The advanced static analysis tools all item_cache variable item.c:10 do an interprocedural analysis. color parameter pallette.c:23 header.h file shapes.c Whole program: A whole program analysis takes into account all compilation units that contribute to a program. Unlike the advanced static analysis tools, most early static analysis tools would only conFigure 2 The architecture of a static analysis tool. sider one file at a time. Flow-sensitive: If an analysis takes the perfect however, and some of the warnings they issue may be order of statements into account, then it is said to be flow-sensifalse positives. Once they issue a list of warnings, a user must sift tive. This implies that the analysis operates on the CFG. through these to decide which issues can be ignored, and which Context-sensitive: The analysis is context-sensitive if it is should be fixed. capable of concluding different facts about different call sites to Figure 1 shows an example of a simple flaw that was found the same procedure. by CodeSonar (the tool developed by GrammaTech) in an openObject-sensitive: Many static analysis techniques can reason source program. An overrun happens because the programmer about properties of variables. An analysis that is object-sensitive made a mistake on line 1773. The intent was to allocate enough will treat objects that originate at different dynamic allocation space for all the characters in the string plus the null terminator, sites (e.g., calls to malloc or new) separately, even if they are but the +1 is on the wrong side of the parenthesis, so the effect aliased to the same variable later. is to allocate too few bytes, then add one to the resulting pointer. Path-sensitive: An analysis that can distinguish properties of Consequently, the call to strcpy on the next line will write two different paths is said to be path-sensitive. Tools in the lint family more bytes than it should into that buffer, with highly unpredict- either do not attempt this, or attempt a naĂŻve approximation. All able results. This is the kind of bug that may only cause damage of the advanced static analysis tools incorporate path sensitivity. in very rare circumstances, and which may never show up in test- As explained in the following section, this is the single most iming. These are precisely the kinds of defects that static analysis portant contributor to their effectiveness. Also, a path-sensitive is good at finding. analysis means that the warnings can be reported back to the user in terms of an example path through the code, which is very How Advanced Static Analysis Works useful in helping the user understand the result. Path sensitivity Advanced static analysis tools work by scanning your code subsumes flow sensitivity. directly. They parse it and turn it into a set of intermediate representations (IRs). This is usually called the â&#x20AC;&#x153;model.â&#x20AC;? The analysis Effectiveness phase then explores the model. If it finds circumstances where There are three primary factors that contribute to the effecsecurity or safety rules are violated, it issues a warning. Figure 2 tiveness of a static analysis tool. First is the issue of how well the shows a block diagram of the architecture. analysis finds real defects. Users want to find the serious and non-

November 2008

SYSTEM Integration

obvious flaws, not just trivia. At the same time, the tool must be mended that advanced static analysis tools be used as early as able to effectively exclude false positives. A high false positive possible. They can be used to produce useful results as soon as rate has an insidious effectâ&#x20AC;&#x201D;users waste time sifting true positives the code compiles, which is even earlier than it is practical to use from false positivesâ&#x20AC;&#x201D;which undermines confidence in the tool. unit tests. Then, of course, there is the issue of what computing resources are Running a tool on the entire project can be time conrequired. Users would like the analysis to complete in time that is suming, and thus a barrier to its use. A good workflow for a small multiple of the time it takes to compile the code. a programmer is to first analyze the code that has been The real measure of a toolâ&#x20AC;&#x2122;s effectiveness is ultimately how changed to flush out the obvious issues, then to arrange to much it reduces the cost to produce high-quality software. The analyze the entire project with a longer run. This can be tools that offer the best results find the serious flaws, and oc- easily automated. cupy a sweet spot that balances three factors. Such tools use analyses that are whole program, interprocedural, context-sensitive and object-sensitive. They use path-sensitive analyses, but restrict full path exploration in order to keep the time roughly linear in the size of the program. See above for definitions of these terms. Additionally, they use heuristics to reduce the number of false positives, even at the risk of failing to detect some real defects. Finally, and importantly, they are scalable to millions of lines of code. Additional properties that affect the usability of the tool are also important. For example, locating the code to be analyzed can be problematic because build systems are often very complicated. Parsing the code can be difficult too. The analysis tool should parse the code in the same Figure 3 A screenshot of a report summarizing defects found in a small way the compiler would, but all compilers application. operate in different ways. The best tools integrate seamlessly with the build system, and model the compiler as closely as possible. If the tool is adopted part-way through the developBecause all warnings must be inspected to determine if they ment process, then the number of warnings generated can be indicate a real problem, it is important that there be good inter- daunting. A good approach in this case is to fix the serious faces for understanding why the tool came to a particular conclu- issues first, but then to have subsequent scans report only sion. One effective way is by showing the path to the point where new defects. This way, programmers can fix new flaws as the bug manifests along with the conditions that must be true in they arise. Tools can usually be configured to alert particular order for it to actually happen. users to warnings that show up in code they have been workOnce the warnings have been generated, a good tool will ing on recently. help the user manage the results by providing guidance. If a Static analysis tools are effective at finding defects in softwarning is a false positive, the user will want to dismiss it as ware. However, they should not be seen as a replacement for other such, and then never be bothered by it again. If it is a true posi- quality assurance activities. There is no substitute for disciplined tive, then it should be possible to give it a priority and maybe and rigorous testing. Similarly, manual code reviews are indisassign it to a programmer for remedy. Managers will have addi- pensable, as there is no automation that can match the judgment tional requirements. To help assess status they may want to see of an experienced human. The best use of these tools is as a comwhat kinds of flaws are found where. To understand progress, plement to existing methods. they may want to see how things are changing over time. A good tool will show this visually, in a form such as that shown GrammaTech Ithaca, NY. in Figure 3. The cheapest flaws to fix are those that are found earliest in (607) 273-7340. the development cycle. For this reason alone, it is highly recom- [www.grammatech.com].

November 2008

Featured Products Wi-Fi Module Enables Connectivity for Serial, LAN and Cellular Modem Embedded Devices An embedded Wi-Fi bridge quickly and easily connects any embedded device to 802.11b/g wireless LANs with minimal programming. Measuring only 1.7x3.3 centimeters, the Nano WiReach from ConnectOne features multiple hardware interfaces and extensive firmware functionality to make it an extremely advanced and versatile Wi-Fi solution for embedded devices. Based on Connect One’s iChipSec CO2144 IP controller chip, Nano WiReach includes a full suite of Internet protocols and applications, enabling immediate and full-featured connectivity for embedded solutions without any Wi-Fi driver development or porting. Nano WiReach’s firmware supports several modes of operation. It can act as a LAN to Wi-Fi bridge, allowing transparent bridging of LAN over Wi-Fi using direct RMII connection to existing MAC hardware. Any microcontroller with a built-in Ethernet MAC can be connected to Wi-Fi with zero development effort. It can also fill the role of serial to Wi-Fi bridge, enabling transparent bridging of serial data over Wi-Fi using the module’s speedy 3 Mbit/s UART. When the Nano WiReach is used in full Internet controller mode, it allows simple microcontrollers to use its rich protocol and application capabilities to perform complex Internet operations such as e-mail, FTP, SSL, embedded Web server and others. Internet controller mode can be used with any hardware interface. The device also supports embedded IP routing, which allows multiple Wi-Fi clients to use a single WAN connection to the Internet, using the Nano WiReach as a router. In addition, PPP emulation offers existing (e.g., cellular modem) designs currently using PPP to interface to the cellular modem by connecting transparently over Wi-Fi with no changes to application or drivers Nano WiReach includes RMII, USB, SPI and fast UART interfaces for easy integration into existing or new designs. It is available in two versions—one with an antenna connector and one with a built-in antenna. It also offers an advanced level of

November 2008

Internet security that includes the latest Wi-Fi encryption algorithms (WPA/WPA2, in both PSK and enterprise modes) and Internet SSL encryption algorithms. In addition, it serves as an inherent firewall, protecting the embedded application from attacks originating from the Internet. Nano WiReach supports 10 simultaneous TCP/UDP sockets; two listening TCP sockets; SMTP, MIME, POP3, FTP, Telnet and HTTP/HTTPS clients; an HTTP/HTTPS embedded Web server with a website for the host application and one for configuring the module. Nano WiReach supports 64/128-bit WEP, WPA/WPA2 (PSK and Enterprise) encryption, AES-128/256, SHA-128/192/256, 3DES; the SSL3/TLS1 protocol for a secure client socket session and a secure FTP session. The module operates at an industrial temperature range of -40° to 85°C (-40° to 185°F) and is RoHS compliant. Pricing starts at $59. ConnectOne, San Jose, CA. (408) 572-5675. [www.connectone.com.].

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Compliant to PICMG AMC.0: Advanced Mezzanine Card Specification R1.0 AdvancedMC load board with IPMI support Single module, full size Incorporates JTAG interface Load is configurable to 0W, 20W, 30W, 40W, 50W, 60W and 70W Redundant operation with automatic switchover On-board temperature sensors

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&TECHNOLOGY

Products

Extreme Rugged Methodology Comes to Mid-Range ETX

As part of an initiative to extend its Extreme Rugged product lines, Adlink Technology has announced the first new Ampro by Adlink product since the Ampro acquisition was completed. The ETX 620 brings the proven design methodology of the high-end ETX 802 to harsh environments where lower processing performance is required. Based on the AMD Geode LX 800 processor and chipset, the ETX 620 computer-on-module (COM) is designed for mission-critical military, avionics, medical, and industrial applications where failures would have dire consequences or high costs. ETX 620 features the low-power AMD Geode LX 800 processor and CS5536 companion chip. ETX 620 is designed for extreme rugged environments, able to operate over temperature extremes of -40° to +85°C, vibrations up to 15 Grms and shock up to 50 Grms. With processor speed of 500 MHz and memory support for up to 1 Gbyte of DDR RAM, the ETX 620 fills the price/performance void beneath the ETX 802 module. ETX 620 offers 2D/3D graphics and offers a choice of TTL or 24-bit LVDS LCD interfaces along with legacy CRT, making it easier for system designers to choose the right display for their solution. ETX 620 also touts a full 16-bit ISA bus due to the use of a PCI-to-ISA bridge with Distributed DMA, rather than an LPC-to-ISA bridge. The use of an Intel Ethernet controller allows wider temperature operation than possible with cheap alternatives. ETX 620 contains all of the PC-compatible subsystems without the I/O connectors themselves. The I/O and bus signals are passed through high-density surface mount connectors to application-specific carrier boards. ETX 620 I/O includes (2) Serial ATA (SATA) ports, (4) USB 2.0 ports, Intel 10/100 Ethernet, (1) UDMA IDE interface, (2) Serial RS-232 ports, Floppy, Keyboard/Mouse and AC ’97 Audio. Adlink supports the ETX 620 with a full range of popular embedded Board Support Packages (BSPs) including Windows XP Embedded, Windows CE 5.0 and 6.0, VxWorks 5.5 and 6.4, QNX 6.3, and a complete Linux 2.6 distribution. Prices start in the $200s for the ETX 620 in production quantities. ADLINK Technology, San Jose, CA. (408) 360-0200. [www.adlinktech.com].

SpaceWire 4-Port Router Targets Aerospace Apps

Originally developed by the European Space Community, SpaceWire is a standard governing serial communication between nodes. The protocol is self-managing and provides a high-speed, low-power serial interface while offering a simple, low-overhead user interface. The standard supports data rates of 2 Mbits/s to 400 Mbits/s over 10 meters of cable. Aeroflex Colorado Springs has developed a SpaceWire 4-Port Router, the UT200SpW4RTR, to satisfy SpaceWire networking and fault-tolerant networking requirements for the aerospace community. The UT200SpW4RTR 4-port router has a system interface port for 5 total ports, data rates up to 200 Mbits/s on all four SpaceWire ports, and is compliant to Standard ECSS-E50-12A. Power supply core is 2.5V with 3.3V I/O with a host (FIFO) clock frequency of 50 MHz. Radiation performance is targeted at 100 krad(Si); packaging is a 255-lead CLGA. QML Q and V qualification is planned. The UT200SpWRTR is priced at $5,725 in QML Q lots of 100. Prototypes will be available 1Q09 with production units in 2Q09. Aeroflex Colorado Springs, Colorado Springs, CO. (719) 594-8035. [www.aeroflex.com/SpaceWire].

November 2008

Multi-Function 3U cPCI Card Adds ARINC 429/575 and More

The multi-function board trend has swept across the embedded system market, and embedded system designers are reaping the benefits. North Atlantic Industries (NAI) has announced an upgrade to the functionality of its single-slot, 2-module, multi-function, 3U cPCI card. This universal card eliminates the complexity and size constraints of using multiple, independent, single-function cards. The 75C2 is ideally suited for military and commercial programs, including airborne, shipboard, ground mobile and C3I applications. Its interchangeable modules increase functional density and reduce power consumption, size and cost of the overall system. The 75C2 can accommodate up to two independent function modules. ARINC 429/575 (6-channels), RS-422/485/232 (4-channnels), D/S Converter (3-channels) and Reference Generator functions have recently been added to its library of available modules. Other available function modules include Synchro/Resolver Measurement (4-channels), LVDT Measurement (4-channels), A/D (10-channels), D/A (10-channels), Discrete I/O (16-channels), TTL I/O (16-channels), Transceiver I/O (11-channels) and RTD (6-channels). The interchangeable multi-function design of the 75C2 provides extensive diagnostics and is available in both commercial temperature range and severe environment, industrial temperature range. The 75C2 is available with operating temperature ranges of -40° to +85°C and 0 to +70°C. Conduction-cooled versions with wedgelocks are also available. Pricing for 100 pieces starts at $1,995. North Atlantic Industries, Bohemia, NY. (631) 567-1100. [www.naii.com].

Compact and Portable Development System Supports 6U Cards

A new system, designed to be a compact and portable system that supports 6U cards for lab and desktop use, is also rugged enough to withstand transporting to and from the field. The 522 Development System from Carlo Gavazzi features a versatile design for hardware and software developers looking for performance and functionality advantages over customary chassis configurations. The 522 Development System provides unobstructed access to both system and rear transition boards for device monitoring. Addressing the needs of users deploying custom backplanes for specialized applications, the 522 Development System can accommodate VME64, VXS and VPX boards both in 6U and 3U form factors. Modular in design, the 522 system is available in both standard and custom configurations at competitive pricing. It also features high-performance cooling via 200 CFM speed-controlled fans that provide distributed cooling to both the front and rear card modules. The system is available with frontmounted test points and LEDs for all DC voltages, as well as an optional LCD for displaying system voltages and both fan and temperature monitoring functions. The 522 Development System is available with a 7-slot (CompactPCI, 2 VME64X and 5 VPX) 6U VPX backplane offering high bandwidth in the latest VITA 46 standards with the proven legacy capabilities of VMEbus technology. Carlo Gavazzi Computing Solutions, Brockton, MA. (800) 926-8722. [www.gavazzi-computing.com].

Free Device Description Explorer for CANopen and Powerlink

A new tool enables the user to inspect and convert CANopen and Powerlink device description files conforming to the CiA 306 and CiA 311, as well as the upcoming EPL V2.0 XML specifications. The Device Description Explorer from IXXAT is available for free download from IXXAT’s Web site. In 2007 CAN in Automation (CiA), the international users’ and manufacturers’ group governing the development of the CANopen specifications introduced a new XML-based device description file format as CiA 311. CiA 311 is based on the ISO 15745-1:2003 specification, which defines generic elements and rules for describing integration models and application interoperability profiles. A new and more flexible device description format was required due to the numerous enhancements introduced in CANopen that were not covered by the original EDS format as specified in CiA 306. In addition to the general benefits of an XML-based syntax, the CiA 311 format has the particular advantage of allowing for localized device description files, a feature becoming increasingly important with the global acceptance of CANopen. To facilitate the transition from the previously used EDS file format to CiA 311-compliant files, IXXAT offers the Device Description Explorer as an application that not only converts device description files between the two formats but also allows for a graphical user interface that supports inspection of basic device functionality and the devices’ object dictionary. In version 1.1, the IXXAT Device Description Explorer has been enhanced to support the most recent XML schema definitions as introduced by the CiA task force “XML.”

Battery Stack Monitor Supports Hybrid Vehicles & Battery Backup Systems

A highly integrated multicell battery monitoring IC is capable of measuring up to 12 individual battery cells. The LTC6802 high-voltage battery stack monitor from Linear Technology allows multiple LTC6802s to be stacked in series without optocouplers or isolators, for precision voltage monitoring of every cell in long strings of series-connected batteries. Long battery strings enable high-power, rechargeable applications, such as electric and hybrid electric vehicles, scooters, motorcycles, golf carts, wheelchairs, boats, forklifts, robotics, portable medical equipment and uninterruptible power supply (UPS) systems. With superior energy density, Lithium-Ion batteries are poised to be the power source of choice for these applications. However, designing a large, highly reliable and long-lasting Li-Ion battery stack is a very complex problem. Li-Ion cells are sensitive to overcharging or over-discharging, requiring that each cell in a stack is carefully managed. The LTC6802 makes this possible with quick and accurate measurements of all cell voltages, even in the presence of stack voltages over 1000V. The maximum total measurement error is guaranteed at less than 0.25% from -40° to 85°C, and all cell voltages in a battery stack can be measured within 13 ms. Each cell is monitored for undervoltage and overvoltage conditions, and an associated MOSFET switch is available to discharge overcharged cells. Each LTC6802 communicates via a 1 MHz serial interface, and includes temperature sensor inputs, GPIO lines and a precision voltage reference. 1,000-piece pricing is $9.95 each. Linear Technology, Milpitas, CA. (408) 432-1900. [www.linear.com].

IXXAT, Bedford, NH. (603) 471-0800. [www.ixxat.com]. November 2008

Products & TECHNOLOGY Single-Slot, 8-Channel, 3U cPCI I/O Board Extends Functionality in Existing Systems

A new single-slot, 3U CompactPCI I/O board comes with eight 16550D-compatible UARTs. With the physical layers integrated on the board, each channel on the new F216 from Men Micro can be individually configured as single-end RS-232 or as differential RS-422 or RS-485 for added system flexibility. Each channel also has its own 500V isolation to decrease interference between channels. The F216 provides exceptionally high data transfer rates of up to 921,600 bits/s as well as a 60-byte transmit and receive buffer, making the board useful in systems with large FIFO requirements. The operating temperature of -40° to +85°C (-40° to +185°F) enables the F216’s use in rugged mobile applications including trains and airplanes. Although each port is available on a single front panel 78-pin D-Sub connector, an adapter cable can spread the connector to eight standard 9-pin D-Sub connectors, further increasing system flexibility. Pricing for the F216 is $733 per unit.

2.4 GHz ZigBee Socket Modem Supports Mesh Sensor Networks

In comparison to Wi-Fi networks, wireless mesh networks make considerably greater ranges possible. This means, for example, that monitoring applications can be implemented in large buildings or systems with minimal expenditure. For just these types of applications, the Mod/Zbee1 socket modem from SSV Software Systems uses the 2.4 GHz ISM wireless frequencies based on the IEEE 802.15.4 and ZigBee standards. The Mod/Zbee1 is controlled via a serial interface using AT commands and can be used either as a ZigBee co-

MEN Micro, Ambler, PA. (215) 542-9575. [www.menmicro.com].

ETX 3.0 Computer-on-Module with 45nm Intel Atom N270

A new Computer-on-Module is based on the 1.6 GHz Intel Atom processor N270 that Intel has incorporated into the Embedded Roadmap, thereby ensuring seven years lifecycle support. The ETX-DC Computer-on-Module from Kontron delivers an optimal balance between excellent performance and very low power: With 2.5 watts thermal design power (TDP) for the processor, 6 watts TDP for the Intel 82945GSE Graphics Memory Controller Hub and 1.5 watts TDP for the Intel I/O Controller Hub 7-M (ICH7-M), the ETX-DC requires a maximum TDP of 12-15 watts. Thus, it is the suitable fit for POS and industrial control applications as well as for use in harsh environments that require passive cooling and completely sealed housings. The new module also makes it easier to implement applications with high demands for MTBF and/or EMC. OEMs in the POS, Kiosk, digital signage, infotainment and gaming markets as well as industrial HMI and measurement and control sectors also benefit financially from the best-in-class MIPS per cent ratio. The new ETX-DC has a 533 MHz FSB and supports up to 2 Gbytes of DDR2-SDRAM SO-DIMM. In terms of interfaces it offers 2 x SATA II in accordance with the AHCI (Advanced Host Controller Interface) standard including Native Command Queuing (NCQ) and staggered spin up as well as hot plugging, USB 2.0 and PCI extension bus along with all the other ETX 3.0 standard interfaces. There is also continued ISA support for older applications. New applications with performance requirements similar to ISA mostly use LPC. The ETX-DC also supports this bus alternative. The optional onboard Trusted Platform Module (TPM 1.2) provides enhanced data security. Integrated graphics offer SDVO and support resolutions up to QXGA (2048 x 1536) via CRT, dual screen via LVDS for resolutions up to UXGA (1600 x 1200) as well as TV-out with HD resolution. There is also onboard HD Audio conforming sound for multimedia support. With the S0/S3(cold&hot)/S4/S5 suspend modes, the ETX-DC Computer-on-Module offers maximum energy savings. The ETX module integrates all of these features on a footprint of 95 mm x 114 mm. A comprehensive range of software add-ons as well as design guides and sample layouts (supplied with all Kontron Computer-on-Modules) simplify the development of customer-specific carrier boards. The ETX-DC Computer-on-Module is available now and supports Windows Vista, Windows XP, Windows XPe, Windows CE as well as Linux and VxWorks. Kontron, Poway, CA. (888)-294-4558. [www.kontron.com].

November 2008

ordinator, router or end point. The module is also available with an integrated chip antenna or a plug for connection to external antennas. The socket format of the Mod/Zbee1 corresponds to the de facto standard for making OEM devices capable of communication using modules that can be integrated at a later date. Since modules in the socket format are physically compatible, an OEM design can be created regardless of the communication connection. This simplifies and accelerates the engineering and integration of new communication functions into existing and future systems. Together with the Ethernet modules from the DIL/NetPC family, modular ZigBee to Ethernet gateways can also be constructed. The data of individual ZigBee sensors can be coupled into an IP-based Ethernet LAN directly via a VPN tunnel and, for example, written directly to an SQL database. It is also possible to forward data to the Internet. A starter kit (DNP/9200-RAK1) and an optional on-site installation service are available for evaluation of the Mod/Zbee1 functions. SSV Software Systems, Hannover, Germany. +49 (511) 40 00 042. [www.ssv-embedded.de].

Network-Ready Data Acquisition with Preloaded Development Software

A pair of new test, measurement and control products combines a 5-slot PCI backplane and a 10slot Eurocard cage in an industrial-grade chassis. A Pentium M processor runs server software on a board that occupies one of the PCI slots. This software, and the software running on internal boards themselves, protects the application from local or network-related delays. The new hardware products, the DAPserver 500 and the ruggedized DAPserver 500R models from Microstar Laboratories, each include a SATA hard drive. DAPserver products conform to the signal-interfacing channel architecture used by Microstar Laboratories: signal connectors on 3U (100 mm high) Eurocard B (220 mm deep) expansion boards that typically pre-process a signal. A DAPserver can contain up to ten of these boards, and it can connect to many more in other rack-mounted industrial enclosures. Most Microstar Laboratories expansion boards multiplex inputs or outputs to or from DAP boards. Many perform additional functions. And every new board now made is intelligent—it communicates with, and can be configured by, the onboard intelligence of the DAP connected to it. These new boards perform any signal conversion required and connect to a digital backplane preinstalled in the 10-slot Eurocard cage in a DAPserver. A DAPserver has Windows software and the DAPtools Professional software package—including full versions of DAPcell network software and DAPstudio development software—preloaded on the hard drive, running on a Pentium M processor board in one of the PCI slots. The remaining four PCI slots can contain any current DAP boards, and Microstar Laboratories provides hardware and software that combines these DAP boards into a single synchronized system. You can start development right away: use an Ethernet cable to connect a laptop, or connect the DAPserver to a network and use any PC on the network. You also can work directly on the DAPserver: add a screen, and connect a keyboard and mouse to the front-panel USB ports. Microstar Laboratories, NE, Bellevue, WA. (425) 453-2345. [www.mstarlabs.com].

VPX Conduction-Cooled XMC Carrier Offers Options

A new VPX Conduction-Cooled XMC carrier enables accelerated development of rugged conduction-cooled embedded systems. The 3U VPX XMC Carrier from PCI-Systems is a rugged conduction-cooled single-slot 3U VPX XMC Carrier that can connect one XMC module to a standard VPX backplane using PCI Express 1x 8-lane or 2x 4-lane configurations. An XMC module can therefore have two PCI Express chips on board without using an additional switch on the XMC board. PCI-Systems manufactures a variety of COTS modular designed conduction-cooled chassis for VPX, VME, CPCI and CPCI Express applications, including ATR and ARINC 600 enclosures. Several customized versions for VITA 46 and VITA 48 are available. The carrier has a separate +/- 12V, 150 mA DC-to-DC converter on board. VPX versions are available with a PCI Express bus implementation on the backplane, having 8 lanes per slot and a 64 lane switch, therefore allowing up to 7 add-on slots and a CPU slot for very high bandwidth computing applications. PCI-Systems, Laurel, MD. (301) 362-1233. [www.pcisystems.com].

High-Density Serial Communication AMC Module for Extended Temperature

A new synchronous/ asynchronous serial AMC module supports four highspeed communication channels. The TAM863 serial communication controller from Tews Technologies is implemented in FPGA logic combined with the bus mastercapable PCI interface. It guarantees long-term availability with the option to implement additional application-specific functions for customers. The TAMC863 is designed for data communications, LAN/WAN networking, aerospace/defense communications, traffic control, simulation and telecommunications applications. Several serial communication protocols are supported by each channel, such as asynchronous, isochronous, synchronous and HDLC mode. In addition, a maximum data rate of 10 Mbits/s is provided for synchronous protocols, and 2 Mbits/s is supported for asynchronous protocols. Multiprotocol transceivers are used for the line interface. The physical interface of each channel can be independently software selected for EIA-232, EIA-422, EIA-449, EIA-530, EIA-530A, V.35, V.36 or X.21. Physical connection is either through front panel I/O with an HD68 SCSI-V (VHDCI/Champ) type connector or rear I/O via P14. In order to reduce CPU overhead and increase data rates for critical applications, the TAMC863 features a receive and transmit FIFO of 512 long words (32 bit) per channel. Data transfer on the PCI bus is handled via TAMC863-initiated DMA cycles with minimum host/CPU intervention. In addition, several interrupt sources can generate interrupts on INTA for each channel, and interrupts may be enabled or disabled separately. Asynchronous and basic synchronous support for major operating systems such as Windows, Linux, VxWorks and QNX is available. Tews Technologies, Halstenbek, Germany. +49 (0) 4101-4058-19. [www.tews.com]. November 2008

Products & TECHNOLOGY VPX (VITA 46) 6U Buffer Memory Board Supports up to 32 Gbytes

A large capacity 6U VPX buffer memory board supports up to 16 Gbytes of memory on the baseboard along with dual XMC mezzanine sites and Serial RapidIO (sRIO) fabric. The MFC700 6U VPX-REDI (VITA 48) buffer memory node from Vmetro is designed for applications that buffer large amounts of high-speed data and can be utilized in signal and image processing applications, as well as data recording subsystems. Uses of buffer memory include high-speed temporary storage, interleaving, data aggregation and warehousing or the need for additional system memory through a fabric. The MFC700 supports up to 32 Gbyte DDR2 SDRAM memory in a single slot with 4-16 Gbytes on the MFC700 and 2-8 Gbytes on Vmetro MM-6171 buffer memory node XMC modules. The board supports four x4 high-speed Serial RapidIO links to the VPX P1 connector via an 8-port Serial RapidIO switch and additional I/Os to the backplane. Dual Xilinx Virtex-5 FPGAs serve as the memory controllers for the DDR2 SDRAM with ECC memory. The MFC700 provides additional RocketIO connections between FPGAs and the backplane to give developers flexibility and performance in their data movement. The MPC700 also includes advanced, corner-turning DMA engines which are especially useful in matrix transposition, where converting from columns to rows can eliminate significant processor overhead. In addition to supporting high-throughput backplane I/O, data may be brought into the MFC700 via onboard XMC sites. With dual XMC sites, the MFC700 enables I/O to be tightly coupled with a large system memory resource. This is useful for what is referred to as rate buffering of high-throughput data (i.e., controlling the rate of flow of data through a system). Incoming data from an XMC can be temporarily stored on the MFC700 and then passed to processing or recording nodes at a rate that does not overrun their capabilities. The MFC700 supports VxWorks and Linux. An API is provided for integration with other boards. The MFC700 is also VPX-REDI compliant with 1” pitch and is available in both airand conduction-cooled versions. VMETRO, Houston, TX. (281) 584-0728. [www.vmetro.com].

PXI Controller Boasts 2.53 GHz Core 2 Duo CPU

Long test cycles can be costly—and with pressure everywhere to reign in costs and development timelines, any test gear that speeds up test time is a welcome investment. With just that in mind, National Instruments rolled out their NI PXI-8108 last month. The PXI embedded controller board features an Intel Core 2 Duo T9400 processor and is designed for high-performance PXI and CompactPCI systems. With its 2.53 GHz dual-core processor and 800 MHz DDR2 memory, the PXI-8108 offers a 25 percent performance improvement over its dual-core predecessor, the NI PXI-8106, and a two times performance improvement over its single-core predecessor, the NI PXI-8196. With NI LabVIEW 8.6 software, engineers and scientists can take full advantage of the latest multicore controllers, such as the PXI-8108, by simplifying multithreaded application development and achieving increased performance without requiring major changes to existing LabVIEW code. For engineers requiring maximum performance and reliability, the NI PXI-8108 controller can be upgraded to include a 32 Gbyte PXI solid-state hard drive instead of the standard rotating magnetic disk drive. The PXI-8108 paired with the solid-state hard drive offers an extended operating temperature range of 0° to 55°C, increased reliability and speed when reading and writing to files and streaming data, and increased durability when exposed to shock and vibration due to no moving parts. Pricing for the NI PXI-8108 starts at $4,499. National Instruments, Austin, TX. (512) 683-0100. [www.ni.com.].

November 2008

COM Express Module with Multicore Options

A new COM Express Module offers OEMs a range of scalable processor options that includes the Intel Core 2 Duo, Core Duo or Single Core Celeron M. System memory supports DDR II 400/533/667 up to 2 Gbytes. Parallel and serial ATA interfaces offer flexibility in storage methods. The MB-73150 from Win Enterprises can be used across a variety of application areas, including, medical, test & measurement, gaming & entertainment, kiosks, military & government and network security. The module is appropriate for applications with multiple functions requiring high performance. OEMs can also use this powerful module to enhance existing system-level designs by increasing their functionality. In addition to the processor options, the MB-73150 features one DDRII SO-DIMM socket and an Intel 82573L Gbit Ethernet interface. Its integrated graphics support dual SDVO, Analog VGA, LVDS and TV-out interface. The module is PICMG COM Express R1.0 compliant with Flexible PCI Express and PCI expansion and supports COM Express standard features (USB, SATA, ATA, GPIO, AC 97). Linux, Windows Embedded XP and FreeBSD are also supported. OEM quantity pricing is $256 without CPU. WIN Enterprises, North Andover, MA. (978) 688-2000. [www.win-ent.com].

3U VPX XMC Card Delivers Rugged Small Form Factor FPGA Computing

A new 3U VPX (VITA 46/48) compute engine is based on the Xilinx Virtex-5 FPGA and is designed for demanding, high-performance signal and image processing applications including radar, sonar and signal intelligence. The VPX3-450 from Curtiss-Wright Controls Embedded Computing uses the small, compact 3U form factor to make it suitable for space, weight and power (SWaP) constrained applications. With software driver and IP development support from CurtissWright’s Continuum FXtools developer’s kit, the VPX3-450 speeds and simplifies the development of custom FPGA designs. The VPX3-450 combines the flexibility of a Xilinx Virtex-5 FPGA (LX110T or SX95T) and the general processing power of a Freescale 8640 Power Architecture processor with VPX’s support for high-bandwidth serial switched fabrics such as PCI Express and Serial RapidIO (SRIO). The computing power of the Virtex-5 FPGA is complemented by a balanced mix of memory and I/O. Attached directly to the FPGA is one bank of DDR2 SDRAM and two banks of QDR-II+ SRAM. Two 4-lane high-speed serial ports to the backplane and an additional port to the XMC site provide a total of 7.5 Gbyte/s bandwidth into and out of the FPGA in addition to the primary 4-lane PCI Express link to the onboard fabric. Software and development tools for the VPX3-450 are part of Curtiss-Wright’s Continuum Software Architecture (CSA), which contains the full Continuum Firmware and BSP package, plus additional VPX3-450 specific support libraries for the 8640 processor using such off-the-shelf operating systems as VxWorks and Linux. The package also provides a set of IP blocks (memory control, serial and LVDS interfaces, etc.), FPGA-specific function libraries (configuration, command bus mappings, etc.) and a scriptable FPGA simulation environment. In addition, the CSA includes the Continuum Vector algorithm library, which provides the card’s onboard Freescale 8640 Power Architecture processor a rich set of optimized signal and image processing functions utilizing the AltiVec unit. The VPX3-450 is designed to operate in rugged environments and is available in air- and conduction-cooled formats. Pricing for the VPX3-450 starts at $12,850. Availability is Q1 2009. Curtiss-Wright Controls Embedded Computing, Leesburg, VA. (613) 254-5112. [www.cwcembedded.com].

Isolated I/O Card with 24 Inputs and Outputs

A 24 output, 24 input isolated I/O card provides 24 isolated 48 VDC 2.5A output drivers. All output drivers are low saturation voltage MOSFETs for low-power dissipation. On the 7I64 from Mesa Electronics, each of the 24 output switches is isolated from the others, allowing high side, low side, push-pull and other output switch configurations. The 24 OPTO-isolated inputs will operate with input voltages from 5 to 24V. Reverse protection diodes are provided to allow use with AC inputs. A built-in watchdog timer turns all outputs off if the 7I64 is not accessed within the selectable watchdog timeout interval. The 7I64 has three host interface methods: USB, Serial RS-422 and SPI. The 7I64 can be USB powered. The serial interface supports baud rates from 115.2K to 2.5M baud. The SPI interface is compatible with Mesa’s Anything I/O cards and can be used for high-speed real-time I/O. A SPI breakout card (7I46) allows up to six 7I64s to connect to a single 50-pin Anything I/O connector. The SPI interface supports data rates to 10 Mbits/s so a full read/write of all 48 I/O bits takes approximately 3 uSec. 3.5 mm screw terminal compatible plugs are used for isolated I/O. Price of the 7I64 is $132 in quantity 100. Mesa Electronics, Richmond, CA. (510) 223-9272. [www.mesanet.com].

PCI-104 SSD Storage Adapter Offers RAID Features

Solid-state drives are rapidly usurping more and more rugged embedded applications where once only rotating disk drives had sufficient capacity. The LTPCI-104-CF from Lauron Technologies is a high-performance PCI-104 32-bit, 33 MHz, 4 channel SSD RAID adapter supporting data rates of up to 120 Mbytes/s. The module adopts the PC/104 stacking architecture, offering embedded designs a compact Solid-State Storage device. This single-slot adapter is available in 2 to 64 Gbyte capacities and is populated with only the fastest, most reliable SLC Compact Flash modules available today. Since the adapter houses all SSD memory, the LT-PCI-104-CF provides the perfect single card solution for non-rotating media requirements. The unit has an MTBF that is greater than 1,000,000 hours provided by built-in EDC/ECC and Wear Leveling algorithms. The endurance is phenomenal with Erase/Write Cycles greater than 1,000,000, with an extended version that offers 2,000,000 Erase/Write Cycles. The benefit of the built-in flash SSD controller/bridge is that it supports Ultra DMA modes, which yield data transfers at speeds of up to 133 Mbytes/s per channel. The unit supports RAID 0, RAID 1, RAID 0+1, RAID 5 or JBOD. Stripping modes transfers data to all four channels simultaneously while mirror modes transfers data on both channels. Lauron Technologies, Naples FL. (239) 431-6237. [www.laurontech.com]. November 2008

Products & TECHNOLOGY 3U VITA 46 (VPX) FPGA Processing Engine Is FMC/VITA 57 Compliant

A new 3U VPX FPGA processing engine supports the new FPGA mezzanine card (FMC/ VITA 57) standard. The FPE320 from Vmetro incorporates the largest available Xilinx Virtex-5 FPGAs and an onboard FMC mezzanine site. This combination of high-performance FPGA processing and the flexibility of FMCbased I/O in an air- or conduction-cooled 3U VPX package, is suitable for demanding real-time applications such as electronic warfare (EW) and signal intelligence (SIGINT), electronic counter measures (ECM) and UAV sensor acquisition. In 3U systems, physical board size has limited the use of large FPGAs with larger I/O mezzanines such as PMC/XMC. The FMC I/O mezzanine standard enables the use of the largest available Virtex-5 FPGAs in 3U systems because the I/O space requirements are minimized. The FPE320 supports Xilinx Virtex-5 SXT, LXT and FXT FPGAs in the FF1738 package and has a single FMC (VITA 57) mezzanine site for I/O. In addition, the FPE320 provides two banks of DDR2 SDRAM and two banks of QDRII SRAM memory along with four x4 high-speed serial interconnects (16 RocketIO GTPs) to the backplane for PCI Express, Aurora, or Serial RapidIO and additional user-defined I/Os to the backplane. Development for the FPE320 is supported by Vmetro’s FusionXF FPGA development kit. FusionXF is a collection of software and associated HDL functions to aid customers in the development of their FPGA algorithms and logic for Vmetro’s customer-programmable FPGA products. It is targeted at reducing the design time and optimizing the performance of complex embedded real-time DSP systems comprised of multiple FPGA and PowerPC processors. FusionXF includes a Software Development Kit (SDK) and an HDL Development Kit (HDK). The SDK provides host software support for Windows, VxWorks and Linux. The HDK contains the FPGA interface definitions and HDL functions to build a fully functional FPGA design. Example software and HDL are provided for the interconnects and the external memory with the Virtex-5 FPGA.

Integrated Processor with LCD Controller for ExtendedReliability Applications

An integrated processor combines a high-performance e600 core built on Power Architecture technology, a System-on-Chip (SoC) platform and an LCD controller. The PC8610 from e2v features a single e600 core running at up to 1333 MHz with an extendedtemperature range of -40°C to +110°C. With its 256 Kbyte backside L2-cache with ECC, and its AltiVec 128-bit vector processing unit, the PC8610 delivers the level of performance required by computation-intensive tasks such as image processing or display applications. The embedded LCD controller supports realtime display of 24 bits per pixel with a maximum resolution of SXGA (1280 x 1024). The integrated DDR2 memory controller and the two PCI Express ports are providing the bandwidth to feed the processor with data, while the 32-bit PCI2.2 bus supports connectivity to the legacy PCI subsystems.

VMETRO, Houston, TX. (281) 584-0728. [www.vmetro.com].

Rugged Fiber-to-USB Converter Does Optical Isolation

USB has opened up a whole new world of performance for embedded PC applications. Blending that with a fiber link sweetens the deal. Electro Standards Laboratories has announced the Model 4165, a ruggedized Fiber-to-USB interface converter. With its integrated rate buffering, the Model 4165 converts USB 2.0-compliant data from a standard PC to a serial asynchronous data interface over fiber with a user-selectable baud rate of up to 3 Mbits/s. Model 4165 is ideal for PC communications requiring high speed, secure communications and optical isolation. Applications include constructing an optically isolated point-to-point communication link between the USB ports of two PCs, or an optically isolated high-speed communication link between a PC and a serial data network subjected to a high EMI environment that might corrupt the communication over a copper interface. The Model 4165 features ESD protection circuitry on the USB I/O connector. The converter is available as the Model 4166 board only with front-mounting threaded brackets for rack mounting in embedded applications. It is also available in a desktop package with DIN rail mounting hardware for applications that require an enclosure. Electro Standards Laboratories, Cranston, RI. (401) 943-1164. [www.electrostandards.com].

November 2008

The PC8610 is manufactured on Freescale’s 90nm process technology and is now available in an extended-temperature range (-40° to +110°C), and e2v also plans to support the military-temperature version (-55° to +125°C) of the product in the first quarter of 2009. e2v. Saint-Egrève Cedex, France. +33 (0)4 76 58 30 00 [www.e2v.com].

AMC Reference Design Kit Based on the PowerPC 460GT

An Advanced Mezzanine Card (AMC) form factor dual-processor reference design kit for the Power Architecture 460GT processor from Applied Microcircuits is a key component in the company’s strategy to support Advanced TCA. The kit, named Arches, provides developers with options for hardware, software, development tools and connectivity interfaces. Arches is an Advanced Mezzanine Card (AMC) industry-standard solution supporting systems based on Serial RapidIO (AMC.4), Gigabit Ethernet (AMC.2) and PCI Express (AMC.1) interconnects. The new reference design kit provides users with a comprehensive set of resources including: a custom-designed board in the AMC form factor, industrystandard software development tools, open-source middleware for interprocess communications from Enea, a leading RapidIO network management and diagnostic tool from FETCorp, system-level benchmarks, and a complete hardware/software design package. The Arches card, conforming to the standard single width mid-size AMC form factor (180 mm x 74 mm x 17 mm) includes two AMCC PowerPC 460GT processors, each operating at a clock frequency of 1.0 GHz. Other hardware features include 1 Gbyte of DDR2 SDRAM, 128 Mbytes of NOR flash, 1 Gbyte Micro-SD flash, two serial ports on the front panel, two 10/100/1G Ethernet ports on the front panel, four 10/100/1G Ethernet ports on the AMC connector, x1/x4 Serial RapidIO port on AMC connector, x1/x4 Serial RapidIO/PCI Express port on AMC connector, a shared JTAG connector and two trace connectors. The flash image includes Linux 2.6 kernel and U-Boot boot firmware, along with a file system that incorporates the RapidFET configuration software as well as the open source LINX interprocess communications (IPC) framework developed by Enea, plus a range of AMCC-developed sample applications, benchmarks and utilities. To assist customers in developing their own system software based around the Arches platform, an Embedded Linux Development Kit (ELDK) CD from Denx is included in the kit. The suggested distributor resale price for each kit is $2,995. Applied Microcircuits Corporation, Sunnyvale, CA. (408) 542-8600. [www.amcc.com].

XMC Card Enables High-Speed Sensor I/O for Embedded Real-Time DSP Systems

The popularity of high-speed serial interconnects in embedded real-time DSP systems, and the effectiveness of FPGAs to interface to sensor I/O, make the mezzanine cards based on them very attractive, demanding, real-time applications such as remote sensor interfaces, data recorders and embedded real-time distributed computing. The XMCFPGA05F from Vmetro incorporates the Xilinx Virtex-5 FPGA, highspeed fiber-optic transceivers, DDR2 SDRAM memory, DMA controllers and a choice of interfaces. The XMC-FPGA05F supports the Virtex-5 SX95T and LX155T FPGAs in the FF1136 package. Alternative FPGAs can be provided on request. Fiber-optic links are enabled by four single- or multi-mode, front panel, fiber-optic transceivers that support speeds including 2.015, 2.5 and 3.125 Gbits/s. An IP core for fiber-optic protocols such as Aurora, Serial FPDP, Serial RapidIO or Ethernet can be loaded into the FPGA to handle data flow through the transceivers. The XMC-FPGA05F has four 128 Mbyte banks of DDR2 SDRAM memory with bandwidth approaching 1 Gbyte/s. The PMC/XMC form-factor board supports both PCI-X/PCI and x8 PCI Express 1.1 host interfaces. DMA controllers simplify data movement with enough channels to support a dedicated DMA controller for each fiber-optic interface. The XMCFPGA05F has onboard flash to store multiple FPGA images and a “flash bypass mode” for secure applications to enable direct FPGA configuration by PCI, PCI-X or PCI Express host interfaces. In addition, there is a 64-bit user I/O option via either the PMC Pn4 or XMC Pn6 ports, which is directly linked to FPGA for high-speed parallel or custom I/O from the backplane or host.

Development for the XMC-FPGA05F is supported by Vmetro’s FusionXF development kit. FusionXF includes a Software Development Kit (SDK) and an HDL Development Kit (HDK). The SDK provides host software support for Windows, VxWorks and Linux, including a driver framework for high-speed DMA access between the XMC and host CPU, FPGA reconfiguration and diagnostics. The HDK contains the FPGA interface definitions and HDL functions to build a fully functional FPGA design. The HDK includes example designs that show how to implement common FPGA functions such as control registers, DMA engines and interrupts, and how to control these functions and communicate with them from software. VMETRO, Houston, TX. (281) 584-0728. [www.vmetro.com].

November 2008

Products & TECHNOLOGY Rugged Conduction-Cooled 3U CompactPCI SBC Board with Enhanced PowerPC

Enhanced PowerPC performance and rugged conductioncooled construction highlight the new 3U CompactPCI CPU board from Kontron. The CP3210 boasts a fast clock rate of 733 MHz, accelerated DDR SDRAM (266 MHz, + 33.3 %), double the amount of system and user flash and a Gigabit Ethernet port for faster data throughput and overall greater system performance. The CP3210 is an enhanced version of the Kontron PowerEngineC7, a solution already embedded in major defense programs. Additionally, the new Kontron CP3210 incorporates a thermal sensor for health monitoring and thermal management. Just like the PowerEngineC7, the new 3U CompactPCI CPU board is designed to meet the harshest and most demanding requirements through its very low-power dissipation, real-time and certifiable software support as well as rugged conduction-cooled design. The CP3210 offers an extensive range of standard functions and expansion options including the new powerful PowerPC G3 750FX RISC processor clocked at 733 MHz, onboard user memory of 512 Mbyte DDR SDRAM with ECC clocked at 266 MHz, 128 Mbytes of system flash memory, 256 Mbytes of user flash memory and 128 Kbytes of nvSRAM with realclock. It also offers two onboard serial lines, two Ethernet channels—one Gigabit and one 10/100 as well as one 33/66 MHz PMC expansion slot (PCI Mezzanine Card). To further extend the I/O capabilities, an additional PMC can be implemented via the rugged PMC carrier CPMC1. The Rugged Conduction-Cooled (RC) design enables reliable operation in temperatures ranging from -40° to +85°C according to VITA 47 recommendations. The board is delivered with PowerOn Built-in-Tests and the Open Source U-Boot boot-loader firmware with full CPU source code under GPL. Kontron provides the Real Time Operating Software VxWorks 6.2 Board Support Package, and the Kontron CP3210 offers support for the ElinOS embedded Linux and the DO-178 B and ARINC 653 certifiable PikeOS software provided by Sysgo. Kontron, Poway, CA. (888)-294-4558. [www.kontron.com].

micro-ATX Motherboard Features 45nm Core2 Quad Processor Q9400

A micro-ATX form factor motherboard utilizes the new Intel Q45 Express chipset with Intel I/O Controller Hub 10DO. This new embedded board supports the 45nm Intel Core2 Quad processor Q9400 with up to 6 Mbytes of shared L2 cache and up to 1333 MHz Front Side Bus (FSB), delivering high-performance computing in multithreaded and multitasking environments. The EL330-DR microATX platform from ITOX supports Intel Trusted Execution Technology (Intel TXT) to protect against software-based attacks and safeguard the confidentiality and integrity of data stored or created on an embedded system. In addition, this industrial motherboard features an integrated Intel Graphics Media Accelerator 4500, with the latest graphics technology to enhance multimedia applications. Maximum performance is leveraged with up to 8 Gbytes of DDR3 800 MHz or 1066 MHz memory and two PCI Express Gigabit Ethernet controllers. The EL330-DR also provides 4 Serial ATA ports with speed up to 3 Gbits/s, 1 UltraDMA 100 controller supporting two IDE devices, 8 USB 2.0 ports, 2 Serial COM ports, 1 PCI Express x16 slot, 1 PCI Express x8 slot and 2 PCI slots.

Module Supports All Important Industrial Ethernet Protocols

A new Industrial Ethernet Module enables customers to easily connect their devices to networks based on an Industrial Ethernet standard. The new module from IXXAT was designed from the ground up to support various protocol standards. The use of an Altera Cyclone III FPGA has resulted in low manufacturing costs for the module as well as making it more powerful, lower priced, smaller, and able to be used more flexibly than its predecessor. The Industrial Ethernet Module will be offered for Powerlink, Profinet, EtherNet/ IP, EtherCAT and SERCOS III. The contents of delivery include a protocol-independent host API, which enables the customer to switch between the protocols very easily by making only slight changes to the application. Among other things, IXXAT plans to offer an Ethernet switch, which is integrated into the Module FPGA, by end of this year. IXXAT supports the module with an evaluation kit, which, in addition to software and documentation, includes a carrier board and an adapter board for the connection of various CPU modules. If the form factor of the Industrial Ethernet Module is not suitable for integration into the customer device, IXXAT offers a design-in solution. Furthermore, IXXAT also offers the development of fully customized solutions on a project basis. IXXAT, Bedford, NH. (603) 471-0800. [www.ixxat.com].

The EL330-DR micro-ATX motherboard is suitable for demanding applied computing and x86 embedded systems applications including voice messaging, medical electronics, industrial control, security & surveillance, telecommunications, ATM/POS, digital signage, gaming and kiosk systems. It also has guaranteed availability for seven years to continually save customers the time and expense associated with additional product testing and verification processes. Pricing starts at $390 with OEM and volume pricing available. ITOX, East Brunswick, NJ. (732) 390-2815. [www.itox.com].

November 2008

Ruggedized Version of IP-Based Wireless Sensor Network for Harsh Environments

An “outdoor-ready” version of an Internet Protocol-based wireless sensor network is geared for use in the growing number of sensing environments where protection from dust, water, corrosion and other harsh conditions is required. PhyNet N4X from Arch Rock gives system integrators the flexibility of batterypowered outdoor nodes connected to a Web-based data platform for developing monitoring solutions in markets such as urban or municipal networks, high-end agricultural products, EPA Superfund and “brown field” development sites and solar power fields. PhyNet addresses largescale sensing applications with a three-tier architecture that allows the formation of large, resilient Internet Protocol (IP)-based sensor networks that can be managed centrally as part of the enterprise IP infrastructure. Because PhyNet extends standard IP technology out to the sensor network mesh and even to individual sensor nodes, those nodes can communicate directly with any other IP devices on the enterprise network while being part of well-understood IP-based security schemes. In PhyNet N4X, the PhyNet server sits in a datacenter or other protected location; the sensor nodes, the WSNs that connect them, and the PhyNet Routers that connect the WSNs, reside at the outdoor site to be monitored. New elements of PhyNet N4X include the NEMA 4X/IP 66 ruggedized enclosures for those parts of the PhyNet architecture potentially exposed to harsh environments: the PhyNet Router and the Arch Rock IPsensor and IPserial Nodes. In addition, the Power Pack is an external battery pack for all outdoor sensor nodes, enabling easier battery replacement in harsh environments, without disturbing the sensitive WSN node electronics. An IPrelay Node is a new node type that has no onboard sensing functions but sits between sensing nodes to extend wireless transmission range utilizing mesh routing. And, also to extend transmission range in outdoor settings, Arch Rock has designed a new higher-gain antenna for the PhyNet Router. PhyNet products in NEMA 4X/IP 66 enclosures are priced as follows: PhyNet N4X Router $1,995, IPserial N4X Node $395, IPsensor N4X Node $395, IPrelay N4X Node $295, Power Pack N4X $100. A high-gain antenna kit for the PhyNet Router is priced separately at $295. The PhyNet Server is priced at $3,495. Arch Rock, San Francisco, CA. (415) 692-0828. [www.archrock.com].

PrAMC Features 45nm Core2 Duo SL9380

A next-generation processor AdvancedMC (PrAMC) is based on the latest 45nm Intel Core 2 Duo processor SL9380 running at up to 1.8 GHz, coupled with the Intel 3100 chipset, an integrated memory and I/O controller operating with 800 MHz Front Side Bus. The single-wide PRM-100 PrAMC from JumpGen Systems features dual 10 Gbit/s Ethernet interfaces and dual processor cores to host high-bandwidth embedded communication applications. The PRM100 is a compact but powerful compute solution optimized to meet customers’ most challenging performance and thermal requirements with high-speed connectivity. Additional features include up to 8 Gbytes of ECC DDR2 memory running at 400 MHz and up to 8 Gbytes of persistent memory. In addition to dual GigE interfaces (AMC.2 Type E2), it also provides dual 10GigE interfaces (AMC.2 Type 6 or AMC.2 Type 5 with 2nd fabric interface in lanes 17-20 along with dual SATA interfaces (AMC.3). The front panel I/O includes 2 10/100/1000BaseT Ethernet, RS-232 Serial and USB. The PRM-100 is available in both full and mid-size AMC configurations for AdvancedTCA (ATCA), MicroTCA and proprietary architecture systems and it is RoHS compliant. JumpGen Systems, Carlsbad, CA. (760) 931-7800. [www.JumpGen.com].

XMC Serves Up Obsolescence-Proof GPU

Subject to the whims of the consumer gaming market, graphics processing technology suffers some of the worst obsolescence problems. Quantum3D announced the availability of its Sentiris AV1, an XMC it claims as the first to offer an obsolescence-proof design. This is accomplished by leveraging a FPGA-based video- and graphics-processing core instead of the traditional approach of using dedicated graphics processing units (GPUs), which are rapidly made obsolete by end-of-life (EOL) announcements. The Sentiris AV1 XMC was conceived to address the ongoing needs of high safety- and security-critical applications such as primary flight instrumentation and multi-level security (MLS) systems. Certifiable to DO-178B for software and DO-254 for hardware, Sentiris AV1 is the first Sentiris AV1 built using a groundbreaking design approach. The company’s approach is different from traditional GPUs, however, in that it has fully DO-254-certifiable firmware rather than the traditional approach of obtaining a hardware waiver based on a statistical time test. Sentiris AV1 offers 512 Mbytes of ECC-protected DDR2 memory, dual RGB and dual HD-SDI outputs and eight lanes of PCI Express. The product comes standard as a conduction-cooled XMC. The company is currently accepting orders for Sentiris AV1, starting at $9,980. Quantum3D, San Jose, CA. (408) 361-9999. [www.quantum3d.com]. November 2008

Products & TECHNOLOGY 8051 Compiler Gets 55% More DMIPS/MHz with 30-50% Smaller Code

What is being called an “omniscient” ANSI C compiler increases DMIPS/MHz and cuts the power drain of Silicon Labs’ 8051-based mixed-signal MCU families, including the ultra-low-power, singlecell C8051F9XX devices. Hi-Tech C Pro for the Silicon Labs 8051 MCU Family reduces interrupt latency, code size and SRAM usage by dynamically optimizing context size and register coverage across all modules of a C-language program. The result is both better code density and fewer instructions cycles required to execute the program. Fewer instruction cycles means the CPU can spend more time in sleep mode, further reducing the already low power consumption of Silicon Labs’ devices. Using Silicon Labs’ Dhrystone V1.1 benchmark and a 22.11 MHz clock, Hi-Tech’s “omniscient code generation” (OCG) compiler achieves 55% more DMIPS/MHz and 49% smaller code size than any nonOCG compiler. Hi-Tech’s C Pro compiles Silicon Labs’ Ethernet boot loader with 30% smaller code and 20% less SRAM usage. Hi-Tech C Pro utilizes omniscient code generation technology that collects comprehensive data on every register, stack, pointer, object and variable declaration across the entire program. It uses this information to optimize register usage, stack allocations and pointers across the whole program. It also ensures consistent variable and object declarations between modules and deletes unused variables and functions. Compilers without OCG compile each code module independently, without information from the other parts of the program. Since they do not have information about which registers are used throughout the whole program, they often must save all eight general-purpose registers, as well as other on-chip resources for every interrupt. This process requires as many as 48 clock cycles. In contrast, an OCG compiler has comprehensive information about every variable, register and pointer throughout the entire program. Since it knows exactly which registers will be used for any interrupt, it can determine the context size dynamically, based on the state of the program at the time of compilation. Code generated by an OCG compiler may not need to save any registers during an interrupt routine, thereby saving up to 48 cycles that are wasted by a non-OCG compiler. Hi-Tech C Pro for the Silicon Labs 8051 MCU Family is available now at the introductory price of $1,195 through December 31, 2008, after which it will retail for $1,495. HI-TECH Software, Gilroy, CA. (800) 735-5715. [www.htsoft.com].

Solid-State Drives Support SD, MMC and SATA Interfaces in Blade Form Factor

To address the growing market demand for solid-state drives (SSDs), SiliconSystems is developing Secure Digital (SD), MultiMediaCard (MMC) and Serial ATA (SATA) interfaced SiliconDrive II Blade product families in its SiliconDrive II Blade form factor. SiliconDrive II Blade is a flexible advanced solid-state storage solution in a new ultrasmall form factor. SiliconDrive II Blade is based upon SiliconSystems next-generation storage platform that offers faster read/write speeds and enhanced performance and reliability to address critical OEM design considerations such as storage system endurance, elimination of drive corruption and the ability to forecast usable life. SiliconSystems developed its SiliconDrive II Blade product families to provide greater design flexibility to OEMs seeking to use the Universal Serial Bus (USB), SD, MMC or SATA interfaces that were originally developed for consumer desktop and mobile applications, in rigorous OEM applications in the netcom, industrial, embedded computing, data center, military and medical markets. SiliconDrive II USB Blade products are shipping now in capacities up to 4 Gbytes. SiliconDrive II Blade products featuring the SD, MMC and SATA interfaces will be available for volume shipment in the first quarter of 2009. SiliconSystems, Aliso Viejo, CA. (949) 900-9400. [www.siliconsystems.com].

November 2008

Voice Media Platforms Target Time-to-Market for Telecom Apps

A family of pre-integrated development platforms for telecommunication network equipment manufacturers provides a robust combination of hardware and software for developing multimedia applications and offers significant time-to-market advantages through the pre-integration of all platform elements. The Voice Media Platforms (VMPs) family from Performance Technologies provides a foundation for new interactive and multimedia applications such as Voice over IP (VoIP), audio conferencing, interactive voice response (IVR), voice and fax messaging, or any application requiring bridging between PSTN and IP networks. The VMPs are available in a number of preconfigured platforms that include a 4U, 7U, or 12U NEBS-compliant chassis. This scalable approach offers telecom equipment manufacturers a choice of platform and system design configuration options to best meet their requirements, including capacity for up to 13,824 voice ports fully loaded. The 12U VMP option (VMP121S) comes standard with fourteen pre-integrated Media Blades with T1/E1/J1 network connectivity and voice processing technology for a total of 10,572 G.711 ports. It also includes NexusWare, the company’s Carrier Grade Linux OS and development environment. In addition, it provides two dual-core single board computers, a 2 Tbyte RAID storage blade and redundant Ethernet switches and intelligent shelf managers as well as IPMI-enabled power supplies. Flexible wireless and wireline voice coding support includes G.711, G.726, G.723.1A, G.729A/B, AMR, EVRC and QCELP Performance Technologies, Rochester, NY. (585) 256-0200. [www.pt.com].

PCIe Gen2 Switches Support Multicast and Multi-Root Partitioning

A new series of PCI Express (PCIe) system interconnect switches provides higher levels of performance, availability and optimal resource utilization in demanding enterprise applications. The new PCIe Gen2-compatible switching solutions from Integrated Device Technology provide system architects with new levels of flexibility through a switching architecture that can be partitioned, and that enables dynamic assignment of PCIe slot and I/O peripherals for on-the-fly resource sharing and load balancing among multiple root complexes. The architecture also provides increased system availability and reliability options with advanced failover support. Moreover, the architecture allows developers to achieve improved power efficiency by reducing power consumption and board space requirements with a single IDT device replacing multiple discrete switches.

A key new feature of the IDT switches is that they support multicast. This key construct, which allows any switch port to simultaneously send identical data to two or more switch ports, increases system resource utilization by decreasing the previously required hardware and software overhead needed to send copies of data in a looped manner. This goes beyond the PCIe standard and ensures consistency in data and table information among multiple host processors, and extends the reach of PCIe into emerging enterprise computing and communications applications requiring robust data coherency and sharing. IDT is announcing five new devices with system interconnect solutions targeting data and services plane traffic as well as control plane traffic. Solutions for high-performance data traffic include the industryâ&#x20AC;&#x2122;s largest PCIe switch, a 64-lane and 16-port device, a 48-lane, 12-port device and a 32-lane, 8-port device. Devices for control plane traffic include a 34-lane, 16-port device and a 22-lane, 16-port device. All of the new devices are PCIe specification 2.0 compliant (Gen2) and are based on a robust system interconnect switch architecture that is optimized to meet the capacity, scalability and predictable throughput requirements demanded by systems for consistent high performance and flexible system resource sharing. As with other established IDT solutions, the new devices have been optimized for low power and offer industry-leading performance-per-watt, enabling scalable and increasingly dense system architectures and reducing the total cost of ownership by significantly minimizing thermal management requirements. All of the new switches have a dedicated evaluation and development kit for device testing, analysis and system emulation. Each kit consists of a hardware development board with representative upstream and downstream connectivity, and an IDT-developed, GUI-based software environment that enables the designer to tune system and device configurations to meet system requirements. Integrated Device Technology, San Jose, CA. (408) 284-8200. [www.idt.com]. November 2008 Austin_01.indd 1

53 6/3/08 4:56:04 PM

Products & TECHNOLOGY 3619-3711 MHz VCO Targets Comm Apps

A new Voltage Controlled Oscillator (VCO) operates from 3619 MHz to 3711 MHz with a control voltage range of 0.1V~16V. This VCO features a typical phase noise of -106 dBc/Hz @ 10 KHz offset and has excellent linearity. Output power is typically +5.0 dBm. The model CVCO55CC-3619-3711 from Crystek is packaged in the industry-standard 0.5-in. x 0.5-in. SMD package. Input voltage is 8V, with a max current consumption of 40 mA. Pulling and Pushing are minimized to 3.00 MHz and 0.50 MHz/V, respectively. Second harmonic suppression is -20 dBc typical. The CVCO55CC-3619-3711 is suitable for use in applications such as digital radio equipment, fixed wireless access, satellite communications systems and base stations. Pricing for the CVCO55CC-3619-3711 will start at $19.52 each in volume. For additional pricing details, contact Crystek Corporation. Crystek Corporation, Ft. Myers, FL. (239) 561-1025. [www.crystek.com].

COM Express Module Based on Atom N270 and Mobile 945GSE Express Chipset

Embedded Motherboards Utilize the 45nm Core2 Quad Q9400

congatec, Cardiff-by-the-Sea, CA. (760) 635-2600. [www.congatec.us].

Kontron, Poway, CA. (888)-294-4558. [www.kontron.com].

An economically priced COM Express module features the Intel Atom processor N270 and the full-featured Mobile Intel 945GSE Express chipset in conjunction with the Intel I/O Controller Hub 7-M. The CA945 module from Congatec delivers high performance-per-watt at optimized price levels. The total thermal design power (TDP) of the processor/chipset combination is only 8 watts, making applications that typically require less than 5 watts ideal for this module. Combining this low power consumption with ACPI 3.0 battery management also provides the ability to create fully featured mobile embedded applications. The conga-CA945 supports three PCI Express Lanes, eight USB 2.0 ports, two serial ATA, two Express Cards, one IDE Interface and Intel High Definition Audio. Additionally, it features a 32-bit PCI bus, multi-master IÂ˛C bus, LPC bus, fan control and Gigabit Ethernet in a 95x95 mm package. A DDR2 SODIMM socket allows for flexible memory configuration up to 2 Gbytes in size. The conga-CA945 is powered by the 45nm Intel Atom processor N270 that is equipped with 512 Kbyte L2 cache. It operates at 1.6 GHz clock speed and utilizes a 533 MHz front side bus. Thanks to the Intel Speedstep Technology, the CPU will rarely reach its maximum power consumption value of 2.5 watts when used in real-life applications. The Intel Atom processor N270 includes 2-Threads support in order to allow for virtualization. The conga-CA945 acts like a dual-core system and can independently operate two operating systems simultaneously. The Intel Graphics Media Accelerator 950, which is integrated within the Mobile Intel 945GSE Express chipset, allows for more than 10 Gbyte/s bandwidth to a maximum of 224 Mbyte video memory allocation to provide power-efficient 32-bit 3D graphics. Both independent graphic pipelines can use dual-channel LVDS, single SDVO or analog VGA. The conga-CA945 implements the Embedded Panel Interface (EPI) and the VESA DisplayID standard allowing for automatic recognition of the attached flat-panel display. All Congatec modules are equipped with an embedded BIOS and a board controller that enhance embedded features such as system monitoring, watchdog timer and the IÂ˛C bus. With the ability to be isolated from the main x86 processor, these features are also made available in stand-by mode, thus promoting further power saving functionality. In addition to enhanced power management, the Congatec Embedded BIOS supports ACPI 3.0 with battery management. Pricing starts at $290.

November 2008

A new generation of embedded motherboards offers the 45nm Intel Core2 Quad processor Q9400 and the Intel Q45 Express chipset on the ATX and Flex-ATX form factors with 7-year long lifecycle support. The new embedded ATX and Flex-ATX motherboards from Kontron feature the Intel processors up to the 45nm Intel Core2 Quad processor Q9400 with 2.66 GHz, 6 MB L2 cache and a FSB of up to 1,333 MHz. They are also equipped with the Intel 82Q45 Graphics and Memory Controller Hub and Intel I/O Controller Hub 10 (Intel ICH10DO) for 7-year long lifecycle support for embedded systems. Furthermore, the Kontron KTQ45/ATXE and Kontron KTQ45/FLEX motherboards support the latest Intel Active Management Technology 5.0 (Intel AMT 5.0) and an integrated Intel Trusted Platform Module (TPM 1.2). In addition, the latest integrated data protection engine ensures fast and secure hardware encryption of all transferred data without affecting system performance. Embedded applications can take advantage of enhanced security and remote management for easier maintenance and higher system availability, therefore reducing total costs of ownership. Intel AMT lets system managers remotely carry out tasks such as installation of a new OS or setting BIOS parameters without the need for additional remote management hardware or an on-site presence. A high-speed digital logic motherboard design using a multi-layer stacking PCB ensures signal integrity, reduces radiation, improves signal quality and aids in the decoupling of the power bus, resulting in high-quality electromagnetic compatibility and superior motherboard quality and performance. The Kontron KTQ45/ATXE and Kontron KTQ45/FLEX support up to 8 Gbytes of DDR3 SDRAM. Graphic-intensive applications are supported by integrated graphics for DVI, HDMI, SDVO and DisplayPort via the fast PCI Express x16. Hardware-based video signal decoding routines for H.264 BluRay decoding are integrated into the Northbridge. This significantly increases system performance by reducing the load on the processor. For applications requiring an extended range of interfaces, the embedded motherboards offer PEG and 1x PCI Express x4, up to 4 x PCI as well as 2 x Intel Gigabit Ethernet, one with Intel AMT 5.0 support, and 12 USB interfaces. Data storage media are connected via 4 x SATA 3 Gbyte interfaces with RAID 0/1/5/10 functionality for enhanced data security. In addition, Intel AMT 5.0 provides remote access for easier maintenance, higher system availability and reduced total cost of ownership. The new motherboards support Windows Vista, Windows XP, Windows XP Embedded and Linux, and are available now.

PCI Express Serial Interface Includes Two RS-232/422/485 Ports

A two-port PCI Express serial interface adapter with advanced UART architecture includes 128-byte FIFOs—eight times larger than those found on comparable serial adapters—and provides error-free operation in high-speed serial applications. Additionally, the COMM+2.PCIe from Sealevel Systems has a 16C950 UART that supports 9-bit framing and is fully software compatible with legacy 16550 UART applications. The serial ports on the COMM+2.PCIe are individually configurable for RS-232, RS-422, or RS-485. The 14.7456 MHz oscillator and the UART’s flexible clock prescaler support the widest range of standard and non-standard baud rates. With this architecture, each serial port is capable of data rates to 921.6 Kbits/s. In RS-485 mode, the transmitter is automatically enabled in hardware, eliminating the need for application software control. This allows the COMM+2.PCIe to be used with standard serial applications while removing the risk of bus contention and data corruption. In RS-232 mode, all modem control signals are implemented providing maximum compatibility with a variety of serial peripherals, such as PLCs, bar code readers, scales and other data acquisition/control devices. All Sealevel PCI Express serial adapters include SeaCOM software for Windows 98, ME, 2000, NT, XP, Vista and Linux operating systems. Customers also receive WinSSD, a full-featured application for testing and diagnostics including BERT (Bit Error Rate Testing), throughput monitoring, loopback tests and test pattern message transmissions. The COMM+2.PCIe is available immediately from stock priced at $289 for low-profile and standard size (PCI Express) slots. Sealevel Systems, Liberty, SC. (864) 843-4343. [www.sealevel.com].

Time Code Processor Card Embraces PCI Express

Everything in the computing realm has made the trek over to switched fabrics, and timing processors are no exception. Spectracom announces the availability of a new feature-rich bus-level timing card for the PCI Express standard. The product, TSyncPCIe Time Code Processor, represents the state-of-theart timing card for synchronizing critical operations in embedded computing systems for industries such as aerospace, defense and industrial automation. The new time code processor is based on Spectracom’s new time synchronization platform that offers the most flexibility including the ability to add features in the field from future development and changes in user deployment. The TSync-PCIe offers the most capability of any timing card for PCI Express in the low-profile form factor. The card comes with a comprehensive set of standard features to allow users to read and generate time codes, program timing and frequency signals, and time-stamp events with greater flexibility than ever before. The card has the ability to read multiple prioritized time codes, generate multiple time codes and other synchronization outputs, and time tag multiple signals at a maximum rate over 50,000 events per second. Synchronization to GPS is available via an onboard or remote GPS receiver. Spectracom, Rochester, NY. (585) 321-5800. [www.spectracomcorp.com]. Untitled-5 1

3/17/08 1:37:08 PM

NEWS, VIEWS &

Comment November 2008

Warren Andrews Associate Publisher

Embedded Computer Industry Holding its Ground

just returned from the East Coast version of the Embedded Systems Conference in Boston. Despite cries from the financial community that “the sky is falling,” everyone I spoke to at ESC—save one—was relatively upbeat and optimistic. While the financial meltdown was on everyone’s lips and very much a concern, few saw any impact on their businesses at all. In fact, several companies reported increased bookings despite the turbulence. There were only a few complaints from vendors selling into sectors such as the semiconductor equipment suppliers. Interestingly, this sector is a leading indicator of both the semiconductor and electronics industry. Applied Materials, Novellus and KLA Tencor (see chart) all suffered a decline in stock prices. While we reported last month that Intel, TSMC and Samsung are moving to 450 mm wafers from 300 mm wafers, that business has not yet started to materialize and may well wait until mid-2009 or beyond. In addition, Dutch Semiconductor equipment maker ASML’s net profit dropped some 56% in its third quarter. Bad vibes. The government and aerospace market continues strong with some wavering as reported last month. Several vendors are tenuous but continue to see bookings and billings at about a 1:1 ratio. There continues to be a lot of “wait and see.” And while on the topic of ESC, small form factor products dominated the landscape with a real focus on some of the new processors from Intel, Via and others. While there was a scattering of larger boards, the bulk of hardware exhibitors—at least 50% of the total vendor space—was focusing on small form factor boards from PC/104 to ComExpress, to all varieties of standard boards, derivatives and custom approaches. And while many of the boards boasted new processors, many applications just don’t need the extra power and all the frills, and are in the 386/486 performance range.

November 2008

Health of the Industry

Often, measuring the health of the industry is difficult. However, at least two of the leading companies in the embedded computer industry, Kontron and Mercury Computers, are public companies and report their quarterly results. Kontron again tops the charts showing a 7.7% gain to €123.8 from €115.0 for the same period the previous year. Similarly, margins rose to 31.7% resulting in overall year-on-year operating earnings increasing by over 29%. And if you’ve been following the financial press looking at the dark clouds over the economy, Kontron continues to have a positive outlook for the year. With “third-quarter sales growth, the high level of order backlog of almost € 300 million and, in particular, the further rise in design wins, both in terms of numbers and volumes, are positive indicators for Kontron AG’s continued growth,” says Kontron CEO Ulrich Gehrmann. Mercury’s story was not quite as rosy. While the company sold some of its assets, the figures it reports have been adjusted to reflect these businesses as discontinued operations. First quarter 2008/9 revenues, the company reports, increased $1.1 million from the prior year’s quarter to $49.1 million. GAAP operating losses were $1.3 million, an improvement of $1.6 million compared to an operating loss of $2.9 million in the first quarter of 2008. The company reports a backlog at the end of the first quarter of $87.8 million, $0.7 million above the previous quarter. It also reported a book-to-bill ratio of 1:1.01 for the quarter. Mercury was also cautious in its business outlook, commenting that it expected revenues to be in the range of $47 to $49 million (flat to slightly down from last quarter), and expects to show a GAAP loss in the area of $0.22 to $0.14. Despite introducing its PowerBlock 50 architecture—an ultra-high-performance, ultra-compact sensor and signal proces-

sor system—along with other developments, the company has not been able to capitalize on a broader range of defense applications.

Not all Is Rosy

While the embedded computer industry by and large has been holding up its side, other areas—and perhaps some leading indicators for the embedded market—have not done so well. Texas Instruments, for example, saw its third quarter income drop 27% on lower sales. Despite the fact that the SIA reports cell phones being the support of the semiconductor industry, TI is cutting costs by about one-third in its wireless business—especially in its cellular baseband operations. Samsung is also feeling the pinch as its net falls 44%. The company’s semiconductor business, its biggest profit contributor, had a sharp decline and was barely profitable. The company largely blames the tight pricing of memory chips. In a possibly related development, the company formally dropped its $5.8 billion offer to buy SanDisk. The deal was the largest ever attempted by Samsung and would have been the largest foreign acquisition by a company based in South Korea (SanDisk is based in California). In more Samsung news, the company is lowering its forecast for DRAM sales for the current year. The industry shipment growth, largely known as “bit growth” was initially expected to be 100% and is now likely to be more like 90%. Samsung joins other memory-chip makers that have cut chip production because of steep price declines and mounting losses. A relatively bright spot in the memory business is that Micron has taken over Qimonda AG’s stake in Taiwan-based Inotera Memories for some $400 million. The move is said to let Micron gain lower-cost production for its memory chips, and its cash infusion will help Qimonda (majority owned by Infineon), which has posted large losses recently. Relatively becomes the operational word as Micron also announced last month it will be cutting jobs, perhaps as much as a 15% reduction or some 2,850 people. And, on the good side of bad news, AMD narrowed its thirdquarter loss. Its loss was $67 million or 11 cents/share compared with the period a year earlier where it lost $396 million or 71 cents/share. CEO Dirk Meyer says, “We are on a path to becoming the company we aspire to be and will be.”

additional $3 billion in annual savings is the result of reducing its work force by 20,000 since 2006. However, Intel did caution that the outlook remains uncertain. The company said it’s hard to assess the impact of the financial crisis and that it couldn’t forecast spending for technology products going forward. “It’s clear that the financial crisis is creating some signs of stress that may impact our business,” says Paul Otellini, Intel’s CEO, “but the extent of that is hard to quantify.”

In the News

Samsung plans to enter U.S. PC Market. Between its cell phones, flat-screen TVs and semiconductor businesses, Samsung is planning to take on established PC makers such as Dell, HP and Apple. The company wants to build a bigger presence and gain more share in the computer business. The biggest maker of memory chips may soon become one of its own best customers. Motorola sells Biometric unit to Safran. This may be the beginning of Moto’s splitting off its various units from the cell phone business. The other operations include set-top boxes, twoway radio and handheld barcode scanners. HP wants in on the cell phone act. Taking a page from Apple, Samsung and others’ books, HP wants to join the smartphone craze. The phone is the latest in HP’s iPaq devices and will feature a touchscreen and keypad running Microsoft Windows Mobile 6.1. Kontron acquires communications rackmount server operation from Intel. Intel has finally divested itself of just about all of the communications infrastructure businesses it acquired during the dot-com boom, and the sale of the Columbia, South Carolina and Penang, Malaysia rackmount server business to Kontron appears to be one of the last pieces to go. AMD spins off manufacturing. Back in the beginning of the month, AMD announced it was spinning off all its manufacturing to a joint venture, which will get some $6 billion from an investment company in Abu Dhabi. The new venture, Foundry Co., will make chips for AMD and others and will take over AMD factories worldwide. AMD CEO says this deal “will go down as the most important transaction in the history of AMD.” Whatever you call it, “asset smart,” or “asset light,” this is just another arrow in the heart of American manufacturing.

Glass Is Half Full

While a lot of Wall Street was sitting under a dark cloud, Intel reported a 12% jump in third-quarter profit. Revenue rose 1% to 10.22 billion while it had forecast sales for the current quarter between $10.1 and $10.9 billion. The company’s profit hit 58.9% in the third quarter up from the second quarter where it only reported 55.4% profit. Intel claims the better margins are due to squeezing more efficiencies from its manufacturing process. An November 2008

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November 2008

Proven Ingenuity and Innovation We are focused and dedicated to bringing you solutions that expand your System Capabilities

Magma provides the industryâ&#x20AC;&#x2122;s best solution for expanding your desktop computer, workstation, server and notebook capabilities by allowing you to add multiple PCI-X and PCI Express I/O and CPU cards to your System. As computer technology evolves, so do we, to address the new and growing needs of your System requirements.

A Service Disabled Veteran Owned Small Business

www.magma.com

Tel: 1.858.530.2511

RoHS Compliant

ISO9001:2000 Certified

Your Products Are Expected To Protect Lives Our products help you succeed

rotecting lives and property are at the heart of every security application. At

VersaLogic our embedded computers have been designed into some of the most sophisticated and high prole security equipment being used today. And because we understand that our customer’s products must meet special requirements, every board we make is run through exhaustive inspections and quality tests, ensuring that we deliver only the best. With our world class service and ve year availability guarantee, things won’t stall out on your production line either. Whether you need one of our standard products or a specially customized version, our skilled technical staff will work with you to meet your exact specications. Contact us to nd out how for more than 30 years we’ve been perfecting the ne art of extra-ordinary support, and on-time delivery: One customer at a time.

1.800.824.3163 1.541.485.8575 www.VersaLogic.com/sec