The magazine of record for the embedded computing industry
October 2009
www.rtcmagazine.com
OpenVPX:
LAUNCHING THE SPEC
Solid State Drives Take a Bigger Role in Embedded Small Modules Power Medical Devices FPGAs Offer Choice of Soft or Hard-Wired CPUs An RTC Group Publication
Portwell
Built Tough for Broader Embedded Applications
PEB-2738
Intel ® Atom™ processor (Z510P, Z510PT, Z520PT or Z530P) with industrial temperature range Intel ® Embedded Compact Extended Form Factor Intel ®ECX Form Factor
Dual display (LVDS and SDVO)
Multiple USB ports
Low power, fanless & small footprint
Portwell ruggedizes its new PEB-2738 ECX board with the new Intel® Atom™ processors Z510P, Z510PT, Z520PT and Z530P. The power optimized micro-architecture consumes very low power and operates at a wider temperature range. As a result, it creates an even more robust system with fanless configuration. Portwell’s PEB-2738 ECX solutions can be employed in far more embedded applications than those of other suppliers. Applications for the new PEB-2738 include military-grade computers, in-vehicle infotainment systems, outdoor computing systems, industrial automation and control applications and many more.
ECX
PEB-2737
Nano-ITX
Intel ® Atom™ processor Z510 or Z530
Intel® Atom™ processor Z510 or Z530
Intel ® ECX form factor
Dual display (VGA and LVDS)
Dual display (VGA and LVDS)
Multiple USB ports
IDE and SD interface for storage
4.02”
Multiple USB ports
4.7”
Gigabit Ethernet
Gigabit Ethernet
Low power, fanless and small footprint
PCIe x1 for expansion
Low power, fanless and small footprint
5.75”
4.7”
Qseven
PQ7-M100G
COM Express
PCOM-B214VG
Intel ® Atom™ processor Z510 or Z530
Dual display (LVDS and SDVO)
Multiple USB ports SDIO interface for storage Gigabit Ethernet PCIe x1 for expansion
Low power, fanless and ultra compact
2.75”
2.75”
NANO-8044
3.7”
4.5”
Portwell’s extensive product portfolio includes single-board computers, embedded computers, specialty computer platforms, rackmount computers, communication appliances, and human-machine interfaces. We provides both off-the-shelf and versatile custom solutions for applications in the medical equipment, factory automation, retail automation, semiconductor equipment, financial automation, mission critical and network security markets. American Portwell is both an ISO 9001:2000 and ISO 13485:2003 certified company.
Intel® Atom™ processor N270 Mobile Intel® 945GSE express chipset & ICH7-M Multiple USB ports IDE and SATA
Gigabit Ethernet
PCIe x1 and PCI for expansion
Low power, fanless and compact
Portwell www.portwell.com 1-877-278-8899
OpenVPX: Launching the Spec The OpenVPX 1.6 GHz Atom-based 3U VPX module from Concurrent Technologies comes with one XMC site, HMI I/O (DVI-D, USB, Audio, and RS-232/422/485), CANbus, GPIO, two 1000BaseBX Ethernets (for control plane), IPMI (for maintenance plane) and two FPs of PCIe (for data planes).
46 ATCA SBC with Dual Xeon 5500s, 64 Gbyte RAM to Improve Network Throughput
48 2U Acceleration Platform Supports Eight PCIe x16 Gen 2 I/O Cards in 21” Deep Chassis
TABLEOF CONTENTS
51 Hybrid Signal Processing 3U VPX Boards Teams DSPs with FPGAs
OCTOBER 2009
Departments
technology in context
Industry Insight
Developments in VME
Rugged Applications
Promises VPX Rack Mount 5Editorial Print Is Not Dead, but Paper May Be Interoperability Servers Move to New Levels of 14 OpenVPX 34Communication Reliability Industry Insider and Conduction Cooling for 3U 6Latest Developments in the Embedded COTS Cards: An Overview 20 Air Marketplace SYSTEM INTEGRATION Small Form Factor Forum Small Modules Power Medical Devices 8The Three Faces of Embedded Hardware Trumps Software in Solutions Engineering Medical Devices 38 Products & Technology 46Newest Embedded Technology Used by Solid-State Drives Industry Leaders Extend SSD Lifetime Using the INDUSTRY WATCH Network Database Model 26 EDITOR’S REPORT FPGAs Eurotech—from Sensors to SSDs Increase Performance Embedded FPGA Processing 10Supercomputers Reliability in Embedded 30 and Platforms: Customization Meets 42 Applications Performance William Pilaud, Concurrent Technologies
Keith Taylor, Kontron
Ivan Straznicky, Curtiss-Wright Controls Embedded Computing
P.J. Tanzillo, National Instruments
John Pai, Raima Division of Birdstep Technology
Tom Williams
Gary Drossel, Western Digital
Glenn Steiner and Dan Isaacs, Xilinx
Digital Subscriptions Avaliable at http://rtcmagazine.com/home/subscribe.php RTC MAGAZINE OCTOBER 2009
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OCTOBER 2009
Conduction Cooled VME Solid State Disk Phoenix International’s VC1-250-SSD Conduction Cooled Serial ATA (SATA) based Solid State Disk VME blade delivers high capacity, high performance data storage for military, and y, aerospace p industrial applications requiring rugged, extreme emee envi eenvironmental i ron ronmen me tal and secure mass data storage.
Publisher PRESIDENT John Reardon, johnr@rtcgroup.com
Editorial
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High Operational Hi Temperature +85° C
Operational Altitude to 80,000 feet
'PS PVS FOUJSF MJOF PG TUPSBHF QSPEVDUT XXX QIFOYJOU DPN t 714ďšş283ďšş4800 An ISO 9001: 2000 CertiďŹ ed Service Disabled Veteran Owned Small Business
Untitled-6 1
EDITOR-IN-CHIEF Tom Williams, tomw@rtcgroup.com CONTRIBUTING EDITORS Colin McCracken and Paul Rosenfeld MANAGING EDITOR Marina Tringali, marinat@rtcgroup.com COPY EDITOR Rochelle Cohn
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Free Online www.rtcmagazine.com Spotlighting the Trends and Breakthroughs in the Design, Development and Technology of Embedded Computers. Search Archived Editions along with the Latest News in the Embedded Community. www.rtcmagazine.com An RTC Group Publication
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OCTOBER 2009 RTC MAGAZINE
To Contact RTC magazine: HOME OFFICE The RTC Group, 905 Calle Amanecer, Suite 250, San Clemente, CA 92673 Phone: (949) 226-2000 Fax: (949) 226-2050, www.rtcgroup.com EASTERN SALES OFFICE The RTC Group, 3310 Twin Ridge Drive, Charlotte, NC 28210 Phone: (949) 573-7660 Editorial Office Tom Williams, Editor-in-Chief 245-M Mt. Hermon Rd., PMB#F, Scotts Valley, CA 95066 Phone: (831) 335-1509 Fax: (408) 904-7214 Published by The RTC Group Copyright 2008, The RTC Group. Printed in the United States. All rights reserved. All related graphics are trademarks of The RTC Group. All other brand and product names are the property of their holders.
EDITORIAL
OCTOBER 2009
Tom Williams Editor-in-Chief
Print Is Not Dead, but Paper May Be
T
he usual argument over the question of whether or not print publishing is washed up as a medium usually is focused on magazines, newspapers and the Internet. Many of these arguments center around the effectiveness of print vs. Web advertising because that is what sustains magazines and newspapers. However, there is another issue beginning to bubble to the surface and it certainly includes periodicals, but it is mainly concerned with books. Books traditionally do not carry advertising. You pay a price for the book and take it home as your property. Book sales sustain the author and the publisher. Today, a number of projects are underway to transform printed books into digital media. One of these is the Google book-scan project, whose dream is to scan and digitize all the world’s books, including ancient and out-of-print books. However, the idea of e-books is not new. What is coming is a new way that they will be read and distributed. As a wearer of bifocals, I definitely do not enjoy the prospect of sitting at my desk or sitting with a laptop on my lap to read War and Peace. I want to sit in my comfy chair and hold a familiar-sized object in my hands and be able to scribble notes in it or highlight text. I want one of these new tablets that are coming out—but I’m going to wait until certain issues are resolved. Most people have at least heard of the Amazon Kindle, a small, tablet-sized device that can download e-books over 3G wireless and display them as text and gray-scale illustrations with what it calls EInk. Over 350,000 books are supposed to be available for the Kindle, but many potential users are still waiting for a color version, which Amazon is currently still struggling to perfect. Now the big boys are starting to get into the act. Microsoft and Apple are both reported to be working on tablet devices that will be capable of displaying e-books. The Microsoft Courier will open like a book and have a display on each side. So far the leaked information positions it more like a Web-connected touch-screen device with a lot of other functionality beyond books and magazines. The as-yet unnamed tablet from Apple will no doubt have a similar wide range of capabilities, but Apple appears to be more intent on moving print content to this new tablet. In fact, there are reports that Apple aims to actually redefine print. Apple has reportedly been in talks with textbook publishers including McGraw-Hill, and with the New York Times. I’m going to predict that if devices like the Kindle, the Courier and the Apple tablet become widespread and economical, print—far from being dead—will be revived. It is paper that will go largely to the wayside.
Of course, before all this can happen and become a mass market or even a paradigm shift, certain technical and commercial issues must be resolved. The Kindle users I have talked to say they are not too disturbed by the gray-scale graphics and especially appreciate the fact that the E-Ink is not on a backlit screen and does not glow at them. Not everyone will be content with gray scale, however. Far more significant is the issue of standards. Currently, Amazon owns the Kindle standard, which works fairly well for them since there are no competing devices on the market and it allows them to digitize and distribute books and magazines through their Web site. Yet even Amazon has had to move to be a little more inclusive and natively support additional formats like PDF and MP3, and others like DOC and HTML through conversion. Wait for the day that owners of Microsoft or Apple tablets ask why they can’t download Kindle format (AZW) books to their device when they’re willing to buy them from Amazon. Amazon will come under irresistible pressure to open up the format and even license other publishers to distribute using AZW. If they don’t, they will limit the market. On the other hand, we may see what so often happens in the tech industry—a proliferation of standards and a shakeout with one survivor. Which ever way it happens, there will be a universal standard format for distributing digital publications for electronic print. For once, folks, can’t we agree to take the less painful path? I’m talking to you, Amazon. The potential being opened up by the Microsoft and Apple tablet developments really will redefine print. In addition to color, it will be possible to have embedded audio and video. Textbooks could have interactive video for demonstrations and homework problems. The one thing I dread is that I might get an uninvited diet soda ad right in the middle of an intense conversation in The Brothers Karamazov. We can only hope there will be ways of avoiding things like that. Yet the possibility of ancillary applications will become very attractive. Some people like to highlight text and scribble notes in the margins. Others, such as scholars, need to be able to copy out and organize highlighted text in the form of notes for research and citation. Moving paper print to digital print will not kill print; it will revitalize it. And yet, for those of us who are bibliophiles, nothing will really replace the feel of a room of shelves stacked thick with old familiar volumes, and volumes yet inviting our explanation. It’s hard to form a picture of sitting with a pipe and smoking jacket reading a tablet. I’ll try. RTC MAGAZINE OCTOBER 2009
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INDUSTRY INSIDER OCTOBER 2009 Kontron Acquires Digital-Logic Kontron has acquired the non-public Digital-Logic, headquartered near Solothurn, Switzerland. Kontron takes over a 78 percent majority of Digital-Logic, which has specialized on highly reliable and compact rugged embedded computer boards and systems since 1992. Kontron intends to increase its ownership of the company with 15 million Euros revenue and 100 employees to 100%. With the acquisition, Kontron further increases its market share strengthening the market position in Central Europe, and complements the product portfolio for the strategically important markets of Railway/Transportation, Military/Aerospace/Security and Medical. All of those markets need embedded computers with high reliability and longevity. The portfolio comprises of: small form factor single board computers PC/104, PC/104Plus and PCI/104-Express, as well as fanless, rugged and compact embedded computers for stationary and mobile applications. The products are designed and manufactured to withstand extended temperature range and high shock/vibration in harsh environments. Kontron management says it sees synergies for the new member in the Kontron group utilizing Kontron´s strong global Sales/Marketing channels and supply chain. Ulrich Gehrmann, CEO of Kontron says, “The philosophy toward highest quality and excellent customer relationship of the Digital-Logic team is well aligned with our strategy, and from the complementary product offerings in the area of standard and customized rugged compact computers, our customers will benefit a lot. The location of Digital-Logic close to our headquarters will ease the integration and management of the new team.” Digital-Logic will be integrated under the Kontron as “Kontron Compact Computers.”
Pico-ITXe and Pico-I/O Specifications for Smaller Stackable Embedded Systems
The Small Form Factor Special Interest Group (SFF-SIG), a collaboration of suppliers of embedded component, board and system technologies, has announced the availability of revision 1.0 of both the Pico-ITXe and Pico-I/O Specifications for small, rugged, stackable embedded systems. The Pico-ITXe Specification builds on the momentum of the popular, but de facto and unexpandable Pico-ITX standard, to enable stackable I/O expansion using SFF-SIG’s flexible Stackable Unified Module Interface Technology (SUMIT) interface. Pico-ITXe boards are the same size (72 x 100 mm) and have the same mounting hole placement as Pico-ITX boards, allowing easy migration to support SUMITbased, stackable I/O modules. To
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OCTOBER 2009 RTC MAGAZINE
speed and simplify the design of tiny Pico-ITXe SBCs, the Pico ITXe Specification offers a high level of flexibility in comparison to other stackable SBC specifications by allowing the Pico I/O module stack to be placed anywhere within the outline of the Pico-ITXe SBC. Two example placements are shown in the specification. The Pico-I/O Specification defines small 60 x 72 mm stackable I/O expansion modules for use with Pico-ITXe or, in fact, any other SBC form factor that incorporates SUMIT expansion with Pico-I/O mounting holes. Through the inclusion of one or two 52-pin SUMIT connectors, a Pico-ITXe SBC can provide PCI Express (up to five x1 lanes or two x1 and 1 x4 lanes), four USB 2.0, LPC, I2C and/or SPI interfaces to the Pico-I/O modules. The Pico-ITXe designer has the flexibility to provide all or any subset of these interfaces. A Pico-I/O module may
be implemented using any one or more of these interfaces. In anticipation of the release of these Specifications, a PicoITXe SBC is already available from member company Via Technologies, and Pico-I/O modules are available from member companies Acces-I/O and WinSystems as well as Via. Both Specifications are free and available online at the SFF-SIG’s website. The PicoITXe and Pico-I/O Specifications may be downloaded from www. sffsig.org/picoitx.html.
OpenVPX Draft Specification V0.9.4 Completed
The OpenVPX Industry Working Group (www.openvpx.org), an alliance of VITA member defense and aerospace prime contractors and embedded computing systems suppliers focused on addressing VPX (VITA 46) system-level interoperability issues, has announced the completion of the OpenVPX draft V0.9.4 specification. The OpenVPX working group established an aggressive schedule to address interoperability improvements in the VITA 46 specification in a timely manner. The member companies have come together and have been working to meet these goals. As a result of the focused efforts within the OpenVPX Technical Working Group, the specification is nearing completion and is on schedule. Plans call for the specification to transition into the VITA 65 working group following submission of the completed OpenVPX V1.0 Specification in October, with the objective of VITA Standards Organization (VSO) ratification before year’s end. The OpenVPX draft defines the VPX Systems Specification, an architecture that manages and constrains module and backplane designs. The VPX Systems Specification includes the definition of pinouts and sets interoperability points within VPX, while maintaining full compliance with the existing VPX specification. The OpenVPX V1.0 Specification, developed by VITA members, is on track to be turned over to the VSO in October
as VITA 65 for final comment, ballot and ratification as a standard. An OpenVPX Media Press Conference shall be held at the upcoming MILCOM tradeshow in Boston on October 19th. Press Conference details shall follow prior to the show. For more information on the OpenVPX Industry Working Group, visit www. openvpx.org. OpenVPX is a trademark of VITA. For an in-depth preview of the specification, see the article titled, “OpenVPX Promises VPX Interoperability” in this issue of RTC.
ATCA Market Resilient in Economic Downturn
Analysts tracking the market for AdvancedTCA-based products say the economic downturn has had a relatively small effect on revenues compared with other embedded computing segments and technology markets in general. The latest forecast data from VDC Research Group indicates the total 2009 ATCA market will be comparable to 2008 levels, which reached $483 million. For 2010, analysts predict the ATCA market to experience a return to stable growth along with the general economy. “While some embedded computing segments will contract by double digits this year, our ATCA market sizing research indicates that 2009 will be within a few percentage points of what we saw in 2008,” said Eric Heikkila, Director of VDC Research Group’s Embedded Hardware and Systems practice. “The key is the relative stability of investment in new applications, which has been a sweet spot for ATCA. Tier II and III Network Equipment Providers have broadly adopted ATCA and those are the firms producing much of the innovative equipment that is still driving new revenue for Service Providers.” VDC Research Group’s interviews with more than 50 network equipment providers (NEPs) show that nearly 80 percent of Tier II and III NEPs are commercially implementing the
ATCA form factor, while nearly 60 percent of Tier I NEPs are basing equipment on the standard. By 2013, VDC Research Group forecasts that a significant majority of these NEPs will source commercial-off-the-shelf (COTS) ATCA building blocks and integrated platforms rather than build in-house. Products based on the xTCA specifications—which include the MicroTCA and AdvancedMC standards in addition to AdvancedTCA—are also garnering significant interest beyond the telecommunications industry. In the Military and Aerospace sector, for example, MicroTCA has become an increasingly popular option. PICMG, the standards organization that develops and manages the xTCA specifications, is working with members on a hardened, conduction-cooled version of MicroTCA intended specifically for use in military and aerospace applications. PICMG is also considering new ATCA specifications tailored to address the data center market.
This 50-page report is a review of the market for NAND in the PC, exploring Braidwood technology, implementation costs and expected benefits, as it explains how those benefits compare against alternatives like SSDs, larger DRAMs and standard PCs. The report projects how the move to NAND in PCs will boost the NAND market, soften the SSD and DRAM markets, and pose problems for those NAND makers who are not poised to produce ONFi NAND flash. The technology’s impact is discussed for NAND makers Samsung, Toshiba, Hynix, Intel, Micron and Numonyx, along with DRAM manufacturers and SSD suppliers. The implications for developers of embedded systems might show up in the form of costs for SSDs not dropping as much as expected due to the lack of volume consumed by the PC market.
Braidwood—NAND on the Motherboard—Expected to Undercut 2010 SSD Demand
A new version of a European Standard published recently by ETSI promises significantly increased broadband capacity to meet the ever-growing demands foreseen for European communications. The latest version of the standard, which is known as ETSI Harmonized Standard EN 302 217-3 (“Fixed Radio Systems; Characteristics and requirements for point-to-point equipment and antennas”), was published at the end of July and adds new frequency bands to those specified in earlier versions of the document. Microwave links are typically used for backhauling cellular radio networks such as UMTS, LTE and WiMAX as well as for private links for very high pointto-point data capacity, including Multi-gigabit Wireless LAN Extensions (MGWS-FLANE) applications. Given that such networks are evolving to provide greater and greater broadband access to end users, it is clear that the associated backbone networks
With all the recent advances in solid-state drive (SSD) technology, there is at least one wet blanket being thrown on the enthusiasm. According to a report from Objective Analysis, Intel’s upcoming Braidwood technology may act to stifle SSD acceptance. PC purchasers who were considering an SSD upgrade will find NAND on the motherboard to be a cheaper alternative with nearly all the same benefits. Objective Analysis’ report titled Intel’s Braidwood: Death to SSDs? explains the technology, explores its market, and predicts the outlook for the coming years. “NAND has a role in the PC platform and Braidwood promises to be the right implementation at the right time,” said Jim Handy, the report’s author. “Although this isn’t the first time that Intel has tried to bring NAND into the PC, the earlier Turbo Memory product failed for a number of reasons.”
Updated ETSI Standard Promises Increased Broadband Capacity
have to accommodate massive increases in high-speed data and voice transmissions. Most network operators use microwave links to support this demand. The availability of the frequency bands covered by this Harmonized Standard ensures that network operators will have enough backbone capacity to cope with the broadband demands for well into the future. The standard now covers microwave links that operate in the frequency bands 57 to 59 GHz, 59 to 64 GHz, 64 to 66 GHz, 71 to 76 GHz and 81 to 86 GHz. Much of this is completely new spectrum, therefore providing genuinely additional capacity. ETSI is responsible for the preparation of Harmonized Standards in support of the European Commission’s Radio and Telecommunications Terminal Equipment (R&TTE) Directive (Directive 1999/5/EC). Harmonized Standards are a special class of European Standard, produced in response to “Mandates” from the European Commission, that enable providers of equipment and services to demonstrate compliance with the requirements of the Directive, and thus be able to sell, deploy and operate them within the European Union. Specifically, this Harmonized Standard covers the provisions of article 3.2 of the Directive, which concerns the efficient use of radio communications spectrum. Under the terms of the Directive, the frequency allocation authorities in each European member state are required to make the relevant spectrum available if they have not already done so. Frequency allocation in Europe is managed nationally but within a pan-European regulatory framework.
Zigbee RF4CE Specification Available for Download
The ZigBee Alliance has announced that the ZigBee RF4CE specification for advanced remote controls is now available for public download. ZigBee RF4CE
replaces infrared (IR) with radio frequency (RF) communication in remote controls, allowing nonline-of-sight operation, greater range and longer battery life for consumer electronic (CE) remote controls used with HDTV, home theater equipment, set-top boxes and other audio equipment. The ZigBee RF4CE wireless platform enables CE manufacturers to create consumer products and features that are unique, secure, low-cost, easy to deploy and interoperable with other ZigBee RF4CE-certified products. Freescale Semiconductor and Texas Instruments have ZigBee RF4CE-certified platforms. Other platform suppliers are now able to seek platform certification and further broaden the already strong ZigBee supply chain. Announced in March 2009, ZigBee RF4CE is a standardized specification for RF remote controls that enables faster, more reliable and greater flexibility for devices to operate from longer distances. It removes the line-ofsight and field-of-vision barriers in today’s IR remotes, and by supporting two-way communication, it opens the door for a whole new set of capabilities. The ZigBee RF4CE specification is designed for a wide range of products, including home entertainment devices, lighting control, security monitoring, keyless entry systems and many more. The ZigBee RF4CE specification is based on IEEE 802.15.4. MAC/PHY radio technology in the 2.4 GHz unlicensed frequency band and enables worldwide operation, low power consumption and instantaneous response time. It allows omni-directional and reliable two-way wireless communication, channel agility for enhanced co-existence with other 2.4 GHz wireless technologies, simple secure set-up and configuration. The specification can be downloaded from: http://www. zigbee.org/Products/TechnicalDocumentsDownload/tabid/237/ Default.aspx.
RTC MAGAZINE OCTOBER 2009
7
SMALL FORM FACTOR
FORUM
Colin McCracken & Paul Rosenfeld
The Three Faces of Embedded
D
o you ever find it a challenge to explain to your spouse or children what you do for a living? Everybody knows PCs—in fact, in many ways our children know them much better than we do. But this embedded thing takes some splainin’. It’s sort of intuitive that there are tiny processors in almost everything—cars, medical equipment, cell phones, appliances and those nasty little check-in kiosks at the airport. Most people don’t think twice about this. But we’re among those people who remember when we used to call this the embedded control market, describing what these microprocessors under the skins did. The embedded control market consumed virtually all microprocessors sold until the PC came along in the early 1980s. And until the mid to late ’90s, there were two distinct markets—the PC market and the embedded market. At that time, those processors defined as embedded rarely crossed into the PC space (with Apple a notable exception) and those processors defined as PC rarely crossed into the embedded space—with Ampro and a few other small companies as the notable exceptions. Embedded processors never worried about a graphical user interface—they just pushed bits in and out very fast while using very little power. And PC processors never worried much about power consumption. About this time, things started getting confusing. More embedded (“dedicated”) applications had user interface requirements than ever before, and PC processors started to make inroads into this market. To make matters worse, applications designed for use by humans (such as cell phones, PDAs, video games and the like) demanded low-power solutions and were built using processor architectures originally designed for headless deeply embedded control applications, with a primitive graphical user interface glued on the side. Today, there are three broad categories of application: • Headless, deeply embedded control applications such as machine control or network communications elements. • User-oriented “dedicated” processing applications—e.g., your friendly check-in kiosk. • Hybrid applications that provide control functionality but also involve a graphical user interface. More than a few medical applications fit in this category.
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Distinct families of processors are targeted to each of these categories. The first area is targeted by the 68xxx/PowerPC and its derivatives along with ultra-low-power, application-specific RISC CPUs based on ARM or other CPU cores and a wide variety of microcontrollers. The dedicated, user-oriented applications are dominated by Intel-architecture processors. For many years, the third application type was typically implemented with two or more processor elements—a microcontroller or RISC CPU to implement the control features with a separate, x86 architecture CPU to provide the user interface—connected by all manner of communications channels from RS-232 to Ethernet. Over the past few years things have become a bit muddled as both camps charged after unified solutions to the third category. Somewhat primitive graphics support became an option for the RISC CPUs and even some microcontrollers. And Intel finally discovered how to do low power (sort of), enabling an entry into some types of control applications. Board vendors promoted the idea of a single processor solution that can do both the control portion and the user interface portion of an application. We must confess that we are guilty of promoting such a position in our earlier lives. Sounds tempting. But looking a little deeper demonstrates cause for concern. Implementation of a general-purpose graphical user interface on a RISC CPU or microcontroller can be a nightmare of custom configurations, new and expensive tools, and supposed compatibility that isn’t quite compatible. And for all Intel’s good efforts to reduce power consumption (and heat dissipation) with their new family of processors, they don’t hold a candle (bad pun) to RISC CPUs or microcontrollers that operate well under a watt with standby power measured in tens of milliwatts. Today, options abound for interesting, intriguing solutions to all facets of embedded applications. And with enough time and brute force, you can most likely get that square peg forced into that round hole. So if you have the patience, money and time on your schedule, there are myriad opportunities to bring RISC or microcontroller solutions to these hybrid applications. Similarly, if you can support a cooling fan or a humongous heat sink and are willing to put up with a lack of determinism and an obtuse I/O architecture, you can do deeply embedded with an x86 CPU. If not, you’d best stick with the proven approach.
ploration your goal k directly age, the source. ology, d products
editor’s report
Eurotech— from Sensors to Supercomputers Figure 1
The number of intelligent devices is lurching toward the trillions and the number of people interacting with them is in the billions. Making all the data and functionality available and useful requires a comprehensive ecosystem.
by Tom Williams, Editor-in-Chief
W
hat kind of embedded comput- embedded systems. And a scalable suing company also produces percomputer too?? Petascale supercomputers— According to company president and nies providing solutions now computers running at over 1,000 Tera- CTO Arlen Nipper, “Without embedded ion into products, technologiesconsiders and companies. Whether your goal is the latest flops—and them integral toto research systems, IT wouldn’t have anything to do.” ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you their embedded business? The answer Well, maybe not much to do, but the conyou require for whatever type of technology, Amaro, Italy-based Eurotech, which verse would seem to imply that because of and productsisyou are searching for. has recently introduced its Aurora scal- embedded systems, specifically connected able supercomputer. But Eurotech is embedded systems, there is so much data very much an embedded systems com- and so much knowledge that can be made pany offering a wide range of embedded use of at higher levels that IT-scale sysboards, stationary and mobile integrated tems need to be greatly expanded to deal devices as well as wearable integrated with it all and need to be thought of as an systems such as their wrist wearable integral part of what embedded systems Zypad computer. In fact, the company are designed to do. says it gets over half its revenue from The application areas addressed by integrated, application-ready box-level Eurotech’s products and technologies are not exactly exotic—mass transportation, logistics, machine automation and process Get Connected control, medical instrumentation to name with companies mentioned in this article. a few. However, the concept of a multiwww.rtcmagazine.com/getconnected
End of Article
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OCTOBER 2009 RTC MAGAZINE
Get Connected with companies mentioned in this article.
This Eurotech DuraCOR DC 1200 is an example of an Atom-based rugged integrated computer that can be used in mobile applications to gather and preprocess data from sensors and embedded modules and communicate over wireless links with larger administrative applications.
layered, interconnected information environment based on those embedded devices is something that is being promulgated throughout the company’s self image—and thus to its customers. In fact, having struggled through terms like cloud computing and pervasive computing, Eurotech has coined its own description, called Everyware, to encompass the boards, systems, routers and gateways, integrated boxes, software components and tools as well as the supercomputer environment. Consider a transportation system like a train or a truck fleet. Managing such systems is often cited as a prime example of “machine-to-machine” systems technology, and this is indeed the case. The hierarchy of devices in the vehicle alone comprises a small network representing different aspects of a vehicle’s operation such as bearing wear, fuel, vibrations and GPS location. Depending on the type of transportation system, there will also be other subsystems such as surveillance, passenger count, freight load and destinations and more. The individual vehicle collects all this data in an onboard system—often a rugged mobile computer built into the vehicle—and is then linked to the larger fleet management system via
editor’s report
(BIOS, operating systems, drivers, etc.) for the various hardware platforms ranging from its Atom-based Catalyst module to the new Helios programmable edge controller to the DuroCOR 1200/1400 rugged mobile computers, to name a few. Beyond the Java level, however, there is an OSGi application framework consisting of “bundles” that represent a sort of embedded middleware that lets application developers get started at an even higher level. Foundation bundles are functional packages such as device virtualization, diagnostics, security, firewall, WiFi management and so forth that are common to a great many applications. Beyond that are some more domain-specific bundles that are common to various application domains such as GPS and passenger
Figure 2 This configuration of a Zypad wrist computer is equipped with a bar code reader for inventory and logistics applications. Its wireless link with a larger system on the warehouse floor and also with a corporate system makes its data available to a wide range of applications that can utilize it.
Application Application Application Business Logic Business Logic Business Logic
System Specific and Customer Bundles Medical Bundles
Stepstone Bluetooth Medical USB Medical Device Profile Device Profile
Eclipse IDE OSGI Application Framework
satellite, WWAN or other wireless connection (Figure 1). By the same token, industrial plants, hospitals and gambling casinos consist of devices from sensors, cameras, machine controllers and more all connected to a local network, sometimes with a local human interface, but also usually to a much larger supervisory system where “islands of knowledge” can be evaluated and used together for even larger goals. Imagine, as a simple example, that an anomalous pattern showing up at the blackjack table could alert an operator and at the same time direct the security camera to that table. Thus, even the wearer of a PC-based wrist computer with a wireless connection is an integral part of a much larger application (Figure 2). Of course, such systems are already being implemented with diverse hardware elements, supervisory mainframes and software components plus specialized application programming. The Everyware environment seeks to offer components for the entire range of the hierarchy ranging from components and devices for real-world applications to connectivity platforms making heavy use of wireless technology to build the edge and on up to the “big iron” that enables the cloud where information is collected, processed, used by human operators and redistributed to devices that need it. These then must be knitted together with a compatible set of software modules that enables the system developer to begin adding value at a higher level than operating systems and board support packages. Starting with bootloader/BIOS and operating system at the board level, the software environment must enable the domain experts to begin assembling systems and then adding value without having to struggle with their non-core competencies. To this end, Eurotech is launching its Everyware Software Framework (ESF), on its Atom-based embedded platforms (Figure 3). The ESF offers open source Eclipse-based development tools along with the Java Micro Edition Virtual Machine built up on board support software
GPS Services
Passenger Counter
MQTT Client
uBroker
Transporation Bundles
OBD II (JBUS)
Legacy Backend Protocol Adaptors
JSR 172 Web Services
Enterprise Bundles
Terminal Terminal Serial Port Modbus SNMP Archive Server Client Mngmt Protocol Mngmt SNTP
Security
DHCP
Wifi Mngmt
Interface Config
NAT
VPN
Industrial Bundles
}
Firewall
Bluetooth Cellular Mngmt Network Mngmt
Foundation Bundles
Diagnostics System Device Device Device Servlet Log Management Configuration Virtualization Engine Watchdog Mngmt
CPU Monitor
JUnit Test
JNI
JAVA Virtual Machine (JVM) Bootloader/BIOS/Operating System Hardware Platform
802.11 802.15.4 Ethernet Bluetooth RS-485 RS-232 Discrete I/O GPS PC/104 GSM HSDPA CDMA EVDO PCIe
Figure 3 The Everyware Software Framework combines basic board-level software with development tools and embedded middleware to help users more quickly address their specialized application needs.
RTC MAGAZINE OCTOBER 2009
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editor’s report
counters for transportation or Bluetooth and USB profile bundles for medical devices. At the top of the pyramid and tying it all together is a very unusual system for an embedded vendor to produce let alone to engineer as an integral part of its embedded vision, and that is the Aurora scalable supercomputer. Aurora is based on a compute node built around two Intel Xeon 5500 series quad-core processors (for-
merly code-named Nahalem). Each processor is equipped with up to 12 Gbytes of DDR3-1333 RAM and interfaces via a 5520 chipset to three system networks: a unified general-purpose network based on QDR InfiniBand, a second network based on a switchless toroidal topology, and a third global synchronization network that provides a pacing mechanism at the system level. Each compute node uses a solid-state drive for local storage, and the
Figure 4 In the Aurora supercomputer, each of the 16 modules in this chassis is liquid-cooled and hot-swappable. Each has two Xeon 5500 processors for 93.76 GFLOPS of peak performance. Two of these chassis back-toback with liquid cooling between can be stacked in a rack of eight. A 3D toroidal network can be used for nearest neighbor communication configurations for massive parallel operations.
InfiniBand network supplies access to the larger storage area network (Figure 4). Each compute node can supply over 93 Gflops of peak performance and up to 32 compute nodes can be plugged into a 6U chassis amounting to 3 Teraflops of peak performance. A chassis consists of two 16-node 19-inch racks set back-to-back with the liquid cooling system between them. The liquid cooling system moves coolant through cooling plates mounted against the devices on both sides of each board. These are connected via leak-free push-to-connect devices to help enable the hot-swap capabilities of the boards. Chassis can be arranged in a rack containing eight full chassis for a peak performance of 24 Teraflops. Connecting up to 42 such racks can deliver a peak performance of 1 Petaflops—over 1,000 Teraflops. As intelligent electronic devices continue to shrink in size and grow in power, they become an ever more natural part of everyday life. Eventually, we may so take them for granted that we accept them as extensions of our own perceptions and sensations. But behind that natural acceptance is an ever growing and ever more complex infrastructure that must work seamlessly and intuitively. Thanks to this, it seems like IT does have something to do after all. And it may also just have the means to do it.
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Technology in
context Developments in VME
OpenVPX Promises VPX Interoperability
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OCTOBER 2009 RTC MAGAZINE
technology in context
The need for a new Eurocard standard is greater than ever with the availability of higher performance processor silicon and large bandwidth data-communications subsystems. The VPX standard is finally ready for the Mil/Aero Market and OpenVPX paves the way. by William Pilaud, Concurrent Technologies
V
PX has great promise. VPX leverages the Eurocard 3U and 6U form factors. MIL/Aero system integrators have used these types of modules, like VME and CompactPCI boards, in rugged embedded applications for many years. Similarly, the VPX module has provisions for PMC and/or XMC I/O mezzanines, but adds a P0 connector for power, reference clocks, geographical pin assignments, JTAG, non-volatile write protection, system reset and out-of-band management. VPX also specifies a new connector to support the latest serial fabric technology, special alignment posts, card keying, safety grounds and 160 (3U) or 480 (6U) signal connections. Adding VPX-REDI (VITA 48) defines module ESD covers, larger horizontal pitch widths to accommodate the latest high-performance silicon, and every type of cooling imaginable. The key differentiator of the VPX form factor is the new connector, the Multi-Gig RT2 (Figure 1). This wafer-based connector provides special ESD ground planes, single-ended connections for bused-type signals, and differential paired (diff-pair) traces specifically designed to route highspeed SerDes type communications between modules on a backplane. Tyco has designed the Multi-Gig RT2 connector to support greater than 5 GHz signal speeds, which accommodates USB 2.0, PCIe 2.0, sRIO 2.1, 10GigE, FPGA SERDES and other high-speed serial fabrics. Other VITA standards like VITA 60 and 63 have specified compatible connectors that could replace the Multi-Gig connector for even more vibration and shock intense applications, as well as connectors
Single Ended Connection
ESD ground plane and ground trace on back sides of all wafers.
Figure 1
Rugged Wafer Design Grounds
Differential pair
Multi-Gig RT2 wafer and connector.
for special signal capability like optical (VITA 66) and radio frequency (VITA 67). VPX, VPX-REDI and all of the other related VITA specifications should support current and future processing and data-communication technologies for the MIL/Aero market.
VPX - The Issue
Regardless of the connector strategy, the problem with serial fabrics is that they are point-to-point. Therefore, when defining the backplane for two or more VPX modules with serial fabrics, the designer must connect each differential pair, or diff-pair, to exactly one other module’s diff-pair. Most serial fabrics are duplex communications such that one lane requires four connection pins (one module’s diff-pair transmits to another modules diff-pair receive port and vice versa). If there are more VPX modules in the system, then more connection pins are nec-
essary for data communications. Designers can aggregate the diff-pairs together for larger data bandwidth, but this takes even more connections. Even with 480 (for 6U) or 160 (for 3U) pins available to the VPX module designer, high-bandwidth serial communications with many modules to connect can quickly utilize most of the available pins, leaving very few for specialized module I/O (Figure 2).
Open VPX
VPX and VPX-REDI define a module’s dimensions, connectors, power, utility connections and fabric protocols; they do not define how to use these specifications at the system level. Depending on fabric choice, bandwidth need, module capability and I/O selections, there are many ways to create a system. To address this issue, a group of companies created OpenVPX. OpenVPX is a working group designed to accelerate the ability for customRTC MAGAZINE OCTOBER 2009
15
technology in context ers to buy interoperable VPX development systems and modules from independent vendors. Most VITA members are part of this working group, which will release the OpenVPX specification for VSO ratification into VITA 65 by the end of 2009.
Pin 1
It is the hope that VPX vendors will refer to new VPX modules and systems as OpenVPX to communicate the new interoperable, easy-to-develop and ready for the future Eurocard standard.
Pin 2
Pin 1
Pin 3
Pin 2
Pin 3
Many possibilities for backplane topologies
Slot-to-Slot SerDes example.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
J1
2 - Fat Pipes Data Plane Utility JO
Utility JO
J1
User Defined
User Defined
J2
J2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Not Connected
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Two Slot Backplane
Figure 3 3U 2-Slot and 3-Slot Example.
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OCTOBER 2009 RTC MAGAZINE
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
J1
{
Utility JO
OpenVPX defines a pipe as connections made up of diff-pairs. For example, an Ultra-Thin Pipe (UTP) is two diff-pairs or four connections on a Multi-Gig connector. A Thin-Pipe (TP) is four diff-pairs, and a Fat-Pipe (FP) is eight diff-pairs. FatPipe grouping expands to Double Fat Pipe (DFP), Quad Fat Pipe (QFP) and Octal Fat Pipe (OFP) to describe the largest bandwidth plane needed (Table 1). The plane is the type of communication that uses pipes. OpenVPX defines planes as interoperable data connections between modules. For example, if a plane has 1.0 Generation PCIe fabric on an UTP, this would equal one lane (x1) of PCIe at 2.5 Gigabits per second duplex. Finally, profiles are classes of modules, slots, backplanes and chassis, which define a system.
Planes and User I/O
Figure 2
1 - Ultra Wide Fat Pipe Data Plane
Everything Is in the Taxonomy
User Defined J2
Utility JO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Utility JO
J1 1 2 3 4
User Defined J2
Three Slot Backplane
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
J1
User Defined J2
OpenVPX makes a distinction between planes and user-defined pins. Planes are wafer pins routed through the backplane to other wafer pins. For example, if a backplane topology calls for one fat pipe routed to another slot, that connection pipe is a plane. User-defined wafer pins connect through the backplane to the rear transition module (RTM) and there is no slot-to-slot connection of these pins. The VPX module developer could use these user-defined pins for any purpose without worrying about interoperability with other modules. Fabric connections that are not part of a plane have no connection to another slot or to the RTM. With this type of system-level specification, OpenVPX defines interoperability at the mechanical, module and backplane level. For example, a simple two-slot backplane can connect two boards with one DFP interconnect (Figure 3). Figure 3 also shows how a three-slot backplane can connect three VPX modules with slot 1’s FP A connected to slot 2’s FP A and slot 1’s FP B connected to slot 3’s FP A. Alternatively, by lowering the slot-to-slot bandwidth and adding more slots, a six-slot backplane could connect six VPX modules together by slots 1’s FP A connected to slot 2’s FP A. The backplane can further separate Slot 1’s FP B into four UTPs and each one of these pipes routed to different slots (Figure 4). OpenVPX defines many different dataplane strategies to optimize fabric connections for optimal bandwidth and slot count.
technology in context
OpenVPX Profiles
OpenVPX defines four types of profiles: slot, module, backplane and chassis. Interoperability starts at the module level, so the fundamental profile is the slot profile, which has basic definitions of planes (type, number and size) and userdefined pins. A backplane profile defines how slot profiles are connected. Chassis profiles add mechanical specifications, input power and slot number to specify a chassis. Finally, the module profile defines how module vendors apply specific fabrics to the slot profiles as well as definitions of fundamental module characteristics. With these four profiles, system integrators can integrate different VPX vendor modules, backplanes and chassis into a system. The slot profile is the physical connection basis of module-to-module interoperability. OpenVPX defines slot profiles as groupings of wafer pins into planes and user I/O. Slot profiles also define which types of planes are utility, maintenance, expansion, control and data. The rest of the pins are user-defined, and not routed to another slot. OpenVPX states that these user pins could be customized to any application-specific backplane, but are normally routed to the RTM. The utility plane is common to all VPX modules except for power. The maintenance plane is a serial bus between the modules for lowlevel module identification, module health monitoring and chassis control. The control plane is a separate pipe from the main data plane; typical module profiles specify this as some sort of Ethernet. Finally, the data plane is the main data communications pipe through the backplane. The example 3U slot profile in Figure 5 shows where the data, control, utility and maintenance planes are located on a 3U VPX module. The rest of the pins are user-defined. There are different module types for payload (PAY), switches (SWH), bridges (BRD), peripherals (PER) and storage modules (STO). However, module types do not dictate board function, so peripheral boards may use payload profiles and vice versa. The 2F2U describes the data plane as two FPs and the control plane as two UTPs in size. The slot profile allows smaller data plane sizes on the FP like two TPs or four UTPs. Simply put, the slot profile defines the maximum plane size and location relevant to interoperability.
Utility JO
x4 PCle x1 PCIe
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Utility JO
1 2 3 4
J1
User Defined J2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Utility JO
J1
J1
1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
User Defined J2
Utility JO
1
User Defined J2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Utility JO
J1
J1
1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
User Defined J2
Utility JO
J1
1
User Defined J2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
User Defined J2
Figure 4 3U 6-Slot Backplane Example—Six-slot Backplane; 1 Fat Pipe with 4 UltraThin Pipes Data Plane.
Ultra Thin (UTP)
Thin (TP)
Fat (FP)
Double Fat Quad Fat (DFP) (QFP)
Octal Fat (OFP)
Lanes Diff-pairs Connections/ Pins
1 2 4
2 4 8
4 8 16
8 16 32
32 64 128
Ethernet
1000Base BX
1000Base-T
10GBase-K4 (XAUI)
Two 10GBase
16 32 64
PCIe – lanes
x1
x2
x4
x8
x16
x32
PCIe Gen 1
2.5 Gb/s
5 Gb/s
10 Gb/s
20 Gb/s
40 Gb/s
80 Gb/s
PCIe Gen 2
5 Gb/s
10 Gb/s
20 Gb/s
40 Gb/s
80 Gb/s
160 Gb/s
TABLE 1 Pipe Definitions.
Module profiles define how these planes are instantiated, along with other module information like module voltage requirements and cooling specifications. The module profiles provide module-specific information to define everything but the physical pins used and improve system interoperability by specifying necessary fabric information. Module profiles define the different fabrics options for the data and control planes. In Table 2, all the control planes are 1GigE physical interfaces, and the fat pipes are sRIO, PCIe, or 10GigE. Backplane profiles connect slot profiles together to make the different back-
plane topologies intended for development systems as well as specific implementations that conform to the slot profiles. While some of these profiles are ideal development systems, the OpenVPX members tried to address specific market needs that may be very useful for the Mil/Aero customer. The following are two examples of OpenVPX backplane profiles. The first example, Figure 6, is a nineslot system with minimal bandwidth. The backplane profile calls out one slot profile (SLT3-PER-2F) and one module profile (MOD3-PER-2F) for each slot. The slot profile makes it possible to create a cenRTC MAGAZINE OCTOBER 2009
17
technology in context SE - Single Ended pins
}
All Yellow is User Defined
}
Utility Plane Maskable Rest
}
Utility Plane - GD Discrete, VBAT, SYS_CON
}
Utility Plane - Power, Clocks Management Plane
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Diff - Differential pins S E
P0/ JO SE
S E
P1/ J1 Diff
All Green is a Plane Defined by Slot Rule
} Data Plane 1 FP } Data Plane 1 FP
User Defined
} Control Plane 2 UTP S E
P2/ J2 Diff
}
User Defined Connected to RTM
Figure 5 Slot Profile Example – SLT3-PAY-2F2U.
Data Plane Fat Pipe DP01
Control Plane Fat Pipe DP02
UT Pipe CPUTP 01
MOD3-PAY-2F2Ux.x.x-1
Serial Rapid I/O 1.3 @ 3.125 Gbaud
1000Base-Bx
MOD3-PAY-2F2Ux.x.x-2
Serial Rapid I/O 1.3 @ 5 Gbaud
1000Base-Bx
MOD3-PAY-2F2Ux.x.x-3 MOD3-PAY-2F2Ux.x.x-4
PCIe Gen 1
1000Base-Bx
PCIe Gen 2
1000Base-Bx
MOD3-PAY-2F2Ux.x.x-5
10GBase-Bx4
1000Base-Bx
MOD3-PAY-2F2Ux.x.x-6
10GBase-Kx4
1000Base-Bx
MOD3-PAY-2F2Ux.x.x-7 MOD3-PAY-2F2Ux.x.x-8
Serial Rapid I/O 2.0 @ 5 Gbaud
1000Base-Bx
MOD3-PAY-2F2U x.x.x-9
Serial Rapid I/O 2.1 @ 5 Gbaud
1000Base-Bx
MOD3-PAY-2F2Ux.x.x-10
Serial Rapid I/O 2.1 @ 6.25 Gbaud
1000Base-Bx
Serial Rapid I/O 2.0 @ 6.25 Gbaud
TABLE 2 Module Profile - MOD3-PAY-2F2U-x.x.x.
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OCTOBER 2009 RTC MAGAZINE
UP Pipe CPUTP 02
tral controller with eight UTP connections and a peripheral slot with one UTP connection. The backplane topology connects the central controller to the peripherals in a star fashion. The nine-slot OpenVPX example with module profile for Gen 1 PCIe creates a system with a peak data-plane bandwidth of 250 Mbytes/s in each direction per duplex pipe. This equates to a total system peak bandwidth of up to 2 Gbyte/s simultaneous data communications. If the modules in the system use Gen 2 PCIe module profile, the data-plane bandwidth would increase from 250 Mbyte/s to 500 Mbyte/s (duplex), making peak data-plane bandwidth 4 Gbyte/s. The type of module integrated into the system defines the system; if the system integrator wanted to use sRIO then the backplane would not need to change, just the modules. The second system is an example of a rugged ultra-high-bandwidth system with a data plane communication of four lanes (10 Gigabit/s per slot or greater) or one FP. The example shows a topology for a sevenslot system with optimized bandwidth by using a central switched slot. Figure 7 shows one FP connected to a central switch slot. In addition, this backplane profile has the similar definition for a one-UTP control plane by using the XXX-PAY-2F2T slot and module profiles and the appropriate switch profile. Again, the type of module integrated into the system defines the system; if the system integrator wanted to use 10GigE then the backplane would not need to change, just the modules. Chassis profiles collect backplane, cooling and physical characteristics into a set of definitions for OpenVPX development systems and could provide the basis for production-ready systems. This part of the specification instantiates chassis type, slot count, power input, module cooling, backplane profile, pitch, power capability and chassis manager. The idea to standardize development chassis is OpenVPX’s path to interoperability. Module providers can build to readily available chassis and start the process of system integration, which will grow the VPX ecosystem. Defining a new Eurocard standard is not easy; the flexibility and capability of VPX leads to countless choices. Now with OpenVPX, the VPX standard can thrive.
technology in context
CompactPCI Plus ®
Utility JO
Utility JO 1
Utility JO
1
1
J1
J1
J1
Utility JO
Utility JO
Utility JO
1
J1
1
J1
Utility JO
1 J1
1 1 1 1 1 2 2 2 2 2 3 User 3 User 3 User 3 User 3 User 4 4 4 4 4 5 Defined 5 Defined 5 Defined 5 Defined 5 Defined 6 6 6 6 6 7 7 7 7 7 J2 J2 J2 J2 J2 8 8 8 8 8 9 9 9 9 9 10 10 10 10 10 11 11 11 11 11 12 12 12 12 12 13 13 13 13 13 14 14 14 14 14 15 15 15 15 15 Figure 6 16 16 16 16 16
Utility JO
Utility JO
1 J1
The future of CompactPCI is serial...
®
1 J1
J1
1 1 1 1 2 2 2 2 3 User 3 User 3 User 3 User 4 4 4 4 5 Defined 5 Defined 5 Defined 5 Defined 6 6 6 6 7 7 7 7 J2 J2 J2 8 8 8 8 J2 9 9 9 9 10 10 10 10 11 11 11 11 12 12 12 12 13 13 13 13 14 14 14 14 15 15 15 15 16 16 16 16
OpenVPX 3U Nine-Slot Example – BKP3-CEN09-8U1D. Nine-slot backplane, 8 Ultra-Thin Pipes Data Plane.
Utility JO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
J1
User Defined J2
Utility JO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
J1
User Defined J2
Utility JO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
J1
User Defined J2
Utility JO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
J1
User Defined J2
Utility JO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
J1
User Defined J2
Utility JO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
J1
User Defined J2
F19P – 3U CompactPCI® PlusIO SBC with Intel® CoreTM 2 Duo
Utility JO
{ { { { { {
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
MEN Micro leads the way again with advanced serial I/O to PICMG’s newest specs:
CompactPCI® PlusIO PICMG 2.30
x4 PCle
■ ■ ■ ■
J1
CompactPCI®Plus PICMG CPLUS.0 ■ ■
J2
■ ■ ■ ■
GigE
Star architecture Full Ethernet mesh No bridges, no switches Support of 8 peripheral slots Fast 12 Gb/s connector Proposed CPLUS.0 CompactPCI® Plus specification currently under development
Count on MEN Micro to get you to the future of harsh, mobile and mission-critical embedded technology first!
Figure 7 OpenVPX 3U Seven-Slot Example – BKP3-CEN07-6P1S-1F1D1U. Seven-slot Backplane 1 PCIe Switch with GigE Control Fabric.
It is now a true open standard with easy to understand rules and guidelines to define interface points and minimize incompatibility. Innovation can still happen, but now with a well-defined process in VPX to describe interoperability. With the current processor and data-communications technologies that are available now and in the near future, OpenVPX will have
100% compatible with parallel CompactPCI® PCI Express®, Ethernet, SATA, USB Support of 4 peripheral slots Fast 5 Gb/s connector
a specification that fits that technology enough for the customers to evaluate, develop and deploy with the VPX Eurocard form factor. Concurrent Technologies Woburn, MA. (781) 933-5900. [www.gocct.com].
MEN Micro, Inc. 24 North Main Street Ambler, PA 19002 Tel: 215.542.9575 E-mail: sales@menmicro.com
www.men.de/cpci-plus
Untitled-11 1
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ploration your goal k directly age, the source. ology, d products
Technology in
context Developments in VME
Air and Conduction Cooling for 3U COTS Cards: An Overview Thermal knowledge and innovation continue to improve cooling limits for air-cooled and conduction-cooled cards, and this benefits 3U cards greatly due to their shorter width and lower power.
by Ivan Straznicky, Curtiss-Wright Controls Embedded Computing
T
here are many trends at the die level 60 and circuit card level that can drive 50 the decision of which cooling methPower (W) od to use for 3U COTS cards in rugged 40 applications. One of these trends is the increased use of multicore processors on 3U 30 cards. Placing more processor cores on a die increases power dissipation. However, 20 Power density (W/cm2) as more cores are placed on a die, the size of the die increases, which actually de10 nies providing solutions creases the now power density in terms of W/ ion into products, andThis companies. Whether your goal is to research the0latest cm2 technologies (Figure 1). is a good thing from ation Engineer, or jump to a company's technical page, the goal of Get Connected is to put 1 you 2 3 4 5 a thermal standpoint because it reduces you require for whatever type of technology, spreading resistance down the heat Processor Generation and productsthe you are searching for. removal path. Unfortunately, increasing Figure 1 device power dissipation, combined with the long-term trend of decreasing junction Rising power dissipation and peaking heat density on successive processor temperatures (i.e., from 125째C to 105째C, generations. or 100째 or less), tends to override the small benefit obtained from the decrease tor geometries, which results in large in- dominant forms of leakage current. At the board level, component minin power density. creases in static (or leakage) power. Some iaturization and the use of more highly One of the main causes of increased modern processors use new types of tranintegrated devices are increasing the power dissipation for processors is the sistor materials that reduce the amount functional density on 3U cards, which trend toward increasingly smaller transis- of static power. For example, Intel uses is directly related to heat density. As the hafnium dioxide on its 45nm processors. amount of processing power per square These new transistor materials reduce Get Connected inch per 3U card has increased, it has the amount of gate oxide tunneling and with companies mentioned in this article. sub-threshold leakage current, two of the driven up heat density. Another factor www.rtcmagazine.com/getconnected
End of Article
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OCTOBER 2009 RTC MAGAZINE
Get Connected with companies mentioned in this article.
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technology in context
driving up allowable power dissipations on 3U cards is the support for higher voltages in the new VPX (VITA 46) standards. VITA 46 defines support for 12V and even 48V, compared to the standard, traditional 3.3 and 5V supported by VME. VPX also supplements the traditional 0.8” pitch of VME with 0.85” and 1.0” pitches. This increase in pitch enables the use of more, hotter devices on the rear side of the circuit card, increasing the power dissipation per unit area and volume. The outcome is an almost exponential increase of power at the circuit card level. Susceptibility to this trend depends on the card’s functionality. The higher power cards are typically DSP cards that have multiple multicore processors on board for number crunching. In comparison to DSP cards, general-purpose processor and I/O cards typically follow more of a flat curve in terms of power.
Figure 2 Photo of 3U air-cooled product.
While direct air and conduction cooling have been able to keep up with these power increases to date, it has been a challenge. The amount of thermal design, analysis and testing that is required on a rugged military COTS 3U card is many times what it was five years ago. This increased work is basically the result of the increase in power dissipation.
Direct Forced Air Cooling
Direct forced air cooling is typically the starting point in terms of cooling ap-
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proaches for military COTS cards simply because most software and system development begins in a laboratory environment with air-cooled cards in a benchtop rack. Consequently, these cards are usually commercial temperature rated and not rugged. Cooling begins at the device die and on most modern, high-power devices, the die is exposed. This is because most commercial cooling approaches employ an air-cooled heatsink on top of the die, which provides the shortest and lowest resistance heat removal path to the air. While forced air cooling takes advantage of this arrangement, it may not always be desirable to have a large piece of metal on the die. For this reason a heat spreader is sometimes placed between the heatsink and the die to spread the heat and to provide some protection for the die. Unfortunately, for today’s higher power devices, standard off-theshelf aluminum heatsinks, with a few fins per inch, may be insufficient. To address these hotter devices the heatsink will likely need to be optimized. System designers can use computation fluid dynamics (CFD) tools to design the heatsink they require for air cooling. There are subroutines available within CFD tools to design the heatsink’s optimum number of fins per inch, thickness of fins, optimum gap and height, etc. Another trend in air cooling today is the availability of higher flow and pressure fans and blowers, which provide increased airflow for such high pressure drop heat sinks. These new approaches coupled with advances in air cooling have resulted in significantly improved cooling numbers. For example, today, a 150W 6U card can be sufficiently cooled with a 71°C air inlet. Just five years ago, many designers would have been hard pressed to believe this was achievable. For 3U cards, air cooling is even more attractive because there are far fewer hot components on the card that need to be cooled by the same air stream
technology in context
(by virtue of the 3U geometry, i.e. 100 mm in the airflow direction vs. 233 mm). There are, however, drawbacks for air cooling. Air-cooled cards are typically not very stiff compared to conduction-cooled cards. Unlike conduction-cooled cards, they lack a metal stiffener plate on top to increase the stiffness. When air-cooled cards are subjected to significant vibration, they can displace quite a bit and end up experiencing fatigue problems more quickly than on stiffened cards. With that said, this is less of a problem for air-cooled 3U cards than for 6U cards, because they have a much shorter span between guide rails (Figure 2). Another drawback for air cooling stems from the use of non-sealed chassis to enable air to be blown directly over the electronics. Because the chassis isn’t sealed, the cards and electronics may be exposed to contaminants, such as salt fog/ sand/dust, etc., in the ambient environment. Filtering the air will remove some of these contaminants, but will come at the cost of an increase in pressure drop due to the filter. One more drawback associated with air cooling that is worth noting is that because air is compressible and has low heat capacity and low thermal conductivity, it is not a very good coolant. Because of these properties, an increase in airflow rate over a card can result in an asymptotic curve with respect to cooling vs. airflow. At the same time, the pressure drop is increasing steadily so the cooling limit is reached relatively quickly with airflow cooling.
Conduction Cooling
Conduction cooling is a popular choice and used quite widely for deployed 3U systems because it is inherently more rugged (Figure 3). The “backbone” of conduction cooling is the stiffening and thermal frame, typically made of aluminum. Today’s increased power dissipation levels are leading to increased use of copper as well. Because of copper’s high density it is used only where needed, for heat spreading for example. Composite materials are also showing some promise, not necessarily as a replacement for the thermal frames, but localized in areas of the thermal frames. However, most composites are orthotropic
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with regards to thermal conductivity, with the in-plane thermal conductivity being quite high. For example, the claimed thermal conductivity for pyrolytic graphite is very good—about 1500 watt per meter per degree Kelvin (W/m°K) in either in-plane direction. Compared to aluminum, which is 180 W/m°K, pyrolytic graphite should provide performance almost an order of magnitude better. However, the through thickness thermal conductivity for pyrolytic graphite is only around 20 W/m°K, and needs to be taken into account. If large amounts of heat are being moved across large planes or long distances, a composite can be a good solution. But trying to move heat through the thickness is more difficult. There are several research groups working on developing materials that have isotropic conductivity better than copper (which is 400 W/m°K), have the density of aluminum or lighter, and can be produced at reasonable cost. However, because they are highly engineered, cost often ends up being an issue. Another option for increasing the thermal conductivity of thermal frames on 3U cards is to use phase change devices such as heat pipes or vapor chambers. Curtiss-Wright has undertaken substantial research and development with heat pipes and has successfully implemented them in rugged products. Heat pipes are very effective at moving heat with a very low temperature drop. A drawback of heat pipes though, is that that they are orientation dependent, which makes it critical to understand how they behave under the effects of body forces such as acceleration, vibration and gravity. The various performance limitations of heat pipes, such as capillary, entrainment and condenser limits, also must be understood to implement them properly. When properly implemented, heat pipes can handle fairly high power densities and power dissipations. A heat pipe implemented in the axial direction provides effective conductivity in the thousands of W/m°K, which is an order of magnitude higher than the metals used for cooling. Advances in conduction-cooled cards now make it possible to cool in excess of 170W at an 85°C card edge temperature, the upper limit of what is seen with military COTS circuit cards. A standard chas-
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technology in context
sis with air-cooled sidewalls, though, is not capable of cooling even one of these cards. Air cooling through the side of a chassis wall, with conduction cards slotted between rails, is just not capable of cooling the level of power density at the circuit card edge. In such a case, other approaches, such as a liquid-cooled chassis, in which liquid is flowed through the sidewalls, must be employed. Thermal resistances in the heat path of a conduction card have improved greatly, for example thermal interface materials, over the last decade. Ten years ago the best thermal interface material you could find was in the order of 1-3 W/ m°K. Now there are several in the order of 10-15 W/m°K, which is basically an order of magnitude improvement. However, you do have to be careful with some of these materials. When tested, some that have been advertised as having a certain thermal conductivity actually exhibited only 1/10th of that value. Had that material been designed into products without testing, thermal failures may have resulted. Because these materials have been designed for use in commercial applications, they also need to be tested for rugged properties such as long-term thermal cycling, exposure to humidity, etc., to ensure that they can be used in rugged applications. The perceived “Achilles’ heel” of conduction cooling is the thermal con-
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Figure 3 Photo of 3U conduction-cooled product
tact resistance between the conduction card edge and the chassis rail that results from metal-to-metal contact. These metal surfaces are not truly flat and smooth at the microscopic level. Metal peaks, called asperities, contact each other and create low resistance paths through which much of the heat flows. The heat flowing across this junction is a surprisingly complex phenomenon. The thermal contact resistance for a given pair of surfaces depends on a complicated combination of variables including contact area, contact pressure, surface flatness, surface roughness and hardness. Typical values of thermal contact resistance used for VME or VPX cards are in the range of 0.3-0.5°C per watt. So for a 100W card, with 50W going to either card edge, the 50W is multiplied by the .5°C per watt resulting in a 25°C temperature difference across that interface. This is
huge in terms of the temperature budget between the coolant and the electronics. For example, the temperature budget for cooling a part that has 100°C maximum junction temperature with 55°C ambient air is only 45°C. By investigating and optimizing the contributing factors to thermal contact resistance, much lower values in the range of 0.1-0.2°C/W can be achieved. Note that these values are at sea level and they will change (increase) at altitude. With these numbers and our example of a 100W card, a temperature difference of only 5 to 10 degrees can be obtained. This is still significant and must be accounted for in system level thermal analyses, but 5-10°C is certainly more appealing to system integrators than 25°C. These improvements should be sufficient for 3U cards for the foreseeable future, making the 3U form factor a good choice for small form factor (SFF) electronics. Curtiss-Wright Controls Embedded Computing Leesburg, VA. (703) 737-3660. [www.cwcembedded.com].
8/11/09 2:29:04 PM
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solutions
engineering Solid-State Drives
Extend SSD Lifetime Using the Network Database Model Solid-State Drives are emerging as a replacement storage device for traditional hard drives and flash systems in embedded devices. Efficiently managing data on these devices is increasingly important to meet the application needs without increasing the size of SSDs or recalling due to ‘bad blocks’. by John Pai, Raima Division of Birdstep Technology
S
Device Lifespan and Performance
When deciding on the appropriate SSD for a project, system designers basically have two practical options, the flashed-based SSD or RAM-based SSD. System designs with flash-based SSD
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Relational Model (key based) Product Table Index 1
Product A Product B
Time
olid-State Drives (SSDs) have evolved to become a viable option to replace rotating Hard Disk Drives (HDDs) in many embedded systems. This is because SSDs eliminate the single largest failure mechanism in many embedded systems—the moving parts of HDDs. Despite the obvious need for these new technology trends, designers are already beginning to face a number of challenges as next-generation devices find their way into embedded applications. The most significant challenges include endurance, limited storage and storage management issues that affect product life and space utilization. Consequently, designers must properly arm themselves with accurate knowledge of these concerns and guidance for how to overcome the limited lifetime of a flash-based SSD and limited capacity of a RAM-based SSD due to the RAM cost.
B-Tree Inventory Table Product A - 1 Index 2
Product A - 2
# Records Minimum Cost = 3 Disk I/O + B-Tree Calculation
Product A - n
Figure 1 Relational Model (left). The cost of Relational Model as the database grows. (right).
have various strategies to deal with write endurance management, but have the common issue of scoring how many times a block of memory has been written to, and then dynamically and transparently reallocating physical blocks to logical blocks in order to spread the load across the disk. In a welldesigned flash SSD, the system would have
to write the endurance number of cycles to the whole disk for it to be in any danger. Flash SSDs are not likely to continue performing at the same level as when first operated. That’s important to know, given the speed with which SSDs have proliferated in the marketplace amid claims that they’re faster, use less power and can be
solutions engineering
Two Data Management Strategies
Embedded system designers have a few basic options when deciding on data management strategy for embedded SSD devices. Currently, the most widespread data management model is a relational model. The relational model stores data in tables composed of columns and rows. When data from more than one table is needed, a joint operation relates these different data using a duplicate column from each table (Figure 1). While the relational model is flexible, performance is limited by the need to create new tables holding the results from relational operations, and storing redundant columns. Even when designed efficiently, there are several sources of overhead. The main source of overhead comes in the form of data duplication to help preserve the relational database integrity, and a need for a foreign key to efficiently manage relationships. The overhead results in excess in file size and extra I/O needed to perform basic database operation. Such overhead is especially expensive in both flash- and RAM-based SSD devices. Embedded systems designers can exploit the network database model for significant advancements in data management to mitigate the lifespan limitations
on solid-state drives. The network model is conceived as a flexible way of representing objects and their relationships. The network model predates the relational model and can be viewed as a superset. This implies that anything expressed in the relational model can be expressed in the network model, even SQL support. The main advantage is the way the relationships are modeled. A primary distinction to the relational data model is that the network model allows designers to describe relationships between records using “sets,” where pointers are used to relate objects directly and navigate between them (Figure 2). A set is a linked list representing a one-to-many relationship, which contains pointers to the next and previous member link of the set.
cess is write-intensive and unpredictable due to the required fullness of the tree and where in the tree the change must be made. The more nodes a tree contains, the greater the chance of a larger reorganization, which may be space- and time-consuming as well as write intensive. Also, the reorganization process may require the operating system to devote large amount of computing resources to reorganizing in order to meet the time constraints. After the reorganization process, the database can perform a write operation to reference the new record in the B-Tree. In a network model, adding a record is relatively simple, is less write intensive, wastes no space from duplication of data, and is predictable. The process involves adding a new record and setting pointers
Network Model (pointer-based) Product Table Product A Product A Time
more reliable since there are no moving parts. Flash SSD performance and endurance are related because the management overhead of a flash SSD is related to how many writes and erases to the drive take place. The more write/erase cycles there are, the shorter the drive’s service life. Flash memory cells are nominally guaranteed for only one million write cycles. Once the quota is reached, the disk can become unreliable. Special firmware or flash SSD controller chips help mitigate this problem with dynamic reallocation rather than rewriting files to a single location. Although less popular than its flash counterpart, the RAM-based SSD is significantly faster at both read and write operations. A typical RAM SSD does not face the same write cycle limitation as flash SSD because most of the I/O is performed in SSD RAM. The data is then copied from volatile memory to nonvolatile memory when instructed or when powering down. RAM SSDs are usually armed with their own batteries, which last long enough to preserve data in case the system unexpectedly powers off.
Inventory Table Product A - 1 Product A - 2 Product A - n
# Records Minimum Cost = 1 Disk I/O
Figure 2 Network Model (left). The cost of Network Model as the database grows. (right).
Network Model Streamlines Writes and Minimizes Footprint
When compared to the relational model, the network model is faster, more reliable, more efficient with disk space, and requires less I/O to perform the same tasks. In both read and write operations, data structured in the relational model have costly overheads due to the primary key and foreign key relationship. Consider writing a record into a relational model, where a write operation can be expensive. After a record is inserted into the table, the database inspects the BTree to locate the record’s index position. If there is no room available in the B-Tree, the tree needs to be reorganized to maintain efficiency. This reorganization pro-
to owner, previous and next record. Subsequently, set the owner’s last pointer to the new record. This process is fast, predictable, and does not require reorganization of a B-Tree. Most importantly, it requires minimal write cycles, thus, minimizing wear on the SSD, reducing re-claiming cycles, and optimizing space by removing unnecessary duplication. Further examination of the differences between relational and network model databases reveals space savings from the network model. This saving is a result of the network model making relationships through set pointers instead of unnecessary data duplication and indexes. In the network model, data is inserted with minimal overhead. A record requires RTC MAGAZINE OCTOBER 2009
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solutions engineering only data and pointers. On the average, one can expect a relational model to require at least 30% more space than a network model database. When considering which data management model to use for the system, remember that the relational model overhead is expensive. Consider inserting 1 Mbyte of data into the SSD with the network model. Inserting the same data in a relational database balloons the size to a minimum of 1.3 Mbytes. In this comparison, after multiple
repeated inserts, a flash-based SSD with a network database will endure a longer life by at least 25%, due to the 30% relational model overhead. Similarly, a RAMbased SSD will have at least 30% extra storage and thus reduce the space reclaim frequency. Once an SSD reaches a certain point, the operating system reclaims space. With the reduced overhead of the network model, the frequency of reclamation from the operating system is significantly reduced as well.
Data Management Strategies
To further extend the life or maximize space of an SSD, there are several data management strategies in addition to the network model that designers can consider to enhance performance, minimize disk space and minimize write cycles. The design strategies that designers can add to a network database include sparse indexing, optimizing cache, and combining the use of an in-memory database. Sparse indexing can save space by referencing the indexed data rather than duplicating it. Traditional databases duplicate the indexed data for search efficiency because of data locality, but this uses vast amounts of space. Referencing data is a non-issue for RAM SSD, allowing application designers to specify full duplication, partial duplication, or no duplication of data to reduce storage utilization. Cache optimization customizes the cache to be large enough to minimize write cycles by updating the database only at the end of transactions. Then, when data is inserted into the files, it writes to each file sequentially. This will write the updated pages in each file in ascending order by offset in the file, which may also lengthen the service life of a flash SSD. The use of an in-memory database can be critical to keeping unnecessary write cycles in main memory. Similar to cache optimization, a hybrid in-memory database can reduce unnecessary writes and disk usage by storing the ordered duplicate, key information in main memory to preserve the data, maintaining the transactional integrity of the system. Such a strategy may also prolong the life of a flash SSD, reduce the re-claiming frequency and maximize storage space. There are many ways to extend the life of a flash SSD and save space for a RAM SSD. With minimum resources and overhead required, a network database along with a combination of sparse indexing, cache optimization and in-memory database will yield an optimal data management solution to help prolong the service life of a solid-state device. Raima Division, Birdstep Technology Seattle, WA. (206) 748-5300. [ www.ramia.com ]
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solutions
engineering Solid-State Drives
SSDs Increase Performance and Reliability in Embedded Applications The increased performance and reliability achieved by solid-state storage technologies work together to address critical OEM reliability concerns such as storage system endurance, elimination of drive corruption, and the ability to forecast useable life. by Gary Drossel, Western Digital
I
n 1999, solid-state drives (SSDs) in their nascent 3.5-inch form factors cost as much as $42,000 for 14 Gbytes and were used primarily for high-end military and industrial embedded applications that had a severe pain threshold for any component that could become a point of failure. For storage subsystems deployed in a flight data or mission recorder, radar or sonar system or tactical computer, failure is not an option. SSD performance and reliability during this time were predicated on the inherent qualities of solid-state storage technology—no moving parts to wear out or fail, and being impervious to extreme temperatures and the high shock and vibration that comes with deployment in a rugged, often high-risk area. The price for peace of mind was a hefty $3,000 per Gbyte. Fast forward 10 years and SSDs are mainstream storage solutions for military, industrial and now consumer and commercial applications. SSDs have become complementary storage systems to hard disk drives (HDDs), and have long been deployed in the same embedded systems. SSDs offer a valuable system-level enhancement to HDDs in terms of speed, ruggedness and durability
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Life (Years)
=
SSD Technology
Usage Model
WearLeveling
Storage Budget
ECC
Write Amplification
NVM Config
NVM Specs
Over Provisioning
Performance
x
Capacity
Data Size
Randomness of data
Write Duty Cycle
Figure 1 For enhanced system reliability, it is important to accurately forecast SSD usable life by evaluating the SSD technology and the application usage model.
in harsh environments. SSDs today are being used as fast boot drives or to cache “hot data” that is frequently accessed, increasing overall system performance while minimizing power and space. In addition, SSDs can be cost-effective replacements for hard drives in applications requiring a small footprint, low power and the high performance and reliability to outlast a 10-year plus deployment cycle.
Enhanced Performance and Reliability
How do today’s SSDs increase performance and reliability beyond their inherent rugged qualities? To answer this question requires a little history. During the last twenty years of innovation, breakthroughs in SSD technology have resulted in lower costs per gigabyte and massive adoption in consumer devices such as iP-
solutions engineering ods and MP3 players. As a result of the advancements in innovation, consumers demanded products with even faster speeds and smaller form factors. For SSD manufacturers, faster host system interfaces and shrinking process geometries yielded smaller form factor and higher capacity products but caused significant design and cost challenges. How could they meet the demand for smaller and faster devices without sacrificing performance and reliability? The answer is age old: paying customers. Nolan Bushnell, an entrepreneur and founder of Atari, had what he called the “Universal Trade Show Theory.” The theory reasoned that the Western world at the time developed and brought more technology to market because of trade shows. Bushnell witnessed that most innovation happened two months prior and two months after a major trade show. An engineer invented something and a customer wanted it. Voilà. The prediction that SSD innovation will exceed Moore’s Law over the next few years is coming true for the same reason; the market is now big enough and the cost per gigabyte is dropping low enough that “customers” on all fronts, enterprise, commercial and end-user, are signaling that they will pay for new solid-state storage innovations. SSD manufacturers now have incentive to integrate additional performance and reliability technologies into SSDs that were cost-prohibitive and premature for the market in the past.
• How are SSDs designed to guarantee reliability and endurance over several years of use? • What methodologies are available to accurately forecast SSD life in months or years? When power goes out from an anomaly such as an ungraceful power down, brownout or power spike, this can frequently cause drive corruption and ruined data. The result is costly unscheduled downtime as field technicians reformat drives, reinstall operating systems or return products. The possibility of a power disturbance is something design engineers need to strongly consider. If the host system loses power in the middle of a write operation, critical system files may be overwritten or sector errors may result, causing the drive to fail. It is estimated that a majority of embedded system field failures are due to power-related corruption. Advanced solid-state storage technologies are available with integrated voltage detection circuitry that detect low voltage
storage technologies integrate self-monitoring early warning systems so OEMs can monitor drive life in real time with no application downtime. The ability to read and display the remaining amount of a drive’s useable life eliminates unanticipated drive failures due to wear, and allows network administrators to set usage model thresholds to schedule field maintenance and drive replacement without incurring expensive unscheduled downtime. Improving reliability by preventing unexpected drive failure allows companies to save hundreds of thousands of dollars per year in lost data, emergency maintenance and system downtime costs. In many embedded applications, SSDs need to last 5 to 10 years or more and perform in every type of usage model and environment. OEM designers, supply chain managers and end-customers need to be confident that their storage system choice exceeds the application requirements. Advanced solid-state storage technol-
Application Challenges Drive Advanced SSD Technologies
The requirements for higher and higher levels of storage reliability in embedded systems that run 24/7 have led SSD suppliers to develop advanced solidstate storage technologies. The increased performance and reliability achieved by these new technologies work together to answer some of the storage industry’s toughest questions. • How are SSDs engineered to protect against drive corruption resulting from power anomalies, the number one cause of storage system field failures? • What technology is available to monitor and report SSD useable life to prevent wear out and SSD failure?
Figure 2 Silicon Drives from Western Digital provide advanced storage technologies that meet the high-performance, high-reliability and multi-year product lifecycle demands of embedded systems.
situations and signal the host system to stop sending data to the media so critical files will not be overwritten or corrupted. Over the deployment cycle of the drive, this significantly reduces maintenance, warranty and other unscheduled downtime costs, thus increasing reliability of the system. Traditional SSDs simply operate until they fail. Today’s advanced solid-state
ogies include a wide array of system-level and firmware-level technologies to deliver industry-leading data integrity and a product life that exceeds its scheduled deployment life. Included are sophisticated error correction code (ECC) algorithms to thwart the effects of signal noise and data distortion, and to prevent bit-flip errors caused by overcharged memory cells switching cell content from 0 to 1 or visa versa. RTC MAGAZINE OCTOBER 2009
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solutions engineering Also standard is advanced wear-leveling technology that allows data to be written evenly over the entire drive, greatly expanding endurance. Advanced wearleveling gives customers peace of mind that their SSDs will not wear out and fail because SSD write cycles are limited. SSDs are now deployed in many applications that are not in harsh or extreme environments. Applications like voice data systems or media streaming appliances may reside in environmentally controlled
data centers. The “new rugged” is the application’s usage model. Many embedded system applications require 24/7, alwayson capability with heavy write cycles versus the almost unlimited read cycles. Furthermore, to achieve the increased capacities and smaller form factors demanded by customers, SSD manufacturers must continue to incorporate NAND components at ever smaller process geometries. This comes at a cost of shorter service life per gigabyte due to lower endur-
ance ratings of the media. For example, a 70 nanometer multilevel cell (MLC) SSD may have an endurance rating of 10,000 writes. At 50 nanometers, the endurance rating may be 5,000 writes and at 20 nanometers, 1,000 writes. NAND media endurance is directly related to data retention. Most NAND endurance is rated at one year of data retention per JEDEC standards. Relaxing the data retention requirement can increase the endurance rating and may be considered in applications where data is transient or is backed up to another system. New methodologies to accurately forecast SSD life in months or years are now available to answer the questions. Usage model is the key. For example, using Western Digital’s LifeEST methodology, an 80 Mbyte/s 60 Gbyte SATA SSD in an extremely write-intensive application that writes 1.645 terabytes per day would have an approximate lifespan of 9.7 years. The same SSD writing a mere 200 Gbytes per day would last approximately 82 years. By evaluating real-world usage calculations, designers can effectively balance performance and reliability (Figure 1). WD’s SiliconDrive III SSD product family delivers the advanced technologies that ensure high reliability for embedded system and data streaming applications. Integrated technologies in every SiliconDrive III SSD solve the storage industry’s toughest problems (Figure 2). SSDs have become mainstream storage solutions for a wide range of embedded system, consumer and commercial applications. As complementary storage systems to hard disk drives (HDDs), SSDs are being deployed as system-level enhancement in the same embedded systems. SSD manufacturers have integrated new advanced solid-state storage technologies to address the requirement for higher and higher levels of storage reliability in embedded systems that run 24/7. Western Digital Lake Forest, CA. (949) 672-7000. [www.wdc.com].
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Phone: (714) 283-4800 Fax: (714) 283-1169
E-mail: info@drs-ss.com Web: www.drs-ss.com
SCSI Solid State Disk VME Module 8 bit Narrow or 16 bit Wide (LVD) Interface Dynamic Wear Leveling Integrated SLC NAND Flash Operational Temp -40 C to 85 C 80,000 Feet Operational Altitude 50G, 11ms Shock 16g rms, 10-2000Hz Random Vibration Meets Military and IRIG 106-07 Declassification Standards
Phoenix International E-mail: info@phenxint.com Web: www.phenxint.com
Phone: (714) 283-4800 Fax: (714) 283-1169
E-mail: info@phenxint.com Web: www.phenxint.com
Industry
insight Rugged Applications
Communication Rack Mount Servers Move to New Levels of Reliability For systems in rugged environments, fan and general system vibration can be the cause of under-performing systems that affect the throughput of sensitive hard disk drives. The good news is that there are new vibration suppression technologies designed to protect hard drives and avoid system disruption or performance degradation. by Keith Taylor, Kontron
T
he growing demand to maximize uptime, performance and reliability of networked systems has led to the design of more rugged server solutions. Moreover, these types of rugged solutions often require servers to be installed in space-constrained environments with required system longevity of three to five years or even longer. These demands are especially important in the telecommunications environment, where computing suppliers must adhere to very specific Network Equipment Building Systems (NEBS) or European Telecommunications Standards Institute (ETSI) requirements that specify stringent carrier class features to guarantee operation under the environmental extremes found in a central office or data center. Communication rack mount servers are standard building blocks used in a variety of telecom and network applications, and are important for satisfying the demanding requirements and limited space of the telecom central office and data centers. These ruggedized servers are also growing in demand for a broad range of military, aerospace, government, medical and energy market appli-
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Figure 1 The Kontron TIGH2U is a NEBS-3 and ETSI-compliant 2U rack mount server that features high performance and energy efficiency in a rugged, carrier-grade design.
cations. Two common types of communication rack mount servers deployed today are carrier grade servers and IP network servers. For the most part, carrier grade servers are NEBS-3 and ETSI-compliant and are used as solutions for Telco applications such as unified messaging, services over IP (SoIP), video on demand (VoD), media and signal-
ing gateways, operational system support, mobile location service and media servers. Likewise, IP network servers are used in a broad range of data network applications that have large I/O requirements. These servers offer the long life, ruggedness and reliability required for network security and other enterprise-based applications.
industry insight
Evaluating Servers for Rugged Applications
There are several key considerations that system designers should weigh when choosing a rugged server. Of particular importance is meeting the requirements for NEBS certification standards from Telcordia for equipment used in Telco central offices. Servers integrated into carrier facilities must be NEBS-compliant to handle power management, electrical shielding, disaster preparation, environmental safety and specific hardware interfaces. Telecommunications equipment, in particular, must meet NEBS Level 3, which is the most demanding set of requirements in the NEBS specification. This level requires equipment to be designed to prevent damage or failure from environmental conditions or events such as temperature and humidity, vibration and airborne contaminants. It must also be fire resistant and able to withstand a Zone 4 earthquake shock, as well as provide for improved space planning and simplified equipment installation. For NEBS certification, servers are tested for shock and vibration tolerance, operating temperatures of 40째C, high altitudes and fire resistance, as well as many other very specifically defined tests. Also, to ensure operation in rugged environments, certain server manufacturers are performing demonstrated mean time between failure (MTBF) testing. Another vital standards organization is the ETSI, which produces technology specifications for fixed, mobile, radio, converged, broadcast and Internet equipment applications. Particularly for European Union countries, this certification ensures that servers deployed in this market adhere to specific criteria for telecommunication equipment. Defining ruggedness in telecommunication and networking applications mandates looking at Reliability, Availability and Serviceability (RAS) features in communication rack mount servers. Features that should be prioritized to minimize system faults while providing maximum uptime and improved ease of service include redundancy and hotswap capability of power supplies, fans and RAID-supported hard disk drives, as well as Telco-grade components, onboard
Figure 2 As this test screen shows, without vibration suppression technology reading performance is reduced but writing performance is reduced to zero when fan speed is toggled between normal and high speeds. The user sees hourglass or error message that indicates drive is not available when performance is at zero Mbyte/s throughput. If this is an OS drive, it could cause a blue screen.
temperature and voltage monitoring and remote system management. Unexpected system downtime can costs hundreds of thousands of dollars for a telecommunication service company, not to mention the costs associated with warranty, maintenance, reduced resources and lost customer trust. A highly reliable server starts with a rugged chassis design. The chassis housing for servers in rugged applications should have a minimal use of plastic, and if plastic is required, then a higher grade burn-resistant plastic that is UL 94-V0 certified should be used. Thicker sheet metal should be used along with features that improve the overall rigidity of the chassis. Post-plated exterior sheet metal is preferred as opposed to pre-plated, which is prone to rust on cut or sheared edges, and Zinc Chromate plating that offers a greater degree of rust prevention than Nickel. Server cables, too, play an important role for rugged applications. Internal cables using high-quality connectors that feature locking mechanisms, shrouds and thicker 30-micro-inch gold contacts are preferred. Even better are systems that reduce or eliminate cables by integrating multiple functions on one board or by directly docking boards together, which increases serviceability for the customer. Likewise, the type of power supply
in a server can increase reliability for a rugged application. To increase MTBF reliability, servers that include redundant power supplies with a choice of AC or DC input options are a good choice. DC power is also an important requirement for most central office installations and can reduce overall power losses in any application environment. Plus, servers that specify a higher MTBF design point for power subsystems add to the reliability factor. Ruggedization and thermal management in servers go hand in hand. System reliability is threatened by extreme temperatures that can be caused by external sources as well as those within the system itself. For these types of systems, high-quality ball-bearing fans provide the best thermal solution without negatively impacting overall system MTBF. Enhancing capabilities for rugged applications can mean incorporating new ballbearing fans as opposed to sleeve-bearing fans as a superior source for friction reduction and heat dissipation. In addition, multispeed fans that feature tachometer signals are preferred when choosing a server solution as these types of fans not only support thermal management, but also server fault detection. It is also recommended to have redundant cooling and fan designs that allow continued operation with a single fan fault. Designing for rugged applications is more than designing features to withstand harsh environments. Lifecycle support, too, RTC MAGAZINE OCTOBER 2009
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industry insight
Figure 3 With vibration suppression, this test indicates that reading/writing performance is improved and writing is no longer at zero when the fan speed is toggled between normal and high speeds. The result—hard disk drives are always available without error and no blue screen.
is an ongoing consideration for telecommunication equipment manufacturers in their rugged system applications. While most enterprise-class servers have an expected lifespan of 18 months before the supplier end-of-lifes (EOLs) the product, telco service providers typically require equipment that will be in production for three to five years or even longer. In addition, service and support for these systems must continue for another two to three years after production has ended. This lifecycle stability enables customers to reduce costs by staying with same product longer with more time to scale operations. Maintenance and qualification costs are also reduced, due to fewer product releases to manage simultaneously and fewer validation cycles. In conjunction with the long product life commitments from server suppliers, it is important that they have also designed the server with ruggedness and reliability from the ground up to further ensure its capability to remain operational during this extended time, and that service and support is available throughout and beyond the stated production life.
New Developments in Ruggedization: Vibration Suppression
Technologies developed to satisfy rugged system requirements are not only designed to prevent failures, they can also be implemented to enhance performance.
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By taking an in-depth evaluation of the persistent telecommunication equipment issues, it had become apparent that new technologies were needed to counteract the uncontrolled vibration found in today’s high performance servers that can result in significantly lower performance and can even render a system completely non-operational. Vibration is often the culprit for under-performing systems, but generally goes undiagnosed. The primary source of internally generated vibration is system fans. Because today’s higher-power systems require more airflow, fans have had to greatly increase their rotational speeds, with some fans now spinning at over 18,000 RPM. This has resulted in the increase of both the amplitude and frequency of system vibration. The system performance problem has arisen from hard disk drives that are more sensitive than ever to vibration. Rotational speeds and bit densities for hard drives continue to increase making them more susceptible and vulnerable to reliability issues due to mechanical structure. Performance issues can mount when reads and writes to the drive occur at the same time that the fans are running at high speed in response to thermal situations. During these situations, system performance can degrade to zero, causing a non-responding drive or a blue screen if the drive is running the operating system. Innovations in vibration suppression are being integrated into servers to main-
industry insight tain performance and thermal conditions while protecting the hard drive so that reads and writes continue with no disruption to system operations eliminating read/ write errors or a system crash. These new servers also employ high-quality fans with carefully balanced blades and high-quality bearings that are guaranteed and tested to meet specific vibration limits. As systems become more powerful, it is important that there be a continual evaluation process of both fan and disk drive products looking for improvements and monitoring them to make sure systems can deliver the best performance and reliability possible. As an example, Kontron has developed a proprietary vibration-suppression design in its communication rack mount servers to significantly reduce the amount of vibration by isolating both vibrationgenerating devices and vibration-sensitive devices. The company’s 1U and 2U Carrier Grade and IP Network servers utilize a unique vibration-absorbing material allowing its designers to isolate the fans from direct contact with the system’s metal infrastructure so they literally “float” inside the chassis (Figure 1). By engineering the system from the ground up and isolating the disk drives themselves, the design of the Kontron servers reduces the effects of the drive’s own rotational vibration on itself and other drives. It also reduces vibration effects coming from sources external to the system itself. Furthermore, Kontron recommends enterprise-class drives that it has tested to meet specific vibration-tolerant requirements, and is continually requalifying drives to meet its server and vibration specifications. Figures 2 and 3 show the test results of system vibration from a server before and after vibration suppression technology has been integrated into its design. Communications Rack Mount Servers (CRMS) are being deployed in a variety of telecom and network applications to satisfy the demanding and rugged environment requirements of the telecom central office and data center. These applications mandate maintaining maximum uptime and reliability. There are several key considerations that should be weighed when choosing a rugged server for the telecommunications environment. For servers installed in a carrier facility such as a central office, foremost of these
considerations is adhering to very specific NEBS-3 and ETSI requirements, and this level of compliance can often be applied to other types of rugged applications as well. Additional considerations to ensure the server is designed for rugged applications include Reliability, Availability and Serviceability (RAS) features, chassis design, fans and thermal management, the choice of cables and power supplies and product longevity.
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Kontron Poway, CA. (888) 294-4558. [www.kontron.com].
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System Integration Small Modules Power Medical Devices
Hardware Trumps Software in Medical Devices
circuits (ASICs) and field-programmable gate arrays (FPGAs). Let’s look at some of the common causes of software failure and how they can be addressed with FPGAs.
Multitasking and Multithreading
Most modern devices need to be able to handle multiple tasks at the same time, yet most modern embedded processors are still limited to one processing core. This limits the processor to executing one instruction at a time, and parallel processes are made to share the main CPU. In addition, other shared resources like network communication, hard disk and user interface (UI) elements present opportunities Hardware technologies like FPGAs and ASICs can remove for deadlock, or the condition when two or more processes are waiting for each other some of the performance burden from the processor exploration to release a resource. r your goal while simultaneously guarding against some of the most Deadlock can be very difficult to reeak directly produce and debug, since the situation ofpage, the common software bugs. ten relies on multiple processes and usuresource. hnology, ally requires a specific and synchronized nd products sequence of events to occur. Unit testing alone will not catch most deadlock issues— they are usually uncovered by code reviews, adept system testers, or luck. To understand why, you need an intuitive feel for the reaby P.J. Tanzillo, National Instruments sons behind deadlock. Imagine that you and I both want to make pasta for dinner. panies providing solutions now We both need a kitchen, ingredients, water, ation into products, technologies and companies. Whether your goal is to research the latest a pot and a spoon. If we were to test our pastacation Engineer, or jump to a company's technical page, the goal of Get Connected is to put you making ability in separate kitchens, after debugging the recipe, et’s start by looking at the facts. Medical device recalls ce you require for whatever type of technology, we should have no problems at all. However, the moment we try reached an all-time high in 2008—up 43 percent from 2007. es and products you are searching for. The experts at the Food and Drug Administration (FDA) have to share the same kitchen, problems can arise because we are narrowed the primary causes to two main sources—poorly manu- contending for the same resources (spoons, pots, registers) in a factured raw materials and poorly developed software. Most of single kitchen (processor core) to concurrently make two batches the allegedly tainted materials are manufactured overseas, so to of pasta. This is deadlock, and it’s easy to see how it emerges address this issue the FDA has opened several new offices world- outside of traditional, logical testing. wide, including three in China. The software issue is far more Now let’s look at the same issue, instead using an FPGA difficult to address, however, and as the number of lines of code to implement the design. Here, “processes” that are independent in devices increases, the problem will only worsen (Figure 1). have their own physical circuitry on the FPGA, and therefore, Without line-by-line scrutiny by the FDA, the burden of safety there are no shared resources. On each clock tick, combinatorial shifts to you, the medical device designer. With ever increasing logic latches in each circuit, and values are stored in separate regpressure to get your device to market, how are you to manage isters. No deadlocking can occur, because neither process relies quality of an ever growing code base? on the other’s resources. This allows you to put much more faith Get Connected There is a potential solution to this problem, but it’s not only in the results of simulation and unit testing, since other unknowns with companies mentioned in this article. in more www.rtcmagazine.com/getconnected testing, code reviews and structured development pro- like resource contention are no longer an issue. Returning to our cess. Instead, you could write less software and push more of the pasta analogy, this would be the equivalent of giving each of us logic into hardware elements like application-specific integrated our own kitchen containing only the utensils that we would need to cook our meals. Once we know that we have everything that we need, no scheduling anomaly can pop up to stop us. Get Connected with companies mentioned in this article.
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system integration
output to the SPI driver but the SPI driver crashes, then obviously there is a problem. If you then decide to modify the SPI driver, you need to validate the entire software stack again. This can become very cumbersome, and the delays can compound and cause your schedule to slip In the case of an FPGA, there is still the concept of external IP (commonly called IP cores), and your use of this IP needs to be validated just like software IP. However, once you have validated all of your use cases, you can have confidence that it will behave as expected when integrated with other components. Let’s look at our FFT example again. If you used an FPGA, you would acquire or generate an FFT IP core and validate its numerical correctness for your use case—this is the same as with the software. However, the risk of intermittent failure decreases drastically because the middleware has been removed. There is no longer an RTOS, and the SPI driver is its own IP core whose operation does not directly affect the FFT. Furthermore, if you modify the SPI driver implementation, there is no need to revalidate the unaffected areas of the system. Figure 1 The FDA does not validate source code. Rather, they validate the process that you use to develop the code. This shifts the burden of safety to the maker of the device.
Middleware
When developing embedded software, you almost never implement every line of code from scratch. Instead, various tools are available to make the firmware designer more productive; these range from simple drivers to network stacks to operating systems and even code generation tools. Though these systems are generally well tested individually, no real-world software is bug-free. With so many possible combinations of tools and libraries, the likelihood of your using components together in a novel way is relatively high. For this reason, the FDA mandates that for all off-the-shelf software used in medical devices, you need to validate that the software stack works for your specific use case. What does that mean? Well, say that you are using a signal processing library that contains a fixed-point fast Fourier transform (FFT), and you are detecting the presence of a certain frequency component. You do not need to validate that the FFT returns the correct answer for all possible inputs, but rather you need to validate that it returns what you expect for all valid inputs according to your specifications. For example, if you are detecting only human audible tones, there is no reason to test that the function returns correct values for inputs over 20 kHz. Unfortunately, as we learned here, software components that seem independent are not necessarily so. Therefore, if you are using that software stack with an SPI driver with a real-time operating system (RTOS), you need to validate all of these components together to have confidence in the FFT. If the FFT passes a valid
Buffer Overflow
Most of us know about buffer overflow through cryptic hacker exploits and subsequent Microsoft patches, but this is also a common error when developing embedded devices. Buffer overflow occurs when a program tries to store data past the end of the memory that is allocated for that storage, and it ends up overwriting some adjacent data that it shouldn’t. This can be a really nasty bug to diagnose, since the memory that was overwritten could be accessed at any time in the future, and it may or may not cause obvious errors. One of the more common buffer overflows in embedded design is a result of high-speed communication of some sort—perhaps from a network, disk, or A/D converter. When these communications are interrupted for too long, their buffers can overflow, and these need to be accounted for to avoid crashes. This can be helped by an FPGA in two ways. In one example, the FPGA can be used to manage a circular or double buffered transfer, and it can offload that burden from a processor. In this case, the FPGA serves as a coprocessor that reduces the interrupt load on the processor. This is a common configuration, especially among high-speed A/D converters. In a second example, the FPGA can be used as a safety layer of protection where all of the patient-facing I/O is routed through the FPGA before it gets to the processor. In this case, you can add additional safety logic to the FPGA so that your outputs can be placed in a known and safe state in the event of a software crash on the processor. In this case, the FPGA serves as a watchdog, and correctly implemented logic ensures that the patient risk is lowered despite a software failure. With the architectural decision of placing an FPGA in the primary signal chain, these two methods can be combined to guard against buffer overflow and to better handle it if it does occur (Figure 2). In the end, we’re really discussing the differences between RTC MAGAZINE OCTOBER 2009
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Ethernet MAC
Processor GPIO
12C
LED/DIP Fuse
110 DIO
NI C Series I/O
FPGA
Custom I/O
DMA ASIC
DIO
DDR SDRAM
UART
5 V Tolerant DIO
Ethernet Phy
PC1/LocalBus
Disk on Chip
Memory
LED/DIP
Pc1/ LocalBus
UART
DIO
Custom I/O
Configuration Flash Power Supply Inerface
RTC Battery
Onboard ADC, DAC, 24 V DIO
Figure 2 This example is taken from a single-board computer used in the development of a multi-modal medical imaging system. Here, an FPGA is located in the primary signal chain to guard against buffer overflow and provide a redundant safety system.
implementing components in software versus hardware. Both are necessary in almost all electronic medical devices, and the balance between the reliability of hardware and the flexibility of software must be struck for every system uniquely. However, when developing safety-critical systems like medical devices, the complexity and flexibility delivered by software can have an adverse effect on the safety of the device. Maybe the FDA says it best in Section 3.3 of the guidance titled “General Principles of Software Validation,� which states the following:
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Another related characteristic of software is the speed and ease with which it can be changed. This factor can cause both software and non-software professionals to believe that software problems can be corrected easily. Combined with a lack of understanding of software, it can lead managers to believe that tightly controlled engineering is not needed as much for software as it is for hardware. In fact, the opposite is true. Because of its complexity, the development process for software should be even more tightly controlled than for hardware, in order to prevent problems that cannot be easily detected later in the development process.
Software will always be a part of electronic medical devices, and as devices become more sophisticated, this software will naturally become more complex. Thanks to FPGAs and ASICs, you can reduce the impact of this complexity by implementing more features in hardware, therefore eliminating some of the most common errors in embedded software design. National Instruments Austin, TX. (512) 794-0100. [www.ni.com].
4/7/09 9:44:07 AM
Attend one of our complimentary, technical and educationally-focused seminars, workshops, keynotes and exhibits. The events focus on the latest technologies from industry leaders and are demonstrated in breakout sessions and in the exhibition hall. RTECC is coming to an area near you... we invite you to attend ~ and be our guest for a complimentary lunch and parking, as well!
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INDUSTRY
WATCH FPGAs
Embedded FPGA Processing Platforms: Customization Meets Performance Today’s advanced FPGAs offer the possibility of implementing multiple soft processors in the FPGA fabric or alternatively using hard-wired CPUs embedded in the fabric. There are design considerations for each choice and also for a combination of the two. by Glenn Steiner and Dan Isaacs, Xilinx
Embedded processing with field programmable gate arrays (FPGAs) combines the ultimate in customization and scalable performance. Their ability to adapt and quickly respond to changing system requirements provides significant advantages across a broad range of applications. Simply put, FPGAs are general-purpose platforms upon which developers can develop customized single or multiprocessor systems. Discrete off-the-shelf processor ASSPs or ASIC-based devices have a fixed selection of processor(s), peripherals and performance. With the embedded processing capability in FPGAs, whether using integrated hard processor blocks or configuring FPGA fabric as soft processing blocks, developers can tune systems to meet their specific application requirements. FPGAs are not constrained by predefined system architectures and are inherently programmable and configurable. In effect, they can achieve the perfect balance between a processor performing command and control functions and FPGA logic capable of high-performance data processing.
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Soft Processor 3
Soft Processor 3
Soft Processor 2 Soft Processor 1
Soft Processor 2 Soft Processor 1
Soft Processor 4 Soft Processor 5 Soft Processor 6
Figure 1 FPGA Soft Processors for Motor Control Enable Extensible Robotics Architecture.
Build Your Custom FPGA Processor
For embedded systems, performing certain software tasks in hardware can be expensive in terms of the logic devices required. Conversely, performing some hardware tasks in software can be too slow to meet system specifications. With FPGA-based processors, developers have the built-in flexibility to create entire systems in a single device and make architectural trade-offs as needed between feature mix, performance and cost.
Typically, developers choose the silicon device based on system price/performance goals. Next, they implement one or more customizable soft processors and/or depending on device selection, choose to utilize an integrated hard processor core based on the desired level of performance. They then select only the peripherals and memory configuration needed to meet the design requirements. Further optimizations can be made, such as adding a soft floating point unit (FPU) or creating custom peripherals to accommodate system requirements. With a soft processor, de-
INDUSTRY WATCH
velopers can also optimize the CPU core architecture itself. Developers can also choose to maximize system performance by implementing accelerated software instructions in the FPGA hardware (fabric logic). These custom coprocessing engines are used to offload compute-intensive and/or complex repetitive tasks to accelerate processing. FPGA-based coprocessing acceleration methods have been shown to provide five to greater than twenty times the performance than can be achieved by rewriting software code. Experience tells us that code optimization typically provides only small incremental improvements in performance.
Soft FPGA Processors: Have it Your Way
Soft FPGA processors deliver configurability and portability so products can get to market faster and stay in the market longer. Implemented using general-purpose logic, soft processors utilize the flexible FPGA fabric at the silicon level and are readily combined with customizable intellectual property (IP) to meet performance, capability and cost targets. Developers can create a highly flexible, configurable processing system that is optimized for system-level performance at the lowest cost, all within a single device. First, they select and configure IP for the optimal balance of feature, size and cost. They can also integrate custom logic and continually modify and finetune the system architecture throughout the development cycle, even accommodating late-arrival change requests. Because soft processors are easily adapted for new features or standards, they mitigate the cost and market risk associated with product obsolescence. Soft processors are highly flexible because they are implemented using the programmable logic primitives (cells) of the FPGA. They can be instantiated numerous times in a single device and cover a range of performance and price points.
Image Processing & Control Unit
To External Display Unit
Camera Head Unit
Ethernet Interface
Figure 2 Multiple FPGA hard processors provide video image acquisition, processing and communication to remote host for display.
With code compatibility from one product to the next and from one generation to the next, soft processors protect and preserve investments in application code. Soft processors are customizable with processing elements that can be configured to the exact needs of the embedded application, effectively scaling processor performance and size. Such elements include barrel shifter, divider, multiplier, instruction and data caches, FPU, hardware debug logic, and interfaces for connecting standard or custom peripherals. Some soft processors also offer optional virtual memory and memory protection support, so larger applications and multiple programs can run on powerful operating systems such as Linux. These capabilities make soft processors especially well suited to applications requiring robust security and reliable software development. They also support program swapping techniques, which enable soft processors to execute operations with less physical memory, thereby reducing costs and power consumption. Code acceleration is also possible with soft processors using custom coprocessing engines (hardware accelerators). These are connected via a high-speed data path to and from the soft CPU, typically either by bus interface or point-to-point link. Bus-based accelerators are simpler from a system interface perspective. They are ideal for sharing large blocks of data
via a common memory, and the accelerators look just like standard peripherals. However, performance can be reduced due to contention issues with buses shared by multiple masters. Point-to-point interfaces such as the MicroBlaze Fast Simplex Link (FSL) or the PowerPC Auxiliary Processor Unit (APU) enable low-latency data streaming to and from the processor, and data can be transferred between the FPGA and processor via one or more high-performance dedicated channels. These channels can be as simple as FIFO interfaces connecting directly to the processor data pipe. In terms of design considerations, soft processor cores take up area in the FPGA and must be synthesized and mapped to the FPGA. Fortunately, design tool advancements and common software platforms have greatly simplified the implementation process with predefined device drivers and protocol stacks, automated wizards and board support packages, etc. In addition, pre-assembled systems (base reference designs) utilizing prevalidated peripherals and memory controllers available in IP libraries that come with some development tools enable engineers to start with an ASSP-like solution and fully customize the processor based on product needs. As an example application, consider a multi-axis robotics system where each motorized robotic joint is controlled by RTC MAGAZINE OCTOBER 2009
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INDUSTRY WATCH
a dedicated soft processor. Doing so, distributes the processing load. To eliminate latency and simplify code, the design uses one processor per joint. The processors are replicated with each assigned to a joint axis. In this scenario, as illustrated in Figure 1, a small system might have three joints and three processors, while a more capable system might have six joints and six processors. Air Data Attitude Heading GPS Position ... Engine Data Control Feedback
Soft Procssor Sensor Processing
data throughput and performance of IP; • simultaneous I/O and memory access maximizing data transfer rates; and • high performance dedicated memory controller interface with the flexibility to connect to vendor-provided or custom memory controller. Of course, horsepower is king. Em-
Hard Processor Navigation Solution
Hard Processor Flight Control
Soft Procssor Sensor Processing
Figure 3 Single FPGA Multiprocessor System for UAV Navigation and Flight Control
Hard FPGA Processors: Maximum Performance
Hard FPGA processors are implemented at the transistor level in the silicon device to deliver maximum speed and performance. When combined with FPGA-based soft coprocessing, these hard-coded, dedicated embedded cores offer a wide range of performance optimization options. Integration is the key with hard core processors. A fully integrated hard processor and data switch can provide higher processing performance than soft processors while dramatically reducing system latency. Current-generation hard FPGA processors provide extraordinary levels of system integration that result in significantly higher performance and lower overall system cost with such features as: • high-throughput non-blocking switch matrix (crossbar) enabling point-to-point connectivity with reduced latency; • integrated bus interfaces with dynamic bus sizing capabilities for connecting soft peripherals; • dedicated direct memory access (DMA) engines to maximize the
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bedded cores such as the PowerPC 440 processor can be clocked at 550 MHz, achieving up to 2200 DMIPS (1100+ DMIPS per processor) with the latest generation of FPGAs, operating at frequencies over twice those achievable by soft processors and with a significantly reduced footprint. This highly pipelined processor allows multiple transactions to take place simultaneously for more efficient instruction execution and data transfer. In addition, hard processors provide extremely efficient memory and bus access with two-fold larger instruction and data caches than previous generations and 128-bit data-bus width in the crossbar. Like soft processors, hard FPGA processors also support the integration of custom coprocessors. In the case of the PowerPC processor in Xilinx Virtex FPGAs, code acceleration is supported by a tightly coupled APU interface to the execution unit of the processor. The 128-bit APU interface enables quad word transfers in a single instruction, so CPU-intensive operations such as image, signal and vector data processing can be efficiently offloaded. An optional FPU implemented in the soft logic FPGA fabric can also be integrated, oper-
ating at up to half the frequency of the hard embedded processor. Unlike soft processors, hard cores do not require logic synthesis. Designers don’t have to worry about mapping, placement and routing of the hard processor core. These are important design considerations when iterations are of major concern. Hard processors take less silicon area for a given function than soft processors, thus yielding a lower system-level cost. By way of application example, medical imaging systems typically require the use of multiple hard processors to meet the performance requirements for data processing and image transfer. Depending on the system-level requirements, functional partitioning can be accomplished in several different manners. In one example, the first processor would be responsible for image acquisition from a remote camera head along with performing calibration and control of the camera unit. In addition to image acquisition, this processor passes the parsed image to a second processor for filtering, distortion correction and image enhancement. The processed image would then be sent to an external host system for display. The second processor would also run an operating system responsible for system-level management and data communications to the external host, including managing multiple Gigabit Ethernet channels with TCP/IP acceleration. In this scenario, processor size, task complexity and performance goals, as well as response time requirements, dictate the need for multiple hard processors. Figure 2 illustrates a system-level view in which the FPGA is using multiple hard processors.
Complementary by Design
While soft and hard FPGA processors each have their unique advantages, they are also complementary and can coexist in a design to provide greater levels of integration and parallelism. For developers, the benefits of utilizing both soft and hard cores for embedded processing are definitely worth considering and include optimal hardware and software functional partitioning to maximize parallelism along with a unified architecture and mechanism for migrating IP across hard and soft processors. In addition, they offer tighter integration between control pro-
INDUSTRY WATCH
cessor and slave processors to reduce latency (e.g., minimize latency between commands and joint movement in the multi-axis robotic example). For vendors, the benefits are also numerous. Complementary hard and soft processor offerings can be delivered with a predictable and intelligently optimized set of domain-specific technologies, methodologies and targeted design platforms to enable faster design and more innovative embedded processing applications. To further demonstrate the complementary nature of hard and soft FPGA processors, let’s explore the application of an unmanned air vehicle (UAV) as illustrated in Figure 3. Flight management functions are divided into navigation and flight control. Each subsystem relies on a variety of sensor inputs to provide the necessary data or control for successful flight operation. Soft processors can be used to collect, integrate and format sensor data relating to attitude, heading, altitude, airspeed and GPS position for the navigation computer. However, the added complexities of dealing with missing or erroneous sensor data (requiring sophisticated algorithms such as Kalman filtering) and navigating to avoid terrain and obstructions are better suited to the higher performance of a hard processor. Likewise, when it comes to flight control functions, the use of both hard and soft FPGA processors is recommended. Soft processors collect, integrate and format sensor input for the flight control processor, including engine data (fuel flow, oil temperature, turbine temperature, etc.) and feedback data from control actuators. The hard processor performs the heavylifting functions, such as processing navigation data with flight control sensor data to compute the pitch, roll, yaw and thrust of the UAV. For both the soft and hard processors, it is also possible to offload computational functions in a coprocessor. By using multiple processors in FPGAs, all navigation and flight control functions can be retained within a single device to decrease board space, reduce system costs and increase overall system reliability.
What It Means To You
Embedded processors in FPGAs provide highly flexible and customizable
platforms. Developers can rapidly scale the performance, capabilities, and cost of processing systems to meet their application requirements. Soft and hard core options permit the creation of optimized computational sub-systems all within a single part. Their extensible processor architectures support the integration of soft computational elements such as floating point units and configuration
of the exact mix of peripherals and features needed for the target application. Computationally critical tasks can be offloaded to coprocessors in the same FPGA to avoid software bottlenecks. Xilinx San Jose, CA. (408) 559-7778. [www.xilinx.com].
Extreme performance across the board. NEW! XV1™ (Quad-Core Intel Xeon-based VME SBC) • Quad-Core Intel® Xeon® 2.13 GHz processor • Up to 8 GB ECC DDRII SDRAM memory • CompactFlash™ slot • Up to two mezzanine slots on board • Up to three Gigabit Ethernet ports • Four USB ports and three SATA II ports • VITA 41 compliant • Solaris™ 10, Linux® and Windows® support • Up to 30G shock
TC2D64™ (Intel Core 2 Duo-based VME SBC) • 1.5 GHz and 2.16 GHz Intel® Core™ 2 Duo Processors • Up to 4 GB ECC SDRAM Memory • CompactFlash • Two Gigabit Ethernet ports • Two SATA ports When your mission-critical • Up to four PMC slots • On-board graphics controller applications require high • Four USB and four serial ports performance, turn to Themis SBCs. • Solaris 10, Linux and Windows support • Up to 30G shock
In mission critical applications, there’s no substitute for high performance. The Themis family of single board computers includes Quad-Core Intel Xeon with the Intel 5100 MCH San Clemente chipset, also Penryn compatible, in addition to our leading UltraSPARC® products on VME and CompactPCI. So we can support applications in Solaris, Windows, Linux and UNIX®. All Themis products offer maximum configuration flexibility and life cycle support for your technology refresh cycle process, reducing your Total Cost of Ownership. So when mission success depends on higher performance, you can rely on Themis. Across the board. www.themis.com (510) 252-0870
Transformational. © 2008. Themis Computer, Themis, Themis logo, TC2D64 and XV1 are trademarks or registered trademarks of Themis Computer. All other trademarks are property of their respective owners.
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products &
TECHNOLOGY FEATURED PRODUCT ATCA SBC with Dual Xeon 5500s, 64 Gbyte RAM to Improve Network Throughput
A new ATCA single board computer is designed for demanding telecommunications networks where it will enable significantly faster network performance than is currently possible. Typical applications include Control Plane functions for WiMAX, LTE (Long Term Evolution) and NGN (Next Generation Networks) networks. The A10200 ATCA SBC from GE Fanuc Intelligent Platforms features two Intel Xeon Nehalem 5500 Series dual or quad core processors and up to 64 Gigabytes of DDR3 SDRAM memory, and it delivers a combination of unsurpassed performance and low power dissipation. For LTE applications, the A10200 is suited for Mobility Management Entity (MME) and Home Subscriber Server (HSS). MME has a stringent requirement for user handover latency, and the A10200 with its multiple processing cores, faster and less contentious memory interfaces and high-speed Ethernet connectivity options is well suited for this application. HSS holds the subscriber database and requires fast and reliable storage options, which the A10200 offers in the form of dual SAS drives. More demanding storage needs can be addressed by the use of a customized Rear Transition Module (RTM) using dual Fibre Channel interfaces. For NGN networks, the A10200 is well suited for media gateway controller (MGC) and multiple service layer servers. MGC, also known as a SoftSwitch, is at the center of the NGN architecture and is required to maintain the call state for every call in the network. It is tasked to perform call control, gateway access control, resource allocation, authentication, charging and so on. All these functions greatly benefit from multiple cores, 64 Gbytes of memory and dual high-performance SAS storage. Keys to the performance of the A10200—which is optionally available as a single processor platform—are the size of its memory and the implementation of an asymmetric multiprocessing (AMP) architecture. The provision of 64 Gbytes of memory allows the storage of larger routing tables in main memory, reducing the number of time-consuming routing table swaps between main memory and the database because needed routing information is missing. The A10200’s Asymmetric Multiprocessing Architecture means that each processor has its own memory bus and access to its own (up to 32 Gigabytes) memory, reducing the processing overhead caused by contention and bus sharing in platforms using Symmetric Multiprocessing Architecture (SMP). Also contributing to the A10200’s leading-edge performance is its support for multiple Gigabit Ethernet and 10 Gigabit Ethernet interfaces, together with a Gigabit Ethernet maintenance port for remote management and trouble-shooting. The A10200 benefits from its implementation of Intel’s new 82599 Ethernet controller, which includes a new 40 Gigabits/second PCI Express interface and the ability to deliver up to a 250% improvement in network throughput. Furthermore, the 82599 controller has sophisticated load sharing features allowing it to direct incoming Ethernet packets to a specific core within a specific processor based on hashed packet header values. This feature enables much higher data throughput due to parallel processing and is very valuable for systems using virtualization. The software package provided with the A10200 includes standard BIOS, device driver, and the hardware initialization resources required to support Linux environments. An optional run-time BIT (Built-In Test) application package will also be available GE Fanuc Intelligent Platforms, Charlottesville, VA. 800) 368-2738. [www.gefanucembedded.com].
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OCTOBER 2009 RTC MAGAZINE
Rugged MPEG4-Compression PMC—A High-Definition Video Interface Module
A new MPEG4/ H.264 highdefinition video capture/compression PMC interface card provides hardware accelerated MPEG4/H.264 compression using low-power ASIC technology. The rugged conduction-cooled PMC-281 from Curtiss-Wright Controls Embedded Computing joins the recently introduced XMC-280 JPEG2000 compression module, and the earlier Orion PMC, to expand the company’s embedded COTS video compression capabilities. Designed for demanding military applications, the PMC-281 facilitates the design of video distribution and/or recording in applications such as military systems that provide situational awareness. The PMC-281 supports two channels of MPEG4/H.264 video compression at resolutions up to 1920x1080 facilitating the distribution of multiple channels of high-definition video over standard Gigabit Ethernet (GbE) networks and storage on modestly-sized media. Its industrystandard PMC form-factor enables it to be rapidly deployed in a variety of system types such as PCs, rack-mount systems and conductioncooled enclosures. Key features include two video Inputs (each can be Digital DVI, Analog RGB or PAL/ NTSC composite) and support for one channel of 1080p60 or two channels of resolutions up to and including 1080i60. There are also two DVI-D digital outputs. The module supports compression and decompression using H.264 baseline and main profile up to L4.2 (MPEG4 Part 10/AVC) and offers support for both 4:2:2 YUV video coding. It is available at Curtiss-Wright Controls Level 0 and conduction-cooled Level 200 environmental specifications. The PMC-281 is supported on Intel x86 and Power Architecture hosts under Windows, Linux and VxWorks operating environments. Pricing starts at $3,500. Curtiss-Wright Controls Embedded Computing Leesburg, VA. (613) 254-5112. [www.cwcembedded.com].
PRODUCTS & TECHNOLOGY
800 kHz per Channel, Simultaneous USB Data Acquisition Module
A multifunction, high-throughput, simultaneous USB data acquisition module allows the user to sample six analog input channels independently at up to 800 KHz per channel. The DT9816-S from Data Translation is the latest addition to the ECONseries of USB data acquisition modules, providing a flexible yet economical series of multifunction data acquisition products. In addition to an extremely high throughput rate of up to 800 KHz per input channel, the DT9816-S offers a full set of features including 8 digital input lines, 8 digital output lines and a 16-bit counter/timer. In addition to simultaneously sampling inputs at throughput rates up to 800 KHz per channel or 4.8 MHz total throughput across 6 channels, the DT9816-S, provides a 16-bit resolution analog input subsystems with signal sampling ranges of +/-10 V and +/-5 V. Event counting is supported with one 16-bit counter/timer and eight digital input and eight digital output lines support monitoring and control. The unit runs off a standard USB connector and is housed in a shielded, rugged enclosure for noise immunity. The DT9816-S ships with free software allowing users to get up and running quickly. Users can develop their own software in a variety of languages, or use one of Data Translation’s ready-to-measure applications, including Measure Foundry, a drag and drop test and measurement application. The DT9816-S is priced at $595.
Ad Index
Data Translation, Marlboro, MA. (508) 481-3700. [www.datatranslation.com].
VME Board Solution for Synchronization and Distribution of Timing Signals
Developers often need to synchronize large number of multiple channels to satisfy their system requirements. For larger systems, this means delivering timing signals to multiple boards and even multiple chassis. Examples are applications such as radar beamforming, direction finding and shipboard diversity reception and cellular wireless applications where multiple antennas are used to steer and/or improve the reception of signals. Users can typically synchronize two, three or four boards by joining the timing signal connectors with a ribbon cable. In this case, one board acts as a driver and the other modules as receivers. But as systems grow larger with more channels and more than four modules, a product such as the 6891 becomes essential. The Model 6891 VME board from Pentek accepts clock, sync, gate and trigger signals as inputs, and delivers buffered versions of these signals to other modules in the system to ensure synchronous sampling and data collection across all connected modules. The 6891 provides up to eight timing signal cables fully compatible with the multi-pin front panel timing signal connectors found on all recent Pentek PMC modules. Using this strategy, up to eight modules can receive a common clock up to 500 MHz along with timing signals. For larger systems, up to eight 6891 VME boards can be linked together providing synchronization for 64 I/O modules producing systems with up to 256 channels. With the 6891, loading is no longer an issue because each board is driven over a dedicated timing signal cable by one of its eight dedicated drivers. What’s more, passing the clock, sync, gating and trigger signals through individual cables guarantees better performance due to improved delay matching. From the standpoint of economy of packaging, the 6891 occupies a single VME slot. It often eliminates the need for a custom external timing signal generator chassis, providing a more compact and less expensive system solution. The 6891 requires no additional software. The modules connected to the 6891 board are already fully supported by ReadyFlow board support packages for Linux, VxWorks and Windows operating systems. Pricing starts at $3,995, which includes free lifetime support. Pentek, Upper Saddle River, NJ. (201)818-5900. [www.pentek.com].
Get Connected with technology and companies providing solutions now
Get Connected is a new resource for further exploration Selection of Rear Transition Module into products, technologies and companies. Whether your goal Solutions for Various Backplanes is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.
www.rtcmagazine.com/getconnected
Get Connected with technology and companies prov
Get Connected new resource foravailable further exploration into pro A range of rear transition modulesis a(RTM) is now datasheet from a company, speak directly with an Application Engine in VPX, VME64x, VME, CompactPCI and custom architectures. in touch with the right resource. Whichever level of service you requir These products from Elma Bustronic are designed for various Get Connected will help you connect with the companies and produc
standardized or custom systems in military/aerospace, medical, www.rtcmagazine.com/getconnected industrial, communications and energy markets. An RTM brings I/O signals out the rear side of the backplane. By directly plugging into the backplane, the RTMs offer higher resistance to shock and vibration as compared to a ribbon cable connection style. Possible sizes include 3U x 80 mm, 6U x 80 mm, 8U x 80 mm and more depending on architecture. The modules come with or without injector/ejector handles. These handles help the board lock securely into place and the panel provides attractive aesthetics. Bustronic has developed a wide range of custom RTM solutions as well as standard architectures. Bustronic also offers contract assembly and design services for various form factor extenders, Getboards, Connected with companies andadapters, system monitors andproducts more. featured Pricinginfor thisRTMs section.starts under $1,000 depending www.rtcmagazine.com/getconnected on volume and type.
Products
Elma Bustronic, Fremont, CA. (510) 490-7388. [www.elmabustronic.com].
Get Connected with companies and products featured in this section. www.rtcmagazine.com/getconnected
RTC MAGAZINE OCTOBER 2009
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PRODUCTS & TECHNOLOGY
2U Acceleration Platform Supports Eight PCIe x16 Gen 2 I/O Cards in 21” Deep Chassis
A 2UPCI Express acceleration platform supports up to eight PCIe x16 Gen 2 I/O cards. There are three versions of acceleration platforms that include either one or two PCIe x16 Gen 2 interfaces, allowing more than one host computer to access cards. Host cable adapters and one-meter cables are included with the platform. The 2U platform supports both single-wide and double-wide boards. Dual 850-watt power supplies provide redundant power for graphics processing units (GPUs) or other high-speed I/O cards requiring high power output. The platform is equipped with superior cooling and an internal system monitor that reports parameter status through an Ethernet port on the rear of the enclosure. The 21” chassis is 8” shorter than other conventional chassis currently available. In addition, all boards are accessed through the rear of the chassis, allowing cables to be connected to I/O ports. Removable trays allow easy installation of any full-length PCIe x16 add-in boards. The enclosure top is held by a single thumbscrew in the rear of the chassis, making it easy to remove. With the trays removed, boards can be installed in the slots and the tray re-inserted in the chassis. The three versions of the 2U accelerator are the “4-1” (OSS-PCIe-2U-ENCL-EXP4-1), which supports four doublewide cards with a single PCIe x16 interface, the “-4-2” (OSS-PCIe-2U-ENCL-EXP-4-2) supporting four doublewide cards with two PCIe x16 interfaces, and the “8-2” (OSS-PCIe-2U-ENCLEXP-8-2) supporting eight singlewide cards with two PCIe x16 interfaces. OEM volume pricing starts at $2,395. One Stop Systems, Escondido, CA. (877) 438-2724. [www.onestopsystems.com].
6U CompactPCI SBC Features the Freescale MPC 8572E
A new 6U CompactPCI board based on the Freescale MPC8572E, scales from commercial to full-blown military (conduction-cooled) applications. Targeting Freescale Semiconductor’s dual-core MPC 8572E PowerQUICC III processor, the XCalibur1501 from Extreme Engineering is designed for commercial, industrial and military system architects demanding high processing performance with low power consumption. In addition to the Freescale MPC 8572E PowerQUICC III processor with dual e500 Power Architecture cores running at up to 1.5 GHz, key features include two channels of up to 4 Gbytes of DDR2-800 SDRAM with ECC and up to 4 Gbytes of NAND flash along with 256 Mbytes of NOR flash. The board has a PICMG 2.16 backplane Gigabit interface, two SATA 3.0 Gbit/s ports, three USB 2.0 ports and two PrPMC/XMC interfaces. Operating system software support includes a Green Hills Integrity Board Support Package (BSP), a Wind River VxWorks BSP and a QNX Neutrino BSP, and additionally a Linux LSP. The company offers guaranteed 4-hour technical response to all hardware and software questions. Pricing starts at $4,495 and may vary based on processor speed, memory configuration and ruggedization level. Extreme Engineering, Middleton, WI. (608) 833-1155. [www.xes-inc.com].
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PRODUCTS & TECHNOLOGY
6U VME/VXS Signal Generator Boasts Eight 14-bit Channels at 1.2 GSPS
A new FPGA-based multichannel signal generator offers eight 14-bit synchronized data streams at 1.2 Gsample/s analog outputs from an FPGA-based board utilizing three Xilinx Virtex 5 FPGAs in a single 6U VME / VXS slot. The Charon-V5 from Tek Microsystems uses the highest performance commercially available DAC (digital to analog converter) devices, enabling enhanced performance for multichannel signal generation applications such as beam-steering and simultaneous multi-signal generation for communications and Radar systems. The Charon-V5 uses the 1.2 Gsample/s Analog Devices AD9736 14-bit DAC to generate multiple signals at bandwidths of up to 600 MHz with improved spectral purity, thereby enabling higher system performance than ever before. When Charon-V5 is paired with the company’s Atlas-V5 product, multichannel data acquisition and response systems can be developed with very low latency and digital signal processing capability. The eight 14-bit DAC digitizer channels are Znx Virtex-5 FPGAs in a single VME/VXS payload slot. The front end FPGAs are typically two SX95T devices generating eight channels of analog output data coupled with a back-end FPGA for multichannel processing and backplane communications. To meet application requirements, the back-end FPGA can be configured with any Xilinx Virtex-5 FPGA in the FF1738 package, including the SX240T with over 1,000 DSP48E slices for signal processing applications. In addition to the analog outputs, there are six high-speed serial fiber or copper I/O channels on the front panel as well as fabric and network connectivity via the optional P0 VXS backplane connector. The Charon-V5 includes hardware support for sample-accurate synchronization both within a single card and across multiple cards, allowing Charon-V5 to support high channel count applications such as beam steering with up to 144 channels in a single VXS chassis. As a part of the QuiXilica-V5 product family, Charon-V5 benefits from a common set of hardware, firmware and software elements that are Get Connected technology and reused across multiple products and applications. Through the Charon-V5 Developers Kit (DK), systems integrators can access with a comprehensive set companies providing now of building blocks along with reference designs such as the arbitrary waveform generator included with the Charon-V5 to supportsolutions rapid development Get Connected is a new resource for is further and integration of application-specific signal processing within the QuiXilica-V5 framework. Like all of the QuiXilica-V5 products, the Charon-V5 avail-exploration into products, technologies and companies. Whether your goal able for a wide range of operating environments, including rugged air- and conduction-cooled versions for deployed applications. is to research the latest datasheet from a company, speak directly TEK Microsystems, Chelmsford, MA. (978) 244-9200. [www.tekmicro.com]. with an Application Engineer, or jump to a company's technical page, the
Ad Index
Rugged 6U VPX XMC Carrier Card for up to 30W per XMC
A rugged 6U VPX XMC carrier card is designed to enable system architects and integrators to include a broad range of high-performance XMCs in their designs. The PEX441 from GE Fanuc Intelligent Platforms is specifically optimized for thermal performance, with the capability to enable power densities of up to 30 watts per XMC. One or two XMCs can be accommodated. Typical XMC applications will include system I/O, FPGA processing, graphics and digital/analog and analog/digital interfaces. The PEX441 supports a broad range of flexible I/O options, allowing systems designers a choice of switched fabric topology. The PEX441 is available in five build levels, providing a cost-effective choice between platforms for benign environments through to systems that will be deployed in harsh environments. It is optionally compliant with the VITA 48/REDI specification for rugged systems. Designed to support leading-edge XMCs, the PEX441 allows system designers to migrate their XMC laboratory systems to a rugged, deployable 6U VPX form factor in order to exploit the full complement of high-speed digital I/O available through a standard VPX backplane. It extends the functional envelope of a 6U VPX system by leveraging an array XMC modules into a distributed, fabric-based architecture, removing the need to host high-power mezzanines on high-power CPU cards. Thermal load can be spread across multiple system slots for both air- and conduction-cooled applications supporting high compute density. The PEX441 is part of a growing GE Fanuc 6U VPX product family that includes the SBC610 and SBC620 single board computers, the DSP230 quad processor and AXIS, the Advanced Multiprocessor Integrated Software development environment. For systems that require both PMC and XMC support, GE Fanuc offers the PEX440, which includes an onboard PCIe switch architecture with connection to the primary fabric plane. GE Fanuc Intelligent Platforms, Charlottesville, VA. (800) 368-2738. [www.gefanucembedded.com].
goal of Get Connected is to put you in touch with the right resource.
Whichever level of service you require for whatever 100-150W External Power Supplies Meet Newtype of technology, Get Connected will help you connect with the companies and products Energy Efficiency you areStandards searching for.
A new range www.rtcmagazine.com/getconnected of AC-DC external power supplies with models rated from 100 to 150 watts meets the latest Energy Star, EISA and CEC standards. The DT100-C and DT150-C series from TDKLambda features active PFC (meets EN61000-3-2) and GetoperConnected with technology and companies prov ates from a universal ACGet input of Connected is a new resource for further exploration into pro 90 to 264 Vac (47-63 Hz). Availdatasheet from a company, speak directly with an Application Engine in touch12V, with the right resource. Whichever level of service you requir able output voltages include Get48V. Connected will help you connect with the companies and produc 16V, 19V, 24V, 36V and www.rtcmagazine.com/getconnected These external power supplies are packaged in an insulated compact and lightweight enclosure measuring 3.35” wide by 6.7” long by only 1.73” high and are convection cooled (no fans needed). The operating temperature range is 0 to +40°C with no derating required. All models are fully isolated (3 kVac, input to output) and meet the Energy Star 1.1 and the California Energy Commission (CEC) level IV efficiency standards. Plus, models with outputs of 24V to 48V meet the Energy Star 2.0 version level V standards. These units include overvoltage and short-circuit protections and off/no-load standby power consumption of less than 0.50 watt as required by the green energy initiatives. In addition, these series inGet Connected international with companies and clude UL/EN/IEC60950-1 safety agency certifications products featured in this section. and meet EN55022-B and FCC Class B conducted and radiated EMI www.rtcmagazine.com/getconnected standards. The DT100-C and DT150-C series are available now and priced from $40.50 each in OEM quantities.
Products
TDK-Lambda, San Diego CA. (619) 575-4400. [www.us.tdk-lambda.com]. Get Connected with companies and products featured in this section. www.rtcmagazine.com/getconnected
RTC MAGAZINE OCTOBER 2009
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PRODUCTS & TECHNOLOGY
USB Data Acquisition Processor for High-Speed Simultaneous Sampling
A new semi-autonomous data acquisition system can—after programming—run independently from its host PC. PC software communicates with, configures and controls the system, but xDAP 7400 from Microstar Laboratories can be set up to run for long periods—or even indefinitely—without any connection to a PC. With an application using a software trigger, data can be selected for processing automatically, and the host PC can be disconnected. While operating independently, xDAP 7400 can extract and process only what is of interest from a sampled data stream. It helps improve signal quality by running the data stream through digital filters before storing it in local memory for transfer to the PC when the PC is connected and ready to accept the transfer. The distributed intelligence of multiple xDAP 7400s allows capture, buffering and reduction of data, for faster transfer of information through limited PC host capacity. Each xDAP 7400 includes a 16-bit analog-to-digital converter running at 1 million samples per second on each of 8 channels simultaneously, for a throughput of 8 million samples per second. One gigabyte of local memory provides space for data buffers that let xDAP 7400 sustain this throughput indefinitely, transferring samples to the PC as required, with no loss of data. Recent tests have confirmed not only continuous transfer to a PC at the full 8 million samples per second, but also continuous disk-logging of the data. Built into DAPL 3000, the real-time operating system that runs on xDAP 7400, are more than 100 commands optimized for data acquisition and reduction. These are supported by DAPtools Professional, a $595 software product included at no charge with orders for xDAP 7400 placed before October 31, 2009. Using any PC laptop with a USB 2.0 port, you can sample 8 channels simultaneously with 16-bit resolution at 1 million samples per second on each channel. The DAPL operating system running on xDAP 7400 lets you perform data reduction and other processing in real time. You can download at no charge a full copy of the software you can use to develop and run your application from a PC. Technical specifications for xDAP 7400 are listed on the Web. The new hardware costs $5,995 and is available now. You can order it today, or talk to Microstar Laboratories about evaluating it before you buy it. Microstar Laboratories, Bellevue, WA. (425) 453-2345. [www.mstarlabs.com].
5-Slot Full Mesh 3U VPX REDI Backplane Features I/O Plus
An enhanced 5-slot I/O Plus 3U VPX full mesh backplane is suitable for a wide array of VPX applications. A commercial off-the-shelf (COTS) solution, the highly configurable VPX REDI backplane from SIE Computing offers high-bandwidth in a compact size and provides greater I/O flexibility through I/O Plus, which uses configurable I/O daughter cards to accommodate an array of VPX applications. I/O Plus brings two high-speed VPX connectors to the front edge of the board and utilizes two interchangeable daughter I/O cards, reducing the need for custom backplanes for each VPX application. The backplane design incorporates 10 fat pipes / high-speed differential channels on the J1 connector and 16 fat pipes as well as 20 singleended signals on the J2 connector. The backplane is capable of delivering over 200 watts of power per VPX slot. SIE Computing Solutions also offers standard and custom ATR rugged enclosures featuring convection, conduction, air-over conduction or liquid-cooling requirements to meet the demanding cooling requirements for a variety of thermal loads. The 5-slot 3U VPX REDI backplane is suitable for deployment in aerospace and vetronic military applications where high performance and the small 3U form factor are mandated. SIE Computing Solutions, Brockton, MA. (800).926.8722. [www.sie-computing.com].
Atom-Based Edge Controller with Java-Based Middleware Framework
A highly configurable edge controller platform offers data access and control on the edge of the cloud, to aggregate and deliver data from edge devices, pervasive sensors and distributed monitors to the network core for further analysis and action. The Helios platform from Eurotech offers new advances in flexibility with the ability to select an Intel Atom Series Z5xx processorbased configuration, at up to 1.6 GHz with memory and video display options. Software options include Windows Embedded Standard, Windows CE 6.0 or Wind River Linux 3.0 for the operating system. In addition, the Eurotech Everyware Software Framework (ESF) allows quick timeto-market with simple to use APIs. Connectivity choices include wired or pre-certified wireless network services for devices for cellular, Bluetooth, Wi-Fi access within the secure and rugged USB bay area. The Eurotech Helios platform can be equipped with the Eurotech ESF middleware to offer an easily programmable edge controller system. With ESF, OEMs have a Java-based middleware framework as a starting point for their application coding, leading to faster time-to-market and ultimately, future-proofing and greater market success. Combining the Helios configurable hardware platform with the ESF middleware gives OEMs the greatest range of flexibility, in I/O options, connectivity choices and object-oriented programming. Helios will be generally available in the first quarter of 2010. Eurotech, Columbia, MD. (301) 490-4007. [www.eurotech.com].
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Hybrid Signal Processing 3U VPX Board Teams DSPs with FPGAs
A new signal processing board features a mix of FPGAs and DSPs in the form of a large Altera Stratix II GX FPGA and one cluster of four ADSP-TS201S TigerSHARC processors from Analog Devices. The GT-3U-VPX from BittWare features a front panel that provides high-speed SerDes, 10/100 Ethernet and RS-232; and the extensive back panel interface supports PCI Express, Serial RapidIO, GigE and 10 GigE. The GT3X can achieve simultaneous onboard and off-board data transfers at rates exceeding 2 Gbytes/s via BittWare’s Atlantis FrameWork implemented in the Stratix II GX FPGA. The industry’s first COTS VPX (VITA 46) board based on Altera’s Stratix II GX, the GT3X provides a hybrid signal processing architecture that takes advantage of both FPGA and DSP technology creating a complete solution for applications requiring flexibility and adaptability along with high-end signal processing, all on a ruggedizable platform. The Altera Stratix II GX FPGA is supported by Atlantis FrameWork for I/O, routing and processing. With up to 132,540 equivalent logic elements, it provides 252 embedded 18x18 multipliers, 63 DSP blocks and 6.7 Mbits of RAM. There is also IP available for: Serial RapidIO, PCI Express, GigE, 10 GigE, CPRI and OBSAI. In addition the FPGA supports 19 channels of high-speed SerDes transceivers, eight link ports at up to 600 Mbytes/s each routed from on board DSPs and 32 LVDS pairs (16 Tx and 16 Rx) to the rear panel. The board incorporates one cluster of four ADSP-TS201S TigerSHARC DSPs that can deliver 48 GOPS 16-bit fixed point, 12 GFLOPS floating point processing power. Each DSP has four link ports with two link ports routed to the ATLANTiS FrameWork and two link ports routed for interprocessor communications. There are 24 Mbits of on-chip RAM per DSP. The GT3X is supported by Altera’s Quartus II FPGA tools and ADI’s Crosscore tool suite for application/code development. BittWare’s BittWorks tool suite provides everything necessary for host and embedded development and consists of the Host Interface Library (HIL), which provides a C callable interface to BittWare boards from the host system (connected or remote) to read and write to memory, provide board and processor control, and control interrupts. Get Connected with technology and The BWIO Library provides a common interface for all supported components, supporting new features without API changes, and contains Atlantis/DSP/board companies providing solutions now component drivers, and POSIX-Based I/O (Open, Read, Write, Ioctl, Close). BittWare Utilities include access control to BittWare devices, a scan for BittWare devices Get Connected is a new resource for furtheron exploration the network, access control from remote clients, automated host and DSP-based (if applicable) diagnostic testsinto andproducts, low-level debugging. technologies and companies. Whether your goal
Ad Index
BittWare, Concord, NH. (603) 226-0404. [www.bittware.com].
Rugged FPGA-Based Frame Grabber & Video Capture XMC Card
A new rugged, high-resolution frame grabber and video capture XMC (VITA 42.3) card delivers high-resolution analog and digital video capture functionality and advanced serial connectivity. The XMC-270 from Curtiss-Wright Controls Embedded Computing also features a built-in PCI Express core to provide high-performance video and image storage. Extra functionality and customizability is provided through an advanced Xilinx Virtex-5 FPGA. The XMC-270 simplifies and speeds the integration of high-end image and video capture functionality into embedded COTS systems designed for use in harsh environments. Available in both air- and conduction-cooled versions, the XMC-270 supports high-resolution digital and analog video formats, including legacy interlaced analog video. The card can transfer raw video data in a wide variety of color depths including 8-bit YCbCr (BT.656-4), 32-bit RGB8888 (with Alpha), 16-bit RGB565 and 8-bit Mono (green only). It provides a comprehensive range of video capture features including full frame rate, reduced frame rate (user programmable) and snap shot. The XMC-270 supports a wide range of video capture functionality including six independent NTSC/PAL/RS170 CVBS/S-Video inputs, two independent DVI (TMDS) inputs and two independent RGB HV/SoG inputs. XMC-270 Performance Features include an x8 PCI Express interface, video integrity monitoring for video freeze detection on DVI channels, thermal sensor and is available in a range of air- and conduction-cooled ruggedization levels. Software support for the XMC-270 includes a comprehensive capture drive which enables a system designer to control and fully utilize the card’s hardware capabilities. This software can be used either in stand-alone mode or integrated with other Curtiss-Wright Controls’ Graphics software. Operating environment support includes drivers for Wind River VxWorks 6.x and GPPLE Linux for use with Curtiss-Wright Controls Power Architecture and Intel Architecture single board computers. Price of the XMC-270 begins at $5,683. Curtiss-Wright Controls Embedded Computing, Leesburg, VA. (613) 254-5112. [www.cwcembedded.com].
is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of GetSBC Connected is to put you inLVDS, touch with the right resource. Atom-Based PC/104+ Supports CRT, SATA Whichever level of service you require for whatever type of technology, II, and CompactFlash Get Connected will help you connect with the companies and products you are searching for. single An Intel Atom-based PC/104+
www.rtcmagazine.com/getconnected board computer (SBC) is designed for spacelimited applications requiring fanless operation, such as portable medical, interactive kiosk, human-machine interface (HMI), infotainment, in-vehicle, gaming and industrial control. The MB73200 from Win Enterprises offers a choice of two onboard Ultra-Low-Power (ULV) Embedded In-with technology and companies prov Get Connected tel Atom Z5xx series processors. The CPUs proGet Connected is a new resource for further exploration into pro vide either 1.1 GHz or 1.6 GHz of performance. datasheet from a company, speak directly with an Application Engine these As Intel embedded processors, in touch withcomponents the right resource. Whichever level of service you requir Getproducts. Connected will help enable long life for OEM Support foryou connect with the companies and produc both PC/104+ and www.rtcmagazine.com/getconnected PC/104 enables additional wired and wireless I/O, or other feature expansion. An optional high-definition audio card is offered. Two serial ports, four USB 2.0 ports are featured. The device provides two SATA II interfaces and one CompactFlash type I/II socket. Two Gbytes of memory are provided. The Intel System Controller Hub US15W supports 2D, 3D and advanced 3D graphics, high-definition video decode and image processing. The chipset also enables support for Single Channel 24-bit LCD/LVDS. Dual simultaneous displays can be supported by MB-73200. CRT resolution of up to 2048 x 1536 is provided. Other features include ultra-low-power consumption (5W), dual 10/100 Mbit/s PCI bus Ethernet, two SATA interfaces and one CompactFlash type I/II socket The MB-73200 provides with support for Windows XP Professional, WinGet Connected companies and Embedded, dows XP Professional products featured in this Windows section. XP Embedded; plus the following www.rtcmagazine.com/getconnected Linux versions: Red Hat Embedded, Wind River Real-Time Embedded and Ubuntu Linux 9.04 (using Mobile Graphics Driver; no 3D support). OEM pricing begins at $242. Price includes CPU with memory and storage extra.
Products
.WIN Enterprises, North Andover, MA. (978) 688-2000. [www.win-ent.com]. Get Connected with companies and products featured in this section. www.rtcmagazine.com/getconnected
RTC MAGAZINE OCTOBER 2009
51
PRODUCTS & TECHNOLOGY
PMC/XMC Transceiver Module for Wideband Radar Countermeasures and MIL/COTS Apps
A new high-frequency PMC/XMC transceiver module is targeted for high-speed, wideband applications including remote radar countermeasures, tracking and UAV (unmanned aerial vehicle) surveillance. The Model 7158 from Pentek is a dual-channel, 12-bit 500 MHz data converter that builds upon the company’s Model 7156 transceiver technology by extending the A/D sampling rate. The 7158 high-speed transceiver is suited for both deployed and lab environments. Some deployed environments include UAVs, ships and aircraft. By coupling the high-speed analog I/O data converters through powerful FPGA resources, this module can receive a signal, process it and send it back out in real time. It delivers exceptional performance for radar countermeasure applications that require complex, but extremely low-latency, signal processing. In such an application, the signal processing FPGA of the 7158 handles the real-time DSP algorithms while the second FPGA provides a status and control path to the PC or carrier board. Additionally, the FPGA can be a Xilinx FXT family device with a PowerPC processor, forming a complete, selfcontained subsystem. Users can install an Ethernet stack so the module can communicate over gigabit Ethernet to external systems in the vehicle or craft. Using Pentek’s GateFlow FPGA Design Kit, customers can develop and integrate custom IP to support a wide range of real-time applications for communication, signal intelligence, beamforming and radar countermeasures. The dual FPGA architecture of the 7158 delivers very high processing power with the necessary flexibility to extend the FPGA resources. Both onboard FPGAs are members of Xilinx’s Virtex-5 family so that customers can choose specific FPGA devices for each to fulfill particular requirements. Available FPGAs include LXT devices with generous logic resources and SXT devices with an abundance of DSP resources for signal processing. A total of 512 Mbytes of DDR2 SDRAM memory arranged in two banks enables users to capture real-time data, storing it in a local memory. This feature will have particular appeal to those engaged in wideband radar where the destination device cannot handle the peak real-time data rates and the SDRAM acts as an elastic buffer. The SDRAM can also be used to store an arbitrary waveform for playback through the D/A converters. Optionally, the total SDRAM capacity can be doubled to 1 Gbyte. The 7158 is supported with the ReadyFlow Board Support Package (BSP) under Windows, Linux and VxWorks operating systems (OS). Each BSP includes an OS driver as well as a full feature ReadyFlow C language library to support all board functions and provide sample applications for quick development startup. This module is also available as a PCI module, Model 7658; as a 3U and 6U cPCI module, Model 7258 and 7358 respectively; and as a PCI Express module, full- and half-length versions with the Models 7758 and 7858. The starting price is $11,500. Pentek, Upper Saddle River, NJ. (201) 818-5900. [www.pentek.com].
ExpressCard High-Speed Digitizer Captures Data in Two Modes
A wideband signal acquisition card for commercial laptop computers combines a compact, low-power form-factor with a 150 MHz sampling rate on two channels, supporting 14-bit resolution and 512 Mbyte onboard RAM, yet consumes only 4.5W. Targeted for mobile data acquisition applications, the EC1450 from Signatec is a 54 mm-compliant ExpressCard board equipped with standard ‘Plug and Play’ features common in PCI systems. The entire 512 Mbyte memory may be used as an exceptionally large FIFO for acquiring data directly to the ExpressCard bus continuously— referred to as continuous record mode—or in data transfer mode, block acquisitions to RAM and transfers to PC modes. In either continuous record mode or data transfer mode, the EC14150 is capable of sustaining 180 Mbit/s transfers over the ExpressCard PCI Express (PCIe) x1 data link bus interface. Significant test data show recordings with the EC14150’s large 512 Mbyte FIFO buffering the recording process can be sustained continuously at up to 90 MSPS, even when operating in traditional non-real-time environments such as the Windows operating system. Both input channels implement a transformer coupled input for best possible signal performance. The EC14150 bandwidth ranges from 200 KHz to 200 MHz, and can be set to trigger from the input data channels, the external trigger signal input or via software command and supports single shot, segmented, and pre-trigger triggering modes. A frequency synthesized clock allows the ADC sampling rate to be set to virtually any clock value up to 150 MHz, offering maximum flexibility for sampling rate selection. Signatec’s EC14150 comes with Windows 2000/XP/Vista drivers, a C Function Library with source code, a turnkey signal recording software application and a software manual that describes how to use the available library of functions or API to create larger applications or systems. An SDK offering many multiple coding examples is also included. Signatec, Newport Beach, CA. (949) 729-1084. [www.signatec.com].
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OCTOBER 2009 RTC MAGAZINE
PRODUCTS & TECHNOLOGY
Two Modules Target Next-Generation High-Definition Video
“Compact” COM Express Module with Atom N270 and 945GSE Express Chipset
A “Compact” COM Express module measuring 95 mm x 95 mm is fully compatible with the Type 2 pin-out of the PICMG COM Express specification. This highly integrated Express-ATC “Compact” size COM Express module from Adlink Technology is an off-the-shelf building block that is ready to plug into custom-made, applicationspecific carrier boards for embedded and mobile applications. The Express-ATC is positioned as an entry level COM Express module for systems that require a full set of graphics features in a very small package. Its target applications Get Connected with technology and are Medical Diagnostics companies providing solutions now and Medical Imaging, Get Connected is a new resource for further exploration Gaming, Industrial Au- into products, technologies and companies. Whether your goal tomation, Test and Mea-is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the surement and Industrial goal of Get Connected is to put you in touch with the right resource. Control. Whichever level of service you require for whatever type of technology, Based on the ultra-low-power Intel Atom N270 processor and Get Connected will help you connect with the companies and products Mobile Intel 945GSE Express chipset, the Express-ATC comes you are searching for. with integrated support for high resolution CRT, single/dual chanwww.rtcmagazine.com/getconnected nel LVDS and TV out (SDTV and HDTV). In addition to the onboard integrated graphics, the chipset’s SDVO bus can be used to connect to DVI, TMDS or additional LVDS device controllers by extension to a custom designed carrier. The Express-ATC supports up to 2 Gbytes of DDR2 533 MHz memory on a single SODIMM socket. The module and supports Get Connected with technology companies prov three PCI Express x1 lanes via the Intel Controller Hubexploration 7-M Get Connected is aI/O new resource for further into pro (ICH7-M) Southbridge, datasheet one Gigabit connection and two from a Ethernet company, speak directly with an Application Engine SATA channels. Legacy support is right provided for a single in touch with the resource. Whichever levelParallel of service you requir Get Connected will Count help youbus connect with the companies and produc ATA channel, 32-bit PCI and Low Pin (LPC). www.rtcmagazine.com/getconnected The Express-ATC supports onboard IDE-based Solid State Drive (SSD) up to 8 Gbytes, and comes standard with an integrated Trusted Platform Module (TPM 1.2) providing secure storage of encryption keys for system and data protection. The module is equipped with AMIBIOS8 supporting embedded features such as Remote Console, CMOS backup, CPU and System Monitoring, Watchdog Timer and OEM Splash Screen. Positioned for portable and mobile applications, the Express-ATC BIOS supports ACPIbased Smart Battery for single or dual smart battery subsystems. Adlink provides schematics, mechanical files, design guides, R&D support, product review service and BIOS customization for companies that are doing their own carrier board design. Adlink companies and services for those who also offersGet fullConnected developmentwith and production products featured in this section. wish to outsource their carrier board’s design and/or manufacturwww.rtcmagazine.com/getconnected ing. The list price is $850 with 2 Gbyte RAM, a 4 Gbyte solid-state drive and a heatsink.
Ad Index
Two new innovations in high-definition multimedia playback have been designed to give customers the edge when employing the latest HD H.264 and VC1 codecs that are quickly gaining traction in high-end digital signage and kiosk segments. The Via EPIA P720 Pico-ITX board and the Via Trinity-powered Via VB8003 Mini-ITX board from Via Technologies have been implemented without sacrificing the extreme power-efficiency that has become Via’s signature. The Via EPIA P720 is a 10 cm x 7.2 cm Pico-ITX board that features the latest Via VX855 system media processor, designed specifically to deliver smooth playback of the latest hi-res video formats through hardware acceleration, leaving the board’s Via Eden ULV 1.0 GHz processor free to focus on other tasks. Via EPIA P720 Specs include the Via Eden ULV 1.0 GHz combined with Via VX855 MSP chipset, 44-pin IDE header, 1 SATA connector, Gigabit LAN, VT1708B audio codec. Back panel I/O includes HDMI and VGA ports, RJ45 and two USB 2.0 ports. Pin headers provide additional four USB 2.0 ports, an LPC connector, SMBus, PS/2, single channel LVDS, Digital IO, UART, audio, S-ATA II and power connectors.
The Via VB8003 Mini-ITX board features the Via Trinity Platform and is targeted as a high-end multimedia platform. Combining a 64-bit Via Nano processor, the Via VX800 media system processor and a dedicated S3 Graphics processor, the Via Trinity platform brings high-definition video playback and a DX10.1 graphics engine to multiple displays. Powering true 1080p HD content playback across multiple displays, the Via VB8003 MiniITX board supports a variety of onboard display technologies in a range of flexible configurations including dual HDMI, LVDS, DVI and VGA, making the Via VB8003 a HD playback powerhouse.
Products
ADLINK Technology, San Jose, CA. (408) 360-0200. [www.adlinktech.com].
Via Technologies, Fremont, CA. (510)683-3300. [www.via.com.tw]. Get Connected with companies and products featured in this section. www.rtcmagazine.com/getconnected
RTC MAGAZINE OCTOBER 2009
53
with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.
www.rtcmagazine.com/getconnected
Advertiser Index Get Connected with technology and companies providing solutions now Get Connected is a new resource for further exploration into products, technologies and companies. Whether your goal is to research the latest datasheet from a company, speak directly with an Application Engineer, or jump to a company's technical page, the goal of Get Connected is to put you in touch with the right resource. Whichever level of service you require for whatever type of technology, Get Connected will help you connect with the companies and products you are searching for.
www.rtcmagazine.com/getconnected
Company
Page
Website
ACT/Technico, div. of Elma Electronic................................................................................. 12.......................................................................................................www.acttechnico.com ADLINK Technology America, Inc........................................................................................ 9................................................................................................ www.adlinktechnology.com Solid-State Drives & AMC Boards Showcase...................................................................... 33.End ....................................................................................................................................... of Article Products American Portwell Technology, Inc...................................................................................... 2............................................................................................................. www.portwell.com Avalue Technology............................................................................................................. 40.......................................................................................................www.avalue-tech.com Get Connected with companies and Get Connected products featured in this section. with companies mentioned in this article. Birdstep Technology.......................................................................................................... 36. . .......................................................................................................... www.birdstep.com www.rtcmagazine.com/getconnected www.rtcmagazine.com/getconnected BittWare........................................................................................................................... 28............................................................................................................www.bittware.com Cogent.............................................................................................................................. 22.......................................................................................................... www.cogcomp.com
Get Connected with companies mentioned in this article. ELMA Systems Div............................................................................................................ 37.................................................................................................................www.elma.com www.rtcmagazine.com/getconnected Get Connected with companies and products featured in this section.
www.rtcmagazine.com/getconnected Extreme Engineering Solutions, Inc.................................................................................... 25............................................................................................................. www.xes-inc.com Lippert Embedded Computers............................................................................................ 55.......................................................................................................... www.lippert-at.com MEN Micro, Inc................................................................................................................. 19......................................................................................................... www.menmicro.com Nallatech Inc..................................................................................................................... 32...........................................................................................................www.nallatech.com National Instruments......................................................................................................... 13..................................................................................................................... www.ni.com One Stop Systems............................................................................................................. 29................................................................................................www.onestopsystems.com Pentek, Inc........................................................................................................................ 21..............................................................................................................www.pentek.com Phoenix International.......................................................................................................... 4............................................................................................................ www.phenxint.com Real-Time & Embedded Computing Conference.................................................................. 41................................................................................................................ www.rtecc.com Red Rapids, Inc................................................................................................................. 24...................................................................................................................redrapids.com Technobox........................................................................................................................ 23.........................................................................................................www.technobox.com Themis Computer.............................................................................................................. 45.............................................................................................................. www.themis.com TRI-M Systems................................................................................................................. 48.................................................................................................................www.tri-m.com VersaLogic Corporation..................................................................................................... 56......................................................................................................... www.versalogic.com
RTC (Issn#1092-1524) magazine is published monthly at 905 Calle Amanecer, Ste. 250, San Clemente, CA 92673. Periodical postage paid at San Clemente and at additional mailing offices. POSTMASTER: Send address changes to RTC, 905 Calle Amanecer, Ste. 250, San Clemente, CA 92673.
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OCTOBER 2009 RTC MAGAZINE
Reduce Energy cost! Advanced Computer on Module Maximum performance at minimum size. A new form factor LiPPERT‘s latest development, CoreExpress-ECO, is the smallest COM module available today. It measures only 65 x 58 mm, yet comes with the best performance-per-watt figures. Minimum power consumption and an optimized cooling concept make its integration a snap. The processor independent module concept does not use any legacy interfaces. Future proof CoreExpress-ECO modules are designed for long product life. Its components have been specially selected for long-term availability. Versatile IO interfaces allow flexible implementation of all required interfaces on the carrier board.
tform
l pla
Eva
Advantages: s Intel® Atom™ processor Z510 or Z530 s Up to 2 GB SDDR2 RAM s 100% legacy free s 2 PCI Express lanes s 8 USB 2.0 ports s Integrated graphics processor s Smallest form factor (65 x 58 mm), 28 grams s Best performance-per-watt s Low power consumption, 5 W s Passive cooling with EMC shield s Long term availability (10 years +) s Fail Safe BIOS s Extended temperature range -40°C ... +85°C (opt.)
Versatile Applications profiting from the flexibility and robustness of the CoreExpress-ECO are industrial image processing, communication systems, logistics, medical devices, mobile health care, mobile embedded PC systems, POI, POS, robotics, traffic management, and digital signage devices. LEMT - LiPPERT Enhanced Management Technology CoreExpress modules support the System Management Controller based LEMT. It provides auxiliary functions like condition monitoring, operating hours counter and secure flash memory, (WORM) usable for encryption keys. Development Support The ready-to-run evaluation kit is the easiest way to test and evaluate the CoreExpress-ECO. Operating systems supported are Windows XPE, Windows CE, QNX and Linux.
Intel, Intel Inside and the Intel Inside logo are trademarks of Intel Corporation in the U.S. and other countries. CoreExpress® and the CoreExpress®-logo are registered trademarks of LiPPERT Embedded Computers. Other trademarks and registered trademarks are the property of their respective owners.
++++++++++ www.coreexpress.com ++++++++++ LiPPERT Embedded Computers Inc. 5555 Glenridge Connector, Suite 200 Atlanta, GA 30342 Phone (404) 459 2870 · Fax (404) 459 2871 ussales@lippertembedded.com · www.lippertembedded.com
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