The magazine of record for the embedded computing industry
February 2014
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Embedded Security for the Internet of Things
Provide Flexible I/O Expansion for Stackable Modules Making Mobile Systems Aware of Their World An RTC Group Publication
The Ups and Downs of Android for Embedded
Engineered Solutions Deliver Flexibility Airborne Surveillance
TRC2005 2U Rackmount Computer
Energy Exploration
Video Command and Control
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Embedded Security for the Internet of Things
40 RAID-Capable Box PC Offers Flexible Storage Capacity
44 8 Gbit LPDDR4 DRAM Ultra-Fast Mobile Memory
TABLEOF CONTENTS
46 Rugged, 14-Port Gigabit Managed Ethernet Switch with 2 SFP Sockets
VOLUME 23, ISSUE 2
DEPARTMENTS
The Internet of Things: Feeling Our 5Editorial Way to the Future
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Industry Insider Latest Developments in the Embedded Marketplace
Form Factor Forum 8Small Tiny COMs Bite Off Big Blades & Technology 40Products Newest Embedded Technology Used by Industry Leaders
EDITOR’S REPORT Mobile Graphics CPU
Graphics CPU Promises High Performance Embedded for 10 Mobile Both Graphical and ComputeIntensive Applications
TECHNOLOGY CORE
TECHNOLOGY IN SYSTEMS
Moving Android into Embedded
Intelligent Sensors in Intelligent Applications
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Android for Embedded: The Good, the Bad and the [insert adjective here] Bill Weinberg, Black Duck Consulting
Power-Efficient, Context-Aware Mobile Systems 28Building Joy Wrigley, Lattice Semiconductor
TECHNOLOGY IN CONTEXT
TECHNOLOGY DEVELOPMENT
Flexible I/O for Stackable Modules
Optical Interfaces
Stackable I/O Modules Revamp the World of 18 New Embedded SBCs Robert A. Burckle, WinSystems
TECHNOLOGY CONNECTED Embedded Security for the Internet of Things
22
Providing a Built-In Foundation for Internet Security
Optocouplers in 32High-Speed Industrial Communication Networks Chwan Jye Foo, Avago Technologies
INDUSTRY WATCH Harnessing FPGA Performance for HPEC Front-End Processing with VPX 36FPGA-Based Ken Grob, Elma Electronic
Michael Mehlberg, Microsemi
Tom Williams
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FEBRUARY 2014 Publisher MSC Embedded Inc. Tel. +1 650 616 4068 info@mscembedded.com www.mscembedded.com
Qseven™ -
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or Single-Core ARM Cortex-A9 up to 1.2 GHz
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up to 4 GB DDR3 SDRAM up to 64 GB Flash GbE, PCIe x1, SATA-II, USB Triple independent display support
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CPU, strong dual-core processor
PRESIDENT John Reardon, johnr@rtcgroup.com
or a powerful quad-core CPU with
1.1, OpenCL™ 1.1 EP
up to 1.2 GHz, and provides a very
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Bridge the gap between ARM and x86 with Qseven Computer-on-Modules
One carrierboard can be equipped with Freescale® ARM, Intel® Atom™ or AMD® G-Series processor-based Qseven Computer-on-Modules. conga-QMX6
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To Contact RTC magazine: HOME OFFICE The RTC Group, 905 Calle Amanecer, Suite 250, San Clemente, CA 92673 Phone: (949) 226-2000 Fax: (949) 226-2050, www.rtcgroup.com Editorial Office Tom Williams, Editor-in-Chief 1669 Nelson Road, No. 2, Scotts Valley, CA 95066 Phone: (831) 335-1509
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FEBRUARY 2014 RTC MAGAZINE
Published by The RTC Group Copyright 2014, The RTC Group. Printed in the United States. All rights reserved. All related graphics are trademarks of The RTC Group. All other brand and product names are the property of their holders.
EDITORIAL FEBRUARY 2014
The Internet of Things: Feeling Our Way to the Future
T
hey were wrong about my flying car. But I’ve gotten over that after seeing it as a kid in all those “Wonderful World of Tomorrow” clips that flew around so many years ago. It is, of course, natural to try to project where further developments of today’s technology are going to take us, and it’s certainly no crime to be optimistic. Then again, back in 1958 there was a terrible Boris Karloff film titled, Frankenstein 1970. We won’t go there but needless to say, I’m not holding my breath for a jet pack. Now as we all know, the “Wonderful World of Tomorrow” we are all talking about these days is the Internet of Things. The Internet of Things (IoT) is very real with predictions that there will be upward of 50 billion devices, all with their own IP addresses, connected to the Internet, generating Big Data up to the Cloud and allowing detailed access and control of all kinds of functions from building management to vending machines, environmental monitoring, energy conservation and more. The interesting thing about the IoT as opposed to some earlier projections is that it is really happening. Well, the proliferation of connected devices is actually happening. The question is, what will this really mean in our daily lives and even more importantly, when? Take one example, which involves the Smart Grid. We can consider the Smart Grid as either a part of the IoT or a parallel development to it. In either case, it connects with the IoT at certain points. One of those is the idea that we will have “time of day” pricing to help even out power distribution and lower overall costs. Thus power consumed at off-peak hours will cost less than that at peak hours. Major household appliances will have built-in intelligence to receive signals from the grid when rates drop so they can turn on and run. Sounds great and I’m sure we’re all for it. But there may be some bumps in the road. A while back I checked and our local power company does not yet support time of day pricing, which I took to mean they are not quite up to date. Harrumph. Now I see in the paper that they are getting ready to implement time of day pricing and the article warns that is will raise customers’ monthly bills. What? Ah Grasshopper, in order for this to work, you also have to have the smart appliances. How many of us have those? When time of day pricing starts, there will be a different rate structure. For example, if electricity now costs 11 cents per kilowatt hour, it may go to 8 cents at night and 14 cents during the day. In order to get the lower rate, how many people are going to get up at midnight to start the washing machine and then again at 2 am to switch the load
Tom Williams Editor-in-Chief
to the dryer? But otherwise, the monthly bill will definitely go up. Also, people are not going to immediately scrap their washers and dryers to go out and buy an intelligent washer/dryer to take advantage of the power savings. This will definitely take time. And this is just one of the many potential caveats we may have to recognize as we all await the wonderful world of the IoT. On the other hand, there are many areas where the IoT is showing definite signs of taking shape. Many of these involve situations where devices are already connected in a local area network and can then be easily incorporated into the IoT by connecting their local server to the Internet. To do that effectively, however, requires implementing the proper management software on both the local server and the remote—often Cloud-based—servers and systems. Such software provides browser access to the connected devices and their applications both individually and collectively and facilitates the gathering and interpretation of data generated by them. There are already very promising and useful systems emerging from this model in such areas as building and home management and security, industrial automation, transportation, digital signage, vending operations and many more. These are characterized by the Internetconnected LAN, and the more connected devices there are in a given operation, the more data is available to do more creative things. Buildings have long had locally networked HVAC and security systems, and when multiple buildings in a hotel chain, for example, are connected via the Web, the more efficiently the company can manage its overall assets. Home climate and security systems can take direct advantage of such experience to optimize such control and make it available via a smartphone app. One of the biggest potential boosts to the IoT may come when companies realize what they can actually do with their Big Data. Data that comes in from seemingly disparate sources from systems that may have originally been designed to do different things may suggest uses that were never originally conceived of. But this will take time. The advantage we have over the flying car is that we can realize immediate gains from the IoT and then build on those without even being certain of where it will all lead. In fact, disappointments or frustration mainly arise in the cases where expectations were specific (like ToD pricing). Those are offset by innovative discoveries that justify the initial effort and investment. So strap on your jet pack. RTC MAGAZINE FEBRUARY 2014
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INDUSTRY
INSIDER FEBRUARY 2014 ETSI Delivers Report on Cloud Computing Standards The European Telecommunications Standards Institute has made public its final report from ETSI’s Cloud Standards Coordination initiative. The report was delivered at an event jointly organized between ETSI and the European Commission attended by over 100 experts from the cloud community. The overall objective of the Cloud Standards Coordination initiative led by ETSI was to identify a detailed map of the standards required to support a series of policy objectives defined by the European Commission. The initiative attracted Cloud industry players, public authorities, user associations and more than 20 standards-setting organizations to work collectively on this objective. The report provides: • a definition of roles in Cloud computing; • the collection and classification of over 100 Cloud computing use cases; • a list of around 20 relevant organizations in Cloud computing standardization and a selection of around 150 associated documents, standards and specifications as well as reports and white papers produced by these organizations; • a classification of activities that need to be undertaken by Cloud service customers or Cloud service providers over the whole Cloud service life-cycle; and • a mapping of the selected Cloud computing documents (in particular standards and specifications) on these activities. Finally, the report offers a set of recommendations on the way forward. The analysis shows that Cloud standardization is much more focused than anticipated and that standards are maturing in some areas.
Cellular M2M Devices in Industrial Automation Reached 0.76 Million in 2013
According to a new research report, the shipments of cellular M2M devices in industrial automation reached 760,000 worldwide in 2013. Growing at a compound annual growth rate (CAGR) of 22.5 percent, shipments are expected to reach 2.1 million in 2018. The market is served by a multitude of players with varying backgrounds. Eaton, Phoenix Contact, Advantech and
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SEPTEMBER2014 FEBRUARY 2014 RTC RTCMAGAZINE MAGAZINE
Kontron are major providers of industrial automation equipment and are also important vendors of products and solutions featuring embedded cellular connectivity. Industrial network equipment specialists such as Moxa, Westermo and B&B Electronics are also major vendors of cellular solutions. Other significant vendors include M2M specialists such as Digi International, Calamp, Maestro Wireless and Viola Systems. Netmodule and eWon are examples of companies with highly specialized offerings
targeting the industrial automation industry. In the report by the analyst firm Berg Insight, backbone network communication and remote monitoring are the two largest applications for cellular M2M connectivity within industrial automation. Remote service maintenance and diagnostics of machinery and industrial robots is a major application within factory automation, and real-time monitoring of remote facilities and equipment is one of the most common applications within process automation. High-capacity LTE networks will further increase cellular adoption in industrial automation, even in control applications. However, connectivity requirements vary depending on the application, and cellular is part of a mix together with other technologies such as Wi-Fi, Bluetooth, Zigbee, WirelessHART and ISA100.
Green Hills Software and HP Agree to Offer Secure Android Smartphones and Tablets
Green Hills Software has announced that it is teaming with HP to offer trusted mobile devices built with Green Hills Software’s Integrity Multivisor virtualization technology for Android and enabled by HP’s secure mobility service, to the UK public sector. As part of a new teaming agreement with Hewlett-Packard Enterprise Services (UK) Ltd, Green Hills Software is piloting a secure mobile device initiative combining HP’s secure mobility end-to-end service and Green Hills Software’s Integrity Multivisor security technology. The separation kernel-based Type-1 hypervisor delivers security that cannot be achieved with mobile OS-level mechanisms through
application wrapping, containers, access control and encrypted workspaces. These trusted mobile devices demonstrate form factor flexibility, near-zero impact to OEMs, and the ability to deploy highassurance isolation technology at the speed of consumer electronics innovation. Green Hills Software has initiated an independent test assessment in order to achieve Commercial Product Assurance (CPA) Certification for its trusted mobile solution. CPA Certification is awarded to security products that have been successfully tested against security standards defined by CESG, the UK Government Communications-Electronics Security Group. Mobile devices running Integrity Multivisor are available today for trials with carriers, enterprises and governments. The solution includes device acquisition and delivery, front-line integration and technical support to both users and enterprise administrators.
MoCA 2.0 Certification Program Now Available
The Multimedia over Coax Alliance (MoCA) Certification Program for products implementing the MoCA 2.0 specification is now available to all members. MoCA technology is a worldwide standard for home entertainment networking. It is the only such standard in use by all three pay TV segments—cable, satellite and IPTV/telco. MoCA technology is also used as an in-home backbone to extend Wi-Fi connectivity. The Alliance has certified 148 products and has 53 members worldwide. MoCA 2.0 offers two performance modes of 400 Mbit/s and 800 Mbit/s net throughputs (MAC rate), respectively. Per-
formance alone, however, is not enough in an HD video environment. Reliability of packet delivery is also critical. MoCA 2.0 supports packet error rates (PER) as low as one in 100 million with a nominal latency of 3.6 ms. In addition, standby and sleep modes are included in the specification to help with overall power management in the network. Upon passage of certification, companies receive a certificate documenting and officially acknowledging that the capabilities and features of the submitted product have passed the required interoperability testing authorized by the Alliance. “The MoCA certification program for MoCA 2.0 products will enable manufacturers to verify their next generation of connected home technology products,” said Stephen Palm, senior technical director, Broadcom and MoCA Certification Board Chair. “The MoCA 2.0 golden nodes enable a fast path to product certification with high performance throughout the home for cable, satellite, xDSL, xPON and IP settop box products.”
videantis Joins Khronos Group, Targets OpenVX Computer Vision API
videantis has joined the Khronos Group to bring support for the OpenVX computer vision acceleration API to its low-power, licensable v-MP4000HDX processor architecture. Computer vision is the key technology that, among other things, drives new applications like always-on smart mobile cameras, gesture-based interfaces, 3D-sensing games and automotive driver assistance systems. Having a consistent, standardized, royalty-free and open API such as OpenVX enables
rapid adoption of computer vision acceleration by application developers, just like OpenGL did some years ago for 3D graphics. OpenVX can be used directly by applications or to accelerate higher-level middleware, such as the popular OpenCV open source vision library. videantis has a history in high-performance, low-power video processing, and joining Khronos as a contributing member enables videantis to be closely involved while the OpenVX standard is being finalized. The videantis v-MP4000HDX processor architecture is ideally suited to accelerate computer vision algorithms, typically achieving a 100x speedup compared to running on the host CPU, and power consumption that’s 1000x lower. The videantis v-MP4000HDX scalable processor architecture is specifically designed to efficiently accelerate video processing algorithms. Due to its low power consumption and high performance, the v-MP4000HDX supports full HD vision processing, allowing for more accurate algorithms and an overall higher-quality user experience, even on always-on, battery-operated devices. The 10core v-MP4280HDX subsystem performs 192 16-bit pixel operations per cycle, 24 on each of its eight VLIW media processors. The video processing subsystem is also silicon area efficient, occupying well under 2 mm2 of silicon in 28 nm technology, including all required on-chip memories. Thanks to its unified video/vision architecture, the subsystem can run a variety of computer vision APIs such as OpenCV, OpenVX, or proprietary standards, as well as simultaneously run multi-format video and still-image codecs. The v-MP4000HDX processor IP is available for licensing today.
LDRA Takes Major Role in Verifying Russian Avionics Software
LDRA has announced that it has secured contracts with Russia’s five major avionics suppliers. LDRA’s contracts assist with the verification of EASA and FAA regulations that suppliers must comply with for both fixed and rotary-wing aircraft to be used in domestic and international markets. The LDRA tool suite automates and streamlines the certification process, helping these avionics suppliers to achieve DO178C/ED-12C and DO-254/ED80 most cost-effectively. LDRA’s efforts have led to the development of the broadest range of software testing and verification capabilities that enforce and streamline avionics certification compliance throughout the world. In Russia, the LDRA tool suite has been used to verify systems for onboard computers, integrated air data, integrated flight and navigation, data display and lighting, in addition to various instruments and sensors for aircraft such as the Sukhoi Superjet 100 (SSJ-100), Tupolev Tu-204 (TU204), and the upcoming Irkut MC21 (also known as the MS21). The LDRA tool suite offers a broad range of software test and verification capabilities geared to meet the most rigorous of avionics standards. As the only company able to provide object code verification, LDRA gives developers a direct way to relate code coverage of source code to object code and to prove code coverage at the assembler level, fulfilling one of the most time-consuming verification requirements for DO178. The LDRA tool suite provides reports that identify where further analysis is needed and tool qualification support packs that guide developers through the certification process.
VIA Partners with Mozilla to Support and Develop Firefox OS for New Devices
VIA has announced an official partnership with Mozilla for support and development of Firefox OS for new device form factors. Firefox OS running on APC Paper and Rock has been released with complete, buildable source codes available to developers on GitHub. In order to continue to encourage community support, free APCs will be rewarded to developers that fix a known issue. “Firefox OS puts the power of the Web to the people. This partnership with APC presents an exciting opportunity to help redefine user experiences on desktops around the world,” said Dr. Li Gong, senior vice president of mobile devices and president of Asia Operations. “Mozilla will keep working on new features and enhancements of Firefox OS, and also provide knowledge sharing and technical support for Firefox OS and Marketplace.” “We are excited to announce this partnership with Mozilla and their enthusiastic support to speed development of Firefox OS on APC,” said Richard Brown, VP of International Marketing, VIA Technologies Inc. “Mozilla’s mission to promote openness, innovation and opportunity on the Web, aligns with our vision for APC, creating the perfect combination to deliver the best of the Web to desktops everywhere. We couldn’t be more excited about the future.”
RTC RTCMAGAZINE MAGAZINE SEPTEMBER FEBRUARY 2014
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SMALL FORM FACTOR
FORUM Colin McCracken
Tiny COMs Bite Off Big Blades
W
hen we think about Big Data, Cloud computing and rackmount systems in general, our thoughts immediately go to disk/flash arrays and server-class processors with gigantic thermal solutions installed on either server-wide motherboards or tall “blades” such as Advanced TCA (ATCA) processor cards that plug into a vertical backplane in a 13U chassis. While high performance and low latency are undeniable requirements for pushing around all that data, in some cases the problem can be broken down into many small processors, each handling a small part of the workload. Potential benefits include improving overall throughput, providing more granular redundancy, customizing co-processors and front ends, flexible packaging, lowering total power or de-centralizing heat by balancing the workload across a wider area. Communication applications such as data plane must be “wire speed,” processing packets without delay. It’s worth looking at these from the standpoint of parallel processing of threads. A typical segmentation of x86 processors, from top to bottom, is: server class, desktop, mobile/laptop, ultra-mobile/thin/ light (i.e., tablet class) and basic control. A typical dual server board might be replaced by four or more mobile processors. This gets interesting for network applications that need some custom hardware and not just vanilla servers or network-attached storage. In-line filtering, packet processing or other computation can be dispatched to more processors for either symmetric or asymmetric multi-processing (SMP or AMP). As long as the application doesn’t require huge cache RAM or local SDRAM or very tight coupling between processors, this is feasible; otherwise server processors can’t be so easily replaced. Custom peripheral hardware such as special RAID controllers, LAN switches, custom co-processors or front-end logic in FPGAs can go on a carrier board with multiple sites for commercial-off-the-shelf COM Express modules. Each COM Express module contains a dual-core or quad-core processor from 15W to 50W with up to 16 Gbyte RAM and a low-profile passive or active cooling solution (heat sink/fan sink). The modules also have Gigabit Ethernet controllers so that they can talk to each other and share data. This architecture is in many ways more scalable and power efficient than server processor farms.
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FEBRUARY 2014 RTC MAGAZINE
Taking this a step further, there may be a few applications where breaking down a mobile processor into many multiplecore ultra-mobile processors can be advantageous. This opens the door for ARM module-based solutions, as was first demonstrated last year with 8 quad-core Qseven modules on a single carrier board for a 1U rackmount Linux server. In the near future, ARM processors with hundreds of processing cores will be on the market. This is not just the talk of aliens and crop circles. To be fair to x86, most ARM processors do not have the many high-performance pipelines, complex instruction sets (instructions, addressing modes, etc.) and large local cache RAM that x86 CPUs do. A 2 GHz quad core ARM processor may have lower power consumption than a 2 GHz quad core x86 processor, but the performance isn’t apples-to-apples. Graphics performance can be quite different too. Many embedded applications aren’t streaming video or are completely headless. OpenCL can be used for very parallel tasks to really make the most of CPU resources in non-video applications. ARM versus x86 is a very individual decision that comes down to the very nature of the workload. Trying to exploit parallelism doesn’t need to be relegated to just the usual storage, server, firewall, search engine, security or other pattern-matching applications. Scientific and research sectors could benefit from customized hardware. Medical fields such as the booming area of genetics ought to investigate how complex calculations can be broken down into “byte-size” chunks to feed processor arrays. There are many places this approach will take us over time. For now, COM Express is already making inroads into traditional blade and server motherboard applications where the relative ease of customization and dense processor packing is beneficial. Smaller ARM modules have already been demonstrated in clusters on a common carrier. It would help many embedded projects to let the software architects define the optimum hardware they need, instead of throwing yet another hardware box over the wall to them.
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EDITOR’S REPORT Mobile Graphics CPU
Mobile Graphics CPU Promises High Performance Embedded for Both Graphical and Compute-Intensive Applications The demand for graphics performance is resulting not only in processors that deliver increasingly realistic and interactive graphics, but also capabilities for ever higher-performance numeric computing. Now these capabilities are going mobile—with big implications for the embedded world. by Tom Williams, Editor-in-Chief
change in awareness. Something new is happening. And now we are also hearing the term, “high-performance embedded computing.” Does this mean that what is generally considered to be high-performance computing (i.e., the perceived performance capabilities) is now finding its way into embedded systems? There are strong indications that this is exactly what is happening. The answer to the question, “How much performance can we actually put into an embedded system?” is, “Just as much as you can get without exceeding the size, weight and power restrictions.” And the answer to the question, “What can you do with all that performance?” is, “Not quite everything you might want to.” In other words, there are no conceivable limits. There are, however, moments where we can take stock and appreciate how far we have come. And it appears that with the introduction of its new Tegra K1 processor, NVIDIA has just driven such a stake in the ground. Actually, “stake in the ground” may be the wrong metaphor. A better one might be, “a crop circle in a field.” A couple of weeks prior to the introduction of the Tegra K1, reports started emerging about a crop circle that had appeared in a barley field near Salinas, California. The
M
any years ago in the late 1970s, I attended one of the early personal computing shows where the new system from a major vendor (who shall remain nameless) was being introduced. This particular system was able to display patterns put together from blocks of x by y white pixels to form rather crude images. But it was new; nobody else had it at the time and the person manning the booth was overheard to say, “Yes Ma’am, full graphics capability.” Today, of course, we know better and even then I shook my head. However, today we can rightly say that we have “truly amazing graphics” and very high-performance computing. In fact, these days, the term “highperformance computing” is increasingly popping up in things like marketing and conference programs. While it might be possible to dismiss this as somehow vague and self-serving, it nonetheless indicates a
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FIGURE 1 Crop circle, which “mysteriously” appeared in a barley field near Salinas, California.
EDITOR’S REPORT
1600 Tegra K1
Tegra 4
1400
1.4x Performance at Same Power
1200
SPECInt2K Performance
pattern appeared to depict the diagram of a highly integrated IC and contained Braille code for the number 192. After weeks of speculation and learned-sounding analysis by numerous UFO “experts,” NVIDIA revealed at the introduction that it was behind the crop circle as a way of emphasizing its claim as to the advanced nature of the processor (Figure 1). It turns out that the number 192 (which some pointed out is the atomic number for a radioactive isotope of Iridium) referred to the number of cores in the Kepler GPU architecture graphics engine on the chip. The Tegra K1 is specifically targeted for mobile systems—at this point primarily mobile gaming systems. That makes perfect sense, since the gaming market is large enough and has sufficient demand for performance to justify the investment and design effort involved. But as we shall see, the ability of the GPU to also handle extremely intense mathematical applications from seismology to astrophysics makes it attractive in a much wider range of applications, many of them also mobile and embedded, such as robotic vision. NVIDIA has actually developed two pin-compatible versions of the Tegra K1—a 32-bit and a 64-bit version, both based on the ARM instruction set. The 64-bit version appears to be scheduled for later release and is a dual Super Core CPU based on the ARMv8 architecture. The 32bit version uses a 4-Plus-1 quad-core ARM Cortex A15 CPU first used in the Tegra 4. This arrangement enables power saving by using variable symmetric multiprocessing (vSMP) for performance-intensive tasks on the quad-core complex and can also switch to the (plus-1) “battery saver” A15 core for lower-performance tasks. NVIDIA states that it has optimized the 4-Plus-1 architecture to use half the power for the same CPU performance as the earlier Tegra 4, and to deliver almost 40% more performance at the same power consumption (Figure 2). In addition to the Kepler GPU and the Cortex A15 complex, the Tegra K1 incorporates a dual ISP core that can handle up to 1.2 Gigapixels to support cameras up to 100 Megapixels. In addition, there is a display engine that can simultaneously drive a 4k local display as well as an external 4k monitor via HDMI (Figure 3).
1000
.45x
800
of the Power for the Same Performance
600 400 200 0 0
500
1000
1500
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CPU Power [mW] FIGURE 2 Tegra K1 Delivers higher CPU performance and power efficiency.
High Mobile Performance: Graphics and Otherwise
The driving force in the gaming industry, which has significant implications for all other aspects of computer systems, is the demand for an ever richer, realistic and interactive graphical experience. Kepler-based GPUs from NVIDIA have found their way into a number of advanced gaming systems and also into high-end workstations used for 3D visualization, medical imaging and a host of scientific applications. The demands of handling textures, tessellation shading and providing anti-aliasing for smooth motion visuals have called for ever greater graphics performance. In addition to that, there is a growing need for computational power to calculate the physics involved with motion and collisions (e.g., parts, rocks, etc., flying everywhere). All these and more must be addressed by a GPU like that in the Tegra K1. Kepler GPUs range in size with the largest, used in desktops and supercomputers, including up to 2880 single-precision floating-point cores and consume power in the hundreds of watts. The Tegra K1 GPU has 192 cores and consumes an average of under two watts—that is for the
GPU, not the processor as a whole. The Tegra K1 GPU has one graphics processing cluster (GPC) with the 192 cores, a streaming multiprocessor (SMX) unit, a memory interface and a 128 Kbyte L2 cache. The unified cache is important in reducing off-chip memory accesses and keeping power consumption down. In many mobile and embedded systems, high-end interactive graphics is becoming increasingly important for such things as gesture recognition, facial recognition and a host of automotive applications that affect safety. But at the same time—as noted with physics calculations for gaming—the ability to handle numerically complex and intensive computational tasks is equally important for such things as visualizing plaque in arteries, analyzing traffic flow or visualizing molecules to name a few. The Tegra K1 is designed to support the latest graphics protocols such as OpenGL 4.x and DirectX 11.x. But the inherent floating-point performance can also be harnessed for a vast number of other tasks. NVIDIA has developed a parallel computing platform called the Compute Unified Device Architecture (CUDA), a set of libraries, compiler direcRTC RTCMAGAZINE MAGAZINE FEBRUARY OCTOBER 2013 2014
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EDITOR’S REPORT
4-Plus-1 Cortex A15 “r3”
Kepler GPU
2x ISP
2160p30 Video Encoder
ARM7
USB 3.0
tives and extensions that allow programmers to use C and C++ to execute code in parallel on the GPU cores. Thus the GPU was dubbed a general-purpose graphics processing unit (GPGPU). While CUDA was developed and is supported by NVIDIA, there is another framework called OpenCL, which like the graphicsoriented OpenGL was developed by the non-profit Khronos Group. NVIDIA has stated that it is willing to support OpenCL 1.2 for the Tegra K1 “based on customer needs.” The availability of a processor such as the Tegra K1 in the mobile space opens up possibilities for speech recognition, gesture recognition, computer vision and live video processing in small, even handheld, devices. It will certainly not be the last. The availability of compatible language platforms that can move applications among different models, even different vendors, of graphics and GPGPU engines seems destined to accelerate the development of such devices and the expansion of high-performance embedded computing as well. And disguise it as the work of space aliens if you will, the implications for human ingenuity are immense.
Security Engine
MIPI DSI/CSI/ E, MMC 4.5 HSI
2160p30 Video Decoder
HDMI
Dual Display
UART
DDR3L LPDDR2 LPDDR3
SPI SDIO
I2S I2C
Audio
NVIDIA Santa Clara, CA (408) 486-2000 www.nvidia.com
FIGURE 3 NVIDIA Tegra K1 Mobile Processor (32-bit version).
CMYK Outlined
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TECHNOLOGY
CORE
Moving Android into Embedded
Android for Embedded: The Good, the Bad and the [insert adjective here] As with embedded Linux before it, the complexity inherent in building and shipping and monetizing Android-based designs is not stopping or even slowing adoption. by Bill Weinberg, Black Duck Consulting
A
ndroid, Google’s mobile phone platform, has now climbed to the top of the embedded OS heap, where it reigns together with other versions of Linux and FreeRTOS. The ascendency of this mobile operating system may surprise embedded industry veterans—Google’s mobile OS boasts a large resource footprint, it’s not particularly well suited to serve real-time response requirements, and its functions are very display-centric. Objections notwithstanding, Android’s popularity is large and still growing for applications as diverse as automotive (OEM and aftermarket IVI), wearable computing (wristwatches, head-up helmet displays and smart glasses), robotics (for domestic and telepresence applications), multimedia (TVs and media players), special-purpose tablets (most notably, the Amazon Kindle) and even near-earth satellites. Device manufacturers are designing in Android not because doing so is (merely) stylish, but because the OS reflects the confluence of technology and market trends building over the last five years: • Increasing deployment of free and open source software (FOSS) in intelligent devices • U biquitous device connectivity, especially over TCP/IP networks • Cost-effective availability of multi-
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OCTOBER 2013 FEBRUARY 2014 RTC RTCMAGAZINE MAGAZINE
core silicon for most or all types of intelligent devices • Ever-declining costs from DRAM and flash memory, with higher integrations of both in existing form factors • Similar (if less precipitous) downward trends in display and touchscreen prices • Differentiation through total user experience (UX) vs. core device functionality (even previously headless devices now often sport attractive UIs)
To evaluate it as an embedded operating system is to examine if and how Android really supports these trends, and to call out a few other areas where the OS may or may not fit the embedded applications bill including cost and licensing, differentiation, the applications marketplace and security.
Cost and Licensing
Android, like other FOSS, is free in the sense of free speech—the vast majority of the Android platform is released under FOSS licenses that promote and
OEMs and engineers are highly motivated to “make it work” and so will continue to develop with and deploy Android. • A burgeoning Android applications marketplace that drives developer fluency in Java and the Android programming framework • OEMs’ desire to leverage Google Play, both for the million+ apps offered there and as a distribution mechanism for OEMs’ own device-specific applications • “Business-friendly” Apache 2.0 licensing of the Android software stack
preserve the free circulation of underlying source code (see below). Acquiring that code is also free as in free beer—Google provides versions of the majority of the platform in repositories. Costs for Android come in the form of multicore CPU, GPU, DRAM, Flash and other resources required for an acceptable user experience (UX). And, while costs for these and other components continue to fall, it’s still very possible to underspec devices. Insufficient hardware provision-
TECHNOLOGY CORE
ing and accompanying UX degradation is a key cause of staggeringly high return rates for Android handsets, watches and other gadgets—reportedly 30% or more for some devices. The moral is that it’s worth not skimping on a solid BoM for your Android-based design. Other costs are not a mystery to OEMs—integration, customization, QA, etc., which are no different with Android than with Linux or other embedded platforms. The Android project presents developers and OEMs with a tempting and liberal licensing regime. The project licensing states, The preferred license for the Android Open Source Project is the Apache Software License: Version 2.0 (“Apache 2.0”), and the majority of the Android software is licensed with Apache 2.0. The Apache 2.0 license is indeed OEM-friendly, in that many or most device manufacturers still consider low-level hardware interfaces to be proprietary. Indeed, the Apache 2.0 license section “4. Redistribution” states, You may reproduce and distribute copies of the Work or Derivative Works thereof in any medium: with or without modifications, and in Source or Object form, provided that You meet the following conditions: Which are redistribution of the license itself; notification of modification in source files if/when redistributed; retention of copyright, patent, trademark and attribution notices in source files and a human-readable NOTICE of the above. Yes, redistribution of (modified) source code is completely optional. However, Apache 2.0 is not the whole licensing story. The Android Licensing page goes on to say: While the project will strive to adhere to the preferred license, there may be exceptions that will be handled on a caseby-case basis. For example, the Linux kernel patches are under the GPLv2 license with system exceptions. In fact, the Android sources include code distributed under at least 19 different open source licenses, including those with reciprocal and liberal requirements—from GPL to LGPL to BSD to Public Domain, and points between.
This diversity is not a bad thing per se—it reflects the multiplicity of projects upon which Android is built, including the Linux kernel (GPLv2), Webkit (BSD/ LGPL), SQLite (Public Domain with other licenses for tools/scripts) and others. However, the panoply of licenses does defy the perception that Android platform is “all Apache” with minimal compliance requirements. Given that OEMs frequently customize Android “from the bottom up,” adding modifications to the underlying Linux kernel—starting with device drivers—Android is no more (or less) business friendly than any other Linux-based platform with comparable compliance requirements.
Differentiation
Adding an attractive UI to a hitherto headless device or one with a ho-hum interface provides an alluring upgrade and an opportunity to differentiate a product in crowded markets. Android can certainly provide a path to differentiation, not only with splashier visuals but by turning a mono-function device into an “applications platform.” This re-invention is evident in devices that already boast attractive UIs—DTV and IVI in particular. But Android is not the only “path eye-candy,” and it’s certainly not the least costly to implement—numerous proprietary and open source UI graphical and UI frameworks (Qt, e17, PEG, FancyPants, etc.) can deliver the same (or better) visual oomph with lower-end graphics and application processors, usually without GPU. The application platform aspect of Android—the ability to run apps from OEMs, channel partners and diverse third parties—is quite attractive, but only if those third parties are actually likely to offer apps for your device or device-type. Moreover, it’s important to ask if a device use case truly accommodates third-party apps. For example, would you want to play games or risk malware on Android-based medical or industrial devices? Finally, while it is an advantage to be the first OEM “on the block” to offer an Android-based device in a given vertical market, competitors and copycats will soon follow, at which point your device will be “just another Android.” Un-
less, of course, you can further customize and brand the Android look-and-feel. Fortunately, Android is quite amenable to reskinning (much more than Microsoft Windows Embedded, Windows Phone and family). Unfortunately, many OEMs and app developers strive to customize Android in ways that require use of Android native APIs (via Android NDK), forking the platform and/or creating apps that only run on select devices, thus limiting interoperability.
Application Marketplaces
Given that Android-based devices have the potential to run third-party apps, it behooves OEMs and developers to consider exactly how they will leverage Google Play and other Android apps markets, and/or will instance their own device or brand-specific app stores as Amazon has done. Some device types will benefit greatly from a broad selection of existing third-party apps—especially tablets and DTVs, and of course mobile phones. Other types will only benefit from app stores as streamlined distribution channels, with limited need or capability to run most of the million+ apps on Google Play. The real benefit of building your next device with Android comes not from existing apps but instead from the global community of Android apps and platform developers. The lure of a hit app has created a worldwide gold rush, with hundreds of thousands of developers being trained to code for the platform, and ISVs and development houses building practices to deliver ready-to-deploy and custom apps to OEMs and enterprise alike. But two bits of caution should temper OEM enthusiasm over leveraging what is truly a vibrant market. The first is that apps developers are usually not platform developers—they can create software for your device only once it is stable and marketready. Embedded systems programmers, for Android as for Linux as for RTOSs, are still in high demand and low supply. The second is that just because you release an Android-based device, developers will not spontaneously craft apps tailored for it. You still have to create and nurture a developer community that reflects the particulars of your device and vertical marketplace. RTC RTCMAGAZINE MAGAZINE FEBRUARY OCTOBER 2013 2014
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TECHNOLOGY CORE
Would you want to play games or risk malware on Android-based medical or industrial devices? Security
Android suffers from a less-thanstellar reputation when it comes to security. In particular, the bazaar-like nature of Google Play and other app stores has resulted in wholesale distribution of malware itself and new vectors for it. Some estimates for infected or spoofed Android applications run as high as 90+%, with the U.S. Department of Homeland Security attributing 79% of all mobile malware to the Android platform. Putting aside applications for the moment, Android itself enjoys a fairly robust security architecture. Android networking, network security, file systems and user security model are shared with Linux, whose architecture and development community boast highly effective technical and procedural mechanisms to prevent and respond to a range of exploits. Moreover, Dalvik (Google’s cleanroom
Java VM for Android) has not suffered from the same security woes as Oracle’s original implementation. For both the underlying Linux kernel and for Dalvik, it is key to enable timely updates to system software for Internetfacing Android-based systems, which is to say, practically all of them. The application’s front requires a rather more draconian approach to secure the platform. While you may have chosen Android for its openness, you are best served security-wise by locking down applications on your device, sourcing them through known secure channels, and/or using secondary solutions, third-party containers and other isolation mechanisms to wall off apps of uncertain provenance. In weighing the aspects of Android’s suitability for today’s embedded designs, there is clearly the good—cost, mostly
CUBE
The
™
liberal licensing, high functionality, ample applications and multiple apps channels, and a global and energetic developer community. But there’s also the bad—the need for heftier BoMs, Android fragmentation and the malware morass. But more than good or bad, designing and deploying with Android, like most things in life, is complicated—the double-edged nature of differentiation with the platform, finding the right strategy for leveraging app stores and developer communities, and the need for comprehensive license compliance in spite of the “Apache Inside” label on the cute green box. Black Duck Consulting Burlington, VT (781) 891-5100. www.blackducksoftware.com
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FEBRUARY 2014 RTC MAGAZINE
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TECHNOLOGY IN
CONTEXT
Flexible I/O for Stackable Modules
New Stackable I/O Modules Revamp the World of Embedded SBCs Expanding I/O for small form factor systems had produced a number of solutions. Introduced here is a specification that is small, modular and processor/CPU board-independent. by Robert A. Burckle, WinSystems
E
mbedded computers are ubiquitous, finding their way into a never ending array of industrial, mil/aero, communication and transportation applications. Originally single board computers (SBCs) were mainly available with x86 processors, but now a wave of ARM-based, single board computers has become available. This is due in part to the migration and influence of ARM technology from mobile and portable consumer applications plus the popularity of the Linux and Android operating systems. Furthermore, I/O expansion is now on high-speed, processor-independent serial buses rather than on older generation parallel bus technology associated with the desktop PC. Yet with highly integrated power and I/O functions on an embedded SBC, additional I/O expansion is still often necessary. A designer may need more I/O options and flexibility either because an SBC does not exactly meet the specification or there is a need for more options later in a project’s life due to engineering or marketing uncertainties. A planned solution strategy is needed to prevent engineers from painting themselves into a corner. Although USB and Ethernet ports work well for I/O expansion in commercial applications, often this is overkill or not an appropriate interface solution for industrial, medical, security and other rugged environments.
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OCTOBER 2013 FEBRUARY 2014 RTC RTCMAGAZINE MAGAZINE
FIGURE 1 A 50 x 72 mm IO60 card is smaller than a standard business card.
With an SBC, I/O is brought off the board through a set of connectors, and cables that are attached directly to them. In some cases these connectors are “PCstyle” allowing a LAN cable, printer, keyboard and USB device(s) to connect directly to the board. In other cases these connectors are pin-headers, requiring a transition cable with another connector at the end that mounts to an enclosure bulkhead, or a pin-header that connects to another PCB. Sometimes there is a single card consumer mezzanine con-
nector such as PCI Express MiniCard (or Mini PCIe card) for Wi-Fi. If an SBC needs I/O expansion beyond what is supported on board, then expansion using offthe-shelf or custom designed I/O boards is required. Otherwise the selection of a different SBC is required, which is timeconsuming coupled with the possibility that the desired combination of features and functions are not even available from a different standard product. Since small form factor SBCs are not mounted in card racks, I/O modules are
TECHNOLOGY CORE
Expansion Bus Considerations
So, what is the solution? Both SBCs and COM products coexist peacefully in a growing off-the-shelf board market where OEM design expertise, design time frames and design and product costs drive solutions either to the COM side or the SBC side. Yet, for either approach, a designer needs small, reliable, proven, easy-to-use, cost-effective, stackable and processor-independent I/O modules to support a variety of specialty application interfaces that are not on the SBC or COM carrier board. Over the years, an ecosystem of I/O board companies has emerged with expertise in
PCIe x1 IO60 Interface Connector
stacked on the main board (baseboard) to provide expansion. They can be a onecard mezzanine or multiple cards stacked “piggy back” on top of each other. MiniPCIe is an example of a popular mezzanine expansion for I/O cards using PCIe and/or USB. PC/104 and its subsequent updated technology configurations are popular for multiple board stacking configurations; however traditionally, it is tied to the x86 signals. What is lacking is a more universal, stacking I/O module that is processor independent. Another solution similar to an SBC is to use a Computer-on-Module (COM). A COM is a system module processor “component” that must be plugged into a baseboard or “carrier card” to make a two-board system equivalent in power and functionality to an SBC. With a COM approach, I/O is brought to a baseboard that is developed by the OEM or by a thirdparty design house commissioned by the OEM. This custom baseboard is a size that best fits the application and its enclosure or packaging requirements. Using a COM card is great for applications where the creation of a custom carrier card is not considered a handicap due to cost or time constraints. However, for many low- and medium-volume applications, SBCs are the better choice since they mitigate NRE costs and/or design resources, risk and time-to-market. Regardless of whether a designer uses an SBC or a COM/carrier board approach, both still need I/O expansion flexibility to deal with project changes, feature-creep and other unknown issues during the life cycle of a product.
4
SPI/µ Wire SMBus/I2C UART PWM and Timer
8
GPIO +5, +3.3V
FIGURE 2 IO60 Signals.
certain I/O and device drivers that can save time-to-market compared to OEMs re-inventing the wheel themselves. However, as design engineers survey the realm of real-world expansion boards for single board computers, they quickly discover that there is no uniform standard in the ARM market. Individual manufacturers may offer company-specific I/O, but nothing that is designed to be an industry standard. The most mature market in the x86-centric universe is PC/104 technology, but a design goal would be to find I/O expansion modules that would support both processor architectures as well as be chipset independent.
Introduction to IO60
IO60 is a small, self-stacking I/O module using a 60-pin connector for use in industrial embedded applications. Similar in concept to PC/104 or Pico-I/O, its goal is to provide a processor-independent, compact, stackable, I/O expansion solution independent of the CPU board’s form factor. Unifying expansion interfaces across many single board computer and COM carrier form factors has the potential to consolidate I/O ecosystems, which could improve economies of scale for off-the-shelf I/O Also, it would offer simplicity for users to design and build their own boards unique to their application requirements. Its flexible and compact size is small enough to meet a very broad range of deeply embedded application requirements. This smaller I/O form factor
can enable a host of new space-conscious mobile OEM equipment for future new and growing remote computer monitoring and control markets. The size of an IO60 module is defined as 50 x 72 mm. Two holes are defined for threaded spacers that are used to provide accurate board separation and rigidity. The size is small enough to work with a 72 x 100 mm Pico-ITX board and larger standard formats such as EPIC, 3.5in and EBX boards or even custom sizes as well. An engineer can therefore take advantage of the denser electronics available for the ever-shrinking size of processor modules in the embedded-computer marketplace. This reduces cost and bulk while increasing mounting and packaging options for small form factor embedded systems. With all of these features, IO60expandable systems enable small, rugged and reliable computer systems that are powerful, easy to use, cost-effective and scalable (Figure 1). One of the design criteria of IO60 is to keep it relatively simple to target midrange monitoring and control applications. Another reason focuses on specialty interfaces not supported by USB, Ethernet and other standard ports that are commonly implemented on SBCs and COM baseboards. Note that PWM and Timer inputs, general purpose I/O (GPIO) and UART signals were added to interface to direct control circuits without the complexity of bus bridges or FPGAs hanging off of PC-focused buses. Currently IO60 supports the following I/O connectivity technologies: • One PCI Express x1 channel • Four SPI/uWire channels • SMbus/I²C bus • PWM and Timer Inputs • Eight GPIO • One 4-wire UART channel IO60 modules each use one or more of the buses in Figure 2 and pass unused resources further up the I/O stack. Also, there is +5V and +3.3V power plus six undefined pins on the connector for future expansion.
Connector Technology
A unique feature of IO60 is a 60-pin, hermaphroditic, self-mating, low-cost RTC RTCMAGAZINE MAGAZINE FEBRUARY OCTOBER 2013 2014
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TECHNOLOGY CORE
FIGURE 3 Both the 3.5-in ARM SBC and 3.5inch COMe Type 6 carrier board with Intel Atom with IO60 expansion.
stacking connector suitable for rugged conditions. The interconnect system is polarized and fully shrouded when mated. The Samtec LSEM Series board-to-board connector has a double row of thirty goldplated contacts per row set on a 0.8 mm pitch. The connector is 6 mm high and capable of supporting PCIe speeds up to 9.5 Gbyte/s to allow high-speed and medium to low-speed serial buses to be mixed on the same connector.
Compact Devices for IoT Applications Integrated security, connectivity and manageability
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FEBRUARY 2014 RTC MAGAZINE
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If more than one IO60 board is required, then a stack is assembled in one direction only. The most common direction is “up” (above) from the processor board (SBC), which is defined here as the bottom board. If a processor board requires IO60 module(s) to stack opposite from the major components, placement of the IO60 connector must be reoriented respective to the “bottom” side of the board. This ensures that standard IO60 expansion modules stack as normal, just opposite to that of the major components on the processor board. An example of this requirement is a COM Express Type 6 carrier with its Intel processor mounted on the bottom to use conductive cooling for the module. To show a real-world example, WinSystems offers both a high-performance ARM-based SBC and COM Express Type 6 carrier board with IO60 expansion. The ARM board hosts a single, dual or quad core processor plus a combination of PCtype and box headers for I/O. The COM carrier board supports the latest Intel Atom “Bay Trail” system-on-chip (SoC) and similar processors with a similar I/O complement. Both support IO60 expansion with modules for digital, serial and GPS expansion to meet applicationspecific requirements. These boards are rugged and capable of withstanding shock and vibration plus extended temperature operation (Figure 3). IO60 is processor agnostic. It is similar in concept to PC/104 but updated in its technology of a new, stackable, I/O expansion standard that supports the serial bus technology and newer popular operating systems like Linux and Android. The advantage of IO60 is the simplicity of design and interface options that allow OEMs to quickly design with relatively low technology interfaces up to high-speed PCIe. Plus, IO60 is smaller in size yet rugged for harsh and demanding environments. More details plus a specification is available free of charge from WinSystems for any company wanting more information. WinSystems Arlington, TX (817) 274-7553 www.winsystems.com
Industrial ARM® Single Board Computers High-Performance Graphics with Industrial I/O and Expansion -40° to +85°C Operating Temperature Designed for demanding applications and longterm availability, WinSystems’ SBC35-C398 single board computers feature Freescale i.MX 6 industrial application processors with options for expansion and customization.
Features • ARM Cortex™-A9 Processors; Quad, Dual, or Single Core • Multiple Graphics Interfaces • Wide Range DC or PoE Power Input • Gigabit Ethernet with IEEE-1588™ • USB 2.0 Ports and USB On-The-Go • Dual FlexCAN Ports • Multiple Storage Options • Mini-PCIe and IO60 Expansion • Linux and Android™ Supported
Call 817-274-7553 Ask about our product evaluation program.
Learn more at www.WinSystems.com/ARMR 715 Stadium Drive • Arlington, Texas 76011 Phone 817-274-7553 • FAX 817-548-1358 E-mail info@winsystems.com WinSystems® is a registered trademark of WinSystems, Inc. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Android is a trademark of Google Inc. The Android robot is reproduced from work created and shared by Google and used according to terms described in the Creative Commons 3.0 Attribution License.
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TECHNOLOGY
CONNECTED Embedded Security for the Internet of Things
Providing a Built-In Foundation for Internet Security Protecting the Internet of Things from attacks on critical data and designs requires that modern embedded systems be effortlessly and inexpensively secured with a combination of flexible, intelligent and reactive countermeasures all built on a hardware root-of-trust. by Michael Mehlberg, Microsemi
T
he economic growth of the Internet of Things is unlike any other in recorded history. With estimates of over 200 billion connected devices by 2020, Internet-connected devices are influencing nearly every facet of modern life. The Internet of Things is impacting a multitude of markets from robotics to point of sale systems to mobile computing devices to 3D printing. Embedded systems produced in these markets are helping to inform us, make autonomous decisions on our behalf, communicate with business associates and even manage our finances. These embedded systems have been growing in complexity to support the features and interconnectedness end-users are demanding. Unfortunately, if not addressed during design, this complexity can lead to severe security vulnerabilities. Compromise of one or more of these devices has led to devastating effects for governments, corporations and consumers. As a case in point, the recent attack on a point of sale (POS) terminal used by Target shoppers during the busy holiday shopping season has led to the compromise of over 40 million personal credit cards and associated personal information. It is important to note that these attacks were not performed on servers in some remote centralized data center.
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FIGURE 1 Design example of a smart energy meter and control system.
Rather, the attack vector was the POS terminals in stores—embedded system endpoints in the network. In the past, most embedded systems were “walled off� from remote cyber attacks and protected within organizations against physical attacks. In the Internet of Things, these embedded systems are distributed to consumers and connected to networks making both remote and physical attacks much more likely. Many of
these systems will not stand against either form of attack; they are simply not secure.
Increased Complexity, Stagnant Security
Unlike a general purpose computing platform such as a PC, laptop, or tablet, an embedded system is typically built for a single purpose and serves a dedicated function within a larger system. Smart meters, watches and commercial flight
TECHNOLOGY CONNECTED
systems are all examples of modern embedded systems. In the past, embedded systems have been stand-alone, walled off from the Internet and without the capabilities for intra-device communication. Over the years, these embedded systems have increased in sophistication with built-in network connections becoming more prevalent. Many embedded development boards such as the popular Arduino Uno can be purchased for less than $100 and come standard with a microprocessor, memory, flash storage and Ethernet. Unfortunately, though the connectedness and sophistication of these systems is increasing, their security is not. Recently, security discussions have revolved largely around Internet-based “cyber attacks.” While the scale of such attacks makes for great publicity, the Internet of Things is changing the landscape of embedded systems attacks, making physical attacks on endpoints in order to compromise other systems and critical data or designs not only possible, but cheaper and more effective. No longer does an attacker need to penetrate a heavily fortified server buried in a data center. The data and designs they are after are now in their hands. In May 2010, the FBI distributed an intelligence alert regarding widespread power theft discovered by an electric utility company in Puerto Rico. Its findings were eye-opening, though not surprising. According to the report, consumers and corporations were paying former utility company employees between $300 and $3000 to reprogram smart meters, saving up to 75% on their utility bills. Smart meters, unlike traditional mechanical electric meters, are embedded systems with communication capabilities aimed at allowing utility companies to configure the meters and administer immediate price changes remotely (Figure 1). With physical proximity (direct physical access is not necessary) to the smart meter, publicly available tools and less than $500 in equipment, smart meters were being programmed to distribute free power, potentially causing up to $400 million in losses annually.
Security vs. Time-to-Market
Despite these examples and the widespread distribution of insecure systems in
FIGURE 2 Design example of a smart energy meter and control system implementation with added security features.
the market, embedded system vulnerabilities do not originate from a lack of understanding on how to secure such systems. If desired, a deep reserve of security knowledge and resources could be called upon to mitigate many security weaknesses. Rather, embedded system vulnerabilities can often be traced to product competitiveness, specifically with regard to cost and time-to-market. Consumers are demanding lower power products with ever increasing feature sets at a faster pace than ever before. Mobile computing devices such as Apple’s iPhone and Samsung’s Galaxy phones have seen significant enhancements every 12 and 6 months respectively. Arguably, these devices are leading the market in terms of the security they have implemented within. However, companies with fewer resources cannot move at a slower pace and hope to remain competitive. Skimping on features, extending development schedules, or increasing resources is simply not an option. As such, security tends to be the forgotten or ignored area when deciding which features to produce and on what timeline. The “can’t happen to me” or “we’ll fix it if it becomes a problem” mindset takes hold. After all, it’s always easier to justify buying pain medication over health insurance. It is with this in mind that we get to the heart of the matter. Embedded systems, especially those vulnerable to
physical attacks or those connected to the Internet, must contain built-in security, preferably designed in from conception (Figure 2). This security must be based on a set of reasonable, implementable and cost-effective requirements. Embedded systems security is no easy task, but it must become so, lest it be forgotten alongside the valuable features consumers are demanding. Not only must the security of embedded systems require countermeasures against modern attacks, but it must also be implemented quickly and effortlessly with minimal cost. To accomplish the objectives of modern attack countermeasures implemented quickly and cost effectively requires two major requirements: 1) Embedded system security must be based on a root-of-trust built-in hardware and 2) Embedded systems must be easily and cost-effectively configured to meet their own unique security needs with what must be a layered, flexible security design.
Hardware Root-of-trust
Secure embedded systems must start with a hardware root-of-trust. A hardware root-of-trust can force an attacker to use expensive and inaccessible reverse engineering tools. More so—unlike software that can be copied, modified, lost and brought back to life—hardware can destroy critical portions of itself causing a would-be attacker permanent setbacks. RTC RTCMAGAZINE MAGAZINE FEBRUARY OCTOBER 2013 2014
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TECHNOLOGY CONNECTED
Hardware Root-of-Trust e.g., SmartFusion2 Secure SoC FPGA
JTAG Configuration and Test
Slave
Challenge(s)
Master
OSC
Main MPU
Response(s)
Cortex-M3
SPI
SPI Flash
Target Processor Phase 0 Code
Phase 1-4 Code
TRNG
SPI
PCIe
Slave
eSRAM
Main MPU Phase 0 Boot Code 0. Trusted Boot Code Main MPU NVM 1. BIOS 2. OS Loader 3. OS 4. Application Code
eNVM
Master
CPU
PUF FPGA
USB
Possible Low-Cost PCB Tamper Detection Mesh
Power Enables
SRAM
Etc.
RESET JTAG
POL
DDR
POL Power to Board
Tight integration with other board functions such as power management make bypassing the HW root-oftrust more difficult
Code loaded into on-chip SRAM is validated before branching to it
JTAG or other interfaces may provide alternate paths to validate Phase 0 code wasn’t tampered with
FIGURE 3 Microsemi SmartFusion2 FPGA root-of-trust.
Without trust rooted in hardware, bending a device to an attacker’s will is simply an exercise in patience, skills and time—all easily surmountable challenges. One example of a hardware root-oftrust is Microsemi Corporation’s SmartFusion2 field programmable gate array (FPGA) shown in Figure 3. Many of the security features necessary to establish trust in an embedded system are built directly into the silicon of this FPGA. These include public and private-key cryptography for encrypting critical data and authenticating other parts of the system, resilience against side channel attacks such as differential power analysis (DPA), physically unclonable functions (PUF) for uniquely fingerprinting the part to prevent counterfeiting, and anti-tamper meshes protecting the device against physical attacks. It is with these security measures that a root-of-trust can be established within an embedded system allowing the user to extend security throughout their design.
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Programmable Security Layers
Having the most secure hardware is not the only piece of the system security puzzle. One key disadvantage of hardware is that, once deployed, it cannot be modified. Furthermore, it is neither schedule- nor cost-effective to change. Finally, though a hardware-only security solution for one particular system may be highly effective, it is unlikely to be utilized the same way in a different system. Since each embedded system will have unique vulnerabilities and threats, the security of that system must be configured uniquely to it. Therefore, flexibility in design is paramount to ensuring the security needs of a particular embedded system is met. Flexing this design without incurring the enormous cost of a hardware modification is ideal. In short, the balance of a secure system must lie in the interaction between appropriate hardware security penalties and unique programmable security configurations.
As an extension to the hardware security provided in the Microsemi SmartFusion2 FPGA, a user-configurable, programmable security IP core called EnforcIT Security Monitor can be installed at design time to add the flexibility required (Figure 4). The EnforcIT Security Monitor is a single, low-resource soft IP block capable of monitoring and responding to an assortment of internal security flags and system conditions. Taking full advantage of the tamper detectors and responses built into the FPGA silicon, it can be configured to report threats, act autonomously or some combination of the two allowing the user to find the right balance between security, performance and safety. These configurable security features, once established in hardware, can be customized quickly and easily by the designer into a secure solution that both defends and reacts to attacks. The importance of reactions in the context of a secure system cannot be understated. Defensive
TECHNOLOGY CONNECTED
JTAG Monitor EnforcIT Security Monitor
Clock Monitor Heartbeat
(IP Block)
Watchdog Hardware Alarms
User Logic Hardware Alarms
ALARM_PRESENCE
Hardware Actions
ALARM_ACTION
User Logic SmartFusion2/IGLOO2 Flash Fabric
protect their own business logic from reverse engineering while protecting their consumers from losing sensitive and valuable data. The advanced hardware security found in Microsemi FPGAs such as the SmartFusion2, combined with the simple configuration, flexibility and reactive response capabilities found in countermeasure logic such as EnforcIT Security Monitor, allow embedded system designers to build security into their next generation designs and provide for a safer, more secure Internet of Things. Microsemi Aliso Viejo, CA (800) 713-4113 www.microsemi.com
FIGURE 4 Microsemi EnforcIT Security Monitor programmable security IP block.
measures act only as a speed bump to an attacker, making it more difficult than it would normally be to exercise an attack. Reactions are important to setting an attacker back in their endeavors. As an example, preventing against differential power analysis attacks on key material stored in the SmartFusion2 FPGA will delay an attacker from recovering the keys. Turning that same SmartFusion2 FPGA into a brick through its zeroization feature upon detection of such an attack spells game over. With the massive growth in interconnected embedded systems, a hardware root-of-trust with flexible layers of security logic and active countermeasures like zeroization is required to protect critical data and design from compromise. The ability to quickly and inexpensively configure a hardware root-of-trust, uniquely locking critical designs and data to address system-specific security requirements offers advantages. Embedded system designers are more likely to secure their embedded systems against malicious attackers, prevent the creation of unauthorized cloned devices, and ultimately
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RTC MAGAZINE FEBRUARY 2014
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Rugged Boards & Solutions We know PCIe/104. And we do it best. At RTD, designing and manufacturing rugged, top-quality boards and system solutions is our passion. As a founder of the PC/104 Consortium back in 1992, we moved desktop computing to the embedded world. Over the years, we've provided the leadership and support that brought the latest signaling and I/O technologies to the PC/104 form factor. Most recently, we've championed the latest specifications based on stackable PCI Express: PCIe/104 and PCI/104-Express.
With our focused vision, we have developed an entire suite of compatible boards and systems that serve the defense, aerospace, maritime, ground, industrial and research arenas. But don't just think about boards and systems. Think solutions. That is what we provide: high-quality, cutting-edge, concept-to-deployment, rugged, embedded solutions. Whether you need a single board, a stack of modules, or a fully enclosed system, RTD has a solution for you. Keep in mind that as an RTD customer, you're not just
working with a selection of proven, quality electronics; you're benefitting from an entire team of dedicated engineers and manufacturing personnel driven by excellence and bolstered by a 28-year track record of success in the embedded industry. If you need proven COTS-Plus solutions, give us a call. Or leverage RTD's innovative product line to design your own embedded system that is reliable, flexible, expandable, and serviceable in the field for the long run. Contact us and let us show you what we do best.
Copyright Š 2014 RTD Embedded Technologies, Inc. All rights reserved. All trademarks or registered trademarks are the property of their respective companies. RTD is AS9100 and ISO9001 Certified, and a GSA Contract Holder.
www.rtd.com • sales@rtd.com
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RTD Embedded Technologies, Inc.
TECHNOLOGY IN
SYSTEMS
Intelligent Sensors in Intelligent Applications
Building Power-Efficient, ContextAware Mobile Systems The availability of a wide-range of low-cost, small-footprint sensors promises to bring a rich variety of exciting new context-aware applications to mobile systems across a wide range of medical, industrial, scientific and commercial applications.
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oc
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FIGURE 1 Relative power consumption of three different sensor hub implementations.
Don’t be surprised if smartphones in the very near future feature heart monitors and perspiration detectors to track user health, excitement level and mood.
Fast and Power Efficient
To make effective use of all this sensor data and optimize decision-making, however, today’s mobile systems must integrate and analyze multiple streams of data as quickly as possible. The faster data is collected from the sensors and processed into usable information, the more accurate the system’s response will be to current environmental conditions. Moreover, since these “context-aware” sensor-based subsystems are always on,
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they present a potentially significant drain on system power. Accordingly, these tasks must be performed as efficiently as possible from a system power perspective. Mobile system architects can employ any of three design strategies to address this problem. They can use their system’s core applications processor to manage sensor data. They can offload the task to a discrete microcontroller (MCU) to manage the task. Or they can build an integrated sensor hub using an ultra-low-density (ULD) field programmable gate array (FPGA) to support the application processor in the same way. Each approach offers its own benefits and liabilities. Designers interfacing each sensor directly to the application processor can take advantage of a proven architecture that leverages existing system resources. But as the number of sensors continues to escalate, designers will inevitably run into limited GPIO resources. Over the long run that restriction may threaten the designer’s ability to implement important new functions. At the same time the interface limitations inherent in any fixed-silicon MCU restrict design flexibility. Each sensor brings specific interface requirements. Some feature iC
100
Ap
T
ake a quick look at the latest generation of smartphones from leading manufacturers and one conclusion quickly becomes apparent. Designers are continuing to add new levels of intelligence in highly creative ways. Two factors are driving current innovation. One is the rising proliferation of low-cost sensors. Significant advances by MEMS manufacturers are helping drive down sensor cost and footprint. The second is the smartphone designers’ ability to develop new “context-aware” subsystems that allow mobile devices to make advanced, task-enhancing decisions without prompting the user. This revolution arguably began when leading cell phone makers began embedding proximity sensors to extend battery life and accelerometers, gyros and magnetometers to support location-based services. But today’s sensorbased context-aware subsystems go well beyond those capabilities and mimic in many aspects how humans analyze situational context. For example, precision image sensors and ambient light sensors boost image resolution and display readability as environmental conditions change. Chemical analyzers simulate human smell awareness. Pressure, temperature, chemical and infrared sensors can measure a smartphone user’s health and help evaluate safety risks. And more sensor-based, “contextaware” applications are clearly coming.
Always On Power Adder (mW)
by Joy Wrigley, Lattice Semiconductor
TECH IN SYSTEMS
Processor versus ULD FPGA Power Comparison: The Pedometer Test Case IR Remote 2mm x 2mm
RGB LED Driver 2.5mm x 2.5mm
ICE40LP
1.48mm
1.40mm
IR Remote, Barcode Emulator, LED Driver, Custom Algorithms
Total Area 10.25mm2
Total Area 2mm2
FIGURE 2 Comparing the footprint requirements of a discrete vs. a programmable IR subsystem.
industry standard interfaces; others employ proprietary solutions. Meeting future sensor interface needs in a single application processor or MCU can increase design complexity and sometimes extend the product development cycle. Perhaps most importantly, the effects of a multi-sensor architecture on a typical interrupt-driven application processor pose severe new power demands, particularly given the always-on nature of today’s context-aware sensor subsystems. The continuous collection of time-sensitive data from a growing number of sensors forces the application processor to remain operational longer and places additional demands on a mobile system’s already tight power budget. In many of these emerging, alwayson, context-aware applications, a better option lies in using an ultra-low-density (ULD) FPGA specifically optimized for mobile applications. Unlike traditional large, expensive FPGAs, this new class of device comes in low gate-count densities housed in highly compact CSP-class packaging. Yet they offer the logic resources needed to support sensor management and pre-processing functions and can be manufactured in high volume to take advantage of economies of scale. This design approach is particularly attractive in context-aware applications, which by definition must be always on, because it allows system designers to limit the runtime of the relatively powerhungry interrupt-driven applications processor. With a ULD FPGA, designers can
collect information from multiple sensors in parallel and in real time at a significantly lower clock rate than a traditional application processor or MCU. Consuming less than 1 mW, these ICs dramatically reduce power consumption compared to traditional approaches while collecting data from each sensor at near-zero latency for more accurate system response to changing environmental conditions. This further allows the application processor to stay in sleep mode longer or, if necessary, be periodically active in the lower power states. This approach of offloading time-critical sensor functions to the ULD FPGA improves both the overall power consumption as well as sensor system accuracy (Figure 1). Moreover, as the number of sensors in mobile systems continues to grow, the footprint advantages of a ULD, FPGAbased solution prove increasingly attractive. The IR subsystem in Figure 2 offers an excellent case in point. The discrete solution on the left combines a 2 mm x 2 mm IR remote IC with a RGB LED driver that measures 2.5 mm x 2.5 mm. The total area of the solution occupies 10.25 mm2. As an alternative, designers can implement the same subsystem in an ultra-lowdensity iCE40LP FPGA that measures 1.40 mm x 1.48 mm or about 2 mm2. The programmable solution reduces the board footprint by approximately 80 percent, while offering more functionality by combining an IR remote block, barcode emulator, LED driver and custom algorithms.
To measure and quantify these differences, engineers at Lattice Semiconductor recently constructed a pedometer sensor management demo system using an iCE40LM 4K ULD FPGA. The demo brought together Qualcomm’s Snapdragon evaluation board and SDK with a smartphone display. To represent a multisensor, battery-powered mobile application, the demo added a sensor daughtercard developed by Lattice Semiconductor. Figure 3 shows the compact, highly integrated daughter card. Near the center of the board lies the iCE40LM 4K ULD FPGA housed in a small 25WLCSP package. The FPGA combines 4K gates of logic with a wide variety of embedded IP in the form of hard silicon blocks including two SPI master/slaves, two I2C master/ slaves, a PLL, a low-power strobe generator that operates in the kHz range and a high-frequency strobe generator that runs in the MHz range. It also features RGB/ LED drivers. As the photo shows, the compact daughtercard features a wide range of sensors including humidity, temperature, Hall Effect, ambient light, proximity, barometer, accelerometer, gyroscope, compass and IR transmitter and receiver. To simplify the demonstration of the iCE40LM’s sensor management capabilities, Lattice engineers chose a pedometer application that uses a single sensor, an LSM330 DLC accelerometer, to measure movement. As Figure 4 indicates, the hard IP blocks embedded in the FPGA dramatically simplified system design. The LSM330 DLC accelerometer interfaced to the iCE40LM through one of the FPGA’s embedded I2C master blocks. The FPGA also housed sensor-specific configuration logic and the step detect function logic as well the application processor’s interrupt logic. In this application these circuits dictate how often or in how many steps the FPGA wakes up the application processor and loads information. The FPGA interfaced to the application processor through one of its two embedded, fixed-silicon SPI master/slave interfaces. Figure 5 shows the system set up. The green meter on the left, measuring amps, RTC RTCMAGAZINE MAGAZINE FEBRUARY OCTOBER 2013 2014
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TECH IN SYSTEMS
Humidity & Temperature
Hall Effect Ambient Light
IR Rx
Proximity IR Tx
Barometer
Accelerometer
Gyroscope
iCE40LM4K-25WLCSP
FIGURE 3 As part of the demo system, this highly integrated daughter card combines up to ten sensors with an iCE40LM 4K ULD FPGA
Of course context-aware sensor applications are, by their nature, always on. So with 0 steps on the pedometer, the red meter measured the iCE40LM sensor manager at 732 µA while the applications processor was in sleep mode. To mimic walking with the pedometer, engineers swung the sensor daughtercard back and forth. Data was collected by the iCE40LM FPGA from the accelerometer through its I2C port where it was processed in the FPGA’s sensor-specific control. As part of this process, sensor management and pre-processing functions analyzed the bitstream to evaluate how to parse the data and translate the acquired sensor data into steps. Finally the information was loaded into the accelerometer’s FIFO in preparation for the reawakening of the application processor and display. During this process the highest reading recorded on the red me-
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ULD FPGA versus Microcontroller
Next, the engineering team compared the performance and power characteristics of a discrete MCU sensor management system with the ULD FPGA-based alternative. The team began by implementing a 16-bit RISC-based MCU architecture widely used in mobile applications in the iCE40LM 4K FPGA. As a common benchmark, both the 16-bit MCU and the iCE40LM 4K FPGA were tested during I2C polling—a common function for an “always-on” sensor hub. Both devices were tested using the minimum logic necessary
PWR SPI 1.8V
SPI Slave (Hard IP)
Sensor Configure
SPI Master
IAPQ8060 = 720 mA – 520 mA = 200 mA PAPQ8060 = 200 mA * 0.8V = 0.160 W
ter measuring the FPGA power draw was 737 µA. At this point engineers powered the system up and initiated the application processor and system screen by pressing the wake-up interrupt. As system current increased, the applications processor turned on and queried the FIFO in the iCE40LM to ask for the number of steps recorded by the accelerometer. The data was transferred and the application processor calculated distance traveled, calories consumed and displayed the results on the system screen (Figure 6). A quick review of the pedometer demo results illustrates the significant power savings a ULD FPGA-based sensor management subsystem can offer. During the walking demo the iCE40LM consumed
APQ 8060A
tracked current drain for the entire system. With the display on and the applications processor awake, the meter measured 720 mA. Next, engineers put the applications processor to sleep with the system display showing 0 steps on the pedometer. System current dropped to 520 mA while system power was measured at 160 mW.
at its peak 0.737 mA * 1.2V or 0.88 mW total. That represents approximately 180 times less power than the application processor would have consumed (160 mW) to perform the same task. Given the alwayson nature of context-aware sensor applications, the use of a ULD FPGA-based sensor management system that consumes less than 1 mW, particularly when spread across multiple sensor applications, would clearly extend mobile system battery life. Moreover, the iCE40LM-based sensor management system, occupying a meager 1.7 mm x 1.7 mm footprint, offers designers highly attractive board space savings compared to alternative design options. In addition, its ability to collect sensor data in real time at near-zero latency, unlike an interrupt-driven application or microprocessor, improves data integrity and system fidelity. Finally, the use of a programmable solution that allows the designer to reconfigure I/Os and protocols, as well as optimize the size, configuration and capabilities of each sensor’s FIFO, register and arbiter, offers a level of design flexibility that other design approaches cannot match.
12C Master (Hard IP) Intr
CLK
AP Interrupt Logic
Step Detect
iCE40LM 4K
FIGURE 4 Pedometer application using an iCE40LM ULD FPGA.
12C
LSM330 DLC (Accelerometer)
TECH IN SYSTEMS
FIGURE 5 System setup for pedometer demonstration.
to configure and read the accelerometer at 20 Hz. During the I2C polling function, the iCE40LM 4K consumed 0.538 mW. Power dropped even further to just 418 µW while performing the pedometer application. Toggling between active and low power mode during I2C polling, the MCU solution dissipated approximately 3X as much power as the iCE40LM. The test also produced some insight into the ability of each solution to detect changes in sensor data. The iCE40LM4K-
based solution running at a slow 6 MHz with the I2C interface running at 400 kHz was able to collect 50 samples/s from the accelerometer. The 16-bit MCU running at a faster 8 MHz with the I2C interface running at 110 kHz could only collect 25 samples/s or half the data. The ability of the iCE40KM4K solution to operate with far less latency gives the system a better ability to detect changes in the sensor and react to them more quickly. Ultimately that near real-time response translates into a better user experience. As mobile system designers implement these new capabilities, one of the primary challenges they will face is how to most efficiently process the data collected by these sensors. Leveraging a low-power silicon architecture and innovative packaging technologies, Lattice Semiconductor’s ULD FPGAs offer mobile system designers the opportunity to cost-effectively bring an exciting new class of contextaware functions to next generation mobile systems while minimizing system power and footprint. Lattice Semiconductor Hillsboro, OR (503) 268-8000 www.latticesemi.com
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iCE40LM Sensor Specific Control
PWR
Sensor Specific Control
Registers and Arbiter
SPI Slave
SPI Master
DRAGON BOARD
12C I2C Master
FIFO
SPI
12C I2C Master
FIFO
Sensor Specific Control
12C I2C Master
FIFO
Sensor Specific Control
SPI SPI Master
FIFO
BMP085 Pressure
LSM303DLHC Compass
MPU3050 (Gyroscope)
KXUD9 (Accelerometer)
INT Sensor Specific Control FIFO
12C I2C Master
IS29003 (ALS)
CLK
CFG_SPI
Technology in Quality FIGURE 6 Once data is collected from the accelerometer, it is passed through the I2C port, processed through the accelerometer’s sensor-specific control, and loaded into a FIFO in preparation for the applications processor to turn on and display results.
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RTC MAGAZINE FEBRUARY 2014 TQMa6x V2 1-3 Page Ad.indd 1
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TECHNOLOGY DEVELOPMENT Optical Interfaces
High-Speed Optocouplers in Industrial Communication Networks Today’s industrial networks require accurate data rates for communication in real time and resistance to electrical noise. A new dual-channel, bi-directional 25 Mbit/s optocoupler meets the requirements of today’s industrial networks while providing a high level of isolation in a small form factor. by Chwan Jye Foo, Avago Technologies
I
ndustrial communication networks present unique challenges and require optimized solutions to operate effectively. In today’s factories, many different programmable elements must be precisely controlled so that they will operate in harmony. The communication channel between industrial equipment, controllers, sensors, actuators and other components operates in real time, and must be immune to electrical noise as well as providing safe electrical isolation. Also, industrial communication networks need to provide increasing throughput or production output as industrial control systems become more complex. Fieldbus refers to a family of industrial computer network protocols used for real-time distributed control of instruments. As shown in Figure 1, an automated industrial system such as a manu-
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facturing assembly line usually uses an organized hierarchy of controller systems to function. The top hierarchy is a human machine interface (HMI) where an operator can operate and program the industrial system. This is typically linked to a middle layer of programmable logic controllers (PLCs) or Input/Ouput (I/O) boxes by a non-time-critical communications system such as Ethernet, which by its nature can tolerate dropped packets of data. At the bottom of the control hierarchy is the fieldbus that links the PLCs to the “assembly line” components, such as sensors, actuators, electric motors, switches and valves. These communication links need to be fast so that latency to the sensors and actuators is minimized and system response time is fast, plus they must be real-time links that cannot tolerate interference. In such an industrial environment, high voltages, magnetic fields and noise are commonly present and are caused by motors, power switching and other sources, presenting a challenge to deliver both high speed and resistance to excessive electrical noise so that the real-time nature of the PLC system is preserved. Overall reliability and protection are critical to avoid production downtime.
Internet
Industrial Ethernet
Fieldbus
Isolation Locations FIGURE 1 Typical industrial control network hierarchy.
Fieldbus
TECHNOLOGY DEVELOPMENT
FIGURE 2 Low-profile optocouplers can be mounted on the back of a PCB to save space and reduce form factor.
Trends and Challenges
Industrial Ethernet networks (e.g., Profinet, EtherCAT) were introduced in the early 2000s and they gained acceptance at the supervisory control and basic control levels in the automated industrial system hierarchy. According to IHS, the number of industrial Ethernet processautomation nodes is forecast to double in size with 14% compound annual growth rate (CAGR) through 2016. Along with this growth in industrial Ethernet, fieldbus networks such as Profibus, DeviceNet and Interbus, are still dominant at the bottom hierarchy of the instrumentation and remote I/O level communicating in realtime deterministic protocols. This trend presents several challenges for industrial automation and machinery communications. One is to integrate the industrial devices communicating among different fieldbus platform technologies with the new industrial Ethernet networks. Another challenge is to create an efficient data collection process with more reliable data transfer. A third challenge is to enhance the security of industrial networks to resist external attacks. These challenges place more demands on equipment functionality and better network performance. To meet the challenge of different needs of integration and make industrial devices compatible with different existing and new networks, the automation industry is looking for different form factors in embedded communication solutions to suit their own configurations. There
are requests for off-the-shelf communication modules, a communication mounting “brick” that can attach to network connectors, or even a communication chip that is mounted on a printed-circuit board with other hardware to be designed by the user. A semiconductor chip of small slim and low profile, and which can be mounted easily and suit the different form factors of embedded network equipment, is needed to address these challenges. With the use of industrial Ethernet and fieldbus networks, there are many different network protocols or “languages” to translate and communicate between devices. Higher speed reliable data transfer is essential in creating efficient data collection and processing between industrial devices communicating through these networks. Good electrical isolation immunity is important to minimize electrical noise propagating across network buses and to ensure signal integrity. As highlighted earlier, increased safety through electrical insulation capability between factory devices helps ensure protection. The industrial Ethernet networks provide more functionality and easier access to industrial applications, but one area of concern is the security of a network with links to external communication or the Internet. It is important to prevent any unauVDD1 C4 100n
Isolation
VDD2
U1 1 VDD1 VDD2 8 2 VOA VIA 7 3 6 VOB VIB 4 5 GND1 GND2
Rx Tx
thorized access to the industrial devices or to the control level of the entire automation system. Also, an upcoming functional requirement for new industrial Ethernet network devices is to provide the new Internet Protocol version 6 (IPv6) support in view of the current Internet Protocol version 4 (IPv4) public address pool depletion. New devices still need to support legacy protocols as many of the machinery and “assembly line” components have been in production for many years and still use legacy networks. These place more demands on the new modules to house more advanced chips with secure safety and backward-compatibility communications features. There is a desire to produce modules that can support both legacy fieldbus protocols as well as newer industrial Ethernet protocols. This makes it necessary to pack more functionality into a given size module. Another direction the equipment makers are taking is to offer very thin form factor modules that support a subset of protocols, but which take up less space in the rack. In these multi-protocol modules, isolation components are needed to address the legacy fieldbus protocols. To address these two differing design requirements, it is advantageous to have a slim design module where the back side of
Rx Tx
ACSL-7210 VDD1
Isolation
R1 510 R2
Tx Enable
VDD2
VDD2
U3
U2
1 AN 3 CA
VDD 6 VO 5 GND 4
Tx Enable
1 RO 2 RE_ 3 DE 4 DI
8 VCC 7 B 6 A 5 GND
Fieldbus Network (Twisted Cable)
RS485
ACPL-M61L
FIGURE 3 Providing isolation for Profibus fieldbus communication
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TECHNOLOGY DEVELOPMENT
VDD1 1
Data Out Data In
8 VDD2
VOA
2
7 VIA
VAB
3
6 VOB
GND1 4
Data In Data Out
5 GND2
Shield
FIGURE 4 ACSL-7210 block diagram.
To LED driver buffer IC light-transmissive polyimide
transparent connecting layer
LED
SiO2 passivation insulation
Photodiode IC
Output Leadframe
LED Dielectric
Input Leadframe
Photodetector LED driver buffer IC IC
FIGURE 5 Cross-sectional view of optical channel with two transparent layers.
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OCTOBER 2013 FEBRUARY 2014 RTC RTCMAGAZINE MAGAZINE
the PCB can mount low profile semiconductor components. This allows layout design flexibility with more chips able to mount on the same area size of the PCB, and saves floor space while offering compact embedded communication solutions. Such trends can be seen as leading equipment makers market their communication or I/O modules as being compact and having mounting rail width of 12 mm, 24 mm or 48 mm. Figure 2 shows the back side of a PCB in an I/O module. The components such as isolation products mounted on the PCB back side should not be taller than the housing of the back plane connector (<2 mm). Using high-speed optocouplers such as the ACSL-7210 addresses the demanding isolation and protection needs of today’s industrial systems. This solution offers 67% faster data rates than competing solutions while providing 50% higher isolation capability and the thinnest packaging available. Figure 3 shows the typical application diagram for the 25MBaud dual-channel bi-directional ACSL-7210 and the 10MBaud ultra-low-power single-channel ACPL-M61L providing isolation in Profibus (RS485) fieldbus communication. The ACSL-7210 isolates the transmitting and receiving data channels, for example between a microcontroller or digital signal processor (DSP) of a factory “assembly-line” device and a fieldbus transceiver. Another optocoupler, the ACPL-M61L, isolates the transmit enable signal (Figure 3).
Meeting Industrial Communication Requirements
The ACSL-7210 is a dual-channel bidirectional 25 MBaud high-speed digital optocoupler optimized for full duplex industrial communication applications such as Profibus fieldbus and Serial Peripheral Interface (SPI). The ACSL-7210 utilizes Avago proprietary and patented IC and packaging technologies to achieve 3,750 VRMS signal isolation in a low-profile small-outline (SO-8) package while supporting high-speed full-duplex data communications with data rates of maximum 40ns propagation delay (25 MBaud). Because it has buffered input data channels, the ACSL-7210 does not have a direct LED-driven configuration as seen
TECHNOLOGY DEVELOPMENT
Standard LED Passivation
Back Emission LED P metal pad
Passivation P metal pad
Active Layer Epi & Substrate
A TQMa28 module with a Freescale i.MX28 can save you design time and money
N metal pad
Active Layer N metal pad
Epi & Substrate
FIGURE 6 Standard vs. back emission LED construction.
TQ embedded modules: in a typical optocoupler. The user need not consider the calculation of LED forward current and forward voltage to turn on/off the LED. The ACSL-7210 only requires an isolated power supply at the input side to transmit isolated digital signals, so it can retrofit existing isolated network modules with minimal software and schematic changes (Figure 4). The main design consideration will be the layout to fully utilize the low-profile height of the ACSL-7210. It can be placed on the back side of the PCB layout and free up the existing front side area for more chips and passive components to enable better network performance. The packaging process of stacking the LED die directly on a silicon IC substrate enables higher integration in monolithic IC packaging and a very low profile. Figure 5 shows a cross-sectional view of one of the two channels in the ACSL7210. The Input logic signal controls the CMOS LED driver buffer IC, which supplies current to the LED. The photodetector IC comes with two transparent layers: SiO2 passivation or insulation, and lighttransmissive polyimide on top. The LED attaches to the photodetector IC with a transparent connecting layer. Standard die attach process is used to make all the placements. Unlike the conventional standard LED that emits light on the same side as the metal contacts, Avago developed a back emission LED that emits light from the reverse side of the LED. This allows LED to stack on top of the detector IC (Figure 6). This packaging technology provides
the advantage of high integration, with ACSL-7210 being a dual-channel bi-directional optocoupler suitable for Profibus isolated data communication applications. Another advantage is the low profile package at ~1.6 mm tall. This allows the ACSL-7210 to be mounted on the back side of the PCB board where the height is usually specified at less than 2.0 mm to maximize the use of board space. This leads to slim, compact housing designs in the digital PLCs or I/O boxes. Avago Technologies San Jose, CA (408) 435-7400 www.avagotech.com
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Are the smallest in the industry, without compromising quality and reliability
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Bring out all the processor signals to the Tyco connectors
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Can reduce development time by as much as 12 months
The TQMa28 module comes with a Freescale i.MX28x (ARM926™) and supports Linux, WinCE 6.0 and QNX operating systems. The full-function STKa28-AA Starter Kit is an easy and inexpensive platform to test and evaluate the TQMa28 module.
Technology in Quality
ConvergencePromotions.com/TQ-USA TQ-USA is the brand for a module product line represented in N. America by Convergence Promotions, LLC
RTC MAGAZINE FEBRUARY 2014 TQMa28 V2 1-3 Page Ad.indd 1
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INDUSTRY
WATCH
Harnessing FPGA Performance for HPEC
FPGA-Based Front-End Processing with VPX As the world moves toward high-performance embedded computing (HPEC), faster and more distributed computing power is being put into ever smaller spaces. The use of FPGAs can help by applying both of these advantages to pre-processing data for specific applications while retaining flexibility. by Ken Grob, Elma Electronic
C
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12Ca, b
mini-USB Front
Synth. Fr
RJ45 Front
Backplane
Local μ Controller
Bx
On Temp
Elapse Time Counter
Bx
RS232
PCIe x1 2x1000BX
RS485/232
Supply Seq & Monitoring Vsi, 2, 3 & Local VDC
EEPROM Vadj Monitoring
Off
GPIO
GE PHY
12C
omplex systems—such as realtime image processing, electronic warfare systems and software defined radio platforms—require real-time execution of complex math functions. In processing data streams generated from high-speed sensors, the system hardware must be able to handle high-bandwidth data streams processing data flows that can exceed 1 Gbyte per second. To adequately handle, and subsequently process, data in these compute-intensive applications, a suitable form factor and system architecture are integral to the design. For example, connectors that operate at 6.25 GHz and above are typically required in these high-bandwidth data applications, mandating hardware components such as high-speed backplanes and board interconnects. The VITA OpenVPX standard, or VITA 65, defines fabric-based architectures useful in building high-performance embedded computing (HPEC) systems. The standard outlines form factors and allows mezzanine standards that enable front-end sensor interfaces to be connected to high-performance processing devices, like FPGAs In order to implement this front-end
RTC Supercap VBAT
GE PHY
GE PHY DDR3ECC
P2020
4x PCI x4
NOR Flash 2 Chips Flash SPI 16MB Flash A SPI 16MB PC x4
Flash B SPI 16MB
FPGA - LX45T CTRL Node
PCIx x1
Flash Bitstreams CTRL N 2 V6
PCIx x4 PCIx x4
GPIO
GPIO
eUSB Slot
DDR3 x40 DDR3 x40 SRAM DDR x18
20LVDS + 16SE
FPGA USER A Virtex XC6V SX315T/475T/ LX550T (FF1759)
FPGA USER B Virtex XC6V SX315T/475T/ LX550T (FF1759)
GTX x4 GTX x8
16 LVDS GTX x8
GTX x4
GTX x4
16 LVDS
LVDS 80P
GTX x8
LVDS 80p
GTX x8 GTX x8
HUB
USB0 (FP)
USB1, 2 (BP)
Backplane VPX XIO. 16pDif
XIO. 16pDif
FMC Slot 0
FMC Slot 1
FIGURE 1 6U VPX Front End Processor Block Diagram
DDR3 x40 DDR3 x40 SRAM DDR x18
INDUSTRY WATCH
FIGURE 2 Xilinx Virtex 6 Front-End Processor.
processing, dense, high-speed logic is necessary, and FPGAs provide a means to effectively implement the high-speed logic, memory and DSP functions required to process the sensor data streams. Another specification developed by VITA addresses I/O interconnects to FPGAs. This specification, called FPGA Mezzanine Card or FMC (VITA 57), defines an I/O mezzanine card for FPGA carriers. With VITA 57.1, devices like A/D and D/A can be added in front of high-performance FPGAs. Considering the data flow and the standards, VITA 57 enables I/O mezzanine connections to FPGAs. VITA 57, therefore, provides the I/O interfaces into the system. Open VPX provides a stan-
FIGURE 3A
dard referencing VITA 46 that defines both 3U and 6U VPX modules. The modules, or boards, provide a platform for FPGA processors, and subsequent interconnects. Further, system design includes assessing the number of processing elements necessary to handle the data streams. When implementing HPEC systems based on VPX, a multistage processing pipeline is usually required. FPGAs offer a rich combination of hardware resources well suited for these applications. FPGAs provide large pools of configurable logic allowing processing circuits to be implemented. To properly design a system, the size and type of FPGA must be considered. FPGA capacity is described in slices, and includes configurable logic blocks, or CLBs, each of which includes two slices. A logic slice includes look-up tables or LUTs, arithmetic chains, flipflops, RAM and shift registers. FPGAs can be tuned to the task, to selectable devices with specific capabilities, including the number and to types of slices, and RAM. Other specific FPGA resources include DSP functions, or DSP slices consisting of multipliers and accumulators, used to implement DSP functions. Block RAM is another type of resource allowing on-chip storage blocks. These resources
can be used to implement many circuit designs, including processors, memory systems and I/O interfaces, and are particularly useful in signal processing systems.
Inherent System Flexibility
The extensive hardware resources of FPGAs allow flexibility in system architecture. In designing a system, if the processing pipeline must be extended or needs to become wider, high-speed interconnect ports can be used to share data between FPGAs to increase the data width or the number of stages in the pipeline. When using FPGAs to process the data, several stages of calculations can be done within the FPGA core itself. Newer FPGAs incorporate a logic footprint big enough to implement complete processing blocks, including hardcore ARM processors such as the Cortex A9, as well as other peripheral interconnects, like PCIe cores. I/O is also a consideration with MAC blocks that enable Ethernet implementation, and high-speed serial I/O on the chips now exceeds an impressive 12.5 Gbit/s. Figure 1 shows a block diagram of a VPX-based Xilinx Dual Virtex 6 FPGA carrier. In this design, two large scale FPGA parts are interfaced to two VITA 57 FMC sites. The FPGAs are cross-connected with GTX x4 data paths allowing them to directly exchange data. The board
FIGURE 3B
Comparison of GOPS/watt performance between configurable-logic devices such as FPGAs (a) and fixed-logic devices, i.e. processors (b). Source: A study financed by the National Science Foundation (Alan George, Herman Lam, and Greg Stitt - IEEE magazine Computing in Science and Engineering - Jan/Feb 2011)
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INDUSTRY WATCH
Aurora Channel Partners Aurora Lane 1 User Application
User Interface
Aurora Channel
Aurora Core
Aurora Core
User Interface
User Application
Aurora Lane n
User Data
8B/10B Encoded Data
User Data
FIGURE 4 Aurora for low latency efficient FPGA data exchange.
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Safe computers for rail, road and air, up to SIL 4/DAL-A Modular box and panel PCs for industry & transportation Powerful system solutions on CompactPCI®/PlusIO/Serial Rugged, standard Computer-On-Modules (ESMexpress®, ESMini™) EN 50155- and e1-certified Ethernet switches and fieldbus interfaces
enables multiple groups of data lanes or data paths to be connected to the VPX backplane via a PCIe switch using PCIe Gen 2. To support control plane functions and general processing, a P2020 SoC Freescale Power PC processor is also part of this particular design. Such a design can be used to build digital filters and execute Fast Fourier transforms in hardware. GTX I/O ports provide data paths that can support data rates of 6.25 Gtransfer/s per lane. Four data lanes can transfer more than 2 Gbytes/s between FPGAs. Remarkably, a 6U by 160 mm PCB can contain all of this hardware, as shown in Figure 2.
Why Use FPGAs?
FPGAs typically provide more processing per watt than conventional processors. They achieve more computing speed per unit of power compared to CPUs, DSPs and GPUs—typically ten times on 16 integers 50 GOPS/watt, as noted in Figure 3. Given this processing efficiency and that the processing configuration is programmable, FPGAs can easily and cost-effectively be tuned to applicationspecific compute requirements.
Connecting and Moving Data
www.menmicro.com
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FEBRUARY 2014 RTC MAGAZINE
VPX uses pairs of differential signals to transmit and receive serial data between devices. A single differential pair is called a lane. Groups of lanes can be used to form ports, with scalable bandwidths.
In VPX, a group of lanes is called a pipe, and can be configured from one to 16 lanes. Pipes can be grouped into planes, where VPX defines data, control, expansion, management and utility planes. Data paths are implemented using specific protocols on interconnecting planes. The data plane is used to move primary data, the control plane for control communication, and the expansion plane for local communication of high-speed data. The physical interface and protocol will vary depending on the function. In moving data, the data rate is of interest. Data planes using a PCIe Fat Pipe can move data at 2.5, 5.0 or 8.125 Gbaud depending on the generation of PCIe, Gen 1, Gen 2, or Gen 3. A PCIe Gen 2 Fat Pipe can move 2 Gbyte/s point to point. The control plane typically uses Ethernet based on serial interconnect, and can be 1000 Base-Bx or 10GBASE-Kx The expansion plane can be PCIe, 10Gb Ethernet, Rapid I/O or Aurora. Both PCIe and Aurora use 8b/10b encoding. Aurora is a useful protocol for FPGA to FPGA interconnect because it is lightweight and low latency. It can operate at 1.25, 2.5, 3.125, 5.0 and 6.25 Gbaud. The Aurora cores are standard interfaces supported by FPGA tool chains (Figure 4). A VPX backplane can be used to connect the VPX front-end processor cards (FEPs). The OpenVPX specification allows the data plane and control plane interfaces to be connected through the
INDUSTRY WATCH
Data Plane
Data Plane
Data Plane
Data Plane
Contrl Plane
Contrl Plane
Contrl Plane
Contrl Switch
FP
IPMC
IPMC
IPMC
IPMC
Utility Plane Includes Power
SE
IPMC
SE
Management Plane (IPMB)
SE
TP
} 5 TP
SE
Control Plane (TP)
Contrl Plane
SE
TP Contrl Plane
SE
} 5 TP
SL T6-SWH-4F24T-10.4.4
Data Plane
VPX 6
SL T6-PAY-4F2T-10.2.2
VPX 5
SE
VPX 4
SE
VPX 3
SE
VPX 2
SE
VPX 1
SE P0/J0
SE P0/J0
SE
Data Plane (FP)
Switch/ Management
SE
Slot numbers are logical, physical slot numbers may be different
Payload Slots
ChMC
BKP6-DIS06-11.2.15-n
FIGURE 5 Six-slot Open VPX backplane.
backplane where high-speed serial pointto-point interconnects are made. Profiles are used to define and organize the connections made in the backplane. Figure 5 shows a mesh connection on the Data plane. Open VPX makes use of backplane and slot profiles to define interconnect topologies. Various topologies, including star and mesh, can be implemented. The sample view of a six-slot OpenVPX Backplane Profile in Figure 5 allows up to five FPGA-based cards to be connected together. The profiles on the
FIGURE 6 QSFP+ interface.
right define the I/O paths associated with the slots in the backplane.
Getting In and Out of the System
Moving data in and out of the system can be done with various interfaces, either taken from the front of the board or via the backplane out the rear of the system. First, a suitable interface must be chosen. If the data is coming from a sensor, it may be analog or digital. If itâ&#x20AC;&#x2122;s analog, the data could be interfaced via CoAx to an A/D converter. If itâ&#x20AC;&#x2122;s digital, from a camera for example, it could run via Ethernet using Gb or 10 Gb Ethernet. For external network interfacing, good old 1000BT Ethernet can be used, directly from the front end processor, a switch card or from a control processor. In applications that require off-load and high-rate external transfers, interfaces like 10 Gb Ethernet can be used, either with a copper or fiber physical medium. PCIe or Aurora interfaces can be implemented using the quad small form factor pluggable (QSFP)+ standard.
Figure 6 is an example of a QSFP+ XMC mezzanine that shows the QSFP+ connector. QSFP+ can also be implemented on an FMC allowing external high-speed data to be directly connected to the FPGA resources. Using QSFP+ links, external data paths supporting up to 40 Gbit/s can be achieved. Since system designs can be customized and tailored to fit the required hardware architecture, FPGAs become a highly flexible compute resource. Highperformance embedded computers using FPGAs implemented on VPX can be used in a variety of compute-intensive applications that require a stable platform. Because FPGA compute operations per second per watt exceed traditional processor architectures, these systems are not only a reality, but can be developed costeffectively. Coupling FPGAs to the FMC sites allows sensors to be connected to the FPGAs. This concept, combined with VPX backplanes that interconnect larger format cards, enables more capable systems to be built. External interfaces, such as Ethernet, can be included on VPX cards and switches to allow system elements to be connected within networks. Such designs implemented on VPX provide an open architecture solution specifically suited for high-performance digital signal processing. Since FPGAs can be reprogrammed, designs can be embedded and quickly modified. Initial investments can be preserved by updating system firmware and software, thereby improving overall system performance and life cycle. Elma Electronic Freemont, CA (510) 656-3400 www.elma.com
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PRODUCTS &
TECHNOLOGY RAID-Capable Box PC Offers Flexible Storage Capacity
A low-profile, maintenance-free box PC with five integrated Ethernet interfaces is designed for reliable storage in harsh environments. The BL50S from MEN Micro boasts two hot-plug-capable HDD/SSD shuttles in a slim 2.4” housing. It can support RAID 0 for applications requiring fast data transfer, such as audio and video in a video recorder, as well as RAID 1 for more data safety if used as a compact content server. Of the five available Gigabit Ethernet interfaces, one is a Gigabit Ethernet uplink and the other four operate as a 4-port Ether-
net switch with Power over Ethernet (PoE) functionality. The BL50S combines two devices into one without any additional components. The front panel includes one DisplayPort with 2560 x 1600 resolution, two USB 2.0 ports and other configurable slots for RS-232, CAN bus or other I/O requirements. One PCI Express Mini Card slot with two SIM card slots enables the implementation of a wide range of functionality, including mobile service standards such as GSM (2G), UMTS (3G) and LTE (4G), wireless communication standards WLAN/Wi-Fi IEEE 802.11 and related standards as well as GPS or GLONASS positioning systems. The BL50S is based on the AMD T48N Embedded G-Series APU running at 1.4 GHz, which provides high scalability in CPU (single/dual core) and graphics performance. Additionally, the new box PC offers 2 Gbyte DDR3 SDRAM, one SD card and one
USB Multi-Sensor Module Measures Any Type of Sensor at Any of 8 Inputs
A new data acquisition module can measure any type of sensor. The DT9829 from Data Translation supports a broad array of sensor types including: thermocouples, RTDS and thermistors for measuring temperature; bridge-based and strain gage sensors for measuring strain and load cell data such as torque and pressure; and voltage, current and resistance for measuring electrical parameters. Any sensor can merely be connected at an input, and all selections, including any necessary for excitation, cold junction compensation or bridge completion, are included and supported by QuickDAQ. No other circuitry or external components are necessary. This very accurate module can measure up to 8 different sensors on any of the 8 channels with no interaction from one to another. The USB module is galvanically isolated from PC ground to preserve measurement integrity and runs off USB power for easy, portable use in the field. The module samples at 960 Hz, utilizes 24-bit sigma-delta ADC to eliminate aliasing, and provides 4 isolated digital inputs and 4 opencollector digital outputs for notifications or control. Additional full software support includes comprehensive drivers and interface tools for LabVIEW and MATLAB programmers. The DT9829 is available with 2, 4, or 8 analog inputs with prices starting at $895. Data Translation, Marlboro, MA. (800) 525-8528. www.datatranslation.com.
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mSATA slot. The class S2 wide-range power supply features a 24 VDC and 36 VDC nominal input voltage and a power consumption of 30W. The new unit provides easy and cost-effective I/O adaptations, regardless of the processor board in use. The BL50S also accommodates other APUs from the Embedded G-Series for even more flexible configurations. It is compliant with EN 50155 and prepared for E1 certification. Designed for fanless operation at temperatures from -40° to +70°C (+85°C for up to 10 minutes), the unit features a special aluminum housing with cooling fins that serve as a heatsink for the internal electronics, providing conduction cooling. The housing is also coated against dust and humidity for additional protection in harsh environments. Pricing for the BL50S is $2,202 MEN Micro. Blue Bell. PA. (215) 542-9575. www.menmicro.com.
PRODUCTS & TECHNOLOGY
Scalable IoT Solutions for Smart LED Lighting and Home and Building Automation
from on/off and dimming to color temperature adjustment via PLC or ZigBee. The GV-LED module can be deployed inside LED driver and power supply of LED lamp, streetlight and down light, or be placed outside as a retrofit solution. • GV-Sensor (Sensor Module) powered by GV7011 chip or GV7013 chip, is an all-in-one sensor module for motion, light and temperature. It can be deployed inside thermostats, HVAC and light fixtures.
Greenvity Smart Lighting Software suite and mobile apps (supporting iOS and Android) are provided with the modules without a licensing fee and enable monitoring, controllability and intelligence of up to 255 lighting devices and communications with mobile phones and tablets. API is provided so that OEM/ODM customers can add their own application software to differentiate and enhance their products. Greenvity Communications, Milpitas, CA. (408) 935-9434. www.greenvity.com.
A set of turn-key solutions comprising system-on-chips (SoC), modules, software and mobile apps enable any home device or Internet of Things (IoT) device to be smart and controllable for energy-saving and home and building automation purposes. At the core of these solutions are Hybrii SoCs from Greenvity Communications that integrate HomePlug Green PHY powerline communication (PLC) and ZigBee wireless for robust and extended-range communication for smart LED lighting, home and building automation, industrial M2M and energy management. The Greenvity system solutions provide all the functions that customers need for rapid prototype and even pre-production design. Ready-to-go boards and software enable significantly reduced time-to-market and cost of development. OEMs and ODMs have the flexibility to customize and scale up or down the modules and the baseline software to fit specific applications. Customers only need to add their own software layer to quickly develop innovative and differentiating IoT devices. Three modules are being introduced including the GV-Controller, GV-LED and GVSensor, powered by Greenvity’s Hybrii SoCs, GV7011 and GV7013 chips. Each GV-LED module and GV-Sensor module can communicate with and be controlled by the GV-Controller via either PLC or wireless to form an IoT network that mobile devices can access and control wirelessly and remotely. • GV-Controller (Home Gateway & Lighting Controller Module) powered by either GV7011 chip or GV7013 chip, consists of an ARM9 processor with Linux OS and also includes Wi-Fi, Ethernet 10/100, USB, SPI and Bluetooth low energy (BLE). GV-Controller can be integrated inside any home device such as a router or thermostat. • GV-LED (LED Driver Module) powered by either GV7011 chip or GV7013 chip, can interface to most existing LED drivers and power supplies in the industry. It enables controllability to LED lights
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PRODUCTS & TECHNOLOGY
Single-Chip Bridge Controller Eases Development for USB Connectivity Applications A turnkey solution for bridging a universal serial bus (USB) host and a serial peripheral interface (SPI) bus includes driver support for Windows, OS X and Linux. The CP2130 USB-to-SPI bridge controller from Silicon Labs provides data throughput, exceptional configurability and a high level of mixed-signal integration in a space-saving 4 mm x 4 mm package. The CP2130 bridge controller is suitable for new designs or upgrading legacy designs to include USB for a wide range of embedded applications. The CP2130 bridge controller enables developers to add USB functionality to their applications without requiring USB software, firmware or hardware domain expertise typically required with more complex alternatives. The CP2130 bridge controller rounds out Silicon Labs’ CP21xx smart interface portfolio, adding SPI to the roster of USB-to-UART, I2C/SMBus and I2S interface solutions. The highly integrated CP2130 controller features on-chip functions and peripherals that eliminate the need for external components, which reduces bill of materials (BOM) cost and board space. The CP2130 device includes a USB 2.0 full-speed controller and transceiver, a serial peripheral interface controller that enables communication with a wide range of SPI slave devices down to 1.8V, 348-byte programmable memory, crystal-less USB operation and an integrated 5V voltage regulator rated at 100 mA. Designed to give developers the utmost design flexibility, the CP2130 device’s highly configurable SPI controller can communicate with up to 11 SPI slave devices using any of its 11 GPIO pins as chip-selects or be configured for alternate functions that can be used to eliminate external circuitry and components. The CP2130 device is the fastest full-speed USB bridge controller on the market, providing up to 6.6 Mbit/s read throughput and 5.8 Mbit/s write throughput. The CP2130 controller is priced at $1.23 in 10,000-unit quantities. The CP2130EK USB-to-SPI evaluation kit, priced at $20 (MSRP), allows complete evaluation and customization of the CP2130 controller. Silicon Laboratories, Austin, TX. (512) 416-8500. www.silabs.com.
High-Speed 40 Gbit/s Gen3 OpenVPX Backplane A new 40 Gbit/s Gen3 OpenVPX backplane is designed for the end-to-end transmission of the high-speed data required for the most demanding ground and airborne C4ISR and EW deployed applications. The new Hybricon Gen3 OpenVPX 6U 6-slot Backplane from CurtissWright Controls Defense Solutions supports full-speed, bottleneck-free distribution of data over 40 Gbit/s Ethernet or InfiniBand fabrics. It enables the design of a new class of embedded subsystems capable of delivering previously unobtainable levels of performance to support numerous demanding defense and aerospace applications, such as the real-time detection and identification of signals of interest. The Fabric40 Gen3 OpenVPX backplane is designed for use in both development and rugged deployed applications. In air-cooled or conduction-cooled development chassis, the new backplane speeds and eases the integration of compute-intensive radar, signal and image processing for ground or airborne platforms. Curtiss-Wright can also design application-specific configurations to meet a customer’s individual requirements. Designed to stringent Curtiss-Wright Gen3 Signal Integrity (SI) design rules, Hybricon Fabric40 backplanes exceed VITA 68 VPX compliance channel draft standard guidelines. Curtiss-Wright’s proprietary SI methods minimize signal impairments, such as high return loss, crosstalk and mode conversion to deliver reliable SI performance at speeds up to 10.3 Gbaud, resulting in the best performance and lowest risk backplane platform in the industry. Curtiss-Wright’s Fabric40 initiative ensures that all aspects of 40 Gbit/s data fabric technology are optimally configured to work together, which greatly enhances interoperability and reduces customer
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integration risks and development time. Curtiss-Wright is developing all of the subsystem elements required by system designers to integrate complete, end-to-end 40 Gbit/s embedded systems. OpenVPX systems built using the new Hybricon Fabric40 Gen3 OpenVPX backplane and complementary Fabric40 system products, such as the CHAMP-AV9 DSP engine, VPX6-6802 Switch card, and VPX6-1958 single board computer (SBC), will deliver over 2x the performance of previous generation SRIO Gen-2-based systems and 4x the performance of 10 GbEbased systems. Curtiss-Wright Controls Defense Solutions, Ashburn, VA (613) 254-5112. www.cwcdefense.com.
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PRODUCTS & TECHNOLOGY
Low-Mass MEMS VC Accelerometers for Aerospace, Automotive and Industrial
As series of highly rugged, industrial-grade MEMS variable capacitive (MEMS VC) accelerometer chips, modules and supporting data acquisition has been announced by Silicon Designs. The compact, low-mass Model 2220 Series is a higherperformance version of the company's Model 2210, combining an integrated low-noise, nitrogen-damped, fully-calibrated MEMS VC accelerometer chip with high-drive, low-impedance buffering, each contained in an epoxy-sealed rugged anodized aluminum housing that mounts via two M3 screws. This design is suitable for measuring acceleration within industrial and commercial environments, where low mass (10g) and small size (1" by 0.5" by 0.44") help to minimize mass loading effects. Available in seven unique models, with measurement ranges from ±2g to ±200 and a wide frequency response, the SDI Model 2220 series responds to both DC and AC acceleration, with either two analog ±4V (differential); or 0.5 to 4.5V (single-ended) outputs that vary with acceleration. At zero acceleration, output differential voltage is nominally 0 VDC (DC response). Differential sensitivity ranges are from 2000 mV/g for the ±2 g module to 20 mV/g for the ±2000 g module, with typical 1% cross-axis sensitivity. Onboard voltage regulation also minimizes supply voltage variation effects. SDI Model 2220 series modules can withstand shock inputs of up to 2000g and can reliably operate over a temperature range of -55° to +125°C. Each module is serialized for traceability and is fully calibrated. The combined low mass, small size and low-impedance outputs of SDI Model 2220 make the series particularly suitable for flight test, aircraft flutter testing, vibration monitoring and analysis, robotics, biomechanics, automotive RLDA, machinery and equipment control, modal analysis, crash testing, and general in-laboratory applications.
8 Gbit LPDDR4 DRAM Ultra-Fast Mobile Memory
What is being billed as the industry’s first 8 Gbit, low-power, double data rate 4 (LPDDR4), mobile DRAM has been announced by Samsung. Samsung’s new highspeed 8 Gbit LPDDR4 mobile DRAM will provide the highest level of density, performance and energy efficiency for mobile memory applications, enabling end users to have faster, more responsive applications, more advanced features and higher resolution displays while maximizing battery life. This next-generation LPDDR4 DRAM is expected to contribute significantly to faster growth of the global mobile DRAM market, which will soon comprise the largest share of the entire DRAM market. In addition, Samsung’s new 8 Gbit LPDDR4 uses a Low Voltage Swing Terminated Logic (LVSTL) I/O interface, which was originally proposed by Samsung to JEDEC and has become a standard specification for LPDDR4 DRAM. Based on this new interface, the LPDDR4 chip will enable a data transfer rate per pin of 3,200 megabits per second (Mbit/s), which is twice that of the 20nm-class LPDDR3 DRAM now in mass production. Overall, the new LPDDR4 interface will provide 50 percent higher performance than the fastest LPDDR3 or DDR3 memory. Also, it consumes approximately 40 percent less energy at 1.1 volts. With the new chip, Samsung will focus on the premium mobile market including large screen UHD smartphones, tablets and ultra-slim notebooks that offer four times the resolution of full-HD imaging, and also on high-performance network systems. Samsung Semiconductor www.samsung.com.
Silicon Designs, Kirkland, WA. (425) 391-8329. www.silicondesigns.com.
3U CompactPCI Serial Carrier Card Integrates M-Module Functionality
A 3U CompactPCI Serial carrier card with an M-Module slot offers an easy way to integrate flexible I/O. The M-Module slot provides users with the ability to interchange more than 30 I/O functions within a system. The M-Module, which needs only one CompactPCI Serial slot, is screwed tightly onto the G204 from MEN Micro and requires no separately mounted transition panel. This Flexible I/O combines with fast serial technology for enhanced system performance Designed to combine fast CompactPCI Serial technology with flexible I/O options, the new board serves as the basis for 19”-based system solutions for transportation and industrial applications, such as data acquisition, process control, automation and vehicle control, robotics or instrumentation. The new modular mezzanine card operates in the extended temperature range of -40° to +85°C for harsh environments. Developed in 1988 by MEN and later standardized by VITA, M-Modules are modular I/O extensions for all types of industrial computers, from embedded systems up to high-end workstations. Single unit pricing for the G204 is $483. MEN Micro, Blue Bell, PA. (215) 542-9575. www.menmicro.com.
FIND the products featured in this section and more at
www.intelligentsystemssource.com
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PRODUCTS & TECHNOLOGY
3U VPX Module Houses HighDensity Industry Standard 2.5” SATA Drives
High-Speed, Rugged Rackmount and Portable Recorders for Ground, Ship and Airborne Applications
A low-cost, flexible solution for embedding rugged, high-density SATA SSD drives into deployed compute platforms can be configured with SSD storage capacities ranging from 128 Gbyte to 1 Tbyte (2 Tbyte capacity SSDs are expected to be available in 2014.) The FSM Carrier (FSM-C) from Curtiss-Wright Controls Defense Solutions is a 3U VPX (VITA 48.2) module that uses industry-standard direct-attached SATA SSDs to ease technology refresh, reduce the risk of obsolescence and make the board essentially “plug-and-play.” It also eliminates the need for system integrators to deal with software drivers, operating systems or processor types, which speeds and simplifies the deployment of removable industry-standard high-density SATA SSDs into embedded systems for defense and aerospace applications. The FSMC is ideal for use in systems that require data transport, such as mission computers, sensor processors, mission recorders, instrumentation recorders and embedded ISR applications. The Vortex FSM-C is designed for system integrators seeking the most cost-effective, rugged solution for adding removable high-density storage to their embedded system. To ensure data security, the FSM-C’s internal SSD can be provided with Secure Erase or MIL Secure Erase features. When provisioned, these features can be initiated by an ATA command over the SATA lane. A variety of optional MIL Secure Erase algorithms can also be provided to meet the specific program or application security requirements. For those applications that require removable storage with very high level data protection, we offer our Vortex FSM, a rugged 3U VPX FIPS 140-2 certified 1 Tbyte memory module with on-module support for AES256-bit encryption.
Pentek, Upper Saddle River, NJ. (201) 818-5900. www.pentek.com.
Curtiss-Wright Controls Defense Solutions, Ashburn, VA. (613) 254-5112. www.cwcdefense.com.
Two new high-speed, rugged rackmount recording systems use state-of-the-art SSD (solid state drive) storage technology to achieve aggregate recording and playback rates up to 4 Gbytes per second. As complete recording systems, the Model RTR 2728 rugged portable and the Model RTR 2748 rugged rackmount recorders from Pentek are suitable for recording and reproducing wideband IF signals at sample rates up to 1 GSamples/sec. Systems are built on a Windows 7 Professional workstation with an Intel Core I7 processor and provide both a GUI (graphical user interface) and API (application programmer’s interface) to control the system. Signal analysis tools are also provided to allow the user to monitor and analyze signals prior to, during and after a recording. The advanced SSDs used in the ruggedized recorders not only add capacity, but they also keep up with the very high data rates. For example, the rackmount system can record up to 5.3 hours of contiguous data without interruption. And, both recorders operate flawlessly under shock and vibration, making them ideal for severe environments. Data files include time stamping as well as recording parameters and optional GPS information. Files are stored in the native Windows NTFS (new technology file system) format, eliminating the need for file conversion. Files can also be transferred from the system through gigabit Ethernet, USB ports or written to optical disks using the built-in 8X double layer DVD±R/RW drive. The recorder’s SSDs are configured to support numerous RAID levels giving the user many options to balance performance versus failsafe trade-offs. They are hot-swappable and can be easily removed or exchanged during or after a mission to retrieve recorded data. Both recording systems use Pentek’s high-powered Virtex-6-based Cobalt boards that provide the data streaming engine for the high-speed A/D and D/A converters. A built-in synchronization module is provided to allow for multi-channel phase-coherent operation. The rackmount system is scalable to accommodate multiple chassis for more channels and higher aggregate data rates. Pentek SystemFlow recording software features a Windows-based GUI that provides a simple and intuitive means to configure and control the system. Pricing starts at $49,995.
Liquid Crystal Thermography System Reveals PCB and Component Temperatures
A new liquid crystal thermographic analysis system provides optical temperature measurements of active PCBs and components. The ethermVIEW system uses the color response of thermochromic liquid crystals (TLC) for non-invasive thermal studies. Developed by Advanced Thermal Solutions, the ethermVIEW system includes a high-performance, solid-state color camera for macroscopic inspection of boards and components coated with heat-sensitive liquid crystals. The camera features a flicker-free white light source for clear viewing of dark surfaces and partially concealed features. It links to a PC by Firewire, the standard connection for high-definition video devices. For image processing and management, the system includes the proprietary thermSOFT software used in other ATS thermal analysis devices. A transformer is provided for international use. Liquid crystals used with ethermVIEW reflect incident light at visible wavelengths based on the surface temperatures where they’re applied. The camera captures the reactive TLC colors to reveal hot spots and defects for more effective thermal management. In contrast to infrared thermography systems, the ethermVIEW TLC method is not affected by ambient temperatures. It provides more precise temperature measurements—within +/- 0.1°C accuracy. The ethermVIEW system can also be purchased for less than one third the cost of a typical IR thermography system. Starting price for the ethermVIEW thermographic analysis system is $15,000 depending on configuration and volume of liquid crystals provided. Advanced Thermal Solutions, Norwood, MA. (781) 769-2800. www.qats.com
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PRODUCTS & TECHNOLOGY
High-Sensitivity Latching Digital Hall-Effect Sensor ICs Simplify Installation
A set of high-sensitivity latching halleffect sensor ICs include built-in pull-up resistors for high-performance yet economical sensor ICs suited for demanding, cost-sensitive, high-volume applications. Applications include commuting brushless DC motors used for medical equipment and appliances as well as for flow-rate sensing, speed and RPM sensing, tachometers, counter pickups, motor and fan controls. The SS360PT/SS460P Hall-Effect sensors from Honeywell provide reliable switching points with a high magnetic sensitivity of 30 Gauss typical, at 25°C [77°F], and 55 Gauss maximum over the full -40° to 125°C [-40F to 257°F] temperature range, allowing for the use of smaller magnets or a wider air gap. These sensor ICs do not use chopper stabilization on the Hall element, providing a cleaner output signal and a faster latch response time when compared to competitive, chopper-stabilized, high-sensitivity Hall-effect bipolar latching sensor ICs. Latching magnetics make these sensors well-suited for accurate speed sensing and RPM (revolutions per minute) measurement. The sub-miniature, SOT-23 surface mount package (SS360PT) allows for compact design with automated component placement. The small, leaded, flat TO-92-style package (SS460P) allows for a compact PC board layout design. Wide operating voltage range of 3 VDC to 24 VDC provides for potential use in a wide range of applications. Built-in reverse voltage capability enhances the protection of the sensor and the circuits, and the robust design allows operation up to 125°C [257°F]. Honeywell Sensing and Control, Minneapolis, MN. (815) 235-6847. www.sensing.honeywell.com.
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Rugged, 14-Port Gigabit Managed Ethernet Switch with 2 SFP Sockets
A new rugged, managed Layer 2+ Ethernet switch module offers twelve 10/100/1000 Mbit/s copper twisted pair ports and two small form factor pluggable (SFP) sockets in a compact COM Express form factor. The Epsilon-12G2 from Diamond Systems does not require any host computer interface. A 480 MHz MIPS processor embedded directly into the switch manages all switch functions. The processor is accessed via an in-band Web interface over one of the Ethernet ports or via an out-of-band command-line interface over an RS232 serial port. The integrated Web interface provides an intuitive GUI for configuring and managing all switch functionality. Onboard memory holds dual application images, boot code, MAC addresses and other parameters, and can also be used for program execution. Designed for use in rugged applications including industrial, on-vehicle and military environments, Epsilon-12G2 operates over an extended temperature range of -40° to +85°C. All I/O connectors are latching, providing enhanced reliability over the RJ- connectors used in commercial Ethernet switches. A 50% thicker PCB provides better protection against vibration in vehicle environments. The +5V to +40V wide range DC/DC power supply is compatible with all common vehicle and industrial power sources. The switch’s dual SFP socket interfaces to 1G fiber Ethernet networks. One port can operate at an enhanced 2.5G to support efficient stacking of two switches together for a combined total of 26 ports. Epsilon-12G2 comes with all the required firmware preconfigured, enabling immediate operation without any development effort. Single unit pricing starts at $800. A separate cable kit is available: CK-EPS12G2. Diamond Systems, Mountain View, CA. (650) 810-2500. www.diamondsystems.com.
Embedded Video Engine Combines Display, Audio and Touch
A high-quality graphics chip offers 3-in-1 functionality for graphical user interface (GUI) development. The FT800 Embedded Video Engine (EVE) from Future Technology Devices International combines display, audio and touch operations into a single chip, providing an optimized solution that reduces power, board area, bill of material (BOM) costs and much more. Engineers now have a complete solution to easily create state-of-the-art interactive displays. Targeting intelligent QVGA and WQVGA TFT display panels, EVE's object-oriented approach renders display images in a line-by-line manner with resolution of 1/16th of a pixel, eliminating the expense of traditional frame buffer memory. The FT800 interfaces to the system microcontroller via a low-bandwidth serial interface, allowing for lower cost microcontrollers to be used in the design. The controller's functionality supports 4-wire resistive touch sensing with built-in intelligent touch detection and an embedded audio processor that allows midi-like sounds, combined with pulse code modulation
(PCM) for audio playback. The combination of display, audio and touch on a single-chip solution enables engineers to produce GUIs that deliver compelling user experiences. To further support and enhance FTDI's Embedded Video Engine, a range of complementary development boards is available for use with the FT800, including the credit-card sized VM800C board series that comes in a 3.5", 4.3", or 5" LCD display with a 4-wire resistive touch screen. The VM800B series is similar and is designed for easy mounting inside a bezel. Both boast a USB micro-B port that can also power the board. Future Technology Devices International, Tigard, OR. (503) 547-0988. www.ftdichip.com.
Primary Radar is Our Passion Simulation, Display, Tracking, Recording, Open Standards Network Distribution
Whether you’re a radar manufacturer or systems integrator, Cambridge Pixel’s hardware-agnostic open-systems approach puts you in control offering freedom, flexibility, reduced through life costs and ease of technology refresh. Simulation with ASTERIX tracks and video Our newly announced SPx Simulator with optional HPx-300 Radar Output hardware supports the development of complex multi-radar, multi-target scenarios to generate representative primary radar, AIS, NMEA, navigation, ASTERIX CAT-48, CAT-34 and CAT-240 messages.
New HPx-300 Radar Output
Radar Toolkit The Cambridge Pixel family of radar components covers scan conversion, network streaming, target tracking and recording. We offer modular toolkits for developers and we provide cost-effective ready-torun applications for PC-based radar display and tracking under Windows and Linux.
The Cambridge Pixel Approach Our approach is to provide flexible, easy-to-use modules of software. We can supply complete turn-key solutions or individual software modules for inclusion in a customer’s existing application. And it is all backed by Cambridge Pixel’s do-what-it-takes technical support to help you when you need it. Cambridge Pixel Ltd New Cambridge House Litlington Royston Herts SG8 0SS UK T: +44 1763 852749 enquiries@cambridgepixel.com www.cambridgepixel.com
The new HPx-300 Radar Output Card generates radar video signals for system testing, simulation, training and video streaming • Highly configurable output signals • Output timing synchronised to input data • Video (x2), Trigger, ACP/ARP, SHM, parallel azimuth • Configurable scan rates, PRFs • Compact half length PCle card • Available with SPx Simulator and Development software
Tech Source 442 Northlake Blvd, Altamonte Springs, FL 32701, USA T: 407-262-7100 embeddedgraphics@techsource.com www.techsource.com
Learn more about our products here
PRODUCTS & TECHNOLOGY
XMC Modules Interface 10 Gigabit Ethernet to PCI Express
Two new XMC mezzanine modules provide a 10 Gigabit Ethernet (10GbE) interface solution for data-intensive, real-time embedded computing systems. TheXMC-6260 and XMC-6280 from Acromag achieve high performance using a TCP/IP offload engine (TOE) ASIC connected to a PCI Express Gen2 x8 interface. The XMC-6260 has dual XAUI 10GBASE-KX4 ports and supports conduction-cooling or -40° to 85°C operation. The XMC-6280 features four SFP+ ports for fiber or copper cables. Applications include highspeed data storage, image collection/transfer, distributed control networks and board-toboard interfaces. To meet the needs of data-intensive, realtime applications, these fully integrated network interface cards (NIC) employ the Chelsio T4 processor. This ASIC has four XGMAC (10GbE) interfaces and supports up to 1M
connections. Five gigabits of DDR3 memory enhances the number of virtual connections. The T4 chip provides full offload support for TCP, UDP, iSCSI and Fibre Channel over Ethernet (FCoE). Other functions include highperformance packet switching, traffic filtering and management. By relieving the host CPU of these network processing tasks, very low Ethernet latency and high-level determinism are reliably achievable. Software drivers are available for Linux and Windows. An 8-lane PCIe host interface provides a high-speed connection to the system processor. With support for 5 Gbit/s data rates, the PCIe
Standard “Off the Shelf” Flat Cable Assemblies Target Three Application Groups
A line of standard flat cable assemblies is designed to provide reliable performance, long service life and quick-delivery, plug & play solutions. Joining a broad line of already in-stock highly flexible flat cables from Cicoil, the fully terminated “off the shelf” assemblies are available in 3-foot, 6-foot and 12-foot lengths. Made in the USA, the cable assemblies are organized in three groups for easy application selection: Motion Control, Data & Video and Unshielded, including IDC Ribbon, Thermocouple, Festoon and High Voltage configurations. All of the cables utilized on the assemblies are encapsulated with Cicoil’s exclusive, crystal-clear Flexx-Sil jacketing compound, which clearly shows the purity and cleanliness of the material, as well as the precise placement of each individual cable component. All of Cicoil’s cables have a Durometer of 65 (Shore A) and can be provided in an impact-resistant SuperTuff version with a Durometer of 85 (Shore A). For applications that require resistance to friction and abrasion, Cicoil offers its proprietary GlideRite and SlideRite anti-friction coatings by request. The compact, flame retardant cable designs are free of halogens and contaminants and also have very low outgassing characteristics. In addition, the Flexx-Sil jacket is self-healing from small punctures and will not wear, crack or deform due to long-term exposure to motion, tight routing, vibration, water, ice, steam, sunlight, humidity, ozone, UV light, autoclave, expanded temperatures (-65° to +260°C) or many chemicals. Cicoil’s Flexx-Sil Jacketed Cables are UL and CSA recognized, CE conforming, RoHS 2 & REACH compliant, Class 1 clean room rated and are cured continuously, with no debris or material contamination in an automated, climate controlled environment. Cicoil, Valencia, CA. (661) 295-1295. www.cicoil.com.
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interface delivers up to 32 Gbit/s of bandwidth to the server. This connection enables stateless offloads, packet filtering (firewall offload) and traffic shaping (media streaming). The XMC-6260 and XMC-6280 modules provide a complete and flexible TCP offload solution. The TOE ASIC has hundreds of programmable registers for protocol configuration and offload control. As a result, these modules can offload TCP processing per connection, per server, per interface. They can also globally and simultaneously tunnel traffic from non-offloaded connections to the host processor for the native TCP/IP stack to process. Additionally, the modules provides a flexible zero-copy capability for regular TCP connections, requiring no changes to the sender, to deliver line rate performance with minimal CPU usage. All versions are available with lead or lead-free solder starting at $2,750. Acromag, Wixom, MI. (248) 295-0310. www.acromag.com.
SMARC Module for Small Form Factor ARM-Based Embedded and Mobile Systems
A new ARM-based Smart Mobility Architecture (SMARC) form factor computer-on-module (COM) is built on a TI AM3517 System on Chip (SoC), using an ARM Cortex-A8 processor at 600 MHz and with a power envelope of less than 2 watts. With such a favorable performance-to-power ratio, the LEC-3517 from Adlink Technology enables system architects to use a fully passively cooled system design, suitable for portable and stationary embedded devices, such as industrial handhelds, control terminals, Human Machine Interfaces, medical devices and industrial tablets. Adlink’s LEC-3517 utilizes the short version of the SMARC module definition (82 mm x 50 mm) and offers 256 Mbyte DRAM, 512 Mbyte NAND flash on board. The module supports 18/24-bit Parallel LCD displays and 8-bit camera input. The LEC-3517 also features a USB 2.0 host port and a USB client port, four Serial ports, a CAN bus port, and one 10/100 Ethernet port, as well as 12 GPIO signals. Off-module storage can be implemented through either SDIO or eMMC on the carrier. Standard operating systems include Linux, Android and Windows CE, with corresponding board support package (BSP). Along with the release of the SMARC module, Adlink is also introducing its SMARC carrier board, LEC-BASE. The LEC-BASE functions as a reference design for the LEC product line, and also as a setup for software development and hardware testing. The LEC-BASE offers myriad I/O in addition to the basic I/O function of the CPU modules. It provides combined HDMI/DP output, RGB 18/24-bit, LVDS 18/24bit, a touchscreen controller, GPS and G sensors, 1x GbE, HD Audio, SPDIF, CSI-2 camera input, RGB camera input, SD/SDIO, eMMC/SD/ SDIO, GPIO, 4x UART, 4x USB, 1x USB OTG, 2x CAN, 1x PCI Express 1x (PCIe) and one SATA interface. Two mini PCIe sockets enable use of Wi-Fi / Bluetooth and 3G modules for connectivity. The BSP for each CPU module is configured to support the entire onboard functionality to minimize delays in testing and maximize time for application development. ADLINK Technology, San Jose, CA. (408) 360-0200. www.adlinktech.com.
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The Event for Embedded & High-Tech Technology RTECC brings intelligent and embedded systems to your doorstep. 17 Locations in 2014
Register today at www.rtecc.com • Learn how embedded systems are evolving to become more connected, pervasive, distributed, and intelligent • Meet key industry experts face-to-face to discuss needs and get solutions • RTECC–More than a conference, it’s a road-map to your success and the future of embedded computing
2014 Real-Time & Embedded Computing Conferences Santa Clara, CA January 23
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Rosemont, IL - Sensors Expo Pavilion June 24-26
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Los Angeles, CA October 21 San Mateo, CA October 23 Tysons Corner Area, VA November 13
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High-Performance Computing Conference
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Company Page Website Acces I/O.......................................................................................................................... 41.............................................................................................................www.accesio.com Advanced Micro Devices, Inc............................................................................................. 52................................................................................................ www.amd.com/embedded Advantech......................................................................................................................... 20.........................................................................................................www.advantech.com Cambridge Pixel................................................................................................................ 47................................................................................................. www.cambridgepixel.com Congatec, Inc..................................................................................................................... 4.............................................................................................................. www.congatec.us Dolphin Interconnect Solutions........................................................................................... 51......................................................................................................... www.dolphinics.com DVCon.............................................................................................................................. 12.................................................................................................................www.dvcon.org Intellegent Systems Source................................................................................................ 43.....................................................................................www.intelligentsystemsource.com Lauterbach........................................................................................................................ 50........................................................................................................ www.lauterbach.com Men Micro......................................................................................................................... 38......................................................................................................... www.menmicro.com MSC Embedded, Inc........................................................................................................... 4...................................................................................................www.mscembedded.com One Stop Systems, Inc................................................................................................... 13, 16.............................................................................................www.onestopsystems.com Pentair/Schroff.................................................................................................................. 25................................................................................................ www.NEEDADDRESS.com Pentek............................................................................................................................... 9...............................................................................................................www.pentek.com Real Time Embedded Computing Conference..................................................................... 49................................................................................................................ www.rtecc.com RTD............................................................................................................................... 26-27.................................................................................................................www.rtd.com Sensoray........................................................................................................................... 17...........................................................................................................www.sensoray.com Trenton Systems................................................................................................................. 2.................................................................................................. www.trentonsystems.com TQ Systems GmbH......................................................................................................... 31, 35................................................................... www.convergencepromotions.com/TQ-USA WinSystems...................................................................................................................... 21....................................................................................................... wwwwinsystems.com Product Showcase............................................................................................................. 17........................................................................................................................................ RTC (Issn#1092-1524) magazine is published monthly at 905 Calle Amanecer, Ste. 250, San Clemente, CA 92673. Periodical postage paid at San Clemente and at additional mailing offices. POSTMASTER: Send address changes to RTC, 905 Calle Amanecer, Ste. 250, San Clemente, CA 92673.
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Remote Device to Device Transfers
Fast Data Transfers Need to access FPGA, GPU, or CPU resources between systems? Dolphin’s PCI Express Network provides a low latency, high throughput method to transfer data. Use peer to peer communication over PCI Express to access devices and share data with the lowest latency.
Learn how PCI Express™ improves your application’s performance
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