VLSI & Matlab projects list

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Tenet Technetronics TRAINING. SUPPORT. DEVELOPMENT

B.Tech Project List VHDL /Verilog based CPLD/FPGA projects

I2C Master Slave Core

AC97 controller IP Core using VerilogHDL/FPGA.

MAC10GB Ethernet Transmitter using VerilogHDL/FPGA

MAC10GB Ethernet Receiver using VerilogHDL/FPGA.

MAC10GB Ethernet Management Engine Interface using VerilogHDL/FPGA.

MAC10GB Ethernet Reconciliation sub layer using VerilogHDL/FPGA.

MAC10GB Ethernet DDR Inputs using VerilogHDL/FPGA.

MAC10GB Ethernet DDR outputs using VerilogHDL/FPGA.

MAC10GB Ethernet FIFO Interface using VerilogHDL/FPGA.

Simulation of security monitoring system using VerilogHDL/FPGA.

Serial UART

HDB3/B3ZS/AMI Encoder Decoder IP Core

Viterbi Encoder/Decoder

AES Encryption Core

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