EDITION 4
ADVANCED PACKAGING Enabling innovation in semiconductor EXTRACTS FROM LAYERS 4
CHAPTER
ADVANCED PACKAGING Advanced Packaging - Meet the Team Industry trends by Yole Développement A view from TFME’s CEO Panel processing update
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LAYERS 4 | ADVANCED PACKAGING | MEET THE TEAM
ADVANCED PACKAGING ENABLING FUTURE INNOVATION IN SEMICONDUCTOR DEVICES ADVANCED PACKAGING Wafer Level Packaging Panel Level Packaging In this year’s Advanced Packaging chapter you can read about market trends, Evatec’s panel processing activities and TFME’s vision to be “The Best OSAT Partner in Intelligent Generation in the World”. Andreas, Roland, the rest of the BU team and I look forward to supporting you in the Advanced Packaging challenges to come.
Albert
Albert Koller Head of BU Advanced Packaging An electrical engineer, Albert has more than 25 years broad experience in the semiconductor equipment industry in development, sales & marketing and general management. At Unaxis and then Oerlikon he was responsible for the semiconductor business for 9 years prior to the acquisition of the business by Evatec AG. On joining Evatec in 2015 he became Head of Cluster Systems before starting in his current role leading the Advanced Packaging Group.
Advanced Packaging
Andreas Erhart Senior Product Marketing Manager Andreas trained as an industrial engineer before completing his executive MBA in the UK in 2005. He has more than 20 years of experience in international sales, marketing and business development in electronics and semiconductors including 10 years based in China & Taiwan. His focus at Evatec is on applications like UBM/RDL, Fan Out and other composite substrates including FO Panel Level Packaging.
Roland Rettenmeier Senior Product Marketing Manager Roland is a mechanical engineer and completed his executive MBA studies in Austria in 2005. He has been working in the electronics and semiconductor environment and driving international business development since 2001. He joined Evatec in 2017 and is concentrating on business development for emerging applications like EMI Shielding, IC-Substrate manufacturing and FO Panel Level Packaging.
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LAYERS 4 | ADVANCED PACKAGING | INDUSTRY TRENDS
INDUSTRY TRENDS: ADVANCED PACKAGING Fan-Out, the new boost for panel-level-packaging The semiconductor industry is breaking records and expectations are high for the market future. In this context, advanced packaging is transforming from follower of frontend industry to enabler of future semiconductor applications and products. This is because scaling and cost reduction is not possible just by continuing on the path the industry followed for the past few decades with Moore’s law. Advanced nodes do not bring the desired cost benefit anymore and R&D investments in new lithography solutions and devices below 10nm nodes are rising substantially. In order to answer market demands, the industry seeks further performance and functionality boosts in integration. Packages are now requested to bridge the gap and revive the cost/performance curve while at the same time adding more functionality through integration. They become enablers for new designs, new performances and new applications. In contrast with classical packages, advanced types of packaging illustrate the important emerging role for better packaging technologies and are already widespread in key markets requiring high-end performance. They are gaining more and more market share thanks to the needs of various applications to get better integration. They will continue to dominantly address high-end logic and memory in computing and telecom, with further penetration in analog and RF in high end consumer/ mobile segments, while eyeing opportunities in growing automotive and industrial segments.
Advanced packaging already represents roughly US$25 billion in 2018 and is experiencing a total revenue CAGR1 2017-2023 of 8%. This is higher than the semiconductor industry (4-5%), PCB2 industry (2-3%) and more generally the global electronics industry (3-4%)3. The advanced packaging market is dominated by large IDMs4 such as Intel and Samsung, 4 large global OSATs5 and foundry and packaging house TSMC, accounting for 60% of the advanced packaging market. These leaders are working on numerous advanced packaging platforms such as Flip-Chip BGA6, FanOut Packaging, 3D TSV7, etc… Each platform gaining a lot of momentum but having different potentials and different characteristics. At the moment, the fastest growing platform is Fan-Out with 36% growth and experiencing a diversification of its targeted applications. Since 2009, Fan-Out packaging has been wide spread in low-density applications, most of the time with single die, such as Baseband, Power management, RF8 transceivers, etc… essentially in mobile phones and to a lower extent in automotive. This addressed the high demand from telecom industry for a thin and cheap package, capable of embedding ICs9 while not being limited by chips’ surfaces. Comfort zone of the platform used to be low IO counts applications but its potential for larger IO counts applications and other markets has been demonstrated since then, thanks to the use of FO by Apple for their application processors.
The Fan-Out market is already large (US$1.2 billion in 2018) and amongst that, the high-density fan-out applications market is more than US$500 million. This could reach more than US$1 billion in the coming years if telecom players other than Apple are willing to switch to fan-out packaging, which is to be expected. With such potential, the market is asking for more innovation and development and, as often in manufacturing, the main parameter of interest is the cost. The main trend in fan-out packaging being investigated at the moment to drive down cost is carrier size evolution and many manufacturers are considering that option or recently started production on panel. This will take time but will impact the market positively since cost reduction will enable further acceptance of the platform. FOPLP10 is currently attracting huge interest in the industry because of its low-cost potential and is attracting players with many different business models, including OSAT, IDMs, foundries, substrate manufacturers and FPD11 players. Lots of players have been developing FOPLP technology, but after years of development/ qualification/sampling, three players are finally entering in production in 2018: Powertech Technologies (PTI), NEPES, and SEMCO. NEPES has been in low-volume production since 2017 and PTI has its first product released in the second quarter of 2018. ASE, in partnership with Deca Technologies, is in the advanced development stage and will commence volume production in 2019/2020. The FOPLP market is expected to reach roughly US$280 million in 2023 at a CAGR
Advanced Packaging 2018-2023 of 79%12. First applications targeted by panel FO are lowdensity packages with limited L/S (10-15µm) and high potential volume devices (Baseband, RF, PMIC, etc…). SEMCO is also targeting denser and more complex products such as application processors for Samsung. SEMCO invested more than US$400 million during the last two years and has finally begun production with integrated APE for Samsung’s new consumer product, the Galaxy Watch. Equipment availability for PLP13 is not a bottleneck today. Tools are available in the market to support various process steps in panel processing. However, certain tools that support high-density panel packaging are special and expensive. So, tool cost, not availability, is the bottleneck. For some panel-producing process steps (plating, PVD14, molding, die attach, and dicing), tools are readily available and can be adapted from the PCB15, flat-panel display, or LCD16 industries. However, for other key process steps inherent to advanced packaging (i.e. lithography), the development of new, upgraded tool capabilities is necessary to support such steps as fine L/S patterning on panel, thick-resist lithography, panelhandling capabilities, exposure field
size, and depth of focus. Over the last few years, these tools have been in development at equipment suppliers. Equipment suppliers are adopting different strategies for entering the PLP business: acquisition (for example, Rudolph Technologies has developed PLP-focused tools based on knowledge received through its acquisition of AZORES Flat Panel Display Panel Printer); by leveraging tool experience from other businesses and upgrading it (i.e. Evatec, Atotech, SCREEN); and by organically developing PLP tools from scratch (ASM). Also, some tool suppliers have a strong position in the FOWLP market but are skeptical of the PLP business and thus are taking a waitand-see approach. Ultratech, Applied Materials, Lam Research are part of this group. However, the issue of the standardisation of the panel size and assembly process is the biggest hurdle for equipment suppliers. Each player is developing its own process using different panel sizes and infrastructure (PCB/LCD/WLP/PV/Mix) catering to specific applications and customers. In this scenario it’s not profitable for equipment suppliers to design and manufacture equipment according to different customers’ requirements.
2017 - 2023 advanced packaging revenue forecast by packaging platforms in US$ B Source: Status of the Advanced Packaging Industry report, by Yole Développement, 2018 40
ED~22%
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FO~15% FI~7%
Revenue (US$ B)
30
FC~7%
25 20 15 10 5 0
TSV~29% 2017 Flip-chip (FC)
2018
2019
Fan-in (FI)
Fan-out (FO)
2020
2021
Embedded die (ED)
2022
2023
Through silicon via (TSV)
CAGR 2017-2023
Advanced packaging has entered its most successful era boosted by needs for better integration and end of Moore’s law. Among the different platforms, Fan-Out packaging appears to be one of the most dynamic at the moment and needs a new wave of cost reduction for even more widespread adoption. This shall be achieved thanks to the move towards panel scale once the challenges have been addressed by the industry.
1. CAGR: Compound Annual Growth Rate 2. PCB: Printed Circuit Board 3. Source : Status of the Advanced Packaging Industry report, Yole Développement, 2018 4. IDM : Integrated Devices Manufacturer 5. OSAT : Outsourced Semiconductor Assembly and Test 6. BGA : Ball Grid Array 7. TSV : Through Silicon Via 8. RF : Radio Frequency 9. IC : Integrated Circuits 10. FOPLP : Fan-out Panel Level Packaging 11. FPD : Flat Panel Display 12. Source : Status of Panel Level Packaging report, Yole Développement, 2018 13. PLP : Panel Level Packaging 14. PVD : Physical Vapor Deposition 15. PCB : Printed Circuit Board 16. LCD : Liquid Crystal Display
As Technical Project Development Director at Yole Développement (Yole), Jérôme Azémar is supporting the development of strategic projects, following leading customers of the company within the semiconductor industry, from manufacturing to packaging. His mission is to develop Yole’s business and technical knowledge in the industry, maintain long term relationships with its accounts and meet their expectations. Santosh Kumar is currently working as Principal Analyst and Director Packaging, Assembly & Substrates, Yole Korea. He is involved in the market, technology and strategic analysis of the microelectronic assembly and packaging technologies. His main interest areas are advanced IC packaging technology including equipment & materials. He is the author of several reports on fan-out / fan-in WLP, flip chip, and 3D/2.5D packaging.
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LAYERS 4 | ADVANCED PACKAGING | A VIEW FROM TFME’S CEO
“Aiming to be the Best OSAT Partner in Intelligent Generation in the world”
Dr. Bill Shi, CEO of TFME, explains his vision for the company and the importance of close partnership with key suppliers to meet the growing future technology demands of TFME’s own customers. Working hard to fulfill our ambition TFME has the vision to become a worldwide leading company in the Semiconductor Packaging & Testing industry, and with more than half of the global top ten semiconductor manufacturers as our major customers already and a global customer base of more than 300 I believe we are well on our way. Quality and reliability of product are key success factors (KSFs) of semiconductor industry, especially within advanced packaging. As a market leader, TFME focuses on developing innovative technology, smart manufacturing and differentiated solutions to provide high quality, reliable solutions that meet our customers expectations. For example, we were the first China based corporation to realise the mass production of 12 inch 28nm mobile phone
processor chip backend processes, including Bumping, CP, FC, FT and SLT. 10nm processes are already qualified and 7nm processes are now under qualification. But achieving our vison requires constant development, working together with equipment and material suppliers to enhance the levels of technology and service we can provide. Doing that not only from our existing locations but also from additional overseas locations in future is also essential to support international customers. TFME currently has 5 manufacturing facilities in China, and one in Penang Malaysia, and is definitely looking for good opportunities to expand it’s footprint in other countries to be “local“ for those customers too.
Advanced Packaging
Offering broad capability is key TFME already provides a broad range of technologies and solutions Advanced Packaging such as WLCSP (Cu / Au bumping), FOWLP SiP, 2.5D / 3D packaging Packaging solutions for Memory, MEMS, Optical and RF device manufacturing In the “More than Moore” revolution, TFME is able to provide solutions with best in class Cost & Performance supporting customer’s needs for the emerging 5G, AI and intelligent generation. Smart manufacturing such as initiatives to use environmentally friendly manufacturing technologies help us reduce materials consumption, waste and costs and that’s where we rely on close cooperation with partners to help improve our process capabilities
Choosing the right equipment suppliers In such a dynamic semiconductor industry, it is very important for us to cooperate with equipment suppliers who can be our long term partners to deal with all the challenges we face. Of course we need thin film technology suppliers with a proven track record who can not only provide hardware and process support for today, but also the technologies we need for future develpments in advanced packaging. Suppliers that have good local support close to our manufacturing faciities and that are flexible in thinking to work together finding customised solution are both crucial for us in choosing our long term partner. We want to work closely together with our suppliers in order to build up a long term Win-Win partnership!
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LAYERS 4 | ADVANCED PACKAGING | A VIEW FROM TFME’S CEO
Evatec’s HEXAGON in action at TFME
Why Evatec?
Investment never stops
TFME has more than 20 years’ working experience with Swiss equipment suppliers, starting with ESEC in 1990s and more recently with Evatec. We chose Evatec for its long history and reputation for providing best in class technology and innovation solutions in the advanced packaging industry. Evatec has a high market share, a big worldwide installed base and was qualified by most of the leading companies / T1 players in the advanced packaging industry. In addition, Evatec’s continuous investment in R&D and “Swiss Made” quality gave us confidence that they would be a strong long term partner.
We will continue to invest in advanced packaing technologies such as WLCSP, FOWLP, SiP, 2.5DF/3D in alignment with the semiconductor industry roadmap. Combining that with our continuing strategy to build our team with international talent and extend our manufacturing footprint to provide “local“ service to international customers should keep us well on track to becoming a worldwide market leader:
We already have a successful co-operation working on applications such as WLCSP and FOWLP to improve our process capability and lower our manufacturing cost. We very much appreciate the commitment, proactive support and tailor made solutions just for us. In addition to the technology support that Evatec provides, we also gain both now and in the future from their developing customer service organisation which evolves to support our growing location base in China and overseas.
“We are definitely looking for further cooperation opportunities with Evatec as our long term partner.”
Advanced Packaging
About TFME
The company
The products
TFME, TongFu Microelectronics Co. Ltd, was established in October 1997 and an IPO in Shenzhen Stock Exchange on August 16, 2007. Our company has two major shareholders: Nantong Huada Microelectronics Group Ltd. and ICF (The Big Fund) since March 2018. The corporation specialises in IC assembling and testing, and is one of China’s top three IC Package and Test Enterprises. In 2017, TFME ranked 7th globally with revenues around US$ 1B. TFME have 6 production bases: The Headquarters in Nantong, Nantong Tongfu, Hefei Tongfu, TF-AMD Suzhou, TF-AMD Penang, Xiamen Tongfu. Through development and acquisition, TFME has become the local semiconductor multinational corporation and the leader of China IC Package and Test Industry. At present we have more than 13,000 employees. TFME owns several advanced packaging & testing technologies such as WLCSP (Copper Pillar and Gold Bumping), Fan-Out Wafer Level Package (FOWLP), Flip chip, BGA, SiP etc. We provide traditional Package & Test technologies such as QFN, QFP, SO, TO and solutions for automotive electronics and MEMS products etc.; Testing technique such as: Wafer Test and System Level Test.
Fan-out wafer level package for AP/BP application AP/BP: application processor/baseband processor
12 inch (10nm) Cu Pillar Cu bump array Size max to 75 x 58 mm FCBGA for high performance computing application NB-ITO module
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LAYERS 4 | ADVANCED PACKAGING | PANEL PROCESSING UPDATE
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LAYERS UPDATE
PANEL PROCESSING – WHEN SIZE MATTERS !
Advanced Packaging
It’s already a year since Evatec’s market introduction of the PNL 500 panel level processing tool to the Advanced Packaging market. Process Engineer, Johannes Weichart gives us an update on capabilities and performance levels of the latest tools off the production line as customer process demands and production cost targets get even tougher for 2019 and beyond.
The PNL 500 proves itself
The PNL 600 is on its way
The PNL 500 tool already proved itself over the last 12 months in customer production lines as well as working as a sampling platform for future customers in Evatec’s own Advanced Packaging Competence Centre (APCC). Important product quality criteria like good contact resistance performance, adhesion, yield and reliability could all be achieved on various customer substrates for the Fan Out Panel Level Packaging (FOPLP) or the advanced Printed Circuit Board (PCB) markets.
Due to growing demand in the panel market for even bigger substrates, Evatec will soon have solutions ready for exactly that. The next generation PNL 600 will allow processing of panels with a size of more than 600mm and be based on the same process technologies as the ones proven for the PNL 500 tool. But bigger definitely doesn’t mean slower, and the new tool will also have processing capabilities of more than 20 panels / hour.
Our approach of static processing has met and exceeded our expectations. 1. While other suppliers chose solutions with moving sources to achieve high uniformities, Evatec decided against this approach to keep the particle count at an absolute minimum and allow for more efficient cooling of substrates. Particles bigger than 2.5µm are in the low two digit regime on the full panel. 2. The newly developed dual frequency CCP etch source reported in last years LAYERS enables full face etching either with a clamped substrate or also clamp-less, depending on customer needs. We could also improve etch uniformity and rate over the last year as shown in figure 1 – although applicable rates do of course depend on the substrate to be processed and its heat dissipation characteristics.
Fig. 1: Etch rate (SiO2 etching) and uniformity on a glass test panel. SiO2 etch uniformity, mean = 201.15 Å, Sigma 1 = 4.68, Unif Max,Min = 8.85%. Rate = 1.68 Å/s
3. Similar improvements could be achieved for the PVD sputter source. Evatec’s concept of using rotary cathodes over a stationary substrate has several advantages including a very low CoO due to low target costs and high target utilisation (~80%), easy maintenance and very efficient target and substrate cooling for best product results. With further advances in magnet design and processing know how, uniformities and rates could also be improved significantly as shown in figure 2. 4. Advanced control capabilities on our tool like prevention of arcing / plasma damage are also key to achieving the best process yields. The process sources have already proven in the field that long term production is possible without processing errors.
Fig. 2: Uniformity of the copper layer. Cu film thickness, mean = 201.30 Å, Sigma 1 = 1.83, Unif Max,Min = 4.60%. Resistivity: 2.58e-8 Ohm m
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