High Performance Binary to Gray Code Converter using Transmission GATE

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Int. Journal of Electrical & Electronics Engg.

Vol. 2, Spl. Issue 1 (2015)

e-ISSN: 1694-2310 | p-ISSN: 1694-2426

High Performance Binary to Gray Code Converter using Transmission GATE Ravi Kumar Anand Department of ECE, National Institute of Technical Teachers’ Training & Research Chandigarh, India ravi88.anand@gmail.com Abstract: This paper gives an idea to improve power efficiency and effective area of binary to gray code converter using very popular transmission gate technology. Some sensors send information in gray code. So this must be important to convert a given binary stream into its equivalent gray code. In this paper the binary to gray code converter has been developed using gate, circuit level. The conversion has been done using conventional and transmission gate level and comparing these two in terms of power, number of transistors used and last but not the least area. The simulation result shows that binary to gray code converter using transmission gate has improved power efficiency and area by 76.22% and 72.3% respectively .This paper gives the true comparison between transmission gate and conventional gate implemented binary to gray code converter in many aspects like power, area, and number of transistors used for fully automatic and semicustom layout design.

the designers. The performance of the complex logic circuits is affected by XNOR-XOR circuits [6]. To summarize, this paper focused on some of the performance criteria are considered in the designing and evaluation of this converter cells while some are utilized for the ease of design, robustness, silicon area, delay and last but not the least power consumption. The technology used in this paper i.e. Transmission gate use less area and less transistors compare with conventional design logic. In this paper the circuit simulation has been done on DSCH3 and layout simulation on Microwind3.1.

Keywords: CMOS Transmission Gate(TG), Power dissipation, Semi custom design, CMOS logic gates, Effective area.

2. BINARY TO GRAY CODE CONVERTER

1. INTRODUCTION Low power and area efficient technologies are the prime concern for VLSI system designers. Together with that, the high speed binary to gray code converter that use low power consumption have indisputably become one of the most crucial components of a processor because they are mostly used in arithmetic logic unit.

This code converter combinational circuit is designed to convert binary to gray code. The input code of code converter is binary and output code of code converter is gray code. Table.1 shows the truth table of 4-bit binary to gray code converter. Table.1 truth table of binary to gray converter

Second term of consideration for designing of low power area efficient binary to gray code converter is delay which affects the overall performance of circuit to be concern. The extensive development in the field of portable system and cellular network has intensified the research efforts in low power micro-electronics [1]. This paper concern with 3 XOR gate as one unit which is the basic building block in various circuit especially arithmetic circuit .Here we propose a new design of XOR gate using transmission gate with CMOS inverter circuit. It cover less area compared to 12 transistor X-OR with CMOS circuit as well as less power with smaller delay[2].The strength of a signal is measured by how closely it approximates an ideal voltage source[3].

Corresponding circuit using basic CMOS gates on DSCH is shown in fig.1

Transmission gates require lower switching energy and it reduces the count of transistors used to make different logic gates [4]. In VLSI implementation, major problems are heat dissipation and power consumption. To solve this problem it is required to reduce power supply voltage, switching frequency and capacitance of transistor [5]. Area, delay and power dissipation have emerged as the major concern of NITTTR, Chandigarh

EDIT -2015

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