An Efficient Decoding Algorithm for Concatenated Turbo-Crc Codes

INTERNATIONAL JOURNAL FOR TRENDS IN ENGINEERING & TECHNOLOGY VOLUME 5 ISSUE 2 – MAY 2015 - ISSN: 2349 - 9303

An Efficient Decoding Algorithm for Concatenated Turbo-Crc Codes V.Muneeswaran1

R.Rajprabu2

Kalasalingam Institute of Technology muneessmart01@gmail.com

Kalasalingam Institute of Technology rajprabucrp@gmail.com

Abstract— In this paper, a hybrid turbo decoding algorithm is used, in which the outer code, Cyclic Redundancy Check code is not used for detection of errors as usual but for error correction and improvement. This algorithm effectively combines the iterative decoding algorithm with Rate-Compatible Insertion Convolution Turbo Decoding, where the CRC code and the turbo code are regarded as an integrated whole in the Decoding process. Altogether we propose an effective error detecting method based on normalized Euclidean distance to compensate for the loss of error detection capability which should have been provided by CRC code. Simulation results show that with the proposed approach, 0.5-2dB performance gain can be achieved for the code blocks with short information length.

INDEX TERMS—Turbo codes, cyclic redundancy check, ordered statistics decoding, normalized Euclidean distance.

considered as the component codes serially concatenated with the convolution codes. In some cases, the parity check matrices of the CRC codes are not appropriate for the iterative decoding, as the density of parity check matrices will not be sufficiently sparse and 4-cycle-free assumption cannot be guaranteed in this case. In this project, we proposed a CRC-aided hybrid decoding for turbo codes, in which the decoding scheme uses the iterative-based standard turbo decoding (STD) with the Rate-Compatible Insertion Convolution Turbo Codes. The decoding of the concatenated turbo-CRC codes incorporates the CRC bits into the Decoding process to further lower the error probability rates.

As the CRC bits participate in the error correction process and lose the error detection ability, an error detection approach based on the normalized Euclidean distance (NED) is also used. Results from the simulation show that the proposed CRC-aided hybrid decoding scheme can significantly improve the performance of turbo codes with short CB length and code rates.

1. INTRODUCTION TURBO codes have been adopted in the long-term evolution (LTE) systems due to the fact that they cannot only achieve high throughput with their parallel decoding architecture, as it supports almost any code rate and arbitrary code block (CB) length from 40 bits to 6144 bits for various services in Long Term Evolution. Turbo codes usually suffer severe performance degradation for services with short CB length, e.g., in voice over Internet protocol (VoIP) service, where the Code Block length is limited from 40 bits to about 352 bits. In systems using LTE, there are always 24 cyclic redundancy check (CRC) bits attached after the information bits in the physical layer, where the mixed bit stream to be encoded forms a CB. The CRC codes add considerable overhead which dramatically decreases the transmission efficiency, when the size of the CB is short. For instance, the coding gain caused by the 24 CRC bits almost achieves 4dB when the information length before CRC encoder is 16 and the CB is 40 in length. It is obvious that, due to the CRC overhead for short CB lengths, there is always an inherent performance gap between the realistic iterative turbo decoding and the maximum likelihood decoding (MLD) for concatenated turbo-CRC codes. In addition to error detection, some facts shows that CRC codes can also help in error correction during the channel decoding process phase.

Methods including Correction impulses and repeated (CIR) decoding and soft list Viterbi algorithm (SLVA) assisted channel decoding efficiently reduce the performance gap between the conventional decoding and the maximum likelihood decoding (MLD). Also, their contributions mainly lie in the improvement on the error floor. CRC codes are also involved in the iterative decoding, where they are

2. THE HYBRID DECODING OF THE TURBO CODES The basic two component codes in the Long Term Evolution turbo codes are both recursive systematic convolution (RSC) codes with the same generator polynomial degree. Then we can transform the polynomial of the RSC codes into an infinite periodic polynomial, in which the coefficients of the polynomial can be defined as an infinite binary sequence, A = {1, a, a, a ...}, with a = [1110010]. In the next step, we can get a vector p0 by selecting the first k elements from A in line with the CB length. A matrix of size k-by-k, Pk can be constructed using a right shift operation on the vector p0 in

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INTERNATIONAL JOURNAL FOR TRENDS IN ENGINEERING & TECHNOLOGY VOLUME 5 ISSUE 2 – MAY 2015 - ISSN: 2349 - 9303 row by row. In the last step, we obtain the final form of generator matrix Gturbo = [Ik | Pk | ˜Pk], the identity matrix Ik and the matrix Pk ,the interleaved one as ˜Pk are corresponding to the systematic bits and the parity bits respectively. The sub-matrix ˜Pk is constructed and obtained by permuting the rows of the matrix Pk according to the quadratic permutation polynomial interleaver method. The generator polynomial of the LTE CRC will be given by gCRC (D) = 24 i=0 gi × Di, {g24, g23... g0} = {1100001100100110011111011}. The information bit length is m = k−24 and the entire generator matrix of the turbo-CRC code is the product of the two generator matrices of the CRC encoder and the turbo encoder matrices, G=GCRC *GTURBO At the receiver, the Rate-Compatible Insertion Convolution Turbo Decoding and the iterative based Standard Turbo Decoding can be carried out individually and collaboratively. Then the two decoding processes are proposed based on the different principles in error correction as both the STD and the OSD can be carried out independently on the received signals Y= {Y1 … Y3k}. For the method of zero-tailing used in the LTE turbo codes, as the value of LLRs of tail bits are not get updated during the iterative decoding process, hence they usually are not as reliable as the LLRs of the systematic bits and the parity bits updated after a number of iterations. Thus, we do not consider the tail bits in the Rate-

can be carried out, in which the order-N flips of all subsets of the hard-decision bits with length less than N and performs re-encoding to provide a collection of candidate code words. In the decoding scheme, after each steps of iteration of Decoding, in addition to the LLRs of the systematic bits, also those of the parity bits should be calculated for the hybrid decoding scheme. An RCIC Turbo code consists of two parallel concatenated RCIC codes.

Based on the length of the fixed-rate convolution mother code, this codes can be simply construct a lower rates by inserting known dummy bits into the information bit sequence before convolution encoding process. Therefore, this way of rate matching method is also known as Dummy Bit Insertion (DBI) method.

Compatible Insertion Convolution Turbo decoding process.

Also some special schemes for the termination of turbo codes would help us to support the inclusion of the tail bits in the processing phase. The decoding process comprises three stages: process of sorting, technique of Gaussian elimination and re encoding. At first, the hard-decision bits based on the signs of the input information {R1…R3k} and the columns of the GTURBO matrix are both permuted according to the reliability { |R1|,…|R3k| } sorted in the way of decreasing order. At next, the Gaussian elimination is applied to the permuted matrix to obtain the systematic generator matrix GTURBO . Since the kth most reliable columns of the generating matrix could be not linearly independent they must be changed by involving the other 2k columns. At last, the process of re-encoding is executed according to the GTURBO matrix and the permuted hard decision bits and in this case the CRC detection will be performed based upon the first reverse-permuted k bits in the re-encoded code words. In the way to improve the performance gap, the higher order RSIC Decoding process

FIG 1:STRUCTURE OF AN RSIC ENCODER

FIG 2: STRUCTURE OF AN RSIC DECODER

contributions in the error correction phase. So that, then we can replace the matrix Gturbo with the entire generator 3. THE CRC-HELP IN THE DECODING polynomial matrix of the turbo-CRC codes G for the decoding process, and with the incorporation of the PROCESS additional constraints introduced by the Cyclic Redundancy In this CRC-assisted hybrid decoding method, the Cyclic Check codes in decoding phase. And with the assistance of Redundancy Check codes will also be treated as component the Cyclic Redundancy Check codes, this hybrid decoding codes of the concatenated turbo- CRC codes to make extra scheme still further narrow the performance gap of turbo-crc

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INTERNATIONAL JOURNAL FOR TRENDS IN ENGINEERING & TECHNOLOGY VOLUME 5 ISSUE 2 – MAY 2015 - ISSN: 2349 - 9303 codes with k-24 information bits, while carrying out the process of Gaussian elimination and re-encoding in the decoding process.

4. SIMULATION RESULTS The process of simulation can be carried out using MATLAB simulation tool. It can be seen that the following results were observed from the proposed decoding scheme.

FIG 6 : Interleaved signals

FIG 3: Input message bits FIG 7 : De-interleaved signal

FIG 4: CRC Bits FIG 8 : DECODED RESULT

5.CONCLUSION Thus in this paper, CRC-assisted novel decoding algorithm is Proposed and in that the CRC bits are not utilized for error Detection mechanism but for error correction mechanism in the Decoding process.

Results from the Simulation show that our proposed scheme can significantly increase the performance of the turbo-CRC codes with shorter information lengths, at the meanwhile keeping the undetected error rates sufficient low for many applications in wireless communication systems and LTEs involving transmission of data with shorter information length.

FIG 5 : RCIC Encoder Bits

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