Automated Systematic Discovery for Development and Production Brad Austin (1), Andrew Cross (2), Marcus Liesching (2) (1) IBM Corporation, East Fishkill, NY, USA (2) KLA-Tencor Corporation, Milpitas, CA, USA austinb@us.ibm.com / andrew.cross@kla-tencor.com Keywords: Design, Inspection, Design based binning, systematic defectivity 1.
INTRODUCTION
In many semiconductor Fabs a combination of in-line photo inspection (PLY) and targeted physical failure analysis (PFA) is used to identify and monitor random defectivity, process excursions, and systematic defects. This analysis is fed back to process and design teams to create actions and fixes which drive yield ramps for integration and development. At the 45nm design node and below the number of process steps involved has greatly increased the time and cost from wafer start to testable product. To meet compressed time to market schedules, semiconductor companies must be more reliant on in-line wafer inspection and defect classification for yield learning, excursion flagging, and process split analysis. Design based binning (DBB) of detectable defects is a relatively new capability of integrating design information with wafer inspection. This capability provides new opportunities for filtering and binning of defects based on both attributes of the defects and the design patterns at the precise locations where defects are detected. [1] Much value has been shown in the use of Design Based Classifiers (DBC) for more efficient SEM review sampling and for the historical analysis of known design patterns prone to systematic defects so that these patterns can be closely monitored. [2] Design based attributes are generated on tool concurrently with in-line wafer inspection. A semi-automated method was needed to compare and monitor inspection results from multiple wafers for the identification of unknown systematic defects, process window deviations, and the comparison of process splits. In addition a baseline design clip pareto is required for overall qualitative design aware analysis. To achieve this a client initiated offline (off tool) design aware methodology was developed to identify potential systematic defects, identify excursion wafers based on user set statistical limits,
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and allow for deep dive/drill down engineering analysis to find and resolve the source of the defects. The results of this analysis can be used to exclude excursion wafers from Design Based Group (DBG) analysis, and then identify potential systematic issues based on manually classified defect types. 2.
METHOD
The new off tool design aware capability integrates KLA-Tencor’s design based binning algorithms with a Defect Management System. This capability has been applied to IBM’s advanced 3x and 2xnm design rule technologies. This has enabled the ability to run Design Based Grouping for multiple wafers offline to identify systematic patterns of interest. DBG (Figure 1) provides an unsupervised binning methodology for the identification of spatially random but structurally systematic defects. This off tool design aware capability requires on-tool design aware analysis to provide defect data aligned to design. For off tool it is not possible to accurately translate the defect coordinate into design space.
1. KLA-Tencor Inspection
2. Defect Map
3. Design and optical images
5. Defect Pareto by Pattern Group 1
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4. Clips are grouped based on design similarity
Figure 1: DBB – Design Background Grouping. Inline tool identifies defects and aligns each to design data. Similar design backgrounds are grouped into bins (DBGs) This technique has provided the ability to identify systematic defect issues from nominal condition wafers and quantify differences between different process splits. In addition the methodology has been