797018

Invited Paper

New advances with REBL for maskless high-throughput EBDW lithography Paul Petric*, Chris Bevis, Mark McCord, Allen Carroll, Alan Brodie, Upendra Ummethala, Luca Grella, Anthony Cheung, and Regina Freed KLA-Tencor Corporation, One Technology Drive, Milpitas, CA USA 95035 ABSTRACT REBL (Reflective Electron Beam Lithography) is a program for the development of a novel approach for highthroughput maskless lithography. The program at KLA-Tencor is funded under the DARPA Maskless Nanowriter Program. A DPG (digital pattern generator) chip containing over 1 million reflective pixels that can be individually turned on or off is used to project an electron beam pattern onto the wafer. The DARPA program is targeting 5 to 7 wafers per hour at the 45 nm node, and this paper will describe improvements to both increase the throughput as well as extend the system to the 2x nm node and beyond.

This paper focuses on three specific areas of REBL technology. First, a new column design has been developed based on a Wien filter to separate the illumination and projection beams. The new column design is much smaller, and has better performance both in resolution and throughput than the first column which used a magnetic prism for separation. This new column design is the first step leading to a multiple column system. Second, the rotary stage latest results of a fully integrated DPG CMOS chip with lenslets will be reviewed. An array of over 1 million micro lenses which is fabricated on top of the CMOS DPG chip has been developed. The microlens array eliminates crosstalk between adjacent pixels, maximizes contrast between on and off states, and provides matching of the NA between the DPG reflector and the projection optics.

Keywords: Ebeam, direct write, rotary stage, DPG, maskless, lithography, TDI, gray level, reflective electron optics

1. INTRODUCTION EBL (electron beam lithography) since its beginning has fallen short in lithography for HVM (high volume manufacturing) because of insufficient throughput except for mask making 1. High resolution lithography and personalization for specialized products 2 is another arena where EBDW has proven useful because resolution and maskless capability have been more important than throughput. Quick-Turn-Around 3 4 5 6 and small lot manufacturing 7 have also proven to be quite successful. SCALPEL 8 9 and PREVAIL 10 11 12 13 were two competing Electron Projection Lithography (EPL) programs that demonstrated very good progress but did not utilize one of EBL’s most important assets, maskless capability. Currently there are primarily three maskless EBDW programs under development: MAPPER 14, IMS 15 and REBL 16 17 18. This paper describes the latest advances in the REBL Nanowriter development program.

REBL (Reflective Electron Beam Lithography) is a program for the development of a novel approach for high throughput maskless lithography. The program at KLA-Tencor is jointly funded by KLA-Tencor and DARPA under the Maskless Nanowriter Program. The program is specifically targeting 5 to 7 wafer levels per hour at the 45 nm node. The system is being designed, however, for extension to the 2x nm node and beyond. Figure 1 shows a concept diagram of the current REBL system.

REBL utilizes several novel technologies to generate and expose lithographic patterns at throughputs that could make ebeam maskless lithography feasible for HVM. The DPG incorporates CMOS on-chip circuitry in order to provide the extremely high data rates without excessive interconnect. The exposure strategy uses a TDI (time *E-mail: paul.petric@kla-tencor.com

Alternative Lithographic Technologies III, edited by Daniel J. C. Herr, Proc. of SPIE Vol. 7970, 797018 · © 2011 SPIE · CCC code: 0277-786X/11/$18 · doi: 10.1117/12.882636

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domain integration) technique of scrolling data across the DPG in synchronicity with the stage motion, which provides both redundancy for defective pixels as well gray-level exposure control for proximity effect correction and sub-pixel edge placement. The stage is a rotary mag-lev design that can hold and expose up to 6 wafers at a time.

Wafer registration will be based on non-actinic optical metrology of marks placed on the wafers.

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Figure 1. Concept diagram of the REBL Nanowriter, showing how the reflective electron optics enables the use of a nontransmission DPG chip to modulate the reflected beam with the pattern to be written. This concept also employees the use of a rotary stage with multiple wafers which increases throughput and greatly decreases system disturbances during the exposure.

The REBL Nanowriter, through its use of novel technology, promises higher throughputs than other electron beam approaches existing today. The REBL system has been architected to be almost entirely digital eliminating all settling times normally associated with analog control of beam deflection and/or shaping. The use of a rotating stage platter instead of the more typical oscillating linear stage greatly reduces the stage overhead resulting in higher throughput and the quasi-static characteristic of the rotating stage significantly improves the error budget.

Throughput for dense patterned levels is limited by the beam current at the required blur. For very sparse levels the throughput is limited by other system capabilities such as the stage or the data path for a single column system. A system architecture employing the use of multiple columns is now being investigated which will greatly reduce REBL throughput limitations for both dense and sparse patterned levels.

2. REFLECTIVE ELECTRON OPTICS The electron optics ray diagram of the REBL Nanowriter is shown in figure 2. A large area cathode of relatively low reduced brightness (Br < 104 Am-2sr-1V-1) generates an illuminating electron beam (the blue ray trace). The gun lens forms a crossover at the center of the condenser lens. The condenser lens forms an image of the source at the center of the field lens. An electrostatic beam bender is used to bend the illuminating beam through 110 degrees.

This was done in order to avoid the 100 kV electron gun, which is quite large, from interfering with the lower demag lens as well as the wafer and rotary stage. In addition, the beam bender also acts as a weak lens forming an image of the cathode in the vicinity of the virtual center of the Wien filter. The upper demag lens and DPG lens in combination form an image of the source at the DPG.

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The electrostatic DPG lens serves a dual purpose: it forms a virtual image of the crossover at infinity, and it decelerates the electrons to within a few volts of the cathode potential. When a mirror is turned “on” at the DPG it will reflect electrons from the illuminating beam. These reflected electrons are re-accelerated back toward the upper demag lens as they travel through the accelerating field of the electrostatic DPG lens. A crossover is formed just ahead of the upper demag lens by the DPG lens. The combined DPG lens and upper demag lens image the DPG in the vicinity of the virtual center of the Wien filter. The image of the DPG and the image of the cathode are superimposed in the Wien filter.

The purpose of the Wien filter is to separate the illuminating beam from the projection beam using the Lorentz Force which applies a force according to e(v x B) and therefore depends on the direction the electrons are traveling as they pass through the Wien filter. A Wien or ExB filter is constructed by means of superimposed electric and magnetic deflectors such that the force of each deflector on the electron beam is equal and along the same line. Because the velocity v and magnetic field B are both vector quantities the magnetic force direction of the magnetic deflector depends on the direction of travel of the electron beam. Therefore, the electric force and magnetic force combine to bend the illumination beam in one direction equal to twice the force of either deflector when coming from the gun and going to the DPG. The projection beam, traveling in the opposite direction through the Wien, coming from the DPG to the wafer encounters a net zero deflection force because the electric force and magnetic force cancel due to the direction of travel of the electrons through the Wien. Thus the illumination beam is deflected the remaining ~15 degrees to travel coincident to the projection axis to illuminate the DPG. The reflected electrons forming the projection beam from the DPG, going in the opposite direction are not deflected and travel a straight path from the DPG to the wafer. Finally, the upper demag lens forms a crossover at the back focal plane of the lower demag lens and the lower demag lens focuses the DPG image onto the wafer plane.

The demagnification of Column-2 currently has two settings of 62.5x and 80x. The column is being operated at the 62.5x setting but will be moved to the 80x setting in a few months to allow smaller pixel sizes. The DPG pixel pitch is currently 1.6 m but this pitch will decrease from its current value as the DPG design evolves. The current DPG pixel pitch and column demagnification produces a pixel pitch at the wafer plane of 25.6 nm which is shown in figure 6. This pixel size is obviously too large for 45 nm node lithography and beyond. Moving to the 80x demagnification will produce a pixel pitch at the wafer of 20 nm. We estimate that the desired pixel to CD ratio is between 2.25 and 2.5. For a CD of 45 nm this requires a pixel size of 20 nm to 18 nm or a demagnification of 80x to 88.89x. Column-2 could be modified to get to ~90x if needed, but Column-3 is built and currently under test and it will extend the demagnification to over 100x.

Figure 2. Ray diagram of Column-2 electron optics utilizing the new Wien or ExB filter for separating the illumination and projection beams.

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3. NEW COLUMN DESIGN FOR IMPLEMENTATION OF REFLECTIVE OPTICS A significant change in the system design has been the implementation of the reflective optics concept in a new column design. This new column is referred to as Column-2. The column design described in reference 16 17 is for Column-1. The new Column-2 design and testing results are described in reference 19. The principles of the reflective optics concept remain the same in this new design; the implementation is, however, greatly improved.

Column-2 utilizes a Wien or ExB filter to replace the magnetic prism used in Column-1. The function of both of these components is to separate the incoming illumination beam of electrons originating at the electron gun from the outgoing beam of electrons forming the patterned projection beam which is imaged at the wafer plane. The reason for this design change was to simplify the column design and significantly reduce the projection electron optical path length.

The Column-1 design which was based on a LEEM (Low Energy Electron Microscope) used a magnetic prism as a separator. The projection electron optical length of Column-1 could not easily be reduced because the prism behaves as a weak lens element which had a characteristic focal length which was quite large. This focal length determined the focal lengths of most of the other optical elements in the rest of the column. The projection optical length of Column-1 was ~1540 mm. The projection electron optical length for Column-2 using the Wien filter as a separator was reduced to ~506 mm. A comparison of column size to scale for the two columns is shown in Figure 3.

The decrease in the size of Column-2 is critical in at least two important ways. The shorter electron optical lengths for both the projection optics as well as the illumination optics greatly increases the beam current that can be projected to the wafer for a given pixel blur 20 21. This change also greatly reduces the size of the column and straightens the projection optical axis. Reduced size generally results in reduced cost, greater ease of manufacturing, better stability and improved error budget. It also is a big step in achieving a system design which will be capable of producing throughputs commensurate with HVM. More will be said about this in the section 7.

Figure 3. Comparison of the Column-1 and Column-2 designs both of which implement the reflective optics concept but in very different and distinctive designs.

The photographs in figure 4 were taken approximately two years apart in two different facilities. The photograph on the left was taken at the San Jose campus and published in reference 16. This is the first REBL test system. It uses a

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mag-lev linear stage and is 300 mm wafer capable but is only being used with 200 mm wafers. Column-1 is installed in this photograph. Column-1 is the only column thus far which has been used for wafer exposures. Some exposure results are shown in section 5.

Figure 4. The photograph on the left is the first REBL test system using a mag-lev linear stage with Column-1. The photograph on the right is the same linear REBL test system now with Column-2 installed.

Since this photograph was taken we have moved to the Milpitas campus and just recently retired Column-1 and replaced it with Column-2 shown in the photograph on the right. The large cylindrical object seen in the left photo with its axis in the horizontal direction and in the right photo with its axis in the vertical direction is a HV (high voltage) and magnetic shield. It is mostly empty space shielding the DPG and its associated control electronics which are at HV from EMI and shielding people from the HV. Future designs will reduce the size of this shield significantly.

4. DIGITAL PATTERN GENERATOR AND LENSLET ARRAY The heart of the maskless patterning system for the REBL Nanowriter is the Digital Pattern Generator (DPG). The DPG is a CMOS ASIC chip with an array of small, independently controllable electron mirrors in an array producing over 1 million beamlets. This array of electron mirrors act exactly analogous to the DLP® technology used by Texas Instruments for projection television. The concept of massively parallel and individually controlled beamlets reflected from the DPG is the principal enabling technology that provides the high speed maskless pattern generation capability. Producing an effective electron mirror, however, proved to be more difficult than first envisioned. This required an extensive development effort to integrate the CMOS logic with a MEMS structure that produces the required performance.

A development effort was started early in the program to develop a means of eliminating three problems that a flat mirror array would encounter. One problem was the crosstalk between adjacent mirrors when switching between “on” and “off” pixels. The second problem was related to the weak electric field above the mirror plane. It was desirable to increase the electric field near the mirror in order to reduce the effects of energy spread in the illumination beam. The third problem was a micro-lensing effect which affected the fidelity of the maskless image and is caused by the electric field at the boundary between “on” and “off” pixels The result of a nearly 3 year effort was a MEMS structure which formed an array of micro-lenses, one set of micro-lenses for each mirror. Each of these lens stacks are referred to as a lenslet and are comprised of a set of five electrodes (referred to as a pentode) separated by four dielectric layers as seen in figure 5. The top electrode interfaces with the macro-electron optics of the DPG lens. The top electrode and the next three (named upper, middle and lower) are common to all the lenslets of the array. The bottom electrode is the mirror which is switched “on” or “off” individually by means of the CMOS DPG chip located below the lenslet array.

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The fabrication of the lenslet array was a major effort since the complete pentode structure required over 75 custom MEMs processing steps, including the use of novel processing to perform high-aspect ratio etching. The lenslet array MEMS structure was developed independently from the CMOS development by IMEC. The entire development of this lenslet array was carried out using a 300 mm wafer tool set at IMEC’s 300 mm Fab in Leuven, Belgium. Fabricating the lenslet MEMS on 300 mm wafers was required because the CMOS logic, fabricated by TSMC in Hsin-Chu, Taiwan was also fabricated on 300 mm wafers and the lenslet MEMS was to be integrated with the CMOS DPG chip as a post processing step forming an integrated chip.

Figure 5. The CMOS with MEMS lenslet array mounted on substrate (lower left). Micrographs of cleaved lenslet

MEMS array structure including dimensions. There is one lenslet for each of 1,015,808 pixel mirrors.

The DPG chip is approximately 25 mm x 27 mm. The mirror lenslet array occupies an area at the center of the DPG chip approximately 6.5 mm x 0.4 mm. As seen in figure 5, the chip is mounted to a substrate for electrical testing.

The lenslet electrode MEMS structure is fabricated on top of the CMOS providing 4 electrodes to establish the potentials required to produce an electric lens for each pixel. The pixels and lenslets of the array are located on a 1.6 m pitch and the lenslet structure is ~4 m in height. The bottom electrode, one for each pixel, is the mirror electrode and is connected to and switched by the CMOS drivers located below the MEMS structure and connected through a via.

REBL Column testing is done using a column test stand which is equipped with a small x-y stage located at the wafer plane and which has a verity of test targets and a Faraday cup for beam current measurements. Located below the wafer plane is an electron microscope capable of up to 15,000x magnification. The image of this microscope is projected onto a YAG screen (Yttrium Aluminum Garnet scintillation screen) which can be captured by a high resolution camera. This YAG screen image is a very important tool used in the REBL program for the development of both the columns and the DPG’s.

Figure 6 is a YAG screen image of a DPG. The image on the left shows a little more than 1/8 of a full length DPG. The curved ends of the lines in the image are the extent of the round YAG screen. The lines and spaces shown are comprised of alternating groups of 12 pixels “on” and 12 pixels “off”. This image is the magnified view of the aerial image at the wafer plane projected onto a YAG screen. The long direction of the lines is the 4096 pixel direction. The 248 pixel direction is perpendicular to the lines.

The view on the right is a further magnified image which clearly shows the individual pixels on a 25.6 m pitch. This image is comprised of various line and spacing widths. The beam current in this image was turned down to a small fraction of the

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available beam current. This was done in order to distinguish the individual pixels of the DPG. As the beam current is increased the pixels will fill in the dark area between pixels until a uniform emission is achieved producing a result similar to the left image. This fill in as the beam current is increased is the result of beam blur. The allowable beam blur for a desired resolution is the final limit to beam current. Too much blur and resolution is lost. Too little beam blur will result in a loss of gray tone exposure which allows the sub-pixel placement of pattern edges and CD control. A viable lithography exposure could not be achieved with the DPG setup as depicted in the right image.

The dark rectangular spot near the center of the image on the right and near the center of the 2 nd line from the left on the left image is a dust particle located on the YAG screen. One day we may clear this particle off the YAG screen, however it has proved a useful reference from time to time. The triangular dark area at the extreme right hand side of the right image is caused by some debris on the DPG. In general, the number of defective pixels is very small < 0.05%. A study is underway to also measure the intensity variation of the pixels across a DPG. So far the study has indicated that the DPG’s studied have been well within the uniformity requirement by a factor of 4 to 6. This is not yet the final word on uniformity and we are working to improve both uniformity and defective pixels, but for now we find the results very encouraging.

Figure 6. The left view shows alternating groups of 12 pixel lines on and 12 pixel lines off as view on a magnified view of the aerial image projected onto a YAG screen. The view on the right is a further magnified image which clearly shows the individual pixels on a 25.6 m pitch with various line and spacing widths.

5. SOME FIRST EXPOSURE RESULTS An early milestone for the REBL program was to attempt resist exposures of lines and spaces as a means of validating the reflective electron optics concept and establish a baseline for Column-1 and the linear system. Even though both Column-1 and the linear system are planned to become obsolete before the end of the REBL program this baseline would be used to determine if there might be any unexpected issues with the REBL exposure concept and also to gauge later column designs against the performance of Column-1. The milestone required 200 nm hp lines to be exposed in PMMA and 18 C/cm2 CAR sensitivity.

A relatively simple quasi-static design of a DPG chip was used during the course of the development of the lenslet MEMS so that we could learn how the DPG lenslet array performed and how to optimize its setup. The lenslet MEMS comprises a 4096 x 248 array of electron optical lenses of 1.4 m diameter arranged on a 1.6 m pitch which matches the pitch of the CMOS array of mirror control pads. The lenslet was designed through extensive electron optic simulation in conjunction with the fabrication process as it evolved to produce a lenslet design with high electron reflection efficiency and contrast. The simplification made to the structure for process development of the

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lenslets was to only provide the capability to address each of 248 columns comprised of 4096 lenslets (pixels). This allowed only the capability to demonstrate a one dimensional array of lines and spaces of varying number of pixels in width.

Furthermore, because of packaging limitations the number of leads that could be brought out through wire bonds was limited to 181. It was decided to tie every 24 th line together and bring them out through one of the bond pads.

This limited the line and space capability but provided sufficient flexibility and capability for the column, exposure and DPG development.

This limited static DPG has been used for all wafer exposures to date. The pictures in figure 7 are two examples of resist exposures on wafers. These were made using the REBL linear test system with Column-1. The micrograph on the right show 100nm HP lines and spaces in PMMA resist. The resist sensitivity was approximately 390 C/cm2 with a thickness of 150 nm. The micrograph on the right are 65 nm isolated lines in 18 C/cm2 and 125 nm thick CAR.

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Figure 7. Early exposure results from the linear system using Column-1. On the left are 100nm lines and spaces in PMMA. On the right are 65 nm lines in 18 C/cm2 and 125 nm thick CAR.

6. ROTARY STAGE AND ROTARY METROLOGY The rotary stage used in REBL was chosen because it removes the throughput barriers normally associated with linear stages conventionally used in wafer lithography when a relatively small beam swath is used such as in REBL (~100 m). In addition, it behaves quasi-statically, imparting virtually no disturbances to the system during the writing process. The rotary writing strategy also has a positive impact on throughput because it eliminates the time to turn a linear stage around at the end of travel.

The REBL Nanowriter will expose batches of wafers by moving them under the electron beam on a rotating stage.

This technique eliminates the frequent reversals of direction and percussive accelerations associated with a highspeed linear stage. The apparent path of the image of the DPG across the circle of wafers is a spiral because as the platter spins an x-stage slowly moves the rotating platter in one axis relative to the column center.

Figure 8 shows the design of the rotary stage loaded with six wafers. The wafers are clamped by means of electrostatic chucks. A batch size of six wafers was chosen as a reasonable compromise for the first rotary stage prototype and which is now under test. This batch size may change in the future when integration to actual Fab conditions is taken into consideration.

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Laser Assembly

Ring Mirror

Figure 8. Drawing of the Rotary and X-Stages with six wafer platter and 10 axis metrology system.

The wafers lie in a horizontal plane and the stage rotates about an axis which is parallel to the axis of the column.

Exposure on the rotary stage proceeds in a spiral path with a pitch nearly equal to the beam height, starting from the outer diameter of the wafers and moving to the inner diameter of the wafers. The swath pitch is slightly smaller than the beam height because there is a few percent overlap of adjacent swaths.

The platter is a little over 1 meter in diameter and is mounted on a magnetically levitated hub. The approximate weight of the platter is 120 kg. The benefit of using magnetic levitation is that it decouples the platter from high frequency disturbances and any low frequency disturbances can be counteracted by the servo control of the platter position as it rotates.

There are mainly two means of metrology for the “stage”. There is a ten axis laser interferometer (IFM) system which measures all positions and attitudes of a very precision ring mirror attached to the center of the platter assembly relative to the “system”. In addition, there is a rotary encoder which measures the angular position of the platter relative to the “system”. In figure 8 the supporting structure for the 10 axes IFM system has been removed.

The interferometer detectors are shown suspended above the IFM system.

Figure 9 shows a series of pictures taken during the build of the x-stage, the rotary stage and the IFM metrology system and their integration into the system platform (vibration isolation system and vacuum chamber). The first photograph on the top-left shows the x-stage being integrated with the vacuum chamber. The mag-lev hub and platter are integrated next (top-middle photograph). The lower-right photograph shows the installation and alignment of the ring mirror. The IFM metrology system is shown in the top-right photograph; it is shown installed in a red tooling fixture and standing upright. Upon installation it would be laid down 90 degrees from that shown in the photo over the ring mirror. The lower-left photograph is the full isolation system and vacuum chamber with the stages and IFM installed. The EFEM wafer loader is shown in the background.

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X-Stage Base Plate

Ring Mirrow Mounted on Maglev Hub

Figure 9. These are views of the x-stage, and rotary platter being assembled into the vacuum chamber and platform of the REBL system. Also shown is the ring mirror being aligned and the 10 axis interferometer metrology system prior to installing over the ring mirror.

The system has now been tested under vacuum and is in the process of characterizing the stage and metrology system. The results thus far look very good.

7. COLUMN EVOLUTION AND THE HVM SYSTEM CONCEPT Figure 10 shows the REBL column evolution as it has unfolded in the past and where it is expected to go in the future. Column-1 was used as proof of concept for the reflective electron optics and the DPG writing strategy. It was also used to expose some simple lines and spaces in resist on wafers. The column had very limited capability relatively poor performance for beam current and contrast. Column-1 has now been retired. It has now been replaced on the linear REBL system with Column-2. Column-2 has been under test on the column test stand for well over a year. While on the test stand it was also extensively used to develop, test and characterize DPGâ&#x20AC;&#x2122;s.

Column-2 has been replaced on the test stand with Column-3.

The changes between Column-1 and Column-2 have been described previously in this paper. Suffice it to say that the change between 1 and 2 was revolutionary. The entire design concept for the implementation of the reflective optics was dramatically changed.

Column-1 had a beam energy of 50 keV with a beam current up to 200 nA and a demagnification from the DPG to the wafer of 50x. Column-2 has greatly reduced the projection distance from the DPG to the wafer from ~1540 mm in Column-1 to 504 mm in Column-2. The beam energy has been extended to 75 keV as well as the beam current to 1 ď ­A. The demagnification has also been increased to 80x. Column-2 has been integrated onto the REBL linear stage test system. As of this paper the column is operational and wafer exposures have just begun but no results are available yet.

The first Column-3 has been built up on the column test stand and is operational. Column-3 is an evolutionary change from Column-2 in that it incorporated the same design concepts but extends several of the performance

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characteristics of Column-2. Column-3 is capable of increasing the beam energy to 100 keV and the beam current to 2.75 A. The demagnification is designed for over 100x.

A fourth column is under development. The main objective of Colum-4 is size, cost and complexity reduction. The changes from Column-3 to Column-4 could be described as revolutionary in that the design implementation of very similar optics concepts is very dramatic. The rational for Column-4 is to achieve the throughput goals required for HVM.

Figure 10. The evolution of the REBL column development.

A single REBL column is practically limited to single digit microamperes for usable beam current at the wafer with the required blur. Therefore, multiple columns will have to be employed in order to achieve HVM throughputs. The projections for the DARPA contract established a goal of 11 microamperes for a system spec. This would produce the desired 5 to 7 300 mm wph (wph refers to 300 mm wafer levels per hour) goal. For very sparse levels (~5%) this would produce upwards of 40 wph. The best estimates early on in the program were that at least 5.5 microamperes would be achievable per column at the 45 nm node and therefore two columns might be needed to achieve the throughput goal of the program. However, for HVM at the smaller nodes 2x and 1x many more columns will have to be used. Throughput is entirely about how much beam current can be deposited on the wafer at the request blur.

Figure 11 shows a very conceptual view of a multiple column REBL system using the multiple wafer rotary stage. A six wafer rotary stage is shown because that is what is being built currently. This size was practical for the development of the system but may or may not be what is productized. The important point is that a rotary stage system allows room for many columns of reasonable size with a footprint well under 1.5 meters square.

There are multiple configurations under consideration, all using a cluster of columns, e.g. six columns as shown, nominally about 100 mm in diameter. Up to 6 of these “six packs” could be incorporated in the REBL rotary stage system. A big advantage of the rotary stage system is the abundant availability of space for locating columns.

As the number of columns increases several system requirements decrease. Effectively, by increasing the number of columns the width of the “paint brush” used to pattern the wafers is increased proportionally. This reduces the required stage rotational speed for a given throughput. The line-clock rate of each DPG and the x-travel distance are also reduced proportionally. The line-clock rate in units of ML/s (million lines per second) is the rate that the data is clocked from one line of 4096 pixels on the DPG to the next line of pixels. The columns are configured so that each column writes an annular region of the wafer with a width equal to the wafer diameter divided by the number of columns; this is referred to as the x-travel distance. Both of these numbers are important for system design because it is significantly easier to move the wafers ~8 to 25 mm in the x-travel direction rather than 300 mm. Also a single channel of a data path supplying data to each column in a multiple column configuration at less

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than a Tb/s (Tera bit per second) with a line-clock rate of up to 160 ML/s is achievable. However, a data path which would supply data to a single column configuration at 40 Tb/s with a line-clock rate of over 2000 ML/s is not. It should be noted that these bit rates for the data path are for the raw data rate (equal to the line-clock rate x 4096 pixels per line x 5 bits/pixel) assuming every pixel is changing at each clock cycle and there is no compression. We estimate data compression through simulation to be typically between 4x to 15x depending on the pattern complexity. Simulation work on data compression is being done in-house and by others 22 23.

Figure 11. This is an early concept view of a multiple column HVM system.

8. SUMMARY This paper has briefly reviewed some of the core concepts being developed for use in the REBL Nanowriter and the significant changes made in the last year or two. This past year has been the year of building: Column-2, Column-3, the mag-lev rotary stage and platform. We are now poised to begin wafer exposure with a better column on the linear system and later this year with the rotary system. Some first exposure results are shown which were made using the REBL linear mag-lev stage system (being used while the rotary stage comes online) and Column-1. We are just beginning to expose wafers using the linear system with Column-2 but do not have results at the time of this paper.

One of the biggest changes has been to the column design. A new design was implemented in Column-2 utilizing a Wien filter instead of the prism used in Column-1. This greatly shortened the length of the projection optics by a factor of 3 and it allowed the projection optical axis to be straightened. The basic principle of Reflective electron optics remains the same. Column-3 is also built and under test on the column test stand. It will be integrated with the Rotary REBL system later this year.

Reflective electron optics enables the use of a very high speed CMOS ASIC chip called the Digital Pattern Generator. The DPG is the enabling technology for maskless lithography in REBL. The DPG has also undergone a significant change with the addition of a MEMS structure integrated on top of the CMOS chip. This structure forms a 248 x 4096 array of 1.6 ď ­m pitch lenslets above each of the pixel mirrors.

A mag-lev Rotary stage architecture is used to remove the barriers normally associated with linear stage acceleration and greatly reduce overhead time. This stage has now been integrated into the system platform and is under test and characterization. A ten axis laser interferometer metrology system is also described and is also under test and characterization.

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The REBL column evolution both past and future was described. This evolution path is directly coupled with the future direction REBL must take to achieve HVM requirements for throughput.

ACKNOWLEDGMENTS This project is supported by DARPA and KLA-Tencor under The DARPA Agreement # HR0011-07-9-0007. The authors wish to thank the people at DARPA, SPAWAR, NRL and MIT-Lincoln Laboratory for their technical support and many helpful suggestions. TSMC greatly assisted in design of and fabricated the CMOS DPG. IMEC has been instrumental in developing the fabrication process for the MEMS Lenslet and integrating it with the CMOS DPG. Philips Applied Technologies has been instrumental in designing and building the magnetic levitated rotary stage. Support in resist technology is provided by IBM Researchâ&#x20AC;&#x201C;Almaden.

The views, opinions, and/or findings contained in this article/presentation are those of the author/presenter and should not be interpreted as representing the official views or policies, either expressed or implied, of the Defense Advanced Research Projects Agency or the Department of Defense. (Approved for Public Release, Distribution Unlimited)

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