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VOLUME 3 ISSUE

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AUTUMN

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$5.00 US

Yield Management

S O L U T I O N S Process Module Control Strategies for the Semiconductor Industry

SPECIAL ISSUE: A Focus on Reticles 15 15 COVER COVER STORY STORY — — M MEASUREMENT EASUREMENT AND AND A ANALYSIS NALYSIS R RETICLE ETICLE AND AND W WAFER AFER L LEVEL EVEL C CONTRIBUTIONS ONTRIBUTIONS TO TO T TOTAL OTAL CD CD V VARIATION ARIATION

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31 31 M MASK ASK M MAKING AKING IN IN THE THE 130 130 NM NM T TECHNOLOGY ECHNOLOGY N NODE ODE:: AN AN A APPROACH PPROACH TO TO D DEFECT EFECT F FREE REE M MANUFACTURING ANUFACTURING 52 52 “T “THE HE MEEF MEEF M METER ETER”: ”: A A R REALISTIC EALISTIC A APPROACH PPROACH FOR FOR L LITHOGRAPHY ITHOGRAPHY P PROCESS ROCESS M MONITORING ONITORING

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VLSI’s Reticle Forecast The mask making market has shown significant growth as chipmakers have pushed the limits of optical lithography beyond what experts thought possible only a few years ago. With lithography hitting a wall and optical the only reasonable choice, reticles have emerged as the primary market driver to satisfy the chip industry’s amazing appetite for technology.

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Masks as an Application-Specific Product In the era of deep sub-wavelength lithography, masks can no longer be treated as commodities. When a mask pattern is changed for a specific application, many more variables must be considered to ensure the resulting wafer lithography yields acceptable results.

21 International SEMATECH: A Focus on the Photomask Industry Many changes and trends in the International Technology Roadmap for Semiconductors will have a compound impact on the photomask industry.

27 A Proliferation of Masks: Why We Need Them, How to Pay for Them To help semiconductor manufacturers stay on their accelerated roadmap and maximize profits, a variety of photomask technologies will need to be used.

Customers should provide mask manufacturers with meaningful specifications, pay reasonable prices, and support the R&D effort of the photomask industry through joint ventures and partnerships.

31 Mask Making in the 130 nm Technology Node The need for precise control of critical dimensions and reduction of defects are some of the most critical issues for photomask manufacturers. In this paper, a unique photomask manufacturing method for precise CD control is described and an approach to defect-free manufacturing (DFM) is proposed.

36 Why Reticle Inspection Tools are Required in both Photomask Shops and Wafer Fabs It is now critical that both mask maker and user to have the same reticle characterization tools so potential yield detracting anomalies can be detected, to help optimize fab yields and revenues. “Best of Class” metrology and inspection tools are required to meet the challenges created by 130 nm fabrication.

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Cover image by Luie Lopez, Stephen Marley Productions

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15 Measurement and Analysis of Reticle and Wafer Level Contributions to Total CD Variations The impact of reticle CD variations on wafer level CD performance has been growing with the trend toward sub-wavelength lithography. Reticle manufacturing, CD specifications, and qualification procedures must now take into account the details of the wafer fab exposure and process conditions, as well as the mask process.

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41 Development of High-Quality Attenuated Phase-Shift Mask Photomask technology is currently facing a number of challenges in various fields, including materials, volume of mask-pattern data, mask exposure and fabrication, quality assurance, and cost and delivery. Of these, costs will be particularly important in the future of mask production. With its ability to considerably reduce the MEEF effect and tolerate fluctuations of mask pattern dimensions, the phase shift mask (PSM) is effective in suppressing mask costs. Various resolution enhancement techniques, such as alternating PSM and attenuating PSM are explored.

45 Photomask Improvement Challenges for the 130 nm Node and Below Sub-wavelength lithography will use various types of resolution enhancement techniques on reticles, such as embedded attenuated phase-shift mask and optical proximity correction, to extend refractive reduction optics to the 130 nm node and below. There are significant difficulties that confront mask makers and photomask blanks manufacturers as this process unfolds.

49 ‘The MEEF Meter’: A Realistic Approach to Process Monitoring With the advent of sub-wavelength lithography, process control has taken on a whole new meaning. Enter the MEEF (Mask Error Enhancement Factor) Meter, a practical process monitor target for the low k1 lithography regime. Its purpose is to allow accurate determination of the MEEF effect and maintain a consistent monitor for any changes in the lithography process that can impact this effect. Investigation and characterization are followed from the design phase, through reticle fabrication and finally onto the wafer.

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Product

News

58 TeraScan 570 DUV Reticle Inspection for Die to Database Applications TeraStar Multi-Beam UV Inspection of Multi-Die Pelliclized Reticles X-LINK Reticle to Wafer Defect Analysis Link 8250-R CD SEM Advanced Reticle CD Metrology 59 IMPACT SEM XP Automated Defect Classification for eV300 SEM Review System Klarity ProDATA Standardized and Automated Data Analysis SEM Image Analysis Module (SIAM) Critical Shape Difference (CSD) Analysis

Yield Management Solutions is published by KLA-Tencor Corporation. To receive Yield Management Solutions, contact Corporate Communications at: KLA-Tencor Corporation 160 Rio Robles San Jose, CA 95134 Tel 408.875.3000 Fax 408.875.4144 www.kla-tencor.com

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Editorial: Reticles Pick Up the Burden

20 Yield Management Seminar Series

©2000 KLA-Tencor Corporation.

All rights reserved. Material may not be reproduced without permission from KLA-Tencor Corporation.

Products in this document are identified by trademarks of their respective companies or organizations.

50 KLA-Tencor Trade Show Calendar

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Reticles Pick Up the Burden The inexorable drive of optical lithography continues to enable semiconductor manufacturers around the world to print increasingly smaller linewidths on larger and larger silicon wafers. Despite dire predictions that we have seen the “end,” optical lithography continues to push the envelope and stretch perceived limits with amazing regularity.

The resulting ability for wafer fabs to delay investments in shorter wavelength exposure tools far beyond what was optimistically contemplated a decade ago has saved billions of dollars in capital.

This has also enabled the semiconductor industry to shrink linewidths on an accelerated schedule, creating accelerated cash flows and staggering increases in shareholder value. The reticle has increasingly become a central player in this economic and technological windfall.

The industry has transferred some of the burden of smaller wafer linewidths and critical dimension (CD) control from optical exposure tools to more precise and complex reticles. Because of bin yield, CD control is worth about $1 per chip per atom in linewidth precision. While there is much discussion regarding accelerated roadmaps for wafer processing, the dimensions that are important on a reticle have dropped at least twice as fast as those on the wafer, to compensate for the slowdown in adoption of next wavelength exposure tools. The burden, and the source of value, has shifted.

Reticles have become amazingly more complex, endowed with billions of optical proximity correction (OPC) features and enhanced by phase shift mask (PSM) topography that minutely adjusts the wavefront of deep ultraviolet (DUV) light. Stretching physics in what is termed “sub-wavelength lithography,” we now print lines smaller than the wavelength of the DUV light used to expose them.

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Unfortunately, in sub-wavelength lithography small errors on the reticle are multiplied by a mask error enhancement factor that magnifies the effect of defects and CD errors. In a reticle image measuring 1 million by 1 million pixels (representing a photo-mask for 0.13 micron technology from an inspection standpoint), a single 100 nm by 100 nm defective pixel can kill production at a rate of one hundred 300 mm wafers per hour. A few years ago, the area of a critical defect ten times as large on a reticle was only one-tenth as complex.

Given this complexity, it is clearly evident that reticle quality is key to economically viable advanced lithography and semiconductor manufacturing.

The leverage on the finding and eliminating of nano-scale defects has enormous economic value, the cost of developing and operating these systems is tremendous. It is a battle of exponentials: exponentially more expensive development efforts build equipment that deals with exponentially more pixels in exponentially larger end-user markets. Between the equipment makers and the end users are many commercial levels. Closest to the reticle equipment manufacturers are the mask makers. After years of Darwinian consolidation, the remaining captive and merchant reticle manufacturers compete to cost-effectively provide the semiconductor industry with total state-of-the-art reticle solutions. Each of these manufacturers (the out-source suppliers to the chip industry) adds value through reticle process integration. They select the best-of-class writers, inspectors, metrology equipment, etch and repair tools, and integrate them with proprietary process and manufacturing know-how to produce tailored products for their markets. Given the critical importance of the reticle, the lethal significance of reticle defects, the risks of yield crashes, and the exponential nature of the economics,

Yield Management S O L U T I O N S

EDITOR-IN-CHIEF Kern Beare MANAGING EDITOR Uma Subramaniam

it is little wonder that second-place tools have struggled in this market. This trend will only accelerate as the economic value and the fragility and risk of the reticle grows.

While the equipment hardware is easily visible, information technology is the force multiplier. Today’s big “hardware” projects have as many software engineers as all other types of engineers combined. This equipment is then integrated into information architectures that add value through information exchange, correlation and presentation. Today’s reticles are printing the microchips that power the information architectures that are helping accelerate the semiconductor roadmap, increase yield and reduce cost. The future lies with best-in-class equipment and instruments connected in advanced information systems that feed the semiconductor cycle. circle RS#046

CONTRIBUTING EDITORS Thomas Salinas Carol Johnson Indira Rangarajan ART DIRECTOR AND PRODUCTION MANAGER Carlos Hueso D E S I G N C O N S U LTA N T Harry Wichmann C I R C U L AT I O N A N D A S S O C I AT E E D I T O R Cathy Correia

KLA-Tencor Worldwide C O R P O R AT E H E A D Q U A R T E R S

KLA-Tencor Corporation 160 Rio Robles San Jose, California 95134 408.875.3000 I N T E R N AT I O N A L O F F I C E S

KLA-Tencor France SARL Evry Cedex, France 011 33 16 936 6969

Lance A. Glasser Vice President and General Manager Reticle and Photomask Inspection Division

KLA-Tencor GmbH Munich, Germany 011 49 89 8902 170 KLA-Tencor (Israel) Corporation Migdal Ha’Emek, Israel 011 972 6 6449449 KLA-Tencor Japan Ltd. Yokohama, Japan 011 81 45 335 8200

Lance Glasser is Division Vice President and General Manager for KLA-Tencor’s Reticle and Photomask Inspection Division.

Lance’s most recent assignment has been RAPID Division Vice President of Advanced Programs. In this position, Lance was the program manager in charge of the TeraScan™, RAPID’s DUV reticle inspection system. Since joining KLA-Tencor in 1996, Lance has been a key member of the management team that has led the RAPID division to record revenues, profits and a dominant market position. Before joining KLA-Tencor, Lance was Director of Electronics Technology at ARPA and before that he served on the M.I.T. faculty in Electrical Engineering and Computer Science. Lance received his Ph.D. in Electrical Engineering and Computer Science at M.I.T. Autumn 2000

KLA-Tencor Korea Inc. Seoul, Korea 011 822 41 50552 KLA-Tencor (Malaysia) Sdn. Bhd. Johor Bahru, Malaysia 011 607 557 1946 KLA-Tencor (Singapore) Pte. Ltd. Singapore 011 65 782 6788 KLA-Tencor Taiwan Branch Hsinchu, Taiwan 011 886 35 335163 KLA-Tencor Limited Wokingham, United Kingdom 011 44 118 936 5700

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VLSI’s Reticle Forecast

by G. Dan Hutcheson, VLSI Research Inc.

The mask making market has shown significant growth as chipmakers have pushed the limits of optical lithography beyond what experts thought possible only a few years ago. Reticles have been one of the keys to making the race down Moore’s curve possible. It is this importance that has been the primary market driver. The worldwide market for reticles will grow 19 percent to reach $2.4 billion this year, more than twice the 1994 level. It should grow another 29 percent in 2001, reaching $3.1 billion, and is expected to hit $4 billion by 2004 (see Figure 1). Unit volumes are also being pushed up, and are expected to grow 4 percent in 2000 and 13 percent in 2001. The difference between revenues and unit volumes is reflected in average selling prices, which are rising at a 14 percent annual clip. This growth is due to two factors: the industry is coming out of a downturn and chipmakers have an amazing appetite for technology.

Mask costs have emerged as a hot issue in recent years because of these trends. Chipmakers worry they may not be able to afford reticles in the future. This is true even though reticle revenues are still far less than two percent of chip revenues - and are growing at a rate less than the chip market itself. In contrast, the amount chipmakers spend on reticles pales in comparison to what they spend on equipment, which is more than ten times higher. The reticle market is about the size of the chip market when ICs were first entering production and Intel had yet to be founded. It is also roughly the size of the equipment market of 1980. One can see that reticle makers are delivering tremendous value to the chip industry, with productivity increases along the way, while taking relatively little in return. Nevertheless, this does not alleviate the concerns of chipmakers.

The chip and mask industries are driving away from each other. Reticle costs have skyrocketed as critical dimensions have shrunk. A sub-0.2-micron reticle costs 20 times that of a 2-micron reticle. While steep, this is a seemingly linear correlation.

However, a 0.18-micron reticle averages $19,000 and 0.13-micron reticles are running $44,000, an increase of 2.3 times for only a 30 percent reduction in critical 6

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dimensions. Even aerial density is only up by 1.9 times; clearly the ratios are not favorable.

Meanwhile, the chip industry has moved to smaller lot sizes to address smaller market niches with differentiated products. ASIC manufacturers, in particular, will often have lot sizes as small as one to ten wafers. A 21-mask, 0.18-micron reticle set will cost in the neighborhood of $150-$200,000. So, is it a significant factor for ASIC manufacturers? Here is the amortized cost of such a reticle set per good die (PGD), using the logic benchmark of 100 good die per wafer: Wafers

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You may think 18 cents, or even 58 cents, is not a lot.

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I don’t think so. Especially when leading edge microprocessors go for $1,000 a pop. Do they have a choice?

Not really. They can lower reticle costs by using larger critical dimensions, but this is offset by fewer die-perwafer. ASIC makers are responding by “dumbing” down their reticles with loosened specs and dropping out some of the OPC targets and phase shifters. Some buy cheap reticles, but the cost is yield and low-speed sorts (great ad for the mask shops: “pay me now or lose later”). There’s no way around it: with lithography hitting a wall and optical the only reasonable choice, reticles are a critical technology. So, chipmakers have to pay their way.

Moore’s law is a hungry child that needs ever-better reticles to remain sated. It is also essential to the health of the reticle market that it moves to ever-tighter critical dimensions. Figure 2 shows this importance by breaking out the reticle market by critical dimensions (as printed on the wafer). It is based on the sales of individual reticles, not sets. As can be seen, almost all of the growth since 1996 has come from sales of sub-0.3 micron reticles. The pressure on reticle makers is far higher than that of any other area. While the bulk of wafer sales only recently shifted to favor 200 mm and equipment makers are shipping tools for 0.18-micron, 0.18-micron is now passé for reticle makers.

Most companies have been easily ramping 0.18-micron production using 248 nm scanners. This was true for both DRAM and logic. Reticle makers were, in large part, the enablers allowing them to paint with a brush larger than the lines themselves. Now the effort has shifted to bring 0.13-micron up by next year; they are currently working on 0.1-micron. Companies also intend to do much of this work with 248 nm scanners. Scanner technology is proving to be much more extendable than previously thought, as stepper companies push NA’s up and resist technology improves. But much hinges on the reticles themselves.

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The mask makers and their suppliers are the critical supply points here. For them to meet these requirements really pushes the mask maker’s capability. Currently, sub-0.16 micron (on-wafer CD) reticles account for only 0.2 percent of unit production and 3.4 percent of revenues. However, by 2001 they will account for 4.5 percent of units and 46 percent of revenues in the reticle market. Virtually all of these designs will require OPC and will need some level of phase shifting. Meanwhile, e-beam writing and reticle inspection tools are gasping to keep up with the requirements. Developing these tools is expensive, while potential sales volume is low.

This pushes up costs that must be passed on and included in reticle pricing.

It is the capital costs associated with the need to acquire these tools and the rapidity of their obsolescence, combined with massive increases in pixel counts as critical dimensions shrink, and rising MEEFs (Mask Error Enhancement Factor) that drive up the cost of leadingedge reticles. It is readily apparent that costs are an issue because mask makers have not made usury profits as leading-edge mask prices rise. Moreover, before this they bled for about a decade when the infamous 5X holiday hit (which was something if you were a mask maker). So, one might argue it’s their turn to make money. However, this has yet to happen.

The data shows that despite relatively high increases in average selling prices, there is still considerable price pressure on reticles. Average selling prices weighted by revenues are heavily driven by technology. Technology adds value, so they are not a real indication of what is happening to reticle prices on an individual basis.

Unweighted averages of just pricing changes by critical dimension category show prices have actually declined in every year on record up to 2000 (see Figure 3).

Moreover, they are forecasted to decline through 2004.

4600 > =0.75 Micron 0.5 to < 0.75 Micron 0.3 to < 0.5 Micron < 0.3 Micron

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Figure 3. Reticle pricing trends.

Another way to look at this is the diffusion rate of reticles, which is the ratio of reticle sales to semiconductor sales (see Figure 4). If the ratio is rising, it indicates chipmakers must spend relatively more to generate the same level of semiconductor sales or less if it is declining. The ratio actually declined throughout the first half of the 1990s and only started to increase in 1996 due to the rapid decline in chip prices as the industry

entered the downturn. Nevertheless, it is still below the levels in 1989 when we started to track the market regularly. It is also well below pre-5X holiday levels (we recorded a value of 1.9 percent in 1979). If the diffusion rate were the same today, it would increase mask industry revenues by $1.4 billion or 36 percent of this hypothetical size. The mask industry’s ability to lower costs over the last 20 years has directly contributed to chip industry profitability. At the same time, it has been instrumental in keeping the chip industry abreast of the massive technology changes needed to stay on Moore’s curve.

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Masks as an Application-Specific Product

by Steve Carlson, Photronics, Inc.

Historically, the lithography community has treated masks as a commodity. An “off-the-shelf” reticle could be ordered from a mask shop on short notice without worrying about too many details. If one reticle design worked well, the pattern could be changed and sent to the mask shop without worrying about any changes in data or design. If a reticle worked well in one fab, it would surely work well in another.

With the advent of deep sub-wavelength (DSW) lithography,1 masks can no longer be treated as commodities. A mask pattern change brings many more variables that must be comprehended in order to ensure that the resulting wafer lithography yields acceptable results. A reticle that works well on a stepper or scanner from one manufacturer may not print good wafers when a different system or process is used.

In this article, some new phenomena seen in DSW lithography are discussed. Then there is an explanation as to why relying solely on the mask purchased as an “off-the-shelf” or stand-alone solution is becoming an increasingly time-consuming and expensive approach. Finally, some solutions are presented for expensive and complex lithography problems by looking at other elements of the integrated lithography system.

New phenomena in deep sub-wavelength lithography

In DSW lithography, there are some new phenomena that make the lithographer’s job more difficult:

• reticles that meet conventional specifications but still have killer defects

Lateral Translations One type of reticle enhancement for DSW lithography utilizes hard-phase shifters. This technique can produce a lateral image shift if the depth of the etch varies across the feature or reticle.

An aberration in the projection optics can also produce a small lateral image shift.2 Of course, these aberrations aren’t unique to DSW lithography. What’s new is that the error budgets are becoming so small that these small lateral image shifts can now account for a significant percentage of the error budget (Figure 1).

Mask Error Enhancement Factor Current leading-edge projection optics systems in steppers reduce the size of the features to one-quarter or one-fifth their size on the reticle. Historically, you could rely on the errors being reduced by the same reduction factor. This would be expressed as a mask

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Figure 1. SIA Roadmap for wafer level control.

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error enhancement factor (MEEF) of one. In sub-wavelength lithography, these errors are “enhanced” and result in a greater error contribution. If the value of the MEEF is two, then a stepper would print an error on the wafer which is half the size of the defect on the reticle instead of one-quarter the size.

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at the 0.25 micron node, it would not be uncommon to see that write time double or even triple for an aggressive mask design at the 0.18 micron node.

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This effect increases with decreasing line-width on a given system. In DSW lithography, various optical phenomena tend to magnify errors on the mask to an even greater extent.3 One stepper might have a MEEF of 1.5 and another might have a MEEF of 1.8, depending on the aberration function, illumination optics, and details of how the stepper is set up.

In modern leading-edge mask making, several yield bottlenecks exist. Aggressive specifications for CD uniformity, targeting, placement, and defectivity commonly apply simultaneously to the same mask. In this case, the impact on final shippable yield can be dramatic. For instance, if the yield of each parameter is 90 percent, a mask that requires the same level of complexity for all four areas could result in a final plate yield of 65 percent or less.

Proximity Effects

Project Complexity

In DSW lithography, enhanced interactions between different features are seen. Iso-dense bias is an example of a proximity-induced line-width variation that accelerates with line-width reduction. Within the same lithography system, 20 nm of iso-dense bias at the 180 nm node, and more than twice that amount when the system is extended to the 100 nm node, might also be seen.4

Complex manufacturing techniques drive up mask costs. For example, some advanced mask processes require dry rather than wet etch. A dry etcher is a more expensive machine and has a longer process cycle time.

The Traditional Solution The traditional way to solve these problems has been to focus on the mask. That approach still works today.

Making sure to etch the mask correctly, resolve phase conflicts, and minimize proximity-induced translations can reduce the impact. The MEEF can be rendered irrelevant by making a mask without any errors. Making reticles with aggressive OPC features can minimize proximity effects.

The problem with focusing exclusively on the mask is that it’s a time-consuming and expensive way to solve the problem. Here is what drives the costs of advanced photomasks.

Drivers of mask costs

The main factors that determine mask costs are write time, yield, and the complexity of the mask-making process.

Write Time The amount of data required for writing the pattern explodes if the problem of proximity effects is being solved by adding aggressive OPC and scattering bars.

If, for instance, it took six to ten hours to write a plate

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There is a strong feeling that if a 180-degree phase shift is executed by etching the mask in three 60-degree increments, the probability that certain types of defects will result in unacceptable wafer results is minimized.

This manufacturing technique obviously requires more lithography steps and etch iterations. It increases the cycle time and the opportunity for negative yield impact.

Masks as part of an integrated lithography system

In certain situations, it might be cost effective to invest in an expensive mask as the stand-alone solution. In memory chip production, for example, where one mask will print tens of thousands of wafers, the cost of the mask could be amortized over hundreds of thousands of chips. On the other hand, in a true ASIC environment where the mask will expose only a small number of wafers, the impact of the reticle complexity and costs could completely dominate the non-recurring engineering overhead for a given design and perhaps even limit the market for that design.

In that case, the mask could be treated as only one component in the integrated lithography system and the system could be adjusted to optimize for cost. “An integrated lithography system” refers to design data, the stepper’s illumination system, projection optics, the resist, the etcher, and the wafer itself (Figure 2).

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Design Source Illuminator RETICLE Projection Optics Resist Pattern Transfer Confirmation Figure 2. A new perspective on mask making is required.

In DSW lithography, a change in any of those elements can affect the final printed image on the wafer. The knowledge base of how these components of the system fit together are continuously being improved In one recent example, a customer requirement that had delivered good wafer results suddenly caused a different result at the wafer. Further investigation revealed that it was not a change in the reticle process or results which had caused the wafer change, but a change in the resist system. In this case, the metric was iso-dense bias. The new resist system had a different response under certain conditions for iso-dense bias.

That different response, coupled with a narrow process margin, can cause unacceptable results unless someone adjusts other reticle parameters to compensate.

The conventional approach would have been to investigate what went wrong with the reticle process and to spend additional time and money to make a new one.

In the integrated system approach, it may be more cost-effective or expedient to adjust another parameter, such as partial coherence, to improve the result.

The key point is that in DSW lithography the various elements of the lithography system are becoming increasingly interdependent. The lithography community should take collective advantage of this by learning to tune the various elements of the lithography system to make good wafers, rather than relying totally on the reticle as a stand-alone element as has been done in the past.

Here are some examples of how this might be accomplished. In its simplest form, it would require a more complete integration of the mask vendor and the customer in the design process. In that way, the more common errors can be avoided and opportunities for design for manufacturability leveraged.

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The next step in sophistication would be to characterize the projection optics in each stepper. For example, the projection optics might have a radial component to its variation. If a systematic iso-dense bias is a characteristic of a given lens design, that compensation could be built into the data for the reticle. The more comprehensive solution, however, may be to understand the drivers of this systematic error and build the solution into the stepper selection and specification strategy.

By characterizing the optics in each stepper, a new way of dealing with the mask error enhancement factor (MEEF) also is created. For example, a test reticle could be built to quantify MEEF for each stepper and then lenses selected to allow reasonable reticle specifications.

If the non-uniformity across the reticle has a systematic structure that corresponds to a particular lens aberration, that reticle could be restricted to steppers that lie below a given threshold for that particular aberration.

Here is another example. Recently a customer ordered a type of contact mask traditionally made with an e-beam mask writer. According to conventional wisdom, e-beam systems produce features with better fidelity under certain conditions. The customer agreed that a mask with better cycle time could be made using a laser-based system. The mask was written and the customer printed a contact layer with it. The features on the wafer were too small. The customer immediately assumed that the mask did not meet specification. Closer inspection revealed that while the features did meet the specification, the features on the mask did indeed look “different” (Figures 3 and 4).

The customer examined the mask and saw that the corner rounding was different from what was usually seen. The features on the wafer were indeed too small, but strictly speaking, the reason wasn’t the degree or nature of corner rounding on the reticle—rather, the

Figures 3 and 4. Slightly “different” mask features.

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measurement associated with the specification was insufficient to define the contact as acceptable. In this case, the area of the contact is more important than a given diameter measurement. After the area of the contacts was optimized, the laser-based reticle produced the same results on the wafer as the e-beam reticle, despite the popular myth that image fidelity is always the most important measure of reticle “quality”.

The conventional method of dealing with the problem may have been to reject the laser-based solution.

However, by looking more deeply at the system, the metrics could be modified and a correlation established that would allow a solution clearly more cost effective.

A different element in the lithography system was modified to get the desired result in the simplest and cheapest way.

Summary

In some cases, it might be more cost effective or efficient to focus entirely on making a “perfect” high-tech reticle

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that would work with a lithography system as presently constituted. But in other cases, costs can be cut and time saved by modeling the entire lithography system and improving or adjusting one or more elements to create a solution. Masks are no longer a commodity. The right mask for each situation depends on the intended application and what variables should be optimized.

Masks have truly become an application-specific product.

Reference: 1. DSW lithography is defined here as imaging features below one-half the wavelength of the exposure illumination 2. C. J. Progler, S. J. Bukofsky, D. C. Wheeler, “Method to Budget and Optimize Total Device Overlay”, SPIE Proceedings 3679, 1999 3. A. K. Wong, R. A. Ferguson, L. W. Liebmann, S. M. Mansfield, A. F. Molless, M. O. Neisser, “Lithographic Effects of Mask-Critical Dimension Error”, SPIE Proceedings 3334, 1998 4. B.W. Smith, R. Schlief, “ Understanding Lens Aberrations and Influences to Lithographic Imaging”, SPIE Proceedings 4000, 2000

Import.

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Post-OPC Design

PROLITH Simulation

CD SEM Reticle Image

Quantify critical shape differences. Easily.

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Cover

Story

Measurement and Analysis of Reticle and Wafer-Level Contributions to Total CD Variation Moshe Preil, Ph.D., KLA-Tencor

The impact of reticle CD variations on wafer-level CD performance has been growing with the trend toward sub-wavelength lithography. Reticle manufacturing, CD specifications and qualification procedures must now take into account the details of the wafer fab exposure and process conditions, as well as the mask process. The entire pattern transfer procedure, from design to reticle to wafer to electrical results, must be viewed as a system engineering problem. In this paper we show how hardware and software tools, procedures, and analysis techniques are being developed to support the demanding requirements of the pattern transfer process in the era of 0.13 micron lithography.

Introduction

In the not-too-distant past, reticle CD qualification was the realm of specialists: those few individuals who understood the arcana of reticle specifications, mask-making equipment, procedures and processes, and the unique technical jargon of the mask shop. Mask-related conferences were the domain of these specialists, with limited involvement from wafer fab engineers. With few exceptions, most lithography engineers knew little about how an incoming reticle had been qualified. The assumption was that it met the specs, so it must be a “good” reticle; no further information was required. The reticle was viewed as a consumable, delivered to the fab by external sources just like photoresist, DI water, and other cleanroom supplies.

With the ever-shrinking CDs on today’s reticles and the advent of complex optical extensions such as phase shift masks (PSM) and optical proximity correction (OPC), reticle-related issues are becoming an increasing part of waferlevel CD control. More and more lithographers are actively investigating the role of reticle CD variations in the final wafer CD distribution. A clear sign of this trend is the increasing attendance and active participation by fab engineers at the BACUS Symposium on Photomask Technology, once the exclusive gathering of the reticle community (the “chrome users” in the acronym BACUS).

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CD control is now so tight that no one can afford to overlook the critical role of reticle CD variation in establishing viable wafer-level CD error budgets. The dreaded mask error enhancement factor1 (MEEF) means reticle CD errors do not transfer linearly to the wafer level. The lithography process involves a complex transfer function from reticle to wafer. The details of this transfer function must be understood for each type of reticle feature printed. OPC and PSMs add another level of complexity as they add critical interaction terms between reticle and wafer patterns. Only by addressing the entire pattern transfer process at a systems engineering level can users establish workable error budgets, wafer and reticle specifications and inspection strategies, and process control limits2.

Separating reticle and wafer CD errors

With the total allowed CD variation now in the 10-30 nm range, every nanometer of allowed variation must be carefully assigned in the error budget. Allowing for excessive variation in one component could impose unachievable targets for other elements of the budget. The development of viable CD-error budgets requires a detailed analysis of the sources of variation3 (SoV) and their impact on the final CD distribution. SoV studies are an increasingly important tool in developing both processes and advanced control algorithms. One of the primary deliverables of the NIST ATP4 project for poly gate CD control being managed by KLA-Tencor is an SoV study to drive feed forward and feed back advanced process control (APC) procedures. Effectively decomposing the sources of CD error requires separating reticle CD variations from the wafer level CD distribution. This separation is not simply a matter of subtraction due to the complexities of the mask error enhancement factor.

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The concept of the MEEF has been discussed extensively in the literature5,6,7. In fact, the MEEF is really a misnomer; it is not a simple multiplicative factor, but rather a function of feature type, size, stepper conditions (numerical aperture, sigma, aberrations, focus and exposure settings), and process parametersâ&#x20AC;&#x201D;even the specific type of photoresist used in the process can affect the MEEF. It is not enough to say that a given feature has an error of N nm and an MEEF of M, leading to a wafer level error of (N*M)/R, where R is the reduction ratio of the stepper. In order to separate the reticle contributions from the total CD variation, the MEEF must be calibrated for each feature type over the full range of process conditions.

Figure 1 illustrates the basic concept and tools for separating reticle and wafer effects. The figure is divided into reticle and wafer spaces, but the two domains are closely coupled by the complex transfer function that contains all of the details of the MEF. As shown schematically in the figure, the CD signature of the reticle can be significantly altered through Mask CD

Mask CD Uniformity

the pattern transfer process. In this case, the radial variation seen in the reticle data is no longer apparent in the wafer level data due to the addition of other, non-radial signatures and differences in the types of features being printed in each portion of the reticle field. Note that the wafer level data is shown here for only one fixed set of process conditions. To fully comprehend the impact of mask errors across the entire process window, wafer data needs to be collected over many combinations of focus, exposure, and other key parameters.

The data can be analyzed both experimentally and through modeling to understand all of the contributions and to extract the underlying sources of variation. The experimental data at both reticle and wafer levels is collected here with the KLA-Tencor 8200 series CD SEMs. This family of SEMs is uniquely suited to this task through its use of laser interferometer stages which allows the user to measure the exact same features at both reticle and wafer levels for accurate, feature-specific correlation.

Combined with automatic recipe Other reticle data (OPC, PSM layout, inspection results)

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Figure 1. Separating reticle and wafer contributions to the CD error distribution.

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creation based on reticle layout data, the CD SEMs can quickly collect large volumes of data correlating specific features from the reticle to the wafer over a wide range of focus and exposure conditions.

The wafer CD data can be analyzed automatically using Klarity ProDATA software to calculate the common process window across multiple critical features8. In addition, the SEM images of the reticle and as-printed features can be overlaid to provide a visual assessment of systematic reticle-to-wafer pattern transfer effects.

Differences in the source and resultant image can be quantified using the Critical Shape Measurement capability available with ProDATA. Finally, MEEF values which have been determined from prior experiments or modeling can be applied to the reticle CD data to predict the expected wafer CD pattern. Differences between the expected and measured wafer results indicate other sources of variance. In this example, the pattern that emerges after subtracting the radial reticle signature, shows a clear top-to-bottom variation across the lens field, indicating a tilted focal plane.

Even with the highest speed SEMs available, it would be prohibitively slow to measure wafer data over all combinations of focus, exposure and other critical process parameters. This is where simulation proves its value in bridging the gap between reticle space and wafer space. In this case, the modeling is shown in Figure 1 using known lens aberrations and measured reticle CD data; these inputs are run through the PROLITH modeling program to predict the expected wafer level results9. Calibrating the simulation against experimental data provides confidence that the simulated results will be valid over a much broader and more detailed range of process conditions than are accessible experimentally. The combination of

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reticle and wafer SEMs, and modeling provides the tools needed by both mask shop and wafer fab engineers to fully characterize the impact of reticle CD errors on wafer level process windows. This information can then be used to set reticle level CD specifications for even the most advanced processes.

Reticle CD qualification

Once the reticle CD specifications have been established, a strategy is needed to verify reticle CD performance. Historically, reticle CD qualification has been done with optical measurements on a limited number of special test structures. While this has been adequate in the past, it is riskyâ&#x20AC;&#x201D;to say the leastâ&#x20AC;&#x201D;to assume that millions of complex device geometries are in spec based on data from a few dozen test sites. State-ofthe-art reticle inspection systems and algorithms have been developed to detect localized CD errors anywhere within the reticle; however, these are error detectors, not metrology tools.

The reticle SEMs can measure large numbers of reticle CDs in a reasonable period of time, but even the

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SEM can only sample a fraction of the full reticle pattern. A complete solution to reticle CD qualification requires both reticle inspection and CD-SEM measurement10. The inspector covers 100 percent of the reticle at lower CD resolution; the SEM can sample the reticle with much higher accuracy. Even this combination cannot ensure that every single feature is within spec; but, fortunately, the mask-making process is fairly uniform. Any error in the writing or etching of the reticle is likely to cover a large enough area to be captured by the inspection and metrology tools. Careful study of the spatial frequencies of CD variation across the reticle can allow the user to select the SEM sampling frequency for the optimal characterization of the complete reticle CD distribution.

The role of optical extensions

The combination of reticle, CD SEMs, and simulation is also a powerful tool for calibrating optical extension processes and developing the rules and models used to apply these extensions to product reticles. Figure 2 Measure

OE Test Reticle

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Figure 2. Schematic diagram of the optical extensions process flow..

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shows a schematic illustration of the optical extensions process flow.

Model or rule-based corrections are determined from the calibration cycle shown in the upper part of the figure. The use of CD-SEMs to measure both reticle and wafer features is absolutely essential in this cycle to ensure that the corrections derived from this activity are as accurate as possible. In principle, these corrections can then be applied to product reticles in a straightforward manner.

In practice, the corrections need to be fine-tuned through numerous iterations of the calibration cycle.

A large part of the difficulty in implementing optical extensions is their sensitivity to numerous process variables and the dynamic variations in these parameters, even in the best fabs. As a result, the process conditions which prevail when production designs are manufactured may be subtly different from those that existed when the calibration was performed. The calibration cycle must be performed over a wide enough range of process conditions to ensure that the extensions applied to product reticles will result in acceptable wafer patterns over a maintainable process window, not just under ideal exposure conditions. Analysis of these calibration lots allows the user to predict which specific types of OE structures have the narrowest process windows. Manufacturing insertion of optical extensions requires the implementation of effective monitoring procedures to ensure that even these most critical features will be printed correctly and consistently.

Another difficulty in implementation is that, even if the optical extensions are perfectly optimized for adequate process windows, this does not guarantee that the actual reticle will be a perfect reproduction of that design11,12. Many OPC features are extremely small assist features, such 18

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as scattering bars, serifs, and other sub-resolution structures. The fidelity of the mask-writing process for these features is not perfect. Structures that were supposed to be sharp will become rounded, and both the width and area of the assist features may be far from the design values.

Phase-shift masks also require additional characterization, especially for multi-phase reticles. Small phase errors can result in unacceptable CD errors; larger phase errors will print as defects. Qualifying production reticles requires a combination of state-of-the-art reticle inspection tools and reticle CD SEMs to measure and verify the fidelity of sub-resolution optical extensions.

Comprehensive reticle qualification solution

These requirements can be met with a complete reticle qualification solution that incorporates both hardware and software as shown in Figure 3.

The 365UVHR inspection system

with the ALM300 algorithm provides 100% capture of localized CD errors as small as 45 nm10. CD and defect information from the reticle inspector can be linked to CD SEM measurements and images through the KLA-Tencor 9x server and X-LINK file transfer function13. Finally, both reticle and wafer SEM images can be superimposed over the intended design data for complete pattern qualification using the latest version of KLATencor’s Klarity ProDATA software.

This combination of hardware and software helps to bridge the divide between mask shops and wafer fabs, and enables the user to inspect, measure, and characterize the total reticle CD performance. New hardware platforms such as the TeraScan™ inspection system will further improve CD qualification capabilities and keep pace with the increasing complexity and critical nature of leading edge reticles.

365UVHR ALM300 Reticle CD Error ≈ 400µm Regions of CD error on Reticle

8250-R Reticle CD map

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Bridging on printed Wafer Figure 3. KLA-Tencor reticle qualification solution.

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The systems approach to reticle qualification

Hardware and software are critical to developing reticle solutions, but tools alone are not enough. Meeting the evolving demands of reticle qualification requires a greater level of cooperation and mutual involvement by both mask shop and wafer fab engineers. Mask shops are judged by the number of revenueproducing reticles they ship, while fabs are judged by the number of good die they produce. Both constantly strive to maintain their costs at the lowest practical level. These pressures can often create conflicts between the need to control reticle costs and the need to achieve the highest reticle quality to improve wafer yield. The increasing technical demands of today’s leading-edge reticle processes do not allow the luxury of treating the mask shop and wafer fab as separate entities with different, sometimes competing, economic motivations. Mask and fab engineers will need to work closely to develop production-worthy optical extension processes, CD-error budgets, and reticle-qualification procedures. The interactions between fab-process parameters and reticleCD variations will even drive mask shops to tailor the mask-making process for specific end users and applications. As Bill Arnold, executive scientist of ASML, stated recently14, “The day of the reticle as a commodity has passed, and all elements of the lithography system need to be engineered to the highest performance levels for successful wafer image formation”. Hardware and software provide the tools, but engineers in both the mask shop and the wafer fab will need to use these tools together to successfully address the challenge of engineering the complete lithography system.

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Acknowledgments

The themes presented in this paper represent the work of many different individuals and groups. The author wishes to acknowledge the many members of the KLA-Tencor lithography community for their efforts in developing the ideas and products described here. Thanks to Tony Vacca, Jim Wiley, Richard Elliott, Scott Ashknaz and Matt Hankinson for their help in preparing this paper.

References 1. “Lithographic effects of mask CD error,” A. Wong, R. Ferguson, L. Liebmann, S. Mansfield, A, Molless, and M. Neisser, SPIE Proceedings.

Vol. 3334, p. 106 (1998).

2. “The business dynamics of lithography at very low k1 factor,” S. Harrell and M. Preil, SPIE vol. 3679, p. 2 (1999).

3. “Sources of CD variation”, M. Hankinson, in Lithography Solutions for CD Control in the 0.13 micron Era, SEMI Technical Programs, Semicon West 2000.

4. The National Institute of Standards and Technology Advanced Technology Program (NIST ATP) is a government-industry collaboration to develop new technologies. An overview of the CD project can be found in “Intelligent control of the semiconductor patterning process: A NIST ATP Program,” M. Hankinson et. al., SEMATECH AEC/APC Symposium XI, Vail, CO, 1999.

5. “Analytic approach to understanding the impact of mask errors on optical lithography,” C. Mack, Proc. SPIE vol. 4000, p. 215 (2000).

6. “Characterization of linewidth variation,” A. Wong, A. Molless, T. Brunner, E. Coker, R. Fair, G. Mack and S. Mansfield, Proc. SPIE vol.

4000, p. 184 (2000).

7. “The MEF: causes and implications for process latitude,” J. van Schoot, J. Finders, K. van Ingen Schenau, M. Klaassen, C. Buijk, Proc. SPIE vol. 3679, p. 250 (1999).

8. “Data analysis for photolithography,” C. Mack, S. Jug, D. Legband, Proc.

SPIE vol. 3677, p. 415, (1999).

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9. “Inside PROLITH: A comprehensive guide to optical lithography simulation,” 2nd ed., C. A. Mack, FINLE Technologies Press (Austin, TX, 1997).

10.“Techniques to detect and analyze photomask CD uniformity,” A. Vacca, W. Ng, G. Anderson, B. Rockwell, A. Dong, D. Taylor, Proc. SPIE vol.

3873, p. 209 (1999).

11.“Good OPC: Where will this drive mask CD tolerance and mask grid size?,” D. Samuels, W. Maurer, T. Farrell, Proc. SPIE vol. 2621, p.

588 (1995).

12.“Effect of real masks on wafer patterning,” C. Spence, R. Subramanian, D. Teng, E. Gallardo, Proc.

SPIE vol. 4000, p. 54, (2000).

13.“Reticle quality management for subwavelength lithography,” I. Peterson, A. Klaum, E. Hou, Micro Magazine, September 2000 issue, in press.

14.Bill Arnold, quoted in Photronics, Inc. press release, June 13, 2000 http://biz.yahoo.com/prnews/00 0613/fl_photron.html.

About the Author Moshe Preil is the director of strategic marketing in the Lithography Module Solutions Group at KLA-Tencor in San Jose. He is currently working on process and yield management solutions for lithography, developing software and methodologies to increase yield and enhance productivity in fab areas. He received his Ph.D. in physics from the University of Pennsylvania, working in the areas of electron and optical spectroscopies. For the past 15 years he has worked in various areas of optical lithography, doing advanced development as well as production. In his previous position at Advanced Micro Devices, he was involved in the development of quarter micron tools and processes, specializing in deep-UV technology. He has also been active in the SEMATECH lithography community, and helped to formulate the current 193 nm development program at SEMATECH. Dr. Preil has taught several courses on the subject of optical lithography and has published a number of papers in the field.

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Yield Management Seminar A valuable venue for innovative ideas KLA-Tencor’s Yield Management Seminars (YMS) focus on value-added, integrated process module control solutions for defect reduction, process parametric control and yield management. Key topics include navigating the transition to the 0.13 µm technology node, with special emphasis on copper/low κ interconnect, sub-wavelength lithography, and the 300 mm wafer.

To register online for the upcoming YMS, go to: http://www.kla-tencor.com/seminar Date: Time: Location:

Wednesday, September 18, 2000 9:00 am – 6:30 pm Hyatt Regency, Austin, Texas

For information on future YMS, please complete and return the enclosed business reply card.

Call for future papers Papers should focus on using KLA-Tencor tools and solutions to enhance yield through increased productivity and performance. If you are interested in presenting a paper at one of our upcoming yield management seminars, please submit a one-page abstract to: Tavis Szeto by fax at (408) 875-4144 or email at tavis.szeto@kla-tencor.com.

YMS at a Glance

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LOCATION

October 18

Austin, Texas

December 7

Makuhari, Japan

February 21

Seoul, Korea

April 25

Munich, Germany

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International SEMATECH: A Focus on the Photomask Industry

by Wally Carpenter, International SEMATECH, Inc. (*IBM Corporation Assignee)

It is well known that the semiconductor industry continues to drive performance improvements through lithography resolution development. Further, the International Technology Roadmap for Semiconductors (ITRS) timing continues to be driven aggressively, resulting in less inherent lithography resolution advantage against the desired linewidth. The effect has been to require significantly tightened photomask specifications with aggressive timing constraints. Mask Error Enhancement Factors (MEEF) and wavelength choices are driving a need for multiple options for the photomask end user, which include Attenuated and Alternating Phase Shifting Masks. The compounded effect of the roadmap move-in results in extreme measures being needed to ensure the photomask infrastructure will be ready for these demands.

Introduction

Historically, the semiconductor industry benefited from the fact that the lithography wavelength was several times shorter than minimum linewidth. As we approach the 130 nm technology node, however, we find we will be using 193 nm lithography. Indeed, we will need to use 193 nm lithography to introduce the 100 nm node, gaining the benefit of 157 nm lithography some time after the first 100 nm production occurs.

These continue the trend established at the 180 nm node, using 248 nm lithography, where wavelength exceeds linewidth. The impact of this trend can be seen in the declining k1 represented in Figure 1. The k1 that will be available for the next few technology nodes are shown by the heavier line.

It is this declining k1 that has fostered the Mask Error Enhancement Factors and the growing dependence on the mask as an integral optical element, not just as a mask.

We find we must incorporate into the mask materials and features that enhance the inherent resolution capability of the exposure tool. While this enhancement is required on only critical levels, the percentage of levels that are critical and need enhancement is increasing with each succeeding technology node. For the 100 nm mask set, it is quite reasonable to expect several levels will require a weak phase shift mask, with optical proximity correction, and several levels will require strong phase shift masks. The production of phase shift masks, 0.6 157nm 193nm

0.5

248nm

k1 with NA = 0.8

This article will review the changes and trends that have occurred in the ITRS and their compounded impact on the photomask industry. Critical issues will be identified and addressed at a photomask industry level. Also, an overview of International SEMATECHâ&#x20AC;&#x2122;s roadmap will focus on key critical issues in the photomask industry.

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weak and strong, cause the mask maker to incur more cost and time to produce, especially for the strong phase shift mask. Further, the equipment infrastructure supporting the mask makers is not improving rapidly enough to avoid increasing production turn times. As a result, mask production times and cost are increasing, putting cost pressure on the end user. There isn’t a solution to this worsening economic situation on the immediate horizon.

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The most salient aspect of the roadmap is the definition of technology “nodes” and the timing for these nodes (a node is a set of requirements composed to support semiconductor manufacturing at a specific minimum linewidth). Reflecting the general trend in technology for accelerating development, the timing of the future nodes has always been shortened with each roadmap update. This acceleration is depicted in Figure 2. Note that in anticipation of future timing acceleration and to ensure developments are completed in a timely fashion, the Lithography Thrust in International SEMATECH 500 1994

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Year Figure 2. International technology roadmap for semiconductors — historical acceleration.

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Since 1994, SEMATECH and its successor, International SEMATECH, have used the technology roadmap sponsored by the Semiconductor Industry Association (SIA) to guide its work. The SIA roadmap began as a United States focused effort, encouraging a dialogue that has proven useful in creating a reference specification set for semiconductor manufacturers and their suppliers to use in their planning. Over the years, the effort and the benefit have become international. The roadmap is now referred to as the International Technology Roadmap for Semiconductors (ITRS).

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is targeting its 130 nm node work one year ahead of the 1999 Roadmap update and subsequent nodes two years ahead of the update.

For mask making, the acceleration has been more aggressive than suggested by the node timing changes.

Generally, with each roadmap update, the mask specifications for each node have been tightened. The effect has been to significantly accelerate and increase the technical demands on mask making. The effect on critical dimensions has been most pronounced, with International SEMATECH’s target being accelerated forward up to five years in just the past two years. See Figures 3, 4, 5 and 6.

The impact of the five-year acceleration can be best appreciated when it is understood that it takes four to five years to develop a new mask writer or mask inspection tool platform. Thus the impact of the acceleration has been to eliminate the possibility of new platforms for 100 nm node and perhaps the 70 nm node as well.

Current platforms just now arriving to support the 130 nm node will have to be extended through the 100 nm and 70 nm pilot lines. The industry is relying on incremental improvements to the mask-making tool base being sufficient to address profound increases in the technical requirements and need to contain associated cost increases. This is a risk.

Along with continuing acceleration of the technology nodes has been the evolution in lithography solutions.

In 1991, it was believed optical lithography would end at the 180 nm node with 248 nm DUV lithography where the exposure wavelength was longer than the linewidth. From 130 nm node and beyond we would be using non-optical, next-generation lithography

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(NGL). In the intervening time the industry has become creative in pursuing optical proximity correction (OPC), phase shift masks (PSM) and changes in stepper/scanner illumination to extract more resolution than implied by the exposure wavelength. The result has been the industry currently believes that by using 157 nm exposure, optical lithography can be extended to the 70 nm node with NGL being introduced in the transition between the 70 nm and 50 nm nodes.

International SEMATECH member companies generally plan to use either 193 nm or 157 nm lithography for the 100 nm node. By the 70 nm node, though, most anticipate a change to NGL will be well underway and completed by the 50 nm node.

The significant points to extract from the lithography solutions evolution are that it is indeed an evolution.

Historically, the solutions have continually changed and will likely continue to do so. International SEMATECH will have to continue refocusing its efforts, adapting to

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Mask defect inspection means many things to the mask maker, end user and tool supplier. Depending on one’s own personal experience, defects can range from the classic missing shapes and additional images, to actinic residuals, corner rounding, phase errors and so on.

However, when boiled down to its critical essence it is simply: “Will any abnormality on the mask print on the wafer within the boundaries of my process? Today or tomorrow?” As the wafer process engineer drives the process harder and tighter to gain the benefits of device performance, abnormalities that were once in the noise level have now become critical issues.

Looking back and into the future, the choices made three to five years ago are becoming today’s reality and also the foundation we use to bridge into the future.

One such choice was KLA-Tencor’s TeraScan DUV 16

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and fostering the change within the supplier community.

A recently required adaptation has been the rapid escalation in 157 nm. As the node was accelerated forward, it became impossible for NGL to respond quickly enough. Thus, an optical solution had to be found, with 157 nm selected, despite its unique problems.

The 157 nm will be critical for the 70 nm node to happen on schedule. With 157 nm lithography becoming identified as the critical solution for the latter 100 nm and 70 nm nodes just five years before it is to be used in production, the industry faces a tough developmental and cost challenge. It should be noted that the industry is allowing itself half the time to develop its 157 nm capability as it allowed for development of the 193 nm.

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Figure 6. Mask CD uniformity at 100 nm technology node for isolated

lines (DRAM half-pitch).

lines (MPU gates).

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mask defect inspection system, which was developed based on the mask industryâ&#x20AC;&#x2122;s projections and supported

by International SEMATECH.

of rapid movement and change shrinking lithography demands as evidenced by the ITRS Roadmap timing and requirements.

ISMT membership had become increasingly concerned with the state of the mask inspection infrastructure in 1996 and foresaw the future at that time as one of an incremental improvement of the base 488 nm-wavelength platform. The industry was largely converting to 248 nm-wavelength exposure systems and making significant progress to 180 nm-lithography ground rules. This began the current methodology of working in sub-wavelength lithography as a matter of necessity.

Throughout the DUV tool development, ISMT members remained close to the process and continued to make input to the requirements of tool performance and timing, which kept development on pace with technology demands. The list of critical risks was retired early in the process leaving a substantial list of issues that have been addressed and closed through the remaining time.

While not to the original schedule, KLA-Tencor voluntarily stepped up the challenges of meeting the more aggressive roadmap targets without changing the original contract agreement.

While the wafer industry was making these significant transitions, there began a growing concern about at or near stepper wavelength defects that would not be detectable by the then-current mask defect inspection systems. This primary concern combined with the physically shrinking defect size demands on masks that would likely not be resolved by 488 nm-based optics resulted in International SEMATECHâ&#x20AC;&#x2122;s recognition that focus must be applied here. This was key to ensuring mask defect inspection technology capability existed when required.

KLA-Tencor clearly recognized an entirely new approach would be required to meet the specifications identified by the ISMT members. KLA-Tencor also recognized a completely new platform had significant risks and expenses for such a small but critical market.

With all of these parts at play, ISMT and KLA-Tencor agreed to a financial arrangement which allowed KLA-Tencor to ramp staffing quickly and provide leading-edge computing power used in rapidly identifying the most promising methods. New methods of project management were also employed on this program that cleared the way for more progressive solutions.

A risk mitigation plan was also supported and implemented to ensure a shorter-term alternative path could be executed as needed. This plan involved an extension of the existing 3XX platform and transitioning to a shorter wavelength (363.8 nm), thus regaining resolution capability. The plan additionally provided a path for data processing performance improvements that, while not equal to the DUV system, would provide some interim relief for leading-edge requirements. The risk mitigation plan proved successful. While KLA-Tencor had not planned to sell these systems in quantity, it found customers needed this added capability because 24

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The DUV TeraScan platform will soon be shipped to customers throughout the world operating at a DUV inspection wavelength, are capable of meeting 130 nm node ground rules for binary masks and inspecting for some attenuated and alternating mask conditions.

The next critical step being addressed by ISMT and KLA-Tencor is in 193 nm Alternating Phase Shift Masks (Alt PSM). ISMT members have sent a strong message to the industry and KLA-Tencor regarding its Alt PSM mask defect inspection requirements. The focus and direction is also clearer than at anytime in the past for this form of mask technology. What is making this new effort successful is that ISMT members are working together as a team in defining these critical specifications and, secondly, KLA-Tencor is listening and working toward meeting those requirements.

Looking forward, mask defect inspection can move down many branches. One is to remain close to the scanners at wavelength performance capability such as 193 nm or even 157 nm wavelengths. Another is continuing to address phase shift capability for both attenuated and alternating forms; they will become a mainstream in the foreseeable future. Yet another is to branch into addressing linewidth variations across the mask at high or low frequency orders to ensure CD uniformity errors are captured. At the 100 nm-technology node and below, CD errors are as important to capture as the more classic defects.

Mask costs

As previously mentioned, mask cost is becoming a significant economic factor, especially for ASIC manufacturers. For years the industry has operated with a nearly flat mask cost increase and benefited from the

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Conclusion

The International SEMATECH membership supports and endorses driving the ITRS Roadmap requirements to a 2-year cycle through the 100 nm lithography technology node. Currently, membership supports a 3-year cycle beyond the 100 nm node. It is projected that as the necessary learning occurs to address 100 nm node issues on this cycle it may become the position of International SEMATECH to push for a 2-year cycle beyond 100 nm.

Changes to the ITRS Roadmap go well beyond a simple timing shift as previously seen in this roadmap. The impact is compounded by the influence of mask usage

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Negated Parameter Figure 8. Mask cost drivers.

in low k1 imaging solutions that drive much higher Mask Error Enhancement Factors. The tightened mask specifications drive 2-3 years of additional pull-in to the roadmap for mask CD uniformity and defect size issues.

Mask types at the 100 nm node will include 193 nm and 157 nm applications as well as Binary, Attenuated and Alternating forms. The influence of these multiple applications will selectively affect the mask ITRS specifications that will in turn affect the mask equipment development requirements. International SEMATECH and Selete see their responsibility to include ensuring appropriate requirements are dictated to the equipment suppliers as over specifying or under specifying a system can significantly effect mask costs and appropriate mask availability.

Finally, the specific issues and solutions to bring mask defect inspection capability to the industry was not a choice but a requirement. Future issues of mask inspection, write and repair must be considered global issues that must be addressed collaboratively through International SEMATECH and SELETE. 157 nm issues of blanks transmission, surface contamination and Electrostatic Discharge (ESD) are currently being addressed through global and collective collaboration.

Prospects for solutions appear promising.

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economies of scale as the mask industry consolidated.

However, as the industry entered the 180 nm node, along with its declining k1, mask cost began to rise significantly. This is displayed in a recent International SEMATECH analysis depicted in Figure 7. Typical mask costs are doubling from the 250 nm node to the 130 nm node and likely tripling by the 100 nm node.

These cost growths are reflecting the greater equipment cost and longer mask build cycles of the more complex masks being demanded. The paramount factor in the mask cost remains the mask write, as shown in Figure 8, while mask defect inspection is most improved.

International SEMATECH’s focus is containing the write time growth and pursuing yield improvements, such as with mask repair, to avoid having to re-write scrapped masks or reduce the multiple write steps required for alternating PSM.

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248nm Binary 248nm OPC 193nm OPC 193nm PSM (90/270) 157nm nm OPC 157nm PSM (90/270) EUV X-Ray Scalpel IPL (compliant) IPL (non-compliant)

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Technology Node Figure 7. International SEMATECH mask cost analysis.

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Strong & Weak Phase Shift Masks Moderate & Aggressive OPC Masks Advanced Binary Masks Pelliclesâ&#x20AC;&#x201D;248nm Photoblanksâ&#x20AC;&#x201D;193nm Phase Shift

Faster Devices Lower Power Devices Higher Yields Extends Stepper Life More Die Per Wafer Improves Process Latitude

Imaging Solutions For Semiconductor Producers and Their Customers

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DuPont Photomasks, Inc.

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A Proliferation of Masks Why We Need Them, How to Pay for Them

by Paul Chipman, DuPont Photomasks Inc.

Until recently, the manufacture of photomasks was fairly straightforward. Twenty years ago, we made 1X masters for Perkin-Elmer scanners. Ten years ago, we switched to 5X reticles. MEBES IIIâ&#x20AC;&#x2122;s, PBS, and KLA 200â&#x20AC;&#x2122;s ran high yields with low costs. Now everything has changed; with the advent of the sub-wavelength era, mask complexity is growing almost exponentially. Different mask types are generating significant value for different types of semiconductor manufacturers. To help the chip industry stay on its accelerated road map, mask manufacturers must broaden product offerings, as shown in Figure 1, to include even more varieties of masks with multiple types of optical enhancements. Of course, we can afford to develop and deploy advanced photomask technology globally only if we can earn an attractive return for our shareholders.

Our customers can help keep the photomask industry healthy by developing meaningful specifications, paying reasonable prices and forming creative partnerships with us to help offset some of the significant investment and cost.

Multiple mask types

At DuPont Photomasks Inc. (DPI) it has become apparent customers with different products, processes, business models and lithography strategies need masks with different optical enhancement technologies.

For example, consider trying to build a polysilicon layer. Polysilicon layers are very sensitive to CD variations and require high resolution. For the 130-nm node, IC manufacturers can choose from several approaches: 1) alternating aperture phase shift masks (AAPSM, see Figure 2 for examples), 2) aggressive optical proximity correction (OPC), 3) embedded attenuated phase shift masks (EAPSM) with or without OPC, or finally 4) a 193-nm platform, which may or may not require optical enhancements at 130 nm, depending on the design.

The alternating aperture phase shift mask provides the most difficulty for the mask manufacturer, but it will also provide the most value for some types of customers. For example, a customer who is making microprocessors may favor AAPSMs because those masks potentially offer the best CD control, which has a significant impact on microprocessor speed. The customer pays

the incremental cost for an AAPSM because it will improve his binning yields and thereby increase his revenue and profitability. Similarly, a DRAM manufacturer might select an AAPSM because he can amortize the cost of the mask over tens of millions of identical devices. Certain chip designs are not as CD sensitive as others and therefore the design can drive which optical enhancement technique makes the most sense.

Additionally, ASIC-type customers process relatively few wafers per design. These customers might select OPC because the mask is less expensive with faster cycle times. The optimal type of OPC depends on the design as well as the design rules that are chosen. For example, the chip may not have enough real estate for scattering bars or aggressive OPC.

The Past

Sub-Wavelength Era

Binary Photomasks

Binary Photomasks Critical Gate Layers Alternating Aperture PSM

Attenuated, Embedded PSM for 248nm Aggressive Optical Proximity Correction

Attenuated, Embedded PSM for 157nm Attenuated, Embedded PSM for 193nm EUV Scalpel/EPL

Figure 1. The Sub-Wavelength Era brings broader product offerings.

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For masks that appear to have similar design rules, we see a wide range of specifications between customers, sometimes even from different fabs owned by the same IC manufacturer. As many manufacturers buy their equipment from many of the same suppliers, we believe the difference in photomask specifications from fab to fab may have more to do with tradition and philosophy than science.

Cross Section

Multi-Phase Complimentary Figure 2. Alternating aperture phase shift masks.

The variety of phase shift masks will increase with the advent of the 130-nm and 100-nm nodes because the industry will move to shorter exposure wavelengths, which will require different blank materials and different pellicle materials. Each successive generation of steppers provides less of an advantage over the previous generation with respect to resolution. Many people believe 193-nm lithography will provide a significant benefit over 248-nm lithography only if we integrate optical enhancements into 193-nm masks from the very beginning. Mask manufacturers must prepare to provide 193-nm masks with strong shifters, EAPSM and OPC. We will have to provide a wide range of masks during the transition because some customers will be bringing up their 193-nm steppers, others will be pushing their 248-nm system and still other groups will be developing 157-nm systems.

While optical lithography has always surprised us with its incredible longevity, one day the semiconductor industry may indeed have to change to a non-optical technology. The leading candidates are EUV and EPL, which will require substantial investments in new photomask materials and manufacturing technology.

Meaningful specifications

In the past, mask manufacturers typically had the technical capability to exceed customers’ requirements, particularly with the advent of reduction lithography. A tighter specification wouldn’t require a new mask writer or a new inspection system. But now, each successive turn of the crank on specifications requires significant new investment and development.

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I encourage leading IC manufacturers to use scientific methods for determining specifications—simulations can be useful, but experiments are even better. Will tighter photomask specifications correspond to yield improvements in the fab? If not, don’t ask for them.

If so, making an expensive optically enhanced mask to satisfy a set of stringent specifications is of value when it has a direct relationship to chip performance.

The choice of specifications for defects, CD, registration, phase control and OPC features is a method of risk management. The previous strategy of a completely defect-free reticle probably made some sense when masks were a relatively inexpensive commodity. Now that masks are becoming an expensive and enabling technology for lithography, perhaps it’s not always the most cost effective approach. For example, ASIC companies trying to produce 100 die for a prototype out of five wafers with 1000 die/wafer may not need to worry about a defect which prints 0.1 percent of the time.

What’s the most cost effective approach to risk management in your situation? Would you like us to eliminate all your risk by making a perfect mask? As long as the tradeoffs in cost and cycle time are clearly understood, we are pleased to deliver perfect masks.

Fair prices

Pricing is an ongoing controversial subject. Fortunately, DPI has customers who come to say, “I’m willing to pay a fair price. Let’s figure out what that is and move on.” Fair prices adequately reflect the cost of building the product with a reasonable margin—a margin that allows us to develop the wide range of products that will enable our customers to stay on their roadmap.

Market pressure may tend to suppress margins, but you need a certain return on assets to continue to invest in this very capital-intensive business.

Fair pricing can also take into consideration the value of the mask to the customer. If a certain type of mask delivers a yield improvement, or if it extends the useful

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lifetime of a stepper and thereby allows the customer to avoid capital investment, a higher price might be fair because the mask provides more value.

Partnerships

Historically, large captives such as AT&T, IBM and others invested in, developed, and shared advanced photomask technology. Over the past 15 years, most captives have divested their internal photomask operations to focus on their core competencies of designing and manufacturing semiconductors. The burden of research and development is falling on the merchant photomask producers, while the business model has not allowed for sufficient R&D expenditures. Joint ventures such as DPI’s Reticle Technology Center (RTC) are one solution. A joint venture isn’t the only possible vehicle.

Partnerships between suppliers and customers can take many other forms, such as sales contracts, commitments and development contracts.

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Summary

Semiconductor manufacturers will need an ever-expanding variety of photomask technologies to stay on their roadmaps (Figure 3) and maximize their profits. To develop and deploy these technologies globally, we mask manufacturers will need our customers to provide meaningful specifications, pay reasonable prices and find some mutually satisfactory way to support our development so we can deliver whatever mask technology is optimal for your business at whatever time you need it.

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Over the past 20 years, mask costs have gone from five percent of semiconductor revenues to a low of about one percent in 1995. The “5X holiday”, pellicles, mask industry consolidation, and over-capacity have all held mask costs and prices low until recently. Today, photomask manufacturers must purchase $15M mask writers, $5M inspection tools, $2K photomask blanks, and significantly increase R&D spending. Phase shift masks require multiple separate writes and quartz etches. An optically enhanced photomask with phase shift and/or OPC features can write for 12-24 hours, or more. Photomask manufacturing is becoming more like semiconductor manufacturing with each generation. But, we don’t make hundreds of die per wafer; we can only make one at a time. Imagine where the semiconductor industry would be if they produced one die per wafer!

Photomask prices have begun to increase, driven solely by higher manufacturing costs, as the margins of photomask producers have not appreciably risen. If the photomask industry is to continue to invest to help enable our customers to remain on Moore’s Law, margins must improve, return on investment must improve, and we must earn the cost of capital to provide an acceptable return to our investors.

In the sub-wavelength era, photomasks provide value in numerous ways. Advanced photomasks have enabled our customers to accelerate shrinks which: * extend the life of their capital investment in facilities and equipment * enable more die per wafer * enable higher speed devices with lower power consumption As photomasks deliver increasing value to semiconductor producers, we anticipate the photomask industry will capture its fair share of this value to insure the global capability and capacity to meet the accelerated roadmaps in the sub-wavelength era. — by Ken Rygler, DuPont Photomasks Inc. Autumn 2000

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THE GOOD NEWS IS, 300 MM IS GOING TO CHANGE OUR WORLD. THAT’S ALSO THE BAD NEWS. You already know that 300 mm wafer technology is on the way. But you might not be ready for how big it’s really going to be. Or how many new challenges it’ll bring. Like uniformity control in deposition, CMP, litho and etch processes, for instance. And an increase in process-induced, center-to-edge defectivity ratios. So along with a knowledgeable and experienced partner, tomorrow’s fabs need tools and control systems that are integrated, automated and optimized for 300 mm.

Which is where we come in. With the only complete 300 mm process module control solution available, combining defect reduction, process parametric control and yield management software. As well as applications and consulting expertise. It’s how we’re making sure your fab stays well ahead of the technology. And the competition. For more information on all of our 300 mm offerings, please visit www.kla-tencor.com/300mm, or call us at (800) 450-5308.

We’ll help put your future in a much better perspective.

ALREADY THERE. ©2000 KLA-Tencor Corporation

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Mask Making in the 130 nm Technology Node: an Approach to Defect Free Manufacturing Naoya Hayashi, Shiho Sasaki, Toshifumi Yokoyama, Dai Nippon Printing Co., Ltd.

Specifications for advanced photomasks are becoming more stringent as the industry shifts to smaller lithography nodes.

Among various requirements for photomasks, the need for precise control of critical dimensions (CDs) and reduction of defects are the hottest issues for photomask manufacturers.

In this article a unique photomask manufacturing method for precise CD control is described and an approach to defect-free manufacturing (DFM) is discussed. To cancel CD errors, measuring resist CD after development is adopted. A mean to target (MTT) ratio of less than ±15 nm is achieved using this method.

Introduction

As semiconductor lithography development accelerates, the requirements for photomasks become more and more stringent. This is especially true for mean to target (MTT), uniformity of the critical dimension (CD) and tolerated defect size. According to the latest ITRS roadmap shown in Table 1, the specifications for photomasks of 130 nmlithography node are: CD-MTT ±10 nm, CD uniformity (3σ) <13 nm and defect size <104 nm. These specifications are difficult to achieve with current manufacturing processes. In this study issues in the manufacturing of 130 nm-node photomasks were investigated, and a new processing strategy to achieve the tight specifications were successfully developed.

In our previous paper1, 2 we reported that the combination of a high acceleration voltage e-beam writer, a chemically amplified resist (CAR) and dry etching was able to yield much smaller features. Sufficient CD uniformity is also shown as a fruit of the process with a CAR, but it was recognized that the technique to control CD-MTT has

to be improved to evade the influences of instabilities in the process. To compensate for the errors in the CAR process the CD had to be controlled during the actual patterning process by feed forwarding.

In addition, to meet the tight specification for defect size, we have to introduce defect free manufacturing (DFM) technology to photomask manufacturing. Currently the most dominant cause of defects is particles of human origin. The use of an automated cluster process tool, where all the process tools are connected by a robot handler with each other, may reduce defects.3 ’99 ‘00 ‘01

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Table 1. Mask technology roadmap.

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This article proposes an approach to achieving precise CD-MTT control and also provides an example of how a DFM concept in photomask manufacturing could be realized.

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CD control

CD-MTT control is one of the key technologies to satisfy the specifications of the photomasks. There are several errors having impact on CD-MTT. Differences in sensitivity between blank lots are one cause of errors. It is possible to correct exposure doses for each blank lot by use of the data of a sensitivity check. Furthermore, the influences of post exposure delay (PED) and post coating delay (PCD) on CD-MTT also cause errors.

Attention should be given to the fact that stabilizing those errors alone is not enough. Therefore, we have to introduce an error-compensation concept in our process to reduce the influence of those errors.

The method is based on the concept of correcting the errors by feed-forwarding information on the resist CD to the descum step before the dry-etch process. The process flow is illustrated in Figure 1. The resist CD is measured after development and the descum compensation step is done. The CD error is canceled by changing the descum

Pre-sensitivity Check

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time. An appropriate descum time is calculated on the basis of the difference between the resist CD and final CD. Figure 2 shows an experimental result for CD control using the descum compensation, where CD shift (defined as the difference between the resist CD and final or target CD) is plotted as a function of the descum time.

The CD shift is found to increase linearly with the descum time. To adopt the descum compensation, the descum condition was refined to achieve a high sideetch rate and less reduction of the resist thickness. In this way, if the resist CD can be measured precisely, it is possible to control the final CD to a high degree.

Figure 3 is a result for the CD controllability obtained in production using the compensation. The final CD errors are plotted for a series of production plates. The solid line shows actual CD data, whereas the dotted line shows CD data predicted if this method were not adopted. The CD controllability is found to be about

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±15 nm; this is, however, not enough for manufacturing 130 nm-node photomasks.

One of the reasons for this insufficient CD controllability is thought to be the dependence of the pattern densities for various photomasks. Therefore, further investigation of the CD shift on pattern density in dry etching is required.

Additionally, the accuracy of measurement of the resist CDs is speculated to have affected CD controllability.

In this production, the resist CDs were measured near the linearity limit of the measurement tool. Therefore, the linearity error was included in the previous measurement. This error needs to be reduced for meeting the specification of 130 nm-node and beyond.

Defect control is growing in importance as smaller geometries, tighter specifications and adoption of optical proximity correction patterns are required. Particles residing on the plate during the manufacturing process are thought to be the dominant cause of defects. In particular, particles found on alternating phase shift masks during their process easily yield shifter defects, which are now classified as killer defects because they are barely removed by any current repair technology.

Therefore, the development of a particle-free manufacturing process is essential.

Figure 5 illustrates the cluster system installed in our process line, which consists of an oven for post exposure bake for CARs, a developer, a stripper, a dry etcher, CD measurement tools, and a loader station. Each module is combined by a robot handler. In this system, an operator does not need to touch masks once they are placed them on the loader station.

The performance of the cluster tool was evaluated along with that of human handling. Human handling was performed as follows: An operator carries a mask in a carrying case from the oven to the developer, to the measurement tool, then to the dry-etcher (one cycle). In this one cycle the operator opens the case at the loader of each tool and puts the mask into the cassette in the loader by hand. When the process of the tool finishes, the mask is put back into the case. During the cycle the operator uses only one case. Four operators F, N, S, and T, carried the test for four consecutive cycles each. Among them, operators F and N were new to the job. Operator S also used a commercial mask handler (or a pick) instead of handling by her hands in the same procedure.

In order to reduce the errors described above, an advanced measurement tool is required. One of the candidates is a CD-SEM which has much better linearity to measure the resist CDs. Figure 4 shows the measurement linearity data of the current SiSCAN system and a KLA-Tencor reticle CD SEM, the 8100XP-R. The CD SEM system has better linearity than the SiSCAN. The limitation of the SiSCAN is 0.8 µm and its linearity worsens below 1.4 µm. The KLA-Tencor 8100XP-R keeps linearity down to 0.2 µm. In conclusion, the measurement with the SEM is advantageous for fine patterns less than 1.0 µm. Figure 5. Schematic representation of the fully automated cluster process tool.

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and feed-forwarding its deviation from the target to the descum time.

Operators and Methods Figure 6. Performance of the cluster tool compared with human handling for reducing the particle count.

Figure 6 shows the results of this evaluation, where the performance of the cluster tool is compared with that of human handling. Here the count of particles (with classification in size) for each operator represents a sum of the counts of the particles detected on the four plates handled by the operator. The cluster tool yielded one or zero particles. In the cases of human handling (both by hands and pick), the particle counts are found to correlate with the amount of experience an operator had; that is, the inexperienced operators splashed many particles on the plates.

Figure 7 shows defect control with the cluster tool. Here, the count of opaque killer defects is shown for 125 commercial plates of 250-150 nm nodes. Even after adopting the cluster tool, opaque killer defects were still detected on some plates. Although the origins of all killer defects, could not always be identified, it was proven that the killer defects occurring in the EB delineation process are successfully reduced by adopting the cluster tool.

Conclusions

We have successfully developed a CD-MTT control method with compensation. This compensation is conducted by measuring the post-development resist CD

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Several CD metrology tools were compared to select the most suitable one for compensation step. A KLATencor CD SEM tool demonstrated excellent capability for measuring the post-development resist CD, suitable for 130 nm-node photomasks.

Furthermore, a fully automated cluster tool which consists of the process tools combined by a robot handler demonstrated a possibility of defect free manufacturing.

Acknowledgements

The authors would like to acknowledge Daisuke Totsukawa, Hiro-o Nakagawa, Shigekazu Fujimoto and Hiroshi Mohri of Dai Nippon Printing for technical support, helpful discussions, and contributions to the experiment. Special thanks to Masaru Endo of Dai Nippon Printing Fine Electronics for his technical support in developing the new controlling method.

Reference 1. M. Kurihara et al., “Performance of a chemically amplified positive resist for next generation photomask fabrication,” SPIE Vol.3412, 279(1988) 2. T. Abe et al., “Comparison of etching methods for sub-quarter micron rule mask fabrication,” SPIE Vol.3412, 163(1998) 3. A. Oelmann et al., “Results from the first fully automated PBS-maskprocess and pelliclization,” SPIE Vol.2087, 57(1993)

Pushing the Limit: 100 nm and Beyond

To receive a FREE poster featuring this illustration of the TeraScan 570 visit our website: www.kla-tencor.com/poster

TeraScan 570 Deep UV Reticle Inspection System IC manufacturers are aggressively shrinking device geometries by pushing the limits of optical lithography. The TeraScan 570, KLA-Tencorâ&#x20AC;&#x2122;s new deep UV system, inspects the new complex patterns resulting from reticle enhancement techniques such as optical proximity correction (OPC) and phase shifting mask (PSM).

The TeraScan 570 provides reticle-to-integrated circuit design inspection capabilities to enable the production of the most advanced ICs. This system provides a four-fold increase in throughput compared to previous generation tools and can detect reticle defects below 100 nm. So photomask manufacturers can deliver the advanced reticles needed to push the limits of photolithography.

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Why Reticle Inspection Tools are Required in both Photomask Shops and Wafer Fabs

by Brian J. Grenon, Grenon Consulting, Inc.

The increased demand on mask fabricators to produce photomasks with tighter tolerances and with faster turnaround times has created a greater opportunity for undetected reticle anomalies to find their way into wafer fabs. Most recently, it has been reported that critical dimension (CD) errors and contamination under pellicles have been detected on reticles in the wafer fabs1, 2. For this reason, it is becoming more critical for the mask maker and mask user to have the same reticle characterization tools so potential yield-detracting anomalies can be detected. This approach will help optimize both fab yields and revenues. In order to meet the challenges provided by 130 nm fabrication, “Best-of-Class” metrology and inspection tools are required.

With the advent of 130 nm design rules comes one certainty: lithographers will have to deal with phase shifting masks (PSM), optical proximity correction (OPC), sub-wavelength low k1 lithography, and its by-product, the mask error enhancement factor (MEEF).

As a result of these challenges, robust mask and wafer characterization is mandatory.

More importantly, mask and wafer characterization need to be clearly understood and correlated. The type of data taken from the mask and wafer—and how it was taken— are critical to accomplishing this task.

Additionally, “Best of Class” characterization systems can guarantee higher yields and improved dialogue between the mask maker and mask user.

“Best of Class” systems can be defined as those systems which provide accurate and true answers to the most challenging mask and wafer design rules. A “Best of Class” inspection or metrology system must have the following characteristics:

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■

repeatability Autumn 2000

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reliability

■

ease of use

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correlation to both mask and wafer metrology and inspection systems

■

integration with the complete metrology and inspection scheme

As lithography challenges increase and k1 values become lower, stand-alone mask and wafer inspection and metrology systems add little value to the complete picture of wafer fab yields and profitability. The complete lithography scheme, which includes mask and wafer lithography, requires a seamless metrology and characterization approach. This is best accomplished by having identical metrology and inspection systems in the mask shop and fab. This approach becomes more critical as fabs transition to the 130 nm technology node. To better understand the challenges, it is essential to review the mask requirements for this node.

130 nm technology node mask requirements

Prior to the advent of 130 nm design-rule technology, mask specifications provided some measure of quality.

The parameters measured on the mask, however, often provided poor correlation of the mask contribution to

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Parameter (nm) Target CD

Ultra-Critical Layer 360 nm

Critical Layer 360 nm

Sub-Critical Non-Critical Layer Layer > 800 nm > 1200 nm

CD Tolerance

10

15

CD Uniformity

15

20

45

85

X/Y Delta

5

7

10

15

Iso/Dense Feature Bias

5

7

10

15

35

70

Linearity

5

7

10

15

CD Tool

CD SEM

CD SEM

CD SEM

CD SEM

Contact Layers CD Tool

CD SEM

CD SEM

CD SEM

CD SEM

Residual Registration

30

35

50

80

Butting/Stitching Errors

<5

<7

< 10

< 15

Registration Tool

Optical

Optical

Optical

Optical

Pattern Defect Size

100

130

180

200

Contam. Defect Size

100

130

180

200

Inspection Wavelength

< 365 nm

< 365 nm

< 365 nm

< 365 nm

Repair Trans. Loss

< 3%

< 5%

< 5%

< 5%

Verify Tool

AIMS or STARL i g h t

Table 1. Mask specification for 130 nm technology mask set.

final fab yield and chip speed sorts. The fundamental reason for this lack of correlation is essentially a result of failure to measure the right parameters and obtain the right quantity of measurements.

Table 1 provides an overview of the key parameters for various level 130 nm masks. Many of the parameters represent a new approach to defining mask quality.

While there are other parameters that can be considered, the parameters in the table provide the key elements of a quality photomask. There are basically three different elements to a high quality mask: global/ localized CD uniformity, global/localized placement accuracy, and transmission integrity across the mask exposure field.

Any anomaly that alters the transmission integrity across the field such that lithography ground rules cannot be maintained should be considered a defect. These defects can be discreet opaque or clear defects, semitransparent contaminants, or CD or placement defects.

A closer look at each of the specification elements will help to understand why “Best of Class” characterization systems are required to meet the lithography challenges.

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CD measurement and characterization

Most CD measurements are made with optical measurement systems that have limited resolution and use a NIST linewidth measurement standard with a high degree of uncertainty (~35nm) due to line-edge roughness. This uncertainty is higher than the tolerances requested by the mask user. It is, therefore, more important to have the ability to correlate the errors on the mask with what is found on the wafer. Additionally, the optical measurement limitation is around 0.50 µm, below which the measurements are suspect. Line-edge roughness and corner rounding tend to be “smoothed” by photo-optical measurements.

What is required for meaningful understanding of mask quality is an image that is a true representation of the features on the mask. CD SEM metrology provides imaging and measurements that better represent the true chrome features on the mask because edge anomalies are taken into consideration. This is particularly true when measuring contact-level masks and masks with OPC shapes, such as serifs and assist features.

Historically, CD uniformity was defined by measuring pre-defined images on the mask. These images were either “Ls” or crosses that were not part of the functional design. Measurement of features that are part of the functional design is necessary to assure mask quality at 130 nm technology. CD mean-to-target, uniformity, CD X/Y delta, isolated line-to-dense feature bias, and CD linearity must all be considered as part of the overall CD error budget. Photo-optical measurement systems do not have the capability to measure the small-error values outlined in the mask specification. Additionally, 130 nm mask specifications require more global and localized measurements to assure mask quality.

As shown in Figures 1a and 1b, localized errors can be detected and verified by CD SEM tools. Photo-optical measurement systems do not provide this capability. As reported in Monahan et al., a comprehensive systems approach is required to understand reticle CD errors and their contribution to total lithographic process window.3 CD SEMs can also be used to map cross-field and crosswafer errors, thus creating model-based uniformity maps for generating feedback to the mask and wafer lithographer. Since the reticle and wafer are measured in the same tool, better reticle-to-wafer correlation can be achieved.

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Figure 1a. Single line CD error

Figure 1b. CD SEM measurement

detected by a KLA-Tencor 365UV

of the same CD line error taken

HR inspection system.

with a KLA-Tencor 8100 XP-R,

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reticle CD SEM.

Mask registration and pattern placement errors

The second key element to mask quality is mask registration or image placement accuracy. While typically non-pelliclized masks are measured for mask registration, it has been reported that pellicle-frame-induced distortions often exceed the mask specification. Hence, there is a greater emphasis on measuring mask registration after the pellicle has been mounted on the reticle.

While the degree of placement errors is determined by the measurement of pre-defined crosses or “Ls” on the reticle, small localized placement errors at butting or stitching boundaries often contribute to the overall pattern placement accuracy. Butting/stitching errors can be global or localized. These errors, not generally detected by x/y measurement systems, are detected by defect inspection systems. The magnitude of CD errors can be easily measured using a CD SEM. Mask defect detection and defect metrology

In the past, mask defects have been classified as opaque or clear. As we continue with sub-wavelength lithography (low k1), the “black and white” type of defect represents only a small percentage of the types of defects that need to be detected and controlled in the mask shops and fabs. There are now “shades of gray” or partial transmission-loss defects. These types of defects can be a result of the mask fabrication process or can form after the reticle has been used in the fab.

The types of defects that can be present on a reticle and detected in the mask shop or fab are opaque (unwanted 38

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chrome), clear (missing chrome), particles, partially transparent films, scratches (on the reticle or pellicle), electrostatic discharge damage (ESD), non-uniform transmission through the pellicle, micro-fissures in the quartz, polishing grooves on the quartz, transmission loss from repair and sub-pellicle crystal growth. Many of these defects are a product of the mask materials or mask processes; however, partially transparent films, ESD, scratches, transmission loss through the pellicle, and sub-pellicle crystal growth are the result of mask usage and handling. For these reasons, it is important to continuously assure the quality of a reticle in the fab.

As lithography wavelengths become shorter, the potential for pellicle film degradation, crystal growth under the pellicle and the deleterious effects of partially transparent contamination becomes greater. In order to assure a comprehensive defect inspection of a reticle in the mask shop and wafer fabs several types of defect detection systems are required. As for CD measurement and mask registration, “Best of Class” systems are essential.

In the mask shop, there is a need to verify the quality of mask repairs. Transmission loss due to repair around ten percent was tolerable for high k1 lithography. Now that k1 values are consistently below 0.5 at 248 nm, wavelength transmission loss due to mask repair below five percent needs to be maintained.

While defect detection and quality assurance for reticles was the responsibility of the mask shop in the past, the previously mentioned new types of defects require the mask user to routinely re-qualify reticles in the fab.

Figure 2a shows a sub-pellicle crystalline defect that was formed as a result of reticle exposure to DUV illumination and detected by an inspection tool incorporating simultaneously transmitted and reflected light capabilities. This type of defect has been found in many fabs and appears to be ubiquitous. Figure 2b shows an ESD defect that was found during fab re-qualification.

Sub-pellicle crystals and ESD are two of the most commonly found reticle defects in the fab.

Comprehensive integrated reticle/wafer lithography management

As previously mentioned, stand-alone metrology and characterization systems do not provide the best solution to rapid communication and problem solving in the mask and lithography cell. Historically, mask makers and users operated autonomously and, as a result, most fab yield improvement was due to efforts on the part of the wafer fab engineer.

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Figure 2a. Sub-pellicle cr ystal detected by KLA-Tencor’s STARlight UV

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Figure 2b. ESD defect detected by STARlight.

inspection tool.

New software options that provide a critical link in wafer defect analysis by enabling wafer defects to be traced back to their origins on the reticle improve dialogue between the wafer fabs and mask shops, and enable defect data navigation and image review by all key lithography sectors. The capability for reticle-towafer defect coordinate translation allows for better understanding of the impact of reticle anomalies on wafer yield. As a result the mask shop can react more quickly to reticle-induced yield impacts.

2. B. J. Grenon et al., “Formation and Detection of Sub-Pellicle Defects by Exposure to DUV System Illumination”, 19th Annual Symposium on Photomask Technology, SPIE vol. 3873, pp.162-76, 1999.

3. K. Monahan et al., “Collapse of the Deep-UV and 193 nm Lithographic Focus Window”, Proceedings of the 1999 IEEE Symposium on Semiconductor Manufacturing, pp.

115-18, 1999.

KLA-Tencor TeraScan

Figure 3 provides an overview of how “Best of Class” tools can be integrated into a lithography cell to provide an optimized approach to quality management.

Leica LMS IPRO

Summary

KLA-Tencor 8250-R CD-SEM

Every technology node has provided the lithographer with a series of challenges. Many of these challenges have related to identifying, understanding and correcting yield detractors in the dynamic environment of the wafer fab. As we begin to enter the 130 nm technology node, the industry is positioned to take advantage of “Best of Class” systems that will provide the capability to achieve higher yields at an unprecedented rate.

References 1. A. Vacca et al., “Techniques to Detect and Analyze Photomask CD Uniformity Errors”, 19th Annual Symposium on Photomask Technology, SPIE vol. 3873, pp. 209-14, 1999.

Zeiss MSM100/193 AIMS

Mask Shop

KLA-Tencor TeraStar

KLA-Tencor X-LINK

Wafer Fab KLA-Tencor 8250-R CD-SEM

KLA-Tencor TeraStar

Figure 3. Provides an overview of how “Best of Class” characterization and metrology tools integrate into a lithography cell.

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WE’RE READY FOR THE FUTURE OF COPPER/LOW-κ INTERCONNECT. WHATEVER IT MAY HOLD. Nobody’s certain what the right low-κ dielectric for copper interconnect at .13µm and beyond is going to be. But one thing’s for sure: the integration challenges will be formidable.

And they’ll range from optimizing barrier and etch stop layers to having the mechanical strength to withstand CMP. That’s why we’re developing the new applications you’ll need to control low-κ technologies, and integrating them into our advanced defect, parametric and analysis systems. All so that you’ll be able to evaluate yield at virtually every step. It isn’t easy. But it’s proof once again that we’re the right choice to help speed your fab’s transition to the new world. For more information, call 1-800-450-5308, or visit www.kla-tencor.com/lowk. You’ll see that we’re ready for the future. No matter what it holds.

ALREADY THERE. ©2000 KLA-Tencor Corporation

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Development of High-Quality Attenuated Phase-Shift Masks

by Toshihiro Ii and Masao Otaki, Toppan Printing Co., Ltd.

Along with the year-by-year acceleration of semiconductor device miniaturization, the frequency of technology roadmap renewal has increased by a factor of three from once every three years to once a year. It is not possible to cope with fabrication of high-density semiconductor devices simply by reducing the pattern size of the mask because aggressive pattern shrink on the photomask will lead to deterioration of the resist pattern when transferred to the silicon wafer surface in the exposure process. To tackle this problem, OPC (optical proximity correction) features are added to the photomask, which results in increased complexity and miniaturization in the photomask-making process. Consequently, the volume of mask-pattern data is growing drastically, and the time required for mask-defect inspection and mask-writing processes keeps increasing.

Moreover, the need to achieve outstanding process accuracy raises the costs of mask production and inspection tools. Such a drop in mask throughput and the increase in cost of materials and tools seriously affects the costs of photomasks.

Step-and-scan-exposure systems adopted ArF lithography in 1999, however, ArF lithography systems, including resist, are still under evaluation and development. From 2000 to 2001, the feature sizes of semiconductor devices will be further reduced to 0.13 Âľm while it is clear that KrF lithography will remain dominant.

Challenges of the photomask

Photomask technology is currently facing a number of challenges in various fields. The major challenges are listed below: 1) material 2) volume of mask-pattern data 3) mask exposure and mask-fabrication process 4) inspection and measurement (quality assurance) 5) cost and delivery

Cost will be particularly important in the future of mask production. The drop in mask throughput mentioned above is a primary factor affecting cost. Improvement of accuracy is another challenge along with mask pattern miniaturization. For accuracy, it is critical to come up with a solution to the fluctuation of line width, which constitutes a more serious problem as mask patterns get finer. Fluctuations of mask-pattern dimensions have a multiplied pattern profile impact on the wafer surface, which is called MEEF (Mask Error Enhancement Factor). To be more specific, a change of pattern dimensions on the photomask is multiplied by a factor of two to three times when the pattern is transferred to the wafer surface in the exposure process. The PSM (phase-shift mask) is capable of considerably reducing the MEEF effect, tolerating fluctuation of mask pattern dimensions to some extent. In this sense, the PSM is effective in suppressing mask costs. In general, accuracy of mask fabrication is primarily determined by mask writer and manufacturing process procedure. As for the PSM, however, material selection is a dominant factor for accuracy. For inspection and measurement of the photomask, the major challenges are improvement of detection sensitivity in defect inspection and the establishment of PSM inspection Autumn 2000

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performance of att-PSM to the level of alt-PSM, the transmissivity of the shifter material needs to be increased.

With the conventional att-PSM, however, transmissivity of an excimer laser source cannot be set at a high level because such a choice raises the transmissivity of inspection wavelength too high to conduct inspection.

technology. Along with further device miniaturization, it also is necessary to improve the performance of the CD (critical dimension) measurement tools.

Needs for resolution enhancement technology (RET)

If KrF lithography is employed for 0.13 µm device production, the ratio of exposure wavelength to dimension of resist pattern on wafer surface will be almost 2:1; and, binary masks with OPC will be unable to achieve the required level of resolution or depth of focus. It will be necessary, therefore, to introduce the PSM.

In an attempt to overcome this difficulty, a new shifter material has been developed: zirconium silicon oxide (ZrSiO). Using ZrSiO shifter film, att-PSM is able to suppress the transmissivity of light from the defect inspection tool below an upper limit enabling inspection for quality assurance.

The alternating PSM (alt-PSM) is capable of achieving high resolution of one-half of exposure wavelength, but it has not yet been actively adopted because technologies for defect inspection and mask repair need to be improved prior to its introduction. On the other hand, the attenuated PSM (att-PSM) has already been adopted in commercial production because the conventional mask inspection and repair technologies used for the binary mask process can be applied as they are. The attenuated PSM, which generally uses shifter film that transmits three to eight percent of excimer laser source, has mainly been applied to the to fabrication of contact holes. This technology is significantly superior to the conventional binary mask technology in terms of depth of focus, but it is not as effective in improving resolution.

Figure 1 shows RET (resolution enhancement technology) applicable to each lithography technology.

It is possible to roughly estimate which RET is applicable by referring to the ratio of exposure wavelength to the dimension of resist pattern on wafer surface. For the 0.13 µm device to be developed in the near future, it is highly likely att-PSM with high transmissivity will be adopted. Att-PSM should also be an effective technique for ArF lithography, when pattern dimensions are reduced to about two-thirds of wavelength. For ULSI requiring much higher resolution, alt-PSM will be absolutely necessary. If resolution cannot be raised high enough, an alternative excimer laser source with shorter wavelength must be adopted. F2 laser lithography featuring wavelength of 157 nm, combined with ultrahigh resolution technology such as PSM, is expected to achieve as high a resolution as 70 nm.

Alt-PSM, on the other hand, is effective in improving depth of focus and resolution. In order to improve the Node KrF Lithography

ArF Lithography

F2 Lithography

180nm

130nm

100nm

70nm

Feature size / Wavelength Ratio

73%

53%

40%

28%

Binary

OPC / Serif

OPC / Assist Bar

—

—

Att-PSM*

3–8%

15–25%

—

—

Alt-PSM**

— —

Shifter Edge Type (Logic Gate) Hidden Shifter Type (Memory)

Shifter Edge Type (Logic Gate) —

— —

Feature size / Wavelength Ratio

93%

67%

52%

36%

Binary

—

OPC Serif

OPC / Assist Bar

—

Att-PSM

—

3–8%

15–25%

—

Alt-PSM

— —

— —

Shifter Edge Type (Logic Gate) Hidden Shifter Type (Memory)

Shifter Edge Type (Logic Gate) —

Feature size / Wavelength Ratio

115%

83%

64%

45%

Binary

—

—

OPC / Assist Bar

—

Att-PSM

—

3–8%

3–8%

15–25%

Alt-PSM

— —

— —

— —

Shifter Edge Type (Logic Gate) Hidden Shifter Type (Memory)

High-transmission and Tri-tone type Att-PSM

*Att-PSM = Attenuated Phase Shifting Mask

Figure 1. RET reticles by wavelength and by technology node.

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**Alt-PSM = Alternating Phase Shifting Mask

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TF.AF

Transmittance Change (%)

Target

2.0

Phase Change (deg.)

E

1.0 0 -1.0

0.5

Target 0

-0.5

-2.0 -3.0

-1.0 0

5

10

15

20

25

30

35

0

5

10

Total Energy (kJ/cm2)

15

20

25

30

35

Total Energy (kJ/cm2)

Figure 2. Phase shift change (a) and transmissivity change (b) of ZrSiO-based att-PSM as a function of ArF excimer laser irradiation.

We report performance of att-PSM using ZrSiO shifter film that is capable of suppressing transmissivity of inspection wavelength.

Development of ZrSiO-based attenuated PSM

In the photomask field, the conventional chromium binary mask is increasingly replaced by the OPC mask, alt-PSM and attPSM. In particular att-PSM attracts attention as it is more suitable than others for volume production. For att-PSM, it is necessary to expand the range of transmissivity from 8 to 20 percent. Conventional materials such as MoSi and CrF, however, cannot secure adequate transmissivity for inspection wavelength due to their physical properties.

Moreover, these materials cannot be applied to the photomask for ArF lithography due to their excimer laser resistance and spectral characteristics. Various materials and structures of photomask have been investigated to develop a photo-mask featuring high transmissivity that can be applied to three generations of lithography: KrF, ArF and F2.

Results

Zirconium was first selected as a next-generation PSM material because it features strong ArF laser resistance.

Zirconium-type materials were found far more resistant The Structure of ZrSiO Att-PSM

Bi-Layer ZrSiO with Cr and resist

Resist coating EB resist Cr ]Bi-Layer ZrSiO

Qz

EB exposure and development

EB exposure and development

Cr etching

Cr etching

Bi-Layer ZrSiO dry etching

Resist remove Cr Transparent Film Attenuated Film

Tri-Tone Type Resist remove

Figure 3: Structure and fabrication process of ZrSiO-based att-PSM.

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to ArF laser than materials used for the conventional att-PSM materials. Figure 2 shows phase shift and transmissivity change as a function of ArF excimer laser irradiation. Laser irradiation conditions were set based on the assumption that mask lifetime was three years.

Specifically, total irradiation was set at 30 kJ/cm2 (or 0.2mJ/cm2/pulse). Under these conditions, ZrSiO-based att-PSM was found effective in suppressing the change of phase shift below 0.5° and transmissivity below 0.2 percent.

12 Transmissive ^, p, y Absorptive ^, p, y

10

Transmissive ^Resist Absorptive ^Resist

Selectivity

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10

12

14 Pressure (Pa)

16

18

Figure 5. Etching selectivity among films of ZrSiO-based att-PSM in dr y etching.

the ZrSiO-based att-PSM makes it possible to conduct inspection without employing any special algorithms.

Chromium (Cr) opaque film is stacked on top of the shifter film. The shifter film is composed of two layers in order to lower transmissivity not only of excimer laser from the exposure tool with wavelength of 193 nm, but also of light from measurement and inspection tools featuring wavelengths of 365 nm, 488 nm, and 550 nm. For tri-tone-type att-PSM in which Cr patterns are used to shield light for part of half-tone patterns, an overlay process is conducted to fabricate patterns on the Cr opaque film. This process, however, is the same as the conventional MoSi-based att-PSM manufacturing process.

Figure 4 shows spectral characteristics of ZrSiO-based att-PSM blank which features ArF transmissivity of six percent. Transmissivity of light with wavelength of 365 nm is suppressed below 13 percent, which means

Detection sensitivity is currently being investigated by using test masks with programmed multiphase defects.

The ZrSiO-based att-PSM, which has been tested with a position-accuracy measurement tool and the CD SEM, has proved to be the preferred measurement technique.

Conditions for the mask-making process, such as those for dry etching, have been established.

Figure 5 shows etching selectivity as a function of working pressure in dry etching using BCl3 gas. Selectivity between the anti-transmission film (AF) and the underlying quartz substrate can be increased to more than ten by increasing the reaction pressure. It is possible, therefore, to improve the uniformity of phase shift and of transmissivity within the six-inch mask to the level of the mask blank.

50

Transmittance (%)

40

ZrSiO 30

20

10

0 200

Quartz 300

400

500

600

Wavelength (nm) Figure 4. Spectral characteristics of ZrSiO-based att-PSM blank featuring Figure 6. Pattern profile of ZrSiO-based att-PSM.

ArF transmissivity of six percent.

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Spec. of Blank

Spec. of Process

Spec. of Mask

Spec. of Litho

Item Transmittance @ 193nm Reflectance @ 193nm Phase shift accuracy Phase shift within a mask Transmittance accuracy Transmittance within a mask Durability for chemicals [phase shift change] [transmittance change] Dry etching selectivity to resist to substrate Pattern profile Minimum feature size CD uniformity CD mean to target Image placement error Phase shift accuracy Phase shift within a mask Transmittance accuracy Transmittance within a mask Irradiation durability

2â&#x20AC;&#x201C;20% < 25% 180 +/- 2 deg.

2 degrees Target +/- 0.3% 0.3 +/- 1 deg. +/- 0.1 deg. >1 > 10 80 degrees 400nm +/- 12nm +/- 12nm 30nm 180 +/- 3 deg.

3 deg.

Target +/- 0.3% 0.3 > 3 years

Figure 7. ArF lithography photomask targets in 2001.

As shown in the SEM image(s) (Figure 6), the pattern profile is extremely good; it does not have any boundary layers formed due to gap of oxygen concentration in half-tone film. This leads to considerable improvement in lithography performance.

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Target for 2001

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Transmittance (%)

80

Transmittance (%)

Category

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Îť (nm)

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248

257

365

248

30.79 20.54 9.06

27.19 17.69 8.33

39.15 28.89 18.40

179.73 179.79 178.46

40

20

0 200

300

400 500 Wavelength (nm)

600

700

Figure 8. Spectral characteristics of ZrSiO-based att-PSM featuring high transmissivity to be applied to KrF lithography.

deposition. One of the advantages of the ZrSiO-based att-PSM is that a high degree of freedom is obtained in optical design when film composition and the combination of two films are carefully studied. Current research also indicates the potential of applying ZrSiO technology to masks for F2 lithography (157 nm). Data is being collected relating to film composition in a bid to develop ZrSiO-based att-PSM for F2 lithography.

Summary

Future work

Figure 7 shows ArF lithography mask targets in 2001 by category. Other targets are also being developed relating to technologies required for volume production such as film defect, inspection and repair.

Figure 8 shows spectral characteristics of ZrSiO-based att-PSM blank whose transmissivity of KrF (248 nm) is as high as 30 percent. Based on the spectral characteristics, we speculate that ZrSiO-based att-PSM featuring transmissivity of about 20 percent can be used for commercial applications.

For ZrSiO-based att-PSM for ArF lithography, the authors have succeeded in achieving transmissivity of 15 percent by carefully selecting conditions for film

A new photomask material technology has been established to be applied to three excimer laser sources: KrF, ArF and F2. For photomask of ArF lithography, sample evaluations of several dozen photomasks have been conducted since 1999. Efforts are currently being made to further improve quality and prepare for the start of volume production in 2001.

Acknowledgment

We would like to extend heartfelt gratitude to Selete (Semiconductor Leading Edge Technologies) for its support of our study. We also thank Mr. Matsuo and his staff in Electronics Research Laboratory, Toppan Printing Co., Ltd., for their help and useful discussion.

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Klarity ProDATA's robust curve fitting algorithms utilize embedded lithography knowledge for extremely accurate analysis.

Analog The human eye

Digital Klarity ProDATA™

Now there are two ways to analyze experimental lithography data.

Klarity ProDATA can analyze any number of overlapping process windows to determine best focus, best exposure and depth of focus using either the rectangle or ellipse method.

Klarity ProDATA The user friendly interface includes real-time display and drag and drop into other Windows ® programs.

In addition to focus exposure data, Klarity ProDATA also analyzes experimental swing curve and contrast curve data.

Imagine being able to generate accurate optimized process information with a few clicks of the mouse. Never again will you be forced to "eyeball" the answers with a spreadsheet program. Klarity ProDATA utilizes the most advanced, yet proven, analysis algorithms to: ■ Calculate the process window ■ Analyze CD, Eo or reflectivity of experimental focus-exposure swing curve data to determine data and determine the the minima, maxima, swing resulting depth-of-focus ratio and period ■ Determine the overlap of any ■ Analyze H-D contrast curve number of process windows data to determine dose to clear and the resulting depth-ofand photoresist contrast focus curves ■ Imports and analyzes pQC ■ SEM Image Analysis Module (Pattern Quality Confirmation) (SIAM™) enables quicker data from the KLA-Tencor recognition of two-dimenCD SEM for improved pattern sional shape effects integrity verification Klarity ProDATA is very easy to use and includes advanced functions like drag and drop of analysis results to other Windows® programs and fully searchable online help. See for yourself what a difference Klarity ProDATA can make.

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Photomask Blanks Quality and Functionality Improvement Challenges for the 130 nm Node and Below

by Masao Ushida, Hideo Kobayashi, Kunihiko Ueno, HOYA Corporation

Sub-wavelength lithography will use various types of resolution enhancement techniques (RET) on reticles, such as embedded attenuated phase-shift mask (EAPSM) and OPC to extend refractive reduction optics to the 130 nm node and below. There are significant difficulties that confront mask makers as well as photomask blanks manufacturers. This article explores the development status of photomask blanks and reviews issues to be solved.

Quartz substrate

It is required that the photomask substrate should have a suitable transmittance at each exposure wavelength used. For the 157 nm, as is generally known, new synthetic quartz seems to be the best candidate and must be used for a suitable transmittance and sufficient exposure durability. In addition, it has been suggested another new synthetic quartz might be necessary, even at 193 nm.

The blanks suppliers’ mission is to prepare superior quality substrate for film deposition and resist coating and eventually for reticle manufacturing, although characteristics of the substrate, with the exception of flatness, are dependent on quartz manufacturers.

Several types of glass defects on substrate, such as scratches, pits, sleeks and micro-cracks, are typically residue not removed completely by polishing, damages by particle contamination during polishing process or damages during cleaning, particularly ultrasonic.

Figure 1 shows a typical glass defect, a socalled “micro-crack,” that is 0.4 µm long, 0.06 µm wide and 0.01 µm deep. The micro-crack also can be caused by mega-sonic cleaning that is now almost standard in the mask-cleaning process. In some cases, such a small and shallow defect cannot be found even by a reticle inspection system because of poor contrast, especially due to its depth.

Careful visual inspection is still used to inspect blanks substrate for glass defects, because there is no automated scanning inspection system with a suitable sensitive inspection “speed” for blanks manufacturing. There is a giant gap in inspection speed permitted between reticle and blanks manufacturing: a couple of “hours” for reticle versus a couple of “minutes” for blanks. With respect to flatness, 0.5 µm flat material with a 0.25 µm flat requirement might be available in the near future.

Figure 2 shows a 6025 substrate with a 0.18 µm contour map in a 146 mm square area.

Figure 1. A typical glass defect.

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Figure 2. A 6025 substrate showing a 0.18 µm contour map in a 146 nm square area.

EAPSM film

EAPSM is one of the RETs used as optical lithography pushes smaller dimensions and shorter wavelengths.

Figure 3 shows typical spectral transmittance and reflectivity of “six percent trans” of a new MoSi-based EAPSM film for the 193 nm. Engineering sample supply for preliminary evaluation was started late in 1999; and the film was qualified by several users for optical characteristics, uniformity and durability.

A feature of the HOYA 193 nm EASPM film is that percentage trans becomes very high at longer waveOptical Properties

lengths, which possibly induces sensitivity degradation for reticle inspection. Figure 4 shows the sensitivity achieved by KLA-Tencor 365UV with ESP for each defect type. Reticle defect inspection in this instance was done on the film at the same sensitivity or detectability level as the binary film by modifying the algorithm.

Inspection algorithms and light optics will improve, along with EAPSM defect inspection capability. In addition, repair results on the EASPM film are shown in Figure 5. Since the film is MoSi-based, existing repair techniques for deep UV EAPSM film are also available. HOYA MoSi-based 193 nm EAPSM film can provide required optical characteristics and process compatibility for etching, defect inspection and repair to the users of HOYA deep UV EAPSM film.

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system with high sensitivity, high contrast, superior resolution, superior post-coating delay (PCD) and post-exposure delay (PED) stability. It still is generally thought that CARs must be spun on just prior to exposure due to their very short life after coating, while mask makers have been procuring resist-coated blanks.

The industry plans to stay the course, even with CARs, for the next generation; thus is also the mission of blanks suppliers.

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For precise PCD stability (CAR blanks life), it is important to understand the main CD drivers in all mask-making processes. There are three major intervals (delays) in the mask-making process; i.e., PCD, PED, and post-PEB (post-exposure baking). Figure 7 shows CD movement on Hitachi Chemical RE-5153P in PCD, PED and post-PEB delay. PED for only a couple of hours induced a significant CD movement of over 100 nm, while two weeks’ storage (PCD) induced very small CD movements (less than 5 nm). Post-PEB delay had almost no impact on CD stability. The impacts of these intervals (delays) upon CD movements were similar on all positive-tone CARs examined. Storage in a dry-N2 purged box, on the other hand, improved CD stability in all process Develop. delays, as shown in the figure. In PCD, the CD movement was Delay time (days) significantly reduced to less than 10 nm, even for four weeks’ storage, by utilizing the controlled environment. In PED, the CD movement was also reduced but, unfortunately, not as significantly.

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In order to study the feasibility for CARs-coated blanks supply, storage tests were done in a common storage condition to determine CARs film life after coating.

Figure 6 shows CD movement of five CARs selected for four weeks’ storage. Sample blanks were put into HOYA regular shipping boxes (acrylic resin base). The boxes had been sitting in a clean room without seals for two to four weeks where NH3 concentration was 0.33 µg/m3 (at 40 percent RH, 22. RT). CD movement observed after two weeks’ storage was less than 5 nm on all CARs. However, four weeks’ storage induced a significant CD movement of roughly 50 to 75 nm.

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To find the main CD driver in the CARs mask making process, the dependence on each interval in process (PCD, PED and Delay after PEB) has been described by CD shift from the 1.0 µm target CD. Regular and dry-N2 purged box conditions where NH3 ~ 0.33 µg/m3 in 40 ~ 45RH percent and NH3<0.001 µg/m3 in less 10RH percent, respectively.

Figure 7. CD movement due to inter val in process.

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The following are findings in the CAR blanks feasibility study: CARs possess sufficient PCD stability for advanced reticle fabrication if they are kept in a dry-N2 purged environment. Dry-N2 purged environment or equivalent (chemically clean environment) is necessary for blanks storage. On the other hand, CD movement due to PED can’t be neglected on CARs practical use. Especially for mean-to-target yield improvement, it is recommended PEB be done immediately after exposure, as it is a chemically

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clean environment for plate handling, storage or between exposure and PEB. A solution was discovered for CARs coated blanks life and supply as mentioned above, which had been considered the most serious issue for CAR blanks practical use.

Summary

The defect guarantee level of blanks, especially for hard defects such as glass and chrome pinholes, has been behind the requirement until now. This is due to a giant gap in Permitted inspection â&#x20AC;&#x153;speedâ&#x20AC;?; i.e., inspection cost

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for blanks, as mentioned above. However, the advent of new inspection techniques other than the ordinary scattering, transmitting or reflecting light detection, look very promising for blanks manufacturers trying to catch up with requirements for the next few years. There is a movement for the mask manufacturers to furnish inspection tools for sorting blanks to improve reticlemanufacturing yield for defects. The ultimate goal is to supply blanks defect data on each single plate for highend reticle manufacturing with a high yield. By improving quality and functionality, photomask blanks for each lithography and mask-making generation can be supplied to the industry.

KLA-Tencor Trade Show Calendar September 19-21

Diskcon, San Jose, California

September 25-27

AEC/APC, Lake Tahoe, California

October 3-5

ITC, Atlantic City, New Jersey

November 28-30

Fall MRS, Boston, Massachusetts

December 6-8

SEMICON/Japan, Makuhari, Japan

February 27-28, 2001

SPIE-Microlithography, Santa Clara, California

WELCOME TO THE WORLD OF DEEP SUB-WAVELENGTH LITHOGRAPHY. At 0.13µm, the litho process window closes in from all directions.

Increasing reticle complexity creates new sources of defectivity and CD variation. High numerical apertures result in more frequent focus errors. And mix-and-match strategies threaten to devour an already diminishing overlay budget.

All of which creates an even greater need for controlling your lithography module. That’s why we provide the industry’s most complete sub-wavelength litho process module control solutions – encompassing CD control, overlay control, defect control and simulation. On everything from the reticle and design through the stepper and the process. Helping you to avoid costly excursions and dead ends. And giving you a little extra maneuvering room that could make a sizeable difference to your bottom line. For more information, please call 1-800-450-5308, or visit us at www.kla-tencor.com/lithoPMC.

ALREADY THERE. ©2000 KLA-Tencor Corporation

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“The MEEF Meter”: a Realistic Approach for Lithography Process Monitoring

by Frank Schellenberg, Pat LeCour and Olivier Toublan, Mentor Graphics Geoffrey Anderson and Raymond Yip, KLA-Tencor Corporation

With the advent of sub-wavelength lithography, process control has taken on a whole new meaning. This article discusses a practical process monitor target for the low k1 lithography regime, labeled the MEEF meter. Its purpose is to allow accurate determination of the MEEF effect and a consistent monitor for any changes in the lithography process that can impact this effect. The investigation and characterization were followed from the design phase, through reticle fabrication and finally onto the wafer.

Introduction

CD metrology using top-down scanning electron microscopes (SEM) is a routine technique for monitoring IC wafer processes.1 When process CDs vary beyond established control limits, corrective action can be taken. Test structures which fit in the scribe lines between chips are routinely introduced to allow the metrology on periodic samples of production wafers or on all production wafers if so desired.

However, with most contemporary processes (i.e., those targeted with minimum features at 180 nm or smaller) the combination of process factors is typically tuned to reduce any variation in CD, at least until the process fails catastrophically. Illumination conditions, reticle techniques, resist technologies, post-exposure baking processes, etch recipes, etc., are all chosen to work in tandem to reduce the variation of target CDs as much as possible.2 Many recent papers have discussed the mask error enhancement factor, or MEEF.3, 4, 5, 6, 7, 8, 9, 10, 11, 12 This represents an

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“amplification” of reticle errors by wafer process phenomena, producing changes larger than expected on the wafer. Perfect linearity in a process would give a MEEF of 1; but when process conditions significantly deviate from linearity (usually when attempts are made to create sub-wavelength lithography features), larger values are observed. In highly nonlinear conditions, MEEF values as large as 8 have been reported.8 Typical sub-wavelength MEEF values for binary lithography are in the range of 1.5-2.5.8, 11 On the other hand, MEEF values for special phase-shifting cases, or for certain dimensions of dense lines or with assist bars, have been predicted to be significantly less than 1.7, 12 Understanding MEEF for a process is, therefore, very important to any resolution enhancement technologies, such as OPC and PSM, that compensate for predicted wafer effects.

What we propose here is that the MEEF, being essentially a derivative measurement of linearity conditions, may actually serve as a sensitive monitor for process variations. MEEF has been predicted to be a strong function of defocus,7 so this is something to examine under experimental conditions. To this end, we have created a MEEF meter and observed its performance under conditions of focus and exposure.

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MEEF and lithography

Experimental technique

MEEF is defined as the ratio of the CD measured on the wafer to the (adjusted) CD measured on the mask.

In a perfect world, the CD on the wafer directly maps to the CD reticle, and the MEEF is unity.

To measure the CDs and MEEF, a tool such as KLATencor’s reticle CD SEM, the 8100 XP-R, is ideal. This tool allows initial measurement of the reticle CDs in the MEEF meter; it can then be immediately switched to wafer mode to allow measurement of the exact wafer sites corresponding to the wafer measurement sites under the same conditions and calibrations.13

Mathematically, MEEF can be expressed: MEEF =

∂CDwafer ∂(CDreticle/M)

where M is the stepper reduction ratio (typically M=4 in DUV steppers.) To adequately measure the MEEF, a change in the CD on a reticle must be programmed in order to observe its effect on the printed wafer. Since prior research has shown the MEEF values for isolated and dense lines (with their difference called the “MEEF Gap”), any test needs to take this effect into account.

Enter the MEEF meter

The test pattern scheme is illustrated in Figure 1. On the left, a programmed change in isolated CD around a target dimension is shown. On the right, the same programmed change in CD is reproduced, but now in the context of dense lines with a 1:1 duty cycle centered around the target dimension. The change in CD is approximately 20 nm (wafer dimensions). By measuring each of these six CD features on the reticle and then measuring the corresponding features on the wafer, both isolated and dense MEEF can be calculated.

First, a GDSII layout of the MEEF meter was prepared.

A jobdeck for a reticle was created placing the MEEF meter throughout the field. A reticle was then fabricated on an ALTA 3500 mask writer using a wet-etch fabrication process at the Reticle Technology Center (RTC).

Several MEEF meters were included on the reticle layout, including designs for 250 nm, 180 nm, 150 nm, 130 nm and 100 nm. Only the 180 nm results at center of field are reported here.

Wafers were then exposed on an ASML PAS 5500/300 DUV 4x reduction stepper using this reticle. Focus/ exposure matrices were produced using NA=0.63 and conventional illumination with σ= 0.5. Ultraflat silicon wafers were used to minimize focus distortion effects.

The resist process used was a Shipley UV110 resist with thickness 450 nm and a Shipley ARII anti-reflective coating of thickness 66 nm. All exposures were carried out at ASM Lithography’s Tempe lab facility.

SEM measurements using the KLA-Tencor 8100 XP-R were made on the wafer resist structures after development.

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Figure 1: Schematic of the layout for the MEEF meter. A line with the nominal target CD (in this case, 180 nm) is made larger and smaller in an isolated context (left) and a dense context (right). All other features in the dense context are at the target CD. The CD that varies is shaded for ease of visibility in the figure; the features are all conven-

Figure 2: MEEF meter features as fabricated on the reticle and the

tional chrome lines on the reticle.

resulting image in resist on the wafer. MEEF structures are shown for both isolated lines (left) and dense lines (right).

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The “target CD” is the measured reticle CD/4. The process is clearly tuned to produce minimal variation with focus, but CD does var y with exposure, especially for isolated lines.

After initial measurement of the reticle CDs for a particular test site, an automated metrology job was set up and run to gather data across the focus/exposure matrix for those identical sites. Final data analysis was carried out using a combination of Klarity ProDATA from KLA-Tencor and Microsoft Excel for final calculation of MEEF values.

curve near 180 nm provides the local MEEF value.

This is plotted in Figure 4.

As the varying line of the MEEF meter approaches a target CD of 100 nm, it vanishes on the wafer for both the dense and isolated cases. Features that are this small simply cannot be reliably produced without the aid of phase-shifting or another resolution enhancement

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This indicates that direct CD measurements can, therefore, be a good indicator of exposure drift; however, CDs are a poor indicator of process drift for defocus variation (see Figure 3).

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First, the behavior of the target CD with focus and exposure was investigated. This represents how process monitoring may typically be measured today. The results for this process, fairly typical of a well-controlled process, are shown in Figure 3. Variation of exposure dose causes the final resist line to grow thicker or thinner in dense and isolated cases, while the process has been tuned to be fairly insensitive to defocus—until the imaging fails entirely.

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Figure 4: Linearity plot for the var ying features of the MEEF meter plot-

Very different results were found with examination of the MEEF. To calculate the MEEF, we must first measure the CD linearity from the MEEF meter. The wafer CDs are plotted against the reticle CDs, and the slope of the

ted against the measured reticle CD/4. The isolated line presents a

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classic linearity cur ve, while the var ying center line in a dense context has a higher slope and is susceptible to scumming and bridging as it grows.

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Once the MEEF values are calculated, we can plot them as a function of focus and exposure. These are shown in Figure 5. Although the MEEF for the isolated feature does not vary much with defocus, the MEEF for dense lines appears to vary parabolically with defocus. The increasing and decreasing MEEF values also follow the trend, with increasing MEEF always slightly larger and decreasing MEEF always slightly smaller than the total MEEF. These MEEF values represent concave curvature of the linearity plot around 180 nm.

This defocus dependence, especially for the dense MEEF, provides a strong indication of a focus drift even though the target CD itself (see Figure 3) is nearly constant.

By comparison, however, the exposure dependence of the MEEF, also shown in Figure 5, appears essentially constant with exposure and is also fairly noisy. This actually reflects the linear dependence of the exposure data in Figure 3. All lines in the MEEF meter grow and shrink together as the exposure changes; so the MEEF, representing their relative changes, remains roughly constant. Given that the exposure changes can induce scumming and bridging at extreme values, the additional noise at the exposure extremes is also expected.

In summary, the MEEF seems to be a good indicator of focus changes, while it is fairly insensitive to exposure changes, indicating that all the lines are growing and shrinking together. For defocus variations, MEEF is a good indicator of process drift, while for exposure variations, MEEF is a poor indicator of process drift.

A numerical comparison between the two monitor techniques for exposure and defocus is presented in Tables I and II. Clearly, the magnitude of the change,

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technology. As the varying feature becomes larger, however, the isolated line simply grows in proportion, while scumming and then bridging begin to occur on the wafer for the dense case.

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As can be seen in this figure, there is clearly a difference in slope for the dense and isolated MEEF meter features near the target value of 180 nm, indicating a “MEEF Gap.” It should also be noted that, due to curvature in the linearity plot, the “decreasing” MEEF (i.e., slope when the reticle CD is getting smaller) and the “increasing” MEEF (i.e., slope when the reticle CD is getting larger) do not always match. Typically, we actually observe that the increasing MEEF is slightly larger than the decreasing MEEF, and the “total” MEEF around 180 nm is an average of the two values.

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visible by comparing Figures 3 and 5, is confirmed by the numerical comparisons. For exposure changes, CD variations are three to ten times larger than the corresponding MEEF changes. For defocus changes, on the other hand, MEEF variations are three to ten times larger than the corresponding CD changes.

The two metrics, therefore, appear to present an independent technique to monitor defocus and exposure changes, as processes drift. A suitable system incorporating these metrics would then be able to dictate corrective action before the process failed.

A “Process MEEF” variation

These results offer an interesting methodology for use as a process monitor. However, a variation on the MEEF meter that is easier to simulate using commercial simulators has been the structure more typically examined when MEEF for dense lines is discussed.9, 10 This is the case where it is not just a single line changing, such as would be found in a mask-writing error, but when all the lines change together, as might be found in a mask-processing error. We have called this the “Process MEEF” Meter, to distinguish it from the single feature MEEF Meter above. “Process” MEEF meters were also included in the test patterns used in these experiments.

The schematic for the layout, as well as SEM images of the reticle and wafer, are shown in Figure 6.

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Conclusions

This article has shown the potential use of direct CD measurements in combination with calculations of MEEF as a potential process monitor. Results suggest the use of direct CD measurement can be a sensitive indicator of exposure changes, while the MEEF measurement can detect defocus changes and the two measurement techniques appear to be independent.

Figure 6: “Process” MEEF meter features in schematic (left, not to scale), as formed on the reticle (center) and as they print on the wafer (right). The target dimension on this case was 180 nm. Although MEEF can still be calculated in some cases, increasing the mask feature sizes here tends to cause scumming or bridging on the wafer, especially at lower exposure doses.

A linearity plot for both dense and “process” MEEF features targeted around 180 nm is shown in Figure 7.

Fundamentally, the “process” MEEF meter data overlays the dense MEEF meter data, so the MEEF values in general will be very close to those generated for the dense MEEF values presented above. However, for increasing MEEF, an increased tendency toward scumming and bridging causes far more noise in the measurements.

This then becomes a less reliable measure of MEEF and, therefore, process changes, than the dense MEEF meter.

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Although these are believed to be representative data sets, further measurement of a process systematically over time using the MEEF meter is the only way to determine whether the MEEF meter performs reliably over time as a process monitor. Additional variants on the MEEF meter using assist bars or phase-shifting designs would also be useful to confirm their predicted mitigating effects.7, 12 Future studies would require a more detailed examination of potential variations and noise sensitivity. Other possible sensitivities to be investigated would be the sensitivity to NA and coherence variations, as well as possible sensitivity to aberrations (although this may be best aided by a phase-shifted MEEF meter).

Acknowledgements

This work could not have been completed without the help of many friends and colleagues. We are especially grateful to Susan MacDonald and Craig West of DuPont Photomask for their help in creating the reticle layout, Greg Hughes of the RTC for fabricating the reticle, Luigi Capodieci and Bob Socha of ASML Masktools for coordinating the wafer exposures, Mohan Ananth and Waiman Ng of KLA Tencor’s metrology division for their help in making the reticle and wafer CD measurements, and Moshe Preil of KLA Tencor for helpful discussions.

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4.

“Handbook of critical dimension metrology and process control,” K. M. Monahan, ed. Proc SPIE CR52, SPIE Press, Bellingham, WA, 1994.

M. D. Levenson, “Wavefront engineering for photolithography,” Physics Today, (July, 1993), p. 28 ff.

W. Maurer and D. Samuels, “Masks for 0.25-micron lithography,” Photomask and X-Ray Mask Technology, HideoYoshihara; Ed. Proc. SPIE vol. 2254, (1994), pp. 26-35.

W. Maurer, “Mask specifications for 193 nm lithography,” 16th Annual BACUS Symposium on Photomask Technology and Management, G. V. Shelden and J. A. Reynolds, Eds. Proc SPIE vol. 2884, (1996), pp. 562-571.

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7.

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A. Wong, R. Ferguson, L. Liebman, S. Mansfield, A. Molless, and M. Neisser, “Lithographic effects of mask critical dimension error,” in Optical Microlithography XI, Luc Van den Hove; Ed, Proc. SPIE vol. 3334, (1998), pp.

106-116.

J. Randall, A. Tritchkov, R. Jonckheere, P. Jaenen, and K. Ronse, “Reduction of mask induced CD errors by optical proximity correction,” in Optical Microlithography XI, Luc Van den hove, ed. Proc. SPIE vol. 3334, (1998), pp.

124-130.

J. Randall and A. Tritchkov, “Optically induced mask critical dimension error magnification in 248 nm lithography,” J. Vac. Sci. Technol. B16 , (1998) pp. 36063611.

F.M. Schellenberg, V. Boksha, N. Cobb, J. C. Lai, C. H. Chen, and C. A. Mack, “Impact of mask errors on full chip error budgets,” Optical Microlithography XII, Luc Van den Hove; Ed, Proc. SPIE vol. 3679, (1999) pp. 261275.

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F. M. Schellenberg and C. Mack, “MEEF in theory and practice”, 19th Annual BACUS Symposium on Photomask Technology, F. Abboud and B. Grenon, ed. Proc SPIE vol. 3873, (1999) pp 189-202.

C. Mack, “Mask linearity and the mask error enhancement factor,” Microlithography World, Winter 1999 p.

11-12.

A. Vacca, B. Eynon, and S. Yeomans, “Killer defects caused by localized sub-100-nm critical dimension reticle errors,” in Optical Microlithography XI, Luc Van den hove, ed. Proc SPIE vol. 3334, (1998), p. 642-648.

M. D. Levenson “Can phase shift save the semiconductor industry?,” Proceedings of the 1998 Interface Conference, (Olin Chemical, 1998), pp 165-177.

W. Ng, G. Anderson, H. Villa, and F. Kalk, “A study of CD SEM suitability for CD metrology of modern photomasks,” Photomask and X-Ray Mask Technology VI, Hiroaki Morimoto; Ed. Proc SPIE vol. 3748, (1999) pp 585-591. circle RS#050

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Defect at 45º Tilt and 30º Rotate

H O W Y O U L O O K AT T H I N G S I S V E R Y I M P O R TA N T It can cost you time and money—or it can save you time and money.

There’s a very important new challenge in the semiconductor industry today.

challenge. The eV300 is the only in-line ADC SEM

How to achieve superior defect imaging and the highest

capabilities. And with image acquisition of less than one

accuracy in classifications. Advanced geometries, copper

second—it’s also the fastest.

interconnects and dual-damascene processes all demand it.

And now the eV300 defect review tool meets this

S

available that provides both 0- 45º tilt and 360º rotation

For more information, please call us at (781) 280-1874, or visit our website at www.kla-tencor.com.

Product News KLA-Tencor’s Tera™ family of reticle inspection tools delivers the speed and sensitivity required to address yield-limiting defect challenges associated with sub-wavelength lithography. Incorporating new advanced imageprocessing algorithms, the TeraStar™ and TeraScan™ 570 can inspect advanced reticles incorporating phase shift mask and optical proximity correction technologies for 0.13-micron device manufacturing, and 0.10micron device research and development.

TeraScan 570

The TeraScan 570 uses an argon-ion laser technology that delivers DUV wavelength inspection for die-to-database applications and provides a fourfold improvement in inspection speed over KLA-Tencor’s previous generation 3XX tool. It is used to inspect reticles for 100 nm defects caused by pattern generation and mask processing at the mask shop.

TeraStar

Used for final outgoing inspection at the mask shop and incoming qualification at the fab, TeraStar provides multi-beam UV reticle inspection to enable detection of all defect types on all reticle surfaces in a single pass. It also can conduct simultaneously transmitted and reflected light inspection for contamination with a concurrent die-to-die inspection for detection of pattern defects. This improves the throughput of the tool six-fold compared to inspections performed on previous KLA-Tencor STARlight 300Series tools.

X-LINK

An innovative software option provides a critical link in defect analysis by projecting reticle defect coordinates to their corresponding location on the wafer. It allows data captured by the KLA-Tencor 9X Reticle Inspection Tool to be translated and analyzed in two different ways via connectivity with the 8250-R (reticle CD SEM) for reticle defect analysis (the R2R option) and the 8250 (CD SEM), eV300 (SEM defect review), CRS (optical review) and 2350 (brightfield wafer inspection) for wafer defect analysis (the R2W option). Defect coordinates and images stored by the KLA-Tencor 9X also can be translated and analyzed by third party reticle and wafer review and metrology tools.

8250-R CD SEM

This latest CD SEM tool from KLA-Tencor fills one of the biggest gaps in CD SEM usage—engineering setup and burden—with advanced automation and recipe setup capabilities, thus providing an advanced CD metrology solution available for the entire reticle manufacturing industry. With the new cRAG (Cats Recipe Auto-Generation), automation recipes can be generated prior to the generation of a reticle, thus minimizing engineer time in front of the tool. By providing superb metrology and analysis at all points in the lithography process, KLA-Tencor offers real solutions for the lithography market.

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Autumn 2000

Yield Management Solutions

Impact SEM XP

IMPACT SEM XP is KLA-Tencor’s latest addition to its suite of automatic defect classification (ADC) software solutions. With IMPACT SEM XP, KLA-Tencor brings to its eV300 SEM review tool the same productionproven ADC capabilities already implemented on its high-resolution optical wafer inspection platforms - enabling intelligent defect sampling and classification, and more rapid, consistent and accurate sourcing of yieldlimiting defects that affect device performance and reliability. With these new capabilities, customers can optimize the eV300 for use in classifying and reviewing the extremely small defects associated with advanced semiconductor manufacturing processes, including 0.13-micron and smaller design rules, thus dramatically reducing the cost of ownership (CoO) of SEM review.

Klarity ProDATA

KLA-Tencor’s lithography data analysis software is an easy-to-use, fast and accurate tool that standardizes and automates analysis of experimental lithography data to allow engineers across the fab to use common analysis schemes. With Klarity ProDATA, users can adopt a systematic and robust approach to understanding and optimizing their manufacturing processes to help reduce cycle times for process characterization, stepper and scanner lens qualification, new reticle introduction and resist evaluation.

The SEM Image Analysis Module, an optional new add-in to Klarity ProDATA for analysis of CD SEM images, provides a variety of two-dimensional measurement capabilities on images imported from the KLA-Tencor CD SEM. This module extracts the critical shape from reticle and wafer SEM images and measures area, corner rounding, edge roughness and other metrics. What’s more, it can overlap two separate SEM images, such as a reticle and wafer image of the same feature, or design data and a SEM image, and provide measurements of the critical shape difference and overlapping area. The SEM Image Analysis Module enables fast characterization and optimization of reticle processing and optical extension technology.

SEM Image Analysis Module (SIAM)

KLA-Tencor’s new Klarity ProDATA extension enables quicker recognition of two-dimensional shape effects in lithography processing. SIAM allows users to overlay images from different points in the lithography pattern transfer process and to quantify the critical shape difference (CSD) between patterns. With SIAM, engineers can easily import and compare initial and post-OPC design patterns, PROLITH simulations, and CD SEM images of reticle, resist and etch features.

Autumn 2000

Yield Management Solutions

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10:15 A.M. YOU’VE GOT A PROBLEM. 10:17 A.M. WE FIX IT. 10:18 A.M. WE TELL YOU ALL ABOUT IT.

Now the people taking care of your fab don’t even have to be in your fab. That’s because iSupport™ technology connects our support engineers directly to your KLA-Tencor tools. So at the first sign of trouble, we can respond immediately, notify you instantly, or even fix it remotely – all with iron-clad security. Plus, with real-time access to tool data, remote diagnostics and on-line problem resolution, productivity can be increased substantially. And cost of ownership slashed. But that’s just for starters. iSupport can also help you deal with application issues, equipment setup, software updates and training. Even accelerate new tool and fab ramps in just minutes.

For the industry’s first and only on-line support program, call 1-800-450-5308, visit www.kla-tencor.com, or contact your local KLA-Tencor field office. You’ll see it’s the best way to keep your yield-maximizing tools maximized.

ALREADY THERE. ©2000 KLA-Tencor Corporation. iSupport is a trademark of KLA-Tencor Corporation.

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